Implemented ISR management routines

This commit is contained in:
afpr
2014-03-27 16:01:33 +00:00
parent 92e9ed137a
commit 3e3cdca15f
2 changed files with 18 additions and 2 deletions

View File

@@ -44,8 +44,6 @@ extern char _cpuinfo_base; /* linker symbol giving the address of the CPU info *
extern uint32_t get_cpu_freq_mhz(void);
#define __PATMOS_INF 0xFFFFFFFF /* maximum cycles the clock can run without interrupts */
/* Address to access the CPU id */
#define __PATMOS_CPU_ID_ADDR (&_cpuinfo_base + 0x00)

View File

@@ -83,6 +83,24 @@ extern "C" {
asm volatile ( "nop" ); \
} while ( 0 )
/*
* Manipulate the interrupt level
*/
#define patmos_flash_interrupts( _level ) \
do { \
register uint32_t _ignored = 0; \
\
patmos_enable_interrupts( (_level) ); \
_ignored = patmos_disable_interrupts(); \
} while ( 0 )
#define patmos_get_interrupt_level( _level ) \
do { \
(_level) = \
~EXC_STATUS & CPU_MODES_INTERRUPT_MASK; \
} while ( 0 )
#ifdef __cplusplus
}
#endif