[tools] Add better way to generate MDK project file.

Update for dfs_lwip and completion.

.gitignore

@@ -10,6 +10,8 @@
 *.idb
 *.ilk
 build
+Debug
+documentation/html
 *~
 *.o
 *.obj

.travis.yml

@@ -22,6 +22,7 @@ script:
 env:
   - RTT_BSP='simulator' RTT_CC='clang-analyze' RTT_EXEC_PATH=/usr/share/clang/scan-build
   - RTT_BSP='CME_M7' RTT_TOOL_CHAIN='sourcery-arm'
+  - RTT_BSP='asm9260t' RTT_TOOL_CHAIN='sourcery-arm'
   - RTT_BSP='at91sam9260' RTT_TOOL_CHAIN='sourcery-arm'
   - RTT_BSP='avr32uc3b0' RTT_TOOL_CHAIN='atmel-avr32'
 #  - RTT_BSP='bf533' # no scons

README.md

@@ -1,6 +1,6 @@
 # RT-Thread #
 
-[![Build Status](https://travis-ci.org/RT-Thread/rt-thread.png)](https://travis-ci.org/RT-Thread/rt-thread)
+[![Build Status](https://travis-ci.org/RT-Thread/rt-thread.svg)](https://travis-ci.org/RT-Thread/rt-thread)
 [![Gitter](https://badges.gitter.im/Join Chat.svg)](https://gitter.im/RT-Thread/rt-thread?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge)
 
 RT-Thread is an open source real-time operating system for embedded devices from China. RT-Thread RTOS is a scalable real-time operating system: a tiny kernel for ARM Cortex-M0, Cortex-M3/4, or a full feature system in ARM Cortex-A8, ARM Cortex-A9 DualCore etc. 
@@ -39,6 +39,31 @@ As a special exception, including RT-Thread RTOS header files in a file, instant
 
 RT-Thread RTOS uses [scons](http://www.scons.org) as its building system. Therefore, please install scons and Python 2.7 firstly. 
 
+So far, the RT-Thread scons building system support the command line compiling or generate some IDE's project. There are some option varaibles in the scons building script:
+
+In rtconfig.py file:
+
+* ```CROSS_TOOL``` the compiler which you want to use, gcc/keil/iar. 
+* ```EXEC_PATH``` the path of compiler. 
+
+In SConstruct file:
+
+```RTT_ROOT``` This variable is the root directory of RT-Thread RTOS. If you build the porting in the bsp directory, you can use the default value. Also, you can set the root directory in ```RTT_ROOT``` environment variable.
+
+When you set these variables correctly, you can use command:
+
+    scons 
+    
+  under BSP directory to simplely compile RT-Thread RTOS.
+
+If you want to generate the IDE's project file, firstly you should change the ```RTT_CC``` in the rtconfig.py file. Then use command:
+
+    scons --target=mdk/mdk4/iar/cb -s 
+
+to generate the project file. 
+
+NOTE: RT-Thread scons building system will tailor the system according to your rtconfig.h configuration header file. For example, if you disable the lwIP in the rtconfig.h by commenting the ```#define RT_USING_LWIP```, the generated project file has no lwIP related files. 
+
 ## Contribution ##
 
 Thank all of RT-Thread Developers. 

bsp/CME_M7/rtconfig.py

@@ -24,7 +24,7 @@ if os.getenv('RTT_EXEC_PATH'):
 if os.getenv('RTT_ROOT'):
     RTT_ROOT = os.getenv('RTT_ROOT')
 else:
-    RTT_ROOT = os.path.normpath(os.getcwd())
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
 
 BUILD = 'debug'
 

bsp/asm9260t/IAR_ASM9260T_DeviceSupportFile/arm/config/debugger/AlphaScale/ASM9260T.ddf

@@ -0,0 +1,44 @@
+
+;; Memory information ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; 
+;; Used to define address zones within the ARM address space (Memory). 
+;;
+;;   Name      may be almost anything
+;;   AdrSpace  must be Memory
+;;   StartAdr  start of memory block
+;;   EndAdr    end of memory block
+;;   AccType   type of access, read-only (R), read-write (RW) or SFR (W)
+
+[Memory]
+;;         Name             AdrSpace    StartAdr    EndAdr      AccType   Width
+;Memory =  SYSC0            Memory      0xFFFFE800  0xFFFFF9FF  W  
+;Memory =  SYSC1            Memory      0xFFFFFC00  0xFFFFFD7F  W  
+;Memory =  ROM              Memory      0x00100000  0x00107FFF  R  
+;Memory =  BootMem          Memory      0x00000000  0x000FFFFF  R  
+;Memory =  RAM0             Memory      0x00200000  0x00200FFF  RW 
+;Memory =  Periph           Memory      0xFFFA0000  0xFFFE3FFF  W  
+;Memory =  USBH             Memory      0x00500000  0x00503FFF  W  
+;Memory =  RAM1             Memory      0x00300000  0x00300FFF  RW 
+;Memory =  ExtDev           Memory      0x10000000  0x8FFFFFFF  RW 
+
+Memory =  EMI_MEM          Memory      0x00000000  0x3FFFFFFF  RW
+Memory =  RAM              Memory      0x40000000  0x40001FFF  RW
+Memory =  AHB              Memory      0x50000000  0x501FFFFF  W
+Memory =  APB              Memory      0x80000000  0x800BFFFF  W
+Memory =  DMA0             Memory      0x80100000  0x8010FFFF  W
+Memory =  DMA1             Memory      0x80200000  0x8020FFFF  W
+Memory =  USB0             Memory      0x80300000  0x8030FFFF  W
+Memory =  USB1             Memory      0x80400000  0x8040FFFF  W
+Memory =  MAC              Memory      0x80500000  0x8050FFFF  W
+Memory =  NAND             Memory      0x80600000  0x8060FFFF  W
+Memory =  EMI_REG          Memory      0x80700000  0x8070FFFF  W
+Memory =  LCD              Memory      0x80800000  0x8080FFFF  W
+Memory =  SPI_FLASH        Memory      0xF0000000  0xF7FFFFFF  RW
+Memory =  ROM              Memory      0xFFFF0000  0xFFFFFFFF  R
+
+
+TrustedRanges = true
+UseSfrFilter = true
+
+[SfrInclude]
+File = ioASM9260T.ddf

bsp/asm9260t/IAR_ASM9260T_DeviceSupportFile/arm/config/debugger/AlphaScale/ioASM9260T.ddf

@@ -0,0 +1,272 @@
+; ----------------------------------------------------------------------------
+;          Arda Technologies CO. Ltd. 2007-2015
+; ----------------------------------------------------------------------------
+;  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ARDA "AS IS" AND ANY EXPRESS OR
+;  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+;  DISCLAIMED. IN NO EVENT SHALL ARDA BE LIABLE FOR ANY DIRECT, INDIRECT,
+;  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+;  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+;  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+;  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; ----------------------------------------------------------------------------
+; File Name           : ASM9260T.ddf
+; Object              : ASM9260T definitions
+; Generated           : Arda SW Application Group  29/04/2015
+;
+; ----------------------------------------------------------------------------
+
+[Sfr]
+
+; ========== Register definition for SYS peripheral ==========
+sfr = "PRESETCTRL0", 	"Memory", 0x80040000, 4, base=16
+sfr = "PRESETCTRL1", 	"Memory", 0x80040010, 4, base=16
+sfr = "AHBCLKCTRL0", 	"Memory", 0x80040020, 4, base=16
+sfr = "AHBCLKCTRL0.GPIO", 	"Memory", 0x80040020, 4, base=16, bitRange=4
+sfr = "AHBCLKCTRL0.IOCONFIG", 	"Memory", 0x80040020, 4, base=16, bitRange=25
+sfr = "AHBCLKCTRL1", 	"Memory", 0x80040030, 4, base=16
+sfr = "AHBCLKCTRL1.TIMER0", 	"Memory", 0x80040030, 4, base=16, bitRange=4
+sfr = "AHBCLKCTRL1.IRQ", 	"Memory", 0x80040030, 4, base=16, bitRange=8
+sfr = "SYSPLLCTRL", 	"Memory", 0x80040100, 4, base=16
+sfr = "SYSRSTSTAT", 	"Memory", 0x80040110, 4, base=16
+sfr = "MAINCLKSEL", 	"Memory", 0x80040120, 4, base=16
+sfr = "MAINCLKUEN", 	"Memory", 0x80040124, 4, base=16
+sfr = "UARTCLKSEL", 	"Memory", 0x80040128, 4, base=16
+sfr = "UARTCLKUEN", 	"Memory", 0x8004012C, 4, base=16
+sfr = "CPUCLKDIV", 	    "Memory", 0x8004017C, 4, base=16
+sfr = "SYSAHBCLKDIV", 	"Memory", 0x80040180, 4, base=16
+sfr = "UART0CLKDIV", 	"Memory", 0x80040198, 4, base=16
+sfr = "UART1CLKDIV", 	"Memory", 0x8004019C, 4, base=16
+sfr = "UART2CLKDIV", 	"Memory", 0x800401A0, 4, base=16
+sfr = "UART3CLKDIV", 	"Memory", 0x800401A4, 4, base=16
+sfr = "UART4CLKDIV", 	"Memory", 0x800401A8, 4, base=16
+sfr = "UART5CLKDIV", 	"Memory", 0x800401AC, 4, base=16
+sfr = "UART6CLKDIV", 	"Memory", 0x800401B0, 4, base=16
+sfr = "UART7CLKDIV", 	"Memory", 0x800401B4, 4, base=16
+sfr = "UART8CLKDIV", 	"Memory", 0x800401B8, 4, base=16
+sfr = "UART9CLKDIV", 	"Memory", 0x800401BC, 4, base=16
+sfr = "DEVICEID", 	    "Memory", 0x80040400, 4, base=16
+sfr = "PCON", 	        "Memory", 0x80040500, 4, base=16
+;-----------------ICOLL---------------------------------------------------------
+sfr = "HW_ICOLL_VECTOR", "Memory", 0x80054000, 4, base=16
+sfr = "HW_ICOLL_LEVELACK", "Memory", 0x80054010, 4, base=16
+sfr = "HW_ICOLL_CTRL", "Memory", 0x80054020, 4, base=16
+sfr = "HW_ICOLL_CTRL.BYPASS_FSM", "Memory", 0x80054020, 4, base=16, bitRange=20
+sfr = "HW_ICOLL_CTRL.NO_NESTING", "Memory", 0x80054020, 4, base=16, bitRange=19
+sfr = "HW_ICOLL_CTRL.RSE_MODE", "Memory", 0x80054020, 4, base=16, bitRange=18
+sfr = "HW_ICOLL_CTRL.IRQ_FINAL_ENABLE", "Memory", 0x80054020, 4, base=16, bitRange=16
+sfr = "HW_ICOLL_STAT", "Memory", 0x80054030, 4, base=16
+sfr = "HW_ICOLL_STAT.vector_number", "Memory", 0x80054030, 4, base=16, bitRange=0-5
+sfr = "HW_ICOLL_RAW0", "Memory", 0x80054040, 4, base=16
+sfr = "HW_ICOLL_RAW0.UART3_IRQ", "Memory", 0x80054040, 4, base=16, bitRange=18
+sfr = "HW_ICOLL_RAW0.TIMER0_IRQ", "Memory", 0x80054040, 4, base=16, bitRange=29
+sfr = "HW_ICOLL_RAW1", "Memory", 0x80054050, 4, base=16
+sfr = "HW_ICOLL_PRIORITY0", "Memory", 0x80054060, 4, base=16
+sfr = "HW_ICOLL_PRIORITY1", "Memory", 0x80054070, 4, base=16
+sfr = "HW_ICOLL_PRIORITY2", "Memory", 0x80054080, 4, base=16
+sfr = "HW_ICOLL_PRIORITY3", "Memory", 0x80054090, 4, base=16
+sfr = "HW_ICOLL_PRIORITY4", "Memory", 0x800540A0, 4, base=16
+sfr = "HW_ICOLL_PRIORITY5", "Memory", 0x800540B0, 4, base=16
+sfr = "HW_ICOLL_PRIORITY6", "Memory", 0x800540C0, 4, base=16
+sfr = "HW_ICOLL_PRIORITY7", "Memory", 0x800540D0, 4, base=16
+sfr = "HW_ICOLL_PRIORITY8", "Memory", 0x800540E0, 4, base=16
+sfr = "HW_ICOLL_PRIORITY9", "Memory", 0x800540F0, 4, base=16
+sfr = "HW_ICOLL_PRIORITY10", "Memory", 0x80054100, 4, base=16
+sfr = "HW_ICOLL_PRIORITY11", "Memory", 0x80054110, 4, base=16
+sfr = "HW_ICOLL_PRIORITY12", "Memory", 0x80054120, 4, base=16
+sfr = "HW_ICOLL_PRIORITY13", "Memory", 0x80054130, 4, base=16
+sfr = "HW_ICOLL_PRIORITY14", "Memory", 0x80054140, 4, base=16
+sfr = "HW_ICOLL_PRIORITY15", "Memory", 0x80054150, 4, base=16
+sfr = "HW_ICOLL_VBASE", "Memory", 0x80054160, 4, base=16
+sfr = "HW_ICOLL_DEBUG", "Memory", 0x80054170, 4, base=16
+sfr = "HW_ICOLL_DBGREAD0", "Memory", 0x80054180, 4, base=16
+sfr = "HW_ICOLL_DBGREAD1", "Memory", 0x80054190, 4, base=16
+sfr = "HW_ICOLL_DBGFLAG", "Memory", 0x800541A0, 4, base=16
+sfr = "HW_ICOLL_DBGREQUEST0", "Memory", 0x800541B0, 4, base=16
+sfr = "HW_ICOLL_DBGREQUEST1", "Memory", 0x800541C0, 4, base=16
+sfr = "HW_ICOLL_CLEAR0", "Memory", 0x800541D0, 4, base=16
+sfr = "HW_ICOLL_CLEAR0.UART3_IRQ", "Memory", 0x800541D0, 4, base=16, bitRange=18
+sfr = "HW_ICOLL_CLEAR0.TIMER0_IRQ", "Memory", 0x800541D0, 4, base=16, bitRange=29
+sfr = "HW_ICOLL_CLEAR1", "Memory", 0x800541E0, 4, base=16
+sfr = "HW_ICOLL_UNDEF_VECTOR", "Memory", 0x800541F0, 4, base=16
+
+;---------------------TIMER0----------------------------------------------
+sfr = "HW_TIMER0_IR", "Memory", 0x80088000, 4, base=16
+sfr = "HW_TIMER0_IR.MR0_INT", "Memory", 0x80088000, 4, base=16, bitRange=0
+sfr = "HW_TIMER0_IR.MR1_INT", "Memory", 0x80088000, 4, base=16, bitRange=1
+sfr = "HW_TIMER0_IR.MR2_INT", "Memory", 0x80088000, 4, base=16, bitRange=2
+sfr = "HW_TIMER0_IR.MR3_INT", "Memory", 0x80088000, 4, base=16, bitRange=3
+sfr = "HW_TIMER0_IR.CR0_INT", "Memory", 0x80088000, 4, base=16, bitRange=4
+sfr = "HW_TIMER0_TCR", "Memory", 0x80088010, 4, base=16
+sfr = "HW_TIMER0_TCR.CEN0", "Memory", 0x80088010, 4, base=16, bitRange=0
+sfr = "HW_TIMER0_TCR.CEN1", "Memory", 0x80088010, 4, base=16, bitRange=1
+sfr = "HW_TIMER0_TCR.CEN2", "Memory", 0x80088010, 4, base=16, bitRange=2
+sfr = "HW_TIMER0_TCR.CEN3", "Memory", 0x80088010, 4, base=16, bitRange=3
+sfr = "HW_TIMER0_TCR.CRST0", "Memory", 0x80088010, 4, base=16, bitRange=4
+sfr = "HW_TIMER0_TCR.CRST1", "Memory", 0x80088010, 4, base=16, bitRange=5
+sfr = "HW_TIMER0_TCR.CRST2", "Memory", 0x80088010, 4, base=16, bitRange=6
+sfr = "HW_TIMER0_TCR.CRST3", "Memory", 0x80088010, 4, base=16, bitRange=7
+sfr = "HW_TIMER0_DIR", "Memory", 0x80088020, 4, base=16
+sfr = "HW_TIMER0_DIR.DIR0", "Memory", 0x80088020, 4, base=16, bitRange=0-1
+sfr = "HW_TIMER0_DIR.DIR1", "Memory", 0x80088020, 4, base=16, bitRange=4-5
+sfr = "HW_TIMER0_DIR.DIR2", "Memory", 0x80088020, 4, base=16, bitRange=8-9
+sfr = "HW_TIMER0_DIR.DIR3", "Memory", 0x80088020, 4, base=16, bitRange=12-13
+sfr = "HW_TIMER0_TC0", "Memory", 0x80088030, 4, base=16
+sfr = "HW_TIMER0_TC1", "Memory", 0x80088040, 4, base=16
+sfr = "HW_TIMER0_TC2", "Memory", 0x80088050, 4, base=16
+sfr = "HW_TIMER0_TC3", "Memory", 0x80088060, 4, base=16
+sfr = "HW_TIMER0_PR", "Memory", 0x80088070, 4, base=16
+sfr = "HW_TIMER0_PC", "Memory", 0x80088080, 4, base=16
+sfr = "HW_TIMER0_MCR", "Memory", 0x80088090, 4, base=16
+sfr = "HW_TIMER0_MCR.MR0INT", "Memory", 0x80088090, 4, base=16, bitRange=0
+sfr = "HW_TIMER0_MCR.MR0RST", "Memory", 0x80088090, 4, base=16, bitRange=1
+sfr = "HW_TIMER0_MCR.MR0STOP", "Memory", 0x80088090, 4, base=16, bitRange=2
+sfr = "HW_TIMER0_MCR.MR1INT", "Memory", 0x80088090, 4, base=16, bitRange=3
+sfr = "HW_TIMER0_MCR.MR1RST", "Memory", 0x80088090, 4, base=16, bitRange=4
+sfr = "HW_TIMER0_MCR.MR1STOP", "Memory", 0x80088090, 4, base=16, bitRange=5
+sfr = "HW_TIMER0_MCR.MR2INT", "Memory", 0x80088090, 4, base=16, bitRange=6
+sfr = "HW_TIMER0_MCR.MR2RST", "Memory", 0x80088090, 4, base=16, bitRange=7
+sfr = "HW_TIMER0_MCR.MR2STOP", "Memory", 0x80088090, 4, base=16, bitRange=8
+sfr = "HW_TIMER0_MCR.MR3INT", "Memory", 0x80088090, 4, base=16, bitRange=9
+sfr = "HW_TIMER0_MCR.MR3RST", "Memory", 0x80088090, 4, base=16, bitRange=10
+sfr = "HW_TIMER0_MCR.MR3STOP", "Memory", 0x80088090, 4, base=16, bitRange=11
+sfr = "HW_TIMER0_MR0", "Memory", 0x800880a0, 4, base=16
+sfr = "HW_TIMER0_MR1", "Memory", 0x800880b0, 4, base=16
+sfr = "HW_TIMER0_MR2", "Memory", 0x800880C0, 4, base=16
+sfr = "HW_TIMER0_MR3", "Memory", 0x800880D0, 4, base=16
+sfr = "HW_TIMER0_CCR", "Memory", 0x800880E0, 4, base=16
+sfr = "HW_TIMER0_CCR.CAP0RE", "Memory", 0x800880E0, 4, base=16, bitRange=0
+sfr = "HW_TIMER0_CCR.CAP0FE", "Memory", 0x800880E0, 4, base=16, bitRange=1
+sfr = "HW_TIMER0_CCR.CAP0I", "Memory", 0x800880E0, 4, base=16, bitRange=2
+sfr = "HW_TIMER0_CR0", "Memory", 0x800880F0, 4, base=16
+sfr = "HW_TIMER0_CR1", "Memory", 0x80088100, 4, base=16
+sfr = "HW_TIMER0_CR2", "Memory", 0x80088110, 4, base=16
+sfr = "HW_TIMER0_CR3", "Memory", 0x80088120, 4, base=16
+sfr = "HW_TIMER0_EMR", "Memory", 0x80088130, 4, base=16
+sfr = "HW_TIMER0_PWMTH0", "Memory", 0x80088140, 4, base=16
+sfr = "HW_TIMER0_PWMTH1", "Memory", 0x80088150, 4, base=16
+sfr = "HW_TIMER0_PWMTH2", "Memory", 0x80088160, 4, base=16
+sfr = "HW_TIMER0_PWMTH3", "Memory", 0x80088170, 4, base=16
+sfr = "HW_TIMER0_CTCR", "Memory", 0x80088180, 4, base=16
+sfr = "HW_TIMER0_PWMC", "Memory", 0x80088190, 4, base=16
+
+;---------------------UART3-------------------------------------------------------
+sfr = "HW_USART3_CTRL0",    "Memory", 0x8000C000, 4, base=16
+sfr = "HW_USART3_CTRL0.XFER_COUNT",    "Memory", 0x8000C000, 4, base=16, bitRange=0-15
+sfr = "HW_USART3_CTRL0.RXTIMEOUT",    "Memory", 0x8000C000, 4, base=16, bitRange=16-23
+sfr = "HW_USART3_CTRL0.RXTO_ENABLE",    "Memory", 0x8000C000, 4, base=16, bitRange=24
+sfr = "HW_USART3_CTRL0.RX_SOURCE",    "Memory", 0x8000C000, 4, base=16, bitRange=25
+sfr = "HW_USART3_CTRL0.RUN",    "Memory", 0x8000C000, 4, base=16, bitRange=28
+sfr = "HW_USART3_CTRL0.CLKGATE",    "Memory", 0x8000C000, 4, base=16, bitRange=30
+sfr = "HW_USART3_CTRL0.SOFTRST",    "Memory", 0x8000C000, 4, base=16, bitRange=31
+sfr = "HW_USART3_CTRL1",    "Memory", 0x8000C010, 4, base=16
+sfr = "HW_USART3_CTRL1.XFER_COUNT",    "Memory", 0x8000C010, 4, base=16, bitRange=0-15
+sfr = "HW_USART3_CTRL1.RUN",    "Memory", 0x8000C010, 4, base=16, bitRange=28
+sfr = "HW_USART3_CTRL2",    "Memory", 0x8000C020, 4, base=16
+sfr = "HW_USART3_CTRL2.USARTEN",    "Memory", 0x8000C020, 4, base=16, bitRange=0
+sfr = "HW_USART3_CTRL2.SIREN",    "Memory", 0x8000C020, 4, base=16, bitRange=1
+sfr = "HW_USART3_CTRL2.SIRLP",    "Memory", 0x8000C020, 4, base=16, bitRange=2
+sfr = "HW_USART3_CTRL2.LBE",    "Memory", 0x8000C020, 4, base=16, bitRange=7
+sfr = "HW_USART3_CTRL2.TXE",    "Memory", 0x8000C020, 4, base=16, bitRange=8
+sfr = "HW_USART3_CTRL2.RXE",    "Memory", 0x8000C020, 4, base=16, bitRange=9
+sfr = "HW_USART3_CTRL2.DTR",    "Memory", 0x8000C020, 4, base=16, bitRange=10
+sfr = "HW_USART3_CTRL2.RTS",    "Memory", 0x8000C020, 4, base=16, bitRange=11
+sfr = "HW_USART3_CTRL2.OUT1",    "Memory", 0x8000C020, 4, base=16, bitRange=12
+sfr = "HW_USART3_CTRL2.OUT2",    "Memory", 0x8000C020, 4, base=16, bitRange=13
+sfr = "HW_USART3_CTRL2.RTSEM",    "Memory", 0x8000C020, 4, base=16, bitRange=14
+sfr = "HW_USART3_CTRL2.CTSEN",    "Memory", 0x8000C020, 4, base=16, bitRange=15
+sfr = "HW_USART3_CTRL2.TXIFLSEL",    "Memory", 0x8000C020, 4, base=16, bitRange=16-18
+sfr = "HW_USART3_CTRL2.RXIFLSEL",    "Memory", 0x8000C020, 4, base=16, bitRange=20-22
+sfr = "HW_USART3_CTRL2.RXDMAE",    "Memory", 0x8000C020, 4, base=16, bitRange=24
+sfr = "HW_USART3_CTRL2.TXDMAE",    "Memory", 0x8000C020, 4, base=16, bitRange=25
+sfr = "HW_USART3_CTRL2.DMAONERROR",    "Memory", 0x8000C020, 4, base=16, bitRange=26
+
+sfr = "HW_USART3_LINECTRL", "Memory", 0x8000C030, 4, base=16
+sfr = "HW_USART3_LINECTRL.BRK", "Memory", 0x8000C030, 4, base=16, bitRange=0
+sfr = "HW_USART3_LINECTRL.PEN", "Memory", 0x8000C030, 4, base=16, bitRange=1
+sfr = "HW_USART3_LINECTRL.EPS", "Memory", 0x8000C030, 4, base=16, bitRange=2
+sfr = "HW_USART3_LINECTRL.STP2", "Memory", 0x8000C030, 4, base=16, bitRange=3
+sfr = "HW_USART3_LINECTRL.FEN", "Memory", 0x8000C030, 4, base=16, bitRange=4
+sfr = "HW_USART3_LINECTRL.WLEN", "Memory", 0x8000C030, 4, base=16, bitRange=5:6
+sfr = "HW_USART3_LINECTRL.SPS", "Memory", 0x8000C030, 4, base=16, bitRange=7
+sfr = "HW_USART3_LINECTRL.BAUD_DIVFRA", "Memory", 0x8000C030, 4, base=16, bitRange=8-13
+sfr = "HW_USART3_LINECTRL.BAUD_DIVINT", "Memory", 0x8000C030, 4, base=16, bitRange=16-31
+sfr = "HW_USART3_INTR",     "Memory", 0x8000C040, 4, base=16
+sfr = "HW_USART3_INTR.RXIS",     "Memory", 0x8000C040, 4, base=16, bitRange=4
+sfr = "HW_USART3_INTR.TXIS",     "Memory", 0x8000C040, 4, base=16, bitRange=5
+sfr = "HW_USART3_INTR.RTIS",     "Memory", 0x8000C040, 4, base=16, bitRange=6
+sfr = "HW_USART3_INTR.RXIEN",     "Memory", 0x8000C040, 4, base=16, bitRange=20
+sfr = "HW_USART3_INTR.TXIEN",     "Memory", 0x8000C040, 4, base=16, bitRange=21
+sfr = "HW_USART3_INTR.RTIEN",     "Memory", 0x8000C040, 4, base=16, bitRange=22
+sfr = "HW_USART3_DATA",     "Memory", 0x8000C050, 4, base=16
+sfr = "HW_USART3_STAT",     "Memory", 0x8000C060, 4, base=16
+sfr = "HW_USART3_STAT.RXOUNT",     "Memory", 0x8000C060, 4, base=16, bitRange=0-15
+sfr = "HW_USART3_STAT.OEER",     "Memory", 0x8000C060, 4, base=16, bitRange=19
+sfr = "HW_USART3_STAT.RXBYTE_INVOID",     "Memory", 0x8000C060, 4, base=16, bitRange=20-23
+sfr = "HW_USART3_STAT.RXFE",     "Memory", 0x8000C060, 4, base=16, bitRange=24
+sfr = "HW_USART3_STAT.TXFF",     "Memory", 0x8000C060, 4, base=16, bitRange=25
+sfr = "HW_USART3_STAT.RXFF",     "Memory", 0x8000C060, 4, base=16, bitRange=26
+sfr = "HW_USART3_STAT.TXFE",     "Memory", 0x8000C060, 4, base=16, bitRange=27
+sfr = "HW_USART3_STAT.BUSY",     "Memory", 0x8000C060, 4, base=16, bitRange=29
+sfr = "HW_USART3_STAT.HISPEED",     "Memory", 0x8000C060, 4, base=16, bitRange=30
+sfr = "HW_USART3_STAT.PRESENT",     "Memory", 0x8000C060, 4, base=16, bitRange=31
+sfr = "HW_USART3_DEBUG",    "Memory", 0x8000C070, 4, base=16
+sfr = "HW_USART3_ILPR",     "Memory", 0x8000C080, 4, base=16
+sfr = "HW_USART3_RS485CTRL", "Memory", 0x8000C090, 4, base=16
+sfr = "HW_USART3_RS485ADRMATCH", "Memory", 0x8000C0A0, 4, base=16
+sfr = "HW_USART3_RS485DLY", "Memory", 0x8000C0B0, 4, base=16
+sfr = "HW_USART3_AUTOBAUD", "Memory", 0x8000C0C0, 4, base=16
+sfr = "HW_USART3_CTRL3",    "Memory", 0x8000C0D0, 4, base=16
+sfr = "HW_USART3_ISO7816CTRL",    "Memory", 0x8000C0E0, 4, base=16
+sfr = "HW_USART3_ISO7816ERRCNT",    "Memory", 0x8000C0F0, 4, base=16
+sfr = "HW_USART3_ISO7816STAT",    "Memory", 0x8000C100, 4, base=16
+;----------------------GPIO--------------------------------------------------------------------
+sfr = "HW_GPIO_DATA0", "Memory", 0x50000000, 4, base=16
+sfr = "HW_GPIO_DATA1", "Memory", 0x50010000, 4, base=16
+sfr = "HW_GPIO_DATA2", "Memory", 0x50020000, 4, base=16
+sfr = "HW_GPIO_DATA3", "Memory", 0x50030000, 4, base=16
+sfr = "HW_GPIO_DIR0", "Memory", 0x50008000, 4, base=16
+sfr = "HW_GPIO_DIR1", "Memory", 0x50018000, 4, base=16
+sfr = "HW_GPIO_DIR2", "Memory", 0x50028000, 4, base=16
+sfr = "HW_GPIO_DIR3", "Memory", 0x50038000, 4, base=16
+sfr = "HW_GPIO_IS0", "Memory", 0x50008010, 4, base=16
+sfr = "HW_GPIO_IS1", "Memory", 0x50018010, 4, base=16
+sfr = "HW_GPIO_IS2", "Memory", 0x50028010, 4, base=16
+sfr = "HW_GPIO_IS3", "Memory", 0x50038010, 4, base=16
+sfr = "HW_GPIO_IBE0", "Memory", 0x50008020, 4, base=16
+sfr = "HW_GPIO_IBE1", "Memory", 0x50018020, 4, base=16
+sfr = "HW_GPIO_IBE2", "Memory", 0x50028020, 4, base=16
+sfr = "HW_GPIO_IBE3", "Memory", 0x50038020, 4, base=16
+sfr = "HW_GPIO_IEV0", "Memory", 0x50008030, 4, base=16
+sfr = "HW_GPIO_IEV1", "Memory", 0x50018030, 4, base=16
+sfr = "HW_GPIO_IEV2", "Memory", 0x50028030, 4, base=16
+sfr = "HW_GPIO_IEV3", "Memory", 0x50038030, 4, base=16
+sfr = "HW_GPIO_IE0", "Memory", 0x50008040, 4, base=16
+sfr = "HW_GPIO_IE1", "Memory", 0x50018040, 4, base=16
+sfr = "HW_GPIO_IE2", "Memory", 0x50028040, 4, base=16
+sfr = "HW_GPIO_IE3", "Memory", 0x50038040, 4, base=16
+sfr = "HW_GPIO_IRS0", "Memory", 0x50008050, 4, base=16
+sfr = "HW_GPIO_IRS1", "Memory", 0x50018050, 4, base=16
+sfr = "HW_GPIO_IRS2", "Memory", 0x50028050, 4, base=16
+sfr = "HW_GPIO_IRS3", "Memory", 0x50038050, 4, base=16
+sfr = "HW_GPIO_MIS0", "Memory", 0x50008060, 4, base=16
+sfr = "HW_GPIO_MIS1", "Memory", 0x50018060, 4, base=16
+sfr = "HW_GPIO_MIS2", "Memory", 0x50028060, 4, base=16
+sfr = "HW_GPIO_MIS3", "Memory", 0x50038060, 4, base=16
+sfr = "HW_GPIO_IC0", "Memory", 0x50008070, 4, base=16
+sfr = "HW_GPIO_IC1", "Memory", 0x50018070, 4, base=16
+sfr = "HW_GPIO_IC2", "Memory", 0x50028070, 4, base=16
+sfr = "HW_GPIO_IC3", "Memory", 0x50038070, 4, base=16
+sfr = "HW_GPIO_DATAMASK0", "Memory", 0x50008080, 4, base=16
+sfr = "HW_GPIO_DATAMASK1", "Memory", 0x50018080, 4, base=16
+sfr = "HW_GPIO_DATAMASK2", "Memory", 0x50028080, 4, base=16
+sfr = "HW_GPIO_DATAMASK3", "Memory", 0x50038080, 4, base=16
+
+[SfrGroupInfo]
+group = "SYS", "PRESETCTRL0", "PRESETCTRL1", "AHBCLKCTRL0", "AHBCLKCTRL1",  "SYSPLLCTRL", "SYSRSTSTAT", "MAINCLKSEL","MAINCLKUEN",  "UARTCLKSEL",  "UARTCLKUEN", "CPUCLKDIV", "SYSAHBCLKDIV", "UART0CLKDIV", "UART1CLKDIV", "UART2CLKDIV", "UART3CLKDIV", "UART4CLKDIV", "UART5CLKDIV", "UART6CLKDIV", "UART7CLKDIV", "UART8CLKDIV", "UART9CLKDIV", "DEVICEID","PCON"
+group = "ICOLL", "HW_ICOLL_VECTOR", "HW_ICOLL_LEVELACK", "HW_ICOLL_CTRL", "HW_ICOLL_STAT", "HW_ICOLL_RAW0", "HW_ICOLL_RAW1", "HW_ICOLL_PRIORITY0", "HW_ICOLL_PRIORITY1", "HW_ICOLL_PRIORITY2", "HW_ICOLL_PRIORITY3", "HW_ICOLL_PRIORITY4", "HW_ICOLL_PRIORITY5", "HW_ICOLL_PRIORITY6", "HW_ICOLL_PRIORITY7", "HW_ICOLL_PRIORITY8", "HW_ICOLL_PRIORITY9", "HW_ICOLL_PRIORITY10", "HW_ICOLL_PRIORITY11", "HW_ICOLL_PRIORITY12", "HW_ICOLL_PRIORITY13", "HW_ICOLL_PRIORITY14", "HW_ICOLL_PRIORITY15", "HW_ICOLL_VBASE", "HW_ICOLL_DEBUG", "HW_ICOLL_DBGREAD0", "HW_ICOLL_DBGREAD1", "HW_ICOLL_DBGFLAG", "HW_ICOLL_DBGREQUEST0", "HW_ICOLL_DBGREQUEST1", "HW_ICOLL_CLEAR0", "HW_ICOLL_CLEAR1", "HW_ICOLL_UNDEF_VECTOR",
+group = "TIMER0", "HW_TIMER0_IR","HW_TIMER0_TCR","HW_TIMER0_DIR","HW_TIMER0_TC0","HW_TIMER0_TC1","HW_TIMER0_TC2","HW_TIMER0_TC3","HW_TIMER0_PR","HW_TIMER0_PC","HW_TIMER0_MCR","HW_TIMER0_MR0","HW_TIMER0_MR1","HW_TIMER0_MR2","HW_TIMER0_MR3","HW_TIMER0_CCR","HW_TIMER0_CR0","HW_TIMER0_CR1","HW_TIMER0_CR2","HW_TIMER0_CR3","HW_TIMER0_EMR","HW_TIMER0_PWMTH0","HW_TIMER0_PWMTH1","HW_TIMER0_PWMTH2","HW_TIMER0_PWMTH3","HW_TIMER0_CTCR","HW_TIMER0_PWMC"
+group = "USART3", "HW_USART3_CTRL0", "HW_USART3_CTRL1",     "HW_USART3_CTRL2",     "HW_USART3_LINECTRL",  "HW_USART3_INTR",     "HW_USART3_DATA",  "HW_USART3_STAT",    "HW_USART3_DEBUG",     "HW_USART3_ILPR",      "HW_USART3_RS485CTRL", "HW_USART3_RS485ADRMATCH",  "HW_USART3_RS485DLY", "HW_USART3_AUTOBAUD", "HW_USART3_CTRL3",    "HW_USART3_ISO7816CTRL",   "HW_USART3_ISO7816ERRCNT",  "HW_USART3_ISO7816STAT"
+group = "GPIO","HW_GPIO_DATA0" ,"HW_GPIO_DATA1" ,"HW_GPIO_DATA2" ,"HW_GPIO_DATA3" ,"HW_GPIO_DIR0" ,"HW_GPIO_DIR1" ,"HW_GPIO_DIR2" ,"HW_GPIO_DIR3" ,"HW_GPIO_IS0" ,"HW_GPIO_IS1" ,"HW_GPIO_IS2" ,"HW_GPIO_IS3" ,"HW_GPIO_IBE0" ,"HW_GPIO_IBE1" ,"HW_GPIO_IBE2" ,"HW_GPIO_IBE3" ,"HW_GPIO_IEV0" ,"HW_GPIO_IEV1" ,"HW_GPIO_IEV2" ,"HW_GPIO_IEV3" ,"HW_GPIO_IE0" ,"HW_GPIO_IE1" ,"HW_GPIO_IE2" ,"HW_GPIO_IE3" ,"HW_GPIO_IRS0" ,"HW_GPIO_IRS1" ,"HW_GPIO_IRS2" ,"HW_GPIO_IRS3" ,"HW_GPIO_MIS0" ,"HW_GPIO_MIS1" ,"HW_GPIO_MIS2" ,"HW_GPIO_MIS3" ,"HW_GPIO_IC0" ,"HW_GPIO_IC1" ,"HW_GPIO_IC2" ,"HW_GPIO_IC3" ,"HW_GPIO_DATAMASK0" ,"HW_GPIO_DATAMASK1" ,"HW_GPIO_DATAMASK2" ,"HW_GPIO_DATAMASK3"

bsp/asm9260t/IAR_ASM9260T_DeviceSupportFile/arm/config/devices/AlphaScale/ASM9260T.i79

@@ -0,0 +1,43 @@
+[FILEFORMAT]
+rev=1.6
+
+[CHIP]
+//Chip name
+name=ASM9260T
+
+//What endian modes does the chip support? (le_be8_be32(default), le_be8, le_be32, le, be8_be32, be8, be32)
+endiansupport=le
+
+//Does the chip support the thumb instruction set? (true(default), false)
+thumbsupport=true
+
+//Does the chip support the arm instruction set? (true(default), false)
+armsupport=true
+
+//Does the chip have an FPU coprocessor?
+//(VFPv1,VFPv2,VFP9-S,None(default)
+fpu=None
+
+//Debugger interface, default JTAG=true, RTCK=true, SWD=true if Cortex cores, SWD=false if ARM cores, SWO_TraceD0=false
+JTAG=true
+RTCK=false
+SWD=false
+SWO_TraceD0=false
+
+[CORE]
+//Name of the ARM processor core
+name=ARM926EJ-S
+
+[DDF FILE]
+//Name of the ddf file
+name=AlphaScale\ASM9260T.ddf
+
+[LINKER FILE]
+//Name of the linker config file
+name=$TOOLKIT_DIR$\config\linker\AlphaScale\sam9260t\sam9260t_sdram.icf
+
+[FLASH LOADER]
+name=$TOOLKIT_DIR$\config\flashloader\
+
+
+

bsp/asm9260t/IAR_ASM9260T_DeviceSupportFile/arm/config/devices/AlphaScale/ASM9260T.menu

@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+<optionMenuItem>
+  <tag>ASM9260T</tag>
+  <display>AlphaScale ASM9260T</display>
+  <data>$CUR_DIR$\ASM9260T.i79</data>
+</optionMenuItem>
+

bsp/asm9260t/IAR_ASM9260T_DeviceSupportFile/arm/config/linker/AlphaScale/sam9260t/sam9260t_sdram.icf

@@ -0,0 +1,59 @@
+//------------------------------------------------------------------------------
+//      Linker scatter for running in external SDRAM on the ASM9260T
+//      By ArdaFu 2015-04-29
+//------------------------------------------------------------------------------
+
+//
+// Define a memory region that covers the entire 4 GB addressible space of the
+// processor.
+//
+define memory mem with size = 4G;
+
+//
+// Define a region for the on-chip flash. size = 2MB
+//
+define region FLASH = mem:[from 0x20000000 to 0x201FFFFF];
+
+//
+// Define a region for the on-chip SRAM. size = 30MB
+//
+define region SRAM  = mem:[from 0x20200000 to 0x21FFFFFF];
+
+//
+// Indicate that the read/write values should be initialized by copying from
+// flash.
+//
+initialize by copy { readwrite };
+
+//
+// Indicate that the noinit values should be left alone.  This includes the
+// stack, which if initialized will destroy the return address from the
+// initialization code, causing the processor to branch to zero and fault.
+//
+do not initialize { section .noinit };
+
+//
+// Place the interrupt vectors at the start of flash.
+//
+place at start of FLASH { readonly section .intvec };
+
+//
+// Place the remainder of the read-only items into flash.
+//
+place in FLASH { readonly };
+
+//
+// Place the RAM vector table at the start of SRAM.
+//
+place at start of SRAM { section VTABLE };
+
+//
+// Place all read/write items into SRAM.
+//
+place in SRAM { readwrite};
+//
+// RT-thread symbols
+//
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };

bsp/asm9260t/IAR_ASM9260T_DeviceSupportFile/readme

@@ -0,0 +1,7 @@
+How to use:
+(By ArdaFu 2015-04-29)
+
+1. Copy %arm% folder to &IAR EWARM% folder
+2. Restart your IDE.
+3. Select AlphaScale ASM9260T at project options-> General Options -> Target-> Device.
+4. Start debug :).

bsp/asm9260t/SConscript

@@ -0,0 +1,14 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+
+cwd = str(Dir('#'))
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/asm9260t/SConstruct

@@ -0,0 +1,38 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT)
+
+if GetDepend('RT_USING_WEBSERVER'):
+    objs = objs + SConscript(RTT_ROOT + '/components/net/webserver/SConscript', variant_dir='build/net/webserver', duplicate=0)
+
+if GetDepend('RT_USING_RTGUI'):
+    objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0)
+
+# libc testsuite 
+#objs = objs + SConscript(RTT_ROOT + '/examples/libc/SConscript', variant_dir='build/examples/libc', duplicate=0)
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/asm9260t/applications/SConscript

@@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'applications')
+src	= Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/asm9260t/applications/application.c

@@ -0,0 +1,76 @@
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author		Notes
+ * 2011-01-13     weety		 first version
+ * 2015-04-27     ArdaFu     Port bsp from at91sam9260 to asm9260t
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+void rt_init_thread_entry(void* parameter)
+{
+    /* Initialization RT-Thread Components */
+    rt_components_init();
+}
+
+#ifdef RT_USING_LED
+#include "led.h"
+
+void rt_led_thread_entry(void* parameter)
+{
+    rt_uint8_t cnt = 0;
+    led_init();
+    while(1)
+    {
+        /* light on leds for one second */
+        rt_thread_delay(40);
+        cnt++;
+        if(cnt & 0x01)
+            led_on(1);
+        else
+            led_off(1);
+    }
+}
+
+static void start_led_thread(void)
+{
+    rt_thread_t led_thread;
+    led_thread = rt_thread_create("led", rt_led_thread_entry, RT_NULL, 512,
+                                  (RT_THREAD_PRIORITY_MAX / 8 * 5), 20);
+    if(led_thread != RT_NULL)
+        rt_thread_startup(led_thread);
+}
+#endif
+
+int rt_application_init()
+{
+    rt_thread_t init_thread;
+    init_thread = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 2048,
+                                   (RT_THREAD_PRIORITY_MAX / 8 * 2), 20);
+    if(init_thread != RT_NULL)
+        rt_thread_startup(init_thread);
+
+#ifdef RT_USING_LED
+    start_led_thread();
+#endif
+    return 0;
+}

bsp/asm9260t/applications/startup.c

@@ -0,0 +1,90 @@
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety      first version
+ * 2015-04-21     ArdaFu     Using init componment module
+ * 2015-04-27     ArdaFu     Port bsp from at91sam9260 to asm9260t
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include "board.h"
+
+extern void rt_application_init(void);
+
+#if defined(__CC_ARM)
+extern int Image$$ER_ZI$$ZI$$Limit;
+#define HEAP_BEGIN (&Image$$ER_ZI$$ZI$$Limit)
+#elif(defined(__GNUC__))
+extern unsigned char __bss_end__;
+#define HEAP_BEGIN (&__bss_end__)
+#elif(defined(__ICCARM__))
+#pragma section = ".noinit"
+#define HEAP_BEGIN (__section_end(".noinit"))
+#endif
+
+#define HEAP_END (0x22000000)
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+static void rtthread_startup(void)
+{
+    /* initialize board */
+    rt_hw_board_init();
+
+    /* show version */
+    rt_show_version();
+
+#ifdef RT_USING_HEAP
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
+
+    /* initialize scheduler system */
+    rt_system_scheduler_init();
+    /* initialize system timer*/
+    rt_system_timer_init();
+    /* initialize application */
+    rt_application_init();
+
+    /* initialize timer thread */
+    rt_system_timer_thread_init();
+
+    /* initialize idle thread */
+    rt_thread_idle_init();
+
+    /* start scheduler */
+    rt_system_scheduler_start();
+
+    /* never reach here */
+    return;
+}
+
+int main(void)
+{
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
+
+    /* startup RT-Thread RTOS */
+    rtthread_startup();
+
+    return 0;
+}

bsp/asm9260t/drivers/SConscript

@@ -0,0 +1,21 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = os.path.join(str(Dir('#')), 'drivers')
+
+# add the general drvers.
+src = Split("""
+board.c
+usart.c
+""")
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_LED'):
+    src += ['led.c']
+
+CPPPATH = [cwd]
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/asm9260t/drivers/board.c

@@ -0,0 +1,90 @@
+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety      first version
+ * 2015-05-02     ArdaFu     Port from AT91SAM9260 BSP
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+#include <timer0.h>
+#include "board.h"
+#include <mmu.h>
+#include "interrupt.h"
+
+extern void rt_hw_interrupt_init(void);
+extern void rt_hw_clock_init(void);
+extern void rt_hw_uart_init(void);
+
+static struct mem_desc hw_mem_desc[] =
+{
+    { 0x00000000, 0xFFFFFFFF, 0x00000000, RW_NCNB },/* None cached for 4G memory */
+//  visual start, visual end, phy start , props
+    { 0x00000000, 0x000FFFFF, 0x20000000, RW_CB },  /* ISR Vector table */
+    { 0x00200000, 0x00001FFF, 0x40000000, RW_CB },  /* 8K cached SRAM 0/1 */
+    { 0x20000000, 0x21FFFFFF, 0x20000000, RW_CB },  /* 32M cached SDRAM */
+    { 0x90000000, 0x90001FFF, 0x40000000, RW_NCNB },/* 4K SRAM0 + 4k SRAM1 */
+    { 0xA0000000, 0xA1FFFFFF, 0x20000000, RW_NCNB },/* 32M none-cached SDRAM */
+};
+
+/**
+ * This function will handle rtos timer
+ */
+static void rt_systick_handler(int vector, void *param)
+{
+    uint32_t ir = inl(HW_TIMER0_IR);
+    if (ir & 1UL)
+        rt_tick_increase();
+    outl(ir, REG_SET(HW_TIMER0_IR));
+}
+
+/**
+ * This function will init pit for system ticks
+ */
+static void rt_hw_timer_init()
+{
+    hw_timer0_init();
+    /* install interrupt handler */
+    rt_hw_interrupt_install(INT_TIMER0, rt_systick_handler, RT_NULL, "SysTick");
+    rt_hw_interrupt_umask(INT_TIMER0);
+
+}
+
+/**
+ * This function will init at91sam9260 board
+ */
+void rt_hw_board_init(void)
+{
+    /* initialize mmu */
+    rt_hw_mmu_init(hw_mem_desc, sizeof(hw_mem_desc)/sizeof(hw_mem_desc[0]));
+    /* initialize hardware interrupt */
+    rt_hw_interrupt_init();
+
+    /* initialize the system clock */
+    //rt_hw_clock_init(); //set each pll etc.
+
+    /* initialize uart */
+    rt_hw_uart_init();
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+
+    /* initialize timer0 */
+    rt_hw_timer_init();
+}

bsp/asm9260t/drivers/board.h

@@ -0,0 +1,32 @@
+/*
+ * File      : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety      add board.h to this bsp
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <asm9260t.h>
+
+void rt_hw_board_init(void);
+
+#endif

bsp/asm9260t/drivers/led.c

@@ -0,0 +1,47 @@
+/*
+ * File      : led.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2015, RT-Thread Develop Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+
+#include <rtthread.h>
+#include <board.h>
+#include "led.h"
+#include "gpio.h"
+
+//ASM9260T EVK pin 16-7 LED0, 0: ON, 1 : OFF
+void led_init(void)
+{
+     // enable IOCONFIG GPIO
+    outl(((1UL<<25) | (1UL<<4)) , REG_SET(HW_AHBCLKCTRL0));
+    HW_SetPinMux(16,7,0);
+    HW_GpioSetDir(16,7,1);
+}
+
+void led_on(int num)
+{
+    HW_GpioClrVal(16, 7 );
+}
+
+void led_off(int num)
+{
+    HW_GpioSetVal(16, 7 );
+}

bsp/asm9260t/drivers/led.h

@@ -0,0 +1,32 @@
+/*
+ * File      : led.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety       first version
+ */
+
+#ifndef __LED_H__
+#define __LED_H__
+
+void led_init(void);
+void led_on(int num);
+void led_off(int num);
+
+#endif

bsp/asm9260t/drivers/usart.c

@@ -0,0 +1,247 @@
+/*
+ * File      : usart.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety       first version
+ * 2013-07-21     weety       using serial component
+ * 2015-05-02     ArdaFu      Port from AT91SAM9260 BSP
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+#include <rtdevice.h>
+#include "interrupt.h"
+#include <asm9260t.h>
+#include "gpio.h"
+
+#include "uart.h"
+
+typedef struct
+{
+    HW_USART_TypeDef *port;
+    int irq;
+} asm_uart_t;
+
+
+/**
+ * This function will handle serial
+ */
+void rt_asm_usart_handler(int vector, void *param)
+{
+    rt_uint32_t status;
+    asm_uart_t *uart;
+    rt_device_t dev = (rt_device_t)param;
+    uart = (asm_uart_t *)dev->user_data;
+    status = uart->port->INTR[R_VAL];
+
+    if(!(status & (ASM_UART_INTR_RXIS | ASM_UART_INTR_RTIS)))
+        return;
+    uart->port->INTR[R_CLR] = ASM_UART_INTR_RXIS|ASM_UART_INTR_RTIS;
+    //rt_interrupt_enter();
+    rt_hw_serial_isr((struct rt_serial_device *)dev, RT_SERIAL_EVENT_RX_IND);
+    //rt_interrupt_leave();
+
+}
+
+
+/**
+* UART device in RT-Thread
+*/
+static rt_err_t asm_usart_configure(struct rt_serial_device *serial,
+                                    struct serial_configure *cfg)
+{
+    asm_uart_t *uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(cfg != RT_NULL);
+    uart = (asm_uart_t *)serial->parent.user_data;
+    
+    Hw_UartDisable(uart->port);
+
+    Hw_UartReset(uart->port);
+    
+    Hw_UartConfig(uart->port, cfg->baud_rate, cfg->data_bits, 
+                  cfg->stop_bits, cfg->parity);
+
+    Hw_UartEnable(uart->port);
+
+    return RT_EOK;
+}
+
+static rt_err_t asm_usart_control(struct rt_serial_device *serial,
+                                  int cmd, void *arg)
+{
+    asm_uart_t* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (asm_uart_t *)serial->parent.user_data;
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_CLR_INT:
+        /* disable rx irq */
+        rt_hw_interrupt_mask(uart->irq);
+        break;
+    case RT_DEVICE_CTRL_SET_INT:
+        /* enable rx irq */
+        rt_hw_interrupt_umask(uart->irq);
+        break;
+    }
+
+    return RT_EOK;
+}
+
+
+static int asm_usart_putc(struct rt_serial_device *serial, char c)
+{
+    //rt_uint32_t level;
+    asm_uart_t *uart = serial->parent.user_data;
+
+    while ((uart->port->STAT[R_VAL] & ASM_UART_STAT_TXFF));
+    uart->port->DATA[R_VAL] = c;
+
+    return 1;
+}
+
+static int asm_usart_getc(struct rt_serial_device *serial)
+{
+    asm_uart_t *uart = serial->parent.user_data;
+
+    if (uart->port->STAT[R_VAL] & ASM_UART_STAT_RXFE)
+        return -1;
+    return  uart->port->DATA[R_VAL] & 0xff;
+}
+
+static const struct rt_uart_ops asm_usart_ops =
+{
+    asm_usart_configure,
+    asm_usart_control,
+    asm_usart_putc,
+    asm_usart_getc,
+};
+
+
+#if defined(RT_USING_UART0)
+static struct rt_serial_device serial0;
+asm_uart_t uart0 =
+{
+    USART0,
+    INT_UART0
+};
+#endif
+
+#if defined(RT_USING_UART3)
+static struct rt_serial_device serial3;
+asm_uart_t uart3 =
+{
+    USART3,
+    INT_UART3
+};
+#endif
+
+#if defined(RT_USING_UART4)
+static struct rt_serial_device serial4;
+asm_uart_t uart4 =
+{
+    USART4,
+    INT_UART4
+};
+#endif
+
+//USART0 PINS TX=GP14_0:5 , RX=GP14_1:5
+//USART3 PINS TX=GP8_6:2 , RX=GP8_7:2
+//USART4 PINS TX=GP3_0:2 , RX=GP3_1:2
+
+void asm_usart_gpio_init(void)
+{
+    // enable IOCONFIG GPIO
+    outl(((1UL<<25) | (1UL<<4)) ,REG_SET(HW_AHBCLKCTRL0));
+#ifdef RT_USING_UART0
+    HW_SetPinMux(14, 0, 5);
+    HW_SetPinMux(14, 1, 5);
+#endif
+
+#ifdef RT_USING_UART3
+    HW_SetPinMux(8, 6, 2);
+    HW_SetPinMux(8, 7, 2);
+#endif
+
+#ifdef RT_USING_UART4
+    HW_SetPinMux(3, 0, 2);
+    HW_SetPinMux(3, 1, 2);
+#endif
+}
+
+void asm_serial_config_set_default(struct rt_serial_device* serial)
+{
+    serial->ops = &asm_usart_ops;
+
+    serial->config.baud_rate = BAUD_RATE_115200;
+    serial->config.bit_order = BIT_ORDER_LSB;
+    serial->config.data_bits = DATA_BITS_8;
+    serial->config.parity    = PARITY_NONE;
+    serial->config.stop_bits = STOP_BITS_1;
+    serial->config.invert    = NRZ_NORMAL;
+    serial->config.bufsz     = RT_SERIAL_RB_BUFSZ;
+}
+#define DRV_REG_OPS (RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM)
+/**
+ * This function will handle init uart
+ */
+int rt_hw_uart_init(void)
+{
+    asm_usart_gpio_init();
+
+#if defined(RT_USING_UART0)
+    Hw_UartInit(0);
+    asm_serial_config_set_default(&serial0);
+
+    /* register uart device */
+    rt_hw_serial_register(&serial0, "uart0", DRV_REG_OPS, &uart0);
+    rt_hw_interrupt_install(uart0.irq, rt_asm_usart_handler,
+                            (void *)&(serial0.parent), "UART0");
+    rt_hw_interrupt_umask(uart0.irq);
+#endif
+
+#if defined(RT_USING_UART3)
+    Hw_UartInit(3);
+    asm_serial_config_set_default(&serial3);
+
+    /* register uart device */
+    rt_hw_serial_register(&serial3, "uart3",  DRV_REG_OPS, &uart3);
+    rt_hw_interrupt_install(uart3.irq, rt_asm_usart_handler,
+                            (void *)&(serial3.parent), "UART3");
+    rt_hw_interrupt_umask(uart3.irq);
+#endif
+
+#if defined(RT_USING_UART4)
+    Hw_UartInit(4);
+    asm_serial_config_set_default(&serial4);
+
+    /* register uart device */
+    rt_hw_serial_register(&serial4, "uart4", DRV_REG_OPS, &uart4);
+    rt_hw_interrupt_install(uart4.irq, rt_asm_usart_handler,
+                            (void *)&(serial4.parent), "UART4");
+    rt_hw_interrupt_umask(uart4.irq);
+#endif
+
+    return 0;
+}
+INIT_BOARD_EXPORT(rt_hw_uart_init);

bsp/asm9260t/jlink/asm9260t.gdb

@@ -0,0 +1,71 @@
+#------------------------------------------------
+# SDRAM initialization script for the ASM9260T
+#------------------------------------------------
+
+define __setup_PLL
+	echo "Enabling PLL for CPU" \n
+	
+	# outl(1<<2, REG_SET(HW_AHBCLKCTRL0));
+	set *0x80040024 = 0x00000004
+	# outl(1<<8, REG_SET(HW_AHBCLKCTRL1));
+	set *0x80040034 = 0x00000100
+	# outl(3<<9, REG_SET(HW_AHBCLKCTRL0));
+	set *0x80040024 = 0x00000600
+	# outl(inl(HW_PDRUNCFG)&0xFFFFFFFA, HW_PDRUNCFG);
+	set *0x80040238 = 0x00000770
+	# outl(2, HW_CPUCLKDIV);
+	set *0x8004017C = 0x00000002
+	# outl(2, HW_SYSAHBCLKDIV);
+	set *0x80040180 = 0x00000002
+	# outl(480, HW_SYSPLLCTRL);
+	set *0x80040100 = 0x000001E0
+	# __delay(50)
+	set $i = 0
+	while $i != 500
+		set $i += 1
+	end
+	# outl(1, HW_MAINCLKSEL);
+	set *0x80040120 = 0x00000001
+	# outl(0, HW_MAINCLKUEN);
+	set *0x80040124 = 0x00000000
+	# outl(1, HW_MAINCLKUEN);
+	set *0x80040124 = 0x00000001
+end
+
+define __setup_SDRAM
+  echo "Enabling on-chip SDRAM" \n
+
+  # outl((1<<6), REG_SET(HW_AHBCLKCTRL0));
+  set *0x80040024 = 0x00000040
+  # outl(0x00001188, HW_EMI_SCONR);
+  set *0x80700000 = 0x00001188
+  # outl(0x000a0500, HW_EMI_CTRL);
+  set *0x8004034c = 0x000a0500
+  # outl(0x20000000, HW_EMI_SCSLR2_LOW);
+  set *0x8070001c = 0x20000000
+  # outl(0x0000000c, HW_EMI_SMSKR2);
+  set *0x8070005c = 0x0000000c
+  # outl(0x024996d9, HW_EMI_STMG0R);
+  set *0x80700004 = 0x024996d9
+  # outl(0x00542b4f, HW_EMI_SMTMGR_SET0);
+  set *0x80700094 = 0x00542b4f
+  # outl(0x00003288, HW_EMI_SCTLR);
+  set *0x8070000c = 0x00003288
+end
+
+# Step1: Connect to the J-Link gdb server
+define reset
+	#target remote localhost:2331
+	monitor reset
+
+	# Step2: Reset peripheral  (RSTC_CR)
+	echo "------- Prepare for debug ASM9260T -------" \n
+	__setup_PLL
+	__setup_SDRAM
+
+	# Step3: Load file(eg. getting-started project)
+	load
+
+	mon reg pc=0x20000000
+	#info reg
+end

bsp/asm9260t/jlink/asm9260t.ini

@@ -0,0 +1,61 @@
+//------------------------------------------------
+// SDRAM initialization script for the ASM9260T
+//------------------------------------------------
+
+FUNC void __setup_PLL()
+{
+	printf( "Enabling PLL for CPU\n");
+
+	// outl(1<<2, REG_SET(HW_AHBCLKCTRL0));
+	_WDWORD(0x80040024, 0x00000004);
+	// outl(1<<8, REG_SET(HW_AHBCLKCTRL1));
+	_WDWORD(0x80040034, 0x00000100);
+	// outl(3<<9, REG_SET(HW_AHBCLKCTRL0));
+	_WDWORD(0x80040024, 0x00000600);
+	// outl(inl(HW_PDRUNCFG)&0xFFFFFFFA, HW_PDRUNCFG);
+	_WDWORD(0x80040238, 0x00000770);
+	// outl(2, HW_CPUCLKDIV);
+	_WDWORD(0x8004017C, 0x00000002);
+	// outl(2, HW_SYSAHBCLKDIV);
+	_WDWORD(0x80040180, 0x00000002);
+	// outl(480, HW_SYSPLLCTRL);
+	_WDWORD(0x80040100, 0x000001E0);
+	_sleep_(500);
+	// outl(1, HW_MAINCLKSEL);
+	_WDWORD(0x80040120, 0x00000001);
+	// outl(0, HW_MAINCLKUEN);
+	_WDWORD(0x80040124, 0x00000000);
+	// outl(1, HW_MAINCLKUEN);
+	_WDWORD(0x80040124, 0x00000001);
+}
+
+
+FUNC void __setup_SDRAM()
+{
+	printf( "Enabling on-chip SDRAM\n");
+
+	// outl((1<<6), REG_SET(HW_AHBCLKCTRL0));
+	_WDWORD(0x80040024, 0x00000040);
+	// outl(0x00001188, HW_EMI_SCONR);
+	_WDWORD(0x80700000, 0x00001188);
+	// outl(0x000a0500, HW_EMI_CTRL);
+	_WDWORD(0x8004034c, 0x000a0500);
+	// outl(0x20000000, HW_EMI_SCSLR2_LOW);
+	_WDWORD(0x8070001c, 0x20000000);
+	// outl(0x0000000c, HW_EMI_SMSKR2);
+	_WDWORD(0x8070005c, 0x0000000c);
+	// outl(0x024996d9, HW_EMI_STMG0R);
+	_WDWORD(0x80700004, 0x024996d9);
+	// outl(0x00542b4f, HW_EMI_SMTMGR_SET0);
+	_WDWORD(0x80700094, 0x00542b4f);
+	// outl(0x00003288, HW_EMI_SCTLR);
+	_WDWORD(0x8070000c, 0x00003288);
+}
+
+printf( "------- Prepare for debug ASM9260T -------");
+__setup_PLL();
+__setup_SDRAM();
+DEBUG_CLOCK = 2000000;
+LOAD Objects\\template.axf INCREMENTAL
+PC = 0x20000000;
+g,main

bsp/asm9260t/jlink/asm9260t.mac

@@ -0,0 +1,59 @@
+//------------------------------------------------
+// SDRAM initialization script for the ASM9260T
+//------------------------------------------------
+
+__setup_PLL()
+{
+	__message "Enabling PLL for CPU\n";
+
+	// outl(1<<2, REG_SET(HW_AHBCLKCTRL0));
+	__writeMemory32(0x00000004, 0x80040024, "Memory");
+	// outl(1<<8, REG_SET(HW_AHBCLKCTRL1));
+	__writeMemory32(0x00000100, 0x80040034, "Memory");
+	// outl(3<<9, REG_SET(HW_AHBCLKCTRL0));
+	__writeMemory32(0x00000600, 0x80040024, "Memory");
+	// outl(inl(HW_PDRUNCFG)&0xFFFFFFFA, HW_PDRUNCFG);
+	__writeMemory32(0x00000770, 0x80040238, "Memory");
+	// outl(2, HW_CPUCLKDIV);
+	__writeMemory32(0x00000002, 0x8004017C, "Memory");
+	// outl(2, HW_SYSAHBCLKDIV);
+	__writeMemory32(0x00000002, 0x80040180, "Memory");
+	// outl(480, HW_SYSPLLCTRL);
+	__writeMemory32(0x000001E0, 0x80040100, "Memory");
+	__delay(50);
+	// outl(1, HW_MAINCLKSEL);
+	__writeMemory32(0x00000001, 0x80040120, "Memory");
+	// outl(0, HW_MAINCLKUEN);
+	__writeMemory32(0x00000000, 0x80040124, "Memory");
+	// outl(1, HW_MAINCLKUEN);
+	__writeMemory32(0x00000001, 0x80040124, "Memory");
+}
+
+__setup_SDRAM()
+{
+	__message "Enabling on-chip SDRAM\n";
+
+	// outl((1<<6), REG_SET(HW_AHBCLKCTRL0));
+	__writeMemory32(0x00000040, 0x80040024, "Memory");
+	// outl(0x00001188, HW_EMI_SCONR);
+	__writeMemory32(0x00001188, 0x80700000, "Memory");
+	// outl(0x000a0500, HW_EMI_CTRL);
+	__writeMemory32(0x000a0500, 0x8004034c, "Memory");
+	// outl(0x20000000, HW_EMI_SCSLR2_LOW);
+	__writeMemory32(0x20000000, 0x8070001c, "Memory");
+	// outl(0x0000000c, HW_EMI_SMSKR2);
+	__writeMemory32(0x0000000c, 0x8070005c, "Memory");
+	// outl(0x024996d9, HW_EMI_STMG0R);
+	__writeMemory32(0x024996d9, 0x80700004, "Memory");
+	// outl(0x00542b4f, HW_EMI_SMTMGR_SET0);
+	__writeMemory32(0x00542b4f, 0x80700094, "Memory");
+	// outl(0x00003288, HW_EMI_SCTLR);
+	__writeMemory32(0x00003288, 0x8070000c, "Memory");
+}
+
+execUserPreload()
+{   
+	__message "------- Prepare for debug ASM9260T -------";
+	__setup_PLL();
+	__setup_SDRAM();
+}

bsp/asm9260t/link_scripts/sdram.icf

@@ -0,0 +1,55 @@
+//------------------------------------------------------------------------------
+//      Linker scatter for running in external SDRAM on the AT91SAM9260
+//------------------------------------------------------------------------------
+
+//
+// Define a memory region that covers the entire 4 GB addressible space of the
+// processor.
+//
+define memory mem with size = 4G;
+
+//
+// Define a region for the on-chip flash. size = 2MB
+//
+define region FLASH = mem:[from 0x20000000 to 0x201FFFFF];
+
+//
+// Define a region for the on-chip SRAM. size = 30MB
+//
+define region SRAM  = mem:[from 0x20200000 to 0x21FFFFFF];
+
+//
+// Indicate that the read/write values should be initialized by copying from
+// flash.
+//
+initialize by copy { readwrite };
+
+//
+// Indicate that the noinit values should be left alone.  This includes the
+// stack, which if initialized will destroy the return address from the
+// initialization code, causing the processor to branch to zero and fault.
+//
+do not initialize { section .noinit };
+
+//
+// Place the interrupt vectors at the start of flash.
+//
+place at start of FLASH { readonly section .intvec };
+
+//
+// Place the remainder of the read-only items into flash.
+//
+place in FLASH { readonly };
+
+//
+// Place the RAM vector table at the start of SRAM.
+//
+place at start of SRAM { section VTABLE };
+
+//
+// Place all read/write items into SRAM.
+//
+place in SRAM { readwrite};
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };

bsp/asm9260t/link_scripts/sdram.ld

@@ -0,0 +1,90 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(entry)
+SECTIONS
+{
+    . = 0x20000000;
+
+    . = ALIGN(4);
+    .text : 
+    {
+        *(.init)
+        *(.text)
+        *(.gnu.linkonce.t*)
+        
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);   
+
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(4);
+
+        /* section information for modules */
+        . = ALIGN(4);
+        __rtmsymtab_start = .;
+        KEEP(*(RTMSymTab))
+        __rtmsymtab_end = .;
+    }
+
+    . = ALIGN(4);
+    .rodata : { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) *(.eh_frame) }
+
+    . = ALIGN(4);
+    .ctors :
+    {
+        PROVIDE(__ctors_start__ = .);
+        KEEP(*(SORT(.ctors.*)))
+        KEEP(*(.ctors))
+        PROVIDE(__ctors_end__ = .);
+    }
+
+    .dtors :
+    {
+        PROVIDE(__dtors_start__ = .);
+        KEEP(*(SORT(.dtors.*)))
+        KEEP(*(.dtors))
+        PROVIDE(__dtors_end__ = .);
+    }
+
+    . = ALIGN(4);
+    .data :
+    {
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+    }
+
+    . = ALIGN(4);
+    .nobss : { *(.nobss) }
+    
+    . = ALIGN(4);
+    __bss_start__ = .;
+    .bss : { *(.bss)}
+    __bss_end__ = .;
+
+    /* stabs debugging sections. */
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+
+    _end = .;
+}

bsp/asm9260t/link_scripts/sdram.scat

@@ -0,0 +1,27 @@
+;*------------------------------------------------------------------------------
+;*      Linker scatter for running in external SDRAM on the ASM9260T
+;*----------------------------------------------------------------------------*/
+
+Load_region 0x20000000 0x00200000
+{
+
+    Fixed_region 0x20000000
+    {
+        * (RESET +First)
+       .ANY (+RO +RW)
+    }
+
+    ARM_LIB_HEAP +0 EMPTY 0x1000
+    {
+    }
+
+    ARM_LIB_STACK +0 EMPTY 0x1000
+    {
+    }
+
+    ; Application ZI data (.bss)
+    ER_ZI +0
+    {
+        * (+ZI)
+    }
+}

bsp/asm9260t/platform/SConscript

@@ -0,0 +1,12 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd  = GetCurrentDir()
+CPPPATH = [cwd]
+
+# The set of source files associated with this SConscript file.
+src = Glob('*.c')
+
+group = DefineGroup('platform', src, depend = [''], CPPPATH = CPPPATH)
+Return('group')

bsp/asm9260t/platform/asm9260t.h

@@ -0,0 +1,670 @@
+#ifndef __ASM9260T_REGS_H__
+#define __ASM9260T_REGS_H__
+////////////////////////////////////////////////////////////////////////////////
+
+typedef volatile unsigned char *VP8;
+typedef volatile unsigned short *VP16;
+typedef volatile unsigned long *VP32;
+
+#define __I  volatile const   /*!< Defines 'read only' permissions    */
+#define __O  volatile         /*!< Defines 'write only' permissions   */
+#define __IO volatile         /*!< Defines 'read / write' permissions */
+
+#define outb(v, r)      do{*((VP8)(r))=(v);}while(0)
+#define outw(v, r)      do{*((VP16)(r))=(v);}while(0)
+#define outl(v, r)      do{*((VP32)(r))=(v);}while(0)
+
+#define inb(r)          (*((VP8)(r)))
+#define inw(r)          (*((VP16)(r)))
+#define inl(r)          (*((VP32)(r)))
+
+#define REG_VAL(r)      (((unsigned long)(r))+0x00)
+#define REG_SET(r)      (((unsigned long)(r))+0x04)
+#define REG_CLR(r)      (((unsigned long)(r))+0x08)
+#define REG_TOG(r)      (((unsigned long)(r))+0x0C)
+
+////////////////////////////////////////////////////////////////////////////////
+// SYSTEM CONFIG
+#define HW_PRESETCTRL0        0x80040000
+#define HW_PRESETCTRL1        0x80040010
+#define HW_AHBCLKCTRL0        0x80040020
+#define HW_AHBCLKCTRL1        0x80040030
+#define HW_SYSTCKCAL          0x80040040
+#define HW_SYSPLLCTRL         0x80040100
+#define HW_SYSPLLSTAT         0x80040104
+#define HW_SYSRSTSTAT         0x80040110
+#define HW_MAINCLKSEL         0x80040120
+#define HW_MAINCLKUEN         0x80040124
+#define HW_UARTCLKSEL         0x80040128
+#define HW_UARTCLKUEN         0x8004012C
+#define HW_I2S0CLKSEL         0x80040130
+#define HW_I2S0CLKUEN         0x80040134
+#define HW_I2S1CLKSEL         0x80040138
+#define HW_I2S1CLKUEN         0x8004013C
+#define HW_USBCLKSEL          0x80040140
+#define HW_USBCLKUEN          0x80040144
+#define HW_WDTCLKSEL          0x80040160
+#define HW_WDTCLKUEN          0x80040164
+#define HW_OUTCLKSEL          0x80040170
+#define HW_OUTCLKUEN          0x80040174
+#define HW_CPUCLKDIV          0x8004017C
+#define HW_SYSAHBCLKDIV       0x80040180
+#define HW_I2S1_MCLKDIV       0x80040188
+#define HW_I2S1_SCLKDIV       0x8004018C
+#define HW_I2S0_MCLKDIV       0x80040190
+#define HW_I2S0_SCLKDIV       0x80040194
+#define HW_UART0CLKDIV        0x80040198
+#define HW_UART1CLKDIV        0x8004019C
+#define HW_UART2CLKDIV        0x800401A0
+#define HW_UART3CLKDIV        0x800401A4
+#define HW_UART4CLKDIV        0x800401A8
+#define HW_UART5CLKDIV        0x800401AC
+#define HW_UART6CLKDIV        0x800401B0
+#define HW_UART7CLKDIV        0x800401B4
+#define HW_UART8CLKDIV        0x800401B8
+#define HW_UART9CLKDIV        0x800401BC
+#define HW_SPI0CLKDIV         0x800401C0
+#define HW_SPI1CLKDIV         0x800401C4
+#define HW_QUADSPI0CLKDIV     0x800401C8
+#define HW_SSP0CLKDIV         0x800401D0
+#define HW_NANDCLKDIV         0x800401D4
+#define HW_TRACECLKDIV        0x800401E0
+#define HW_CAMMCLKDIV         0x800401E8
+#define HW_WDTCLKDIV          0x800401EC
+#define HW_USBCLKDIV          0x800401F0
+#define HW_OUTCLKDIV          0x800401F4
+#define HW_MACCLKDIV          0x800401F8
+#define HW_LCDCLKDIV          0x800401FC
+#define HW_ADCCLKDIV          0x80040200
+#define HW_PDRUNCFG           0x80040238
+#define HW_MATRIXPRI0         0x80040300
+#define HW_MATRIXPRI1         0x80040304
+#define HW_MATRIXPRI2         0x80040308
+#define HW_MATRIXPRI3         0x8004030C
+#define HW_MATRIXPRI4         0x80040310
+#define HW_MATRIXPRI5         0x80040314
+#define HW_MATRIXPRI6         0x80040318
+#define HW_MATRIXPRI7         0x8004031C
+#define HW_MATRIXPRI8         0x80040320
+#define HW_MATRIXPRI9         0x80040324
+#define HW_MATRIXPRI10        0x80040328
+#define HW_MATRIXPRI11        0x8004032C
+#define HW_MATRIXPRI12        0x80040330
+#define HW_MATRIXPRI13        0x80040334
+#define HW_MATRIXPRI14        0x80040338
+#define HW_MATRIXPRI15        0x8004033C
+#define HW_EMI_CTRL           0x8004034C
+#define HW_RISC_CTRL          0x80040350
+#define HW_DMA_CTRL           0x80040354
+#define HW_MACPHY_SEL         0x80040360
+#define HW_USB_CTRL           0x80040368
+#define HW_ANA_CTRL           0x80040370
+#define HW_USB0_TEST          0x80040380
+#define HW_USB1_TEST          0x80040390
+#define HW_USB0_RSTPARA       0x800403A0
+#define HW_USB1_RSTPARA       0x800403B0
+#define HW_DEVICEID           0x80040400
+#define HW_PCON_ADDR          0x80040500
+
+////////////////////////////////////////////////////////////////////////////////
+// EMI
+#define HW_EMI_SCONR          0x80700000    
+#define HW_EMI_STMG0R         0x80700004
+#define HW_EMI_STMG1R         0x80700008
+#define HW_EMI_SCTLR          0x8070000C
+#define HW_EMI_SREFR          0x80700010
+#define HW_EMI_SCSLR0_LOW     0x80700014
+#define HW_EMI_SCSLR1_LOW     0x80700018
+#define HW_EMI_SCSLR2_LOW     0x8070001c
+#define HW_EMI_SCSLR3_LOW     0x80700020
+#define HW_EMI_SCSLR4_LOW     0x80700024
+#define HW_EMI_SCSLR5_LOW     0x80700028
+#define HW_EMI_SCSLR6_LOW     0x8070002c
+#define HW_EMI_SCSLR7_LOW     0x80700030
+
+#define HW_EMI_SMSKR0         0x80700054
+#define HW_EMI_SMSKR1         0x80700058
+#define HW_EMI_SMSKR2         0x8070005c
+#define HW_EMI_SMSKR3         0x80700060
+#define HW_EMI_SMSKR4         0x80700064
+#define HW_EMI_SMSKR5         0x80700068
+#define HW_EMI_SMSKR6         0x8070006c
+#define HW_EMI_SMSKR7         0x80700070
+
+#define HW_EMI_CSALIAS0_LOW   0x80700074
+#define HW_EMI_CSALIAS1_LOW   0x80700078
+
+#define HW_EMI_CSREMAP0_LOW   0x80700084
+#define HW_EMI_CSREMAP1_LOW   0x80700088
+
+#define HW_EMI_SMTMGR_SET0    0x80700094
+#define HW_EMI_SMTMGR_SET1    0x80700098
+#define HW_EMI_SMTMGR_SET2    0x8070009c
+
+#define HW_EMI_FLASH_TRPDR    0x807000a0
+#define HW_EMI_SMCTLR         0x807000a4
+#define HW_EMI_EXN_MODE_REG   0x807000ac
+
+////////////////////////////////////////////////////////////////////////////////
+// IOCON
+#define HW_IOCON_PIO_BASE     0x80044000
+#define HW_IOCON_SCKLOC       0x800442c0
+#define HW_IOCON(port,pin)    (HW_IOCON_PIO_BASE|(((port)<<5)|((pin)<<2)))
+
+////////////////////////////////////////////////////////////////////////////////
+// GPIO
+#define HW_GPIO_DATA_BASE     0x50000000
+
+#define HW_GPIO_DMA_CTRL      0x50000010
+#define HW_GPIO_DMA_DATA      0x50000020
+#define HW_GPIO_DMA_PADCTRL0  0x50000030
+#define HW_GPIO_DMA_PADCTRL1  0x50000040
+#define HW_GPIO_DMA_PADCTRL2  0x50000050
+#define HW_GPIO_DMA_PADCTRL3  0x50000060
+#define HW_GPIO_DMA_CTRL1     0x50000070
+#define HW_GPIO_DMA_CTRL2     0x50000080
+#define HW_GPIO_DMA_CTRL3     0x50000090
+#define HW_GPIO_DMA_CTRL4     0x500000a0
+
+#define HW_GPIO_DATA0         0x50000000
+#define HW_GPIO_DATA1         0x50010000
+#define HW_GPIO_DATA2         0x50020000
+#define HW_GPIO_DATA3         0x50030000
+#define HW_GPIO_DATA4         0x50040000
+
+#define HW_GPIO_DIR0          0x50008000
+#define HW_GPIO_DIR1          0x50018000
+#define HW_GPIO_DIR2          0x50028000
+#define HW_GPIO_DIR3          0x50038000
+#define HW_GPIO_DIR4          0x50048000
+
+#define HW_GPIO_IS0           0x50008010
+#define HW_GPIO_IS1           0x50018010
+#define HW_GPIO_IS2           0x50028010
+#define HW_GPIO_IS3           0x50038010
+#define HW_GPIO_IS4           0x50048010
+
+#define HW_GPIO_IBE0          0x50008020
+#define HW_GPIO_IBE1          0x50018020
+#define HW_GPIO_IBE2          0x50028020
+#define HW_GPIO_IBE3          0x50038020
+#define HW_GPIO_IBE4          0x50048020
+
+#define HW_GPIO_IEV0          0x50008030
+#define HW_GPIO_IEV1          0x50018030
+#define HW_GPIO_IEV2          0x50028030
+#define HW_GPIO_IEV3          0x50038030
+#define HW_GPIO_IEV4          0x50048030
+
+#define HW_GPIO_IE0           0x50008040
+#define HW_GPIO_IE1           0x50018040
+#define HW_GPIO_IE2           0x50028040
+#define HW_GPIO_IE3           0x50038040
+#define HW_GPIO_IE4           0x50048040
+
+#define HW_GPIO_RIS0          0x50008050
+#define HW_GPIO_RIS1          0x50018050
+#define HW_GPIO_RIS2          0x50028050
+#define HW_GPIO_RIS3          0x50038050
+#define HW_GPIO_RIS4          0x50048050
+
+#define HW_GPIO_MIS0          0x50008060
+#define HW_GPIO_MIS1          0x50018060
+#define HW_GPIO_MIS2          0x50028060
+#define HW_GPIO_MIS3          0x50038060
+#define HW_GPIO_MIS4          0x50048060
+
+#define HW_GPIO_IC0           0x50008070
+#define HW_GPIO_IC1           0x50018070
+#define HW_GPIO_IC2           0x50028070
+#define HW_GPIO_IC3           0x50038070
+#define HW_GPIO_IC4           0x50048070 
+
+#define HW_GPIO_DATAMASK0     0x50008080
+#define HW_GPIO_DATAMASK1     0x50018080
+#define HW_GPIO_DATAMASK2     0x50028080
+#define HW_GPIO_DATAMASK3     0x50038080
+#define HW_GPIO_DATAMASK4     0x50048080 
+
+////////////////////////////////////////////////////////////////////////////////
+// Quad-SPI0
+#define QSPI0_BASE_ADDRESS    0x80068000
+#define HW_QSPI0_CTRL0        0x80068000
+#define HW_QSPI0_CTRL1        0x80068010
+#define HW_QSPI0_CMD          0x80068020
+#define HW_QSPI0_TIMING       0x80068030
+#define HW_QSPI0_DATA         0x80068040
+#define HW_QSPI0_STATUS       0x80068050
+#define HW_QSPI0_DEBUG0       0x80068060
+#define HW_QSPI0_XFER         0x80068070
+
+/////////////////////////////////////////////////////////
+//DMA0
+#define HW_DMA0_SAR0           0x80100000
+#define HW_DMA0_DAR0           0x80100008
+#define HW_DMA0_LLP0           0x80100010
+#define HW_DMA0_CTL0           0x80100018
+#define HW_DMA0_SSTAT0         0x80100020
+#define HW_DMA0_DSTAT0         0x80100028
+#define HW_DMA0_SSTATAR0       0x80100030      
+#define HW_DMA0_DSTATAR0       0x80100038 
+#define HW_DMA0_CFG0           0x80100040
+#define HW_DMA0_SGR0           0x80100048
+#define HW_DMA0_DSR0           0x80100050
+
+#define HW_DMA0_SAR1           0x80100058
+#define HW_DMA0_DAR1           0x80100060
+#define HW_DMA0_LLP1           0x80100068
+#define HW_DMA0_CTL1           0x80100070
+#define HW_DMA0_SSTAT1         0x80100078
+#define HW_DMA0_DSTAT1         0x80100080
+#define HW_DMA0_SSTATAR1       0x80100088      
+#define HW_DMA0_DSTATAR1       0x80100090 
+#define HW_DMA0_CFG1           0x80100098
+#define HW_DMA0_SGR1           0x801000a0
+#define HW_DMA0_DSR1           0x801000a8
+
+#define HW_DMA0_SAR2           0x801000b0
+#define HW_DMA0_DAR2           0x801000b8
+#define HW_DMA0_LLP2           0x801000c0
+#define HW_DMA0_CTL2           0x801000c8
+#define HW_DMA0_SSTAT2         0x801000d0
+#define HW_DMA0_DSTAT2         0x801000d8
+#define HW_DMA0_SSTATAR2       0x801000e0      
+#define HW_DMA0_DSTATAR2       0x801000e8 
+#define HW_DMA0_CFG2           0x801000f0
+#define HW_DMA0_SGR2           0x801000f8
+#define HW_DMA0_DSR2           0x80100100
+
+#define HW_DMA0_SAR3           0x80100108
+#define HW_DMA0_DAR3           0x80100110
+#define HW_DMA0_LLP3           0x80100118
+#define HW_DMA0_CTL3           0x80100120
+#define HW_DMA0_SSTAT3         0x80100128
+#define HW_DMA0_DSTAT3         0x80100130
+#define HW_DMA0_SSTATAR3       0x80100138      
+#define HW_DMA0_DSTATAR3       0x80100140 
+#define HW_DMA0_CFG3           0x80100148
+#define HW_DMA0_SGR3           0x80100150
+#define HW_DMA0_DSR3           0x80100158
+
+#define HW_DMA0_SAR4           0x80100160
+#define HW_DMA0_DAR4           0x80100168
+#define HW_DMA0_LLP4           0x80100170
+#define HW_DMA0_CTL4           0x80100178
+#define HW_DMA0_SSTAT4         0x80100180
+#define HW_DMA0_DSTAT4         0x80100188
+#define HW_DMA0_SSTATAR4       0x80100190      
+#define HW_DMA0_DSTATAR4       0x80100198 
+#define HW_DMA0_CFG4           0x801001a0
+#define HW_DMA0_SGR4           0x801001a8
+#define HW_DMA0_DSR4           0x801001b0
+
+#define HW_DMA0_SAR5           0x801001b8
+#define HW_DMA0_DAR5           0x801001c0
+#define HW_DMA0_LLP5           0x801001c8
+#define HW_DMA0_CTL5           0x801001d0
+#define HW_DMA0_SSTAT5         0x801001d8
+#define HW_DMA0_DSTAT5         0x801001e0
+#define HW_DMA0_SSTATAR5       0x801001e8      
+#define HW_DMA0_DSTATAR5       0x801001f0 
+#define HW_DMA0_CFG5           0x801001f8
+#define HW_DMA0_SGR5           0x80100200
+#define HW_DMA0_DSR5           0x80100208
+
+#define HW_DMA0_SAR6           0x80100210
+#define HW_DMA0_DAR6           0x80100218
+#define HW_DMA0_LLP6           0x80100220
+#define HW_DMA0_CTL6           0x80100228
+#define HW_DMA0_SSTAT6         0x80100230
+#define HW_DMA0_DSTAT6         0x80100238
+#define HW_DMA0_SSTATAR6       0x80100240      
+#define HW_DMA0_DSTATAR6       0x80100248 
+#define HW_DMA0_CFG6           0x80100250
+#define HW_DMA0_SGR6           0x80100258
+#define HW_DMA0_DSR6           0x80100260
+
+#define HW_DMA0_SAR7           0x80100268
+#define HW_DMA0_DAR7           0x80100270
+#define HW_DMA0_LLP7           0x80100278
+#define HW_DMA0_CTL7           0x80100280
+#define HW_DMA0_SSTAT7         0x80100288
+#define HW_DMA0_DSTAT7         0x80100290
+#define HW_DMA0_SSTATAR7       0x80100298      
+#define HW_DMA0_DSTATAR7       0x801002a0 
+#define HW_DMA0_CFG7           0x801002a8
+#define HW_DMA0_SGR7           0x801002b0
+#define HW_DMA0_DSR7           0x801002b8
+
+#define HW_DMA0_RawTFR         0x801002c0
+#define HW_DMA0_RawBLOCK       0x801002c8
+#define HW_DMA0_RawSRCTRAN     0x801002d0
+#define HW_DMA0_RawDSTTRAN     0x801002d8
+#define HW_DMA0_RawERR         0x801002e0
+
+#define HW_DMA0_StatusTFR      0x801002e8
+#define HW_DMA0_StatusBLOCK    0x801002f0
+#define HW_DMA0_StatusSRCTRAN  0x801002f8
+#define HW_DMA0_StatusDSTTRAN  0x80100300
+#define HW_DMA0_StatusERR      0x80100308
+
+#define HW_DMA0_MaskTFR        0x80100310
+#define HW_DMA0_MaskBLOCK      0x80100318
+#define HW_DMA0_MaskSRCTRAN    0x80100320
+#define HW_DMA0_MaskDSTTRAN    0x80100328
+#define HW_DMA0_MaskERR        0x80100330
+
+#define HW_DMA0_ClearTFR       0x80100338
+#define HW_DMA0_ClearBLOCK     0x80100340
+#define HW_DMA0_ClearSRCTRAN   0x80100348
+#define HW_DMA0_ClearDSTTRAN   0x80100350
+#define HW_DMA0_ClearERR       0x80100358
+
+#define HW_DMA0_STATUSINT      0x80100360
+
+#define HW_DMA0_ReqSrcReg      0x80100368
+#define HW_DMA0_ReqDstReg      0x80100370
+#define HW_DMA0_SglReqSrcReg   0x80100378
+#define HW_DMA0_SglReqDstReg   0x80100380
+#define HW_DMA0_LstSrcReg      0x80100388
+#define HW_DMA0_LstDstReg      0x80100390
+
+#define HW_DMA0_DMACFGREG      0x80100398
+#define HW_DMA0_CHENREG        0x801003a0
+
+////////////////////////////////////////////////////////////////////////////////
+// DMA1
+#define HW_DMA1_SAR0          0x80200000
+#define HW_DMA1_DAR0          0x80200008
+#define HW_DMA1_LLP0          0x80200010
+#define HW_DMA1_CTL0          0x80200018
+#define HW_DMA1_SSTAT0        0x80200020
+#define HW_DMA1_DSTAT0        0x80200028
+#define HW_DMA1_SSTATAR0      0x80200030
+#define HW_DMA1_DSTATAR0      0x80200038
+#define HW_DMA1_CFG0          0x80200040
+#define HW_DMA1_SGR0          0x80200048
+#define HW_DMA1_DSR0          0x80200050
+
+#define HW_DMA1_SAR1          0x80200058
+#define HW_DMA1_DAR1          0x80200060
+#define HW_DMA1_LLP1          0x80200068
+#define HW_DMA1_CTL1          0x80200070
+#define HW_DMA1_SSTAT1        0x80200078
+#define HW_DMA1_DSTAT1        0x80200080
+#define HW_DMA1_SSTATAR1      0x80200088
+#define HW_DMA1_DSTATAR1      0x80200090
+#define HW_DMA1_CFG1          0x80200098
+#define HW_DMA1_SGR1          0x802000a0
+#define HW_DMA1_DSR1          0x802000a8
+
+#define HW_DMA1_SAR2          0x802000b0
+#define HW_DMA1_DAR2          0x802000b8
+#define HW_DMA1_LLP2          0x802000c0
+#define HW_DMA1_CTL2          0x802000c8
+#define HW_DMA1_SSTAT2        0x802000d0
+#define HW_DMA1_DSTAT2        0x802000d8
+#define HW_DMA1_SSTATAR2      0x802000e0
+#define HW_DMA1_DSTATAR2      0x802000e8
+#define HW_DMA1_CFG2          0x802000f0
+#define HW_DMA1_SGR2          0x802000f8
+#define HW_DMA1_DSR2          0x80200100
+
+#define HW_DMA1_SAR3          0x80200108
+#define HW_DMA1_DAR3          0x80200110
+#define HW_DMA1_LLP3          0x80200118
+#define HW_DMA1_CTL3          0x80200120
+#define HW_DMA1_SSTAT3        0x80200128
+#define HW_DMA1_DSTAT3        0x80200130
+#define HW_DMA1_SSTATAR3      0x80200138
+#define HW_DMA1_DSTATAR3      0x80200140
+#define HW_DMA1_CFG3          0x80200148
+#define HW_DMA1_SGR3          0x80200150
+#define HW_DMA1_DSR3          0x80200158
+
+#define HW_DMA1_SAR4          0x80200160
+#define HW_DMA1_DAR4          0x80200168
+#define HW_DMA1_LLP4          0x80200170
+#define HW_DMA1_CTL4          0x80200178
+#define HW_DMA1_SSTAT4        0x80200180
+#define HW_DMA1_DSTAT4        0x80200188
+#define HW_DMA1_SSTATAR4      0x80200190
+#define HW_DMA1_DSTATAR4      0x80200198
+#define HW_DMA1_CFG4          0x802001a0
+#define HW_DMA1_SGR4          0x802001a8
+#define HW_DMA1_DSR4          0x802001b0
+
+#define HW_DMA1_SAR5          0x802001b8
+#define HW_DMA1_DAR5          0x802001c0
+#define HW_DMA1_LLP5          0x802001c8
+#define HW_DMA1_CTL5          0x802001d0
+#define HW_DMA1_SSTAT5        0x802001d8
+#define HW_DMA1_DSTAT5        0x802001e0
+#define HW_DMA1_SSTATAR5      0x802001e8
+#define HW_DMA1_DSTATAR5      0x802001f0
+#define HW_DMA1_CFG5          0x802001f8
+#define HW_DMA1_SGR5          0x80200200
+#define HW_DMA1_DSR5          0x80200208
+
+#define HW_DMA1_SAR6          0x80200210
+#define HW_DMA1_DAR6          0x80200218
+#define HW_DMA1_LLP6          0x80200220
+#define HW_DMA1_CTL6          0x80200228
+#define HW_DMA1_SSTAT6        0x80200230
+#define HW_DMA1_DSTAT6        0x80200238
+#define HW_DMA1_SSTATAR6      0x80200240
+#define HW_DMA1_DSTATAR6      0x80200248
+#define HW_DMA1_CFG6          0x80200250
+#define HW_DMA1_SGR6          0x80200258
+#define HW_DMA1_DSR6          0x80200260
+
+#define HW_DMA1_SAR7          0x80200268
+#define HW_DMA1_DAR7          0x80200270
+#define HW_DMA1_LLP7          0x80200278
+#define HW_DMA1_CTL7          0x80200280
+#define HW_DMA1_SSTAT7        0x80200288
+#define HW_DMA1_DSTAT7        0x80200290
+#define HW_DMA1_SSTATAR7      0x80200298
+#define HW_DMA1_DSTATAR7      0x802002a0
+#define HW_DMA1_CFG7          0x802002a8
+#define HW_DMA1_SGR7          0x802002b0
+#define HW_DMA1_DSR7          0x802002b8
+
+#define HW_DMA1_RawTFR        0x802002c0
+#define HW_DMA1_RawBLOCK      0x802002c8
+#define HW_DMA1_RawSRCTRAN    0x802002d0
+#define HW_DMA1_RawDSTTRAN    0x802002d8
+#define HW_DMA1_RawERR        0x802002e0
+
+#define HW_DMA1_StatusTFR     0x802002e8
+#define HW_DMA1_StatusBLOCK   0x802002f0
+#define HW_DMA1_StatusSRCTRAN 0x802002f8
+#define HW_DMA1_StatusDSTTRAN 0x80200300
+#define HW_DMA1_StatusERR     0x80200308
+
+#define HW_DMA1_MaskTFR       0x80200310
+#define HW_DMA1_MaskBLOCK     0x80200318
+#define HW_DMA1_MaskSRCTRAN   0x80200320
+#define HW_DMA1_MaskDSTTRAN   0x80200328
+#define HW_DMA1_MaskERR       0x80200330
+
+#define HW_DMA1_ClearTFR      0x80200338
+#define HW_DMA1_ClearBLOCK    0x80200340
+#define HW_DMA1_ClearSRCTRAN  0x80200348
+#define HW_DMA1_ClearDSTTRAN  0x80200350
+#define HW_DMA1_ClearERR      0x80200358
+
+#define HW_DMA1_STATUSINT     0x80200360
+
+#define HW_DMA1_ReqSrcReg     0x80200368
+#define HW_DMA1_ReqDstReg     0x80200370
+#define HW_DMA1_SglReqSrcReg  0x80200378
+#define HW_DMA1_SglReqDstReg  0x80200380
+#define HW_DMA1_LstSrcReg     0x80200388
+#define HW_DMA1_LstDstReg     0x80200390
+
+#define HW_DMA1_DMACFGREG     0x80200398
+#define HW_DMA1_CHENREG       0x802003a0
+
+////////////////////////////////////////////////////////////////////////////////
+// ICOLL
+#define HW_ICOLL_VECTOR       0x80054000
+#define HW_ICOLL_LEVELACK     0x80054010
+#define HW_ICOLL_CTRL         0x80054020
+#define HW_ICOLL_STAT         0x80054030
+#define HW_ICOLL_RAW0         0x80054040
+#define HW_ICOLL_RAW1         0x80054050
+#define HW_ICOLL_PRIORITY0    0x80054060
+#define HW_ICOLL_PRIORITY1    0x80054070
+#define HW_ICOLL_PRIORITY2    0x80054080
+#define HW_ICOLL_PRIORITY3    0x80054090
+#define HW_ICOLL_PRIORITY4    0x800540A0
+#define HW_ICOLL_PRIORITY5    0x800540B0
+#define HW_ICOLL_PRIORITY6    0x800540C0
+#define HW_ICOLL_PRIORITY7    0x800540D0
+#define HW_ICOLL_PRIORITY8    0x800540E0
+#define HW_ICOLL_PRIORITY9    0x800540F0
+#define HW_ICOLL_PRIORITY10   0x80054100
+#define HW_ICOLL_PRIORITY11   0x80054110
+#define HW_ICOLL_PRIORITY12   0x80054120
+#define HW_ICOLL_PRIORITY13   0x80054130
+#define HW_ICOLL_PRIORITY14   0x80054140
+#define HW_ICOLL_PRIORITY15   0x80054150
+#define HW_ICOLL_VBASE        0x80054160
+#define HW_ICOLL_DEBUG        0x80054170
+#define HW_ICOLL_DBGREAD0     0x80054180
+#define HW_ICOLL_DBGREAD1     0x80054190
+#define HW_ICOLL_DBGFLAG      0x800541A0
+#define HW_ICOLL_DBGREQUEST0  0x800541B0
+#define HW_ICOLL_DBGREQUEST1  0x800541C0
+#define HW_ICOLL_CLEAR0       0x800541D0
+#define HW_ICOLL_CLEAR1       0x800541E0
+#define HW_ICOLL_UNDEF_VECTOR 0x800541F0
+
+////////////////////////////////////////////////////////////////////////////////
+// TIMER0
+#define HW_TIMER0_IR          0x80088000
+#define HW_TIMER0_TCR         0x80088010
+#define HW_TIMER0_DIR         0x80088020
+#define HW_TIMER0_TC0         0x80088030
+#define HW_TIMER0_TC1         0x80088040
+#define HW_TIMER0_TC2         0x80088050
+#define HW_TIMER0_TC3         0x80088060
+#define HW_TIMER0_PR          0x80088070
+#define HW_TIMER0_PC          0x80088080
+#define HW_TIMER0_MCR         0x80088090
+#define HW_TIMER0_MR0         0x800880a0
+#define HW_TIMER0_MR1         0x800880b0
+#define HW_TIMER0_MR2         0x800880C0
+#define HW_TIMER0_MR3         0x800880D0
+#define HW_TIMER0_CCR         0x800880E0
+#define HW_TIMER0_CR0         0x800880F0
+#define HW_TIMER0_CR1         0x80088100
+#define HW_TIMER0_CR2         0x80088110
+#define HW_TIMER0_CR3         0x80088120
+#define HW_TIMER0_EMR         0x80088130
+#define HW_TIMER0_PWMTH0      0x80088140
+#define HW_TIMER0_PWMTH1      0x80088150
+#define HW_TIMER0_PWMTH2      0x80088160
+#define HW_TIMER0_PWMTH3      0x80088170
+#define HW_TIMER0_CTCR        0x80088180
+#define HW_TIMER0_PWMC        0x80088190
+
+////////////////////////////////////////////////////////////////////////////////
+// USART
+
+typedef struct {
+  __IO unsigned long CTRL0[4];
+  __IO unsigned long CTRL1[4];
+  __IO unsigned long CTRL2[4];
+  __IO unsigned long LINECTRL[4];
+  __IO unsigned long INTR[4];
+  __IO unsigned long DATA[4];
+  __IO unsigned long STAT[4];
+  __I  unsigned long DEBUG[4];
+  __IO unsigned long ILPR[4];
+  __IO unsigned long RS485CTRL[4];
+  __IO unsigned long RS485ADRMATCH[4];
+  __IO unsigned long RS485DLY[4];
+  __IO unsigned long AUTOBAUD[4];
+  __IO unsigned long CTRL3[4];
+} ASM_USART_TypeDef;
+
+#define UART0_BASE            0x80000000
+#define UART1_BASE            0x80004000
+#define UART2_BASE            0x80008000
+#define UART3_BASE            0x8000C000
+#define UART4_BASE            0x80010000
+#define UART5_BASE            0x80014000
+#define UART6_BASE            0x80018000
+#define UART7_BASE            0x8001C000
+#define UART8_BASE            0x80020000
+#define UART9_BASE            0x80024000
+
+////////////////////////////////////////////////////////////////////////////////
+// MAC
+#define HW_ETH_BASE_ADDR      0x80500000
+#define HW_ETH_MACCR          (HW_ETH_BASE_ADDR + 0x0000)
+#define HW_ETH_MACFFR         (HW_ETH_BASE_ADDR + 0x0004)
+#define HW_ETH_MACHTHR        (HW_ETH_BASE_ADDR + 0x0008)
+#define HW_ETH_MACHTLR        (HW_ETH_BASE_ADDR + 0x000C)
+#define HW_ETH_MACMIIAR       (HW_ETH_BASE_ADDR + 0x0010)
+#define HW_ETH_MACMIIDR       (HW_ETH_BASE_ADDR + 0x0014)
+#define HW_ETH_MACFCR         (HW_ETH_BASE_ADDR + 0x0018)
+#define HW_ETH_MACVLANTR      (HW_ETH_BASE_ADDR + 0x001C)
+#define HW_ETH_MACVR          (HW_ETH_BASE_ADDR + 0x0020)
+#define HW_ETH_MACRWUFFR      (HW_ETH_BASE_ADDR + 0x0028)
+#define HW_ETH_MACPMTCSR      (HW_ETH_BASE_ADDR + 0x002C)
+#define HW_ETH_MACDBGR        (HW_ETH_BASE_ADDR + 0x0034)
+#define HW_ETH_MACISR         (HW_ETH_BASE_ADDR + 0x0038)
+#define HW_ETH_MACIMR         (HW_ETH_BASE_ADDR + 0x003C)
+#define HW_ETH_MACA0HR        (HW_ETH_BASE_ADDR + 0x0040)
+#define HW_ETH_MACA0LR        (HW_ETH_BASE_ADDR + 0x0044)
+#define HW_ETH_MACA1HR        (HW_ETH_BASE_ADDR + 0x0048)
+#define HW_ETH_MACA1LR        (HW_ETH_BASE_ADDR + 0x004C)
+#define HW_ETH_MACA2HR        (HW_ETH_BASE_ADDR + 0x0050)
+#define HW_ETH_MACA2LR        (HW_ETH_BASE_ADDR + 0x0054)
+#define HW_ETH_MACA3HR        (HW_ETH_BASE_ADDR + 0x0058)
+#define HW_ETH_MACA3LR        (HW_ETH_BASE_ADDR + 0x005C)
+#define HW_ETH_MACA4HR        (HW_ETH_BASE_ADDR + 0x0060)
+#define HW_ETH_MACA4LR        (HW_ETH_BASE_ADDR + 0x0064)
+#define HW_ETH_MMCCR          (HW_ETH_BASE_ADDR + 0x0100)
+#define HW_ETH_MMCRIR         (HW_ETH_BASE_ADDR + 0x0104)
+#define HW_ETH_MMCTIR         (HW_ETH_BASE_ADDR + 0x0108)
+#define HW_ETH_MMCRIMR        (HW_ETH_BASE_ADDR + 0x010C)
+#define HW_ETH_MMCTIMR        (HW_ETH_BASE_ADDR + 0x0110)
+#define HW_ETH_MMCTGFSCCR     (HW_ETH_BASE_ADDR + 0x014C)
+#define HW_ETH_MMCTGFMSCCR    (HW_ETH_BASE_ADDR + 0x0150)
+#define HW_ETH_MMCTGFCR       (HW_ETH_BASE_ADDR + 0x0168)
+#define HW_ETH_MMCRFCECR      (HW_ETH_BASE_ADDR + 0x0194)
+#define HW_ETH_MMCRFAECR      (HW_ETH_BASE_ADDR + 0x0198)
+#define HW_ETH_MMCRGUFCR      (HW_ETH_BASE_ADDR + 0x01C4)
+#define HW_ETH_PTPTSCR        (HW_ETH_BASE_ADDR + 0x0700)
+#define HW_ETH_PTPSSIR        (HW_ETH_BASE_ADDR + 0x0704)
+#define HW_ETH_PTPTSHR        (HW_ETH_BASE_ADDR + 0x0708)
+#define HW_ETH_PTPTSLR        (HW_ETH_BASE_ADDR + 0x070C)
+#define HW_ETH_PTPTSHUR       (HW_ETH_BASE_ADDR + 0x0710)
+#define HW_ETH_PTPTSLUR       (HW_ETH_BASE_ADDR + 0x0714)
+#define HW_ETH_PTPTSAR        (HW_ETH_BASE_ADDR + 0x0718)
+#define HW_ETH_PTPTTHR        (HW_ETH_BASE_ADDR + 0x071C)
+#define HW_ETH_PTPTTLR        (HW_ETH_BASE_ADDR + 0x0720)
+#define HW_ETH_PTPTSSR        (HW_ETH_BASE_ADDR + 0x0728)
+#define HW_ETH_PTPPPSCR       (HW_ETH_BASE_ADDR + 0x072C)
+#define HW_ETH_DMABMR         (HW_ETH_BASE_ADDR + 0x1000)
+#define HW_ETH_DMATPDR        (HW_ETH_BASE_ADDR + 0x1004)
+#define HW_ETH_DMARPDR        (HW_ETH_BASE_ADDR + 0x1008)
+#define HW_ETH_DMARDLAR       (HW_ETH_BASE_ADDR + 0x100C)
+#define HW_ETH_DMATDLAR       (HW_ETH_BASE_ADDR + 0x1010)
+#define HW_ETH_DMASR          (HW_ETH_BASE_ADDR + 0x1014)
+#define HW_ETH_DMAOMR         (HW_ETH_BASE_ADDR + 0x1018)
+#define HW_ETH_DMAIER         (HW_ETH_BASE_ADDR + 0x101C)
+#define HW_ETH_DMAMFBOCR      (HW_ETH_BASE_ADDR + 0x1020)
+#define HW_ETH_DMARSWTR       (HW_ETH_BASE_ADDR + 0x1024)
+#define HW_ETH_DMACHTDR       (HW_ETH_BASE_ADDR + 0x1048)
+#define HW_ETH_DMACHRDR       (HW_ETH_BASE_ADDR + 0x104C)
+#define HW_ETH_DMACHTBAR      (HW_ETH_BASE_ADDR + 0x1050)
+#define HW_ETH_DMACHRBAR      (HW_ETH_BASE_ADDR + 0x1054)
+
+////////////////////////////////////////////////////////////////////////////////
+#endif /* __ASM9260T_REGS_H__ */
+

bsp/asm9260t/platform/gpio.c

@@ -0,0 +1,62 @@
+/*
+ * File      : interrupt.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+ 
+#include "asm9260t.h"
+#include "rtthread.h"
+
+void HW_SetPinMux(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t mux_type)
+{
+    rt_uint32_t addr = HW_IOCON(port, pin);
+    rt_uint32_t val = inl(addr);   // read origin value
+
+    val &= ~7UL;     // clear MUX field
+    val |= mux_type; // set MUX field with new value
+
+    outl(val ,addr);   // Set new value
+}
+
+void HW_GpioSetDir(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t isOut)
+{
+    rt_uint32_t addr = HW_GPIO_DATA_BASE | ((port>>2)<<16) | 0x8000;
+    rt_uint32_t val;
+    addr = isOut? REG_SET(addr) : REG_CLR(addr);
+    val = (1 << ((port%4)*8+pin));
+    outl(val, addr);
+}
+
+void HW_GpioSetVal(rt_uint8_t port, rt_uint8_t pin)
+{
+    rt_uint32_t addr, val;
+    addr = REG_SET(HW_GPIO_DATA_BASE | ((port>>2)<<16));
+    val  = (1 << ((port%4)*8+pin));
+    outl(val, addr);
+}
+
+void HW_GpioClrVal(rt_uint8_t port, rt_uint8_t pin)
+{
+    rt_uint32_t addr, val;
+    addr = REG_CLR(HW_GPIO_DATA_BASE | ((port>>2)<<16));
+    val  = (1 << ((port%4)*8+pin));
+    outl(val, addr);
+}

bsp/asm9260t/platform/gpio.h

@@ -0,0 +1,31 @@
+/*
+ * File      : interrupt.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
+extern void HW_SetPinMux(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t mux_type);
+extern void HW_GpioSetDir(rt_uint8_t port, rt_uint8_t pin, rt_uint8_t isOut);
+extern void HW_GpioSetVal(rt_uint8_t port, rt_uint8_t pin);
+extern void HW_GpioClrVal(rt_uint8_t port, rt_uint8_t pin);
+#endif

bsp/asm9260t/platform/interrupt.c

@@ -0,0 +1,221 @@
+/*
+ * File      : interrupt.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety      first version
+ * 2015-04-27     ArdaFu     Port bsp from at91sam9260 to asm9260t
+ */
+
+#include <rthw.h>
+#include "asm9260t.h"
+#include "interrupt.h"
+
+#define MAX_HANDLERS    (64)
+
+extern rt_uint32_t rt_interrupt_nest;
+
+/* exception and interrupt handler table */
+struct rt_irq_desc irq_desc[MAX_HANDLERS];
+
+rt_uint32_t rt_interrupt_from_thread;
+rt_uint32_t rt_interrupt_to_thread;
+rt_uint32_t rt_thread_switch_interrupt_flag;
+
+
+/* --------------------------------------------------------------------
+ *  Interrupt initialization
+ * -------------------------------------------------------------------- */
+
+/*
+ * The default interrupt priority levels (0 = lowest, 3 = highest).
+ */
+static rt_uint32_t default_irq_priority[MAX_HANDLERS/4] =
+{
+    0x00000000UL, /* INT3 - INT0 */
+    0x00000000UL, /* INT7 - INT4 */
+    0x00000000UL, /* INT11 - INT8 */
+    0x02000000UL, /* INT15 - INT12 */
+    0x02020202UL, /* INT19 - INT16 */
+    0x02020202UL, /* INT23 - INT20 */
+    0x00000002UL, /* INT27 - INT24 */
+    0x01010100UL, /* INT31 - INT28 */
+    0x00000001UL, /* INT35 - INT32 */
+    0x00000000UL, /* INT39 - INT36 */
+    0x00000000UL, /* INT43 - INT40 */
+    0x00000000UL, /* INT47 - INT44 */
+    0x00000000UL, /* INT51 - INT48 */
+    0x00000000UL, /* INT55 - INT52 */
+    0x00000000UL, /* INT59 - INT56 */
+    0x00000000UL, /* INT63 - INT60 */
+};
+
+
+void rt_hw_interrupt_mask(int irq);
+void rt_hw_interrupt_umask(int irq);
+
+rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector, void *param)
+{
+    rt_kprintf("UN-handled interrupt %d occurred!!!\n", vector);
+    return RT_NULL;
+}
+
+/**
+ * This function will initialize hardware interrupt
+ */
+void rt_hw_interrupt_init(void)
+{
+    register rt_uint32_t idx;
+    /* Initialize the ICOLL interrupt controller */
+    outl((1<<8), REG_SET(HW_AHBCLKCTRL1)); // Enable ICOLL clock
+    outl((1<<8), REG_CLR(HW_PRESETCTRL1)); // Reset ICOLL start
+    outl((1<<8), REG_SET(HW_PRESETCTRL1)); // Reset ICOLL stop
+
+    for(idx = 0; idx < (MAX_HANDLERS/4); idx++)
+    {
+        rt_uint32_t reg = (HW_ICOLL_PRIORITY0 + 0x10*idx);
+        outl(default_irq_priority[idx], REG_VAL(reg));
+    }
+
+    /* init exceptions table */
+    for(idx=0; idx < MAX_HANDLERS; idx++)
+    {
+        irq_desc[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
+        irq_desc[idx].param = RT_NULL;
+#ifdef RT_USING_INTERRUPT_INFO
+        rt_snprintf(irq_desc[idx].name, RT_NAME_MAX - 1, "default");
+        irq_desc[idx].counter = 0;
+#endif
+    }
+
+    /* init interrupt nest, and context in thread sp */
+    rt_interrupt_nest = 0;
+    rt_interrupt_from_thread = 0;
+    rt_interrupt_to_thread = 0;
+    rt_thread_switch_interrupt_flag = 0;
+
+    outl(0x00000000, REG_CLR(HW_ICOLL_VBASE)); //todo: fix this bug
+
+    outl(0x00020000, REG_CLR(HW_ICOLL_CTRL)); // Clear CTRL REG
+    outl(0x00050000, REG_SET(HW_ICOLL_CTRL));
+    outl(0x00000004, HW_ICOLL_UNDEF_VECTOR);
+    outl(~0UL, REG_CLR(HW_ICOLL_CLEAR0));
+    outl(~0UL, REG_CLR(HW_ICOLL_CLEAR1));
+}
+
+
+/**
+ * This function will mask a interrupt.
+ * @param vector the interrupt number
+ */
+void rt_hw_interrupt_mask(int irq)
+{
+    rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((irq & 0x3CUL) << 2);
+    rt_uint32_t bit = 4UL << ((irq & 3UL)<<3);
+    outl(bit, REG_CLR(reg));
+}
+
+/**
+ * This function will un-mask a interrupt.
+ * @param vector the interrupt number
+ */
+void rt_hw_interrupt_umask(int irq)
+{
+    rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((irq & 0x3CUL) << 2);
+    rt_uint32_t bit = 4UL << ((irq & 3UL)<<3);
+    outl(bit, REG_SET(reg));
+}
+
+/**
+ * This function will install a interrupt service routine to a interrupt.
+ * @param vector the interrupt number
+ * @param handler the interrupt service routine to be installed
+ * @param param the interrupt service function parameter
+ * @param name the interrupt name
+ * @return old handler
+ */
+rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
+        void *param, char *name)
+{
+    rt_isr_handler_t old_handler = RT_NULL;
+
+    if(vector < MAX_HANDLERS)
+    {
+        old_handler = irq_desc[vector].handler;
+        if (handler != RT_NULL)
+        {
+            irq_desc[vector].handler = (rt_isr_handler_t)handler;
+            irq_desc[vector].param = param;
+#ifdef RT_USING_INTERRUPT_INFO
+            rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
+            irq_desc[vector].counter = 0;
+#endif
+        }
+    }
+
+    return old_handler;
+}
+
+
+
+rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)
+{
+    //volatile rt_uint32_t irqstat;
+    rt_uint32_t id;
+    /* AIC need this dummy read */
+    inl(HW_ICOLL_VECTOR);
+    /* get irq number */
+    id = inl(HW_ICOLL_STAT);
+    /* clear pending register */
+    //irqstat = inl(HW_ICOLL_VECTOR);
+    return id;
+}
+
+void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
+{
+    rt_uint32_t reg = HW_ICOLL_PRIORITY0 + ((id & 0x3CUL) << 2);
+    rt_uint32_t level = 1UL << (0x3 & (inl(REG_VAL(reg)) >>((id & 3UL)<<3)));
+
+    if(id & 0x20)
+        outl((1UL<<(id&0x1F)), REG_SET(HW_ICOLL_CLEAR1));
+    else
+        outl((1UL<<id), REG_SET(HW_ICOLL_CLEAR0));
+
+    outl(level, HW_ICOLL_LEVELACK);
+}
+
+#ifdef RT_USING_FINSH
+void list_irq(void)
+{
+    int irq;
+    rt_kprintf("number\tcount\tname\n");
+    for (irq = 0; irq < MAX_HANDLERS; irq++)
+    {
+        if (rt_strncmp(irq_desc[irq].name, "default", sizeof("default")))
+        {
+            rt_kprintf("%02ld: %10ld  %s\n",
+                       irq, irq_desc[irq].counter, irq_desc[irq].name);
+        }
+    }
+}
+
+#include <finsh.h>
+FINSH_FUNCTION_EXPORT(list_irq, list system irq);
+
+#endif

bsp/asm9260t/platform/interrupt.h

@@ -0,0 +1,97 @@
+/*
+ * File      : interrupt.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+#ifndef __INTERRUPT_H__
+#define __INTERRUPT_H__
+
+#define INT_IRQ     0x00
+#define INT_FIQ     0x01
+
+
+// IRQ Source
+#define INT_ARM_COMMRX                    0 
+#define INT_ARM_COMMTX                    1 
+#define INT_RTC                           2 
+#define INT_GPIO0                         3 
+#define INT_GPIO1                         4 
+#define INT_GPIO2                         5 
+#define INT_GPIO3                         6 
+#define INT_GPIO4_IIS1                    7 
+#define INT_USB0                          8 
+#define INT_USB1                          9 
+#define INT_USB0_DMA                      10  
+#define INT_USB1_DMA                      11  
+#define INT_MAC                           12  
+#define INT_MAC_PMT                       13  
+#define INT_NAND                          14  
+#define INT_UART0                         15  
+#define INT_UART1                         16  
+#define INT_UART2                         17  
+#define INT_UART3                         18  
+#define INT_UART4                         19  
+#define INT_UART5                         20  
+#define INT_UART6                         21  
+#define INT_UART7                         22  
+#define INT_UART8                         23  
+#define INT_UART9                         24  
+#define INT_I2S0                          25  
+#define INT_I2C0                          26  
+#define INT_I2C1                          27  
+#define INT_CAMIF                         28  
+#define INT_TIMER0                        29  
+#define INT_TIMER1                        30  
+#define INT_TIMER2                        31  
+#define INT_TIMER3                        32  
+#define INT_ADC0                          33  
+#define INT_DAC0                          34  
+#define INT_USB0_RESUME_HOSTDISCONNECT    35    
+#define INT_USB0_VBUSVALID                36    
+#define INT_USB1_RESUME_HOSTDISCONNECT    37    
+#define INT_USB1_VBUSVALID                38    
+#define INT_DMA0_CH0                      39  
+#define INT_DMA0_CH1                      40  
+#define INT_DMA0_CH2                      41  
+#define INT_DMA0_CH3                      42  
+#define INT_DMA0_CH4                      43  
+#define INT_DMA0_CH5                      44  
+#define INT_DMA0_CH6                      45  
+#define INT_DMA0_CH7                      46  
+#define INT_DMA1_CH0                      47  
+#define INT_DMA1_CH1                      48  
+#define INT_DMA1_CH2                      49  
+#define INT_DMA1_CH3                      50  
+#define INT_DMA1_CH4                      51  
+#define INT_DMA1_CH5                      52  
+#define INT_DMA1_CH6                      53  
+#define INT_DMA1_CH7                      54  
+#define INT_WATCHDOG                      55  
+#define INT_CAN0                          56  
+#define INT_CAN1                          57  
+#define INT_QEI                           58  
+#define INT_MCPWM                         59  
+#define INT_SPI0                          60  
+#define INT_SPI1                          61  
+#define INT_QUADSPI0                      62  
+#define INT_SSP0                          63
+
+#endif

bsp/asm9260t/platform/reset.c

@@ -0,0 +1,37 @@
+/*
+ * File      : reset.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2015, RT-Thread Develop Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety      modified from mini2440
+ * 2015-04-27     ArdaFu      Port bsp from at91sam9260 to asm9260t
+ */
+
+#include <rtthread.h>
+
+void machine_reset(void)
+{
+
+}
+
+void machine_shutdown(void)
+{
+
+}
+

bsp/asm9260t/platform/rt_low_level_gcc.inc

@@ -0,0 +1,31 @@
+/*
+ * File      : rt_low_level_gcc.inc
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+
+/*--------- Stack size of CPU modes ------------------------------------------*/
+.equ UND_STK_SIZE,    2048
+.equ SVC_STK_SIZE,    4096
+.equ ABT_STK_SIZE,    2048
+.equ IRQ_STK_SIZE,    4096
+.equ FIQ_STK_SIZE,    4096
+.equ SYS_STK_SIZE,    2048

bsp/asm9260t/platform/rt_low_level_iar.inc

@@ -0,0 +1,31 @@
+/*
+ * File      : rt_low_level_iar.inc
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+ 
+/*-------- Stack size of CPU modes -------------------------------------------*/
+#define UND_STK_SIZE 512
+#define SVC_STK_SIZE 4096
+#define ABT_STK_SIZE 512
+#define IRQ_STK_SIZE 1024
+#define FIQ_STK_SIZE 1024
+#define SYS_STK_SIZE 512

bsp/asm9260t/platform/rt_low_level_init.c

@@ -0,0 +1,30 @@
+/*
+ * File      : rt_low_level_init.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ * 2015-04-27     ArdaFu      Port bsp from at91sam9260 to asm9260t
+ */
+
+void rt_low_level_init(void)
+{
+
+}
+

bsp/asm9260t/platform/rt_low_level_keil.inc

@@ -0,0 +1,32 @@
+;/*
+; * File      : rt_low_level_keil.inc
+; * This file is part of RT-Thread RTOS
+; * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+; *
+; *  This program is free software; you can redistribute it and/or modify
+; *  it under the terms of the GNU General Public License as published by
+; *  the Free Software Foundation; either version 2 of the License, or
+; *  (at your option) any later version.
+; *
+; *  This program is distributed in the hope that it will be useful,
+; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; *  GNU General Public License for more details.
+; *
+; *  You should have received a copy of the GNU General Public License along
+; *  with this program; if not, write to the Free Software Foundation, Inc.,
+; *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+; *
+; * Change Logs:
+; * Date           Author       Notes
+; * 2015-04-14     ArdaFu      first version
+; */
+
+;/*-------- Stack size of CPU modes ------------------------------------------*/
+UND_STK_SIZE EQU 512
+SVC_STK_SIZE EQU 4096
+ABT_STK_SIZE EQU 512
+IRQ_STK_SIZE EQU 1024
+FIQ_STK_SIZE EQU 1024
+SYS_STK_SIZE EQU 512
+    END

bsp/asm9260t/platform/system_clock.c

@@ -0,0 +1,303 @@
+/*
+ * File      : clock.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety       first version
+ */
+
+#include <rtthread.h>
+
+/*
+static rt_list_t clocks;
+
+struct clk {
+	char name[32];
+	rt_uint32_t rate_hz;
+	struct clk *parent;
+	rt_list_t  node;
+};
+
+static struct clk clk32k = {
+	"clk32k",
+	AT91_SLOW_CLOCK,
+	RT_NULL,
+	{RT_NULL, RT_NULL},
+};
+
+static struct clk main_clk = {
+	"main",
+	0,
+	RT_NULL,
+	{RT_NULL, RT_NULL},
+};
+
+static struct clk plla = {
+	"plla",
+	0,
+	RT_NULL,
+	{RT_NULL, RT_NULL},
+};
+
+static struct clk mck = {
+	"mck",
+	0,
+	RT_NULL,
+	{RT_NULL, RT_NULL},
+};
+
+static struct clk uhpck = {
+	"uhpck",
+	0,
+	RT_NULL,
+	{RT_NULL, RT_NULL},
+};
+
+static struct clk pllb = {
+	"pllb",
+	0,
+	&main_clk,
+	{RT_NULL, RT_NULL},
+};
+
+static struct clk udpck = {
+	"udpck",
+	0,
+	&pllb,
+	{RT_NULL, RT_NULL},
+};
+
+static struct clk *const standard_pmc_clocks[] = {
+	// four primary clocks 
+	&clk32k,
+	&main_clk,
+	&plla,
+
+	// MCK 
+	&mck
+};
+
+// clocks cannot be de-registered no refcounting necessary
+struct clk *clk_get(const char *id)
+{
+	struct clk *clk;
+	rt_list_t *list;
+	
+	for (list = (&clocks)->next; list != &clocks; list = list->next)
+	{
+		clk = (struct clk *)rt_list_entry(list, struct clk, node);
+		if (rt_strcmp(id, clk->name) == 0)
+			return clk;
+	}
+
+	return RT_NULL;
+}
+
+rt_uint32_t clk_get_rate(struct clk *clk)
+{
+	rt_uint32_t	rate;
+
+	for (;;) {
+		rate = clk->rate_hz;
+		if (rate || !clk->parent)
+			break;
+		clk = clk->parent;
+	}
+	return rate;
+}
+
+static rt_uint32_t at91_pll_rate(struct clk *pll, rt_uint32_t freq, rt_uint32_t reg)
+{
+	unsigned mul, div;
+
+	div = reg & 0xff;
+	mul = (reg >> 16) & 0x7ff;
+	if (div && mul) {
+		freq /= div;
+		freq *= mul + 1;
+	} else
+		freq = 0;
+
+	return freq;
+}
+
+static unsigned at91_pll_calc(unsigned main_freq, unsigned out_freq)
+{
+	unsigned i, div = 0, mul = 0, diff = 1 << 30;
+	unsigned ret = (out_freq > 155000000) ? 0xbe00 : 0x3e00;
+
+	//PLL output max 240 MHz (or 180 MHz per errata)
+	if (out_freq > 240000000)
+		goto fail;
+
+	for (i = 1; i < 256; i++) {
+		int diff1;
+		unsigned input, mul1;
+
+		//
+		// PLL input between 1MHz and 32MHz per spec, but lower
+		// frequences seem necessary in some cases so allow 100K.
+		// Warning: some newer products need 2MHz min.
+		//
+		input = main_freq / i;
+		if (input < 100000)
+			continue;
+		if (input > 32000000)
+			continue;
+
+		mul1 = out_freq / input;
+		if (mul1 > 2048)
+			continue;
+		if (mul1 < 2)
+			goto fail;
+
+		diff1 = out_freq - input * mul1;
+		if (diff1 < 0)
+			diff1 = -diff1;
+		if (diff > diff1) {
+			diff = diff1;
+			div = i;
+			mul = mul1;
+			if (diff == 0)
+				break;
+		}
+	}
+	if (i == 256 && diff > (out_freq >> 5))
+		goto fail;
+	return ret | ((mul - 1) << 16) | div;
+fail:
+	return 0;
+}
+
+static rt_uint32_t at91_usb_rate(struct clk *pll, rt_uint32_t freq, rt_uint32_t reg)
+{
+	if (pll == &pllb && (reg & AT91_PMC_USB96M))
+		return freq / 2;
+	else
+		return freq;
+}
+
+
+// PLLB generated USB full speed clock init
+static void at91_pllb_usbfs_clock_init(rt_uint32_t main_clock)
+{
+	rt_uint32_t at91_pllb_usb_init;
+	//
+	// USB clock init:  choose 48 MHz PLLB value,
+	// disable 48MHz clock during usb peripheral suspend.
+	//
+	// REVISIT:  assumes MCK doesn't derive from PLLB!
+	//
+	uhpck.parent = &pllb;
+
+	at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
+	pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
+	
+	at91_sys_write(AT91_CKGR_PLLBR, 0);
+
+	udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
+	uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
+}
+
+static struct clk *at91_css_to_clk(unsigned long css)
+{
+	switch (css) {
+		case AT91_PMC_CSS_SLOW:
+			return &clk32k;
+		case AT91_PMC_CSS_MAIN:
+			return &main_clk;
+		case AT91_PMC_CSS_PLLA:
+			return &plla;
+		case AT91_PMC_CSS_PLLB:
+			return &pllb;
+	}
+
+	return RT_NULL;
+}
+
+#define false 0
+#define true  1
+int at91_clock_init(rt_uint32_t main_clock)
+{
+	unsigned tmp, freq, mckr;
+	int i;
+	int pll_overclock = false;
+
+	//
+	// When the bootloader initialized the main oscillator correctly,
+	// there's no problem using the cycle counter.  But if it didn't,
+	// or when using oscillator bypass mode, we must be told the speed
+	 // of the main clock.
+	//
+	if (!main_clock) {
+		do {
+			tmp = at91_sys_read(AT91_CKGR_MCFR);
+		} while (!(tmp & AT91_PMC_MAINRDY));
+		main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16);
+	}
+	main_clk.rate_hz = main_clock;
+
+	// report if PLLA is more than mildly overclocked 
+	plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
+	if (plla.rate_hz > 209000000)
+		pll_overclock = true;
+	if (pll_overclock)
+		;//rt_kprintf("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
+
+	at91_pllb_usbfs_clock_init(main_clock);
+
+	//
+	 // MCK and CPU derive from one of those primary clocks.
+	 // For now, assume this parentage won't change.
+	 //
+	mckr = at91_sys_read(AT91_PMC_MCKR);
+	mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
+	freq = mck.parent->rate_hz;
+	freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2));				// prescale 
+	
+	mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8));      // mdiv 
+
+	// Register the PMC's standard clocks 
+	rt_list_init(&clocks);
+	for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
+		rt_list_insert_after(&clocks, &standard_pmc_clocks[i]->node);
+
+	rt_list_insert_after(&clocks, &pllb.node);
+	rt_list_insert_after(&clocks, &uhpck.node);
+	rt_list_insert_after(&clocks, &udpck.node);
+
+	// MCK and CPU clock are "always on" 
+	//clk_enable(&mck);
+
+	//rt_kprintf("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n",
+	//	freq / 1000000, (unsigned) mck.rate_hz / 1000000,
+	//	(unsigned) main_clock / 1000000,
+	//	((unsigned) main_clock % 1000000) / 1000); //cause blocked
+
+	return 0;
+}
+*/
+
+ // @brief System Clock Configuration
+
+void rt_hw_clock_init(void)
+{
+	//at91_clock_init(18432000);
+}
+

bsp/asm9260t/platform/timer0.c

@@ -0,0 +1,55 @@
+/*
+ * File      : timer0.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-29     ArdaFu       first version
+ */
+
+#include "timer0.h"
+#include "asm9260t.h"
+#include "rtthread.h"
+void hw_timer0_init(void)
+{
+    uint32_t pclk;
+
+    // enable timer0's clock, reset timer0
+    outl((1<<4), REG_SET(HW_AHBCLKCTRL1));
+    outl((1<<4), REG_CLR(HW_PRESETCTRL1));
+    outl((1<<4), REG_SET(HW_PRESETCTRL1));
+
+    outl((1<<0), REG_CLR(HW_TIMER0_TCR));
+
+    outl((3<<0), REG_CLR(HW_TIMER0_CTCR));
+
+    outl((3<<0), REG_CLR(HW_TIMER0_DIR));
+
+    outl(0, REG_CLR(HW_TIMER0_PR));
+    outl(0, REG_CLR(HW_TIMER0_PC));
+
+    outl((7<<0), REG_CLR(HW_TIMER0_MCR));
+    outl((3<<0), REG_SET(HW_TIMER0_MCR));
+
+    pclk = (inl(HW_SYSPLLCTRL)&0x1FF)*1000000u/4u;
+    outl(pclk/RT_TICK_PER_SECOND, HW_TIMER0_MR0);
+
+    outl((1<<4), REG_SET(HW_TIMER0_TCR));
+    outl((1<<4), REG_CLR(HW_TIMER0_TCR));
+    outl((1<<0), REG_SET(HW_TIMER0_TCR));
+}

bsp/asm9260t/platform/timer0.h

@@ -0,0 +1,34 @@
+/*
+ * File      : timer0.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-29     ArdaFu       first version
+ */
+
+#ifndef __HW_TIMER0_H__
+#define __HW_TIMER0_H__
+////////////////////////////////////////////////////////////////////////////////
+#include "stdint.h"
+
+extern void hw_timer0_init(void);
+
+////////////////////////////////////////////////////////////////////////////////
+#endif /* __HW_TIMER0_H__ */
+

bsp/asm9260t/platform/uart.c

@@ -0,0 +1,112 @@
+/*
+ * File      : interrupt.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+ 
+#include "asm9260t.h"
+#include "rtthread.h"
+#include "uart.h"
+
+void Hw_UartDisable(HW_USART_TypeDef* uartBase)
+{
+    uartBase->INTR[R_CLR] = ASM_UART_INTR_RXIEN | ASM_UART_INTR_TXIEN | ASM_UART_INTR_RTIS;
+    uartBase->CTRL2[R_CLR] = ASM_UART_CTRL2_TXE | ASM_UART_CTRL2_RXE;
+}
+
+void Hw_UartEnable(HW_USART_TypeDef* uartBase)
+{
+    uartBase->CTRL2[R_CLR] = 0x0000C000UL; //clear CTSEN and RTSEN
+    uartBase->CTRL2[R_SET] = ASM_UART_CTRL2_TXE | ASM_UART_CTRL2_RXE | ASM_UART_CTRL2_USARTEN;
+    uartBase->INTR[R_SET] = ASM_UART_INTR_RXIEN | ASM_UART_INTR_RTIEN;
+}
+
+void Hw_UartReset(HW_USART_TypeDef* uartBase)
+{
+    uartBase->CTRL0[R_CLR] = ASM_UART_CTRL0_SFTRST | ASM_UART_CTRL0_CLKGATE | ASM_UART_CTRL0_RXTO_ENABLE;
+    uartBase->CTRL0[R_SET] = ASM_UART_CTRL0_SFTRST | ASM_UART_CTRL0_CLKGATE | ASM_UART_CTRL0_RXTO_ENABLE;
+}
+
+void Hw_UartConfig(HW_USART_TypeDef* uartBase,int baudRate, int dataBits, int stopBits,int parity)
+{
+    rt_uint32_t mode = ASM_UART_LINECTRL_FEN;
+
+    switch (dataBits)
+    {
+    case 8:
+        mode |= ASM_UART_LINECTRL_WLEN8;
+        break;
+    case 7:
+        mode |= ASM_UART_LINECTRL_WLEN7;
+        break;
+    case 6:
+        mode |= ASM_UART_LINECTRL_WLEN6;
+        break;
+    case 5:
+        mode |= ASM_UART_LINECTRL_WLEN5;
+        break;
+    default:
+        mode |= ASM_UART_LINECTRL_WLEN8;
+        break;
+    }
+
+    switch (stopBits)
+    {
+    case 2:
+        mode |= ASM_UART_LINECTRL_STP2;
+        break;
+    case 1:
+    default:
+        break;
+    }
+
+    switch (parity)
+    {
+    case 1:
+        mode |= ASM_UART_LINECTRL_PEN;
+        break;
+    case 2:
+        mode |= ASM_UART_LINECTRL_PEN | ASM_UART_LINECTRL_EPS;
+        break;
+    case 0:
+    default:
+        break;
+    }
+    //16bit nBaudDivint
+    mode |= (((12000000 <<2 ) / baudRate) & UART_BAUD_DIVINT_MASK) << 10;
+    //6bit nNaudDivfrac
+    mode |= (((12000000 <<2 ) / baudRate) & UART_BAUD_DIVFRAC_MASK) << 8;
+
+
+    uartBase->LINECTRL[R_VAL] = mode;
+}
+
+void Hw_UartInit(int index)
+{
+    // uart0 = bit11, uart9 = bit20
+    int ctrl_bit = index + 11;
+    outl(1UL<<ctrl_bit,REG_SET(HW_AHBCLKCTRL0));    //UART4 ENABLE bit15
+    outl(0x1, HW_UART0CLKDIV + index*4);            //UART4 div 2
+    outl(1UL<<ctrl_bit,REG_CLR(HW_AHBCLKCTRL0));    //UART4 clk gate
+    outl(1UL<<ctrl_bit,REG_SET(HW_AHBCLKCTRL0));    //UART4 clk gate
+    outl(1UL<<ctrl_bit,REG_CLR(HW_PRESETCTRL0));    //UART4 reset
+    outl(1UL<<ctrl_bit,REG_SET(HW_PRESETCTRL0));    //UART4 reset
+}

bsp/asm9260t/platform/uart.h

@@ -0,0 +1,111 @@
+/*
+ * File      : interrupt.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+#ifndef __UART_H__
+#define __UART_H__
+
+#define R_VAL 0
+#define R_SET 1
+#define R_CLR 2
+#define R_TOG 3
+
+typedef struct
+{
+    volatile rt_uint32_t CTRL0[4];
+    volatile rt_uint32_t CTRL1[4];
+    volatile rt_uint32_t CTRL2[4];
+    volatile rt_uint32_t LINECTRL[4];
+    volatile rt_uint32_t INTR[4];
+    volatile rt_uint32_t DATA[4];
+    volatile rt_uint32_t STAT[4];
+    volatile const rt_uint32_t DEBUG[4];
+    volatile rt_uint32_t ILPR[4];
+    volatile rt_uint32_t RS485CTRL[4];
+    volatile rt_uint32_t RS485ADRMATCH[4];
+    volatile rt_uint32_t RS485DLY[4];
+    volatile rt_uint32_t AUTOBAUD[4];
+    volatile rt_uint32_t CTRL3[4];
+    volatile rt_uint32_t ISO7816CTRL[4];
+    volatile rt_uint32_t ISO7816ERRCNT[4];
+    volatile rt_uint32_t ISO7816STATUS[4];
+} HW_USART_TypeDef;
+
+#define USART0	((HW_USART_TypeDef *)UART0_BASE)
+#define USART1	((HW_USART_TypeDef *)UART1_BASE)
+#define USART2	((HW_USART_TypeDef *)UART2_BASE)
+#define USART3	((HW_USART_TypeDef *)UART3_BASE)
+#define USART4	((HW_USART_TypeDef *)UART4_BASE)
+#define USART5	((HW_USART_TypeDef *)UART5_BASE)
+#define USART6	((HW_USART_TypeDef *)UART6_BASE)
+#define USART7	((HW_USART_TypeDef *)UART7_BASE)
+#define USART8	((HW_USART_TypeDef *)UART8_BASE)
+#define USART9	((HW_USART_TypeDef *)UART9_BASE)
+
+
+#define ASM_UART_INTR_RXIS   (1UL << 4)
+#define ASM_UART_INTR_TXIS   (1UL << 5)
+#define ASM_UART_INTR_RTIS   (1UL << 6)
+#define ASM_UART_INTR_RXIEN  (1UL << 20)
+#define ASM_UART_INTR_TXIEN  (1UL << 21)
+#define ASM_UART_INTR_RTIEN  (1UL << 22)
+
+
+#define UART_BAUD_DIVINT_MASK       0x003FFFC0UL
+#define UART_BAUD_DIVFRAC_MASK      0x0000003FUL
+#define UART_FIFO_ENABLE            0x00000010UL
+#define MAIN_CLOCK_EXT12M           0
+#define MAIN_CLOCK_SYSPLL           1
+#define UART_INT_FIFO_LV_SEL_MASK   0x00770000UL
+#define RXTIMEOUT_ENABLE            0x01000000UL
+#define RXTIMEOUT_MASK              0x00FF0000UL
+
+
+#define ASM_UART_CTRL0_SFTRST       (1UL << 31)
+#define ASM_UART_CTRL0_CLKGATE      (1UL << 30)
+#define ASM_UART_CTRL0_RXTO_ENABLE  (1UL << 24)
+
+#define ASM_UART_CTRL2_USARTEN      (1UL << 0)
+#define ASM_UART_CTRL2_TXE          (1UL << 8)
+#define ASM_UART_CTRL2_RXE          (1UL << 9)
+
+
+#define ASM_UART_LINECTRL_PEN       (1UL << 1)
+#define ASM_UART_LINECTRL_EPS       (1UL << 2)
+#define ASM_UART_LINECTRL_STP2      (1UL << 3)
+#define ASM_UART_LINECTRL_FEN       (1UL << 4)
+#define ASM_UART_LINECTRL_WLEN5     (0UL << 5)
+#define ASM_UART_LINECTRL_WLEN6     (1UL << 5)
+#define ASM_UART_LINECTRL_WLEN7     (2UL << 5)
+#define ASM_UART_LINECTRL_WLEN8     (3UL << 5)
+#define ASM_UART_LINECTRL_SPS       (1UL << 7)
+
+#define ASM_UART_STAT_TXFF (1UL << 25)
+#define ASM_UART_STAT_RXFE (1UL << 24)
+
+extern void Hw_UartDisable(HW_USART_TypeDef* uartBase);
+extern void Hw_UartEnable(HW_USART_TypeDef* uartBase);
+extern void Hw_UartReset(HW_USART_TypeDef* uartBase);
+extern void Hw_UartConfig(HW_USART_TypeDef* uartBase, int baudRate, 
+                          int dataBits, int stopBits, int parity);
+extern void Hw_UartInit(int index);
+#endif

bsp/asm9260t/project.uvproj

@@ -0,0 +1,930 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+  <SchemaVersion>1.1</SchemaVersion>
+  <Header>### uVision Project, (C) Keil Software</Header>
+  <Targets>
+    <Target>
+      <TargetName>rtthread</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>AT91SAM9260</Device>
+          <Vendor>Atmel</Vendor>
+          <Cpu>IRAM(0x200000-0x200FFF) IRAM2(0x300000-0x300FFF) IROM(0x100000-0x107FFF) CLOCK(18432000) CPUTYPE(ARM926EJ-S)</Cpu>
+          <FlashUtilSpec />
+          <StartupFile>"STARTUP\Atmel\SAM9260.s" ("Atmel AT91SAM9260 Startup Code")</StartupFile>
+          <FlashDriverDll>UL2ARM(-UV2077N9E -O47 -S0 -C0 -N00("ARM926EJ-S Core") -D00(0792603F) -L00(4) -FO7 -FD300000 -FC1000 -FN1 -FF0AT91SAM9_DF_P1056_CS1 -FS020000000 -FL083BE00)</FlashDriverDll>
+          <DeviceId>4210</DeviceId>
+          <RegisterFile>AT91SAM9260.H</RegisterFile>
+          <MemoryEnv />
+          <Cmp />
+          <Asm />
+          <Linker />
+          <OHString />
+          <InfinionOptionDll />
+          <SLE66CMisc />
+          <SLE66AMisc />
+          <SLE66LinkerMisc />
+          <SFDFile />
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath />
+          <IncludePath />
+          <LibPath />
+          <RegisterFilePath>Atmel\SAM9260\</RegisterFilePath>
+          <DBRegisterFilePath>Atmel\SAM9260\</DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\Objects\</OutputDirectory>
+          <OutputName>template</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\Listings\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name />
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name />
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name />
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString />
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument />
+          <IncludeLibraryModules />
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARM.DLL</SimDllName>
+          <SimDllArguments>-cAT91SAM9260</SimDllArguments>
+          <SimDlgDll>DARMATS9.DLL</SimDlgDll>
+          <SimDlgDllArguments>-p91SAM9260</SimDlgDllArguments>
+          <TargetDllName>SARM.DLL</TargetDllName>
+          <TargetDllArguments />
+          <TargetDlgDll>TARMATS9.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-p91SAM9260</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+            <RestoreSysVw>1</RestoreSysVw>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>0</LoadApplicationAtStartup>
+            <RunToMain>0</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>1</RestoreTracepoints>
+            <RestoreSysVw>1</RestoreSysVw>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>5</TargetSelection>
+          <SimDlls>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile>.\jlink\at91sam9260.ini</InitializationFile>
+            <Driver>Segger\JLTAgdi.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2ARM.DLL</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4>.\jlink\at91sam9260.ini</Flash4>
+          <pFcarmOut />
+          <pFcarmGrp />
+          <pFcArmRoot />
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>ARM926EJ-S</AdsCpuType>
+            <RvctDeviceName />
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <hadIRAM2>1</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>1</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>0</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>1</Ra1Chk>
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+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>0</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
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+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x200000</StartAddress>
+                <Size>0x1000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x100000</StartAddress>
+                <Size>0x8000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x800000</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x100000</StartAddress>
+                <Size>0x8000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x20800000</StartAddress>
+                <Size>0x1800000</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x200000</StartAddress>
+                <Size>0x1000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x300000</StartAddress>
+                <Size>0x1000</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector />
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>0</uC99>
+            <useXO>0</useXO>
+            <VariousControls>
+              <MiscControls />
+              <Define>RT_USING_ARM_LIBC</Define>
+              <Undefine />
+              <IncludePath>applications;.;drivers;platform;../../include;../../libcpu/arm/arm926;../../libcpu/arm/common;../../components/pthreads;../../components/libc/armlibc;../../components/drivers/include;../../components/drivers/include;../../components/drivers/include;../../components/finsh</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <VariousControls>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath />
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x20000000</TextAddressRange>
+            <DataAddressRange>0x20800000</DataAddressRange>
+            <pXoBase />
+            <ScatterFile>.\at91sam9260_ram.scat</ScatterFile>
+            <IncludeLibs />
+            <IncludeLibsPath />
+            <Misc> --keep *.o(.rti_fn.*)   --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
+            <LinkerInputFile />
+            <DisabledWarnings />
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Applications</GroupName>
+          <Files>
+            <File>
+              <FileName>application.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications/application.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>startup.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications/startup.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers</GroupName>
+          <Files>
+            <File>
+              <FileName>board.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>drivers/board.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>drivers/usart.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>led.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>drivers/led.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>platform</GroupName>
+          <Files>
+            <File>
+              <FileName>gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>platform/gpio.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>interrupt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>platform/interrupt.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>reset.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>platform/reset.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>rt_low_level_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>platform/rt_low_level_init.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>system_clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>platform/system_clock.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>timer0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>platform/timer0.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>platform/uart.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Kernel</GroupName>
+          <Files>
+            <File>
+              <FileName>clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/clock.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/components.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/device.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>idle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/idle.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/ipc.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/irq.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kservice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/kservice.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>mempool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/mempool.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/object.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>scheduler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/scheduler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>slab.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/slab.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>thread.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/thread.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/timer.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ARM926</GroupName>
+          <Files>
+            <File>
+              <FileName>cpuport.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/arm926/cpuport.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>mmu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/arm926/mmu.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>stack.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/arm926/stack.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>trap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/arm926/trap.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>context_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>../../libcpu/arm/arm926/context_rvds.S</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>start_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>../../libcpu/arm/arm926/start_rvds.S</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>backtrace.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>div0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/common/div0.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>showmem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/common/showmem.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>pthreads</GroupName>
+          <Files>
+            <File>
+              <FileName>clock_time.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/clock_time.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>mqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/mqueue.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pthread.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/pthread.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pthread_attr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/pthread_attr.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pthread_barrier.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/pthread_barrier.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pthread_cond.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/pthread_cond.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pthread_mutex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/pthread_mutex.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pthread_rwlock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/pthread_rwlock.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pthread_spin.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/pthread_spin.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pthread_tls.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/pthread_tls.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>sched.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/sched.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>semaphore.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/pthreads/semaphore.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>libc</GroupName>
+          <Files>
+            <File>
+              <FileName>mem_std.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/libc/armlibc/mem_std.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>stubs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/libc/armlibc/stubs.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>DeviceDrivers</GroupName>
+          <Files>
+            <File>
+              <FileName>serial.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/serial/serial.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>i2c_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/i2c/i2c_core.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>i2c_dev.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/i2c/i2c_dev.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>i2c-bit-ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/i2c/i2c-bit-ops.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>completion.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/completion.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dataqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/dataqueue.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pipe.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/pipe.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>portal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/portal.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ringbuffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/ringbuffer.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>workqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/workqueue.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>finsh</GroupName>
+          <Files>
+            <File>
+              <FileName>shell.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/shell.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>symbol.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/symbol.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>cmd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/cmd.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_compiler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_compiler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_error.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_error.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_heap.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_init.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_node.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_node.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_ops.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_parser.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_parser.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_var.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_var.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_vm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_vm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_token.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_token.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+</Project>

bsp/asm9260t/rtconfig.h

@@ -0,0 +1,261 @@
+/* RT-Thread config file */
+#ifndef __RTTHREAD_CFG_H__
+#define __RTTHREAD_CFG_H__
+
+/* RT_NAME_MAX*/
+#define RT_NAME_MAX	32
+
+/* RT_ALIGN_SIZE*/
+#define RT_ALIGN_SIZE	4
+
+/* PRIORITY_MAX */
+#define RT_THREAD_PRIORITY_MAX	255
+
+/* Tick per Second */
+#define RT_TICK_PER_SECOND	100
+
+/* SECTION: RT_DEBUG */
+/* Thread Debug */
+#define RT_DEBUG
+//#define SCHEDULER_DEBUG
+/* #define RT_THREAD_DEBUG */
+
+#define RT_USING_OVERFLOW_CHECK
+
+#define RT_USING_INTERRUPT_INFO
+
+/* Using Hook */
+#define RT_USING_HOOK
+
+/* Using Software Timer */
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO		8
+#define RT_TIMER_THREAD_STACK_SIZE	512
+#define RT_TIMER_TICK_PER_SECOND	10
+
+/* SECTION: IPC */
+/* Using Semaphore */
+#define RT_USING_SEMAPHORE
+
+/* Using Mutex */
+#define RT_USING_MUTEX
+
+/* Using Event */
+#define RT_USING_EVENT
+
+/* Using MailBox */
+#define RT_USING_MAILBOX
+
+/* Using Message Queue */
+#define RT_USING_MESSAGEQUEUE
+
+/* SECTION: Memory Management */
+/* Using Memory Pool Management*/
+#define RT_USING_MEMPOOL
+
+/* Using Dynamic Heap Management */
+#define RT_USING_HEAP
+
+/* Using Small MM */
+/* #define RT_USING_SMALL_MEM */
+
+/* Using SLAB Allocator */
+#define RT_USING_SLAB
+
+/* SECTION: the runtime libc library */
+/* the runtime libc library */
+#define RT_USING_LIBC
+#define RT_USING_PTHREADS
+
+/* Using Module System */
+//#define RT_USING_MODULE
+//#define RT_USING_LIBDL
+
+/* SECTION: Device System */
+/* Using Device System */
+#define RT_USING_DEVICE
+
+#define RT_USING_DEVICE_IPC
+#define RT_USING_SERIAL
+
+/* SECTION: Console options */
+#define RT_USING_CONSOLE
+/* the buffer size of console */
+#define RT_CONSOLEBUF_SIZE	128
+#define RT_CONSOLE_DEVICE_NAME "uart3"
+
+/* SECTION: finsh, a C-Express shell */
+/* Using FinSH as Shell*/
+#define RT_USING_FINSH
+/* Using symbol table */
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_STACK_SIZE 4096
+
+/* SECTION: C++ support */
+/* Using C++ support */
+/* #define RT_USING_CPLUSPLUS */
+
+/* SECTION: Device filesystem support */
+/* using DFS support */
+//#define RT_USING_DFS
+#define RT_USING_DFS_ELMFAT
+/* use long file name feature */
+#define RT_DFS_ELM_USE_LFN			2
+#define RT_DFS_ELM_REENTRANT
+/* define OEM code page */
+#define RT_DFS_ELM_CODE_PAGE	936
+/* Using OEM code page file */
+// #define RT_DFS_ELM_CODE_PAGE_FILE
+/* the max number of file length */
+#define RT_DFS_ELM_MAX_LFN			128
+/* #define RT_USING_DFS_YAFFS2 */
+//#define RT_USING_DFS_DEVFS
+
+#define RT_USING_DFS_NFS
+#define RT_NFS_HOST_EXPORT		"192.168.1.5:/"
+
+#define DFS_USING_WORKDIR
+
+/* the max number of mounted filesystem */
+#define DFS_FILESYSTEMS_MAX		4
+/* the max number of opened files */
+#define DFS_FD_MAX					16
+/* the max number of cached sector */
+#define DFS_CACHE_MAX_NUM   		4
+
+/* Enable freemodbus protocol stack*/
+/* #define RT_USING_MODBUS */
+
+#define RT_USING_LED
+
+//#define RT_USING_SDIO
+
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
+
+/*#define RT_USING_DBGU*/
+ #define RT_USING_UART0
+/* #define RT_USING_UART1 */
+
+ #define RT_USING_UART3 
+ #define RT_USING_UART4
+
+/* SECTION: lwip, a lightweight TCP/IP protocol stack */
+/* Using lightweight TCP/IP protocol stack */
+//#define RT_USING_LWIP
+#define RT_LWIP_DNS
+
+/* Trace LwIP protocol */
+// #define RT_LWIP_DEBUG 
+
+/* Enable ICMP protocol */
+#define RT_LWIP_ICMP
+
+/* Enable IGMP protocol */
+#define RT_LWIP_IGMP
+
+/* Enable UDP protocol */
+#define RT_LWIP_UDP
+
+/* Enable TCP protocol */
+#define RT_LWIP_TCP
+
+/* the number of simulatenously active TCP connections*/
+#define RT_LWIP_TCP_PCB_NUM	5
+
+/* TCP sender buffer space */
+#define RT_LWIP_TCP_SND_BUF	1024*10
+
+/* TCP receive window. */
+#define RT_LWIP_TCP_WND	1024*8
+
+/* Enable SNMP protocol */
+/* #define RT_LWIP_SNMP */
+
+/* Using DHCP */
+/* #define RT_LWIP_DHCP */
+
+/* ip address of target */
+#define RT_LWIP_IPADDR0	192
+#define RT_LWIP_IPADDR1	168
+#define RT_LWIP_IPADDR2	1
+#define RT_LWIP_IPADDR3	30
+
+/* gateway address of target */
+#define RT_LWIP_GWADDR0	192
+#define RT_LWIP_GWADDR1	168
+#define RT_LWIP_GWADDR2	1
+#define RT_LWIP_GWADDR3	1
+
+/* mask address of target */
+#define RT_LWIP_MSKADDR0	255
+#define RT_LWIP_MSKADDR1	255
+#define RT_LWIP_MSKADDR2	255
+#define RT_LWIP_MSKADDR3	0
+
+/* the number of blocks for pbuf */
+#define RT_LWIP_PBUF_NUM	16
+
+/* the number of simultaneously queued TCP */
+#define RT_LWIP_TCP_SEG_NUM    40
+
+/* thread priority of tcpip thread */
+#define RT_LWIP_TCPTHREAD_PRIORITY	128
+
+/* mail box size of tcpip thread to wait for */
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE	32
+
+/* thread stack size of tcpip thread */
+#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
+
+/* thread priority of ethnetif thread */
+#define RT_LWIP_ETHTHREAD_PRIORITY	144
+
+/* mail box size of ethnetif thread to wait for */
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE	32
+
+/* thread stack size of ethnetif thread */
+#define RT_LWIP_ETHTHREAD_STACKSIZE	1024
+
+
+/* SECTION: RTGUI support */
+/* using RTGUI support */
+/* #define RT_USING_RTGUI */
+
+/* name length of RTGUI object */
+//#define RTGUI_NAME_MAX		16
+/* support 16 weight font */
+//#define RTGUI_USING_FONT16
+/* support 16 weight font */
+//#define RTGUI_USING_FONT12
+/* support Chinese font */
+//#define RTGUI_USING_FONTHZ
+/* use DFS as file interface */
+//#define RTGUI_USING_DFS_FILERW
+/* use font file as Chinese font */
+/* #define RTGUI_USING_HZ_FILE */
+/* use Chinese bitmap font */
+//#define RTGUI_USING_HZ_BMP
+/* use small size in RTGUI */
+/* #define RTGUI_USING_SMALL_SIZE */
+/* use mouse cursor */
+/* #define RTGUI_USING_MOUSE_CURSOR */
+
+/* SECTION: FTK support */
+/* using FTK support */
+/* #define RT_USING_FTK */
+
+/*
+ * Note on FTK:
+ * 
+ * FTK depends :
+ * #define RT_USING_NEWLIB
+ * #define DFS_USING_WORKDIR
+ * 
+ * And the maximal length must great than 64
+ * #define RT_DFS_ELM_MAX_LFN	128
+ */
+//#define RT_USING_CPU_FFS
+#define RT_USING_COMPONENTS_INIT
+#endif

bsp/asm9260t/rtconfig.py

@@ -0,0 +1,139 @@
+import os
+ARCH     = 'arm'
+CPU      = 'arm926'
+# toolchains options
+CROSS_TOOL  = 'gcc'
+
+#------- toolchains path -------------------------------------------------------
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+   # EXEC_PATH  = 'D:/ArdaArmTools/Sourcery_Lite/bin'
+    EXEC_PATH   = 'D:/ArdaArmTools/GNUARM_4.9_2015q1/bin'
+elif CROSS_TOOL == 'keil':
+    PLATFORM    = 'armcc'
+    EXEC_PATH   = 'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+    PLATFORM    = 'iar'
+    IAR_PATH    = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.0'
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+#BUILD = 'debug'
+BUILD = 'release'
+
+CORE = 'arm926ej-s'
+MAP_FILE = 'rtthread.map'
+LINK_FILE = 'link_scripts/sdram'
+TARGET_NAME = 'rtthread.bin'
+
+#------- GCC settings ----------------------------------------------------------
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX = 'arm-none-eabi-'
+    #PREFIX = 'arm-none-linux-gnueabi-'
+    CC = PREFIX + 'gcc'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'axf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu=arm926ej-s'
+    CFLAGS = DEVICE
+    AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
+    AFLAGS += ' -Iplatform'
+    LFLAGS = DEVICE
+    LFLAGS += ' -Wl,--gc-sections,-cref,-Map=' + MAP_FILE
+    LFLAGS += ' -T ' + LINK_FILE + '.ld'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n' 
+    POST_ACTION += SIZE + ' $TARGET\n'
+#------- Keil settings ---------------------------------------------------------
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+    EXEC_PATH += '/arm/armcc/bin/'
+
+    DEVICE = ' --cpu=' + CORE
+    CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
+    AFLAGS = DEVICE + ' -Iplatform'
+    LFLAGS = DEVICE + ' --strict'
+    LFLAGS += ' --info sizes --info totals --info unused --info veneers'
+    LFLAGS += ' --list ' + MAP_FILE
+    LFLAGS += ' --scatter  ' + LINK_FILE + '.scat'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output ' + TARGET_NAME + ' \n'
+    POST_ACTION += 'fromelf -z $TARGET\n'
+#------- IAR settings ----------------------------------------------------------
+elif PLATFORM == 'iar':
+    # toolchains
+    CC = 'iccarm'
+    AS = 'iasmarm'
+    AR = 'iarchive'
+    LINK = 'ilinkarm'
+    TARGET_EXT = 'axf'
+
+    DEVICE = CORE
+
+    CFLAGS = '--cpu=' + DEVICE
+    CFLAGS += ' --diag_suppress Pa050'
+    CFLAGS += ' --no_cse'
+    CFLAGS += ' --no_unroll'
+    CFLAGS += ' --no_inline'
+    CFLAGS += ' --no_code_motion'
+    CFLAGS += ' --no_tbaa'
+    CFLAGS += ' --no_clustering'
+    CFLAGS += ' --no_scheduling'
+
+    CFLAGS += ' --endian=little'
+    CFLAGS += ' -e'
+    CFLAGS += ' --fpu=none'
+    CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+    CFLAGS += ' --silent'
+
+    AFLAGS = '--cpu '+ DEVICE
+    AFLAGS += ' -s+'
+    AFLAGS += ' -w+'
+    AFLAGS += ' -r'
+    AFLAGS += ' --fpu none'
+    AFLAGS += ' -S'
+    AFLAGS += ' -Iplatform'
+    
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
+
+    LFLAGS = '--config ' + LINK_FILE +'.icf'
+    LFLAGS += ' --entry __iar_program_start'
+    LFLAGS += ' --map ' + MAP_FILE
+    LFLAGS += ' --silent'
+
+    EXEC_PATH = IAR_PATH + '/arm/bin/'
+    POST_ACTION = 'ielftool  --silent --bin $TARGET ' + TARGET_NAME

bsp/asm9260t/template.eww

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\template.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+

bsp/asm9260t/template.uvopt

@@ -0,0 +1,175 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rtthread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>18432000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>1</RunSim>
+        <RunTarget>0</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\Listings\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>16</CpuCode>
+      <Books>
+        <Book>
+          <Number>0</Number>
+          <Title>Datasheet</Title>
+          <Path>DATASHTS\ATMEL\AT91SAM9260_DS.PDF</Path>
+        </Book>
+        <Book>
+          <Number>1</Number>
+          <Title>Summary</Title>
+          <Path>DATASHTS\ATMEL\AT91SAM9260_DC.PDF</Path>
+        </Book>
+      </Books>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>.\jlink\at91sam9260.ini</tIfile>
+        <pMon>Segger\JLTAgdi.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JLTAgdi</Key>
+          <Name>-O558 -J1 -Y1000 -Z1 -FO0 -FD200000 -FC800 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2ARM</Key>
+          <Name>-UV2077N9E -O47 -S0 -C0 -N00("ARM926EJ-S Core") -D00(0792603F) -L00(4) -FO7 -FD300000 -FC1000 -FN1 -FF0AT91SAM9_DF_P1056_CS1 -FS020000000 -FL083BE00)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>
+
+</ProjectOpt>

bsp/asm9260t/template.uvproj

@@ -0,0 +1,408 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>rtthread</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>AT91SAM9260</Device>
+          <Vendor>Atmel</Vendor>
+          <Cpu>IRAM(0x200000-0x200FFF) IRAM2(0x300000-0x300FFF) IROM(0x100000-0x107FFF) CLOCK(18432000) CPUTYPE(ARM926EJ-S)</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile>"STARTUP\Atmel\SAM9260.s" ("Atmel AT91SAM9260 Startup Code")</StartupFile>
+          <FlashDriverDll>UL2ARM(-UV2077N9E -O47 -S0 -C0 -N00("ARM926EJ-S Core") -D00(0792603F) -L00(4) -FO7 -FD300000 -FC1000 -FN1 -FF0AT91SAM9_DF_P1056_CS1 -FS020000000 -FL083BE00)</FlashDriverDll>
+          <DeviceId>4210</DeviceId>
+          <RegisterFile>AT91SAM9260.H</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile></SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath>Atmel\SAM9260\</RegisterFilePath>
+          <DBRegisterFilePath>Atmel\SAM9260\</DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\Objects\</OutputDirectory>
+          <OutputName>template</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\Listings\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARM.DLL</SimDllName>
+          <SimDllArguments>-cAT91SAM9260</SimDllArguments>
+          <SimDlgDll>DARMATS9.DLL</SimDlgDll>
+          <SimDlgDllArguments>-p91SAM9260</SimDlgDllArguments>
+          <TargetDllName>SARM.DLL</TargetDllName>
+          <TargetDllArguments></TargetDllArguments>
+          <TargetDlgDll>TARMATS9.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-p91SAM9260</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+            <RestoreSysVw>1</RestoreSysVw>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>0</LoadApplicationAtStartup>
+            <RunToMain>0</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>1</RestoreTracepoints>
+            <RestoreSysVw>1</RestoreSysVw>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>5</TargetSelection>
+          <SimDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile>.\jlink\at91sam9260.ini</InitializationFile>
+            <Driver>Segger\JLTAgdi.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2ARM.DLL</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4>.\jlink\at91sam9260.ini</Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>ARM926EJ-S</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <hadIRAM2>1</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>1</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>0</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>1</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>0</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x200000</StartAddress>
+                <Size>0x1000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x100000</StartAddress>
+                <Size>0x8000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x800000</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x100000</StartAddress>
+                <Size>0x8000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x20800000</StartAddress>
+                <Size>0x1800000</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x200000</StartAddress>
+                <Size>0x1000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x300000</StartAddress>
+                <Size>0x1000</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>0</uC99>
+            <useXO>0</useXO>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x20000000</TextAddressRange>
+            <DataAddressRange>0x20800000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\at91sam9260_ram.scat</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+    </Target>
+  </Targets>
+
+</Project>

bsp/at91sam9260/applications/startup.c

@@ -29,16 +29,6 @@
 #ifdef RT_USING_FINSH
 #include <finsh.h>
 #endif
-extern void rt_hw_interrupt_init(void);
-extern void rt_hw_board_init(void);
-extern void rt_system_timer_init(void);
-extern void rt_system_scheduler_init(void);
-extern void rt_thread_idle_init(void);
-extern void mmu_invalidate_icache();
-extern void rt_hw_cpu_icache_enable(void);
-extern void rt_show_version(void);
-extern void rt_system_heap_init(void*, void*);
-extern void rt_hw_finsh_init(void);
 extern void rt_application_init(void);
 
 /**
@@ -47,71 +37,39 @@ extern void rt_application_init(void);
 
 /*@{*/
 #if defined(__CC_ARM)
-	extern int Image$$ER_ZI$$ZI$$Base;
-	extern int Image$$ER_ZI$$ZI$$Length;
-	extern int Image$$ER_ZI$$ZI$$Limit;
+extern int Image$$ER_ZI$$ZI$$Limit;
+#define HEAP_BEGIN  (&Image$$ER_ZI$$ZI$$Limit)
 #elif (defined (__GNUC__))
-	rt_uint8_t _irq_stack_start[1024];
-	rt_uint8_t _fiq_stack_start[1024];
-	rt_uint8_t _undefined_stack_start[512];
-	rt_uint8_t _abort_stack_start[512];
-	rt_uint8_t _svc_stack_start[4096] SECTION(".nobss");
-	extern unsigned char __bss_start;
-	extern unsigned char __bss_end;
-#endif
-
-#ifdef RT_USING_FINSH
-extern void finsh_system_init(void);
+extern unsigned char __bss_end__;
+#define HEAP_BEGIN  (&__bss_end__)
+#elif (defined (__ICCARM__))
+#pragma section=".noinit"
+#define HEAP_BEGIN  (__section_end(".noinit"))
 #endif
 
+#define HEAP_END    (0x24000000)
 
 /**
  * This function will startup RT-Thread RTOS.
  */
-void rtthread_startup(void)
+static void rtthread_startup(void)
 {
-	/* disable interrupt first */
-	rt_hw_interrupt_disable();
-	/* enable cpu cache */
-	rt_hw_cpu_icache_disable();
-	mmu_invalidate_icache();
-	rt_hw_cpu_icache_enable();
+    /* initialize board */
+    rt_hw_board_init();
 
-	/* initialize hardware interrupt */
-	rt_hw_interrupt_init();
+    /* show version */
+    rt_show_version();
 
-	/* initialize board */
-	rt_hw_board_init();
-
-	/* show version */
-	rt_show_version();
-	
-	/* initialize tick */
-	rt_system_tick_init();
-
-	/* initialize kernel object */
-	rt_system_object_init();
-
-	/* initialize timer system */
-	rt_system_timer_init();
-
-	/* initialize heap memory system */
-#ifdef __CC_ARM
-	rt_system_heap_init((void*)&Image$$ER_ZI$$ZI$$Limit, (void*)0x24000000);
-#else
-	rt_system_heap_init((void*)&__bss_end, (void*)0x23f00000);
+#ifdef RT_USING_HEAP
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
 #endif
 
-#ifdef RT_USING_MODULE
-	/* initialize module system*/
-	rt_system_module_init();
-#endif
-
-	/* initialize scheduler system */
-	rt_system_scheduler_init();
-
-	/* initialize application */
-	rt_application_init();
+    /* initialize scheduler system */
+    rt_system_scheduler_init();
+    /* initialize system timer*/
+    rt_system_timer_init();
+    /* initialize application */
+    rt_application_init();
 
 #ifdef RT_USING_FINSH
 	/* initialize finsh */
@@ -120,26 +78,29 @@ void rtthread_startup(void)
 	finsh_set_device(RT_CONSOLE_DEVICE_NAME);
 #endif
 #endif
+	
+    /* initialize timer thread */
+    rt_system_timer_thread_init();
 
-	/* initialize system timer thread */
-	rt_system_timer_thread_init();
+    /* initialize idle thread */
+    rt_thread_idle_init();
 
-	/* initialize idle thread */
-	rt_thread_idle_init();
+    /* start scheduler */
+    rt_system_scheduler_start();
 
-	/* start scheduler */
-	rt_system_scheduler_start();
-
-	/* never reach here */
-	return ;
+    /* never reach here */
+    return ;
 }
 
 int main(void)
 {
-	/* startup RT-Thread RTOS */
-	rtthread_startup();
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
 
-	return 0;
+    /* startup RT-Thread RTOS */
+    rtthread_startup();
+
+    return 0;
 }
 
 /*@}*/

bsp/at91sam9260/debug_scripts/at91sam9260.gdb

@@ -0,0 +1,230 @@
+#------------------------------------------------
+# SDRAM initialization script for the AT91SAM9260
+#------------------------------------------------
+
+#----------------------------------------------------------------------------
+# _InitRSTC()
+# Function description
+#   Initializes the RSTC (Reset controller).
+#   This makes sense since the default is to not allow user resets, which makes it impossible to
+#   apply a second RESET via J-Link
+#----------------------------------------------------------------------------
+
+define _InitRSTC
+	# Allow user reset
+    set *0xFFFFFD08=0xA5000001    
+end
+
+#----------------------------------------------------------------------------
+# _MapRAMAt0()
+# Function description: Maps RAM at 0.
+#----------------------------------------------------------------------------
+define _MapRAMAt0
+    echo "---------- SRAM remapped to 0 --------" \n
+    # Test and set Remap
+    set $__mac_i = *0xFFFFEF00
+    if ( (($__mac_i & 0x01) == 0) || (($__mac_i & 0x02) == 0))
+		#toggle remap bits
+		set *0xFFFFEF00 = 0x03 
+    else
+        echo "---------- The Remap is done ---------" \n
+	end
+end
+
+#----------------------------------------------------------------------------
+#
+#  _PllSetting()
+#  Function description
+#  Initializes the PMC.
+#  1. Enable the Main Oscillator
+#  2. Configure PLL
+#  3. Switch Master
+#----------------------------------------------------------------------------
+
+define __PllSetting
+    if ((*(0xFFFFFC30)&0x3) != 0 ) 
+		# Disable all PMC interrupt ( $$ JPP)
+		# AT91C_PMC_IDR   ((AT91_REG *) 0xFFFFFC64) #(PMC) Interrupt Disable Register
+		# pPmc->PMC_IDR = 0xFFFFFFFF;
+	    set *0xFFFFFC64 = 0xFFFFFFFF
+		# AT91C_PMC_PCDR  ((AT91_REG *) 0xFFFFFC14) #(PMC) Peripheral Clock Disable Register
+	    set *0xFFFFFC14 = 0xFFFFFFFF
+		# Disable all clock only Processor clock is enabled.
+	    set *0xFFFFFC04 = 0xFFFFFFFE
+		# AT91C_PMC_MCKR  ((AT91_REG *) 	0xFFFFFC30) # (PMC) Master Clock Register
+	    set *0xFFFFFC30 = 0x00000001
+
+		while ((*0xFFFFFC68 & 0x8) == 0)
+		end
+
+	    
+		# write reset value to PLLA and PLLB
+	    # AT91C_PMC_PLLAR ((AT91_REG *) 	0xFFFFFC28) # (PMC) PLL A Register
+	    set *0xFFFFFC28 = 0x00003F00
+	
+	    # AT91C_PMC_PLLBR ((AT91_REG *) 	0xFFFFFC2C) # (PMC) PLL B Register
+	    set *0xFFFFFC2C 0x00003F00
+	    while ((*0xFFFFFC68 & 0x2) == 0)
+		end
+		while ((*0xFFFFFC68 & 0x4) == 0)
+		end
+	
+	    echo "---------- PLL  Enable ---------------" \n
+    
+    else 
+   		echo "---------- Core in SLOW CLOCK mode ---" \n
+	end
+end
+
+
+#----------------------------------------------------------------------------
+#
+#      __PllSetting100MHz()
+# Function description
+#  Set core at 200 MHz and MCK at 100 MHz 
+#----------------------------------------------------------------------------
+
+define __PllSetting100MHz
+	echo "---------- PLL Set at 100 MHz --------" \n
+
+	#* pPmc->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
+    set *0xFFFFFC20=0x00004001
+	    while ((*0xFFFFFC68 & 0x1) == 0)
+		end
+	# AT91C_PMC_MCKR  ((AT91_REG *) 	0xFFFFFC30) # (PMC) Master Clock Register
+    set *0xFFFFFC30=0x00000001
+	    while ((*0xFFFFFC68 & 0x8) == 0)
+		end
+	#*   AT91C_BASE_CKGR->CKGR_PLLAR = (AT91C_CKGR_SRCA | ((96 << 16) & AT91C_CKGR_MULA) | 
+	#    (AT91C_CKGR_PLLACOUNT | (AT91C_CKGR_OUTA_0 | (9);
+    set *0xFFFFFC28=0x2060BF09
+	    while ((*0xFFFFFC68 & 0x2) == 0)
+		end
+    # Configure PLLB
+    set *0xFFFFFC2C=0x207C3F0C
+	    while ((*0xFFFFFC68 & 0x4) == 0)
+		end
+	#*   AT91C_BASE_PMC->PMC_MCKR =  AT91C_PMC_CSS_PLLA_CLK | AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2;;
+    set *0xFFFFFC30=0x00000102
+     	while ((*0xFFFFFC68 & 0x8) == 0)
+		end
+end
+
+
+#----------------------------------------------------------------------------
+#      __initSDRAM()
+#  Function description
+#  Set SDRAM for works at 100 MHz
+#----------------------------------------------------------------------------
+
+define __initSDRAM
+
+    # Configure EBI Chip select	
+    # pCCFG->CCFG_EBICSA |= AT91C_EBI_CS1A_SDRAMC;
+    # AT91C_CCFG_EBICSA ((AT91_REG *) 	0xFFFFEF1C) # (CCFG)  EBI Chip Select Assignement Register
+    set *0xFFFFEF1C=0x0001003A
+    
+    # Configure PIOs
+    # AT91F_PIO_CfgPeriph( AT91C_BASE_PIOC, AT91C_PC16_D16 to AT91C_PC16_D31
+    # pPio->PIO_ASR = periphAEnable; AT91C_PIOC_ASR ((AT91_REG *) 0xFFFFF870) # (PIOC) Select A Register
+    # pPio->PIO_BSR = periphBEnable;AT91C_PIOC_BSR  ((AT91_REG *) 0xFFFFF874) # (PIOC) Select B Register
+    # pPio->PIO_PDR = (periphAEnable | periphBEnable # Set in Periph mode
+    set *0xFFFFF870=0xFFFF0000
+    set *0xFFFFF874=0x00000000
+    set *0xFFFFF804=0xFFFF0000
+    
+    # psdrc->SDRAMC_CR =  AT91C_SDRAMC_NC_9  | AT91C_SDRAMC_NR_13 | AT91C_SDRAMC_CAS_2 |
+    # AT91C_SDRAMC_NB_4_BANKS | AT91C_SDRAMC_DBW_32_BITS | AT91C_SDRAMC_TWR_2 | AT91C_SDRAMC_TRC_7 |
+    # AT91C_SDRAMC_TRP_2 | AT91C_SDRAMC_TRCD_2 | AT91C_SDRAMC_TRAS_5 | AT91C_SDRAMC_TXSR_8 ;
+    set *0xFFFFEA08=0x85227259
+	set $i = 0
+	while $i != 100
+	  set $i += 1
+	end
+    # psdrc->SDRAMC_MR	= 0x00000002;		# Set PRCHG AL
+    set *0xFFFFEA00=0x00000002
+    # *AT91C_SDRAM	= 0x00000000;			# Perform PRCHG
+    set *0x20000000=0x00000000
+	set $i = 0
+	while $i != 100
+	  set $i += 1
+	end
+
+    # psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		# Set 1st CBR
+    set *0xFFFFEA00=0x00000004
+    
+    # *(AT91C_SDRAM+4)	= 0x00000001;	# Perform CBR
+    set *0x20000010=0x00000001
+    
+    # psdrc->SDRAMC_MR	= 0x00000004;		# Set 2 CBR
+    set *0xFFFFEA00=0x00000004
+    # *(AT91C_SDRAM+8)	= 0x00000002;	# Perform CBR
+    set *0x20000020=0x00000002
+    
+    # psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		# Set 3 CBR
+    set *0xFFFFEA00=0x00000004
+    # *(AT91C_SDRAM+0xc)	= 0x00000003;	# Perform CBR
+    set *0x20000030=0x00000003
+       
+    # psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		# Set 4 CBR
+    set *0xFFFFEA00=0x00000004
+    # *(AT91C_SDRAM+0x10)	= 0x00000004;	# Perform CBR
+    set *0x20000040=0x00000004
+       
+    # psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		# Set 5 CBR
+    set *0xFFFFEA00=0x00000004
+    # *(AT91C_SDRAM+0x14)	= 0x00000005;	# Perform CBR
+    set *0x20000050=0x00000005
+       
+    # psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		# Set 6 CBR
+    set *0xFFFFEA00=0x00000004
+    # *(AT91C_SDRAM+0x18)	= 0x00000006;	# Perform CBR
+    set *0x20000060=0x00000006
+       
+    # psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		# Set 7 CBR
+    set *0xFFFFEA00=0x00000004
+    # *(AT91C_SDRAM+0x1c)	= 0x00000007;	# Perform CBR
+    set *0x20000070=0x00000007
+       
+    # psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		# Set 8 CBR
+    set *0xFFFFEA00=0x00000004
+    # *(AT91C_SDRAM+0x20)	= 0x00000008;	# Perform CBR
+    set *0x20000080=0x00000008
+       
+    # psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_LMR_CMD;		# Set LMR operation
+    set *0xFFFFEA00=0x00000003
+    # *(AT91C_SDRAM+0x24)	= 0xcafedede;		# Perform LMR burst=1, lat=2
+    set *0x20000090=0xCAFEDEDE
+       
+    # psdrc->SDRAMC_TR	= (AT91C_MASTER_CLOCK * 7)/1000000;				# Set Refresh Timer 390 for 25MHz (TR= 15.6 * F )
+    set *0xFFFFEA04=0x000002B9
+    
+    #*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_NORMAL_CMD;		# Set Normal mode
+    set *0xFFFFEA00=0x00000000
+    
+    #*	*AT91C_SDRAM	= 0x00000000;	# Perform Normal mode
+    set *0x20000000=0x00000000
+    echo "---------- SDRAM Done at 100 MHz -----" \n
+end
+
+# Step1: Connect to the J-Link gdb server
+define reset
+	#target remote localhost:2331
+	monitor reset
+
+	# Step2: Reset peripheral  (RSTC_CR)
+	#Init PLL
+	__PllSetting
+	__PllSetting100MHz    
+	__initSDRAM
+	#* Set the RAM memory at 0x0020 0000 & 0x0000 0000
+	_MapRAMAt0                     
+	_InitRSTC
+	
+	# Step3: Load file(eg. getting-started project)
+	load
+
+	mon reg pc=0x20000000
+	#info reg
+
+end

bsp/at91sam9260/debug_scripts/at91sam9260.ini

@@ -0,0 +1,248 @@
+// ----------------------------------------------------------------------------
+//         ATMEL Microcontroller Software Support 
+// ----------------------------------------------------------------------------
+// Copyright (c) 2008, Atmel Corporation
+//
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// - Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the disclaimer below.
+//
+// Atmel's name may not be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+// ----------------------------------------------------------------------------
+
+//----------------------------------------------------------------------------
+//  File Name           : at91sam9260-ek-sdram.ini
+//  Object              : Generic Macro File for KEIL
+//----------------------------------------------------------------------------
+
+//----------------------------------------------------------------------------
+// _MapRAMAt0()
+// Function description: Maps RAM at 0.
+//----------------------------------------------------------------------------
+
+DEFINE INT  __mac_i;
+
+FUNC void _MapRAMAt0(){
+
+	
+    printf ("Changing mapping: RAM mapped to 0 \n");
+    // Test and set Remap
+    __mac_i = _RDWORD(0xFFFFEF00);
+    if ( ((__mac_i & 0x01) == 0) || ((__mac_i & 0x02) == 0))
+	{
+		_WDWORD(0xFFFFEF00,0x03);    // toggle remap bits
+	}
+    else
+    {
+        printf ("------------------------------- The Remap is done -----------------------------------\n");
+	}
+}
+
+
+//----------------------------------------------------------------------------
+// _InitRSTC()
+// Function description
+//   Initializes the RSTC (Reset controller).
+//   This makes sense since the default is to not allow user resets, which makes it impossible to
+//   apply a second RESET via J-Link
+//----------------------------------------------------------------------------
+
+FUNC void _InitRSTC() {
+
+    _WDWORD(0xFFFFFD08,0xA5000001);    // Allow user reset
+
+}
+
+//----------------------------------------------------------------------------
+//
+//  _PllSetting()
+//  Function description
+//  Initializes the PMC.
+//  1. Enable the Main Oscillator
+//  2. Configure PLL
+//  3. Switch Master
+//----------------------------------------------------------------------------
+
+FUNC void __PllSetting() 
+{
+
+    if ((_RDWORD(0xFFFFFC30)&0x3) != 0 ) 
+	{
+		// Disable all PMC interrupt ( $$ JPP)
+		// AT91C_PMC_IDR   ((AT91_REG *) 0xFFFFFC64) //(PMC) Interrupt Disable Register
+		// pPmc->PMC_IDR = 0xFFFFFFFF;
+	    _WDWORD(0xFFFFFC64,0xFFFFFFFF);
+		// AT91C_PMC_PCDR  ((AT91_REG *) 0xFFFFFC14) //(PMC) Peripheral Clock Disable Register
+	    _WDWORD(0xFFFFFC14,0xFFFFFFFF);
+		// Disable all clock only Processor clock is enabled.
+	    _WDWORD(0xFFFFFC04,0xFFFFFFFE);
+		// AT91C_PMC_MCKR  ((AT91_REG *) 	0xFFFFFC30) // (PMC) Master Clock Register
+	    _WDWORD(0xFFFFFC30,0x00000001);
+	    _sleep_(10);
+	    // write reset value to PLLA and PLLB
+	    // AT91C_PMC_PLLAR ((AT91_REG *) 	0xFFFFFC28) // (PMC) PLL A Register
+	    _WDWORD(0xFFFFFC28,0x00003F00);
+	
+	    // AT91C_PMC_PLLBR ((AT91_REG *) 	0xFFFFFC2C) // (PMC) PLL B Register
+	    _WDWORD(0xFFFFFC2C,0x00003F00);
+	    _sleep_(10);
+	
+	    printf ( "------------------------------- PLL  Enable -----------------------------------------");
+    
+	} 
+    else {
+   		printf( " ********* Core in SLOW CLOCK mode ********* "); 
+	}
+}
+
+
+//----------------------------------------------------------------------------
+//
+//      __PllSetting100MHz()
+// Function description
+//  Set core at 200 MHz and MCK at 100 MHz 
+//----------------------------------------------------------------------------
+
+FUNC void __PllSetting100MHz()
+{
+
+	printf( "------------------------------- PLL Set at 100 MHz ----------------------------------");
+
+	//* pPmc->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
+    _WDWORD(0xFFFFFC20,0x00004001);
+    _sleep_(10);
+	// AT91C_PMC_MCKR  ((AT91_REG *) 	0xFFFFFC30) // (PMC) Master Clock Register
+    _WDWORD(0xFFFFFC30,0x00000001);
+    _sleep_(10);
+	//*   AT91C_BASE_CKGR->CKGR_PLLAR = (AT91C_CKGR_SRCA | ((96 << 16) & AT91C_CKGR_MULA) | 
+	//    (AT91C_CKGR_PLLACOUNT | (AT91C_CKGR_OUTA_0 | (9);
+    _WDWORD(0xFFFFFC28,0x2060BF09);
+    _sleep_(10);
+    // Configure PLLB
+    _WDWORD(0xFFFFFC2C,0x207C3F0C);
+    _sleep_(10);
+	//*   AT91C_BASE_PMC->PMC_MCKR =  AT91C_PMC_CSS_PLLA_CLK | AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2;;
+    _WDWORD(0xFFFFFC30,0x00000102);
+     _sleep_(10);
+
+}
+
+//----------------------------------------------------------------------------
+//      __initSDRAM()
+//  Function description
+//  Set SDRAM for works at 100 MHz
+//----------------------------------------------------------------------------
+
+FUNC void __initSDRAM()
+{
+
+    // Configure EBI Chip select	
+    // pCCFG->CCFG_EBICSA |= AT91C_EBI_CS1A_SDRAMC;
+    // AT91C_CCFG_EBICSA ((AT91_REG *) 	0xFFFFEF1C) // (CCFG)  EBI Chip Select Assignement Register
+    _WDWORD(0xFFFFEF1C,0x0001003A);
+    
+    // Configure PIOs
+    // AT91F_PIO_CfgPeriph( AT91C_BASE_PIOC, AT91C_PC16_D16 to AT91C_PC16_D31
+    // pPio->PIO_ASR = periphAEnable; AT91C_PIOC_ASR ((AT91_REG *) 0xFFFFF870) // (PIOC) Select A Register
+    // pPio->PIO_BSR = periphBEnable;AT91C_PIOC_BSR  ((AT91_REG *) 0xFFFFF874) // (PIOC) Select B Register
+    // pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
+    _WDWORD(0xFFFFF870,0xFFFF0000);
+    _WDWORD(0xFFFFF874,0x00000000);
+    _WDWORD(0xFFFFF804,0xFFFF0000);
+    
+    // psdrc->SDRAMC_CR =  AT91C_SDRAMC_NC_9  | AT91C_SDRAMC_NR_13 | AT91C_SDRAMC_CAS_2 |
+    // AT91C_SDRAMC_NB_4_BANKS | AT91C_SDRAMC_DBW_32_BITS | AT91C_SDRAMC_TWR_2 | AT91C_SDRAMC_TRC_7 |
+    // AT91C_SDRAMC_TRP_2 | AT91C_SDRAMC_TRCD_2 | AT91C_SDRAMC_TRAS_5 | AT91C_SDRAMC_TXSR_8 ;
+    _WDWORD(0xFFFFEA08,0x85227259);
+    _sleep_(10);
+    // psdrc->SDRAMC_MR	= 0x00000002;		// Set PRCHG AL
+    _WDWORD(0xFFFFEA00,0x00000002);
+    // *AT91C_SDRAM	= 0x00000000;			// Perform PRCHG
+    _WDWORD(0x20000000,0x00000000);
+    _sleep_(10);
+
+    // psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 1st CBR
+    _WDWORD(0xFFFFEA00,0x00000004);
+    
+    // *(AT91C_SDRAM+4)	= 0x00000001;	// Perform CBR
+    _WDWORD(0x20000010,0x00000001);
+    
+    // psdrc->SDRAMC_MR	= 0x00000004;		// Set 2 CBR
+    _WDWORD(0xFFFFEA00,0x00000004);
+    // *(AT91C_SDRAM+8)	= 0x00000002;	// Perform CBR
+    _WDWORD(0x20000020,0x00000002);
+    
+    // psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 3 CBR
+    _WDWORD(0xFFFFEA00,0x00000004);
+    // *(AT91C_SDRAM+0xc)	= 0x00000003;	// Perform CBR
+    _WDWORD(0x20000030,0x00000003);
+       
+    // psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 4 CBR
+    _WDWORD(0xFFFFEA00,0x00000004);
+    // *(AT91C_SDRAM+0x10)	= 0x00000004;	// Perform CBR
+    _WDWORD(0x20000040,0x00000004);
+       
+    // psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 5 CBR
+    _WDWORD(0xFFFFEA00,0x00000004);
+    // *(AT91C_SDRAM+0x14)	= 0x00000005;	// Perform CBR
+    _WDWORD(0x20000050,0x00000005);
+       
+    // psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 6 CBR
+    _WDWORD(0xFFFFEA00,0x00000004);
+    // *(AT91C_SDRAM+0x18)	= 0x00000006;	// Perform CBR
+    _WDWORD(0x20000060,0x00000006);
+       
+    // psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 7 CBR
+    _WDWORD(0xFFFFEA00,0x00000004);
+    // *(AT91C_SDRAM+0x1c)	= 0x00000007;	// Perform CBR
+    _WDWORD(0x20000070,0x00000007);
+       
+    // psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 8 CBR
+    _WDWORD(0xFFFFEA00,0x00000004);
+    // *(AT91C_SDRAM+0x20)	= 0x00000008;	// Perform CBR
+    _WDWORD(0x20000080,0x00000008);
+       
+    // psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_LMR_CMD;		// Set LMR operation
+    _WDWORD(0xFFFFEA00,0x00000003);
+    // *(AT91C_SDRAM+0x24)	= 0xcafedede;		// Perform LMR burst=1, lat=2
+    _WDWORD(0x20000090,0xCAFEDEDE);
+       
+    // psdrc->SDRAMC_TR	= (AT91C_MASTER_CLOCK * 7)/1000000;				// Set Refresh Timer 390 for 25MHz (TR= 15.6 * F )
+    _WDWORD(0xFFFFEA04,0x000002B9);
+    
+    //*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_NORMAL_CMD;		// Set Normal mode
+    _WDWORD(0xFFFFEA00,0x00000000);
+    
+    //*	*AT91C_SDRAM	= 0x00000000;	// Perform Normal mode
+    _WDWORD(0x20000000,0x00000000);
+    printf( "------------------------------- SDRAM Done at 100 MHz -------------------------------");
+
+
+}
+
+
+__PllSetting();                   //* Init PLL
+__PllSetting100MHz();    
+__initSDRAM();
+_MapRAMAt0();                     //* Set the RAM memory at 0x0020 0000 & 0x0000 0000
+_InitRSTC(); 
+DEBUG_CLOCK = 2000000;
+LOAD Objects\\template.axf INCREMENTAL
+PC = 0x20000000;
+//g,main

bsp/at91sam9260/debug_scripts/at91sam9260.mac

@@ -0,0 +1,252 @@
+// ---------------------------------------------------------
+//   ATMEL Microcontroller Software Support  -  ROUSSET  -
+// ---------------------------------------------------------
+// The software is delivered "AS IS" without warranty or
+// condition of any  kind, either express, implied or
+// statutory. This includes without limitation any warranty
+// or condition with respect to merchantability or fitness
+// for any particular purpose, or against the infringements of
+// intellectual property rights of others.
+// ---------------------------------------------------------
+//  File: SAM9_SDRAM.mac
+//  User setup file for CSPY debugger.
+//  1.1 08/Aug/06 jpp    : Creation
+//
+//  $Revision: 1.1.2.1 $
+//
+// ---------------------------------------------------------
+__var __mac_i;
+__var __mac_pt;
+
+/*********************************************************************
+*
+*       execUserReset() : JTAG set initially to Full Speed
+*/
+execUserReset()
+{
+    __message "------------------------------ execUserReset ---------------------------------";
+    _MapRAMAt0();                          //* Set the RAM memory at 0x00200000 & 0x00000000
+    __PllSetting();                        //* Init PLL
+    __PllSetting100MHz();              
+    __message "-------------------------------Set PC Reset ----------------------------------";
+}
+
+/*********************************************************************
+*
+*       execUserPreload() : JTAG set initially to 32kHz
+*/
+execUserPreload()
+{
+    __message "------------------------------ execUserPreload ---------------------------------";
+    __hwReset(0);                          //* Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)
+    __writeMemory32(0xD3,0x98,"Register"); //*  Set CPSR
+    __PllSetting();                        //* Init PLL
+    __PllSetting100MHz();    
+    __initSDRAM();                         //* Init SDRAM before load          
+    _MapRAMAt0();                          //* Set the RAM memory at 0x0020 0000 & 0x0000 0000
+    _InitRSTC();                           //* Enable User Reset to allow execUserReset() execution
+}
+
+
+
+/*********************************************************************
+*
+*       _InitRSTC()
+*
+* Function description
+*   Initializes the RSTC (Reset controller).
+*   This makes sense since the default is to not allow user resets, which makes it impossible to
+*   apply a second RESET via J-Link
+*/
+_InitRSTC() {
+    __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory");    // Allow user reset
+}
+
+
+/*********************************************************************
+*
+*       __initSDRAM()
+* Function description
+* Set SDRAM for works at 100 MHz
+*/
+__initSDRAM()
+{
+//* Configure EBI Chip select	
+//    pCCFG->CCFG_EBICSA |= AT91C_EBI_CS1A_SDRAMC | (1 << 16);
+// AT91C_CCFG_EBICSA ((AT91_REG *) 	0xFFFFEF1C) // (CCFG)  EBI Chip Select Assignement Register
+    __writeMemory32(0x0001003A,0xFFFFEF1C,"Memory");
+
+
+//*  Configure PIOs
+//*	AT91F_PIO_CfgPeriph( AT91C_BASE_PIOC, AT91C_PC16_D16 to AT91C_PC16_D31
+// pPio->PIO_ASR = periphAEnable; AT91C_PIOC_ASR ((AT91_REG *) 0xFFFFF870) // (PIOC) Select A Register
+// pPio->PIO_BSR = periphBEnable;AT91C_PIOC_BSR  ((AT91_REG *) 0xFFFFF874) // (PIOC) Select B Register
+// pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
+    __writeMemory32(0xFFFF0000,0xFFFFF870,"Memory");
+    __writeMemory32(0x00000000,0xFFFFF874,"Memory");
+    __writeMemory32(0xFFFF0000,0xFFFFF804,"Memory");
+
+//* psdrc->SDRAMC_CR =  AT91C_SDRAMC_NC_9  | AT91C_SDRAMC_NR_13 | AT91C_SDRAMC_CAS_2 |
+//  AT91C_SDRAMC_NB_4_BANKS | AT91C_SDRAMC_DBW_32_BITS | AT91C_SDRAMC_TWR_2 | AT91C_SDRAMC_TRC_7 |
+//  AT91C_SDRAMC_TRP_2 | AT91C_SDRAMC_TRCD_2 | AT91C_SDRAMC_TRAS_5 | AT91C_SDRAMC_TXSR_8 ;
+    __writeMemory32(0x85227259,0xFFFFEA08,"Memory");
+ __delay(1); //100
+//*	psdrc->SDRAMC_MR	= 0x00000002;		// Set PRCHG AL
+    __writeMemory32(0x00000002,0xFFFFEA00,"Memory");
+//*	*AT91C_SDRAM	= 0x00000000;			// Perform PRCHG
+    __writeMemory32(0x00000000,0x20000000,"Memory");
+ __delay(1); //100
+
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 1st CBR
+      __writeMemory32(0x00000004,0xFFFFEA00,"Memory");
+
+//*	*(AT91C_SDRAM+4)	= 0x00000001;	// Perform CBR
+    __writeMemory32(0x00000001,0x20000010,"Memory");
+
+//*	psdrc->SDRAMC_MR	= 0x00000004;		// Set 2 CBR
+     __writeMemory32(0x00000004,0xFFFFEA00,"Memory");
+//*	*(AT91C_SDRAM+8)	= 0x00000002;	// Perform CBR
+     __writeMemory32(0x00000002,0x20000020,"Memory");
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 3 CBR
+      __writeMemory32(0x00000004,0xFFFFEA00,"Memory");
+//*	*(AT91C_SDRAM+0xc)	= 0x00000003;	// Perform CBR
+     __writeMemory32(0x00000003,0x20000030,"Memory");
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 4 CBR
+      __writeMemory32(0x00000004,0xFFFFEA00,"Memory");
+//*	*(AT91C_SDRAM+0x10)	= 0x00000004;	// Perform CBR
+     __writeMemory32(0x00000004,0x20000040,"Memory");
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 5 CBR
+      __writeMemory32(0x00000004,0xFFFFEA00,"Memory");
+//*	*(AT91C_SDRAM+0x14)	= 0x00000005;	// Perform CBR
+     __writeMemory32(0x00000005,0x20000050,"Memory");
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 6 CBR
+      __writeMemory32(0x00000004,0xFFFFEA00,"Memory");
+//*	*(AT91C_SDRAM+0x18)	= 0x00000006;	// Perform CBR
+     __writeMemory32(0x00000006,0x20000060,"Memory");
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 7 CBR
+      __writeMemory32(0x00000004,0xFFFFEA00,"Memory");	
+//*	*(AT91C_SDRAM+0x1c)	= 0x00000007;	// Perform CBR
+     __writeMemory32(0x00000007,0x20000070,"Memory");
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_RFSH_CMD;		// Set 8 CBR
+      __writeMemory32(0x00000004,0xFFFFEA00,"Memory");
+//*	*(AT91C_SDRAM+0x20)	= 0x00000008;	// Perform CBR
+     __writeMemory32(0x00000008,0x20000080,"Memory");
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_LMR_CMD;		// Set LMR operation
+      __writeMemory32(0x00000003,0xFFFFEA00,"Memory");
+//*	*(AT91C_SDRAM+0x24)	= 0xcafedede;		// Perform LMR burst=1, lat=2
+     __writeMemory32(0xCAFEDEDE,0x20000090,"Memory");
+
+//*	psdrc->SDRAMC_TR	= (AT91C_MASTER_CLOCK * 7)/1000000;				// Set Refresh Timer 390 for 25MHz (TR= 15.6 * F )
+//									               // (F : system clock freq. MHz
+
+      __writeMemory32(0x000002B7,0xFFFFEA04,"Memory");
+
+//*	psdrc->SDRAMC_MR	= AT91C_SDRAMC_MODE_NORMAL_CMD;		// Set Normal mode
+      __writeMemory32(0x00000000,0xFFFFEA00,"Memory");
+
+//*	*AT91C_SDRAM	= 0x00000000;	// Perform Normal mode
+      __writeMemory32(0x00000000,0x20000000,"Memory");
+   __message "------------------------------- SDRAM Done at 100 MHz -------------------------------";
+
+}
+
+/*********************************************************************
+*
+*       _MapRAMAt0()
+* Function description
+* Remap RAM at 0
+*/
+_MapRAMAt0()
+{
+// AT91C_MATRIX_MRCR ((AT91_REG *) 	0xFFFFEF00) // (MATRIX)  Master Remp Control Register
+    __mac_i=__readMemory32(0xFFFFEF00,"Memory");
+    __message "----- AT91C_MATRIX_MRCR  : 0x",__mac_i:%X;
+
+    if ( ((__mac_i & 0x01) == 0) || ((__mac_i & 0x02) == 0)){
+        __message "------------------------------- The Remap is NOT & REMAP ----------------------------";
+        __writeMemory32(0x00000003,0xFFFFEF00,"Memory");
+        __mac_i=__readMemory32(0xFFFFEF00,"Memory");
+        __message "----- AT91C_MATRIX_MRCR  : 0x",__mac_i:%X;
+    } else {
+        __message "------------------------------- The Remap is done -----------------------------------";
+    }
+}
+
+
+/*********************************************************************
+*
+*       __PllSetting()
+* Function description
+*   Initializes the PMC.
+*   1. Enable the Main Oscillator
+*   2. Configure PLL
+*   3. Switch Master
+*/
+__PllSetting()
+{
+     if ((__readMemory32(0xFFFFFC30,"Memory")&0x3) != 0 ) {
+//* Disable all PMC interrupt ( $$ JPP)
+//* AT91C_PMC_IDR   ((AT91_REG *) 0xFFFFFC64) //(PMC) Interrupt Disable Register
+//*    pPmc->PMC_IDR = 0xFFFFFFFF;
+    __writeMemory32(0xFFFFFFFF,0xFFFFFC64,"Memory");
+//* AT91C_PMC_PCDR  ((AT91_REG *) 0xFFFFFC14) //(PMC) Peripheral Clock Disable Register
+    __writeMemory32(0xFFFFFFFF,0xFFFFFC14,"Memory");
+// Disable all clock only Processor clock is enabled.
+    __writeMemory32(0xFFFFFFFE,0xFFFFFC04,"Memory");
+
+// AT91C_PMC_MCKR  ((AT91_REG *) 	0xFFFFFC30) // (PMC) Master Clock Register
+    __writeMemory32(0x00000001,0xFFFFFC30,"Memory");
+    __delay(10); //10000
+
+// write reset value to PLLA and PLLB
+// AT91C_PMC_PLLAR ((AT91_REG *) 	0xFFFFFC28) // (PMC) PLL A Register
+    __writeMemory32(0x00003F00,0xFFFFFC28,"Memory");
+
+// AT91C_PMC_PLLBR ((AT91_REG *) 	0xFFFFFC2C) // (PMC) PLL B Register
+    __writeMemory32(0x00003F00,0xFFFFFC2C,"Memory");
+    __delay(10); //10000
+
+   __message "------------------------------- PLL  Enable -----------------------------------------";
+   } else {
+   __message " ********* Core in SLOW CLOCK mode ********* "; }
+}
+
+
+/*********************************************************************
+*
+*       __PllSetting100MHz()
+* Function description
+*   Set core at 200 MHz and MCK at 100 MHz 
+*/
+__PllSetting100MHz()
+{
+
+   __message "------------------------------- PLL Set at 100 MHz ----------------------------------";
+
+//* pPmc->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
+    __writeMemory32(0x00004001,0xFFFFFC20,"Memory");
+    __delay(10); //10000
+// AT91C_PMC_MCKR  ((AT91_REG *) 	0xFFFFFC30) // (PMC) Master Clock Register
+    __writeMemory32(0x00000001,0xFFFFFC30,"Memory");
+    __delay(10); //10000
+//*   AT91C_BASE_CKGR->CKGR_PLLAR = (AT91C_CKGR_SRCA | ((96 << 16) & AT91C_CKGR_MULA) | 
+//    (AT91C_CKGR_PLLACOUNT | (AT91C_CKGR_OUTA_0 | (9);
+    __writeMemory32(0x2060BF09,0xFFFFFC28,"Memory");
+    __delay(10); //10000
+// AT91C_BASE_PMC->PMC_PLLBR = BOARD_USBDIV| BOARD_CKGR_PLLB | BOARD_PLLBCOUNT | BOARD_MULB| BOARD_DIVB;
+    __writeMemory32(0x207C3F0C,0xFFFFFC2C,"Memory");
+    __delay(10); //10000    
+//*   AT91C_BASE_PMC->PMC_MCKR =  AT91C_PMC_CSS_PLLA_CLK | AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2;;
+    __writeMemory32(0x00000102,0xFFFFFC30,"Memory");
+     __delay(10); //10000
+
+}
+

bsp/at91sam9260/drivers/board.c

@@ -33,7 +33,7 @@
  */
 /*@{*/
 
-
+extern void rt_hw_interrupt_init(void);
 extern void rt_hw_clock_init(void);
 
 extern void rt_hw_get_clock(void);
@@ -143,6 +143,10 @@ static void at91sam926x_pit_init(void)
  */
 void rt_hw_board_init()
 {
+	/* initialize mmu */
+	rt_hw_mmu_init(at91_mem_desc, sizeof(at91_mem_desc)/sizeof(at91_mem_desc[0]));
+		/* initialize hardware interrupt */
+	rt_hw_interrupt_init();
 	/* initialize the system clock */
 	rt_hw_clock_init();
 
@@ -150,8 +154,7 @@ void rt_hw_board_init()
 	rt_hw_uart_init();
 	rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
 
-	/* initialize mmu */
-	rt_hw_mmu_init(at91_mem_desc, sizeof(at91_mem_desc)/sizeof(at91_mem_desc[0]));
+
 
 	/* initialize timer0 */
 	rt_hw_timer_init();

bsp/at91sam9260/link_scripts/at91sam9260_ram.icf

@@ -0,0 +1,55 @@
+//------------------------------------------------------------------------------
+//      Linker scatter for running in external SDRAM on the AT91SAM9260
+//------------------------------------------------------------------------------
+
+//
+// Define a memory region that covers the entire 4 GB addressible space of the
+// processor.
+//
+define memory mem with size = 4G;
+
+//
+// Define a region for the on-chip flash.
+//
+define region FLASH = mem:[from 0x20000000 to 0x207FFFFF];
+
+//
+// Define a region for the on-chip SRAM.
+//
+define region SRAM  = mem:[from 0x20800000 to 0x23FFFFFF];
+
+//
+// Indicate that the read/write values should be initialized by copying from
+// flash.
+//
+initialize by copy { readwrite };
+
+//
+// Indicate that the noinit values should be left alone.  This includes the
+// stack, which if initialized will destroy the return address from the
+// initialization code, causing the processor to branch to zero and fault.
+//
+do not initialize { section .noinit };
+
+//
+// Place the interrupt vectors at the start of flash.
+//
+place at start of FLASH { readonly section .intvec };
+
+//
+// Place the remainder of the read-only items into flash.
+//
+place in FLASH { readonly };
+
+//
+// Place the RAM vector table at the start of SRAM.
+//
+place at start of SRAM { section VTABLE };
+
+//
+// Place all read/write items into SRAM.
+//
+place in SRAM { readwrite};
+keep { section FSymTab };
+keep { section VSymTab };
+keep { section .rti_fn* };

bsp/at91sam9260/link_scripts/at91sam9260_ram.ld

@@ -1,6 +1,6 @@
 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
-ENTRY(_start)
+ENTRY(entry)
 SECTIONS
 {
     . = 0x20000000;
@@ -66,12 +66,11 @@ SECTIONS
 
     . = ALIGN(4);
     .nobss : { *(.nobss) }
-
-    . = 0x20300000;
+    
     . = ALIGN(4);
-    __bss_start = .;
-    .bss : { *(.bss) }
-    __bss_end = .;
+    __bss_start__ = .;
+    .bss : { *(.bss)}
+    __bss_end__ = .;
 
     /* stabs debugging sections. */
     .stab 0 : { *(.stab) }

bsp/at91sam9260/link_scripts/at91sam9260_ram.scat

@@ -0,0 +1,40 @@
+;*------------------------------------------------------------------------------
+;*      Linker scatter for running in external SDRAM on the AT91SAM9260
+;*----------------------------------------------------------------------------*/
+
+Load_region 0x20000000 0x00800000
+{
+
+    Fixed_region 0x20000000
+    {
+        * (RESET +First)
+       .ANY (+RO +RW)
+    }
+
+    ARM_LIB_HEAP +0 EMPTY 0x1000
+    {
+    }
+
+    ARM_LIB_STACK +0 EMPTY 0x1000
+    {
+    }
+
+    ; Application ZI data (.bss)
+    ER_ZI +0
+    {
+        * (+ZI)
+    }
+  
+    ;Relocate_region 0x200000 0x1000
+    ;{
+    ;    *.o (VECTOR, +First)
+    ;}
+    
+    ;ARM_LIB_HEAP 0x21FFE000 EMPTY 0x1000
+    ;{
+    ;}
+
+    ;ARM_LIB_STACK 0x22000000 EMPTY -0x1000
+    ;{
+    ;}
+}

bsp/at91sam9260/platform/interrupt.c

@@ -24,7 +24,7 @@
 
 #include <rthw.h>
 #include "at91sam926x.h"
-
+#include "interrupt.h"
 #define MAX_HANDLERS    (AIC_IRQS + PIN_IRQS)
 
 extern rt_uint32_t rt_interrupt_nest;
@@ -146,7 +146,7 @@ void at91_aic_init(rt_uint32_t *priority)
      */
     for (i = 0; i < AIC_IRQS; i++) {
         /* Put irq number in Source Vector Register: */
-        at91_sys_write(AT91_AIC_SVR(i), i);
+        at91_sys_write(AT91_AIC_SVR(i), i); // no-used
         /* Active Low interrupt, with the specified priority */
         at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
         //AT91_AIC_SRCTYPE_FALLING
@@ -201,12 +201,11 @@ static void at91_gpio_irq_init()
  */
 void rt_hw_interrupt_init(void)
 {
-    rt_int32_t i;
     register rt_uint32_t idx;
     rt_uint32_t *priority = at91sam9260_default_irq_priority;
     
-    at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
-            | (1 << AT91SAM9260_ID_IRQ2);
+    at91_extern_irq = (1UL << AT91SAM9260_ID_IRQ0) | (1UL << AT91SAM9260_ID_IRQ1)
+            | (1UL << AT91SAM9260_ID_IRQ2);
 
     /* Initialize the AIC interrupt controller */
     at91_aic_init(priority);
@@ -341,7 +340,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
 
 /*@}*/
 
-
+/*
 static int at91_aic_set_type(unsigned irq, unsigned type)
 {
     unsigned int smr, srctype;
@@ -354,13 +353,15 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
         srctype = AT91_AIC_SRCTYPE_RISING;
         break;
     case IRQ_TYPE_LEVEL_LOW:
-        if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))     /* only supported on external interrupts */
+        // only supported on external interrupts 
+        if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))     
             srctype = AT91_AIC_SRCTYPE_LOW;
         else
             return -1;
         break;
     case IRQ_TYPE_EDGE_FALLING:
-        if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))     /* only supported on external interrupts */
+        // only supported on external interrupts 
+        if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))     
             srctype = AT91_AIC_SRCTYPE_FALLING;
         else
             return -1;
@@ -373,6 +374,35 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
     at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
     return 0;
 }
+*/
+rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq)
+{
+
+    //volatile rt_uint32_t irqstat;
+    rt_uint32_t id;
+    if (fiq_irq == INT_FIQ)
+        return 0;
+
+    //IRQ
+    /* AIC need this dummy read */
+    at91_sys_read(AT91_AIC_IVR);
+    /* clear pending register */
+    id = at91_sys_read(AT91_AIC_ISR);
+
+    return id;
+}
+
+void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
+{
+    /* new FIQ generation */
+    if (fiq_irq == INT_FIQ)
+        return;
+
+    /* new IRQ generation */
+    // EIOCR must be write any value after interrupt,
+    // or else can't response next interrupt
+    at91_sys_write(AT91_AIC_EOICR, 0x0);
+}
 
 #ifdef RT_USING_FINSH
 void list_irq(void)

bsp/at91sam9260/platform/interrupt.h

@@ -0,0 +1,31 @@
+/*
+ * File      : interrupt.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+#ifndef __INTERRUPT_H__
+#define __INTERRUPT_H__
+
+#define INT_IRQ     0x00
+#define INT_FIQ     0x01
+
+
+#endif

bsp/at91sam9260/platform/rt_low_level_gcc.inc

@@ -0,0 +1,31 @@
+/*
+ * File      : rt_low_level_gcc.inc
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+
+/*--------- Stack size of CPU modes ------------------------------------------*/
+.equ UND_STK_SIZE,    2048
+.equ SVC_STK_SIZE,    4096
+.equ ABT_STK_SIZE,    2048
+.equ IRQ_STK_SIZE,    4096
+.equ FIQ_STK_SIZE,    4096
+.equ SYS_STK_SIZE,    2048

bsp/at91sam9260/platform/rt_low_level_iar.inc

@@ -0,0 +1,31 @@
+/*
+ * File      : rt_low_level_iar.inc
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+ 
+/*-------- Stack size of CPU modes -------------------------------------------*/
+#define UND_STK_SIZE 512
+#define SVC_STK_SIZE 4096
+#define ABT_STK_SIZE 512
+#define IRQ_STK_SIZE 1024
+#define FIQ_STK_SIZE 1024
+#define SYS_STK_SIZE 512

bsp/at91sam9260/platform/rt_low_level_init.c

@@ -0,0 +1,64 @@
+/*
+ * File      : rt_low_level_init.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-04-14     ArdaFu      first version
+ */
+ 
+/* write register a=address, v=value */
+#define write_reg(a,v)	    (*(volatile unsigned int *)(a) = (v))
+/* Processor Reset */
+#define AT91_RSTC_PROCRST   (1 << 0)
+#define AT91_RSTC_PERRST    (1 << 2)
+#define AT91_RSTC_KEY       (0xa5 << 24)
+#define AT91_MATRIX_BASE    (0XFFFFEE00)
+/* Master Remap Control Register */
+#define AT91_MATRIX_MRCR    (AT91_MATRIX_BASE + 0x100)
+/* Remap Command for AHB Master 0 (ARM926EJ-S InSTRuction Master) */
+#define AT91_MATRIX_RCB0    (1 << 0)
+/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define AT91_MATRIX_RCB1    (1 << 1)
+
+#define AT91_AIC_BASE       (0XFFFFF000)
+/* Interrupt DisaBLe Command Register */
+#define AT91_AIC_IDCR       (AT91_AIC_BASE + 0x124)
+/* Interrupt Clear Command Register */
+#define AT91_AIC_ICCR       (AT91_AIC_BASE + 0x128)
+
+#define AT91_WDT_BASE       (0XFFFFFD40)
+#define AT91_WDT_CR         (AT91_WDT_BASE + 0x00)
+#define AT91_WDT_CR_KEY     (0xA5000000)
+#define AT91_WDT_CR_WDRSTT  (0x00000001)
+#define AT91_WDT_MR         (AT91_WDT_BASE + 0x04)
+#define AT91_WDT_MR_WDDIS   (0x00008000)
+
+void rt_low_level_init(void)
+{
+    // Mask all IRQs by clearing all bits in the INTMRS
+    write_reg(AT91_AIC_IDCR, 0xFFFFFFFF);
+    write_reg(AT91_AIC_ICCR, 0xFFFFFFFF);
+    // Remap internal ram to 0x00000000 Address
+    write_reg(AT91_MATRIX_MRCR, AT91_MATRIX_RCB0 | AT91_MATRIX_RCB1);
+    // Disable the watchdog
+    write_reg(AT91_WDT_CR, AT91_WDT_CR_KEY|AT91_WDT_CR_WDRSTT);
+    write_reg(AT91_WDT_MR, AT91_WDT_MR_WDDIS);
+
+}
+

bsp/at91sam9260/platform/rt_low_level_keil.inc

@@ -0,0 +1,32 @@
+;/*
+; * File      : rt_low_level_keil.inc
+; * This file is part of RT-Thread RTOS
+; * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
+; *
+; *  This program is free software; you can redistribute it and/or modify
+; *  it under the terms of the GNU General Public License as published by
+; *  the Free Software Foundation; either version 2 of the License, or
+; *  (at your option) any later version.
+; *
+; *  This program is distributed in the hope that it will be useful,
+; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+; *  GNU General Public License for more details.
+; *
+; *  You should have received a copy of the GNU General Public License along
+; *  with this program; if not, write to the Free Software Foundation, Inc.,
+; *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+; *
+; * Change Logs:
+; * Date           Author       Notes
+; * 2015-04-14     ArdaFu      first version
+; */
+
+;/*-------- Stack size of CPU modes ------------------------------------------*/
+UND_STK_SIZE EQU 512
+SVC_STK_SIZE EQU 4096
+ABT_STK_SIZE EQU 512
+IRQ_STK_SIZE EQU 1024
+FIQ_STK_SIZE EQU 1024
+SYS_STK_SIZE EQU 512
+    END

bsp/at91sam9260/platform/start_gcc.S

@@ -1,392 +0,0 @@
-/*
- * File      : start.S
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Change Logs:
- * Date           Author       Notes
- * 2011-01-13     weety      first version
- */
-
-#define CONFIG_STACKSIZE 	512
-#define S_FRAME_SIZE 		72
-
-#define S_OLD_R0 			68
-#define S_PSR  				64
-#define S_PC  				60
-#define S_LR  				56
-#define S_SP  				52
-
-#define S_IP  					48
-#define S_FP  				44
-#define S_R10  				40
-#define S_R9  				36
-#define S_R8  				32
-#define S_R7  				28
-#define S_R6  				24
-#define S_R5  				20
-#define S_R4  				16
-#define S_R3  				12
-#define S_R2  				8
-#define S_R1  				4
-#define S_R0 				0
-
-.equ 	USERMODE, 			0x10
-.equ 	FIQMODE,			0x11
-.equ 	IRQMODE,			0x12
-.equ 	SVCMODE,			0x13
-.equ 	ABORTMODE,			0x17
-.equ 	UNDEFMODE,			0x1b
-.equ 	MODEMASK,			0x1f
-.equ 	NOINT,				0xc0
-
-.equ 	RAM_BASE,			0x00000000	/*Start address of RAM		*/
-.equ 	ROM_BASE,			0x20000000	/*Start address of Flash	*/
-
-
-#define		AT91_RSTC_PROCRST	(1 << 0)		/* Processor Reset */
-#define		AT91_RSTC_PERRST	(1 << 2)
-#define		AT91_RSTC_KEY		(0xa5 << 24)
-#define 	AT91_MATRIX_BASE	0xffffee00
-#define 	AT91_MATRIX_MRCR	(AT91_MATRIX_BASE + 0x100)	/* Master Remap Control Register */
-#define		AT91_MATRIX_RCB0		(1 << 0)	/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define		AT91_MATRIX_RCB1		(1 << 1)	/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define		AT91_AIC_BASE	0xfffff000
-#define		AT91_AIC_IDCR	0x124	/* Interrupt Disable Command Register */
-#define		AT91_AIC_ICCR	0x128	/* Interrupt Clear Command Register */
-
-
-/*
- *************************************************************************
- *
- * Jump vector table
- *
- *************************************************************************
- */
-
-.section .init, "ax"
-.code 32
-
-.globl _start
-_start:
-	b		reset
-	ldr		pc, _vector_undef
-	ldr		pc, _vector_swi
-	ldr		pc, _vector_pabt
-	ldr		pc, _vector_dabt
-	ldr		pc, _vector_resv
-	ldr		pc, _vector_irq
-	ldr		pc, _vector_fiq
-
-_vector_undef:	.word vector_undef
-_vector_swi:	.word vector_swi
-_vector_pabt:	.word vector_pabt
-_vector_dabt:	.word vector_dabt
-_vector_resv:	.word vector_resv
-_vector_irq:	.word vector_irq
-_vector_fiq:	.word vector_fiq
-
-.balignl 	16,0xdeadbeef
-
-/*
- *************************************************************************
- *
- * Startup Code (reset vector)
- * relocate armboot to ram
- * setup stack
- * jump to second stage
- *
- *************************************************************************
- */
-
-_TEXT_BASE:
-	.word	TEXT_BASE
-
-/*
- * rtthread kernel start and end
- * which are defined in linker script
- */
-.globl _rtthread_start
-_rtthread_start:
-	.word _start
-	
-.globl _rtthread_end
-_rtthread_end:
-	.word  _end
-
-/*
- * rtthread bss start and end which are defined in linker script
- */
-.globl _bss_start
-_bss_start:	
-	.word __bss_start
-	
-.globl _bss_end
-_bss_end:
-	.word __bss_end
-
-/* IRQ stack memory (calculated at run-time) 						*/
-.globl IRQ_STACK_START
-IRQ_STACK_START:
-	.word _irq_stack_start + 1024
-	
-.globl FIQ_STACK_START
-FIQ_STACK_START:
-	.word _fiq_stack_start + 1024
-	
-.globl UNDEFINED_STACK_START
-UNDEFINED_STACK_START:
-	.word _undefined_stack_start + CONFIG_STACKSIZE
-	
-.globl ABORT_STACK_START
-ABORT_STACK_START:
-	.word _abort_stack_start + CONFIG_STACKSIZE
-	
-.globl _STACK_START
-_STACK_START:
-	.word _svc_stack_start + 4096
-
-/* ----------------------------------entry------------------------------*/
-reset:
-	
-	/* set the cpu to SVC32 mode 	*/
-	mrs		r0,cpsr
-	bic		r0,r0,#MODEMASK
-	orr		r0,r0,#SVCMODE
-	msr		cpsr,r0
-
-	/* mask all IRQs by clearing all bits in the INTMRs 				*/
-	ldr	r1, =AT91_AIC_BASE
-	ldr	r0, =0xffffffff
-	str	r0, [r1, #AT91_AIC_IDCR]
-	str	r0, [r1, #AT91_AIC_ICCR]
-	
-
-	/*remap internal ram to 0x00000000 address*/
-	ldr	r0, =AT91_MATRIX_MRCR
-	ldr	r1, =(AT91_MATRIX_RCB0|AT91_MATRIX_RCB1)
-	str	r1, [r0]
-
-	/* set interrupt vector 		*/
-	ldr 	r0, _TEXT_BASE
-	mov	r1, #0x00
-	add	r2, r0, #0x40			/* size, 32bytes         			*/
-
-copy_loop:
-	ldmia	r0!, {r3-r10}			/* copy from source address [r0]    */
-	stmia	r1!, {r3-r10}			/* copy to   target address [r1]    */
-	cmp		r0, r2					/* until source end addreee [r2]    */
-	ble		copy_loop
-	
-	/* setup stack */
-	bl		stack_setup
-
-	/* clear .bss */
-	mov   	r0,#0                   /* get a zero 						*/
-	ldr   	r1,=__bss_start         /* bss start 						*/
-	ldr   	r2,=__bss_end           /* bss end 							*/
-	
-bss_loop:
-	cmp   	r1,r2                   /* check if data to clear 			*/
-	strlo 	r0,[r1],#4              /* clear 4 bytes 					*/
-	blo   	bss_loop                /* loop until done 					*/
-
-	/* call C++ constructors of global objects 							*/
-	ldr 	r0, =__ctors_start__
-	ldr 	r1, =__ctors_end__
-	
-ctor_loop:
-	cmp 	r0, r1
-	beq 	ctor_end
-	ldr 	r2, [r0], #4
-	stmfd 	sp!, {r0-r1}
-	mov 	lr, pc
-	bx 		r2
-	ldmfd 	sp!, {r0-r1}
-	b		ctor_loop
-	
-ctor_end:
-
-	/* start RT-Thread Kernel 		*/
-	ldr		pc, _rtthread_startup
-
-_rtthread_startup: 
-	.word rtthread_startup
-#if defined (__FLASH_BUILD__)
-_load_address: 
-	.word ROM_BASE + _TEXT_BASE
-#else
-_load_address: 
-	.word RAM_BASE + _TEXT_BASE
-#endif
-
-.global cpu_reset
-cpu_reset:
-	ldr	r0, =0xfffffd00
-	ldr	r1, =(AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST)
-	str	r1, [r0]
-	mov	pc, lr
-
-/*
- *************************************************************************
- *
- * Interrupt handling
- *
- *************************************************************************
- */
-
-/* exception handlers 				*/
-	.align  5
-vector_undef:
-	sub 	sp, sp, #S_FRAME_SIZE
-	stmia 	sp, {r0 - r12}   		/* Calling r0-r12					*/
-	add		r8, sp, #S_PC
-	stmdb   r8, {sp, lr}^           /* Calling SP, LR					*/
-	str		lr, [r8, #0]            /* Save calling PC					*/
-	mrs		r6, spsr
-	str		r6, [r8, #4]            /* Save CPSR						*/
-	str		r0, [r8, #8]            /* Save OLD_R0						*/
-	mov		r0, sp
-
-	bl		rt_hw_trap_udef
-
-	.align	5
-vector_swi:
-	bl 		rt_hw_trap_swi
-
-	.align	5
-vector_pabt:
-	bl 		rt_hw_trap_pabt
-
-	.align	5
-vector_dabt:
-	sub 	sp, sp, #S_FRAME_SIZE
-	stmia 	sp, {r0 - r12}   		/* Calling r0-r12					*/
-	add		r8, sp, #S_PC
-	stmdb   r8, {sp, lr}^           /* Calling SP, LR					*/
-	str		lr, [r8, #0]            /* Save calling PC					*/
-	mrs		r6, spsr
-	str		r6, [r8, #4]            /* Save CPSR						*/
-	str		r0, [r8, #8]            /* Save OLD_R0						*/
-	mov		r0, sp
-
-	bl 		rt_hw_trap_dabt
-
-	.align	5
-vector_resv:
-	bl 		rt_hw_trap_resv
-
-.globl 		rt_interrupt_enter
-.globl 		rt_interrupt_leave
-.globl 		rt_thread_switch_interrupt_flag
-.globl 		rt_interrupt_from_thread
-.globl 		rt_interrupt_to_thread
-vector_irq:
-	stmfd	sp!, {r0-r12,lr}
-	bl		rt_interrupt_enter
-	bl		rt_hw_trap_irq
-	bl		rt_interrupt_leave
-
-	/* if rt_thread_switch_interrupt_flag set, jump to _interrupt_thread_switch and don't return */
-	ldr		r0, =rt_thread_switch_interrupt_flag
-	ldr		r1, [r0]
-	cmp		r1, #1
-	beq		_interrupt_thread_switch
-
-	ldmfd	sp!, {r0-r12,lr}
-	subs	pc, lr, #4
-
-	.align	5
-vector_fiq:
-	stmfd	sp!,{r0-r7,lr}
-	bl 		rt_hw_trap_fiq
-	ldmfd	sp!,{r0-r7,lr}
-	subs	pc,lr,#4
-
-_interrupt_thread_switch:
-	mov		r1,  #0					/* clear rt_thread_switch_interrupt_flag*/
-	str		r1,  [r0]
-
-	ldmfd	sp!, {r0-r12,lr}		/* reload saved registers			*/
-	stmfd	sp!, {r0-r3}			/* save r0-r3						*/
-	mov		r1,  sp
-	add		sp,  sp, #16			/* restore sp						*/
-	sub		r2,  lr, #4				/* save old task's pc to r2			*/
-	
-	mrs		r3,  spsr				/* disable interrupt				*/
-	orr		r0,  r3, #NOINT
-	msr		spsr_c, r0
-
-	ldr		r0,  =.+8				/* switch to interrupted task's stack*/
-	movs	pc,  r0
-
-	stmfd	sp!, {r2}				/* push old task's pc				*/
-	stmfd	sp!, {r4-r12,lr}		/* push old task's lr,r12-r4		*/
-	mov		r4,  r1					/* Special optimised code below		*/
-	mov		r5,  r3
-	ldmfd	r4!, {r0-r3}
-	stmfd	sp!, {r0-r3}			/* push old task's r3-r0			*/
-	stmfd	sp!, {r5}				/* push old task's psr				*/
-	mrs		r4,  spsr
-	stmfd	sp!, {r4}				/* push old task's spsr				*/
-
-	ldr		r4,  =rt_interrupt_from_thread
-	ldr		r5,  [r4]
-	str		sp,  [r5]				/* store sp in preempted tasks's TCB*/
-
-	ldr	r6,  =rt_interrupt_to_thread
-	ldr	r6,  [r6]
-	ldr	sp,  [r6]					/* get new task's stack pointer		*/
-
-	ldmfd	sp!, {r4}				/* pop new task's spsr				*/
-	msr		SPSR_cxsf, r4
-	ldmfd	sp!, {r4}				/* pop new task's psr				*/
-	msr		CPSR_cxsf, r4
-
-	ldmfd	sp!, {r0-r12,lr,pc}		/* pop new task's r0-r12,lr & pc	*/
-
-stack_setup:
-	mrs		r0, cpsr
-	bic		r0, r0, #MODEMASK
-	orr		r1, r0, #UNDEFMODE|NOINT
-	msr		cpsr_cxsf, r1			/* undef mode						*/
-	ldr		sp, UNDEFINED_STACK_START
-
-	orr		r1,r0,#ABORTMODE|NOINT
-	msr		cpsr_cxsf,r1			/* abort mode						*/
-	ldr		sp, ABORT_STACK_START
-
-	orr		r1,r0,#IRQMODE|NOINT
-	msr		cpsr_cxsf,r1			/* IRQ mode							*/
-	ldr		sp, IRQ_STACK_START
-
-	orr		r1,r0,#FIQMODE|NOINT
-	msr		cpsr_cxsf,r1			/* FIQ mode							*/
-	ldr		sp, FIQ_STACK_START
-
-	bic		r0,r0,#MODEMASK
-	orr		r1,r0,#SVCMODE|NOINT
-	msr		cpsr_cxsf,r1			/* SVC mode							*/
-
-	ldr		sp, _STACK_START
-
-	/* USER mode is not initialized. */
-	mov		pc,lr					/* The LR register may be not valid for the mode changes.*/
-
-/*/*}*/
-
-

bsp/at91sam9260/platform/start_rvds.S

@@ -1,325 +0,0 @@
-;/*
-; * File      : start_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
-; *
-; *  This program is free software; you can redistribute it and/or modify
-; *  it under the terms of the GNU General Public License as published by
-; *  the Free Software Foundation; either version 2 of the License, or
-; *  (at your option) any later version.
-; *
-; *  This program is distributed in the hope that it will be useful,
-; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-; *  GNU General Public License for more details.
-; *
-; *  You should have received a copy of the GNU General Public License along
-; *  with this program; if not, write to the Free Software Foundation, Inc.,
-; *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-; *
-; * Change Logs:
-; * Date           Author       Notes
-; * 2011-08-14     weety      first version
-; */
-
-
-; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
-
-Mode_USR        EQU     0x10
-Mode_FIQ        EQU     0x11
-Mode_IRQ        EQU     0x12
-Mode_SVC        EQU     0x13
-Mode_ABT        EQU     0x17
-Mode_UND        EQU     0x1B
-Mode_SYS        EQU     0x1F
-
-SVCMODE         EQU   		0x13
-MODEMASK        EQU   		0x1f
-
-I_Bit           EQU     0x80            ; when I bit is set, IRQ is disabled
-F_Bit           EQU     0x40            ; when F bit is set, FIQ is disabled
-
-
-;----------------------- Stack and Heap Definitions ----------------------------
-
-;// <h> Stack Configuration (Stack Sizes in Bytes)
-;//   <o0> Undefined Mode      <0x0-0xFFFFFFFF:8>
-;//   <o1> Supervisor Mode     <0x0-0xFFFFFFFF:8>
-;//   <o2> Abort Mode          <0x0-0xFFFFFFFF:8>
-;//   <o3> Fast Interrupt Mode <0x0-0xFFFFFFFF:8>
-;//   <o4> Interrupt Mode      <0x0-0xFFFFFFFF:8>
-;//   <o5> User/System Mode    <0x0-0xFFFFFFFF:8>
-;// </h>
-
-UND_Stack_Size  EQU     512
-SVC_Stack_Size  EQU     4096
-ABT_Stack_Size  EQU     512
-FIQ_Stack_Size  EQU     1024
-IRQ_Stack_Size  EQU     1024
-USR_Stack_Size  EQU     512
-
-ISR_Stack_Size  EQU     (UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + \
-                         FIQ_Stack_Size + IRQ_Stack_Size)
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-
-Stack_Mem       SPACE   USR_Stack_Size
-__initial_sp    SPACE   ISR_Stack_Size
-Stack_Top
-
-
-;// <h> Heap Configuration
-;//   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF>
-;// </h>
-
-Heap_Size       EQU     0x00000000
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
-
-;----------------------- Memory Definitions ------------------------------------
-
-AT91_MATRIX_BASE    EQU  0xffffee00
-AT91_MATRIX_MRCR	   EQU  (AT91_MATRIX_BASE + 0x100)
-AT91_MATRIX_RCB0    EQU  0x00000001
-AT91_MATRIX_RCB1    EQU  0x00000002
-AT91_AIC_BASE       EQU  0xfffff000
-AT91_AIC_IDCR       EQU  0x124
-AT91_AIC_ICCR       EQU  0x128
-
-;----------------------- CODE --------------------------------------------------
-
-                PRESERVE8
-
-
-; Area Definition and Entry Point
-;  Startup Code must be linked first at Address at which it expects to run.
-
-                AREA    RESET, CODE, READONLY
-                ARM
-
-; Exception Vectors
-;  Mapped to Address 0.
-;  Absolute addressing mode must be used.
-;  Dummy Handlers are implemented as infinite loops which can be modified.
-
-				EXPORT Entry_Point
-Entry_Point
-Vectors         LDR     PC, Reset_Addr
-                LDR     PC, Undef_Addr
-                LDR     PC, SWI_Addr
-                LDR     PC, PAbt_Addr
-                LDR     PC, DAbt_Addr
-		NOP
-                LDR     PC, IRQ_Addr
-                LDR     PC, FIQ_Addr
-
-Reset_Addr      DCD     Reset_Handler
-Undef_Addr      DCD     Undef_Handler
-SWI_Addr        DCD     SWI_Handler
-PAbt_Addr       DCD     PAbt_Handler
-DAbt_Addr       DCD     DAbt_Handler
-                DCD     0                   ; Reserved Address
-IRQ_Addr        DCD     IRQ_Handler
-FIQ_Addr        DCD     FIQ_Handler
-
-Undef_Handler   B       Undef_Handler
-SWI_Handler     B       SWI_Handler
-PAbt_Handler    B       PAbt_Handler
-;DAbt_Handler    B       DAbt_Handler
-FIQ_Handler     B       FIQ_Handler
-
-;*
-;*************************************************************************
-;*
-;* Interrupt handling
-;*
-;*************************************************************************
-;*
-; DAbt Handler
-DAbt_Handler
-               IMPORT rt_hw_trap_dabt
-
-                	sub 	sp, sp, #72
-	                stmia 	sp, {r0 - r12}   		;/* Calling r0-r12					*/
-                    add		r8, sp, #60
-	                stmdb   r8, {sp, lr}            ;/* Calling SP, LR					*/
-	                str		lr, [r8, #0]            ;/* Save calling PC					*/
-	                mrs		r6, spsr
-	                str		r6, [r8, #4]            ;/* Save CPSR						*/
-	                str		r0, [r8, #8]            ;/* Save OLD_R0						*/
-	                mov		r0, sp
-
-	                bl 		rt_hw_trap_dabt
-
-
-;##########################################
-; Reset Handler
-
-                EXPORT  Reset_Handler
-Reset_Handler
-
-
-; set the cpu to SVC32 mode-----------------------------------------------------
-
-                MRS		R0,CPSR
-               	BIC		R0,R0,#MODEMASK
-	               ORR		R0,R0,#SVCMODE
-	               MSR		CPSR_cxsf,R0
-                LDR	R1, =AT91_AIC_BASE
-	               LDR	R0, =0xffffffff
-	               STR	R0, [R1, #AT91_AIC_IDCR]
-	               STR	R0, [R1, #AT91_AIC_ICCR]
-
-; remap internal ram to 0x00000000 address
-	               LDR	R0, =AT91_MATRIX_MRCR
-	               LDR	R1, =(AT91_MATRIX_RCB0|AT91_MATRIX_RCB1)
-	               STR	R1, [R0]
-
-
-; Copy Exception Vectors to Internal RAM ---------------------------------------
-
-                ADR     R8,  Vectors    ; Source
-                LDR     R9, =0x00  ; Destination
-                LDMIA   R8!, {R0-R7}    ; Load Vectors
-                STMIA   R9!, {R0-R7}    ; Store Vectors
-                LDMIA   R8!, {R0-R7}    ; Load Handler Addresses
-                STMIA   R9!, {R0-R7}    ; Store Handler Addresses
-
-
-; Setup Stack for each mode ----------------------------------------------------
-
-                LDR     R0, =Stack_Top
-
-;  Enter Undefined Instruction Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_UND:OR:I_Bit:OR:F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #UND_Stack_Size
-
-;  Enter Abort Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_ABT:OR:I_Bit:OR:F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #ABT_Stack_Size
-
-;  Enter FIQ Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #FIQ_Stack_Size
-
-;  Enter IRQ Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #IRQ_Stack_Size
-
-;  Enter Supervisor Mode and set its Stack Pointer
-                MSR     CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit
-                MOV     SP, R0
-                SUB     R0, R0, #SVC_Stack_Size
-
-;  Enter User Mode and set its Stack Pointer
-                ; MSR     CPSR_c, #Mode_USR
-                MOV     SP, R0
-                SUB     SL, SP, #USR_Stack_Size
-
-; Enter the C code -------------------------------------------------------------
-
-                IMPORT  __main
-                LDR     R0, =__main
-                BX      R0
-
-                IMPORT rt_interrupt_enter
-                IMPORT rt_interrupt_leave
-                IMPORT rt_thread_switch_interrupt_flag
-                IMPORT rt_interrupt_from_thread
-                IMPORT rt_interrupt_to_thread
-                IMPORT rt_hw_trap_irq
-
-IRQ_Handler     PROC
-                EXPORT IRQ_Handler
-                STMFD   sp!, {r0-r12,lr}
-                BL  rt_interrupt_enter
-                BL  rt_hw_trap_irq
-                BL  rt_interrupt_leave
-
-                ; if rt_thread_switch_interrupt_flag set, jump to
-                ; rt_hw_context_switch_interrupt_do and don't return
-                LDR r0, =rt_thread_switch_interrupt_flag
-                LDR r1, [r0]
-                CMP r1, #1
-                BEQ rt_hw_context_switch_interrupt_do
-
-                LDMFD   sp!, {r0-r12,lr}
-                SUBS    pc, lr, #4
-                ENDP
-
-; /*
-; * void rt_hw_context_switch_interrupt_do(rt_base_t flag)
-; */
-rt_hw_context_switch_interrupt_do   PROC
-                EXPORT rt_hw_context_switch_interrupt_do
-                MOV     r1,  #0         ; clear flag
-                STR     r1,  [r0]
-
-                LDMFD   sp!, {r0-r12,lr}; reload saved registers
-                STMFD   sp!, {r0-r3}    ; save r0-r3
-                MOV     r1,  sp
-                ADD     sp,  sp, #16    ; restore sp
-                SUB     r2,  lr, #4     ; save old task's pc to r2
-
-                MRS     r3,  spsr       ; get cpsr of interrupt thread
-
-                ; switch to SVC mode and no interrupt
-				MSR 	cpsr_c, #I_Bit:OR:F_Bit:OR:Mode_SVC
-
-                STMFD   sp!, {r2}       ; push old task's pc
-                STMFD   sp!, {r4-r12,lr}; push old task's lr,r12-r4
-                MOV     r4,  r1         ; Special optimised code below
-                MOV     r5,  r3
-                LDMFD   r4!, {r0-r3}
-                STMFD   sp!, {r0-r3}    ; push old task's r3-r0
-                STMFD   sp!, {r5}       ; push old task's cpsr
-                MRS     r4,  spsr
-                STMFD   sp!, {r4}       ; push old task's spsr
-
-                LDR     r4,  =rt_interrupt_from_thread
-                LDR     r5,  [r4]
-                STR     sp,  [r5]       ; store sp in preempted tasks's TCB
-
-                LDR     r6,  =rt_interrupt_to_thread
-                LDR     r6,  [r6]
-                LDR     sp,  [r6]       ; get new task's stack pointer
-
-                LDMFD   sp!, {r4}       ; pop new task's spsr
-                MSR     spsr_cxsf, r4
-                LDMFD   sp!, {r4}       ; pop new task's psr
-                MSR     cpsr_cxsf, r4
-
-                LDMFD   sp!, {r0-r12,lr,pc} ; pop new task's r0-r12,lr & pc
-                ENDP
-
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-; User Initial Stack & Heap
-                AREA    |.text|, CODE, READONLY
-
-                IMPORT  __use_two_region_memory
-                EXPORT  __user_initial_stackheap
-__user_initial_stackheap
-
-                LDR     R0, =  Heap_Mem
-                LDR     R1, =(Stack_Mem + USR_Stack_Size)
-                LDR     R2, = (Heap_Mem +      Heap_Size)
-                LDR     R3, = Stack_Mem
-                BX      LR
-                ENDIF
-
-
-                END
-

bsp/at91sam9260/platform/trap.c

@@ -1,185 +0,0 @@
-/*
- * File      : trap.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Change Logs:
- * Date           Author       Notes
- * 2011-01-13     weety      modified from mini2440
- */
-
-#include <rtthread.h>
-#include <rthw.h>
-
-#include "at91sam926x.h"
-
-/**
- * @addtogroup AT91SAM926X
- */
-/*@{*/
-
-extern struct rt_thread *rt_current_thread;
-#ifdef RT_USING_FINSH
-extern long list_thread(void);
-#endif
-
-/**
- * this function will show registers of CPU
- *
- * @param regs the registers point
- */
-
-void rt_hw_show_register (struct rt_hw_register *regs)
-{
-	rt_kprintf("Execption:\n");
-	rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
-	rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
-	rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
-	rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
-	rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
-	rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
-}
-
-/**
- * When ARM7TDMI comes across an instruction which it cannot handle,
- * it takes the undefined instruction trap.
- *
- * @param regs system registers
- *
- * @note never invoke this function in application
- */
-void rt_hw_trap_udef(struct rt_hw_register *regs)
-{
-	rt_hw_show_register(regs);
-
-	rt_kprintf("undefined instruction\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
-
-#ifdef RT_USING_FINSH
-	list_thread();
-#endif
-	rt_hw_cpu_shutdown();
-}
-
-/**
- * The software interrupt instruction (SWI) is used for entering
- * Supervisor mode, usually to request a particular supervisor
- * function.
- *
- * @param regs system registers
- *
- * @note never invoke this function in application
- */
-void rt_hw_trap_swi(struct rt_hw_register *regs)
-{
-	rt_hw_show_register(regs);
-
-	rt_kprintf("software interrupt\n");
-	rt_hw_cpu_shutdown();
-}
-
-/**
- * An abort indicates that the current memory access cannot be completed,
- * which occurs during an instruction prefetch.
- *
- * @param regs system registers
- *
- * @note never invoke this function in application
- */
-void rt_hw_trap_pabt(struct rt_hw_register *regs)
-{
-	rt_hw_show_register(regs);
-
-	rt_kprintf("prefetch abort\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
-
-#ifdef RT_USING_FINSH
-	list_thread();
-#endif
-	rt_hw_cpu_shutdown();
-}
-
-/**
- * An abort indicates that the current memory access cannot be completed,
- * which occurs during a data access.
- *
- * @param regs system registers
- *
- * @note never invoke this function in application
- */
-void rt_hw_trap_dabt(struct rt_hw_register *regs)
-{
-	rt_hw_show_register(regs);
-
-	rt_kprintf("data abort\n");
-	rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
-
-#ifdef RT_USING_FINSH
-	list_thread();
-#endif
-	rt_hw_cpu_shutdown();
-}
-
-/**
- * Normally, system will never reach here
- *
- * @param regs system registers
- *
- * @note never invoke this function in application
- */
-void rt_hw_trap_resv(struct rt_hw_register *regs)
-{
-	rt_kprintf("not used\n");
-	rt_hw_show_register(regs);
-	rt_hw_cpu_shutdown();
-}
-
-extern struct rt_irq_desc irq_desc[];
-
-void rt_hw_trap_irq()
-{
-	rt_isr_handler_t isr_func;
-	rt_uint32_t irqstat, irq, mask;
-	void *param;
-	//rt_kprintf("irq interrupt request\n");
-	/* get irq number */
-	irq = at91_sys_read(AT91_AIC_IVR);
-	/* clear pending register */
-	irqstat = at91_sys_read(AT91_AIC_ISR);
-	if (irqstat == 0)
-	{
-		rt_kprintf("No interrupt occur\n");
-		at91_sys_write(AT91_AIC_EOICR, 0);
-		return;
-	}
-	
-	/* get interrupt service routine */
-	isr_func = irq_desc[irq].handler;
-	param = irq_desc[irq].param;
-
-	/* turn to interrupt service routine */
-	isr_func(irq, param);
-	at91_sys_write(AT91_AIC_EOICR, 0x55555555); //EIOCR must be write any value after interrupt, or else can't response next interrupt
-    irq_desc[irq].counter ++;
-}
-
-void rt_hw_trap_fiq()
-{
-	rt_kprintf("fast interrupt request\n");
-}
-
-/*@}*/

bsp/at91sam9260/rtconfig.py

@@ -1,26 +1,23 @@
 import os
-
-# toolchains options
 ARCH     = 'arm'
 CPU      = 'arm926'
-TextBase = '0x20000000'
-
+# toolchains options
 CROSS_TOOL 	= 'gcc'
 
+#------- toolchains path -------------------------------------------------------
 if os.getenv('RTT_CC'):
 	CROSS_TOOL = os.getenv('RTT_CC')
 
 if  CROSS_TOOL == 'gcc':
 	PLATFORM 	= 'gcc'
-	EXEC_PATH 	= '/opt/arm-2010q1/bin/'
+	EXEC_PATH 	= 'D:/ArdaArmTools/Sourcery_Lite/bin'
+	#EXEC_PATH 	= 'D:/ArdaArmTools/GNUARM_4.9_2015q1/bin'
 elif CROSS_TOOL == 'keil':
 	PLATFORM 	= 'armcc'
-	EXEC_PATH 	= 'C:/Keil'
+	EXEC_PATH 	= 'C:/Keil_v5'
 elif CROSS_TOOL == 'iar':
-    print '================ERROR============================'
-    print 'Not support yet!'
-    print '================================================='
-    exit(0)
+	PLATFORM 	= 'iar'
+	IAR_PATH 	= 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.0'
 
 if os.getenv('RTT_EXEC_PATH'):
 	EXEC_PATH = os.getenv('RTT_EXEC_PATH')
@@ -28,6 +25,12 @@ if os.getenv('RTT_EXEC_PATH'):
 #BUILD = 'debug'
 BUILD = 'release'
 
+CORE = 'arm926ej-s'
+MAP_FILE = 'rtthread_at91sam9260.map'
+LINK_FILE = 'link_scripts/at91sam9260_ram'
+TARGET_NAME = 'rtthread.bin'
+
+#------- GCC settings ----------------------------------------------------------
 if PLATFORM == 'gcc':
     # toolchains
     PREFIX = 'arm-none-eabi-'
@@ -43,8 +46,11 @@ if PLATFORM == 'gcc':
 
     DEVICE = ' -mcpu=arm926ej-s'
     CFLAGS = DEVICE
-    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase
-    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_at91sam9260.map,-cref,-u,_start -T at91sam9260_ram.ld' + ' -Ttext ' + TextBase
+    AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
+    AFLAGS += ' -Iplatform'
+    LFLAGS = DEVICE
+    LFLAGS += ' -Wl,--gc-sections,-cref,-Map=' + MAP_FILE
+    LFLAGS += ' -T ' + LINK_FILE + '.ld'
 
     CPATH = ''
     LPATH = ''
@@ -55,8 +61,9 @@ if PLATFORM == 'gcc':
     else:
         CFLAGS += ' -O2'
 
-    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
-
+    POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n' 
+    POST_ACTION += SIZE + ' $TARGET\n'
+#------- Keil settings ---------------------------------------------------------
 elif PLATFORM == 'armcc':
     # toolchains
     CC = 'armcc'
@@ -64,16 +71,15 @@ elif PLATFORM == 'armcc':
     AR = 'armar'
     LINK = 'armlink'
     TARGET_EXT = 'axf'
+    EXEC_PATH += '/arm/armcc/bin/'
 
-    DEVICE = ' --device DARMATS9'
+    DEVICE = ' --cpu=' + CORE
     CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
-    AFLAGS = DEVICE
-    LFLAGS = DEVICE + ' --strict --info sizes --info totals --info unused --info veneers --list rtthread-at91sam9260.map --ro-base 0x20000000 --entry Entry_Point --first Entry_Point'
-
-    CFLAGS += ' -I"' + EXEC_PATH + '/ARM/RV31/INC"'
-    LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/RV31/LIB"'
-
-    EXEC_PATH += '/arm/bin40/'
+    AFLAGS = DEVICE + ' -Iplatform'
+    LFLAGS = DEVICE + ' --strict'
+    LFLAGS += ' --info sizes --info totals --info unused --info veneers'
+    LFLAGS += ' --list ' + MAP_FILE
+    LFLAGS += ' --scatter  ' + LINK_FILE + '.scat'
 
     if BUILD == 'debug':
         CFLAGS += ' -g -O0'
@@ -81,4 +87,53 @@ elif PLATFORM == 'armcc':
     else:
         CFLAGS += ' -O2'
 
-    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+    POST_ACTION = 'fromelf --bin $TARGET --output ' + TARGET_NAME + ' \n'
+    POST_ACTION += 'fromelf -z $TARGET\n'
+#------- IAR settings ----------------------------------------------------------
+elif PLATFORM == 'iar':
+    # toolchains
+    CC = 'iccarm'
+    AS = 'iasmarm'
+    AR = 'iarchive'
+    LINK = 'ilinkarm'
+    TARGET_EXT = 'out'
+
+    DEVICE = CORE
+
+    CFLAGS = '--cpu=' + DEVICE
+    CFLAGS += ' --diag_suppress Pa050'
+    CFLAGS += ' --no_cse'
+    CFLAGS += ' --no_unroll'
+    CFLAGS += ' --no_inline'
+    CFLAGS += ' --no_code_motion'
+    CFLAGS += ' --no_tbaa'
+    CFLAGS += ' --no_clustering'
+    CFLAGS += ' --no_scheduling'
+
+    CFLAGS += ' --endian=little'
+    CFLAGS += ' -e'
+    CFLAGS += ' --fpu=none'
+    CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+    CFLAGS += ' --silent'
+
+    AFLAGS = '--cpu '+ DEVICE
+    AFLAGS += ' -s+'
+    AFLAGS += ' -w+'
+    AFLAGS += ' -r'
+    AFLAGS += ' --fpu none'
+    AFLAGS += ' -S'
+    AFLAGS += ' -Iplatform'
+    
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
+
+    LFLAGS = '--config ' + LINK_FILE +'.icf'
+    LFLAGS += ' --entry __iar_program_start'
+    LFLAGS += ' --map ' + MAP_FILE
+    LFLAGS += ' --silent'
+
+    EXEC_PATH = IAR_PATH + '/arm/bin/'
+    POST_ACTION = 'ielftool  --silent --bin $TARGET ' + TARGET_NAME

bsp/beaglebone/applications/application.c

@@ -24,9 +24,7 @@ int rt_application_init()
 {
     /* do component initialization */
     rt_components_init();
-#ifdef RT_USING_NEWLIB
-	libc_system_init(RT_CONSOLE_DEVICE_NAME);
-#endif
+
 #ifdef RT_USING_GDB
     gdb_set_device("uart4");
     gdb_start();

bsp/beaglebone/rtconfig.h

@@ -122,8 +122,8 @@
 // </section>
 
 // <section name="LIBC" description="C Runtime library setting" default="always" >
-// <bool name="RT_USING_NEWLIB" description="Using newlib library, only available under GNU GCC" default="true" />
-//#define RT_USING_NEWLIB
+// <bool name="RT_USING_LIBC" description="Using C library" default="true" />
+#define RT_USING_LIBC
 // <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
 #define RT_USING_PTHREADS
 // </section>

bsp/frdm-k64f/project.uvproj

@@ -354,7 +354,7 @@
               <MiscControls />
               <Define />
               <Undefine />
-              <IncludePath>.;..\..\components\drivers\include;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;applications;board;device;device\MK64F12</IncludePath>
+              <IncludePath>board;applications;.;device;device/MK64F12;../../include;../../libcpu/arm/cortex-m4;../../libcpu/arm/common;../../components/drivers/include;../../components/drivers/include;../../components/finsh</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -385,51 +385,51 @@
             <ScatterFile />
             <IncludeLibs />
             <IncludeLibsPath />
-            <Misc> --keep __fsym_* --keep __vsym_* </Misc>
+            <Misc> --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
             <LinkerInputFile />
             <DisabledWarnings />
           </LDads>
         </TargetArmAds>
       </TargetOption>
       <Groups>
-        <Group>
-          <GroupName>Applications</GroupName>
-          <Files>
-            <File>
-              <FileName>application.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>applications\application.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>startup.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
-            </File>
-          </Files>
-        </Group>
         <Group>
           <GroupName>Board</GroupName>
           <Files>
             <File>
               <FileName>board.c</FileName>
               <FileType>1</FileType>
-              <FilePath>board\board.c</FilePath>
+              <FilePath>board/board.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>drv_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>board\drv_uart.c</FilePath>
+              <FilePath>board/drv_uart.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>led.c</FileName>
               <FileType>1</FileType>
-              <FilePath>board\led.c</FilePath>
+              <FilePath>board/led.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Applications</GroupName>
+          <Files>
+            <File>
+              <FileName>application.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications/application.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>startup.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications/startup.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -439,14 +439,14 @@
             <File>
               <FileName>system_MK64F12.c</FileName>
               <FileType>1</FileType>
-              <FilePath>device\MK64F12\system_MK64F12.c</FilePath>
+              <FilePath>device/MK64F12/system_MK64F12.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>startup_MK64F12.s</FileName>
               <FileType>2</FileType>
-              <FilePath>device\TOOLCHAIN_ARM_STD\startup_MK64F12.s</FilePath>
+              <FilePath>device/TOOLCHAIN_ARM_STD/startup_MK64F12.s</FilePath>
             </File>
           </Files>
         </Group>
@@ -456,84 +456,91 @@
             <File>
               <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
+              <FilePath>../../src/clock.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/components.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
+              <FilePath>../../src/device.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
+              <FilePath>../../src/idle.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
+              <FilePath>../../src/ipc.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
+              <FilePath>../../src/irq.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
+              <FilePath>../../src/kservice.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
+              <FilePath>../../src/mem.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
+              <FilePath>../../src/mempool.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
+              <FilePath>../../src/object.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>../../src/scheduler.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
+              <FilePath>../../src/thread.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>../../src/timer.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -543,35 +550,35 @@
             <File>
               <FileName>cpuport.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m4/cpuport.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>context_rvds.S</FileName>
               <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m4/context_rvds.S</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>div0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+              <FilePath>../../libcpu/arm/common/div0.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>../../libcpu/arm/common/showmem.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -581,42 +588,49 @@
             <File>
               <FileName>serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\serial\serial.c</FilePath>
+              <FilePath>../../components/drivers/serial/serial.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>completion.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\completion.c</FilePath>
+              <FilePath>../../components/drivers/src/completion.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>dataqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
+              <FilePath>../../components/drivers/src/dataqueue.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>pipe.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
+              <FilePath>../../components/drivers/src/pipe.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>portal.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\portal.c</FilePath>
+              <FilePath>../../components/drivers/src/portal.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>ringbuffer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
+              <FilePath>../../components/drivers/src/ringbuffer.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>workqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/workqueue.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -626,91 +640,91 @@
             <File>
               <FileName>shell.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\shell.c</FilePath>
+              <FilePath>../../components/finsh/shell.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>symbol.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\symbol.c</FilePath>
+              <FilePath>../../components/finsh/symbol.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
+              <FilePath>../../components/finsh/cmd.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_compiler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
+              <FilePath>../../components/finsh/finsh_compiler.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_error.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
+              <FilePath>../../components/finsh/finsh_error.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_heap.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
+              <FilePath>../../components/finsh/finsh_heap.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_init.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
+              <FilePath>../../components/finsh/finsh_init.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_node.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
+              <FilePath>../../components/finsh/finsh_node.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_ops.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
+              <FilePath>../../components/finsh/finsh_ops.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_parser.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
+              <FilePath>../../components/finsh/finsh_parser.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_var.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
+              <FilePath>../../components/finsh/finsh_var.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_vm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
+              <FilePath>../../components/finsh/finsh_vm.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>finsh_token.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
+              <FilePath>../../components/finsh/finsh_token.c</FilePath>
             </File>
           </Files>
         </Group>

bsp/lm4f232/project.uvproj

@@ -343,7 +343,7 @@
               <MiscControls />
               <Define>PART_LM4F232H5QD</Define>
               <Undefine />
-              <IncludePath>.;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m4;Libraries;applications;drivers</IncludePath>
+              <IncludePath>Libraries;applications;.;drivers;../../include;../../libcpu/arm/cortex-m4;../../libcpu/arm/common;../../components/finsh</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -373,27 +373,240 @@
             <ScatterFile />
             <IncludeLibs />
             <IncludeLibsPath />
-            <Misc> --keep __fsym_* --keep __vsym_* </Misc>
+            <Misc> --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
             <LinkerInputFile />
             <DisabledWarnings />
           </LDads>
         </TargetArmAds>
       </TargetOption>
       <Groups>
+        <Group>
+          <GroupName>Libraries</GroupName>
+          <Files>
+            <File>
+              <FileName>adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/adc.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>can.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/can.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>comp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/comp.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>cpu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/cpu.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>eeprom.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/eeprom.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>epi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/epi.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ethernet.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/ethernet.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>fan.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/fan.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/flash.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>fpu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/fpu.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/gpio.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hibernate.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/hibernate.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/i2c.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>i2s.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/i2s.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>interrupt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/interrupt.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>lpc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/lpc.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>mpu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/mpu.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>peci.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/peci.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>pwm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/pwm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>qei.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/qei.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ssi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/ssi.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>sysctl.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/sysctl.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>sysexc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/sysexc.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>systick.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/systick.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/timer.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/uart.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>udma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/udma.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>usb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/usb.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>watchdog.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>Libraries/driverlib/watchdog.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>start_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>Libraries/startup/arm/start_rvds.S</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>Applications</GroupName>
           <Files>
             <File>
               <FileName>application.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\application.c</FilePath>
+              <FilePath>applications/application.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>startup.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
+              <FilePath>applications/startup.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -403,227 +616,14 @@
             <File>
               <FileName>board.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\board.c</FilePath>
+              <FilePath>drivers/board.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\serial.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Libraries</GroupName>
-          <Files>
-            <File>
-              <FileName>adc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\adc.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>can.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\can.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>comp.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\comp.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>cpu.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\cpu.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>eeprom.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\eeprom.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>epi.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\epi.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>ethernet.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\ethernet.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>fan.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\fan.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>flash.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\flash.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>fpu.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\fpu.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>gpio.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\gpio.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>hibernate.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\hibernate.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>i2c.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\i2c.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>i2s.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\i2s.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>interrupt.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\interrupt.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>lpc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\lpc.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>mpu.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\mpu.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>peci.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\peci.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>pwm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\pwm.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>qei.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\qei.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>ssi.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\ssi.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>sysctl.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\sysctl.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>sysexc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\sysexc.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>systick.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\systick.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>timer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\timer.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>uart.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\uart.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>udma.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\udma.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>usb.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\usb.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>watchdog.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>Libraries\driverlib\watchdog.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>start_rvds.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>Libraries\startup\arm\start_rvds.S</FilePath>
+              <FilePath>drivers/serial.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -633,91 +633,91 @@
             <File>
               <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
+              <FilePath>../../src/clock.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/components.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
+              <FilePath>../../src/device.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
+              <FilePath>../../src/idle.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
+              <FilePath>../../src/ipc.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
+              <FilePath>../../src/irq.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
+              <FilePath>../../src/kservice.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>memheap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\memheap.c</FilePath>
+              <FilePath>../../src/mem.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
+              <FilePath>../../src/mempool.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
+              <FilePath>../../src/object.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>../../src/scheduler.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
+              <FilePath>../../src/thread.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>src_timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>../../src/timer.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -727,129 +727,129 @@
             <File>
               <FileName>cpuport.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m4/cpuport.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>context_rvds.S</FileName>
               <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m4/context_rvds.S</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>div0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+              <FilePath>../../libcpu/arm/common/div0.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>../../libcpu/arm/common/showmem.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
           <GroupName>finsh</GroupName>
-          <Files>
-            <File>
-              <FileName>cmd.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_compiler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_error.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_heap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_init.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_node.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_ops.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_parser.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_token.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_var.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>finsh_vm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
-            </File>
-          </Files>
           <Files>
             <File>
               <FileName>shell.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\shell.c</FilePath>
+              <FilePath>../../components/finsh/shell.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>symbol.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\symbol.c</FilePath>
+              <FilePath>../../components/finsh/symbol.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>cmd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/cmd.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_compiler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_compiler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_error.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_error.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_heap.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_init.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_node.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_node.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_ops.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_parser.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_parser.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_var.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_var.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_vm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_vm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_token.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_token.c</FilePath>
             </File>
           </Files>
         </Group>

bsp/lpc176x/project.uvproj

@@ -1,10 +1,7 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
 <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
-
   <SchemaVersion>1.1</SchemaVersion>
-
   <Header>### uVision Project, (C) Keil Software</Header>
-
   <Targets>
     <Target>
       <TargetName>RT-Thread LPC17xx</TargetName>
@@ -15,25 +12,25 @@
           <Device>LPC1768</Device>
           <Vendor>NXP (founded by Philips)</Vendor>
           <Cpu>IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x20007FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M3")</Cpu>
-          <FlashUtilSpec></FlashUtilSpec>
+          <FlashUtilSpec />
           <StartupFile>"STARTUP\NXP\startup_LPC17xx.s" ("NXP LPC17xx Startup Code")</StartupFile>
           <FlashDriverDll>UL2CM3(-O463 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_256 -FS00 -FL040000)</FlashDriverDll>
           <DeviceId>4868</DeviceId>
           <RegisterFile>LPC17xx.H</RegisterFile>
-          <MemoryEnv></MemoryEnv>
-          <Cmp></Cmp>
-          <Asm></Asm>
-          <Linker></Linker>
-          <OHString></OHString>
-          <InfinionOptionDll></InfinionOptionDll>
-          <SLE66CMisc></SLE66CMisc>
-          <SLE66AMisc></SLE66AMisc>
-          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile></SFDFile>
+          <MemoryEnv />
+          <Cmp />
+          <Asm />
+          <Linker />
+          <OHString />
+          <InfinionOptionDll />
+          <SLE66CMisc />
+          <SLE66AMisc />
+          <SLE66LinkerMisc />
+          <SFDFile />
           <UseEnv>0</UseEnv>
-          <BinPath></BinPath>
-          <IncludePath></IncludePath>
-          <LibPath></LibPath>
+          <BinPath />
+          <IncludePath />
+          <LibPath />
           <RegisterFilePath>NXP\</RegisterFilePath>
           <DBRegisterFilePath>NXP\</DBRegisterFilePath>
           <TargetStatus>
@@ -57,31 +54,29 @@
           <BeforeCompile>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopU1X>0</nStopU1X>
-            <nStopU2X>0</nStopU2X>
           </BeforeCompile>
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
           </BeforeMake>
           <AfterMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
           </AfterMake>
           <SelectedForBatchBuild>0</SelectedForBatchBuild>
-          <SVCSIdString></SVCSIdString>
+          <SVCSIdString />
         </TargetCommonOption>
         <CommonProperty>
           <UseCPPCompiler>0</UseCPPCompiler>
@@ -95,8 +90,8 @@
           <AssembleAssemblyFile>0</AssembleAssemblyFile>
           <PublicsOnly>0</PublicsOnly>
           <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument></CustomArgument>
-          <IncludeLibraryModules></IncludeLibraryModules>
+          <CustomArgument />
+          <IncludeLibraryModules />
         </CommonProperty>
         <DllOption>
           <SimDllName>SARMCM3.DLL</SimDllName>
@@ -117,7 +112,7 @@
             <Oh166RecLen>16</Oh166RecLen>
           </OPTHX>
           <Simulator>
-            <UseSimulator>0</UseSimulator>
+            <UseSimulator>1</UseSimulator>
             <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
             <RunToMain>1</RunToMain>
             <RestoreBreakpoints>1</RestoreBreakpoints>
@@ -128,9 +123,9 @@
             <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
           </Simulator>
           <Target>
-            <UseTarget>1</UseTarget>
+            <UseTarget>0</UseTarget>
             <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
-            <RunToMain>1</RunToMain>
+            <RunToMain>0</RunToMain>
             <RestoreBreakpoints>1</RestoreBreakpoints>
             <RestoreWatchpoints>1</RestoreWatchpoints>
             <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
@@ -138,20 +133,20 @@
             <RestoreToolbox>1</RestoreToolbox>
           </Target>
           <RunDebugAfterBuild>0</RunDebugAfterBuild>
-          <TargetSelection>7</TargetSelection>
+          <TargetSelection>5</TargetSelection>
           <SimDlls>
-            <CpuDll></CpuDll>
-            <CpuDllArguments></CpuDllArguments>
-            <PeripheralDll></PeripheralDll>
-            <PeripheralDllArguments></PeripheralDllArguments>
-            <InitializationFile></InitializationFile>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
           </SimDlls>
           <TargetDlls>
-            <CpuDll></CpuDll>
-            <CpuDllArguments></CpuDllArguments>
-            <PeripheralDll></PeripheralDll>
-            <PeripheralDllArguments></PeripheralDllArguments>
-            <InitializationFile></InitializationFile>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
             <Driver>Segger\JL2CM3.dll</Driver>
           </TargetDlls>
         </DebugOption>
@@ -166,7 +161,7 @@
           </Flash1>
           <Flash2>Segger\JL2CM3.dll</Flash2>
           <Flash3>"" ()</Flash3>
-          <Flash4></Flash4>
+          <Flash4 />
         </Utilities>
         <TargetArmAds>
           <ArmAdsMisc>
@@ -198,7 +193,7 @@
             <RvctClst>0</RvctClst>
             <GenPPlst>0</GenPPlst>
             <AdsCpuType>"Cortex-M3"</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
+            <RvctDeviceName />
             <mOS>0</mOS>
             <uocRom>0</uocRom>
             <uocRam>0</uocRam>
@@ -329,7 +324,7 @@
                 <Size>0x8000</Size>
               </OCR_RVCT10>
             </OnChipMemories>
-            <RvctStartVector></RvctStartVector>
+            <RvctStartVector />
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
@@ -345,10 +340,10 @@
             <wLevel>0</wLevel>
             <uThumb>0</uThumb>
             <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath>.;..\..\components\CMSIS\Include;..\..\components\finsh;..\..\components\init;..\..\components\net\lwip\src;..\..\components\net\lwip\src\arch\include;..\..\components\net\lwip\src\include;..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\include\netif;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;applications;drivers</IncludePath>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath>applications;.;drivers;CMSIS/CM3/DeviceSupport/NXP/LPC17xx;../../components/CMSIS/Include;../../include;../../libcpu/arm/cortex-m3;../../libcpu/arm/common;../../components/finsh;../../components/net/lwip-1.4.1/src;../../components/net/lwip-1.4.1/src/include;../../components/net/lwip-1.4.1/src/include/ipv4;../../components/net/lwip-1.4.1/src/arch/include;../../components/net/lwip-1.4.1/src/include/netif</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -360,10 +355,10 @@
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
             <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath />
             </VariousControls>
           </Aads>
           <LDads>
@@ -375,12 +370,12 @@
             <useFile>0</useFile>
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x10000000</DataAddressRange>
-            <ScatterFile></ScatterFile>
-            <IncludeLibs></IncludeLibs>
-            <IncludeLibsPath></IncludeLibsPath>
-            <Misc> --keep __fsym_* --keep __vsym_* </Misc>
-            <LinkerInputFile></LinkerInputFile>
-            <DisabledWarnings></DisabledWarnings>
+            <ScatterFile />
+            <IncludeLibs />
+            <IncludeLibsPath />
+            <Misc> --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
+            <LinkerInputFile />
+            <DisabledWarnings />
           </LDads>
         </TargetArmAds>
       </TargetOption>
@@ -391,32 +386,21 @@
             <File>
               <FileName>application.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\application.c</FilePath>
+              <FilePath>applications/application.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>platform.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\platform.c</FilePath>
+              <FilePath>applications/platform.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>startup.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>CMSIS</GroupName>
-          <Files>
-            <File>
-              <FileName>system_LPC17xx.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>CMSIS\CM3\DeviceSupport\NXP\LPC17xx\system_LPC17xx.c</FilePath>
-            </File>
-            <File>
-              <FileName>startup_LPC17xx.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>CMSIS\CM3\DeviceSupport\NXP\LPC17xx\startup\arm\startup_LPC17xx.s</FilePath>
+              <FilePath>applications/startup.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -426,27 +410,52 @@
             <File>
               <FileName>board.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\board.c</FilePath>
+              <FilePath>drivers/board.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>emac.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\emac.c</FilePath>
+              <FilePath>drivers/emac.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>led.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\led.c</FilePath>
+              <FilePath>drivers/led.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>spi.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\spi.c</FilePath>
+              <FilePath>drivers/spi.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\uart.c</FilePath>
+              <FilePath>drivers/uart.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_LPC17xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>CMSIS/CM3/DeviceSupport/NXP/LPC17xx/system_LPC17xx.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>startup_LPC17xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>CMSIS/CM3/DeviceSupport/NXP/LPC17xx/startup/arm/startup_LPC17xx.s</FilePath>
             </File>
           </Files>
         </Group>
@@ -456,67 +465,98 @@
             <File>
               <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
+              <FilePath>../../src/clock.c</FilePath>
             </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/components.c</FilePath>
+            </File>
+          </Files>
+          <Files>
             <File>
               <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
+              <FilePath>../../src/device.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
+              <FilePath>../../src/idle.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
+              <FilePath>../../src/ipc.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
+              <FilePath>../../src/irq.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
+              <FilePath>../../src/kservice.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
+              <FilePath>../../src/mem.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>memheap.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\memheap.c</FilePath>
+              <FilePath>../../src/memheap.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
+              <FilePath>../../src/mempool.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
+              <FilePath>../../src/object.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>../../src/scheduler.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
+              <FilePath>../../src/thread.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>../../src/timer.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -526,107 +566,129 @@
             <File>
               <FileName>cpuport.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m3/cpuport.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>context_rvds.S</FileName>
               <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m3/context_rvds.S</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>div0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+              <FilePath>../../libcpu/arm/common/div0.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>../../libcpu/arm/common/showmem.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
           <GroupName>finsh</GroupName>
           <Files>
-            <File>
-              <FileName>cmd.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_compiler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_error.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_heap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_init.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_node.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_ops.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_parser.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_token.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_var.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_vm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
-            </File>
             <File>
               <FileName>shell.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\shell.c</FilePath>
+              <FilePath>../../components/finsh/shell.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>symbol.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\symbol.c</FilePath>
+              <FilePath>../../components/finsh/symbol.c</FilePath>
             </File>
           </Files>
-        </Group>
-        <Group>
-          <GroupName>Components</GroupName>
           <Files>
             <File>
-              <FileName>components.c</FileName>
+              <FileName>cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\init\components.c</FilePath>
+              <FilePath>../../components/finsh/cmd.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_compiler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_compiler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_error.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_error.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_heap.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_init.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_node.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_node.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_ops.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_parser.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_parser.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_var.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_var.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_vm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_vm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_token.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_token.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -636,182 +698,249 @@
             <File>
               <FileName>api_lib.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\api\api_lib.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/api/api_lib.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>api_msg.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\api\api_msg.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/api/api_msg.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>err.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\api\err.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/api/err.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>netbuf.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\api\netbuf.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/api/netbuf.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>netdb.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\api\netdb.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/api/netdb.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>netifapi.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\api\netifapi.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/api/netifapi.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>sockets.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\api\sockets.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/api/sockets.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>tcpip.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\api\tcpip.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/api/tcpip.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>sys_arch.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\arch\sys_arch.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/arch/sys_arch.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>def.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\def.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/def.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>dhcp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\dhcp.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/dhcp.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>dns.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\dns.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/dns.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>init.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\init.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/init.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>memp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\memp.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/memp.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>netif.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\netif.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/netif.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>pbuf.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\pbuf.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/pbuf.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>raw.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\raw.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/raw.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>stats.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\stats.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/stats.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>sys.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\sys.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/sys.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>tcp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\tcp.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/tcp.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>tcp_in.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\tcp_in.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/tcp_in.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>tcp_out.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\tcp_out.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/tcp_out.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>timers.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\timers.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/timers.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>udp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\udp.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/udp.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>autoip.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\autoip.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/autoip.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>icmp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\icmp.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/icmp.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>igmp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\igmp.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/igmp.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>inet.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\inet.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/inet.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>inet_chksum.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\inet_chksum.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/inet_chksum.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ip.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\ip.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ip_addr.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\ip_addr.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip_addr.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ip_frag.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\core\ipv4\ip_frag.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip_frag.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>etharp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\etharp.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/netif/etharp.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ethernetif.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\ethernetif.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/netif/ethernetif.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>slipif.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\net\lwip\src\netif\slipif.c</FilePath>
+              <FilePath>../../components/net/lwip-1.4.1/src/netif/slipif.c</FilePath>
             </File>
           </Files>
         </Group>
       </Groups>
     </Target>
   </Targets>
-
 </Project>

bsp/lpc178x/project.uvproj

@@ -1,10 +1,7 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
 <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
-
   <SchemaVersion>1.1</SchemaVersion>
-
   <Header>### uVision Project, (C) Keil Software</Header>
-
   <Targets>
     <Target>
       <TargetName>RT-Thread LPC17xx</TargetName>
@@ -15,25 +12,25 @@
           <Device>LPC1788</Device>
           <Vendor>NXP (founded by Philips)</Vendor>
           <Cpu>IRAM(0x10000000-0x1000FFFF) IRAM2(0x20000000-0x20007FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M3")</Cpu>
-          <FlashUtilSpec></FlashUtilSpec>
+          <FlashUtilSpec />
           <StartupFile>"STARTUP\NXP\LPC177x_8x\startup_LPC177x_8x.s" ("NXP LPC177x_8x Startup Code")</StartupFile>
           <FlashDriverDll>UL2CM3(-O463 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000)</FlashDriverDll>
           <DeviceId>5325</DeviceId>
           <RegisterFile>LPC177x_8x.H</RegisterFile>
-          <MemoryEnv></MemoryEnv>
-          <Cmp></Cmp>
-          <Asm></Asm>
-          <Linker></Linker>
-          <OHString></OHString>
-          <InfinionOptionDll></InfinionOptionDll>
-          <SLE66CMisc></SLE66CMisc>
-          <SLE66AMisc></SLE66AMisc>
-          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile></SFDFile>
+          <MemoryEnv />
+          <Cmp />
+          <Asm />
+          <Linker />
+          <OHString />
+          <InfinionOptionDll />
+          <SLE66CMisc />
+          <SLE66AMisc />
+          <SLE66LinkerMisc />
+          <SFDFile />
           <UseEnv>0</UseEnv>
-          <BinPath></BinPath>
-          <IncludePath></IncludePath>
-          <LibPath></LibPath>
+          <BinPath />
+          <IncludePath />
+          <LibPath />
           <RegisterFilePath>NXP\LPC177x_8x\</RegisterFilePath>
           <DBRegisterFilePath>NXP\LPC177x_8x\</DBRegisterFilePath>
           <TargetStatus>
@@ -57,31 +54,29 @@
           <BeforeCompile>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopU1X>0</nStopU1X>
-            <nStopU2X>0</nStopU2X>
           </BeforeCompile>
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
           </BeforeMake>
           <AfterMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
           </AfterMake>
           <SelectedForBatchBuild>0</SelectedForBatchBuild>
-          <SVCSIdString></SVCSIdString>
+          <SVCSIdString />
         </TargetCommonOption>
         <CommonProperty>
           <UseCPPCompiler>0</UseCPPCompiler>
@@ -95,8 +90,8 @@
           <AssembleAssemblyFile>0</AssembleAssemblyFile>
           <PublicsOnly>0</PublicsOnly>
           <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument></CustomArgument>
-          <IncludeLibraryModules></IncludeLibraryModules>
+          <CustomArgument />
+          <IncludeLibraryModules />
         </CommonProperty>
         <DllOption>
           <SimDllName>SARMCM3.DLL</SimDllName>
@@ -136,23 +131,22 @@
             <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
             <RestoreFunctions>0</RestoreFunctions>
             <RestoreToolbox>1</RestoreToolbox>
-            <RestoreTracepoints>0</RestoreTracepoints>
           </Target>
           <RunDebugAfterBuild>0</RunDebugAfterBuild>
           <TargetSelection>7</TargetSelection>
           <SimDlls>
-            <CpuDll></CpuDll>
-            <CpuDllArguments></CpuDllArguments>
-            <PeripheralDll></PeripheralDll>
-            <PeripheralDllArguments></PeripheralDllArguments>
-            <InitializationFile></InitializationFile>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
           </SimDlls>
           <TargetDlls>
-            <CpuDll></CpuDll>
-            <CpuDllArguments></CpuDllArguments>
-            <PeripheralDll></PeripheralDll>
-            <PeripheralDllArguments></PeripheralDllArguments>
-            <InitializationFile></InitializationFile>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
             <Driver>Segger\JL2CM3.dll</Driver>
           </TargetDlls>
         </DebugOption>
@@ -167,7 +161,7 @@
           </Flash1>
           <Flash2>Segger\JL2CM3.dll</Flash2>
           <Flash3>"" ()</Flash3>
-          <Flash4></Flash4>
+          <Flash4 />
         </Utilities>
         <TargetArmAds>
           <ArmAdsMisc>
@@ -199,7 +193,7 @@
             <RvctClst>0</RvctClst>
             <GenPPlst>0</GenPPlst>
             <AdsCpuType>"Cortex-M3"</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
+            <RvctDeviceName />
             <mOS>0</mOS>
             <uocRom>0</uocRom>
             <uocRam>0</uocRam>
@@ -330,7 +324,7 @@
                 <Size>0x8000</Size>
               </OCR_RVCT10>
             </OnChipMemories>
-            <RvctStartVector></RvctStartVector>
+            <RvctStartVector />
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
@@ -345,12 +339,11 @@
             <Rwpi>0</Rwpi>
             <wLevel>0</wLevel>
             <uThumb>0</uThumb>
-            <uSurpInc>0</uSurpInc>
             <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath>.;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;CMSIS\CM3\CoreSupport;CMSIS\CM3\DeviceSupport\NXP\LPC177x_8x;applications;drivers</IncludePath>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath>applications;.;drivers;CMSIS/CM3/CoreSupport;CMSIS/CM3/DeviceSupport/NXP/LPC177x_8x;../../include;../../libcpu/arm/cortex-m3;../../libcpu/arm/common;../../components/finsh</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -361,12 +354,11 @@
             <SplitLS>0</SplitLS>
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
-            <uSurpInc>0</uSurpInc>
             <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath />
             </VariousControls>
           </Aads>
           <LDads>
@@ -378,12 +370,12 @@
             <useFile>0</useFile>
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x10000000</DataAddressRange>
-            <ScatterFile></ScatterFile>
-            <IncludeLibs></IncludeLibs>
-            <IncludeLibsPath></IncludeLibsPath>
-            <Misc> --keep __fsym_* --keep __vsym_* </Misc>
-            <LinkerInputFile></LinkerInputFile>
-            <DisabledWarnings></DisabledWarnings>
+            <ScatterFile />
+            <IncludeLibs />
+            <IncludeLibsPath />
+            <Misc> --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
+            <LinkerInputFile />
+            <DisabledWarnings />
           </LDads>
         </TargetArmAds>
       </TargetOption>
@@ -394,32 +386,14 @@
             <File>
               <FileName>application.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\application.c</FilePath>
+              <FilePath>applications/application.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>startup.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>CMSIS</GroupName>
-          <Files>
-            <File>
-              <FileName>core_cm3.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>CMSIS\CM3\CoreSupport\core_cm3.c</FilePath>
-            </File>
-            <File>
-              <FileName>system_LPC177x_8x.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>CMSIS\CM3\DeviceSupport\NXP\LPC177x_8x\system_LPC177x_8x.c</FilePath>
-            </File>
-            <File>
-              <FileName>startup_LPC177x_8x.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>CMSIS\CM3\DeviceSupport\NXP\LPC177x_8x\startup\arm\startup_LPC177x_8x.s</FilePath>
+              <FilePath>applications/startup.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -429,47 +403,87 @@
             <File>
               <FileName>board.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\board.c</FilePath>
+              <FilePath>drivers/board.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>drv_glcd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\drv_glcd.c</FilePath>
+              <FilePath>drivers/drv_glcd.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>lpc177x_8x_clkpwr.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\lpc177x_8x_clkpwr.c</FilePath>
+              <FilePath>drivers/lpc177x_8x_clkpwr.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>lpc177x_8x_emc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\lpc177x_8x_emc.c</FilePath>
+              <FilePath>drivers/lpc177x_8x_emc.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>lpc177x_8x_pinsel.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\lpc177x_8x_pinsel.c</FilePath>
+              <FilePath>drivers/lpc177x_8x_pinsel.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>lpc177x_8x_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\lpc177x_8x_uart.c</FilePath>
+              <FilePath>drivers/lpc177x_8x_uart.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>lpc17xx_lcd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\lpc17xx_lcd.c</FilePath>
+              <FilePath>drivers/lpc17xx_lcd.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>sdram.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\sdram.c</FilePath>
+              <FilePath>drivers/sdram.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\uart.c</FilePath>
+              <FilePath>drivers/uart.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>core_cm3.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>CMSIS/CM3/CoreSupport/core_cm3.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>system_LPC177x_8x.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>CMSIS/CM3/DeviceSupport/NXP/LPC177x_8x/system_LPC177x_8x.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>startup_LPC177x_8x.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>CMSIS/CM3/DeviceSupport/NXP/LPC177x_8x/startup/arm/startup_LPC177x_8x.s</FilePath>
             </File>
           </Files>
         </Group>
@@ -479,67 +493,98 @@
             <File>
               <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
+              <FilePath>../../src/clock.c</FilePath>
             </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/components.c</FilePath>
+            </File>
+          </Files>
+          <Files>
             <File>
               <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
+              <FilePath>../../src/device.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
+              <FilePath>../../src/idle.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
+              <FilePath>../../src/ipc.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
+              <FilePath>../../src/irq.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
+              <FilePath>../../src/kservice.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
+              <FilePath>../../src/mem.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>memheap.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\memheap.c</FilePath>
+              <FilePath>../../src/memheap.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
+              <FilePath>../../src/mempool.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
+              <FilePath>../../src/object.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>../../src/scheduler.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
+              <FilePath>../../src/thread.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>../../src/timer.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -549,112 +594,133 @@
             <File>
               <FileName>cpuport.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m3/cpuport.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>context_rvds.S</FileName>
               <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m3/context_rvds.S</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>div0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+              <FilePath>../../libcpu/arm/common/div0.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>../../libcpu/arm/common/showmem.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
           <GroupName>finsh</GroupName>
           <Files>
-            <File>
-              <FileName>cmd.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_compiler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_error.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_heap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_init.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_node.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_ops.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_parser.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_token.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_var.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_vm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
-            </File>
-            <File>
-              <FileName>msh.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\msh.c</FilePath>
-            </File>
-            <File>
-              <FileName>msh_cmd.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\msh_cmd.c</FilePath>
-            </File>
             <File>
               <FileName>shell.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\shell.c</FilePath>
+              <FilePath>../../components/finsh/shell.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>symbol.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\symbol.c</FilePath>
+              <FilePath>../../components/finsh/symbol.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>cmd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/cmd.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_compiler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_compiler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_error.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_error.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_heap.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_init.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_node.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_node.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_ops.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_parser.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_parser.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_var.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_var.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_vm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_vm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_token.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_token.c</FilePath>
             </File>
           </Files>
         </Group>
       </Groups>
     </Target>
   </Targets>
-
 </Project>

bsp/lpc2478/project.uvproj

@@ -1,10 +1,7 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
 <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
-
   <SchemaVersion>1.1</SchemaVersion>
-
   <Header>### uVision Project, (C) Keil Software</Header>
-
   <Targets>
     <Target>
       <TargetName>RT-Thread LPC2478</TargetName>
@@ -20,20 +17,21 @@
           <FlashDriverDll>UL2ARM(-U268761108 -O7 -S0 -C0 -FO15 -FD40000000 -FC800 -FN1 -FF0LPC_IAP2_512 -FS00 -FL07E000)</FlashDriverDll>
           <DeviceId>4307</DeviceId>
           <RegisterFile>LPC23xx.H</RegisterFile>
-          <MemoryEnv></MemoryEnv>
-          <Cmp></Cmp>
-          <Asm></Asm>
-          <Linker></Linker>
-          <OHString></OHString>
-          <InfinionOptionDll></InfinionOptionDll>
-          <SLE66CMisc></SLE66CMisc>
-          <SLE66AMisc></SLE66AMisc>
-          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile></SFDFile>
+          <MemoryEnv />
+          <Cmp />
+          <Asm />
+          <Linker />
+          <OHString />
+          <InfinionOptionDll />
+          <SLE66CMisc />
+          <SLE66AMisc />
+          <SLE66LinkerMisc />
+          <SFDFile />
+          <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
-          <BinPath></BinPath>
-          <IncludePath></IncludePath>
-          <LibPath></LibPath>
+          <BinPath />
+          <IncludePath />
+          <LibPath />
           <RegisterFilePath>Philips\</RegisterFilePath>
           <DBRegisterFilePath>Philips\</DBRegisterFilePath>
           <TargetStatus>
@@ -43,43 +41,45 @@
             <NotGenerated>0</NotGenerated>
             <InvalidFlash>1</InvalidFlash>
           </TargetStatus>
-          <OutputDirectory>.\obj\</OutputDirectory>
+          <OutputDirectory>.\build\</OutputDirectory>
           <OutputName>rtthread-lpc</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
           <CreateHexFile>0</CreateHexFile>
           <DebugInformation>1</DebugInformation>
           <BrowseInformation>1</BrowseInformation>
-          <ListingPath>.\obj\</ListingPath>
+          <ListingPath>.\build\</ListingPath>
           <HexFormatSelection>1</HexFormatSelection>
           <Merge32K>0</Merge32K>
           <CreateBatchFile>0</CreateBatchFile>
           <BeforeCompile>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
           </BeforeCompile>
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
           </BeforeMake>
           <AfterMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
           </AfterMake>
           <SelectedForBatchBuild>0</SelectedForBatchBuild>
-          <SVCSIdString></SVCSIdString>
+          <SVCSIdString />
         </TargetCommonOption>
         <CommonProperty>
           <UseCPPCompiler>0</UseCPPCompiler>
@@ -93,8 +93,9 @@
           <AssembleAssemblyFile>0</AssembleAssemblyFile>
           <PublicsOnly>0</PublicsOnly>
           <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument></CustomArgument>
-          <IncludeLibraryModules></IncludeLibraryModules>
+          <CustomArgument />
+          <IncludeLibraryModules />
+          <ComprImg>1</ComprImg>
         </CommonProperty>
         <DllOption>
           <SimDllName>SARM.DLL</SimDllName>
@@ -102,7 +103,7 @@
           <SimDlgDll>DARMP.DLL</SimDlgDll>
           <SimDlgDllArguments>-pLPC2478</SimDlgDllArguments>
           <TargetDllName>SARM.DLL</TargetDllName>
-          <TargetDllArguments></TargetDllArguments>
+          <TargetDllArguments />
           <TargetDlgDll>TARMP.DLL</TargetDlgDll>
           <TargetDlgDllArguments>-pLPC2478</TargetDlgDllArguments>
         </DllOption>
@@ -128,28 +129,29 @@
           <Target>
             <UseTarget>1</UseTarget>
             <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
-            <RunToMain>0</RunToMain>
+            <RunToMain>1</RunToMain>
             <RestoreBreakpoints>1</RestoreBreakpoints>
             <RestoreWatchpoints>1</RestoreWatchpoints>
             <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
             <RestoreFunctions>0</RestoreFunctions>
             <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>0</RestoreTracepoints>
           </Target>
           <RunDebugAfterBuild>0</RunDebugAfterBuild>
           <TargetSelection>7</TargetSelection>
           <SimDlls>
-            <CpuDll></CpuDll>
-            <CpuDllArguments></CpuDllArguments>
-            <PeripheralDll></PeripheralDll>
-            <PeripheralDllArguments></PeripheralDllArguments>
-            <InitializationFile></InitializationFile>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
           </SimDlls>
           <TargetDlls>
-            <CpuDll></CpuDll>
-            <CpuDllArguments></CpuDllArguments>
-            <PeripheralDll></PeripheralDll>
-            <PeripheralDllArguments></PeripheralDllArguments>
-            <InitializationFile></InitializationFile>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
             <Driver>Segger\JL2CM3.dll</Driver>
           </TargetDlls>
         </DebugOption>
@@ -162,9 +164,14 @@
             <Capability>1</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
+          <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2ARM.DLL</Flash2>
           <Flash3>"LPC210x_ISP.EXE" ("#H" ^X $D COM1: 38400 1)</Flash3>
-          <Flash4></Flash4>
+          <Flash4 />
+          <pFcarmOut />
+          <pFcarmGrp />
+          <pFcArmRoot />
+          <FcArmLst>0</FcArmLst>
         </Utilities>
         <TargetArmAds>
           <ArmAdsMisc>
@@ -196,7 +203,7 @@
             <RvctClst>0</RvctClst>
             <GenPPlst>0</GenPPlst>
             <AdsCpuType>ARM7TDMI</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
+            <RvctDeviceName />
             <mOS>0</mOS>
             <uocRom>0</uocRom>
             <uocRam>0</uocRam>
@@ -327,7 +334,7 @@
                 <Size>0x4000</Size>
               </OCR_RVCT10>
             </OnChipMemories>
-            <RvctStartVector></RvctStartVector>
+            <RvctStartVector />
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
@@ -342,11 +349,12 @@
             <Rwpi>0</Rwpi>
             <wLevel>0</wLevel>
             <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
             <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath>.;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\lpc24xx;applications;drivers</IncludePath>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath>applications;.;drivers;../../include;../../libcpu/arm/lpc24xx;../../libcpu/arm/common;../../components/finsh</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -357,11 +365,12 @@
             <SplitLS>0</SplitLS>
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
             <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath />
             </VariousControls>
           </Aads>
           <LDads>
@@ -373,12 +382,12 @@
             <useFile>0</useFile>
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x10000000</DataAddressRange>
-            <ScatterFile></ScatterFile>
-            <IncludeLibs></IncludeLibs>
-            <IncludeLibsPath></IncludeLibsPath>
-            <Misc> --keep __fsym_* --keep __vsym_* </Misc>
-            <LinkerInputFile></LinkerInputFile>
-            <DisabledWarnings></DisabledWarnings>
+            <ScatterFile />
+            <IncludeLibs />
+            <IncludeLibsPath />
+            <Misc> --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
+            <LinkerInputFile />
+            <DisabledWarnings />
           </LDads>
         </TargetArmAds>
       </TargetOption>
@@ -389,12 +398,14 @@
             <File>
               <FileName>application.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\application.c</FilePath>
+              <FilePath>applications/application.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>startup.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
+              <FilePath>applications/startup.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -404,12 +415,14 @@
             <File>
               <FileName>board.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\board.c</FilePath>
+              <FilePath>drivers/board.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\serial.c</FilePath>
+              <FilePath>drivers/serial.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -419,67 +432,91 @@
             <File>
               <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
+              <FilePath>../../src/clock.c</FilePath>
             </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/components.c</FilePath>
+            </File>
+          </Files>
+          <Files>
             <File>
               <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
+              <FilePath>../../src/device.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
+              <FilePath>../../src/idle.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
+              <FilePath>../../src/ipc.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
+              <FilePath>../../src/irq.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
+              <FilePath>../../src/kservice.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
-            </File>
-            <File>
-              <FileName>memheap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\memheap.c</FilePath>
+              <FilePath>../../src/mem.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
+              <FilePath>../../src/mempool.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
+              <FilePath>../../src/object.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>../../src/scheduler.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
+              <FilePath>../../src/thread.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>../../src/timer.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -489,122 +526,161 @@
             <File>
               <FileName>cpu.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\lpc24xx\cpu.c</FilePath>
+              <FilePath>../../libcpu/arm/lpc24xx/cpu.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>interrupt.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\lpc24xx\interrupt.c</FilePath>
+              <FilePath>../../libcpu/arm/lpc24xx/interrupt.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>stack.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\lpc24xx\stack.c</FilePath>
+              <FilePath>../../libcpu/arm/lpc24xx/stack.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>trap.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\lpc24xx\trap.c</FilePath>
+              <FilePath>../../libcpu/arm/lpc24xx/trap.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>context_rvds.S</FileName>
               <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\lpc24xx\context_rvds.S</FilePath>
+              <FilePath>../../libcpu/arm/lpc24xx/context_rvds.S</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>start_rvds.S</FileName>
               <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\lpc24xx\start_rvds.S</FilePath>
+              <FilePath>../../libcpu/arm/lpc24xx/start_rvds.S</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>div0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+              <FilePath>../../libcpu/arm/common/div0.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>../../libcpu/arm/common/showmem.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
           <GroupName>finsh</GroupName>
           <Files>
-            <File>
-              <FileName>cmd.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_compiler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_error.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_heap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_init.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_node.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_ops.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_parser.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_token.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_var.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_vm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
-            </File>
             <File>
               <FileName>shell.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\shell.c</FilePath>
+              <FilePath>../../components/finsh/shell.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>symbol.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\symbol.c</FilePath>
+              <FilePath>../../components/finsh/symbol.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>cmd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/cmd.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_compiler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_compiler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_error.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_error.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_heap.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_init.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_node.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_node.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_ops.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_parser.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_parser.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_var.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_var.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_vm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_vm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_token.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_token.c</FilePath>
             </File>
           </Files>
         </Group>
       </Groups>
     </Target>
   </Targets>
-
 </Project>

bsp/lpc408x/applications/application.c

@@ -14,7 +14,11 @@
 
 #include <rtthread.h>
 
-#include <board.h>
+#ifdef RT_USING_FINSH
+#include <shell.h>
+#include <finsh.h>
+#endif
+
 #ifdef RT_USING_COMPONENTS_INIT
 #include <components.h>
 #endif
@@ -25,12 +29,8 @@ void rt_init_thread_entry(void *parameter)
     /* Initialization RT-Thread Components */
 #ifdef RT_USING_COMPONENTS_INIT
     rt_components_init();
-#endif
-
-#ifdef RT_USING_FINSH
-    /* initialize finsh */
+#elif defined(RT_USING_FINSH)
     finsh_system_init();
-    finsh_set_device(FINSH_DEVICE_NAME);
 #endif
 }
 

bsp/lpc408x/rtconfig.h

@@ -105,7 +105,7 @@
 
 // <section name="LIBC" description="C Runtime library setting" default="always" >
 // <bool name="RT_USING_LIBC" description="Using C library" default="true" />
-// #define RT_USING_LIBC
+#define RT_USING_LIBC
 // <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
 #define RT_USING_PTHREADS
 // </section>

bsp/mb9bf506r/project.uvproj

@@ -1,10 +1,7 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
 <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
-
   <SchemaVersion>1.1</SchemaVersion>
-
   <Header>### uVision Project, (C) Keil Software</Header>
-
   <Targets>
     <Target>
       <TargetName>rtthread-fm3</TargetName>
@@ -15,25 +12,25 @@
           <Device>MB9BF506R</Device>
           <Vendor>Fujitsu Semiconductors</Vendor>
           <Cpu>IRAM(0x20000000-0x20007FFF) IRAM2(0x1FFF8000-0x1FFFFFFF) IROM(0x00000000-0x0007FFFF) CLOCK(4000000) CPUTYPE("Cortex-M3")</Cpu>
-          <FlashUtilSpec></FlashUtilSpec>
+          <FlashUtilSpec />
           <StartupFile>"Startup\Fujitsu\MB9B500\startup_MB9BF50x.s" ("Fujitsu MB9BF50x Startup Code")</StartupFile>
           <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0MB9BFx06_512 -FS00 -FL080000)</FlashDriverDll>
           <DeviceId>5216</DeviceId>
           <RegisterFile>MB9BF506R.h</RegisterFile>
-          <MemoryEnv></MemoryEnv>
-          <Cmp></Cmp>
-          <Asm></Asm>
-          <Linker></Linker>
-          <OHString></OHString>
-          <InfinionOptionDll></InfinionOptionDll>
-          <SLE66CMisc></SLE66CMisc>
-          <SLE66AMisc></SLE66AMisc>
-          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <MemoryEnv />
+          <Cmp />
+          <Asm />
+          <Linker />
+          <OHString />
+          <InfinionOptionDll />
+          <SLE66CMisc />
+          <SLE66AMisc />
+          <SLE66LinkerMisc />
           <SFDFile>SFD\Fujitsu\MB9B500\MB9BF506R.SFR</SFDFile>
           <UseEnv>0</UseEnv>
-          <BinPath></BinPath>
-          <IncludePath></IncludePath>
-          <LibPath></LibPath>
+          <BinPath />
+          <IncludePath />
+          <LibPath />
           <RegisterFilePath>Fujitsu\MB9B500\</RegisterFilePath>
           <DBRegisterFilePath>Fujitsu\MB9B500\</DBRegisterFilePath>
           <TargetStatus>
@@ -57,31 +54,29 @@
           <BeforeCompile>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopU1X>0</nStopU1X>
-            <nStopU2X>0</nStopU2X>
           </BeforeCompile>
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
           </BeforeMake>
           <AfterMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
+            <UserProg1Name />
+            <UserProg2Name />
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
           </AfterMake>
           <SelectedForBatchBuild>0</SelectedForBatchBuild>
-          <SVCSIdString></SVCSIdString>
+          <SVCSIdString />
         </TargetCommonOption>
         <CommonProperty>
           <UseCPPCompiler>0</UseCPPCompiler>
@@ -95,8 +90,8 @@
           <AssembleAssemblyFile>0</AssembleAssemblyFile>
           <PublicsOnly>0</PublicsOnly>
           <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument></CustomArgument>
-          <IncludeLibraryModules></IncludeLibraryModules>
+          <CustomArgument />
+          <IncludeLibraryModules />
         </CommonProperty>
         <DllOption>
           <SimDllName>SARMCM3.DLL</SimDllName>
@@ -130,29 +125,28 @@
           <Target>
             <UseTarget>1</UseTarget>
             <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
-            <RunToMain>1</RunToMain>
+            <RunToMain>0</RunToMain>
             <RestoreBreakpoints>1</RestoreBreakpoints>
             <RestoreWatchpoints>1</RestoreWatchpoints>
             <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
             <RestoreFunctions>0</RestoreFunctions>
             <RestoreToolbox>1</RestoreToolbox>
-            <RestoreTracepoints>0</RestoreTracepoints>
           </Target>
           <RunDebugAfterBuild>0</RunDebugAfterBuild>
           <TargetSelection>7</TargetSelection>
           <SimDlls>
-            <CpuDll></CpuDll>
-            <CpuDllArguments></CpuDllArguments>
-            <PeripheralDll></PeripheralDll>
-            <PeripheralDllArguments></PeripheralDllArguments>
-            <InitializationFile></InitializationFile>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
           </SimDlls>
           <TargetDlls>
-            <CpuDll></CpuDll>
-            <CpuDllArguments></CpuDllArguments>
-            <PeripheralDll></PeripheralDll>
-            <PeripheralDllArguments></PeripheralDllArguments>
-            <InitializationFile></InitializationFile>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
             <Driver>Segger\JL2CM3.dll</Driver>
           </TargetDlls>
         </DebugOption>
@@ -167,7 +161,7 @@
           </Flash1>
           <Flash2>Segger\JL2CM3.dll</Flash2>
           <Flash3>"" ()</Flash3>
-          <Flash4></Flash4>
+          <Flash4 />
         </Utilities>
         <TargetArmAds>
           <ArmAdsMisc>
@@ -199,7 +193,7 @@
             <RvctClst>0</RvctClst>
             <GenPPlst>0</GenPPlst>
             <AdsCpuType>"Cortex-M3"</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
+            <RvctDeviceName />
             <mOS>0</mOS>
             <uocRom>0</uocRom>
             <uocRam>0</uocRam>
@@ -330,7 +324,7 @@
                 <Size>0x8000</Size>
               </OCR_RVCT10>
             </OnChipMemories>
-            <RvctStartVector></RvctStartVector>
+            <RvctStartVector />
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
@@ -345,12 +339,11 @@
             <Rwpi>0</Rwpi>
             <wLevel>0</wLevel>
             <uThumb>0</uThumb>
-            <uSurpInc>0</uSurpInc>
             <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath>.;..\..\components\CMSIS\Include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\init;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;applications;drivers;libraries\Device\FUJISTU\MB9BF50x\Include</IncludePath>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath>libraries/Device/FUJISTU/MB9BF50x/Include;../../components/CMSIS/Include;applications;.;drivers;../../include;../../libcpu/arm/cortex-m3;../../libcpu/arm/common;../../components/drivers/include;../../components/drivers/include;../../components/finsh</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -361,12 +354,11 @@
             <SplitLS>0</SplitLS>
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
-            <uSurpInc>0</uSurpInc>
             <VariousControls>
-              <MiscControls></MiscControls>
-              <Define></Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath />
             </VariousControls>
           </Aads>
           <LDads>
@@ -378,28 +370,47 @@
             <useFile>0</useFile>
             <TextAddressRange>0x08000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
-            <ScatterFile></ScatterFile>
-            <IncludeLibs></IncludeLibs>
-            <IncludeLibsPath></IncludeLibsPath>
-            <Misc> --keep __fsym_* --keep __vsym_* </Misc>
-            <LinkerInputFile></LinkerInputFile>
-            <DisabledWarnings></DisabledWarnings>
+            <ScatterFile />
+            <IncludeLibs />
+            <IncludeLibsPath />
+            <Misc> --keep *.o(.rti_fn.*)   --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
+            <LinkerInputFile />
+            <DisabledWarnings />
           </LDads>
         </TargetArmAds>
       </TargetOption>
       <Groups>
+        <Group>
+          <GroupName>CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_mb9bf50x.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>libraries/Device/FUJISTU/MB9BF50x/Source/system_mb9bf50x.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>startup_mb9bf50x.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>libraries/Device/FUJISTU/MB9BF50x/Source/ARM/startup_mb9bf50x.S</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>Applications</GroupName>
           <Files>
             <File>
               <FileName>application.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\application.c</FilePath>
+              <FilePath>applications/application.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>startup.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\startup.c</FilePath>
+              <FilePath>applications/startup.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -409,37 +420,28 @@
             <File>
               <FileName>board.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\board.c</FilePath>
+              <FilePath>drivers/board.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>fm3_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\fm3_uart.c</FilePath>
+              <FilePath>drivers/fm3_uart.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>led.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\led.c</FilePath>
+              <FilePath>drivers/led.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>nand.c</FileName>
               <FileType>1</FileType>
-              <FilePath>drivers\nand.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>CMSIS</GroupName>
-          <Files>
-            <File>
-              <FileName>system_mb9bf50x.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>libraries\Device\FUJISTU\MB9BF50x\Source\system_mb9bf50x.c</FilePath>
-            </File>
-            <File>
-              <FileName>startup_mb9bf50x.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>libraries\Device\FUJISTU\MB9BF50x\Source\ARM\startup_mb9bf50x.S</FilePath>
+              <FilePath>drivers/nand.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -449,67 +451,98 @@
             <File>
               <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
+              <FilePath>../../src/clock.c</FilePath>
             </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/components.c</FilePath>
+            </File>
+          </Files>
+          <Files>
             <File>
               <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
+              <FilePath>../../src/device.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
+              <FilePath>../../src/idle.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
+              <FilePath>../../src/ipc.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
+              <FilePath>../../src/irq.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
+              <FilePath>../../src/kservice.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
+              <FilePath>../../src/mem.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>memheap.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\memheap.c</FilePath>
+              <FilePath>../../src/memheap.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
+              <FilePath>../../src/mempool.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
+              <FilePath>../../src/object.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>../../src/scheduler.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
+              <FilePath>../../src/thread.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>../../src/timer.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -519,27 +552,35 @@
             <File>
               <FileName>cpuport.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m3/cpuport.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>context_rvds.S</FileName>
               <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
+              <FilePath>../../libcpu/arm/cortex-m3/context_rvds.S</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>div0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+              <FilePath>../../libcpu/arm/common/div0.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>../../libcpu/arm/common/showmem.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -549,112 +590,147 @@
             <File>
               <FileName>serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\serial\serial.c</FilePath>
+              <FilePath>../../components/drivers/serial/serial.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>completion.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\completion.c</FilePath>
+              <FilePath>../../components/drivers/src/completion.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>dataqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
+              <FilePath>../../components/drivers/src/dataqueue.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>pipe.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
+              <FilePath>../../components/drivers/src/pipe.c</FilePath>
             </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>portal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/portal.c</FilePath>
+            </File>
+          </Files>
+          <Files>
             <File>
               <FileName>ringbuffer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
+              <FilePath>../../components/drivers/src/ringbuffer.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>workqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/drivers/src/workqueue.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
           <GroupName>finsh</GroupName>
           <Files>
-            <File>
-              <FileName>cmd.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_compiler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_error.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_heap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_init.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_node.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_ops.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_parser.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_token.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_var.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
-            </File>
-            <File>
-              <FileName>finsh_vm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
-            </File>
             <File>
               <FileName>shell.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\shell.c</FilePath>
+              <FilePath>../../components/finsh/shell.c</FilePath>
             </File>
+          </Files>
+          <Files>
             <File>
               <FileName>symbol.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\symbol.c</FilePath>
+              <FilePath>../../components/finsh/symbol.c</FilePath>
             </File>
           </Files>
-        </Group>
-        <Group>
-          <GroupName>Components</GroupName>
           <Files>
             <File>
-              <FileName>components.c</FileName>
+              <FileName>cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\init\components.c</FilePath>
+              <FilePath>../../components/finsh/cmd.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_compiler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_compiler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_error.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_error.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_heap.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_init.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_node.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_node.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_ops.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_parser.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_parser.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_var.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_var.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_vm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_vm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_token.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_token.c</FilePath>
             </File>
           </Files>
         </Group>
       </Groups>
     </Target>
   </Targets>
-
 </Project>

bsp/mb9bf568r/project.uvproj

@@ -0,0 +1,682 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+  <SchemaVersion>1.1</SchemaVersion>
+  <Header>### uVision Project, (C) Keil Software</Header>
+  <Targets>
+    <Target>
+      <TargetName>rtthread-fm4</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>Cortex-M4 FPU</Device>
+          <Vendor>ARM</Vendor>
+          <Cpu>CLOCK(12000000) CPUTYPE("Cortex-M4") ESEL ELITTLE FPU2</Cpu>
+          <FlashUtilSpec />
+          <StartupFile />
+          <FlashDriverDll />
+          <DeviceId>5237</DeviceId>
+          <RegisterFile />
+          <MemoryEnv />
+          <Cmp />
+          <Asm />
+          <Linker />
+          <OHString />
+          <InfinionOptionDll />
+          <SLE66CMisc />
+          <SLE66AMisc />
+          <SLE66LinkerMisc />
+          <SFDFile />
+          <UseEnv>0</UseEnv>
+          <BinPath />
+          <IncludePath />
+          <LibPath />
+          <RegisterFilePath />
+          <DBRegisterFilePath />
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\</OutputDirectory>
+          <OutputName>template_mb9b56xx</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\build\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name />
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name />
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name />
+            <UserProg2Name />
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString />
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument />
+          <IncludeLibraryModules />
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments />
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments />
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>1</RestoreTracepoints>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>14</TargetSelection>
+          <SimDlls>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll />
+            <CpuDllArguments />
+            <PeripheralDll />
+            <PeripheralDllArguments />
+            <InitializationFile />
+            <Driver>BIN\CMSIS_AGDI.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4105</DriverSelection>
+          </Flash1>
+          <Flash2>BIN\CMSIS_AGDI.dll</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4 />
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>0</AdsALst>
+            <AdsACrf>0</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>0</AdsLcgr>
+            <AdsLsym>0</AdsLsym>
+            <AdsLszi>0</AdsLszi>
+            <AdsLtoi>0</AdsLtoi>
+            <AdsLsun>0</AdsLsun>
+            <AdsLven>0</AdsLven>
+            <AdsLsxf>0</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName />
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>0</hadIROM>
+            <hadIRAM>0</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>1</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>0</RoSelD>
+            <RwSelD>5</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>1</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>1</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </IRAM>
+              <IROM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x100000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x200c0000</StartAddress>
+                <Size>0x8000</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x1fff0000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x20038000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector />
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <VariousControls>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath>applications;.;drivers;CMSIS/Include;CMSIS/DeviceSupport;../../include;../../libcpu/arm/cortex-m4;../../libcpu/arm/common;../../components/finsh</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <VariousControls>
+              <MiscControls />
+              <Define />
+              <Undefine />
+              <IncludePath />
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x00000000</DataAddressRange>
+            <ScatterFile />
+            <IncludeLibs />
+            <IncludeLibsPath />
+            <Misc> --keep *.o(.rti_fn.*)   --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
+            <LinkerInputFile />
+            <DisabledWarnings />
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Applications</GroupName>
+          <Files>
+            <File>
+              <FileName>application.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications/application.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>demo.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications/demo.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>startup.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications/startup.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers</GroupName>
+          <Files>
+            <File>
+              <FileName>board.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>drivers/board.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>led.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>drivers/led.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>serial.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>drivers/serial.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_mb9abxxx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>CMSIS/DeviceSupport/system_mb9abxxx.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>startup_mb9bf56xr.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>CMSIS/DeviceSupport/arm/startup_mb9bf56xr.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Kernel</GroupName>
+          <Files>
+            <File>
+              <FileName>clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/clock.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/components.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/device.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>idle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/idle.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/ipc.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/irq.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kservice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/kservice.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>mem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/mem.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>mempool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/mempool.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/object.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>scheduler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/scheduler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>thread.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/thread.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../src/timer.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>CORTEX-M4</GroupName>
+          <Files>
+            <File>
+              <FileName>cpuport.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/cortex-m4/cpuport.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>context_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>../../libcpu/arm/cortex-m4/context_rvds.S</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>backtrace.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>div0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/common/div0.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>showmem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../libcpu/arm/common/showmem.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>finsh</GroupName>
+          <Files>
+            <File>
+              <FileName>shell.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/shell.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>symbol.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/symbol.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>cmd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/cmd.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_compiler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_compiler.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_error.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_error.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_heap.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_init.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_node.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_node.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_ops.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_parser.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_parser.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_var.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_var.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_vm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_vm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>finsh_token.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>../../components/finsh/finsh_token.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+</Project>

bsp/mb9bf568r/rtconfig.py

@@ -10,11 +10,11 @@ if os.getenv('RTT_CC'):
     CROSS_TOOL = os.getenv('RTT_CC')
 
 if  CROSS_TOOL == 'gcc':
-    PLATFORM 	= 'gcc'
-    EXEC_PATH 	= r'D:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin'
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'D:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin'
 elif CROSS_TOOL == 'keil':
-    PLATFORM 	= 'armcc'
-    EXEC_PATH 	= 'D:/Keil'
+    PLATFORM    = 'armcc'
+    EXEC_PATH   = 'C:/Keil_MDK_471'
 elif CROSS_TOOL == 'iar':
     print '================ERROR============================'
     print 'Not support iar yet!'
@@ -59,6 +59,7 @@ if PLATFORM == 'gcc':
 elif PLATFORM == 'armcc':
     # toolchains
     CC = 'armcc'
+    CXX = 'armcc'
     AS = 'armasm'
     AR = 'armar'
     LINK = 'armlink'
@@ -81,4 +82,5 @@ elif PLATFORM == 'armcc':
     else:
         CFLAGS += ' -O2'
 
+    CXXFLAGS = CFLAGS
     POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'

bsp/mini2440/project.Uv2

@@ -0,0 +1,431 @@
+### uVision2 Project, (C) Keil Software
+### Do not modify !
+
+Target (RT-Thread Mini2440), 0x0004 // Tools: 'ARM-ADS'
+
+Group (Startup)
+Group (Kernel)
+Group (S3C24X0)
+Group (pthreads)
+Group (libc)
+Group (libz)
+Group (jpeg)
+Group (libpng)
+Group (libdl)
+Group (finsh)
+Group (LwIP)
+Group (Filesystem)
+
+File 1,1,<./application.c><application.c>
+File 1,1,<./startup.c><startup.c>
+File 1,1,<./board.c><board.c>
+File 1,1,<./console.c><console.c>
+File 1,1,<./led.c><led.c>
+File 1,1,<./sdcard.c><sdcard.c>
+File 1,1,<./dm9000.c><dm9000.c>
+File 1,1,<../../src/clock.c><clock.c>
+File 1,1,<../../src/components.c><components.c>
+File 1,1,<../../src/device.c><device.c>
+File 1,1,<../../src/idle.c><idle.c>
+File 1,1,<../../src/ipc.c><ipc.c>
+File 1,1,<../../src/irq.c><irq.c>
+File 1,1,<../../src/kservice.c><kservice.c>
+File 1,1,<../../src/mem.c><mem.c>
+File 1,1,<../../src/mempool.c><mempool.c>
+File 1,1,<../../src/module.c><module.c>
+File 1,1,<../../src/object.c><object.c>
+File 1,1,<../../src/scheduler.c><scheduler.c>
+File 1,1,<../../src/thread.c><thread.c>
+File 1,1,<../../src/timer.c><timer.c>
+File 1,1,<../../libcpu/arm/s3c24x0/cpu.c><cpu.c>
+File 1,1,<../../libcpu/arm/s3c24x0/interrupt.c><interrupt.c>
+File 1,1,<../../libcpu/arm/s3c24x0/mmu.c><mmu.c>
+File 1,1,<../../libcpu/arm/s3c24x0/rtc.c><rtc.c>
+File 1,1,<../../libcpu/arm/s3c24x0/serial.c><serial.c>
+File 1,1,<../../libcpu/arm/s3c24x0/stack.c><stack.c>
+File 1,1,<../../libcpu/arm/s3c24x0/system_clock.c><system_clock.c>
+File 1,1,<../../libcpu/arm/s3c24x0/trap.c><trap.c>
+File 1,2,<../../libcpu/arm/s3c24x0/context_rvds.S><context_rvds.S>
+File 1,2,<../../libcpu/arm/s3c24x0/start_rvds.S><start_rvds.S>
+File 1,1,<../../libcpu/arm/common/backtrace.c><backtrace.c>
+File 1,1,<../../libcpu/arm/common/div0.c><div0.c>
+File 1,1,<../../libcpu/arm/common/showmem.c><showmem.c>
+File 1,1,<../../components/pthreads/clock_time.c><clock_time.c>
+File 1,1,<../../components/pthreads/mqueue.c><mqueue.c>
+File 1,1,<../../components/pthreads/pthread.c><pthread.c>
+File 1,1,<../../components/pthreads/pthread_attr.c><pthread_attr.c>
+File 1,1,<../../components/pthreads/pthread_barrier.c><pthread_barrier.c>
+File 1,1,<../../components/pthreads/pthread_cond.c><pthread_cond.c>
+File 1,1,<../../components/pthreads/pthread_mutex.c><pthread_mutex.c>
+File 1,1,<../../components/pthreads/pthread_rwlock.c><pthread_rwlock.c>
+File 1,1,<../../components/pthreads/pthread_spin.c><pthread_spin.c>
+File 1,1,<../../components/pthreads/pthread_tls.c><pthread_tls.c>
+File 1,1,<../../components/pthreads/sched.c><sched.c>
+File 1,1,<../../components/pthreads/semaphore.c><semaphore.c>
+File 1,1,<../../components/libc/armlibc/mem_std.c><mem_std.c>
+File 1,1,<../../components/libc/armlibc/stubs.c><stubs.c>
+File 1,1,<../../components/external/libz/adler32.c><adler32.c>
+File 1,1,<../../components/external/libz/compress.c><compress.c>
+File 1,1,<../../components/external/libz/crc32.c><crc32.c>
+File 1,1,<../../components/external/libz/deflate.c><deflate.c>
+File 1,1,<../../components/external/libz/infback.c><infback.c>
+File 1,1,<../../components/external/libz/inffast.c><inffast.c>
+File 1,1,<../../components/external/libz/inflate.c><inflate.c>
+File 1,1,<../../components/external/libz/inftrees.c><inftrees.c>
+File 1,1,<../../components/external/libz/trees.c><trees.c>
+File 1,1,<../../components/external/libz/uncompr.c><uncompr.c>
+File 1,1,<../../components/external/libz/zutil.c><zutil.c>
+File 1,1,<../../components/external/jpeg/jaricom.c><jaricom.c>
+File 1,1,<../../components/external/jpeg/jcomapi.c><jcomapi.c>
+File 1,1,<../../components/external/jpeg/jutils.c><jutils.c>
+File 1,1,<../../components/external/jpeg/jerror.c><jerror.c>
+File 1,1,<../../components/external/jpeg/jmemmgr.c><jmemmgr.c>
+File 1,1,<../../components/external/jpeg/jdapimin.c><jdapimin.c>
+File 1,1,<../../components/external/jpeg/jdapistd.c><jdapistd.c>
+File 1,1,<../../components/external/jpeg/jdarith.c><jdarith.c>
+File 1,1,<../../components/external/jpeg/jdtrans.c><jdtrans.c>
+File 1,1,<../../components/external/jpeg/jdmaster.c><jdmaster.c>
+File 1,1,<../../components/external/jpeg/jdinput.c><jdinput.c>
+File 1,1,<../../components/external/jpeg/jdmarker.c><jdmarker.c>
+File 1,1,<../../components/external/jpeg/jdhuff.c><jdhuff.c>
+File 1,1,<../../components/external/jpeg/jdmainct.c><jdmainct.c>
+File 1,1,<../../components/external/jpeg/jdcoefct.c><jdcoefct.c>
+File 1,1,<../../components/external/jpeg/jdpostct.c><jdpostct.c>
+File 1,1,<../../components/external/jpeg/jddctmgr.c><jddctmgr.c>
+File 1,1,<../../components/external/jpeg/jidctfst.c><jidctfst.c>
+File 1,1,<../../components/external/jpeg/jidctflt.c><jidctflt.c>
+File 1,1,<../../components/external/jpeg/jidctint.c><jidctint.c>
+File 1,1,<../../components/external/jpeg/jdsample.c><jdsample.c>
+File 1,1,<../../components/external/jpeg/jdcolor.c><jdcolor.c>
+File 1,1,<../../components/external/jpeg/jquant1.c><jquant1.c>
+File 1,1,<../../components/external/jpeg/jquant2.c><jquant2.c>
+File 1,1,<../../components/external/jpeg/jdmerge.c><jdmerge.c>
+File 1,1,<../../components/external/jpeg/jmemnobs.c><jmemnobs.c>
+File 1,1,<../../components/external/libpng/png.c><png.c>
+File 1,1,<../../components/external/libpng/pngerror.c><pngerror.c>
+File 1,1,<../../components/external/libpng/pnggccrd.c><pnggccrd.c>
+File 1,1,<../../components/external/libpng/pngget.c><pngget.c>
+File 1,1,<../../components/external/libpng/pngmem.c><pngmem.c>
+File 1,1,<../../components/external/libpng/pngpread.c><pngpread.c>
+File 1,1,<../../components/external/libpng/pngread.c><pngread.c>
+File 1,1,<../../components/external/libpng/pngrio.c><pngrio.c>
+File 1,1,<../../components/external/libpng/pngrtran.c><pngrtran.c>
+File 1,1,<../../components/external/libpng/pngrutil.c><pngrutil.c>
+File 1,1,<../../components/external/libpng/pngset.c><pngset.c>
+File 1,1,<../../components/external/libpng/pngtrans.c><pngtrans.c>
+File 1,1,<../../components/external/libpng/pngvcrd.c><pngvcrd.c>
+File 1,1,<../../components/external/libpng/pngwio.c><pngwio.c>
+File 1,1,<../../components/external/libpng/pngwrite.c><pngwrite.c>
+File 1,1,<../../components/external/libpng/pngwtran.c><pngwtran.c>
+File 1,1,<../../components/external/libpng/pngwutil.c><pngwutil.c>
+File 1,1,<../../components/libdl/dlclose.c><dlclose.c>
+File 1,1,<../../components/libdl/dlerror.c><dlerror.c>
+File 1,1,<../../components/libdl/dlopen.c><dlopen.c>
+File 1,1,<../../components/libdl/dlsym.c><dlsym.c>
+File 1,1,<../../components/finsh/shell.c><shell.c>
+File 1,1,<../../components/finsh/symbol.c><symbol.c>
+File 1,1,<../../components/finsh/cmd.c><cmd.c>
+File 1,1,<../../components/finsh/finsh_compiler.c><finsh_compiler.c>
+File 1,1,<../../components/finsh/finsh_error.c><finsh_error.c>
+File 1,1,<../../components/finsh/finsh_heap.c><finsh_heap.c>
+File 1,1,<../../components/finsh/finsh_init.c><finsh_init.c>
+File 1,1,<../../components/finsh/finsh_node.c><finsh_node.c>
+File 1,1,<../../components/finsh/finsh_ops.c><finsh_ops.c>
+File 1,1,<../../components/finsh/finsh_parser.c><finsh_parser.c>
+File 1,1,<../../components/finsh/finsh_var.c><finsh_var.c>
+File 1,1,<../../components/finsh/finsh_vm.c><finsh_vm.c>
+File 1,1,<../../components/finsh/finsh_token.c><finsh_token.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/api/api_lib.c><api_lib.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/api/api_msg.c><api_msg.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/api/err.c><err.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/api/netbuf.c><netbuf.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/api/netdb.c><netdb.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/api/netifapi.c><netifapi.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/api/sockets.c><sockets.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/api/tcpip.c><tcpip.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/arch/sys_arch.c><sys_arch.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/def.c><def.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/dhcp.c><dhcp.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/dns.c><dns.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/init.c><init.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/memp.c><memp.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/netif.c><netif.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/pbuf.c><pbuf.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/raw.c><raw.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/stats.c><stats.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/sys.c><sys.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/tcp.c><tcp.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/tcp_in.c><tcp_in.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/tcp_out.c><tcp_out.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/timers.c><timers.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/udp.c><udp.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/ipv4/autoip.c><autoip.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/ipv4/icmp.c><icmp.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/ipv4/igmp.c><igmp.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/ipv4/inet.c><inet.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/ipv4/inet_chksum.c><inet_chksum.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/ipv4/ip.c><ip.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/ipv4/ip_addr.c><ip_addr.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/core/ipv4/ip_frag.c><ip_frag.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/netif/etharp.c><etharp.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/netif/ethernetif.c><ethernetif.c>
+File 1,1,<../../components/net/lwip-1.4.1/src/netif/slipif.c><slipif.c>
+File 1,1,<../../components/dfs/src/dfs.c><dfs.c>
+File 1,1,<../../components/dfs/src/dfs_file.c><dfs_file.c>
+File 1,1,<../../components/dfs/src/dfs_fs.c><dfs_fs.c>
+File 1,1,<../../components/dfs/src/dfs_posix.c><dfs_posix.c>
+File 1,1,<../../components/dfs/filesystems/elmfat/dfs_elm.c><dfs_elm.c>
+File 1,1,<../../components/dfs/filesystems/elmfat/ff.c><ff.c>
+File 1,1,<../../components/dfs/filesystems/elmfat/option/cc936.c><cc936.c>
+File 1,1,<../../components/dfs/filesystems/devfs/console.c><devfs_console.c>
+File 1,1,<../../components/dfs/filesystems/devfs/devfs.c><devfs.c>
+File 2,1,<../../src/clock.c><src_clock.c>
+File 2,1,<../../src/components.c><src_components.c>
+File 2,1,<../../src/device.c><src_device.c>
+File 2,1,<../../src/idle.c><src_idle.c>
+File 2,1,<../../src/ipc.c><src_ipc.c>
+File 2,1,<../../src/irq.c><src_irq.c>
+File 2,1,<../../src/kservice.c><src_kservice.c>
+File 2,1,<../../src/mem.c><src_mem.c>
+File 2,1,<../../src/mempool.c><src_mempool.c>
+File 2,1,<../../src/module.c><src_module.c>
+File 2,1,<../../src/object.c><src_object.c>
+File 2,1,<../../src/scheduler.c><src_scheduler.c>
+File 2,1,<../../src/thread.c><src_thread.c>
+File 2,1,<../../src/timer.c><src_timer.c>
+File 3,1,<../../libcpu/arm/s3c24x0/cpu.c><s3c24x0_cpu.c>
+File 3,1,<../../libcpu/arm/s3c24x0/interrupt.c><s3c24x0_interrupt.c>
+File 3,1,<../../libcpu/arm/s3c24x0/mmu.c><s3c24x0_mmu.c>
+File 3,1,<../../libcpu/arm/s3c24x0/rtc.c><s3c24x0_rtc.c>
+File 3,1,<../../libcpu/arm/s3c24x0/serial.c><s3c24x0_serial.c>
+File 3,1,<../../libcpu/arm/s3c24x0/stack.c><s3c24x0_stack.c>
+File 3,1,<../../libcpu/arm/s3c24x0/system_clock.c><s3c24x0_system_clock.c>
+File 3,1,<../../libcpu/arm/s3c24x0/trap.c><s3c24x0_trap.c>
+File 3,2,<../../libcpu/arm/s3c24x0/context_rvds.S><s3c24x0_context_rvds.S>
+File 3,2,<../../libcpu/arm/s3c24x0/start_rvds.S><s3c24x0_start_rvds.S>
+File 3,1,<../../libcpu/arm/common/backtrace.c><common_backtrace.c>
+File 3,1,<../../libcpu/arm/common/div0.c><common_div0.c>
+File 3,1,<../../libcpu/arm/common/showmem.c><common_showmem.c>
+File 4,1,<../../components/pthreads/clock_time.c><pthreads_clock_time.c>
+File 4,1,<../../components/pthreads/mqueue.c><pthreads_mqueue.c>
+File 4,1,<../../components/pthreads/pthread.c><pthreads_pthread.c>
+File 4,1,<../../components/pthreads/pthread_attr.c><pthreads_pthread_attr.c>
+File 4,1,<../../components/pthreads/pthread_barrier.c><pthreads_pthread_barrier.c>
+File 4,1,<../../components/pthreads/pthread_cond.c><pthreads_pthread_cond.c>
+File 4,1,<../../components/pthreads/pthread_mutex.c><pthreads_pthread_mutex.c>
+File 4,1,<../../components/pthreads/pthread_rwlock.c><pthreads_pthread_rwlock.c>
+File 4,1,<../../components/pthreads/pthread_spin.c><pthreads_pthread_spin.c>
+File 4,1,<../../components/pthreads/pthread_tls.c><pthreads_pthread_tls.c>
+File 4,1,<../../components/pthreads/sched.c><pthreads_sched.c>
+File 4,1,<../../components/pthreads/semaphore.c><pthreads_semaphore.c>
+File 5,1,<../../components/libc/armlibc/mem_std.c><armlibc_mem_std.c>
+File 5,1,<../../components/libc/armlibc/stubs.c><armlibc_stubs.c>
+File 6,1,<../../components/external/libz/adler32.c><libz_adler32.c>
+File 6,1,<../../components/external/libz/compress.c><libz_compress.c>
+File 6,1,<../../components/external/libz/crc32.c><libz_crc32.c>
+File 6,1,<../../components/external/libz/deflate.c><libz_deflate.c>
+File 6,1,<../../components/external/libz/infback.c><libz_infback.c>
+File 6,1,<../../components/external/libz/inffast.c><libz_inffast.c>
+File 6,1,<../../components/external/libz/inflate.c><libz_inflate.c>
+File 6,1,<../../components/external/libz/inftrees.c><libz_inftrees.c>
+File 6,1,<../../components/external/libz/trees.c><libz_trees.c>
+File 6,1,<../../components/external/libz/uncompr.c><libz_uncompr.c>
+File 6,1,<../../components/external/libz/zutil.c><libz_zutil.c>
+File 7,1,<../../components/external/jpeg/jaricom.c><jpeg_jaricom.c>
+File 7,1,<../../components/external/jpeg/jcomapi.c><jpeg_jcomapi.c>
+File 7,1,<../../components/external/jpeg/jutils.c><jpeg_jutils.c>
+File 7,1,<../../components/external/jpeg/jerror.c><jpeg_jerror.c>
+File 7,1,<../../components/external/jpeg/jmemmgr.c><jpeg_jmemmgr.c>
+File 7,1,<../../components/external/jpeg/jdapimin.c><jpeg_jdapimin.c>
+File 7,1,<../../components/external/jpeg/jdapistd.c><jpeg_jdapistd.c>
+File 7,1,<../../components/external/jpeg/jdarith.c><jpeg_jdarith.c>
+File 7,1,<../../components/external/jpeg/jdtrans.c><jpeg_jdtrans.c>
+File 7,1,<../../components/external/jpeg/jdmaster.c><jpeg_jdmaster.c>
+File 7,1,<../../components/external/jpeg/jdinput.c><jpeg_jdinput.c>
+File 7,1,<../../components/external/jpeg/jdmarker.c><jpeg_jdmarker.c>
+File 7,1,<../../components/external/jpeg/jdhuff.c><jpeg_jdhuff.c>
+File 7,1,<../../components/external/jpeg/jdmainct.c><jpeg_jdmainct.c>
+File 7,1,<../../components/external/jpeg/jdcoefct.c><jpeg_jdcoefct.c>
+File 7,1,<../../components/external/jpeg/jdpostct.c><jpeg_jdpostct.c>
+File 7,1,<../../components/external/jpeg/jddctmgr.c><jpeg_jddctmgr.c>
+File 7,1,<../../components/external/jpeg/jidctfst.c><jpeg_jidctfst.c>
+File 7,1,<../../components/external/jpeg/jidctflt.c><jpeg_jidctflt.c>
+File 7,1,<../../components/external/jpeg/jidctint.c><jpeg_jidctint.c>
+File 7,1,<../../components/external/jpeg/jdsample.c><jpeg_jdsample.c>
+File 7,1,<../../components/external/jpeg/jdcolor.c><jpeg_jdcolor.c>
+File 7,1,<../../components/external/jpeg/jquant1.c><jpeg_jquant1.c>
+File 7,1,<../../components/external/jpeg/jquant2.c><jpeg_jquant2.c>
+File 7,1,<../../components/external/jpeg/jdmerge.c><jpeg_jdmerge.c>
+File 7,1,<../../components/external/jpeg/jmemnobs.c><jpeg_jmemnobs.c>
+File 8,1,<../../components/external/libpng/png.c><libpng_png.c>
+File 8,1,<../../components/external/libpng/pngerror.c><libpng_pngerror.c>
+File 8,1,<../../components/external/libpng/pnggccrd.c><libpng_pnggccrd.c>
+File 8,1,<../../components/external/libpng/pngget.c><libpng_pngget.c>
+File 8,1,<../../components/external/libpng/pngmem.c><libpng_pngmem.c>
+File 8,1,<../../components/external/libpng/pngpread.c><libpng_pngpread.c>
+File 8,1,<../../components/external/libpng/pngread.c><libpng_pngread.c>
+File 8,1,<../../components/external/libpng/pngrio.c><libpng_pngrio.c>
+File 8,1,<../../components/external/libpng/pngrtran.c><libpng_pngrtran.c>
+File 8,1,<../../components/external/libpng/pngrutil.c><libpng_pngrutil.c>
+File 8,1,<../../components/external/libpng/pngset.c><libpng_pngset.c>
+File 8,1,<../../components/external/libpng/pngtrans.c><libpng_pngtrans.c>
+File 8,1,<../../components/external/libpng/pngvcrd.c><libpng_pngvcrd.c>
+File 8,1,<../../components/external/libpng/pngwio.c><libpng_pngwio.c>
+File 8,1,<../../components/external/libpng/pngwrite.c><libpng_pngwrite.c>
+File 8,1,<../../components/external/libpng/pngwtran.c><libpng_pngwtran.c>
+File 8,1,<../../components/external/libpng/pngwutil.c><libpng_pngwutil.c>
+File 9,1,<../../components/libdl/dlclose.c><libdl_dlclose.c>
+File 9,1,<../../components/libdl/dlerror.c><libdl_dlerror.c>
+File 9,1,<../../components/libdl/dlopen.c><libdl_dlopen.c>
+File 9,1,<../../components/libdl/dlsym.c><libdl_dlsym.c>
+File 10,1,<../../components/finsh/shell.c><finsh_shell.c>
+File 10,1,<../../components/finsh/symbol.c><finsh_symbol.c>
+File 10,1,<../../components/finsh/cmd.c><finsh_cmd.c>
+File 10,1,<../../components/finsh/finsh_compiler.c><finsh_finsh_compiler.c>
+File 10,1,<../../components/finsh/finsh_error.c><finsh_finsh_error.c>
+File 10,1,<../../components/finsh/finsh_heap.c><finsh_finsh_heap.c>
+File 10,1,<../../components/finsh/finsh_init.c><finsh_finsh_init.c>
+File 10,1,<../../components/finsh/finsh_node.c><finsh_finsh_node.c>
+File 10,1,<../../components/finsh/finsh_ops.c><finsh_finsh_ops.c>
+File 10,1,<../../components/finsh/finsh_parser.c><finsh_finsh_parser.c>
+File 10,1,<../../components/finsh/finsh_var.c><finsh_finsh_var.c>
+File 10,1,<../../components/finsh/finsh_vm.c><finsh_finsh_vm.c>
+File 10,1,<../../components/finsh/finsh_token.c><finsh_finsh_token.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/api/api_lib.c><api_api_lib.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/api/api_msg.c><api_api_msg.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/api/err.c><api_err.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/api/netbuf.c><api_netbuf.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/api/netdb.c><api_netdb.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/api/netifapi.c><api_netifapi.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/api/sockets.c><api_sockets.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/api/tcpip.c><api_tcpip.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/arch/sys_arch.c><arch_sys_arch.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/def.c><core_def.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/dhcp.c><core_dhcp.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/dns.c><core_dns.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/init.c><core_init.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/memp.c><core_memp.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/netif.c><core_netif.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/pbuf.c><core_pbuf.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/raw.c><core_raw.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/stats.c><core_stats.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/sys.c><core_sys.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/tcp.c><core_tcp.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/tcp_in.c><core_tcp_in.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/tcp_out.c><core_tcp_out.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/timers.c><core_timers.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/udp.c><core_udp.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/ipv4/autoip.c><ipv4_autoip.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/ipv4/icmp.c><ipv4_icmp.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/ipv4/igmp.c><ipv4_igmp.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/ipv4/inet.c><ipv4_inet.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/ipv4/inet_chksum.c><ipv4_inet_chksum.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/ipv4/ip.c><ipv4_ip.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/ipv4/ip_addr.c><ipv4_ip_addr.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/core/ipv4/ip_frag.c><ipv4_ip_frag.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/netif/etharp.c><netif_etharp.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/netif/ethernetif.c><netif_ethernetif.c>
+File 11,1,<../../components/net/lwip-1.4.1/src/netif/slipif.c><netif_slipif.c>
+File 12,1,<../../components/dfs/src/dfs.c><src_dfs.c>
+File 12,1,<../../components/dfs/src/dfs_file.c><src_dfs_file.c>
+File 12,1,<../../components/dfs/src/dfs_fs.c><src_dfs_fs.c>
+File 12,1,<../../components/dfs/src/dfs_posix.c><src_dfs_posix.c>
+File 12,1,<../../components/dfs/filesystems/elmfat/dfs_elm.c><elmfat_dfs_elm.c>
+File 12,1,<../../components/dfs/filesystems/elmfat/ff.c><elmfat_ff.c>
+File 12,1,<../../components/dfs/filesystems/elmfat/option/cc936.c><option_cc936.c>
+File 12,1,<../../components/dfs/filesystems/devfs/console.c><devfs_console.c>
+File 12,1,<../../components/dfs/filesystems/devfs/devfs.c><devfs_devfs.c>
+
+
+
+
+Options 1,0,0  // Target 'RT-Thread Mini2440'
+ Device (S3C2440A)
+ Vendor (Samsung)
+ Cpu (IRAM(0x40000000-0x40000FFF) CLOCK(12000000) CPUTYPE(ARM920T))
+ FlashUt ()
+ StupF ("STARTUP\Samsung\S3C2440.s" ("Samsung S3C2440 Startup Code"))
+ FlashDR (UL2ARM(-UV2077N9E -O40 -S0 -C0 -N00("ARM920T Core") -D00(0032409D) -L00(4) -FO7 -FD40000000 -FC1000 -FN1 -FF0S3C2440_NAND_SP -FS030000000 -FL07FFC000))
+ DevID (4277)
+ Rgf (S3C2440.H)
+ Mem ()
+ C ()
+ A ()
+ RL ()
+ OH ()
+ DBC_IFX ()
+ DBC_CMS ()
+ DBC_AMS ()
+ DBC_LMS ()
+ UseEnv=0
+ EnvBin ()
+ EnvInc ()
+ EnvLib ()
+ EnvReg (<28>Samsung\)
+ OrgReg (<28>Samsung\)
+ TgStat=16
+ OutDir (.\obj\)
+ OutName (rtthread-mini2440)
+ GenApp=1
+ GenLib=0
+ GenHex=0
+ Debug=1
+ Browse=0
+ LstDir (.\obj)
+ HexSel=1
+ MG32K=0
+ TGMORE=0
+ RunUsr 0 0 <>
+ RunUsr 1 0 <>
+ BrunUsr 0 0 <>
+ BrunUsr 1 0 <>
+ CrunUsr 0 0 <>
+ CrunUsr 1 0 <>
+ SVCSID <>
+ GLFLAGS=1790
+ ADSFLGA { 242,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+ ACPUTYP (ARM920T)
+ RVDEV ()
+ ADSTFLGA { 0,8,64,0,96,0,64,64,0,0,0,0,0,0,0,0,0,0,0,0 }
+ OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+ OCMADSIRAM { 0,0,0,0,64,0,16,0,0 }
+ OCMADSIROM { 0,0,0,0,0,0,0,0,0 }
+ OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
+ OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,64,0,16,0,0,0,0,0,0,0,0,0,0,0 }
+ RV_STAVEC ()
+ ADSCCFLG { 5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+ ADSCMISC (--diag_suppress=870)
+ ADSCDEFN (RT_USING_ARM_LIBC)
+ ADSCUDEF ()
+ ADSCINCD (../../components/libdl;../../components/external/libpng;../../libcpu/arm/s3c24x0;../../components/finsh;../../components/net/lwip-1.4.1/src;../../components/pthreads;../../components/dfs/filesystems/elmfat;../../libcpu/arm/common;../../components/dfs/filesystems/devfs;.;../../components/external/libz;../../components/net/lwip-1.4.1/src/include/netif;../../include;../../components/dfs/include;../../components/net/lwip-1.4.1/src/include;../../components/external/jpeg;../../components/libc/armlibc;../../components/net/lwip-1.4.1/src/arch/include;../../components/net/lwip-1.4.1/src/include/ipv4)
+ ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+ ADSAMISC ()
+ ADSADEFN ()
+ ADSAUDEF ()
+ ADSAINCD ()
+ PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+ IncBld=1
+ AlwaysBuild=0
+ GenAsm=0
+ AsmAsm=0
+ PublicsOnly=0
+ StopCode=3
+ CustArgs ()
+ LibMods ()
+ ADSLDFG { 16,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+ ADSLDTA (0x30000000)
+ ADSLDDA (0x40000000)
+ ADSLDSC (rtthread-mini2440.sct)
+ ADSLDIB ()
+ ADSLDIC ()
+ ADSLDMC ( --keep *.o(RTMSymTab)   --keep *.o(FSymTab) --keep *.o(VSymTab) )
+ ADSLDIF ()
+ ADSLDDW ()
+  OPTDL (SARM.DLL)()(DARMSS9.DLL)(-pS3C2440A)(SARM.DLL)()(TARMSS9.DLL)(-pS3C2440A)
+  OPTDBG 47614,6,()()()()()()()()()(.\Ext_RAM.ini) (Segger\JLTAgdi.dll)()()()
+ FLASH1 { 1,0,0,0,1,0,0,0,4,16,0,0,0,0,0,0,0,0,0,0 }
+ FLASH2 (Segger\JLTAgdi.dll)
+ FLASH3 ("" ())
+ FLASH4 ()
+EndOpt
+

bsp/nrf51822/Libraries/CMSIS/Include/core_cm0.h

@@ -0,0 +1,711 @@
+/**************************************************************************//**
+ * @file     core_cm0.h
+ * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
+ * @version  V4.00
+ * @date     22. August 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#if defined ( __ICCARM__ )
+ #pragma system_include  /* treat file as system include file for MISRA check */
+#endif
+
+#ifndef __CORE_CM0_H_GENERIC
+#define __CORE_CM0_H_GENERIC
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/** \ingroup Cortex_M0
+  @{
+ */
+
+/*  CMSIS CM0 definitions */
+#define __CM0_CMSIS_VERSION_MAIN  (0x04)                                   /*!< [31:16] CMSIS HAL main version   */
+#define __CM0_CMSIS_VERSION_SUB   (0x00)                                   /*!< [15:0]  CMSIS HAL sub version    */
+#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16) | \
+                                    __CM0_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
+
+#define __CORTEX_M                (0x00)                                   /*!< Cortex-M Core                    */
+
+
+#if   defined ( __CC_ARM )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+  #define __STATIC_INLINE  static __inline
+
+#elif defined ( __GNUC__ )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __ICCARM__ )
+  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TMS470__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __TASKING__ )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#elif defined ( __CSMC__ )
+  #define __packed
+  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
+  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
+  #define __STATIC_INLINE  static inline
+
+#endif
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TMS470__ )
+  #if defined __TI__VFP_SUPPORT____
+    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )		/* Cosmic */
+  #if ( __CSMC__ & 0x400)		// FPU present for parser
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+#endif
+
+#include <stdint.h>                      /* standard types definitions                      */
+#include <core_cmInstr.h>                /* Core Instruction Access                         */
+#include <core_cmFunc.h>                 /* Core Function Access                            */ 
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM0_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM0_H_DEPENDANT
+#define __CORE_CM0_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM0_REV
+    #define __CM0_REV               0x0000
+    #warning "__CM0_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions                */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+
+/*@} end of group Cortex_M0 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+ ******************************************************************************/
+/** \defgroup CMSIS_core_register Defines and Type Definitions
+    \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_CORE  Status and Control Registers
+    \brief  Core Register type definitions.
+  @{
+ */
+
+/** \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
+#else
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
+#endif
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} APSR_Type;
+
+
+/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} IPSR_Type;
+
+
+/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
+#if (__CORTEX_M != 0x04)
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
+#else
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
+#endif
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} xPSR_Type;
+
+
+/** \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
+  } b;                                   /*!< Structure used for bit  access                  */
+  uint32_t w;                            /*!< Type      used for word access                  */
+} CONTROL_Type;
+
+/*@} end of group CMSIS_CORE */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+    \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IO uint32_t ISER[1];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
+       uint32_t RESERVED0[31];
+  __IO uint32_t ICER[1];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register          */
+       uint32_t RSERVED1[31];
+  __IO uint32_t ISPR[1];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register           */
+       uint32_t RESERVED2[31];
+  __IO uint32_t ICPR[1];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register         */
+       uint32_t RESERVED3[31];
+       uint32_t RESERVED4[64];
+  __IO uint32_t IP[8];                   /*!< Offset: 0x300 (R/W)  Interrupt Priority Register              */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SCB     System Control Block (SCB)
+    \brief      Type definitions for the System Control Block Registers
+  @{
+ */
+
+/** \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
+  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
+       uint32_t RESERVED0;
+  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
+  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
+  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
+       uint32_t RESERVED1;
+  __IO uint32_t SHP[2];                  /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED   */
+  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+    \brief      Type definitions for the System Timer Registers.
+  @{
+ */
+
+/** \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
+  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
+  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_CALIB_TENMS_Pos)        /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/** \ingroup  CMSIS_core_register
+    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+    \brief      Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR)
+                are only accessible over DAP and not via processor. Therefore
+                they are not covered by the Cortex-M0 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/** \ingroup    CMSIS_core_register
+    \defgroup   CMSIS_core_base     Core Definitions
+    \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Cortex-M0 Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address              */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                 */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+    \brief      Functions that manage interrupts and exceptions via the NVIC.
+    @{
+ */
+
+/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  (((uint32_t)(IRQn)       )    &  0x03) * 8 )
+#define _SHP_IDX(IRQn)           ( ((((uint32_t)(IRQn) & 0x0F)-8) >>    2)     )
+#define _IP_IDX(IRQn)            (   ((uint32_t)(IRQn)            >>    2)     )
+
+
+/** \brief  Enable External Interrupt
+
+    The function enables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Disable External Interrupt
+
+    The function disables a device-specific interrupt in the NVIC interrupt controller.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Get Pending Interrupt
+
+    The function reads the pending register in the NVIC and returns the pending bit
+    for the specified interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+
+    \return             0  Interrupt status is not pending.
+    \return             1  Interrupt status is pending.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
+}
+
+
+/** \brief  Set Pending Interrupt
+
+    The function sets the pending bit of an external interrupt.
+
+    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
+}
+
+
+/** \brief  Clear Pending Interrupt
+
+    The function clears the pending bit of an external interrupt.
+
+    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+ */
+__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
+}
+
+
+/** \brief  Set Interrupt Priority
+
+    The function sets the priority of an interrupt.
+
+    \note The priority cannot be set for every core interrupt.
+
+    \param [in]      IRQn  Interrupt number.
+    \param [in]  priority  Priority to set.
+ */
+__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+  else {
+    NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
+        (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
+}
+
+
+/** \brief  Get Interrupt Priority
+
+    The function reads the priority of an interrupt. The interrupt
+    number can be positive to specify an external (device specific)
+    interrupt, or negative to specify an internal (core) interrupt.
+
+
+    \param [in]   IRQn  Interrupt number.
+    \return             Interrupt Priority. Value is aligned automatically to the implemented
+                        priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M0 system interrupts */
+  else {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & 0xFF) >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */
+}
+
+
+/** \brief  System Reset
+
+    The function initiates a system reset request to reset the MCU.
+ */
+__STATIC_INLINE void NVIC_SystemReset(void)
+{
+  __DSB();                                                     /* Ensure all outstanding memory accesses included
+                                                                  buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                     /* Ensure completion of memory access */
+  while(1);                                                    /* wait until reset */
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+    \brief      Functions that configure the System.
+  @{
+ */
+
+#if (__Vendor_SysTickConfig == 0)
+
+/** \brief  System Tick Configuration
+
+    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
+    Counter is in free running mode to generate periodic interrupts.
+
+    \param [in]  ticks  Number of ticks between two interrupts.
+
+    \return          0  Function succeeded.
+    \return          1  Function failed.
+
+    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+    must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */
+
+  SysTick->LOAD  = ticks - 1;                                  /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                  /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM0_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */

bsp/nrf51822/Libraries/CMSIS/Include/core_cmFunc.h

@@ -0,0 +1,637 @@
+/**************************************************************************//**
+ * @file     core_cmFunc.h
+ * @brief    CMSIS Cortex-M Core Function Access Header File
+ * @version  V4.00
+ * @date     28. August 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#ifndef __CORE_CMFUNC_H
+#define __CORE_CMFUNC_H
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#if (__ARMCC_VERSION < 400677)
+  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
+#endif
+
+/* intrinsic void __enable_irq();     */
+/* intrinsic void __disable_irq();    */
+
+/** \brief  Get Control Register
+
+    This function returns the content of the Control Register.
+
+    \return               Control Register value
+ */
+__STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+  register uint32_t __regControl         __ASM("control");
+  return(__regControl);
+}
+
+
+/** \brief  Set Control Register
+
+    This function writes the given value to the Control Register.
+
+    \param [in]    control  Control Register value to set
+ */
+__STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+  register uint32_t __regControl         __ASM("control");
+  __regControl = control;
+}
+
+
+/** \brief  Get IPSR Register
+
+    This function returns the content of the IPSR Register.
+
+    \return               IPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_IPSR(void)
+{
+  register uint32_t __regIPSR          __ASM("ipsr");
+  return(__regIPSR);
+}
+
+
+/** \brief  Get APSR Register
+
+    This function returns the content of the APSR Register.
+
+    \return               APSR Register value
+ */
+__STATIC_INLINE uint32_t __get_APSR(void)
+{
+  register uint32_t __regAPSR          __ASM("apsr");
+  return(__regAPSR);
+}
+
+
+/** \brief  Get xPSR Register
+
+    This function returns the content of the xPSR Register.
+
+    \return               xPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_xPSR(void)
+{
+  register uint32_t __regXPSR          __ASM("xpsr");
+  return(__regXPSR);
+}
+
+
+/** \brief  Get Process Stack Pointer
+
+    This function returns the current value of the Process Stack Pointer (PSP).
+
+    \return               PSP Register value
+ */
+__STATIC_INLINE uint32_t __get_PSP(void)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  return(__regProcessStackPointer);
+}
+
+
+/** \brief  Set Process Stack Pointer
+
+    This function assigns the given value to the Process Stack Pointer (PSP).
+
+    \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  __regProcessStackPointer = topOfProcStack;
+}
+
+
+/** \brief  Get Main Stack Pointer
+
+    This function returns the current value of the Main Stack Pointer (MSP).
+
+    \return               MSP Register value
+ */
+__STATIC_INLINE uint32_t __get_MSP(void)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  return(__regMainStackPointer);
+}
+
+
+/** \brief  Set Main Stack Pointer
+
+    This function assigns the given value to the Main Stack Pointer (MSP).
+
+    \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  __regMainStackPointer = topOfMainStack;
+}
+
+
+/** \brief  Get Priority Mask
+
+    This function returns the current state of the priority mask bit from the Priority Mask Register.
+
+    \return               Priority Mask value
+ */
+__STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  return(__regPriMask);
+}
+
+
+/** \brief  Set Priority Mask
+
+    This function assigns the given value to the Priority Mask Register.
+
+    \param [in]    priMask  Priority Mask
+ */
+__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  __regPriMask = (priMask);
+}
+
+
+#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
+
+/** \brief  Enable FIQ
+
+    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq
+
+
+/** \brief  Disable FIQ
+
+    This function disables FIQ interrupts by setting the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq
+
+
+/** \brief  Get Base Priority
+
+    This function returns the current value of the Base Priority register.
+
+    \return               Base Priority register value
+ */
+__STATIC_INLINE uint32_t  __get_BASEPRI(void)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  return(__regBasePri);
+}
+
+
+/** \brief  Set Base Priority
+
+    This function assigns the given value to the Base Priority register.
+
+    \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  __regBasePri = (basePri & 0xff);
+}
+
+
+/** \brief  Get Fault Mask
+
+    This function returns the current value of the Fault Mask register.
+
+    \return               Fault Mask register value
+ */
+__STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  return(__regFaultMask);
+}
+
+
+/** \brief  Set Fault Mask
+
+    This function assigns the given value to the Fault Mask register.
+
+    \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  __regFaultMask = (faultMask & (uint32_t)1);
+}
+
+#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
+
+
+#if       (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
+
+/** \brief  Get FPSCR
+
+    This function returns the current value of the Floating Point Status/Control register.
+
+    \return               Floating Point Status/Control register value
+ */
+__STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  register uint32_t __regfpscr         __ASM("fpscr");
+  return(__regfpscr);
+#else
+   return(0);
+#endif
+}
+
+
+/** \brief  Set FPSCR
+
+    This function assigns the given value to the Floating Point Status/Control register.
+
+    \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  register uint32_t __regfpscr         __ASM("fpscr");
+  __regfpscr = (fpscr);
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
+
+
+#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+/** \brief  Enable IRQ Interrupts
+
+  This function enables IRQ interrupts by clearing the I-bit in the CPSR.
+  Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
+{
+  __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/** \brief  Disable IRQ Interrupts
+
+  This function disables IRQ interrupts by setting the I-bit in the CPSR.
+  Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+}
+
+
+/** \brief  Get Control Register
+
+    This function returns the content of the Control Register.
+
+    \return               Control Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Control Register
+
+    This function writes the given value to the Control Register.
+
+    \param [in]    control  Control Register value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+/** \brief  Get IPSR Register
+
+    This function returns the content of the IPSR Register.
+
+    \return               IPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get APSR Register
+
+    This function returns the content of the APSR Register.
+
+    \return               APSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get xPSR Register
+
+    This function returns the content of the xPSR Register.
+
+    \return               xPSR Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Get Process Stack Pointer
+
+    This function returns the current value of the Process Stack Pointer (PSP).
+
+    \return               PSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
+{
+  register uint32_t result;
+
+  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Process Stack Pointer
+
+    This function assigns the given value to the Process Stack Pointer (PSP).
+
+    \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
+}
+
+
+/** \brief  Get Main Stack Pointer
+
+    This function returns the current value of the Main Stack Pointer (MSP).
+
+    \return               MSP Register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
+{
+  register uint32_t result;
+
+  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Main Stack Pointer
+
+    This function assigns the given value to the Main Stack Pointer (MSP).
+
+    \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
+}
+
+
+/** \brief  Get Priority Mask
+
+    This function returns the current state of the priority mask bit from the Priority Mask Register.
+
+    \return               Priority Mask value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Priority Mask
+
+    This function assigns the given value to the Priority Mask Register.
+
+    \param [in]    priMask  Priority Mask
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if       (__CORTEX_M >= 0x03)
+
+/** \brief  Enable FIQ
+
+    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
+{
+  __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/** \brief  Disable FIQ
+
+    This function disables FIQ interrupts by setting the F-bit in the CPSR.
+    Can only be executed in Privileged modes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
+{
+  __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/** \brief  Get Base Priority
+
+    This function returns the current value of the Base Priority register.
+
+    \return               Base Priority register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Base Priority
+
+    This function assigns the given value to the Base Priority register.
+
+    \param [in]    basePri  Base Priority value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
+}
+
+
+/** \brief  Get Fault Mask
+
+    This function returns the current value of the Fault Mask register.
+
+    \return               Fault Mask register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+/** \brief  Set Fault Mask
+
+    This function assigns the given value to the Fault Mask register.
+
+    \param [in]    faultMask  Fault Mask value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+
+#if       (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
+
+/** \brief  Get FPSCR
+
+    This function returns the current value of the Floating Point Status/Control register.
+
+    \return               Floating Point Status/Control register value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  uint32_t result;
+
+  /* Empty asm statement works as a scheduling barrier */
+  __ASM volatile ("");
+  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
+  __ASM volatile ("");
+  return(result);
+#else
+   return(0);
+#endif
+}
+
+
+/** \brief  Set FPSCR
+
+    This function assigns the given value to the Floating Point Status/Control register.
+
+    \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  /* Empty asm statement works as a scheduling barrier */
+  __ASM volatile ("");
+  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
+  __ASM volatile ("");
+#endif
+}
+
+#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
+
+
+#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+#include <cmsis_iar.h>
+
+
+#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
+/* TI CCS specific functions */
+#include <cmsis_ccs.h>
+
+
+#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
+/* TASKING carm specific functions */
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+
+#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
+/* Cosmic specific functions */
+#include <cmsis_csm.h>
+
+#endif
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+#endif /* __CORE_CMFUNC_H */

bsp/nrf51822/Libraries/CMSIS/Include/core_cmInstr.h

@@ -0,0 +1,880 @@
+/**************************************************************************//**
+ * @file     core_cmInstr.h
+ * @brief    CMSIS Cortex-M Core Instruction Access Header File
+ * @version  V4.00
+ * @date     28. August 2014
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2009 - 2014 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#ifndef __CORE_CMINSTR_H
+#define __CORE_CMINSTR_H
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#if (__ARMCC_VERSION < 400677)
+  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
+#endif
+
+
+/** \brief  No Operation
+
+    No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP                             __nop
+
+
+/** \brief  Wait For Interrupt
+
+    Wait For Interrupt is a hint instruction that suspends execution
+    until one of a number of events occurs.
+ */
+#define __WFI                             __wfi
+
+
+/** \brief  Wait For Event
+
+    Wait For Event is a hint instruction that permits the processor to enter
+    a low-power state until one of a number of events occurs.
+ */
+#define __WFE                             __wfe
+
+
+/** \brief  Send Event
+
+    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV                             __sev
+
+
+/** \brief  Instruction Synchronization Barrier
+
+    Instruction Synchronization Barrier flushes the pipeline in the processor,
+    so that all instructions following the ISB are fetched from cache or
+    memory, after the instruction has been completed.
+ */
+#define __ISB()                           __isb(0xF)
+
+
+/** \brief  Data Synchronization Barrier
+
+    This function acts as a special kind of Data Memory Barrier.
+    It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()                           __dsb(0xF)
+
+
+/** \brief  Data Memory Barrier
+
+    This function ensures the apparent order of the explicit memory operations before
+    and after the instruction, without ensuring their completion.
+ */
+#define __DMB()                           __dmb(0xF)
+
+
+/** \brief  Reverse byte order (32 bit)
+
+    This function reverses the byte order in integer value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#define __REV                             __rev
+
+
+/** \brief  Reverse byte order (16 bit)
+
+    This function reverses the byte order in two unsigned short values.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
+{
+  rev16 r0, r0
+  bx lr
+}
+#endif
+
+/** \brief  Reverse byte order in signed short value
+
+    This function reverses the byte order in a signed short value with sign extension to integer.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
+{
+  revsh r0, r0
+  bx lr
+}
+#endif
+
+
+/** \brief  Rotate Right in unsigned value (32 bit)
+
+    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+
+    \param [in]    value  Value to rotate
+    \param [in]    value  Number of Bits to rotate
+    \return               Rotated value
+ */
+#define __ROR                             __ror
+
+
+/** \brief  Breakpoint
+
+    This function causes the processor to enter Debug state.
+    Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+
+    \param [in]    value  is ignored by the processor.
+                   If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __breakpoint(value)
+
+
+#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
+
+/** \brief  Reverse bit order of value
+
+    This function reverses the bit order of the given value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+#define __RBIT                            __rbit
+
+
+/** \brief  LDR Exclusive (8 bit)
+
+    This function executes a exclusive LDR instruction for 8 bit value.
+
+    \param [in]    ptr  Pointer to data
+    \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
+
+
+/** \brief  LDR Exclusive (16 bit)
+
+    This function executes a exclusive LDR instruction for 16 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
+
+
+/** \brief  LDR Exclusive (32 bit)
+
+    This function executes a exclusive LDR instruction for 32 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
+
+
+/** \brief  STR Exclusive (8 bit)
+
+    This function executes a exclusive STR instruction for 8 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXB(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  STR Exclusive (16 bit)
+
+    This function executes a exclusive STR instruction for 16 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXH(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  STR Exclusive (32 bit)
+
+    This function executes a exclusive STR instruction for 32 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+#define __STREXW(value, ptr)              __strex(value, ptr)
+
+
+/** \brief  Remove the exclusive lock
+
+    This function removes the exclusive lock which is created by LDREX.
+
+ */
+#define __CLREX                           __clrex
+
+
+/** \brief  Signed Saturate
+
+    This function saturates a signed value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (1..32)
+    \return             Saturated value
+ */
+#define __SSAT                            __ssat
+
+
+/** \brief  Unsigned Saturate
+
+    This function saturates an unsigned value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (0..31)
+    \return             Saturated value
+ */
+#define __USAT                            __usat
+
+
+/** \brief  Count leading zeros
+
+    This function counts the number of leading zeros of a data value.
+
+    \param [in]  value  Value to count the leading zeros
+    \return             number of leading zeros in value
+ */
+#define __CLZ                             __clz
+
+
+/** \brief  Rotate Right with Extend (32 bit)
+
+    This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.
+
+    \param [in]    value  Value to rotate
+    \return               Rotated value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
+{
+  rrx r0, r0
+  bx lr
+}
+#endif
+
+
+/** \brief  LDRT Unprivileged (8 bit)
+
+    This function executes a Unprivileged LDRT instruction for 8 bit value.
+
+    \param [in]    ptr  Pointer to data
+    \return             value of type uint8_t at (*ptr)
+ */
+#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
+
+
+/** \brief  LDRT Unprivileged (16 bit)
+
+    This function executes a Unprivileged LDRT instruction for 16 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint16_t at (*ptr)
+ */
+#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
+
+
+/** \brief  LDRT Unprivileged (32 bit)
+
+    This function executes a Unprivileged LDRT instruction for 32 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint32_t at (*ptr)
+ */
+#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
+
+
+/** \brief  STRT Unprivileged (8 bit)
+
+    This function executes a Unprivileged STRT instruction for 8 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+ */
+#define __STRBT(value, ptr)               __strt(value, ptr)
+
+
+/** \brief  STRT Unprivileged (16 bit)
+
+    This function executes a Unprivileged STRT instruction for 16 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+ */
+#define __STRHT(value, ptr)               __strt(value, ptr)
+
+
+/** \brief  STRT Unprivileged (32 bit)
+
+    This function executes a Unprivileged STRT instruction for 32 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+ */
+#define __STRT(value, ptr)                __strt(value, ptr)
+
+#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
+
+
+#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constrant "l"
+ * Otherwise, use general registers, specified by constrant "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/** \brief  No Operation
+
+    No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
+{
+  __ASM volatile ("nop");
+}
+
+
+/** \brief  Wait For Interrupt
+
+    Wait For Interrupt is a hint instruction that suspends execution
+    until one of a number of events occurs.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
+{
+  __ASM volatile ("wfi");
+}
+
+
+/** \brief  Wait For Event
+
+    Wait For Event is a hint instruction that permits the processor to enter
+    a low-power state until one of a number of events occurs.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
+{
+  __ASM volatile ("wfe");
+}
+
+
+/** \brief  Send Event
+
+    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
+{
+  __ASM volatile ("sev");
+}
+
+
+/** \brief  Instruction Synchronization Barrier
+
+    Instruction Synchronization Barrier flushes the pipeline in the processor,
+    so that all instructions following the ISB are fetched from cache or
+    memory, after the instruction has been completed.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
+{
+  __ASM volatile ("isb");
+}
+
+
+/** \brief  Data Synchronization Barrier
+
+    This function acts as a special kind of Data Memory Barrier.
+    It completes when all explicit memory accesses before this instruction complete.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
+{
+  __ASM volatile ("dsb");
+}
+
+
+/** \brief  Data Memory Barrier
+
+    This function ensures the apparent order of the explicit memory operations before
+    and after the instruction, without ensuring their completion.
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
+{
+  __ASM volatile ("dmb");
+}
+
+
+/** \brief  Reverse byte order (32 bit)
+
+    This function reverses the byte order in integer value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
+  return __builtin_bswap32(value);
+#else
+  uint32_t result;
+
+  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+#endif
+}
+
+
+/** \brief  Reverse byte order (16 bit)
+
+    This function reverses the byte order in two unsigned short values.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/** \brief  Reverse byte order in signed short value
+
+    This function reverses the byte order in a signed short value with sign extension to integer.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+  return (short)__builtin_bswap16(value);
+#else
+  uint32_t result;
+
+  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+#endif
+}
+
+
+/** \brief  Rotate Right in unsigned value (32 bit)
+
+    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+
+    \param [in]    value  Value to rotate
+    \param [in]    value  Number of Bits to rotate
+    \return               Rotated value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  return (op1 >> op2) | (op1 << (32 - op2)); 
+}
+
+
+/** \brief  Breakpoint
+
+    This function causes the processor to enter Debug state.
+    Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+
+    \param [in]    value  is ignored by the processor.
+                   If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
+
+
+#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
+
+/** \brief  Reverse bit order of value
+
+    This function reverses the bit order of the given value.
+
+    \param [in]    value  Value to reverse
+    \return               Reversed value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result;
+
+   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+   return(result);
+}
+
+
+/** \brief  LDR Exclusive (8 bit)
+
+    This function executes a exclusive LDR instruction for 8 bit value.
+
+    \param [in]    ptr  Pointer to data
+    \return             value of type uint8_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/** \brief  LDR Exclusive (16 bit)
+
+    This function executes a exclusive LDR instruction for 16 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint16_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/** \brief  LDR Exclusive (32 bit)
+
+    This function executes a exclusive LDR instruction for 32 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint32_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (8 bit)
+
+    This function executes a exclusive STR instruction for 8 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (16 bit)
+
+    This function executes a exclusive STR instruction for 16 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/** \brief  STR Exclusive (32 bit)
+
+    This function executes a exclusive STR instruction for 32 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+    \return          0  Function succeeded
+    \return          1  Function failed
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+   return(result);
+}
+
+
+/** \brief  Remove the exclusive lock
+
+    This function removes the exclusive lock which is created by LDREX.
+
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
+{
+  __ASM volatile ("clrex" ::: "memory");
+}
+
+
+/** \brief  Signed Saturate
+
+    This function saturates a signed value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (1..32)
+    \return             Saturated value
+ */
+#define __SSAT(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+
+/** \brief  Unsigned Saturate
+
+    This function saturates an unsigned value.
+
+    \param [in]  value  Value to be saturated
+    \param [in]    sat  Bit position to saturate to (0..31)
+    \return             Saturated value
+ */
+#define __USAT(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+
+/** \brief  Count leading zeros
+
+    This function counts the number of leading zeros of a data value.
+
+    \param [in]  value  Value to count the leading zeros
+    \return             number of leading zeros in value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/** \brief  Rotate Right with Extend (32 bit)
+
+    This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.
+
+    \param [in]    value  Value to rotate
+    \return               Rotated value
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/** \brief  LDRT Unprivileged (8 bit)
+
+    This function executes a Unprivileged LDRT instruction for 8 bit value.
+
+    \param [in]    ptr  Pointer to data
+    \return             value of type uint8_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/** \brief  LDRT Unprivileged (16 bit)
+
+    This function executes a Unprivileged LDRT instruction for 16 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint16_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/** \brief  LDRT Unprivileged (32 bit)
+
+    This function executes a Unprivileged LDRT instruction for 32 bit values.
+
+    \param [in]    ptr  Pointer to data
+    \return        value of type uint32_t at (*ptr)
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
+   return(result);
+}
+
+
+/** \brief  STRT Unprivileged (8 bit)
+
+    This function executes a Unprivileged STRT instruction for 8 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
+{
+   __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
+}
+
+
+/** \brief  STRT Unprivileged (16 bit)
+
+    This function executes a Unprivileged STRT instruction for 16 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
+{
+   __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
+}
+
+
+/** \brief  STRT Unprivileged (32 bit)
+
+    This function executes a Unprivileged STRT instruction for 32 bit values.
+
+    \param [in]  value  Value to store
+    \param [in]    ptr  Pointer to location
+ */
+__attribute__( ( always_inline ) ) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
+{
+   __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
+}
+
+#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
+
+
+#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+#include <cmsis_iar.h>
+
+
+#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
+/* TI CCS specific functions */
+#include <cmsis_ccs.h>
+
+
+#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
+/* TASKING carm specific functions */
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+
+#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
+/* Cosmic specific functions */
+#include <cmsis_csm.h>
+
+#endif
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+#endif /* __CORE_CMINSTR_H */

bsp/nrf51822/Libraries/SConscript

@@ -0,0 +1,27 @@
+import rtconfig
+Import('RTT_ROOT')
+from building import *
+
+# get current directory
+cwd = GetCurrentDir()
+
+# The set of source files associated with this SConscript file.
+src = Split("""
+nrf51822/Source/templates/system_nrf51.c
+""")
+
+#add for Startup script 
+if rtconfig.CROSS_TOOL == 'gcc':
+     src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
+elif rtconfig.CROSS_TOOL == 'keil':
+     src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
+elif rtconfig.CROSS_TOOL == 'iar':
+     src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
+
+path = [cwd + '/CMSIS/Include',
+        cwd + '/nrf51822/Include']
+
+CPPDEFINES = ['USE_STDPERIPH_DRIVER', 'NRF51']
+group = DefineGroup('Startup Code', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+Return('group')

bsp/nrf51822/Libraries/nrf51822/Include/nrf_gpio.h

@@ -0,0 +1,422 @@
+#ifndef NRF_GPIO_H__
+#define NRF_GPIO_H__
+
+#include "nrf51.h"
+#include "nrf51_bitfields.h"
+
+/**
+ * @defgroup nrf_gpio GPIO abstraction
+ * @{
+ * @ingroup nrf_drivers
+ * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
+ *
+ * Here, the GPIO ports are defined as follows:
+ * - Port 0 -> pin 0-7
+ * - Port 1 -> pin 8-15
+ * - Port 2 -> pin 16-23
+ * - Port 3 -> pin 24-31
+ */
+
+/**
+ * @enum nrf_gpio_port_dir_t
+ * @brief Enumerator used for setting the direction of a GPIO port.
+ */
+typedef enum
+{
+    NRF_GPIO_PORT_DIR_OUTPUT,       ///<  Output
+    NRF_GPIO_PORT_DIR_INPUT         ///<  Input
+} nrf_gpio_port_dir_t;
+
+/**
+ * @enum nrf_gpio_pin_dir_t
+ * Pin direction definitions.
+ */
+typedef enum
+{
+    NRF_GPIO_PIN_DIR_INPUT,   ///< Input
+    NRF_GPIO_PIN_DIR_OUTPUT   ///< Output
+} nrf_gpio_pin_dir_t;
+
+/**
+ * @enum nrf_gpio_port_select_t
+ * @brief Enumerator used for selecting between port 0 - 3.
+ */
+typedef enum
+{
+    NRF_GPIO_PORT_SELECT_PORT0 = 0,           ///<  Port 0 (GPIO pin 0-7)
+    NRF_GPIO_PORT_SELECT_PORT1,               ///<  Port 1 (GPIO pin 8-15)
+    NRF_GPIO_PORT_SELECT_PORT2,               ///<  Port 2 (GPIO pin 16-23)
+    NRF_GPIO_PORT_SELECT_PORT3,               ///<  Port 3 (GPIO pin 24-31)
+} nrf_gpio_port_select_t;
+
+/**
+ * @enum nrf_gpio_pin_pull_t
+ * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
+ */
+typedef enum
+{
+    NRF_GPIO_PIN_NOPULL   = GPIO_PIN_CNF_PULL_Disabled,                 ///<  Pin pullup resistor disabled
+    NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown,                 ///<  Pin pulldown resistor enabled
+    NRF_GPIO_PIN_PULLUP   = GPIO_PIN_CNF_PULL_Pullup,                   ///<  Pin pullup resistor enabled
+} nrf_gpio_pin_pull_t;
+
+/**
+ * @enum nrf_gpio_pin_sense_t
+ * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
+ */
+typedef enum
+{
+    NRF_GPIO_PIN_NOSENSE    = GPIO_PIN_CNF_SENSE_Disabled,              ///<  Pin sense level disabled.
+    NRF_GPIO_PIN_SENSE_LOW  = GPIO_PIN_CNF_SENSE_Low,                   ///<  Pin sense low level.
+    NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High,                  ///<  Pin sense high level.
+} nrf_gpio_pin_sense_t;
+
+/**
+ * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
+ *        This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
+ *
+ * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
+ *
+ * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
+ *
+ * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
+ *       Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
+ */
+static __INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
+{
+    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
+    for (; pin_range_start <= pin_range_end; pin_range_start++)
+    {
+        NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                        | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+                                        | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
+                                        | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    }
+}
+
+/**
+ * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
+ *        This function can be used to configure pin range as simple input.
+ *
+ * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
+ *
+ * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
+ *
+ * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
+ *
+ * @note  For configuring only one pin as input use @ref nrf_gpio_cfg_input
+ *        Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
+ */
+static __INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
+{
+    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
+    for (; pin_range_start <= pin_range_end; pin_range_start++)
+    {
+        NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
+                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+    }
+}
+
+/**
+ * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
+ *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
+ *
+ * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
+ *
+ * @note  Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
+ */
+static __INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
+{
+    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
+    NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                            | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                            | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+                                            | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
+                                            | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+}
+
+/**
+ * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
+ *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
+ *
+ * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
+ *
+ * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
+ *
+ * @note  Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
+ */
+static __INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
+{
+    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
+    NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
+                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+}
+
+/**
+ * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
+ *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
+ *        Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
+ *
+ * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
+ *
+ * @param pull_config state of the pin pull resistor (no pull, pulled down or pulled high).
+ *
+ * @param sense_config sense level of the pin (no sense, sense low or sense high).
+ */
+static __INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
+{
+    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
+    NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos)
+                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
+                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+}
+
+/**
+ * @brief Function for setting the direction for a GPIO pin.
+ *
+ * @param pin_number specifies the pin number [0:31] for which to
+ * set the direction.
+ *
+ * @param direction specifies the direction
+ */
+static __INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
+{
+    if(direction == NRF_GPIO_PIN_DIR_INPUT)
+    {
+        NRF_GPIO->PIN_CNF[pin_number] =
+          (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+        | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+    }
+    else
+    {
+        NRF_GPIO->DIRSET = (1UL << pin_number);
+    }
+}
+
+/**
+ * @brief Function for setting a GPIO pin.
+ *
+ * Note that the pin must be configured as an output for this
+ * function to have any effect.
+ *
+ * @param pin_number specifies the pin number [0:31] to
+ * set.
+ */
+static __INLINE void nrf_gpio_pin_set(uint32_t pin_number)
+{
+    NRF_GPIO->OUTSET = (1UL << pin_number);
+}
+
+/**
+ * @brief Function for clearing a GPIO pin.
+ *
+ * Note that the pin must be configured as an output for this
+ * function to have any effect.
+ *
+ * @param pin_number specifies the pin number [0:31] to
+ * clear.
+ */
+static __INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
+{
+    NRF_GPIO->OUTCLR = (1UL << pin_number);
+}
+
+/**
+ * @brief Function for toggling a GPIO pin.
+ *
+ * Note that the pin must be configured as an output for this
+ * function to have any effect.
+ *
+ * @param pin_number specifies the pin number [0:31] to
+ * toggle.
+ */
+static __INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
+{
+    const uint32_t pin_bit   = 1UL << pin_number;
+    const uint32_t pin_state = ((NRF_GPIO->OUT >> pin_number) & 1UL);
+    
+    if (pin_state == 0)
+    {
+        // Current state low, set high.
+        NRF_GPIO->OUTSET = pin_bit;        
+    }
+    else
+    {
+        // Current state high, set low.    
+        NRF_GPIO->OUTCLR = pin_bit;       
+    }
+}
+
+/**
+ * @brief Function for writing a value to a GPIO pin.
+ *
+ * Note that the pin must be configured as an output for this
+ * function to have any effect.
+ *
+ * @param pin_number specifies the pin number [0:31] to
+ * write.
+ *
+ * @param value specifies the value to be written to the pin.
+ * @arg 0 clears the pin
+ * @arg >=1 sets the pin.
+ */
+static __INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
+{
+    if (value == 0)
+    {
+        nrf_gpio_pin_clear(pin_number);
+    }
+    else
+    {
+        nrf_gpio_pin_set(pin_number);
+    }
+}
+
+/**
+ * @brief Function for reading the input level of a GPIO pin.
+ *
+ * Note that the pin must have input connected for the value
+ * returned from this function to be valid.
+ *
+ * @param pin_number specifies the pin number [0:31] to
+ * read.
+ *
+ * @return
+ * @retval 0 if the pin input level is low.
+ * @retval 1 if the pin input level is high.
+ * @retval > 1 should never occur.
+ */
+static __INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
+{
+    return  ((NRF_GPIO->IN >> pin_number) & 1UL);
+}
+
+/**
+ * @brief Generic function for writing a single byte of a 32 bit word at a given
+ * address.
+ *
+ * This function should not be called from outside the nrf_gpio
+ * abstraction layer.
+ *
+ * @param word_address is the address of the word to be written.
+ *
+ * @param byte_no is the the word byte number (0-3) to be written.
+ *
+ * @param value is the value to be written to byte "byte_no" of word
+ * at address "word_address"
+ */
+static __INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
+{
+    *((volatile uint8_t*)(word_address) + byte_no) = value;
+}
+
+/**
+ * @brief Generic function for reading a single byte of a 32 bit word at a given
+ * address.
+ *
+ * This function should not be called from outside the nrf_gpio
+ * abstraction layer.
+ *
+ * @param word_address is the address of the word to be read.
+ *
+ * @param byte_no is the the byte number (0-3) of the word to be read.
+ *
+ * @return byte "byte_no" of word at address "word_address".
+ */
+static __INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
+{
+    return (*((const volatile uint8_t*)(word_address) + byte_no));
+}
+
+/**
+ * @brief Function for setting the direction of a port.
+ *
+ * @param port is the port for which to set the direction.
+ *
+ * @param dir direction to be set for this port.
+ */
+static __INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
+{
+    if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
+    {
+        nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
+    }
+    else
+    {
+        nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
+    }
+}
+
+/**
+ * @brief Function for reading a GPIO port.
+ *
+ * @param port is the port to read.
+ *
+ * @return the input value on this port.
+ */
+static __INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
+{
+    return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
+}
+
+/**
+ * @brief Function for writing to a GPIO port.
+ *
+ * @param port is the port to write.
+ *
+ * @param value is the value to write to this port.
+ *
+ * @sa nrf_gpio_port_dir_set()
+ */
+static __INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
+{
+    nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
+}
+
+/**
+ * @brief Function for setting individual pins on GPIO port.
+ *
+ * @param port is the port for which to set the pins.
+ *
+ * @param set_mask is a mask specifying which pins to set. A bit
+ * set to 1 indicates that the corresponding port pin shall be
+ * set.
+ *
+ * @sa nrf_gpio_port_dir_set()
+ */
+static __INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
+{
+    nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
+}
+
+/**
+ * @brief Function for clearing individual pins on GPIO port.
+ *
+ * @param port is the port for which to clear the pins.
+ *
+ * @param clr_mask is a mask specifying which pins to clear. A bit
+ * set to 1 indicates that the corresponding port pin shall be
+ * cleared.
+ *
+ * @sa nrf_gpio_port_dir_set()
+ */
+static __INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
+{
+    nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
+}
+
+/** @} */
+
+#endif

bsp/nrf51822/Libraries/nrf51822/Include/system_nrf51.h

@@ -0,0 +1,68 @@
+/* Copyright (c) 2013, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef SYSTEM_NRF51_H
+#define SYSTEM_NRF51_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+
+extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock 
+ *         retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF51_H */

bsp/nrf51822/Libraries/nrf51822/Source/templates/arm/arm_startup_nrf51.s

@@ -0,0 +1,249 @@
+; Copyright (c) 2013, Nordic Semiconductor ASA
+; All rights reserved.
+; 
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+; 
+; * Redistributions of source code must retain the above copyright notice, this
+;   list of conditions and the following disclaimer.
+; 
+; * Redistributions in binary form must reproduce the above copyright notice,
+;   this list of conditions and the following disclaimer in the documentation
+;   and/or other materials provided with the distribution.
+; 
+; * Neither the name of Nordic Semiconductor ASA nor the names of its
+;   contributors may be used to endorse or promote products derived from
+;   this software without specific prior written permission.
+; 
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ 
+; NOTE: Template files (including this one) are application specific and therefore 
+; expected to be copied into the application project folder prior to its use!
+
+; Description message
+
+Stack_Size      EQU     0x00000400
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+Heap_Size       EQU     0x00000000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD      POWER_CLOCK_IRQHandler ;POWER_CLOCK
+                DCD      RADIO_IRQHandler ;RADIO
+                DCD      UART0_IRQHandler ;UART0
+                DCD      SPI0_TWI0_IRQHandler ;SPI0_TWI0
+                DCD      SPI1_TWI1_IRQHandler ;SPI1_TWI1
+                DCD      0 ;Reserved
+                DCD      GPIOTE_IRQHandler ;GPIOTE
+                DCD      ADC_IRQHandler ;ADC
+                DCD      TIMER0_IRQHandler ;TIMER0
+                DCD      TIMER1_IRQHandler ;TIMER1
+                DCD      TIMER2_IRQHandler ;TIMER2
+                DCD      RTC0_IRQHandler ;RTC0
+                DCD      TEMP_IRQHandler ;TEMP
+                DCD      RNG_IRQHandler ;RNG
+                DCD      ECB_IRQHandler ;ECB
+                DCD      CCM_AAR_IRQHandler ;CCM_AAR
+                DCD      WDT_IRQHandler ;WDT
+                DCD      RTC1_IRQHandler ;RTC1
+                DCD      QDEC_IRQHandler ;QDEC
+                DCD      LPCOMP_IRQHandler ;LPCOMP
+                DCD      SWI0_IRQHandler ;SWI0
+                DCD      SWI1_IRQHandler ;SWI1
+                DCD      SWI2_IRQHandler ;SWI2
+                DCD      SWI3_IRQHandler ;SWI3
+                DCD      SWI4_IRQHandler ;SWI4
+                DCD      SWI5_IRQHandler ;SWI5
+                DCD      0 ;Reserved
+                DCD      0 ;Reserved
+                DCD      0 ;Reserved
+                DCD      0 ;Reserved
+                DCD      0 ;Reserved
+                DCD      0 ;Reserved
+
+
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset Handler
+
+NRF_POWER_RAMON_ADDRESS            EQU   0x40000524  ; NRF_POWER->RAMON address
+NRF_POWER_RAMONB_ADDRESS           EQU   0x40000554  ; NRF_POWER->RAMONB address
+NRF_POWER_RAMONx_RAMxON_ONMODE_Msk EQU   0x3         ; All RAM blocks on in onmode bit mask
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                
+                MOVS    R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
+                
+                LDR     R0, =NRF_POWER_RAMON_ADDRESS
+                LDR     R2, [R0]
+                ORRS    R2, R2, R1
+                STR     R2, [R0]
+                
+                LDR     R0, =NRF_POWER_RAMONB_ADDRESS
+                LDR     R2, [R0]
+                ORRS    R2, R2, R1
+                STR     R2, [R0]
+                
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT   POWER_CLOCK_IRQHandler [WEAK]
+                EXPORT   RADIO_IRQHandler [WEAK]
+                EXPORT   UART0_IRQHandler [WEAK]
+                EXPORT   SPI0_TWI0_IRQHandler [WEAK]
+                EXPORT   SPI1_TWI1_IRQHandler [WEAK]
+                EXPORT   GPIOTE_IRQHandler [WEAK]
+                EXPORT   ADC_IRQHandler [WEAK]
+                EXPORT   TIMER0_IRQHandler [WEAK]
+                EXPORT   TIMER1_IRQHandler [WEAK]
+                EXPORT   TIMER2_IRQHandler [WEAK]
+                EXPORT   RTC0_IRQHandler [WEAK]
+                EXPORT   TEMP_IRQHandler [WEAK]
+                EXPORT   RNG_IRQHandler [WEAK]
+                EXPORT   ECB_IRQHandler [WEAK]
+                EXPORT   CCM_AAR_IRQHandler [WEAK]
+                EXPORT   WDT_IRQHandler [WEAK]
+                EXPORT   RTC1_IRQHandler [WEAK]
+                EXPORT   QDEC_IRQHandler [WEAK]
+                EXPORT   LPCOMP_IRQHandler [WEAK]
+                EXPORT   SWI0_IRQHandler [WEAK]
+                EXPORT   SWI1_IRQHandler [WEAK]
+                EXPORT   SWI2_IRQHandler [WEAK]
+                EXPORT   SWI3_IRQHandler [WEAK]
+                EXPORT   SWI4_IRQHandler [WEAK]
+                EXPORT   SWI5_IRQHandler [WEAK]
+POWER_CLOCK_IRQHandler
+RADIO_IRQHandler
+UART0_IRQHandler
+SPI0_TWI0_IRQHandler
+SPI1_TWI1_IRQHandler
+GPIOTE_IRQHandler
+ADC_IRQHandler
+TIMER0_IRQHandler
+TIMER1_IRQHandler
+TIMER2_IRQHandler
+RTC0_IRQHandler
+TEMP_IRQHandler
+RNG_IRQHandler
+ECB_IRQHandler
+CCM_AAR_IRQHandler
+WDT_IRQHandler
+RTC1_IRQHandler
+QDEC_IRQHandler
+LPCOMP_IRQHandler
+SWI0_IRQHandler
+SWI1_IRQHandler
+SWI2_IRQHandler
+SWI3_IRQHandler
+SWI4_IRQHandler
+SWI5_IRQHandler
+
+                B .
+                ENDP
+                ALIGN
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+                
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+__user_initial_stackheap
+
+                LDR     R0, = Heap_Mem
+                LDR     R1, = (Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem + Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+
+                ALIGN
+
+                ENDIF
+
+                END
+

bsp/nrf51822/Libraries/nrf51822/Source/templates/system_nrf51.c

@@ -0,0 +1,121 @@
+/* Copyright (c) 2013, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *   * Redistributions of source code must retain the above copyright notice, this
+ *     list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above copyright notice,
+ *     this list of conditions and the following disclaimer in the documentation
+ *     and/or other materials provided with the distribution.
+ *
+ *   * Neither the name of Nordic Semiconductor ASA nor the names of its
+ *     contributors may be used to endorse or promote products derived from
+ *     this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/* NOTE: Template files (including this one) are application specific and therefore expected to 
+   be copied into the application project folder prior to its use! */
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "system_nrf51.h"
+
+/*lint ++flb "Enter library region" */
+
+
+#define __SYSTEM_CLOCK      (16000000UL)     /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
+
+static bool is_manual_peripheral_setup_needed(void);
+static bool is_disabled_in_debug_needed(void);
+
+
+#if defined ( __CC_ARM )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;  
+#elif defined ( __ICCARM__ )
+    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
+#elif defined   ( __GNUC__ )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+    SystemCoreClock = __SYSTEM_CLOCK;
+}
+
+void SystemInit(void)
+{
+    /* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
+       It can also be done in the application main() function. */
+
+    /* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
+       to enable the use of peripherals" found at Product Anomaly document for your device found at
+       https://www.nordicsemi.com/. The side effect of executing these instructions in the devices 
+       that do not need it is that the new peripherals in the second generation devices (LPCOMP for
+       example) will not be available. */
+    if (is_manual_peripheral_setup_needed())
+    {
+        *(uint32_t volatile *)0x40000504 = 0xC007FFDF;
+        *(uint32_t volatile *)0x40006C18 = 0x00008000;
+    }
+    
+    /* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
+       register is incorrect" found at Product Anomaly document four your device found at 
+       https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
+    if (is_disabled_in_debug_needed())
+    {
+        NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
+    }
+}
+
+
+static bool is_manual_peripheral_setup_needed(void) 
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
+    {
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+    }
+    
+    return false;
+}
+
+static bool is_disabled_in_debug_needed(void) 
+{
+    if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
+    {
+        if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
+        {
+            return true;
+        }
+    }
+    
+    return false;
+}
+
+/*lint --flb "Leave library region" */

bsp/nrf51822/SConscript

@@ -0,0 +1,14 @@
+# for module compiling
+import os
+from building import *
+
+cwd  = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/nrf51822/SConstruct

@@ -0,0 +1,34 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread-stm32f0xx.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+	env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+	env.Replace(ARFLAGS = [''])
+	env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/nrf51822/applications/SConscript

@@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'applications')
+src	= Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/nrf51822/applications/application.c

@@ -0,0 +1,39 @@
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2015, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-03-01     Yangfs       the first version
+ * 2015-03-27     Bernard      code cleanup.
+ */
+
+/**
+ * @addtogroup NRF51822
+ */
+/*@{*/
+
+#include <rtthread.h>
+
+#ifdef RT_USING_FINSH
+#include <finsh.h>
+#include <shell.h>
+#endif
+
+int rt_application_init(void)
+{
+    /* Set finsh device */
+#ifdef RT_USING_FINSH
+    /* initialize finsh */
+    finsh_system_init();
+#endif
+    return 0;
+}
+
+
+/*@}*/

bsp/nrf51822/applications/startup.c

@@ -0,0 +1,94 @@
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2015, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-03-01     Yangfs       the first version
+ * 2015-03-27     Bernard      code cleanup.
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+
+/**
+ * @addtogroup NRF51822
+ */
+
+/*@{*/
+
+extern int  rt_application_init(void);
+
+#ifdef __CC_ARM
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define NRF_SRAM_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="HEAP"
+#define NRF_SRAM_BEGIN    (__segment_end("HEAP"))
+#else
+extern int __bss_end;
+#define NRF_SRAM_BEGIN    (&__bss_end)
+#endif
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+    /* init board */
+    rt_hw_board_init();
+
+    /* show version */
+    rt_show_version();
+
+    /* init tick */
+    rt_system_tick_init();
+
+    /* init kernel object */
+    rt_system_object_init();
+
+    /* init timer system */
+    rt_system_timer_init();
+
+#ifdef RT_USING_HEAP
+    rt_system_heap_init((void*)NRF_SRAM_BEGIN, (void*)NRF_SRAM_END);
+#endif
+
+    /* init scheduler system */
+    rt_system_scheduler_init();
+
+    /* init application */
+    rt_application_init();
+
+    /* init timer thread */
+    rt_system_timer_thread_init();
+
+    /* init idle thread */
+    rt_thread_idle_init();
+
+    /* start scheduler */
+    rt_system_scheduler_start();
+
+    /* never reach here */
+    return ;
+}
+
+int main(void)
+{
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
+
+    /* startup RT-Thread RTOS */
+    rtthread_startup();
+
+    return 0;
+}
+
+/*@}*/

bsp/nrf51822/drivers/SConscript

@@ -0,0 +1,13 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+# get current directory
+cwd = GetCurrentDir()
+
+src	= Glob('*.c')
+CPPPATH = [cwd]
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')