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3 Commits

Author SHA1 Message Date
copilot-swe-agent[bot]
06eae477b8 [libcpu][cortex-a] Replace FPU init loop with rt_memset
Co-authored-by: BernardXiong <1241087+BernardXiong@users.noreply.github.com>
2025-11-11 01:31:53 +00:00
copilot-swe-agent[bot]
4dc072c04c [libcpu][cortex-a] Improve FPU stack initialization implementation
Co-authored-by: BernardXiong <1241087+BernardXiong@users.noreply.github.com>
2025-11-11 01:24:47 +00:00
copilot-swe-agent[bot]
3241912ee8 Initial plan 2025-11-11 01:18:25 +00:00
2 changed files with 12 additions and 1 deletions

View File

@@ -72,6 +72,11 @@ struct rt_hw_stack
#define E_Bit (1<<9)
#define J_Bit (1<<24)
/* VFP/NEON register count for FPU context */
#ifndef VFP_DATA_NR
#define VFP_DATA_NR 64 /* 32 double-precision registers = 64 words */
#endif
#ifdef RT_USING_SMP
typedef union {
unsigned long slock;

View File

@@ -61,7 +61,13 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
*(--stk) = 0; /* user sp*/
#endif
#ifdef RT_USING_FPU
*(--stk) = 0; /* not use fpu*/
/* FPU context initialization matches context_gcc.S restore order:
* Stack layout (high to low): FPEXC -> FPSCR -> D16-D31 -> D0-D15
*/
stk -= VFP_DATA_NR;
rt_memset(stk, 0, VFP_DATA_NR * sizeof(rt_uint32_t)); /* Initialize D0-D31 (64 words for 32 double regs) */
*(--stk) = 0; /* FPSCR: Floating-Point Status and Control Register */
*(--stk) = 0x40000000; /* FPEXC: Enable FPU (bit 30 = EN) */
#endif
/* return task's current stack address */