* [DM][LED] Fixup LED check status string match
* [DM][LED] Update LED blink cycle to heartbeat
* [DM][LED] Fixup gpio-led memory alloc to zero
* [DM][LED] Update LED common drivers
* [DM][MISC] Make Kconfig(ADC/PWM) import for DM
* [Driver][MISC][ADC] Fixup ADC
1. Fixup error no.
2. Fixup type of control for args.
3. Fixup value no init.
* [Driver][MISC][PWM] Enable `rt_pwm_get` API
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. Add get id match data API.
2. Set I2C device name default before adding to bus.
3. Add Kconfig import for DM.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. Fixup RT_DIV_ROUND_DOWN_ULL and RT_DIV_ROUND_UP_ULL, rt_do_div.
2. Support RT_DIV_ROUND_CLOSEST_ULL.
3. Make new DIV API.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
What is 9PFS (https://en.wikipedia.org/wiki/9P_(protocol)):
9P (or the Plan 9 Filesystem Protocol or Styx) is a network protocol developed for the Plan 9 from Bell Labs distributed operating system as the means of connecting the components of a Plan 9 system. Files are key objects in Plan 9. They represent windows, network connections, processes, and almost anything else available in the operating system.
rt-thread could share filesystem in VM mode with 9pfs such as QEMU...
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1.Add the necessary function declarations for SMP enablement and implement the corresponding
functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable,
rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock,
rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority,
rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler.
2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S,
add a call to rt_cpus_lock_status_restore to update the scheduler information.
3.If the MMU is enabled, use the .percpu section and record different hartids by configuring
special page tables; if the MMU is not enabled, record them directly in the satp register.
Additionally, add dynamic startup based on core configuration.The .percpu section is only used
when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space
waste since no macro guard is added for it in the link script currently.
4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the
original +256MB to +128MB. Modify the SConscript file under the common64 directory to include
common/atomic_riscv.c in the compilation process.
Signed-off-by: Mengchen Teng <teng_mengchen@163.com>
In smp_assigned_idle_cores_tc, the finish_flag involves atomic operations
and thus requires address alignment.
Signed-off-by: Mengchen Teng <teng_mengchen@163.com>
* [MM] Fixup MM
1. Fixup some LOG_D args.
2. Stop installing page when `rt_aspace_map_phy` fail.
* [MM] Support page MPR dynamic size
For RISC-V or dynamic address space arch in the future.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* Append WT attribute.
* Change the API with pool size only.
* Add address mask for DMA
* Change DMA lock to mutex
* Add pause callback for DMA engine driver
* Add DMA Engine test
* Add ARM PL330 DMA Engine driver
