Commit Graph

17671 Commits

Author SHA1 Message Date
GuEe-GUI
6270b2f97c [dm][core] Set default CLK config for platform device probe
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-12 13:33:28 +08:00
GuEe-GUI
335a1242b0 [dm][clk] refactoring the CLK framework
The old CLK is can't link all hardware clock cell in system that the
API of layout such as 'set_parent' can't work as expected.

Some hareware clock cell need some flags to prevent some dangerous behaviors, eg:
When a clock cell is link to the PMU, the SoC will power-down if the cell is
disable.

The new CLK can do it, and make the CLK drivers implemented easier from
TRM/DataSheet.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-12 13:33:28 +08:00
R b b666
a036ddcb34 Update RT_VER_NUM to 5.3.0 (#11039) 2025-12-12 10:34:53 +08:00
Fan Yang
d6b173be4b fix:[components][drivers][sdio] fix the sequence of switching to emmc high-speed ddr mode #11037 2025-12-11 19:25:29 +08:00
Fan YANG
7330df69f6 update: [libcpu][risc-v][common] allow overriding isr numbers for MCU
- allow overriding the isr numbers via RT_HW_ISR_NUM macro

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
2025-12-11 17:04:14 +08:00
Kurngsy
e4dce1df7d fix: [kernel] [thread] Resolve delayed thread wakeup bug when calling suspend repeatedly (#10970)
* Enhance thread suspend function with stricter checks

Refactor thread suspension logic to improve clarity and correctness.

* Clean up formatting in thread.c

Removed unnecessary blank line in thread.c.

* Refactor thread suspend state handling

Refactor thread suspension logic to improve clarity and maintainability.

* Update thread.c

* Fix indentation for RT_THREAD_SUSPEND_KILLABLE case
2025-12-11 11:23:52 +08:00
Teng mengchen
957bac0434 [utest][smp]Add descriptions for the SMP test cases (interrupt_pri and spinlock) #11011 2025-12-11 11:14:43 +08:00
GuEe-GUI
dd20176cba [dm][hwspinlock] support hwspinlock
Hardware spinlock modules provide hardware assistance for
synchronization and mutual exclusion between heterogeneous processors
and those not operating under a single, shared operating system.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-11 11:08:33 +08:00
Chuan
d76356b94e [utest][smp_call]:Add standardized documentation for SMP Call Smoke Test (#11014) 2025-12-11 11:06:57 +08:00
GUI
f39a86266a [drivers][ofw] Update OFW #11004
Fixup fdt address reg and cells parse.
Support only option name way for earlycon.
Find the console device when using "stdout-path".
2025-12-11 11:05:47 +08:00
Tm-C-mT
d9ca9c449b [docs][utest]:Add comments for smp_thread_preemption
Add comments for smp_thread_preemption.

Signed-off-by: Mengchen Teng <teng_mengchen@163.com>
2025-12-10 17:06:41 +08:00
Tm-C-mT
d56d3d95d5 [utest]:Modify the execution logic of smp_thread_preemptions
Currently, the print information of this test case fails to demonstrate that
the high-priority thread has preempted the low-priority thread. This is because
when the high-priority thread prints the thread list, there is no information
about the low-priority thread (tlow), as tlow has already completed execution
and been destroyed. Therefore, the current execution logic cannot confirm the
successful completion of the preemption operation.

Solution: After the low-priority thread (tlow) releases the lock, add a busy-wait
loop while(!finish_flag);. At this point, when the high-priority thread (thigh)
prints the thread list information, tlow can be observed in the ready state, indicating
that it has been preempted by thigh.

Signed-off-by: Mengchen Teng <teng_mengchen@163.com>
2025-12-10 17:06:41 +08:00
Chuan
5f9984fa5e [utest][smp_call]:fix initialize current_mask in _wait_for_update 2025-12-10 17:05:10 +08:00
GuEe-GUI
22a77f2694 [dm][nvmem] support nvmem
Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-10 17:04:23 +08:00
GUI
e465ec567d [dm][rtc] update rtc and new drivers (#11033)
* [dd][rtc] set the RTC alarm thread stack size default.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [dm][rtc] make Kconfig import for DM

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [dm][rtc] support DM API for RTC

1. rtc_dev_set_name for RTC device init the name auto.
2. rtc_wkalarm_to_timestamp and rtc_timestamp_to_wkalarm for
   rt_rtc_wkalarm/time_t convert.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [dm][rtc] add new drivers

1. Dallas/Maxim DS1302
2. Dallas/Maxim DS1307/37/38/39/40, ST M41T11
3. Goldfish Real Time Clock
4. Haoyu Microelectronics HYM8563
5. NXP PCF8523
6. Philips PCF8563/Epson RTC8564
7. ARM PL031
8. Epson RX8010SJ

Signed-off-by: GuEe-GUI <2991707448@qq.com>

---------

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-10 17:03:20 +08:00
GUI
3ff3fc3948 [dm][input] support input #11031 2025-12-10 16:58:10 +08:00
GuEe-GUI
357c9b7b5a [dm][pin][pinctrl] add new driver
1. ARM PL061 GPIO
2. Single Pinctrl

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-10 16:53:09 +08:00
GuEe-GUI
b5ea9220be [dm][pin] fixup the DM Kconfig import in DM mode only
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-10 16:53:09 +08:00
GuEe-GUI
6c0753cb8f [dm][pinctrl] new interface for 'pin_gpio_request'
Some GPIO should apply GPIO mode by pinctrl, add `pin_ctrl_gpio_request`
for GPIO driver to apply it auto.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-10 16:53:09 +08:00
GuEe-GUI
44c1cf8d1e [DM][HWTIMER] Enable arm arch timer more API for cpuidle in the future
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 21:07:14 +08:00
GuEe-GUI
0aca985525 [DM][HWTIMER] Make Kconfig import for DM
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 21:07:14 +08:00
GuEe-GUI
056ae364cb [dm][core] add new API for DM
1. rt_dm_dev_is_big_endian
2. rt_dm_dev_get_prop_fuzzy_name

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 21:04:16 +08:00
GuEe-GUI
c857e03544 [dm][core] fixup the rt_dm_dev_prop_read_u8_array_index OFW check
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 21:04:16 +08:00
GuEe-GUI
7357abdc37 [dm][core] cleanup format
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 21:04:16 +08:00
GuEe-GUI
c74148a8b3 [dm][core] add common stack size for DM
DM driver is public, they don't know the size of the thread stack default.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 21:04:16 +08:00
GUI
944b974c1a [DM][PIC] Fix #10998 (#11024)
* [DM/PIC] Fixup SMP CPU mask list when CPU < 4

* [DM][PIC] Fix #10998

The size of cpumask is `RT_CPUS_NR`, memset force to space will
overflow in stack.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 14:33:31 +08:00
GUI
b949618f20 [DM][LED] Update LED#11007
* [DM][LED] Fixup LED check status string match
* [DM][LED] Update LED blink cycle to heartbeat
* [DM][LED] Fixup gpio-led memory alloc to zero
* [DM][LED] Update LED common drivers
2025-12-09 13:58:43 +08:00
GuEe-GUI
b28d540cfd [DM][HWCRYPTO] Make Kconfig import for DM
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 09:49:34 +08:00
GUI
6618fa1cf6 [Driver][MISC] Update ADC/PWM (#11003)
* [DM][MISC] Make Kconfig(ADC/PWM) import for DM

* [Driver][MISC][ADC] Fixup ADC

1. Fixup error no.
2. Fixup type of control for args.
3. Fixup value no init.

* [Driver][MISC][PWM] Enable `rt_pwm_get` API

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-09 09:49:02 +08:00
zhang san
69980f8b9d Adding Rust Language Support for RT-Thread #10910 2025-12-08 18:34:25 +08:00
GuEe-GUI
cd1d47b87c [DM][MTD] Add common MTD drivers
1. CFI-Nor flash DM driver.
2. SPI-Nor flash DM driver.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-08 17:06:12 +08:00
GuEe-GUI
065338dc69 [DM][MTD] Set MTD config to menuconfig
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-08 17:06:12 +08:00
GuEe-GUI
09b6099701 [DM/PHYE] Support USB generic PHYE.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-08 17:00:08 +08:00
Bernard Xiong
f7b3a8fedd [rt-link] fix the compiling issue under 64bit arch #11018 2025-12-08 09:15:41 +08:00
GuEe-GUI
a890e62e64 [DM/PIC] Fixup SMP CPU mask list when CPU < 4
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-07 23:00:18 +08:00
GuEe-GUI
2995112bee [DM/MFD] Add QEMU EDU for PCI study
EDU Support DMA (lower 32 bits) and factorial, MSI-X, user can change device or driver
to study PCI.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-07 22:58:09 +08:00
GuEe-GUI
c9b8cb5897 [DM/MFDD] Make Kconfig import for DM
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-07 22:58:09 +08:00
GuEe-GUI
6fb43f6676 [PHY/OFW] Fixup the phy link up waiting forever
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 16:05:37 +08:00
GuEe-GUI
04af612f50 [PHY/OFW] Change the log level
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 16:05:37 +08:00
GuEe-GUI
7c4e928df7 [DM/PHY] Make Kconfig import for DM
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 16:05:37 +08:00
GuEe-GUI
62e1fe3699 [Drivers/phy] Fixup header include for v2
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 16:05:37 +08:00
GuEe-GUI
798c84647c [DM/I2C] Update I2C for DM
1. Add get id match data API.
2. Set I2C device name default before adding to bus.
3. Add Kconfig import for DM.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 16:00:13 +08:00
GuEe-GUI
e5db582cfa [DM/MISC] Update MISC API
1. Fixup RT_DIV_ROUND_DOWN_ULL and RT_DIV_ROUND_UP_ULL, rt_do_div.
2. Support RT_DIV_ROUND_CLOSEST_ULL.
3. Make new DIV API.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 15:59:52 +08:00
GuEe-GUI
1e82368778 [DM/CAN] Update CAN for DM
1. Kconfig import wtih DM
2. Add DM API for Drivers

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 15:55:33 +08:00
GuEe-GUI
4337d7fb30 [DM/PCI] Fixup the C99, 6.8.1 Labeled statements p4
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 15:53:55 +08:00
Rbb666
35816c14b7 [action]Add automatic testing for SMP. 2025-12-04 15:53:07 +08:00
GuEe-GUI
2ffa4f3d60 [DFS] Support 9PFS
What is 9PFS (https://en.wikipedia.org/wiki/9P_(protocol)):
9P (or the Plan 9 Filesystem Protocol or Styx) is a network protocol developed for the Plan 9 from Bell Labs distributed operating system as the means of connecting the components of a Plan 9 system. Files are key objects in Plan 9. They represent windows, network connections, processes, and almost anything else available in the operating system.

rt-thread could share filesystem in VM mode with 9pfs such as QEMU...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-04 15:48:28 +08:00
Tm-C-mT
acef64ed2a [libcpu-riscv]: [surpport SMP]: Add SMP support for qemu-virt64-riscv
1.Add the necessary function declarations for SMP enablement and implement the corresponding
functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable,
rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock,
rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority,
rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler.

2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S,
add a call to rt_cpus_lock_status_restore to update the scheduler information.

3.If the MMU is enabled, use the .percpu section and record different hartids by configuring
special page tables; if the MMU is not enabled, record them directly in the satp register.
Additionally, add dynamic startup based on core configuration.The .percpu section is only used
when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space
waste since no macro guard is added for it in the link script currently.

4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the
original +256MB to +128MB. Modify the SConscript file under the common64 directory to include
common/atomic_riscv.c in the compilation process.

Signed-off-by: Mengchen Teng <teng_mengchen@163.com>
2025-12-04 15:42:09 +08:00
Tm-C-mT
dd19c0eb72 [utest]: Solve the address misalignment issue of atomic operations
In smp_assigned_idle_cores_tc, the finish_flag involves atomic operations
and thus requires address alignment.

Signed-off-by: Mengchen Teng <teng_mengchen@163.com>
2025-12-04 11:17:50 +08:00
GUI
7836d26d39 [MM] Update MM System (#10989)
* [MM] Fixup MM

1. Fixup some LOG_D args.
2. Stop installing page when `rt_aspace_map_phy` fail.

* [MM] Support page MPR dynamic size

For RISC-V or dynamic address space arch in the future.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-03 21:49:52 +08:00