[bsp][cvitek] fix timer clock frequency for 25MHz crystal

Update rt_hw_get_clock_timer_freq() in the c906_little and cv18xx_risc-v BSPs from 245000000 to 25000000.

  The timer clock source uses a 25MHz crystal, so the previous 245MHz setting was incorrect and caused wrong timer frequency reporting.
This commit is contained in:
CYFS
2026-04-17 11:43:20 +08:00
committed by Bernard Xiong
parent ae5b5ed182
commit fa0a61c45b
2 changed files with 2 additions and 2 deletions

View File

@@ -16,7 +16,7 @@
rt_uint64_t rt_hw_get_clock_timer_freq(void)
{
return 245000000ULL;
return 25000000ULL;
}
void rt_hw_board_init(void)

View File

@@ -48,7 +48,7 @@ struct mem_desc platform_mem_desc[] = {
rt_uint64_t rt_hw_get_clock_timer_freq(void)
{
return 245000000ULL;
return 25000000ULL;
}
void init_bss(void)