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bsp: k230: Provide a unified interrupt header file

Browse Source 
Originally, the interrupt definitions of various peripherals
were distributed in various peripheral drivers, resulting
in duplicate definitions. Now they are defined in one place.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
This commit is contained in:
Chen Wang
2025-08-18 10:24:11 +08:00
committed by R b b666
parent 2bcb33bada
commit 352b1f6a13
8 changed files with 224 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
bsp/k230/board/board.h
View File

@@ -13,6 +13,7 @@
#include "rtconfig.h"
#include "mem_layout.h"
#include "irq_num.h"
/*
* K230 Memory Map

198
bsp/k230/board/irq_num.h Normal file
View File

@@ -0,0 +1,198 @@
/*
* Copyright (c) 2006-2025, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*/
#define K230_IRQ_BASE 16
/* See TRM 2.4 */
#define K230_IRQ_UART0 K230_IRQ_BASE + 0
#define K230_IRQ_UART1 K230_IRQ_BASE + 1
#define K230_IRQ_UART2 K230_IRQ_BASE + 2
#define K230_IRQ_UART3 K230_IRQ_BASE + 3
#define K230_IRQ_UART4 K230_IRQ_BASE + 4
#define K230_IRQ_I2C0 K230_IRQ_BASE + 5
#define K230_IRQ_I2C1 K230_IRQ_BASE + 6
#define K230_IRQ_I2C2 K230_IRQ_BASE + 7
#define K230_IRQ_I2C3 K230_IRQ_BASE + 8
#define K230_IRQ_I2C4 K230_IRQ_BASE + 9
#define K230_IRQ_PWM0 K230_IRQ_BASE + 10
#define K230_IRQ_PWM1 K230_IRQ_BASE + 11
#define K230_IRQ_PWM2 K230_IRQ_BASE + 12
#define K230_IRQ_PWM3 K230_IRQ_BASE + 13
#define K230_IRQ_PWM4 K230_IRQ_BASE + 14
#define K230_IRQ_PWM5 K230_IRQ_BASE + 15
#define K230_IRQ_GPIO0_0 K230_IRQ_BASE + 16
#define K230_IRQ_GPIO0_1 K230_IRQ_BASE + 17
#define K230_IRQ_GPIO0_2 K230_IRQ_BASE + 18
#define K230_IRQ_GPIO0_3 K230_IRQ_BASE + 19
#define K230_IRQ_GPIO0_4 K230_IRQ_BASE + 20
#define K230_IRQ_GPIO0_5 K230_IRQ_BASE + 21
#define K230_IRQ_GPIO0_6 K230_IRQ_BASE + 22
#define K230_IRQ_GPIO0_7 K230_IRQ_BASE + 23
#define K230_IRQ_GPIO0_8 K230_IRQ_BASE + 24
#define K230_IRQ_GPIO0_9 K230_IRQ_BASE + 25
#define K230_IRQ_GPIO0_10 K230_IRQ_BASE + 26
#define K230_IRQ_GPIO0_11 K230_IRQ_BASE + 27
#define K230_IRQ_GPIO0_12 K230_IRQ_BASE + 28
#define K230_IRQ_GPIO0_13 K230_IRQ_BASE + 29
#define K230_IRQ_GPIO0_14 K230_IRQ_BASE + 30
#define K230_IRQ_GPIO0_15 K230_IRQ_BASE + 31
#define K230_IRQ_GPIO0_16 K230_IRQ_BASE + 32
#define K230_IRQ_GPIO0_17 K230_IRQ_BASE + 33
#define K230_IRQ_GPIO0_18 K230_IRQ_BASE + 34
#define K230_IRQ_GPIO0_19 K230_IRQ_BASE + 35
#define K230_IRQ_GPIO0_20 K230_IRQ_BASE + 36
#define K230_IRQ_GPIO0_21 K230_IRQ_BASE + 37
#define K230_IRQ_GPIO0_22 K230_IRQ_BASE + 38
#define K230_IRQ_GPIO0_23 K230_IRQ_BASE + 39
#define K230_IRQ_GPIO0_24 K230_IRQ_BASE + 40
#define K230_IRQ_GPIO0_25 K230_IRQ_BASE + 41
#define K230_IRQ_GPIO0_26 K230_IRQ_BASE + 42
#define K230_IRQ_GPIO0_27 K230_IRQ_BASE + 43
#define K230_IRQ_GPIO0_28 K230_IRQ_BASE + 44
#define K230_IRQ_GPIO0_29 K230_IRQ_BASE + 45
#define K230_IRQ_GPIO0_30 K230_IRQ_BASE + 46
#define K230_IRQ_GPIO0_31 K230_IRQ_BASE + 47
#define K230_IRQ_GPIO1_0 K230_IRQ_BASE + 48
#define K230_IRQ_GPIO1_1 K230_IRQ_BASE + 49
#define K230_IRQ_GPIO1_2 K230_IRQ_BASE + 50
#define K230_IRQ_GPIO1_3 K230_IRQ_BASE + 51
#define K230_IRQ_GPIO1_4 K230_IRQ_BASE + 52
#define K230_IRQ_GPIO1_5 K230_IRQ_BASE + 53
#define K230_IRQ_GPIO1_6 K230_IRQ_BASE + 54
#define K230_IRQ_GPIO1_7 K230_IRQ_BASE + 55
#define K230_IRQ_GPIO1_8 K230_IRQ_BASE + 56
#define K230_IRQ_GPIO1_9 K230_IRQ_BASE + 57
#define K230_IRQ_GPIO1_10 K230_IRQ_BASE + 58
#define K230_IRQ_GPIO1_11 K230_IRQ_BASE + 59
#define K230_IRQ_GPIO1_12 K230_IRQ_BASE + 60
#define K230_IRQ_GPIO1_13 K230_IRQ_BASE + 61
#define K230_IRQ_GPIO1_14 K230_IRQ_BASE + 62
#define K230_IRQ_GPIO1_15 K230_IRQ_BASE + 63
#define K230_IRQ_GPIO1_16 K230_IRQ_BASE + 64
#define K230_IRQ_GPIO1_17 K230_IRQ_BASE + 65
#define K230_IRQ_GPIO1_18 K230_IRQ_BASE + 66
#define K230_IRQ_GPIO1_19 K230_IRQ_BASE + 67
#define K230_IRQ_GPIO1_20 K230_IRQ_BASE + 68
#define K230_IRQ_GPIO1_21 K230_IRQ_BASE + 69
#define K230_IRQ_GPIO1_22 K230_IRQ_BASE + 70
#define K230_IRQ_GPIO1_23 K230_IRQ_BASE + 71
#define K230_IRQ_GPIO1_24 K230_IRQ_BASE + 72
#define K230_IRQ_GPIO1_25 K230_IRQ_BASE + 73
#define K230_IRQ_GPIO1_26 K230_IRQ_BASE + 74
#define K230_IRQ_GPIO1_27 K230_IRQ_BASE + 75
#define K230_IRQ_GPIO1_28 K230_IRQ_BASE + 76
#define K230_IRQ_GPIO1_29 K230_IRQ_BASE + 77
#define K230_IRQ_GPIO1_30 K230_IRQ_BASE + 78
#define K230_IRQ_GPIO1_31 K230_IRQ_BASE + 79
#define K230_IRQ_AUDIO K230_IRQ_BASE + 80
#define K230_IRQ_JAMLINK0 K230_IRQ_BASE + 81
#define K230_IRQ_JAMLINK1 K230_IRQ_BASE + 82
#define K230_IRQ_JAMLINK2 K230_IRQ_BASE + 83
#define K230_IRQ_JAMLINK3 K230_IRQ_BASE + 84
#define K230_IRQ_TIMER0 K230_IRQ_BASE + 85
#define K230_IRQ_TIMER1 K230_IRQ_BASE + 86
#define K230_IRQ_TIMER2 K230_IRQ_BASE + 87
#define K230_IRQ_TIMER3 K230_IRQ_BASE + 88
#define K230_IRQ_TIMER4 K230_IRQ_BASE + 89
#define K230_IRQ_TIMER5 K230_IRQ_BASE + 90
#define K230_IRQ_WDT0 K230_IRQ_BASE + 91
#define K230_IRQ_WDT1 K230_IRQ_BASE + 92
#define K230_IRQ_MB_CPU12CPU0_0 K230_IRQ_BASE + 93
#define K230_IRQ_MB_CPU12CPU0_1 K230_IRQ_BASE + 94
#define K230_IRQ_MB_CPU02CPU1_0 K230_IRQ_BASE + 95
#define K230_IRQ_MB_CPU02CPU1_1 K230_IRQ_BASE + 96
#define K230_IRQ_SYSCTL K230_IRQ_BASE + 97
#define K230_IRQ_ISP_VI K230_IRQ_BASE + 98
#define K230_IRQ_IPI_END_FRAME0 K230_IRQ_BASE + 99
#define K230_IRQ_IPI_END_FRAME_2IF0 K230_IRQ_BASE + 100
#define K230_IRQ_IPI_END_FRAME_3IF0 K230_IRQ_BASE + 101
#define K230_IRQ_IPI_END_FRAME1 K230_IRQ_BASE + 102
#define K230_IRQ_IPI_END_FRAME_2IF1 K230_IRQ_BASE + 103
#define K230_IRQ_IPI_END_FRAME_3IF1 K230_IRQ_BASE + 104
#define K230_IRQ_IPI_END_FRAME2 K230_IRQ_BASE + 105
#define K230_IRQ_IPI_END_FRAME_2IF2 K230_IRQ_BASE + 106
#define K230_IRQ_IPI_END_FRAME_3IF2 K230_IRQ_BASE + 107
#define K230_IRQ_ISP0 K230_IRQ_BASE + 108
#define K230_IRQ_ISP1 K230_IRQ_BASE + 109
#define K230_IRQ_ISP2 K230_IRQ_BASE + 110
#define K230_IRQ_ISP_MI0 K230_IRQ_BASE + 111
#define K230_IRQ_ISP_FE0 K230_IRQ_BASE + 112
#define K230_IRQ_ISP_IRQ0 K230_IRQ_BASE + 113
#define K230_IRQ_ISP_DWE K230_IRQ_BASE + 114
#define K230_IRQ_ISP_FE K230_IRQ_BASE + 115
#define K230_IRQ_VIDEO K230_IRQ_BASE + 116
#define K230_IRQ_DISP_VO K230_IRQ_BASE + 117
#define K230_IRQ_DISP_DSI K230_IRQ_BASE + 118
#define K230_IRQ_DISP_XAQ2 K230_IRQ_BASE + 119
#define K230_IRQ_DWC_DDRPHY K230_IRQ_BASE + 120
#define K230_IRQ_DFI_ALERT_ERR K230_IRQ_BASE + 121
#define K230_IRQ_DECOMP_CTRL K230_IRQ_BASE + 122
#define K230_IRQ_PDMA K230_IRQ_BASE + 123
#define K230_IRQ_GSDMA K230_IRQ_BASE + 124
#define K230_IRQ_NONAI_2D K230_IRQ_BASE + 125
#define K230_IRQ_SD0 K230_IRQ_BASE + 126
#define K230_IRQ_SD0_WAKEUP K230_IRQ_BASE + 127
#define K230_IRQ_SD1 K230_IRQ_BASE + 128
#define K230_IRQ_SD1_WAKEUP K230_IRQ_BASE + 129
#define K230_IRQ_SSI0_TXE K230_IRQ_BASE + 130
#define K230_IRQ_SSI0_TXO K230_IRQ_BASE + 131
#define K230_IRQ_SSI0_RXF K230_IRQ_BASE + 132
#define K230_IRQ_SSI0_RXO K230_IRQ_BASE + 133
#define K230_IRQ_SSI0_TXU K230_IRQ_BASE + 134
#define K230_IRQ_SSI0_RXU K230_IRQ_BASE + 135
#define K230_IRQ_SSI0_MST K230_IRQ_BASE + 136
#define K230_IRQ_SSI0_DONE K230_IRQ_BASE + 137
#define K230_IRQ_SSI0_AXIE K230_IRQ_BASE + 138
#define K230_IRQ_SSI1_TXE K230_IRQ_BASE + 139
#define K230_IRQ_SSI1_TXO K230_IRQ_BASE + 140
#define K230_IRQ_SSI1_RXF K230_IRQ_BASE + 141
#define K230_IRQ_SSI1_RXO K230_IRQ_BASE + 142
#define K230_IRQ_SSI1_TXU K230_IRQ_BASE + 143
#define K230_IRQ_SSI1_RXU K230_IRQ_BASE + 144
#define K230_IRQ_SSI1_MST K230_IRQ_BASE + 145
#define K230_IRQ_SSI1_DONE K230_IRQ_BASE + 146
#define K230_IRQ_SSI1_AXIE K230_IRQ_BASE + 147
#define K230_IRQ_SSI2_TXE K230_IRQ_BASE + 148
#define K230_IRQ_SSI2_TXO K230_IRQ_BASE + 149
#define K230_IRQ_SSI2_RXF K230_IRQ_BASE + 150
#define K230_IRQ_SSI2_RXO K230_IRQ_BASE + 151
#define K230_IRQ_SSI2_TXU K230_IRQ_BASE + 152
#define K230_IRQ_SSI2_RXU K230_IRQ_BASE + 153
#define K230_IRQ_SSI2_MST K230_IRQ_BASE + 154
#define K230_IRQ_SSI2_DONE K230_IRQ_BASE + 155
#define K230_IRQ_SSI2_AXIE K230_IRQ_BASE + 156
#define K230_IRQ_OTG0 K230_IRQ_BASE + 157
#define K230_IRQ_OTG1 K230_IRQ_BASE + 158
#define K230_IRQ_PMU K230_IRQ_BASE + 159
#define K230_IRQ_OBS_MAINFAULT0 K230_IRQ_BASE + 160
#define K230_IRQ_OBS_MAINFAULT1 K230_IRQ_BASE + 161
#define K230_IRQ_MCTL_PROBE0 K230_IRQ_BASE + 162
#define K230_IRQ_MCTL_PROBE1 K230_IRQ_BASE + 163
#define K230_IRQ_MCTL_PROBE2 K230_IRQ_BASE + 164
#define K230_IRQ_MCTL_PROBE3 K230_IRQ_BASE + 165
#define K230_IRQ_MCTL_PROBE4 K230_IRQ_BASE + 166
#define K230_IRQ_SRAM_PROBE0 K230_IRQ_BASE + 167
#define K230_IRQ_SRAM_PROBE1 K230_IRQ_BASE + 168
#define K230_IRQ_SEC K230_IRQ_BASE + 169
#define K230_IRQ_DPU K230_IRQ_BASE + 170
#define K230_IRQ_DPU_INT_TYPE0 K230_IRQ_BASE + 171
#define K230_IRQ_DPU_INT_TYPE1 K230_IRQ_BASE + 172
#define K230_IRQ_GNNE K230_IRQ_BASE + 173
#define K230_IRQ_FFT K230_IRQ_BASE + 174
#define K230_IRQ_AI_2D K230_IRQ_BASE + 175
#define K230_IRQ_CPU0CPU1_PAR_VIO K230_IRQ_BASE + 176
#define K230_IRQ_ADC0 K230_IRQ_BASE + 177
#define K230_IRQ_ADC1 K230_IRQ_BASE + 178
#define K230_IRQ_ADC2 K230_IRQ_BASE + 179
#define K230_IRQ_PDMA_CHANNEL1 K230_IRQ_BASE + 180
#define K230_IRQ_PDMA_CHANNEL2 K230_IRQ_BASE + 181
#define K230_IRQ_PDMA_CHANNEL3 K230_IRQ_BASE + 182
#define K230_IRQ_PDMA_CHANNEL4 K230_IRQ_BASE + 183
#define K230_IRQ_PDMA_CHANNEL5 K230_IRQ_BASE + 184
#define K230_IRQ_PDMA_CHANNEL6 K230_IRQ_BASE + 185
#define K230_IRQ_PDMA_CHANNEL7 K230_IRQ_BASE + 186
#define K230_IRQ_PDMA_ALL_CHANNEL K230_IRQ_BASE + 187
#define K230_IRQ_ISP_VSE K230_IRQ_BASE + 188

4
bsp/k230/drivers/interdrv/gpio/drv_gpio.h
View File

@@ -32,9 +32,11 @@
#ifndef DRV_GPIO_H__
#define DRV_GPIO_H__
#include "board.h"
#define GPIO_IRQ_MAX_NUM (64)
#define GPIO_MAX_NUM (64+8)
#define IRQN_GPIO0_INTERRUPT 32
#define IRQN_GPIO0_INTERRUPT K230_IRQ_GPIO0_0
/* k230 gpio register table */
#define DATA_OUTPUT 0x0

13
bsp/k230/drivers/interdrv/hwtimer/drv_timer.h
View File

@@ -34,6 +34,7 @@
#include <stdint.h>
#include <drivers/hwtimer.h>
#include "sysctl_clk.h"
#include "board.h"
#define MHz 1000000
/* TIMER Control Register */
@@ -44,12 +45,12 @@
#define TIMER_CR_INTERRUPT_MASK 0x00000004
#define TIMER_CR_PWM_ENABLE 0x00000008
#define IRQN_TIMER_0_INTERRUPT 16+85
#define IRQN_TIMER_1_INTERRUPT 16+86
#define IRQN_TIMER_2_INTERRUPT 16+87
#define IRQN_TIMER_3_INTERRUPT 16+88
#define IRQN_TIMER_4_INTERRUPT 16+89
#define IRQN_TIMER_5_INTERRUPT 16+90
#define IRQN_TIMER_0_INTERRUPT K230_IRQ_TIMER0
#define IRQN_TIMER_1_INTERRUPT K230_IRQ_TIMER1
#define IRQN_TIMER_2_INTERRUPT K230_IRQ_TIMER2
#define IRQN_TIMER_3_INTERRUPT K230_IRQ_TIMER3
#define IRQN_TIMER_4_INTERRUPT K230_IRQ_TIMER4
#define IRQN_TIMER_5_INTERRUPT K230_IRQ_TIMER5
typedef struct _timer_regs_channel
{

20
bsp/k230/drivers/interdrv/pdma/drv_pdma.h
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@@ -33,6 +33,7 @@
#define DRV_PDMA_H_
#include <rtdef.h>
#include "board.h"
/**
* @brief PDMA channel enumeration
@@ -71,20 +72,17 @@ typedef enum pdma_ch {
/* Combined interrupt masks */
#define PDMA_ALL_INTS (PDMA_PDONE_INT | PDMA_PITEM_INT | PDMA_PPAUSE_INT | PDMA_PTOUT_INT) /**< All PDMA interrupts mask */
#define PDMA_IRQ_OFFSET 16
/**
* @brief PDMA channel interrupt numbers
* @note These values equal (manual_specified_IRQ + PDMA_IRQ_OFFSET)
*/
#define PDMA_CHANNEL0_IRQn (123 + PDMA_IRQ_OFFSET) /**< Channel 0 IRQ number */
#define PDMA_CHANNEL1_IRQn (180 + PDMA_IRQ_OFFSET) /**< Channel 1 IRQ number */
#define PDMA_CHANNEL2_IRQn (181 + PDMA_IRQ_OFFSET) /**< Channel 2 IRQ number */
#define PDMA_CHANNEL3_IRQn (182 + PDMA_IRQ_OFFSET) /**< Channel 3 IRQ number */
#define PDMA_CHANNEL4_IRQn (183 + PDMA_IRQ_OFFSET) /**< Channel 4 IRQ number */
#define PDMA_CHANNEL5_IRQn (184 + PDMA_IRQ_OFFSET) /**< Channel 5 IRQ number */
#define PDMA_CHANNEL6_IRQn (185 + PDMA_IRQ_OFFSET) /**< Channel 6 IRQ number */
#define PDMA_CHANNEL7_IRQn (186 + PDMA_IRQ_OFFSET) /**< Channel 7 IRQ number */
#define PDMA_CHANNEL0_IRQn K230_IRQ_PDMA /**< Channel 0 IRQ number */
#define PDMA_CHANNEL1_IRQn K230_IRQ_PDMA_CHANNEL1 /**< Channel 1 IRQ number */
#define PDMA_CHANNEL2_IRQn K230_IRQ_PDMA_CHANNEL2 /**< Channel 2 IRQ number */
#define PDMA_CHANNEL3_IRQn K230_IRQ_PDMA_CHANNEL3 /**< Channel 3 IRQ number */
#define PDMA_CHANNEL4_IRQn K230_IRQ_PDMA_CHANNEL4 /**< Channel 4 IRQ number */
#define PDMA_CHANNEL5_IRQn K230_IRQ_PDMA_CHANNEL5 /**< Channel 5 IRQ number */
#define PDMA_CHANNEL6_IRQn K230_IRQ_PDMA_CHANNEL6 /**< Channel 6 IRQ number */
#define PDMA_CHANNEL7_IRQn K230_IRQ_PDMA_CHANNEL7 /**< Channel 7 IRQ number */
/**
* @brief PDMA channel state enumeration

6
bsp/k230/drivers/interdrv/sdio/drv_sdhci.h
View File

@@ -7,12 +7,14 @@
#ifndef __DRV_SDHCI__
#define __DRV_SDHCI__
#include "board.h"
#define false 0
#define true 1
#define SDEMMC0_BASE 0x91580000
#define SDEMMC1_BASE 0x91581000
#define IRQN_SD0 142
#define IRQN_SD1 144
#define IRQN_SD0 K230_IRQ_SD0
#define IRQN_SD1 K230_IRQ_SD1
/*
* Controller registers

2
bsp/k230/drivers/interdrv/uart/drv_uart.c
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@@ -17,7 +17,7 @@
#define UART_DEFAULT_BAUDRATE 115200
#define UART_CLK 50000000
#define UART_ADDR UART0_BASE_ADDR
#define UART_IRQ 0x10
#define UART_IRQ K230_IRQ_UART0
#define UART_RBR (0x00) /* receive buffer register */

2
bsp/k230/drivers/utest/test_pdma.c
View File

@@ -32,7 +32,7 @@
#include "board.h"
#include "drv_pdma.h"
#define UART0_IRQ 0x10
#define UART0_IRQ K230_IRQ_UART0
#define CACHE_LINE_SIZE 64