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992b0ba91c
The original logic of setting mstatus has problem. The or directive cannot set .MPP to 0. Optimize the original code and use csrs and csrc instead. Note we cannot assume the default value of mstatus is zero. rvos may not be the first one to run on the system/virt. It just so lucky that the initial value of mstatus is zero on QEMU/virt. Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
82 lines
2.6 KiB
ArmAsm
82 lines
2.6 KiB
ArmAsm
#include "platform.h"
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# size of each hart's stack is 1024 bytes
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.equ STACK_SIZE, 1024
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.global _start
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.text
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_start:
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# park harts with id != 0
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csrr t0, mhartid # read current hart id
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mv tp, t0 # keep CPU's hartid in its tp for later usage.
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bnez t0, park # if we're not on the hart 0
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# we park the hart
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# Set all bytes in the BSS section to zero.
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la a0, _bss_start
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la a1, _bss_end
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bgeu a0, a1, 2f
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1:
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sw zero, (a0)
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addi a0, a0, 4
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bltu a0, a1, 1b
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2:
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# Setup stacks, the stack grows from bottom to top, so we put the
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# stack pointer to the very end of the stack range.
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slli t0, t0, 10 # shift left the hart id by 1024
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la sp, stacks + STACK_SIZE # set the initial stack pointer
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# to the end of the first stack space
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add sp, sp, t0 # move the current hart stack pointer
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# to its place in the stack space
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#ifdef CONFIG_SYSCALL
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# https://lore.kernel.org/qemu-devel/20201223192553.332508-1-atish.patra@wdc.com/
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# For qemu version >= 6.0, exception would be raised if no PMP enty is
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# configured. So just configure one entny, which allows all the whole
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# 32-bits physical address range is R/W/X.
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# FIXME: I say it is a temporary workaroud due to I think the patch
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# above contains bug, and I have raised new issue to qemu but it has not
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# been rootcaused till now. Details please refer to
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# https://gitlab.com/qemu-project/qemu/-/issues/585 or
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# https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I441IC (in chinese)
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# So it's just a temporary workaround till now to not block people who
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# want to try newer qemu (>= 6.0).
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li t0, 0xffffffff
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csrw pmpaddr0, t0
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li t0, 0xf
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csrw pmpcfg0, t0
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#endif
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# At the end of start_kernel, schedule() will call MRET to switch
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# to the first task, so we parepare the mstatus here.
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# Notice: It is best not to assume that the initial value of mstatus is
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# zero.
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#ifdef CONFIG_SYSCALL
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# Set mstatus.MPP as 0, so we will run in User mode after MRET.
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# No need to set mstatus.MPIE to 1 explicitly, because according to ISA
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# specification: interrupts for M-mode, which is higher than U-mode, are
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# always globally enabled regardless of the setting of the global MIE bit.
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li t0, 3 << 11
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csrc mstatus, t0
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#else
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# Set mstatus.MPP to 3, so we still run in Machine mode after MRET.
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# Set mstatus.MPIE to 1, so MRET will enable the interrupt.
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li t0, 3 << 11 | 1 << 7
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csrs mstatus, t0
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#endif
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j start_kernel # hart 0 jump to c
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park:
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wfi
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j park
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# In the standard RISC-V calling convention, the stack pointer sp
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# is always 16-byte aligned.
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.balign 16
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stacks:
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.skip STACK_SIZE * MAXNUM_CPU # allocate space for all the harts stacks
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.end # End of file
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