The original logic of setting mstatus has problem.
The or directive cannot set .MPP to 0.
Optimize the original code and use csrs and csrc instead.
Note we cannot assume the default value of mstatus is zero.
rvos may not be the first one to run on the system/virt.
It just so lucky that the initial value of mstatus is zero
on QEMU/virt.
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
The GNU assembler responds to .align in a platform-dependent way. For a
use of '.align x', gas will align to 'x' bytes for some platforms,
but '2^x' bytes for other platforms including RISC-V. We are currently
reserving too much space with .align, so correct them by switching to
the more predictable .balign directive.
Signed-off-by: Hunter <>
Because according to ISA specification: interrupts for M-mode, which
is higher than U-mode, are always globally enabled regardless of the
setting of the global MIE bit.
We don't set mstatus.MPIE to 1 explicitly to avoid misleading people
into thinking it is must-haveto-do.
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
Co-authored-by: LiuJiLan <ldc31415926@126.com>
Following the standard RISC-V calling convention, make sure
the stack pointer sp is always 16-byte aligned.
Fixed an issue, make sure the sp of task point to the bottom
of the stack, while originally we waste one byte (forgive my
stupid ~~~).
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
