Also remove the while in uart_isr. Generally unlimited loop in interrupt
handler is not recommended.
Signed-off-by: Wang Chen <unicorn_wang@outlook.com>
Makefiles of rvos projects contains too many duplicated contents.
Cleanup and move it into a new common.mk file for os only, this will
not touch asm samples.
Finally the common..mk which was used for both asm & os is removed.
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
The original logic of setting mstatus has problem.
The or directive cannot set .MPP to 0.
Optimize the original code and use csrs and csrc instead.
Note we cannot assume the default value of mstatus is zero.
rvos may not be the first one to run on the system/virt.
It just so lucky that the initial value of mstatus is zero
on QEMU/virt.
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
With gcc version >= 11.1.0, to support new ISA spec changes, which
moved some instructions from the I extension to the Zicsr and Zifencei
extensions, we have to explicitly specify Zicsr and Zifencei via -march.
But it is not required for old gcc versions.
To cope with both cases, we use rv32g instead of rv32ima.
"g" = "imafd". RVOS doesn't use "f" & "d", and we also don't want "c".
We use "g" to just to make life easy, otherwise we may have to intriduce
some mechanism to judge and differ the version of gcc used.
Also updated some comments to move to rv32g and don't involve words such
as "rv32ima".
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
The GNU assembler responds to .align in a platform-dependent way. For a
use of '.align x', gas will align to 'x' bytes for some platforms,
but '2^x' bytes for other platforms including RISC-V. We are currently
reserving too much space with .align, so correct them by switching to
the more predictable .balign directive.
Signed-off-by: Hunter <>
Because according to ISA specification: interrupts for M-mode, which
is higher than U-mode, are always globally enabled regardless of the
setting of the global MIE bit.
We don't set mstatus.MPIE to 1 explicitly to avoid misleading people
into thinking it is must-haveto-do.
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
Co-authored-by: LiuJiLan <ldc31415926@126.com>
Following the standard RISC-V calling convention, make sure
the stack pointer sp is always 16-byte aligned.
Fixed an issue, make sure the sp of task point to the bottom
of the stack, while originally we waste one byte (forgive my
stupid ~~~).
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
