There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do. Arm64, C-Sky,
and KVX - sadly - are exceptions.
There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do. Arm64, C-Sky,
and KVX - sadly - are exceptions.
No reason to have a separate type when the generic one has no (other)
meaning for this target.
Doing the adjustments makes obvious that elf32_arm_reloc_map[] had two
identical entries; that duplicate is being removed.
The ABI setting for the elf target was ommitted in commit "db614f37cab".
Set the default ABI for elf to double-float.
In addition, test case failures caused by the loongarch*-elf linker not
supporting relevant options have also been skipped.
gas/
* config/tc-loongarch.c (loongarch_after_parse_args): Set
default ABI to double-float for other targets.
ld/
* testsuite/ld-loongarch-elf/la32.d: Skip tests when not
supported.
* testsuite/ld-loongarch-elf/ld-loongarch-elf.exp: Likewise.
* testsuite/ld-loongarch-elf/relax.exp: Likewise.
We shouldn't be using extensions when we don't have a suitable fallback in
place. Introducing a format-argument-less counterpart macro would feel a
little odd here. Instead make the sole use site have a (fake) argument
(the non-translatable part of the string).
I've been irritated by it more than once: It very obviously doesn't cover
all separators, hence resulting in inconsistent behavior. Nor do both use
sites look to really want the same set of separators. In macro_expand() we
really can pull the get_token() call ahead. If we don't find the expected
'=' we can simply continue parsing from the original position.
The use in get_any_string() is dead code afaict, inherited from gasp. The
sole leftover thereof is handled in the scrubber (see H_TICK_HEX,
LEX_IS_H, and alike there). With that dropped, ISBASE() also can be.
This patch is a major cleanup of the Solaris configurations of both bfd and ld.
The Solaris cases in both bfd/config.bfd and ld/configure.tgt have seen a
major cleanup, making the support for various Solaris versions explicit,
correcting several inconsistencies, and making it easier to remove support
for some versions in the future.
* All 32-bit-only configurations (Solaris < 7 on SPARC, Solaris < 10 on
x86) only include the 32-bit target vectors and linker emulations.
* For 32-bit-default targets on 64-bit systems (Solaris >= 7 on SPARC,
Solaris >= 10 on x86), the 32-bit target vectors and linker emulations
are the default while supporting the 64-bit ones.
* For 64-bit-default targets on 64-bit systems, it's the other way round.
They default to 64-bit target vectors etc. while also supporting the
32-bit ones.
* Added a warning to all Solaris cases in config.bfd not to include the
non-*_sol2 vectors to avoid the ambiguity reported in PR binutils/27666.
* On x86, the iamcu target vectors and linker emulations have been
removed: Solaris never supported the Intel MCU.
* On x86, the PE and PEI target vectors have been removed: they were only
supported in binutils proper. Their only use would be on EFI files
e.g. in GRUB, which doesn't justify their inclusion.
* With iamcu support gone, a few gas tests had to be disabled as on
VxWorks.
* The 32-bit Solaris/x86 ld configuration currently includes the
elf_i386_ldso emulation, which was never a emulation in its own right but
just an implementation detail of the elf_i386_sol2 emulation. Instead,
the settings that are not already provided by sourced .sh files are moved
into elf_i386_sol2.sh. Many settings became superfluous by just sourcing
elf_i386.sh as is already done in elf_x86_64_sol2.sh, massively
simplifying the emulation.
* Solaris-specific settings in generic emulparams scripts have been moved
to the *_sol2.sh files.
* NATIVE_LIB_DIRS in ld/configure.tgt now uses the default setting:
/usr/ccs/lib contains just a bunch of symlinks into /usr/lib at least
since Solaris 8.
* ld/emulparams/solaris2.sh now sets ELF_INTERPRETER_NAME to
/usr/lib/amd64/ld.so.1, matching both the native linker and
elf_i386_sol2.sh.
* The SEARCH_DIR statements in linker scripts on 64-bit targets contained
both the native (64-bit) and non-default (32-bit) directies. The latter
are completely pointless and are omitted using a new
LIBPATH_SKIP_NONNATIVE setting.
Tested on {amd64,i386}-pc-solaris2.11 and {sparcv9,sparc}-sun-solaris2.11,
and {x86_64,i686}-pc-linux-gnu as well as with gcc trunk bootstraps on the
Solaris targets. On those, I've compared the gas/ld and gas/gld 2.45.50
testresults with 2.45 ones.
2025-09-09 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
bfd:
* config.bfd <i[3-7]86-*-solaris2*>: Split into ...
<i[3-7]86-*-solaris2.1[01]*> ... this.
(targ_selvecs): Remove iamcu_elf32_vec, i386_coff_vec, i386_pei_vec.
(targ64_selvecs): Remove x86_64_pe_vec, x86_64_pei_vec.
<i[3-7]86-*-solaris2.[0-9]*>: ... and this.
[BFD64] <x86_64-*-solaris2*>: Change into x86_64-*-solaris2.1[01]*.
(targ_defvecs): Change to x86_64_elf64_sol2_vec.
(targ_selvecs): Remove iamcu_elf32_vec, i386_coff_vec,
i386_pei_vec, x86_64_pe_vec, x86_64_pei_vec.
<sparc-*-solaris2.[0-6] | sparc-*-solaris2.[0-6].*>: Split into ...
<sparc-*-solaris2.[7-9]* | sparc-*-solaris2.1[01]*>: ... this.
<sparc-*-solaris2.[0-6]*>: ... this.
[BFD64] <sparc-*-solaris2* | sparcv9-*-solaris2* |
sparc64-*-solaris2*>: Omit sparc-*-solaris2*.
(targ_defvec): Swap with targ_selvecs.
* testsuite/gas/i386/i386.exp: Disable iamcu tests on Solaris.
ld:
* configure.tgt <i[3-7]86-*-solaris2>: Split into ...
<i[3-7]86-*-solaris2.1[01]*>: .. this.
(targ_extra_emuls): Remove elf_i386_ldso and elf_iamcu.
<i[3-7]86-*-solaris2.[0-9]*>: ... and this.
<sparc64-*-solaris2*, sparcv9-*-solaris2*>: Change into ...
<sparc64-*-solaris2.[7-9]* | sparc64-*-solaris2.1[01]* |
sparcv9-*-solaris2.[7-9]* | sparcv9-*-solaris2.1[01]*>: ... this
(targ_extra_emuls): Reorder.
(tdir_elf32_sparc): Remove.
<sparc-*-solaris2.[7-9]* | sparc-*-solaris2.1[01]*>: New case.
<sparc-*-solaris2.[0-6]*, sparc-*-solaris2.[0-6].*>: Change into ...
<sparc-*-solaris2.[0-6]*>: ... this.
<sparc-*-solaris2*>: Remove.
<x86_64-*-solaris2*>: Change into ...
<x86_64-*-solaris2.1[01]*>: ... this.
(targ_extra_emuls): Reorder. Remove elf_i386_ldso, elf_iamcu.
(tdir_elf_i386): Remove.
(NATIVE_LIB_DIRS): Remove Solaris handling.
* emulparams/elf32_sparc_sol2.sh (ELF_INTERPRETER_NAME): New
variable.
* emulparams/elf64_sparc.sh <sparc*-solaris*> (LIBPATH_SUFFIX):
Move ...
* emulparams/elf64_sparc_sol2.sh: ... here.
(LIBPATH_SKIP_NONNATIVE): New variable.
(ELF_INTERPRETER_NAME): Likewise.
* emulparams/elf_i386_ldso.sh: Merge into ...
* emulparams/elf_i386_sol2.sh: ... this.
Remove duplicate variables.
Source elf_i386.sh instead of elf_i386_ldso.sh.
* emulparams/elf_x86_64.sh <*-*-solaris2*> (ELF_INTERPRETER_NAME):
Move ...
* emulparams/elf_x86_64_sol2.sh: ... here.
Use /usr/lib/amd64/ld.so.1.
(LIBPATH_SKIP_NONNATIVE): New variable.
* emulparams/solaris2.sh: Fix comment.
* genscripts.sh: Fix typos.
Heed LIBPATH_SKIP_NONNATIVE.
Fixed several test failures caused by the LoongArch32 assembler adding
labels during assembly. Additionally, skipped tests specific to LoongArch64.
Add test for new relocations.
Add test for tls type transition, got relaxation and call30 relaxation.
Define a symbol .Lpcadd_hi* at R_LARCH_*_PCADD_HI20
if the instruction expand from macro.
Change the symbol of R_LARCH_PCADD_LO12 to .Lpcadd_hi*
if the instruction expand from macro.
R_LARCH_CALL30:
pcaddu12i $ra, %call30(func)
jirl $ra, $ra, 0
Similar with R_LARCH_CALL36, pcaddu12i and jirl must be adjacent.
R_LARCH_PCADD_HI20, R_LARCH_PCADD_LO12:
.Lpcadd_hi0:
pcaddu12i $t0, %pcadd_hi20(sym)
addi.w $t0, $t0, %pcadd_lo12(.Lpcadd_hi0)
Similar with RISCV PCREL_HI20, PCREL_LO12, R_LARCH_PCADD_LO12 reference to the
symbol at R_LARCH_PCADD_HI20.
In the "ud ui5" macro, the value of ui5 must be in the range 0–31. It
expands to "amswap.w $rd, $r1, $rj", where ui5 specifies the register
number for $rd in the amswap.w instruction, and $rd == $rj.
The test case have been adjusted to no longer report errors for illegal
operands of the amswap.w instruction.
gas/
* config/tc-loongarch.c (check_this_insn_before_appending): No
longer check amswap.w.
* testsuite/gas/loongarch/illegal-operand.l: Update.
* testsuite/gas/loongarch/illegal-operand.s: Update.
* testsuite/gas/loongarch/macro_ud.d: New test.
* testsuite/gas/loongarch/macro_ud.s: New test.
include/
* opcode/loongarch.h: Add new macro for amswap.w.
opcodes/
* loongarch-opc.c: Add macro for ud.
In --help option, adds znver6 to the list of CPUs under -march.
Please find the ISA descriptions for AVX512_BMM instructions below.
AVX512 Bit Manipulation Instructions
====================================
The AVX512BMM instructions include Bit Matrix Multiply and Bit Reversal
operations.
CPUID
-----
Support is indicated by the new CPUID 8000_0021, EAX bit 23, labeled AVX512_BMM.
Encoding
--------
VBMACOR16x16x16
EVEX.256.NP.MAP6.W0 80 /r VBMACOR16x16x16 ymm1, ymm2, ymm3/m256
EVEX.512.NP.MAP6.W0 80 /r VBMACOR16x16x16 zmm1, zmm2, zmm3/m512
VBMACXOR16x16x16
EVEX.256.NP.MAP6.W1 80 /r VBMACXOR16x16x16 ymm1, ymm2, ymm3/m256
EVEX.512.NP.MAP6.W1 80 /r VBMACXOR16x16x16 zmm1, zmm2, zmm3/m512
DESCRIPTION
-----------
256 BIT VERSIONS
----------------
16x16 non-transposed fused BMM-accumulate (BMAC) with OR/XOR reduction.
A ymm register holds a 16x16 bit matrix. The third source matrix for
accumulation is in ymm1.
512 BIT VERSIONS
----------------
2 parallel 16x16 non-transposed fused BMM-accumulate (BMAC) with OR/XOR
reduction.
Each 256-bit chunk of a zmm register holds a 16x16 bit matrix. The third source
matrices for accumulation are in zmm1.
VBITREVB
--------
EVEX.128.NP.MAP6.W0 81 /r VBITREVB xmm1{k1}{z}, xmm2/m128
EVEX.256.NP.MAP6.W0 81 /r VBITREVB ymm1{k1}{z}, ymm2/m256
EVEX.512.NP.MAP6.W0 81 /r VBITREVB zmm1{k1}{z}, zmm2/m512
DESCRIPTION
-----------
Bit reversal within a byte boundary. Only applied to input bytes where the
corresponding mask bit is set; otherwise, bytes are left untouched or zeroed out
if zero masking is indicated.
gas/ChangeLog:
* NEWS: Add znver6 ARCH.
* config/tc-i386.c: Add znver6 ARCH, avx512_bmm SUBARCH.
* doc/c-i386.texi: Likewise.
* testsuite/gas/i386/i386.exp: Add znver6 test cases.
* testsuite/gas/i386/x86-64.exp: Add znver6 test cases.
* testsuite/gas/i386/arch-16-znver6.d: New test.
* testsuite/gas/i386/arch-16.d: New test.
* testsuite/gas/i386/arch-16.s: New test.
* testsuite/gas/i386/avx512_bmm.d: New test.
* testsuite/gas/i386/avx512_bmm.s: New test.
* testsuite/gas/i386/avx512_bmm_vl-inval.l: New test.
* testsuite/gas/i386/avx512_bmm_vl-inval.s: New test.
* testsuite/gas/i386/avx512_bmm_vl.d: New test.
* testsuite/gas/i386/avx512_bmm_vl.s: New test.
* testsuite/gas/i386/x86-64-arch-6-znver6.d: New test.
* testsuite/gas/i386/x86-64-arch-6.d: New test.
* testsuite/gas/i386/x86-64-arch-6.s: New test.
* testsuite/gas/i386/x86-64-avx512_bmm-bad.d: New test.
* testsuite/gas/i386/x86-64-avx512_bmm-bad.s: New test.
* testsuite/gas/i386/x86-64-avx512_bmm.d: New test.
* testsuite/gas/i386/x86-64-avx512_bmm.s: New test.
* testsuite/gas/i386/x86-64-avx512_bmm_vl-inval.l: New test.
* testsuite/gas/i386/x86-64-avx512_bmm_vl-inval.s: New test.
* testsuite/gas/i386/x86-64-avx512_bmm_vl.d: New test.
* testsuite/gas/i386/x86-64-avx512_bmm_vl.s: New test.
opcodes/ChangeLog:
* i386-dis-evex-len.h: Likewise.
* i386-dis-evex-w.h: Likewise.
* i386-dis-evex.h: Likewise.
* i386-dis.c: Add EVEX_W_MAP6_80, EVEX_W_MAP6_81,
EVEX_LEN_MAP6_80_W_0, EVEX_LEN_MAP6_80_W_1.
* i386-gen.c: Likewise.
* i386-init.h: Re-generated.
* i386-mnem.h: Re-generated.
* i386-opc.h (enum i386_cpu): Add CpuAVX512_BMM.
(i386_cpu_flags): Add cpuvavx512_bmm.
* i386-opc.tbl: Add vbmacor16x16x16, vbmacxor16x16x16, vbitrevb.
* i386-tbl.h: Re-generated.
To reflect spec version 007's introduction of the three-way APX-NCI-NDD-NF
also introduce a respective ISA specifier, without that actually having a
counterpart in opcodes.
Add a testcase to cover all four new ISA specifiers.
While spec version 007 introduced the three-way APX-NCI-NDD-NF, let's
split the three aspects (NCI, NDD, and NF) in gas. For NF we only need to
guard the {nf} pseudo-prefix.
While spec version 007 introduced the three-way APX-NCI-NDD-NF, let's
split the three aspects (NCI, NDD, and NF) in gas. Note that NDD also
applies to a number of EVEX-encoded insns with EVEX.ndd clear.
Some extra logic is needed in cpu_flags_match() to avoid the need to
add APX_NDD to CPU_FLAGS_COMMON.
While spec version 007 introduced the three-way APX-NCI-NDD-NF, let's
split the three aspects (NCI, NDD, and NF) in gas.
While adjusting CMOVcc and CFCMOVcc, drop the bogus CpuCMOV dependencies.
Such a requirement was never specified in any public doc revision.
Note also that the EVEX-encoded forms of TEST were lacking CpuAPX_F so
far.
We already print other instruction comments, such as condition code
aliases, by default. The `-M no-notes' option has been available in
Binutils for over 7 years, so if anyone does need the notes to be
disabled then they can do so explicitly.
Gas, contrarilly to others binutils tools, is compiled for a specific
target. Some targets don't support Object Attributes (OAs). For those
cases, today the OA directive ".gnu_attribute" is still enabled but the
processing would probably fail in most of cases because the named tag
would be unknown. Most of the parsing code on such a target can be
considered as dead code.
This patch aims at removing this dead code from Gas when the target does
not support the OAs by:
- moving the code of OA parsing into a separate file under gas/config
which is only included for the relevant targets supporting OAs.
- disabling the code related to OAs on non-OA target via a TC_OBJ_ATTR
macro.
Adding/removing the OA feature from Gas for a specific target can easilly
be done from tc-<arch>.h by changing the values of TC_OBJ_ATTR: 1 enabled,
0 disabled. You might also want to guard the enablement of OAs only for
ELF targets with OBJ_ELF (see example below).
\#ifdef OBJ_ELF
/* The target supports Object Attributes. */
\#define TC_OBJ_ATTR 1
\#endif
This patch is a preparation for the introduction of object attributes
v2. It aims at:
- making clear what methods are used to parse OAv1
- adding more constaints on parameters type by using enums instead of
defines.
- hiding the attribute tag type behind a typedef.
- preparing the move of object attributes's parsing code to another
file.
Note: the name obj_attr_v1_process_attribute is exposed in the API.
Ideally, the version should not be part of the name, and be hidden
behind a macro. However, a later patch will unify the parsing of
OAv1 and OAv2, and will make the use of such a macro obsolete.
Allow copy_private_symbol_data to replace osym if a target desires.
Change isym similarly for symmetry. The idea is to make it possible
to give the asymbol an output target specific extension. Some
targets, eg. som, use such an extension when outputting symbols,
behaving badly if the input object is not som. There are no
functional changes in this patch; It just changes the signatures.
bfd/
* elf-bfd.h (_bfd_elf_copy_private_symbol_data): Replace
asymbol* params with asymbol**.
* elf.c (_bfd_elf_copy_private_symbol_data): Likewise.
* libbfd-in.h (_bfd_bool_bfd_asymbol_bfd_asymbol_true): Likewise.
* libbfd.c (_bfd_bool_bfd_asymbol_bfd_asymbol_true): Likewise.
* mach-o.c (bfd_mach_o_bfd_copy_private_symbol_data): Likewise.
* mach-o.h (bfd_mach_o_bfd_copy_private_symbol_data): Likewise.
* plugin.c (bfd_plugin_bfd_copy_private_symbol_data): Likewise.
* som.c (som_bfd_copy_private_symbol_data): Likewise.
* targets.c (bfd_target <_bfd_copy_private_symbol_data>): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
binutils/
* objcopy.c (copy_object): Adjust bfd_copy_private_symbol_data call.
gas/
* symbols.c symbol_clone): Adjust bfd_copy_private_symbol_data call.
Add GPR and FPR symbolic register names to GAS for all ABI choices,
selecting the set of names based on the ABI being assembled for.
This extends the existing feature where the oldabi and newabi would
provide different symbolic GPR names to the assembler. Both EABIs and
o64 are now supported along with symbolic FPR names for all ABI choices.
Signed-off-by: Maximilian Ciric <max.ciric@gmail.com>
As non-private functions, they should come with full disambiguating
prefixes - add bfd_elf_ to both. Hence commit bf4128d0cc ("bfd/ELF:
mark internal NDS32 functions hidden") also wrongly added ATTRIBUTE_HIDDEN
to them.
As non-private functions, they should come with full disambiguating
prefixes - add bfd_elf_ to both. Hence commit 2903d813fc ("bfd/ELF: mark
internal LoongArch functions hidden") also wrongly added ATTRIBUTE_HIDDEN
to them.
While loongarch_get_uleb128_length() also falls in the same category,
having it live in libbfd, when outside of gas there's hardly any use to be
expected, isn't very useful. Drop the function altogether and simplify the
clearing of the ULEB128 in md_apply_fix().
For loongarch_larch_reloc_name_lookup() drop gas'es custom declaration;
the libbfd one ought to be used, for producer and consumer to "see" the
same one. Also drop ATTRIBUTE_UNUSED there, as that makes sense only for
parameters in function definitions.
As a non-private function, it shouldn't have a "_bfd_" prefix, but merely
a "bfd_" one. Hence commit 50efe229dd ("bfd/ELF: mark internal functions
hidden") also wrongly added ATTRIBUTE_HIDDEN to it.
As a non-private data item, it shouldn't have a "_bfd_" prefix, but merely
a "bfd_" one. Furthermore, as being x86-only (forever since its
introduction), it doesn't need to be present in libbfd.{a,so} at all for
other targets.
Now that the SDM (finally) at least mentions it (without giving it a
proper instruction page, though), let's (again: finally) also support it
in assembler and disassembler.
I recently noticed a complex case statement in gas/configure.ac controlling
the setting of ac_default_x86_relax_relocations on Solaris/x86. Since it
included all versions of Solaris, it could be massively simplified.
Looking closer however, I found that it was introduced in
commit 0cb4071ef9
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Feb 3 08:25:15 2016 -0800
Add -mrelax-relocations= to x86 assembler
based on PR gas/19520. This PR reported that the new R_386_GOT32X
etc. relocations weren't supported on older versions of Solaris,
breaking gcc bootstrap. In response, they were disabled on all Solaris
versions except Solaris 12, where they had been implemented in the
native toolchain based on my findings.
However, Solaris 12 has been rechristened to 11.4 before release,
effectively disabling DEFAULT_GENERATE_X86_RELAX_RELOCATIONS on all
versions of Solaris/x86.
Since Solaris 11.4 cannot be distinguished from earlier versions in
cross configurations, this patch fixes this by removing
--enable-x86-relax-relocations completely, instead disabling
DEFAULT_GENERATE_X86_RELAX_RELOCATIONS in tc-i386.c on Solaris. It also
adds testcases to verify the -mrelax-relocations default.
Tested on {i386,amd64}-pc-solaris2.11 and {i686,x86_64}-pc-linux-gnu.
2025-10-16 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
gas:
PR gas/19520
* configure.ac (ac_default_x86_relax_relocations): Remove.
<i386-*-solaris2* | x86_64-*-solaris2>: Likewise.
* configure: Regenerate.
* config.in: Regenerate.
* config/tc-i386.c (DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
* doc/c-i386.texi (i386-Options, -mrelax-relocations): Remove
--enable-x86-relax-relocations reference.
* testsuite/gas/i386/gotx.s: New source.
* testsuite/gas/i386/gotx-default.d: New test.
* testsuite/gas/i386/no-gotx-default.d: Likewise.
* testsuite/gas/i386/i386.exp: Run them.
In SFrame stack trace format, the representation of stack offsets allows
for either 1-byte, 2-byte or 4-byte integers.
Add new internal function sframe_fre_stack_offset_bound_p () which
checks if the given offset is within bounds (at most as a 4-byte
integer). Use this to check if CFA offset is within bounds, if not skip
emitting the FDE, and warn the user.
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
gas/
PR gas/33277
* gen-sframe.c (sframe_fre_stack_offset_bound_p): New
definition.
(sframe_xlate_do_def_cfa): Check bounds of offset.
(sframe_xlate_do_def_cfa_offset): Likewise.
gas/testsuite/
PR gas/33277
* gas/cfi-sframe/cfi-sframe.exp: Add new test.
* gas/cfi-sframe/cfi-sframe-x86_64-empty-pr33277.d: Likewise.
* gas/cfi-sframe/cfi-sframe-x86_64-empty-pr33277.s: Likewise.
IBM Z instruction format RIL-a has a 32-bit immediate operand in
instruction bits 16 to 47. Enable the assembler to emit a 32-bit
direct or PC-relative relocation when processing a fixup, similar
as it is already done for 16-bit immediate operands in bits 16-31.
This enables to assemble the following:
lgfi %r1,symbol # R_390_32
lgfi %r1,symbol-. # R_390_PC32
Furthermore it brings GNU assembler on par with LLVM assembler in
that regard.
gas/
* config/tc-s390.c (md_apply_fix): Emit 32-bit direct or
PC-relative relocation for 32-bit immediate operand in
instruction bits 16-47.
gas/testsuite/
* gas/s390/zarch-reloc.d: Add tests for relocation of RIL-a
32-bit immediate operand.
* gas/s390/zarch-reloc.s: Likewise.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
