As a non-private data item, it shouldn't have a "_bfd_" prefix, but merely
a "bfd_" one. Furthermore, as being x86-only (forever since its
introduction), it doesn't need to be present in libbfd.{a,so} at all for
other targets.
I recently noticed a complex case statement in gas/configure.ac controlling
the setting of ac_default_x86_relax_relocations on Solaris/x86. Since it
included all versions of Solaris, it could be massively simplified.
Looking closer however, I found that it was introduced in
commit 0cb4071ef9
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Feb 3 08:25:15 2016 -0800
Add -mrelax-relocations= to x86 assembler
based on PR gas/19520. This PR reported that the new R_386_GOT32X
etc. relocations weren't supported on older versions of Solaris,
breaking gcc bootstrap. In response, they were disabled on all Solaris
versions except Solaris 12, where they had been implemented in the
native toolchain based on my findings.
However, Solaris 12 has been rechristened to 11.4 before release,
effectively disabling DEFAULT_GENERATE_X86_RELAX_RELOCATIONS on all
versions of Solaris/x86.
Since Solaris 11.4 cannot be distinguished from earlier versions in
cross configurations, this patch fixes this by removing
--enable-x86-relax-relocations completely, instead disabling
DEFAULT_GENERATE_X86_RELAX_RELOCATIONS in tc-i386.c on Solaris. It also
adds testcases to verify the -mrelax-relocations default.
Tested on {i386,amd64}-pc-solaris2.11 and {i686,x86_64}-pc-linux-gnu.
2025-10-16 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
gas:
PR gas/19520
* configure.ac (ac_default_x86_relax_relocations): Remove.
<i386-*-solaris2* | x86_64-*-solaris2>: Likewise.
* configure: Regenerate.
* config.in: Regenerate.
* config/tc-i386.c (DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
* doc/c-i386.texi (i386-Options, -mrelax-relocations): Remove
--enable-x86-relax-relocations reference.
* testsuite/gas/i386/gotx.s: New source.
* testsuite/gas/i386/gotx-default.d: New test.
* testsuite/gas/i386/no-gotx-default.d: Likewise.
* testsuite/gas/i386/i386.exp: Run them.
IBM Z instruction format RIL-a has a 32-bit immediate operand in
instruction bits 16 to 47. Enable the assembler to emit a 32-bit
direct or PC-relative relocation when processing a fixup, similar
as it is already done for 16-bit immediate operands in bits 16-31.
This enables to assemble the following:
lgfi %r1,symbol # R_390_32
lgfi %r1,symbol-. # R_390_PC32
Furthermore it brings GNU assembler on par with LLVM assembler in
that regard.
gas/
* config/tc-s390.c (md_apply_fix): Emit 32-bit direct or
PC-relative relocation for 32-bit immediate operand in
instruction bits 16-47.
gas/testsuite/
* gas/s390/zarch-reloc.d: Add tests for relocation of RIL-a
32-bit immediate operand.
* gas/s390/zarch-reloc.s: Likewise.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Complementing commit 7ea90d9316 ("MIPS: Fix linker for REL TLS
HI16/LO16 relocs") also add pairing for HI16/LO16 REL TLS relocations
in GAS, which is where it needs to be done in the first place and
which is required for later linker operation on the objects produced.
Pairing also corrects in-place addend installation for the high-part
relocations, which used not to happen in the absence of this fix for
ones not already followed by the corresponding low-part relocation.
Add test cases to verify relocation ordering and addend installation.
Fix `micromips_reloc_p' wrongly classifying microMIPS TLS relocations
as non microMIPS relocations.
Owing to where the function is called this issue does not trigger in
reality, but with an upcoming change it would, where suitable tests
will be included.
MIPS/VxWorks targets have an unusual arrangement in that they use RELA
relocations with the o32 ABI, unlike any other MIPS target. Due to an
inconsistency in BFD however "hybrid" relocations are produced by GAS,
where despite the relocations being of the RELA type the field to be
relocated also holds an in-place addend to be applied at link time.
For example:
$ cat vxworks-rela.s
.text
foo:
la $2, bar + 0x12345678
$ mips-vxworks-as -o vxworks-rela.o vxworks-rela.s
$ mips-vxworks-objdump -dr vxworks-rela.o
vxworks-rela.o: file format elf32-bigmips-vxworks
Disassembly of section .text:
00000000 <foo>:
0: 3c021234 lui v0,0x1234
0: R_MIPS_HI16 bar+0x12345678
4: 24425678 addiu v0,v0,22136
4: R_MIPS_LO16 bar+0x12345678
$
This is due to the BFD backend being strapped for RELA relocations:
#undef elf_backend_may_use_rel_p
#define elf_backend_may_use_rel_p 0
#undef elf_backend_may_use_rela_p
#define elf_backend_may_use_rela_p 1
#undef elf_backend_default_use_rela_p
#define elf_backend_default_use_rela_p 1
but the howtos in use requesting an in-place addend, e.g.:
/* High 16 bits of symbol value. */
HOWTO (R_MIPS_HI16, /* type */
16, /* rightshift */
4, /* size */
16, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
_bfd_mips_elf_hi16_reloc, /* special_function */
"R_MIPS_HI16", /* name */
true, /* partial_inplace */
0x0000ffff, /* src_mask */
0x0000ffff, /* dst_mask */
false), /* pcrel_offset */
/* Low 16 bits of symbol value. */
HOWTO (R_MIPS_LO16, /* type */
0, /* rightshift */
4, /* size */
16, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
_bfd_mips_elf_lo16_reloc, /* special_function */
"R_MIPS_LO16", /* name */
true, /* partial_inplace */
0x0000ffff, /* src_mask */
0x0000ffff, /* dst_mask */
false), /* pcrel_offset */
This arrangement nevertheless happens to produce correct ELF executables
owing to the ELF linker avoiding the use of howtos and doing relocation
calculations using its own knowledge of relocation semantics embedded
directly in `mips_elf_calculate_relocation' code.
Beyond producing questionable link object files it however breaks badly
with the generic linker, such as when output is srec.
Fix the problem by providing a set of o32 RELA howtos and making VxWorks
targets use it. Complement it with a set of test cases for GAS and LD;
we expect link object files to be essentially the same as n32 ones for
other MIPS targets sans the ABI2 ELF file header flag, and machine code
produced to be the same between SREC and ELF executables.
This reverts commit bafcf0823c.
The patch (the removal) was done on the wrong assumption that
it was only the APX-promoted forms which would be dropped
because the APX spec was updated ahead of ISE and there was no
info that AMX-TRANSPOSE would be de-published at that time.
Given the current situation, since we will choose to disable
AMX-TRANSPOSE but not to remove the support in Binutils, we will
also not remove the APX support.
For arithmetic ops, Z80 syntax wants "op A,x" for ADD, ADC and SBC and
"op x" for SUB, AND, OR, XOR, and CP. Many historical assemblers
simply treat them orthogonally; allowing but not requiring the "A,"
operand for any of these operations. This is widely used in legacy
source code, and there is no reason not to.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This is once again just so the target won't need excluding in a
forthcoming new testcase, which requires no padding at the end of at
least some of the sections.
In line with bfd's styp_to_sec_flags(), set SEC_ALLOC for code/data
sections. Tie the setting to SEC_LOAD, not avoid inadvertently producing
a .bss-like section.
For one, all PadLock insns depend on CR4.FXSR to be enabled, which means
they ought to be taking FXSR as a prereq.
Furthermore none of them permits a REPNE prefix; such forms are documented
to cause #UD. (This is mainly relevant for XSTORE, which doesn't include a
REP prefix in its base encoding. For the others this merely is a change in
what diagnostic is issued.)
Finally it is documented that an operand size prefix also causes #UD.
Work around a compilation error:
.../gas/config/tc-tic6x.c: In function 'tic6x_start_unwind_section':
.../gas/config/tc-tic6x.c:4632:17: error: offset '16' outside bounds of constant string [-Werror=array-bounds]
4632 | text_name += strlen (".gnu.linkonce.t.");
| ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
observed with GCC 10.
Work around compilation errors:
.../gas/config/tc-ia64.c: In function 'declare_register_set':
.../gas/config/tc-ia64.c:5375:41: error: '%u' directive output may be truncated writing between 1 and 10 bytes into a region of size 8 [-Werror=format-truncation=]
5375 | snprintf (name, sizeof (name), "%s%u", prefix, i);
| ^~
.../gas/config/tc-ia64.c:5375:38: note: directive argument in the range [0, 4294967294]
5375 | snprintf (name, sizeof (name), "%s%u", prefix, i);
| ^~~~~~
.../gas/config/tc-ia64.c:5375:7: note: 'snprintf' output 2 or more bytes (assuming 11) into a destination of size 8
5375 | snprintf (name, sizeof (name), "%s%u", prefix, i);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
observed with GCC 10. Pick 16 for a round 64-bit stack frame size.
Add new instructions from the Generic Interrupt Controller, GICv5,
extension. These instructions are aliases to system instructions and are
the following:
* gic <operation>, <reg>
* gicr <reg>, <operation>
* gsb <operation>
Generic Interrupt Controller v5, GICv5, adds new system registers
and system instructions. These are enabled with the +gcie flag, where
gcie stands for GICv5 (Generic Interrupt Controller) CPU Interrupt
Extension.
There is a make_expr_symbol in append_insn, which gets called from
macro_build, which is all over the place. Many of these set up an
expression without initialising all fields. Now the uninitialised
fields should not be accessed in a properly functioning assembler,
but I'm inclined to think anything copied ought to be initialised.
* config/tc-mips.c (fix_loongson2f_jump, load_register),
(add_got_offset, add_got_offset_hilo, macro_build_branch_likely),
(macro, mips16_macro, s_cpload, s_cpsetup, s_cprestore)
(s_cpreturn): Use structure initialiser to ensure all fields of
expression are initialised.
(load_address): Copy entire structure for the same reason.
There are many more places that copy an uninitialised expressionS to a
symbol via symbol_set_value_expression and make_expr_symbol. This
patch focuses on general gas code that does that, and a few backends.
Note that unlike the i386 case that oss-fuzz found, it is likely that
the tc-alpha.c, tc-ppc.c and tc-tic54x.c changes are not fixing bugs,
alpha and tic54x because they don't use X_md, ppc because it carefully
handles X_md. Also, as an example an O_constant expression should
only ever have its X_add_number field accessed, therefore the other
fields can stay uninitialised. However, I think that copying
uninitialised struct fields around is not good practice. If nothing
else it can be confusing when examining symbols under gdb.
I also replaced gen-sframe.c "#ifdef SFRAME_FRE_TYPE_SELECTION_OPT"
with "if (SFRAME_FRE_TYPE_SELECTION_OPT)" so code in the false
branches is compiled and thus less likely to bitrot. (As far as I can
see, SFRAME_FRE_TYPE_SELECTION_OPT is always 1.)
* cgen.c (expr_build_binary): Use structure initialiser to
ensure all fields of expression are initialised.
* config/obj-coff.c (obj_coff_val): Likewise.
* config/tc-alpha.c (add_to_link_pool): Likewise.
* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
* config/tc-mips.c (fix_loongson2f_jump, load_register),
(load_address, add_got_offset, add_got_offset_hilo),
(macro_build_branch_likely, macro, mips16_macro),
(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Likewise.
* config/tc-ppc.c (ppc_function): Likewise.
* config/tc-tic54x.c (tic54x_field): Likewise.
* dw2gencfi.c (output_cfi_insn): Likewise.
* expr.c (expr_build_uconstant): Likewise.
* read.c (s_mri_common): Likewise.
* gen-sframe.c (create_fre_start_addr_exp),
(create_func_info_exp, output_sframe_row_entry): Likewise.
Don't conditionally compile via SFRAME_FRE_TYPE_SELECTION_OPT.
* cgen.c (gas_cgen_parse_operand): Use md_expr_init_rest.
* config/tc-microblaze.c (microblaze_s_weakext): Likewise.
* ecoff.c (ecoff_directive_weakext, ecoff_stab): Likewise.
* read.c (pseudo_set): Likewise.
This patch removes clean_up_expression which runs just before operand()
returns. clean_up_expression sets as yet uninitialised fields of
expressionS. Well, it sets fields based on the value of X_op,
trusting that others have been written, and has one notable exception:
X_md is not initialised.
Instead initialise expressionS fully inside operand(), which is called
at the start of expr(), and introduce md_expr_init for the odd
backends that want to mess with X_md.
This is in response to an oss-fuzz report that read.c:pseudo_set calls
expr() leaving exp.X_md uninitialised and can copy that to a symbol
via symbol_set_value_expression. tc-i386-intel.c:565 is one place
that later tests the uninitialised X_md.
* config/tc-z80.h (md_expr_init, md_expr_init_rest): Define.
* config/tc-microblaze.h: Likewise.
* expr.c (clean_up_expression): Delete.
(operand): Init expression early.
(expr): Use md_expr_init_rest to init X_md when necessary.
tc-arc.c:tokenize_arguments tweaks expression() parsing, controlling
whether arc_parse_name does anything by setting X_op and X_md in the
expressionS argument passed to expression(). I want to change expr()
to always fully initialise its result, and that means either a special
expression initialiser for arc, or controlling arc_parse_name by some
other means. Since arc_parse_name already tests "assembling_insn" and
no other code does, change "assembling_insn" to directly control
arc_parse_name. Doing it this way also stops a possible uninitialised
access to right.X_op from expr() in arc_parse_name with current gas.
The next patch in this series will also stop such uninitialised
accesses.
* config/tc-arc.c (assembling_insn): Update comment.
(tokenize_arguments): Don't set X_op and X_md to control
expression(), instead just use assembling_insn.
(md_operand): Similarly.
(arc_parse_name): Don't test X_op and X_md.
(md_assemble): Don't set assembling_insn here.
While compilers default to v8plus on 32-bit Solaris/SPARC (gcc at least
since 4.4 in 2009, cc since at least Stdio 9 in 2010), gas still uses a
sparclite default. While this doesn't cause issue for gcc (it passes
-Av8plus as necessary), it repeatedly lead to problems in the testsuite
which has to be sprinkled with setting ASFLAGS accordingly since gas cannot
assemble the gcc output by default.
This patch switches the default to v8plus on Solaris to match gcc.
I had to introduce a new arch value, v8plus-32, matching v9-64, to allow
for this.
I cannot reliably tell if other SPARC targets are similarly affected, so
this patch restricts the change to Solaris.
Tested on sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11.
2025-09-25 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
gas:
* config/tc-sparc.c (sparc_arch_table): Introduce v8plus-32.
* configure.tgt (generic_target) <sparc-*-solaris*>: Set arch to
v8plus-32 for 32-bit sparc.
* testsuite/gas/sparc/v8plus.rd, testsuite/gas/sparc/v8plus.s: New
test.
* testsuite/gas/sparc/sparc.exp: Run it on sparc*-*-solaris2*.
Many feature bits were unnecessarily added for features with no command
line flags, and effectively acted as aliases of the architecture version
bit they were linked to. The system register regating patch removed all
uses of these feature bits, so we can just remove them.
The flag is unnecessary, because we can just unconditionally check the
features field every time. Having the information duplicated in two
separate fields makes it harder to maintain, particularly in the context
of the upcoming regating patch.
The reg_flags parameter of aarch64_sys_ins_reg_supported_p is now
unused, so remove that as well.
Solaris/PowerPC was a shortlived Solaris port with limited hardware
support. It was released with Solaris 2.5.1 back in 1996, with support
removed again only a year later in Solaris 2.6. Since this is long
obsolete, this patch removes the remains of the support.
Tested by a cross to ppc-unknown-linux-gnu to ascertain the build didn't
get broken.
2025-09-15 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
bfd:
* config.bfd <powerpc-*-solaris2*>: Remove.
gas:
* NEWS: Mention Solaris/PowerPC removal.
* configure.ac <ppc-*-solaris*>: Remove.
* configure: Regenerate.
* configure.in: Regenerate.
* configure.tgt <ppc-*-solaris*>: Remove.
* config/tc-ppc.c (ppc_solaris_comment_chars): Remove.
(ppc_eabi_comment_chars): Remove.
(SOLARIS_P): Remove.
(msolaris): Remove.
(md_parse_option): Remove "solaris", "no-solaris" hangling.
(md_show_usage): Likewise.
(md_begin): Remove msolaris handling.
* config/tc-ppc.h (ppc_comment_chars): Fix declaration.
* stabs.c (s_stab_generic) [TC_PPC && OBJ_ELF]: Remove 4-arg
.stabd support.
* doc/as.texi (Overview, Target PowerPC options): Remove
-msolaris, -mno-solaris.
* doc/c-ppc.texi (PowerPC-Opts): Remove -msolaris, -mno-solaris.
(PowerPC-Chars): Remove ! as line comment character.
ld:
* configure.tgt <powerpc*-*-solaris*>: Remove.
As said by the paragraph of the description that isn't modified here (a
few lines up), this was only ever supposed to be used with 16-bit
architectures. Actually enforcing this allows code in
md_estimate_size_before_relax() to move to a less frequently used code
path. (For backwards compatibility, keep accepting "jumps" also with 32-
or 64-bit architectures.)
Repeat the constraint also in the 2nd paragraph of the doc on this
subject. And while there also insert a missing insn in the related
i386-Jumps section.
Furthermore checking a global variable during late processing is wrong. We
need to record the state in the fragment, and use that rather than the
state of the variable at the end of parsing all input.
Seeing that there's no testing of the functionality at all, add a testcase
as well.
Bypassing _reloc() isn't a good idea, as there are various errors
checked for there. For example 16-bit JMP or Jcc may not use the @plt
form (resulting in a 32-bit relocation to be emitted for a 16-bit
field), which so far we only reject for 16-bit CALL. In exchange this
allows simplifying the setting up of the "reloc_type" local variable.
Introduce a clone with extra parameters, to allow subsequent use from
md_estimate_size_before_relax() (or elsewhere, should that turn out
necessary). There flag_code cannot be used and location information
needs to be provided for diagnostics.
SImilar to aarch64, commit eac4eb8ecb
There are two problems when GOT relocation against a symbol that has a defined
value,
1. Pesudo la with pic and pseudo lga lost the relocations.
2. %got_pcrel_hi generates R_RISCV_GOT_HI20 with addend, which is wrong since
commit 50331d64f1.
The solution is to use deferred_expression for GOT relocation. Maybe other
relocations also have same problem and need the deferred_expression, but we can
add in the future patches.
It isn't necessary to call obstack_finish before obstack_free of an
unwanted string.
* config/tc-mips.c (mips_parse_arguments): Replace obstack_finsih
with obstack_base.
These weren't wrong, but should use the BUNDLE_SIZE macros, in case
they ever change.
* config/tc-tilegx.h (MAX_MEM_FOR_RS_ALIGN_CODE): Use
TILEGX_BUNDLE_SIZE_IN_BYTES.
* config/tc-tilepro.h (MAX_MEM_FOR_RS_ALIGN_CODE): Use
TILEPRO_BUNDLE_SIZE_IN_BYTES.
Commit 7ca6020a4e "tidy target HANDLE_ALIGN" didn't account for
the "fix" amount emitted by visium_handle_align. This didn't show up
as a problem due to frag alignment hiding the error, until I started
messing with struct frag.
* config/tc-visium.h (MAX_MEM_FOR_RS_ALIGN_CODE): Correct.
PR gas/15273
The apparent intent of the original code added in
https://sourceware.org/pipermail/binutils/2012-August/078044.html was
to emit an error message if the instruction was obsolete and only to
emit a deprecation warning if an error hadn't already been emitted.
However, when the insn has not yet been obsoleted, the code would
generate a warning with a (null) message body if the selected CPU was
'any'.
The previous fix for this bug was to remove the support for the
obsoletion message entirely, which was probably the wrong approach. A
better fix is to only call check_obsolete if obs_msg is non-null; we
can use this as a proxy for the instruction not being obsolete on any
architecture.
While we are here, fix an incorrect capitalization in the deprecation
message ('This' to 'this').
The lack of a uniform "Warning: " prefix can be irritating. Re-use
as_warn_internal(), by moving the warning count increment into the pre-
existing callers (where the flag_no_warnings checks also are). At the
same time keep the listing_warning() invocation at its place - listings
certainly should have such warnings reproduced as well.
While there also drop the unnecessary forward declarations of static
functions.
The spec doesn't tie entity size to just SHF_MERGE and SHF_STRINGS
sections. Introduce a new "section letter" 'E' to allow recording (and
checking) of entity size even without 'M' or 'S'.
Indicate to obj_elf_parse_section_letters() whether to recognize GNU-
specific flags by conditionally passing NULL in place of a pointer to
the GNU attributes. This way wrong use of d and R can be diagnosed just
like any other use of unrecognized letters.
Furthermore adjust the md_elf_section_letter() interface: Have targets
merely return the extra letters they support. There's no point having
them customize the entire diagnostic. Even more so that additions in
common code would then reflecting in every target's diagnostic as well,
which - as can be seen - wasn't always properly done.
There's also no reason for wrong letters to be a fatal error; switch to
as_bad() while making other adjustments there.
While making the target specific adjustments, also drop IA-64's dead
handling of 'o' (SHF_LINK_ORDER), which has been covered by common code
for a long time.
Also re-arrange the switch() in obj_elf_parse_section_letters() to be
alphabetically sorted again.
obj_elf_parse_section_letters() checking for that ABI, when the checking
at the bottom of obj_elf_section() and the logic in
_bfd_elf_final_write_processing() don't, makes no sense. Either
STANDALONE is meant to be GNU-ish, or it is not, I would think. Drop the
one inconsistent check.
If it was not GNU-ish (as the other two locations suggest), what did the
section23b testcase actually mean to check? The numeric attribute value
0x200000 has an entirely unknown (or more precisely, OS-defined, which
we may or may not know of) meaning then, so ought to be accepted. If it
was GNU-ish, the other testcase, elf/section23a, would want running for
those targets as well, and the testcase in question would still be wrong
to have. Hence that testcase is removed, and section23a is renamed to
just section23.
The custom parsing done there and in one of its callers allowed various
bogus constructs to be accepted. Insist on a non-zero leading digit when
parsing numbers, don't lose upper bits, and insist on proper separation
of operands.
Commit 1ac26e9f7a replaced ISSPACE with is_whitespace, but the
former returns true on EOL while the latter does not. Sprinkle
is_end_of_stmt tests to fix this bug.
The same segfault can be triggered by a ".relax_hint" with no
following instructions. Fix that too.
* config/tc-nds32.c (nds32_lookup_pseudo_opcode): Use
is_end_of_stmt along with is_whitespace.
(nds32_relax_relocs, nds32_relax_hint, nds32_flag),
(ict_model: Likewise.
(nds32_elf_append_relax_relocs): Return on no opcode.
* testsuite/gas/nds32/nds32.exp: Find .d files automatically.
* testsuite/gas/nds32/pr33229.d,
* testsuite/gas/nds32/pr33229.s: New test.
