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https://github.com/bminor/binutils-gdb.git
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gas: make as_tsktsk() output more as_warn()-like
The lack of a uniform "Warning: " prefix can be irritating. Re-use as_warn_internal(), by moving the warning count increment into the pre- existing callers (where the flag_no_warnings checks also are). At the same time keep the listing_warning() invocation at its place - listings certainly should have such warnings reproduced as well. While there also drop the unnecessary forward declarations of static functions.
This commit is contained in:
@@ -920,20 +920,16 @@ struct asm_opcode
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#define BAD_CDE_COPROC _("coprocessor for insn is not enabled for cde")
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#define UNPRED_REG(R) _("using " R " results in unpredictable behaviour")
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#define THUMB1_RELOC_ONLY _("relocation valid in thumb1 code only")
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#define MVE_NOT_IT _("Warning: instruction is UNPREDICTABLE in an IT " \
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"block")
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#define MVE_NOT_VPT _("Warning: instruction is UNPREDICTABLE in a VPT " \
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"block")
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#define MVE_BAD_PC _("Warning: instruction is UNPREDICTABLE with PC" \
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" operand")
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#define MVE_BAD_SP _("Warning: instruction is UNPREDICTABLE with SP" \
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" operand")
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#define MVE_NOT_IT _("instruction is UNPREDICTABLE in an IT block")
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#define MVE_NOT_VPT _("instruction is UNPREDICTABLE in a VPT block")
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#define MVE_BAD_PC _("instruction is UNPREDICTABLE with PC operand")
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#define MVE_BAD_SP _("instruction is UNPREDICTABLE with SP operand")
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#define BAD_SIMD_TYPE _("bad type in SIMD instruction")
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#define BAD_MVE_AUTO \
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_("GAS auto-detection mode and -march=all is deprecated for MVE, please" \
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" use a valid -march or -mcpu option.")
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#define BAD_MVE_SRCDEST _("Warning: 32-bit element size and same destination "\
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"and source operands makes instruction UNPREDICTABLE")
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#define BAD_MVE_SRCDEST _("32-bit element size and same destination and " \
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"source operands makes instruction UNPREDICTABLE")
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#define BAD_EL_TYPE _("bad element type for instruction")
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#define MVE_BAD_QREG _("MVE vector register Q[0..7] expected")
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#define BAD_PACBTI _("selected processor does not support PACBTI extention")
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@@ -1977,7 +1973,7 @@ parse_reg_list (char ** strp, enum reg_list_els etype)
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{
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if (range & (1 << i))
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as_tsktsk
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(_("Warning: duplicated register (r%d) in register list"),
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(_("duplicated register (r%d) in register list"),
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i);
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else
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range |= 1 << i;
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@@ -1986,10 +1982,10 @@ parse_reg_list (char ** strp, enum reg_list_els etype)
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}
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if (range & (1 << reg))
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as_tsktsk (_("Warning: duplicated register (r%d) in register list"),
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as_tsktsk (_("duplicated register (r%d) in register list"),
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reg);
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else if (reg <= cur_reg)
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as_tsktsk (_("Warning: register range not in ascending order"));
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as_tsktsk (_("register range not in ascending order"));
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range |= 1 << reg;
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cur_reg = reg;
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@@ -2027,7 +2023,7 @@ parse_reg_list (char ** strp, enum reg_list_els etype)
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regno &= -regno;
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regno = (1 << regno) - 1;
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as_tsktsk
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(_("Warning: duplicated register (r%d) in register list"),
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(_("duplicated register (r%d) in register list"),
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regno);
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}
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@@ -4355,10 +4351,10 @@ parse_dot_save (char **str_p, int prev_reg)
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if (!in_range)
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{
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if (core_regs & (1 << reg))
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as_tsktsk (_("Warning: duplicated register (r%d) in register list"),
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as_tsktsk (_("duplicated register (r%d) in register list"),
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reg);
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else if (reg <= prev_reg)
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as_tsktsk (_("Warning: register list not in ascending order"));
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as_tsktsk (_("register list not in ascending order"));
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core_regs |= (1 << reg);
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prev_reg = reg;
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@@ -4375,7 +4371,7 @@ parse_dot_save (char **str_p, int prev_reg)
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for (i = prev_reg + 1; i <= reg; i++)
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{
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if (core_regs & (1 << i))
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as_tsktsk (_("Warning: duplicated register (r%d) in register list"),
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as_tsktsk (_("duplicated register (r%d) in register list"),
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i);
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else
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core_regs |= 1 << i;
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@@ -17958,7 +17954,7 @@ do_mve_vhcadd (void)
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constraint (rot != 90 && rot != 270, _("immediate out of range"));
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if (et.size == 32 && inst.operands[0].reg == inst.operands[2].reg)
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as_tsktsk (_("Warning: 32-bit element size and same first and third "
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as_tsktsk (_("32-bit element size and same first and third "
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"operand makes instruction UNPREDICTABLE"));
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mve_encode_qqq (0, et.size);
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@@ -19730,7 +19726,7 @@ do_neon_rev (void)
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if (ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext) && elsize == 64
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&& inst.operands[0].reg == inst.operands[1].reg)
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as_tsktsk (_("Warning: 64-bit element size and same destination and source"
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as_tsktsk (_("64-bit element size and same destination and source"
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" operands makes instruction UNPREDICTABLE"));
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gas_assert (elsize != 0);
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@@ -21281,7 +21277,7 @@ do_vcadd (void)
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et = neon_check_type (3, rs, N_EQK, N_EQK, N_KEY | N_F16 | N_F32 | N_I8
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| N_I16 | N_I32);
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if (et.size == 32 && inst.operands[0].reg == inst.operands[2].reg)
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as_tsktsk (_("Warning: 32-bit element size and same first and third "
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as_tsktsk (_("32-bit element size and same first and third "
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"operand makes instruction UNPREDICTABLE"));
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}
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@@ -22824,8 +22820,7 @@ handle_pred_state (void)
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{
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if (unified_syntax
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&& !(implicit_it_mode & IMPLICIT_IT_MODE_ARM))
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as_tsktsk (_("Warning: conditional outside an IT block"\
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" for Thumb."));
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as_tsktsk (_("conditional outside an IT block for Thumb"));
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}
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else
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{
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@@ -27,11 +27,6 @@
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extern const char *strsignal (int);
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#endif
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static void as_show_where (void);
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static void as_warn_internal (const char *, unsigned int, char *);
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static void as_bad_internal (const char *, unsigned int, char *);
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static void signal_crash (int) ATTRIBUTE_NORETURN;
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/* Despite the rest of the comments in this file, (FIXME-SOON),
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here is the current scheme for error messages etc:
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@@ -152,34 +147,13 @@ as_info_where (const char *file, unsigned int line, unsigned int indent,
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file, line, (int)indent, "", _("Info: "), buffer);
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}
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/* Send to stderr a string as a warning, and locate warning
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in input file(s).
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Please only use this for when we have some recovery action.
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Please explain in string (which may have '\n's) what recovery was
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done. */
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void
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as_tsktsk (const char *format, ...)
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{
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va_list args;
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as_show_where ();
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va_start (args, format);
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vfprintf (stderr, format, args);
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va_end (args);
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(void) putc ('\n', stderr);
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as_report_context ();
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}
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/* The common portion of as_warn and as_warn_where. */
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/* The common portion of as_warn, as_warn_where, and as_tsktsk. */
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static void
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as_warn_internal (const char *file, unsigned int line, char *buffer)
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{
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bool context = false;
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++warning_count;
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if (file == NULL)
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{
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file = as_where_top (&line);
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@@ -219,6 +193,8 @@ as_warn (const char *format, ...)
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if (!flag_no_warnings)
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{
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++warning_count;
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va_start (args, format);
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vsnprintf (buffer, sizeof (buffer), format, args);
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va_end (args);
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@@ -238,6 +214,8 @@ as_warn_where (const char *file, unsigned int line, const char *format, ...)
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if (!flag_no_warnings)
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{
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++warning_count;
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va_start (args, format);
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vsnprintf (buffer, sizeof (buffer), format, args);
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va_end (args);
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@@ -245,6 +223,24 @@ as_warn_where (const char *file, unsigned int line, const char *format, ...)
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}
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}
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/* Send to stderr a string as a warning, and locate warning
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in input file(s).
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Please only use this for when we have some recovery action.
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Please explain in string (which may have '\n's) what recovery was
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done. */
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void
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as_tsktsk (const char *format, ...)
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{
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va_list args;
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char buffer[2000];
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va_start (args, format);
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vsnprintf (buffer, sizeof (buffer), format, args);
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va_end (args);
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as_warn_internal (NULL, 0, buffer);
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}
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/* The common portion of as_bad and as_bad_where. */
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static void
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@@ -1,3 +1,3 @@
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[^:]*: Assembler messages:
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[^:]*:8: Error: incorrect condition in IT block -- `moveq r0,r1'
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[^:]*:10: Warning: conditional outside an IT block for Thumb.
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[^:]*:10: Warning: conditional outside an IT block for Thumb
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@@ -1,5 +1,5 @@
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[^:]*: Assembler messages:
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[^:]*:26: s suffix on comparison instruction is deprecated
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[^:]*:29: s suffix on comparison instruction is deprecated
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[^:]*:32: s suffix on comparison instruction is deprecated
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[^:]*:35: s suffix on comparison instruction is deprecated
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[^:]*:26: Warning: s suffix on comparison instruction is deprecated
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[^:]*:29: Warning: s suffix on comparison instruction is deprecated
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[^:]*:32: Warning: s suffix on comparison instruction is deprecated
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[^:]*:35: Warning: s suffix on comparison instruction is deprecated
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@@ -425,51 +425,51 @@
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.*:106: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:78: Warning: scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLE
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.*:110: *Info: macro .*
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.*:78: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:78: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:110: *Info: macro .*
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.*:87: Error: co-processor offset out of range
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.*:88: Error: co-processor offset out of range
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@@ -1,16 +1,16 @@
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.*: Assembler messages:
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.*:6: Error: swp{b} use is obsoleted for ARMv8 and later
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.*:9: This coprocessor register access is deprecated in ARMv8
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.*:10: This coprocessor register access is deprecated in ARMv8
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.*:11: This coprocessor register access is deprecated in ARMv8
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.*:12: This coprocessor register access is deprecated in ARMv8
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.*:13: This coprocessor register access is deprecated in ARMv8
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.*:16: setend use is deprecated for ARMv8
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.*:19: setend use is deprecated for ARMv8
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.*:9: Warning: This coprocessor register access is deprecated in ARMv8
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.*:10: Warning: This coprocessor register access is deprecated in ARMv8
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.*:11: Warning: This coprocessor register access is deprecated in ARMv8
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.*:12: Warning: This coprocessor register access is deprecated in ARMv8
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.*:13: Warning: This coprocessor register access is deprecated in ARMv8
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.*:16: Warning: setend use is deprecated for ARMv8
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.*:19: Warning: setend use is deprecated for ARMv8
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.*:23: Error: immediate value out of range -- `hlt 0x10000'
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.*:24: Error: instruction cannot be conditional -- `hltne 0x1'
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.*:28: Error: immediate value out of range -- `hlt 64'
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.*:30: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Miscellaneous 16-bit instructions
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.*:30: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Miscellaneous 16-bit instructions
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.*:30: Error: instruction is always unconditional -- `hltne 0'
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.*:34: Error: r15 not allowed here -- `stlb pc,\[r0\]'
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.*:35: Error: r15 not allowed here -- `stlb r0,\[pc\]'
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@@ -1,18 +1,18 @@
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.*: Assembler messages:
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.*:6: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
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.*:14: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:19: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:29: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:35: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:39: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
.*:42: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Miscellaneous 16-bit instructions
|
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.*:48: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Literal loads
|
||||
.*:51: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Hi-register ADD, MOV, CMP, BX, BLX using pc
|
||||
.*:54: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
.*:6: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:14: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:19: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:29: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:35: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
.*:39: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
.*:42: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Miscellaneous 16-bit instructions
|
||||
.*:48: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Literal loads
|
||||
.*:51: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Hi-register ADD, MOV, CMP, BX, BLX using pc
|
||||
.*:54: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
.*:54: Error: r15 not allowed here -- `addeq r0,pc,pc'
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.*:57: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
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||||
.*:57: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
.*:57: Error: r15 not allowed here -- `addeq pc,r0,r0'
|
||||
.*:60: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: ADD/SUB sp, sp #imm
|
||||
.*:64: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: ADD/SUB sp, sp #imm
|
||||
.*:67: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: ADD/SUB sp, sp #imm
|
||||
.*:71: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: ADD/SUB sp, sp #imm
|
||||
.*:60: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: ADD/SUB sp, sp #imm
|
||||
.*:64: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: ADD/SUB sp, sp #imm
|
||||
.*:67: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: ADD/SUB sp, sp #imm
|
||||
.*:71: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: ADD/SUB sp, sp #imm
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:2: swp{b} use is obsoleted for ARMv8 and later
|
||||
[^:]*:6: swp{b} use is deprecated for ARMv6 and ARMv7
|
||||
[^:]*:8: swp{b} use is deprecated for ARMv6 and ARMv7
|
||||
[^:]*:2: Warning: swp{b} use is obsoleted for ARMv8 and later
|
||||
[^:]*:6: Warning: swp{b} use is deprecated for ARMv6 and ARMv7
|
||||
[^:]*:8: Warning: swp{b} use is deprecated for ARMv6 and ARMv7
|
||||
|
||||
@@ -2,4 +2,4 @@
|
||||
[^:]*:5: Error: 'APSR', 'CPSR' or 'SPSR' expected -- `mrs r4,apsr_nzcvq'
|
||||
[^:]*:6: Error: selected processor does not support requested special purpose register -- `mrs r5,iapsr'
|
||||
[^:]*:7: Error: selected processor does not support requested special purpose register -- `msr iapsr,r4'
|
||||
[^:]*:8: writing to APSR without specifying a bitmask is deprecated
|
||||
[^:]*:8: Warning: writing to APSR without specifying a bitmask is deprecated
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:8: writing to APSR without specifying a bitmask is deprecated
|
||||
[^:]*:8: Warning: writing to APSR without specifying a bitmask is deprecated
|
||||
[^:]*:9: Error: selected processor does not support DSP extension -- `msr APSR_g,r9'
|
||||
[^:]*:11: Error: selected processor does not support DSP extension -- `msr APSR_nzcvqg,r9'
|
||||
[^:]*:14: Error: selected processor does not support requested special purpose register -- `msr CPSR,r9'
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:5: Rd and Rm should be different in mul
|
||||
[^:]*:6: Rd and Rm should be different in mla
|
||||
[^:]*:8: rdhi, rdlo and rm must all be different
|
||||
[^:]*:5: Warning: Rd and Rm should be different in mul
|
||||
[^:]*:6: Warning: Rd and Rm should be different in mla
|
||||
[^:]*:8: Warning: rdhi, rdlo and rm must all be different
|
||||
|
||||
@@ -1,134 +1,134 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:27: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:27: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,\[r0\]'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:27: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:28: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:28: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,\[r0,#0\]'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:28: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:29: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:29: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,\[sp\]'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:29: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:30: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:30: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,\[sp,#0\]'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:30: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:12: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:31: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:12: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:31: *Info: macro .*
|
||||
[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0\]'
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:31: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:12: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:32: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:12: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:32: *Info: macro .*
|
||||
[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,#0\]'
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:32: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:33: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:33: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,\[r0,#-4\]'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:33: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:34: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:34: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,\[r0\],#4'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:34: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:35: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:35: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,\[r0,#0\]!'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:35: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:38: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:38: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,label'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:38: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:12: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:39: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:12: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:39: *Info: macro .*
|
||||
[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,label'
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:39: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:12: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:40: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:12: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:40: *Info: macro .*
|
||||
[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[pc,#-0\]'
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:40: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:6: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:43: *Info: macro .*
|
||||
[^:]*:6: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:6: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:43: *Info: macro .*
|
||||
[^:]*:6: Error: branch must be last instruction in IT block -- `ldreq r15,\[r0,r1\]'
|
||||
[^:]*:17: *Info: macro .*
|
||||
[^:]*:43: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:12: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:44: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:12: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:44: *Info: macro .*
|
||||
[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1\]'
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:44: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:12: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:45: *Info: macro .*
|
||||
[^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:12: Warning: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
|
||||
[^:]*:21: *Info: macro .*
|
||||
[^:]*:45: *Info: macro .*
|
||||
[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL ?#2\]'
|
||||
|
||||
@@ -76,9 +76,9 @@
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `cmn.w r0,r15'
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `cmp.w r15,#1'
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `cmp r15,r0'
|
||||
[^:]*:[0-9]+: use of r13 is deprecated
|
||||
[^:]*:[0-9]+: Warning: use of r13 is deprecated
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `cmp r0,r15'
|
||||
[^:]*:[0-9]+: use of r13 is deprecated
|
||||
[^:]*:[0-9]+: Warning: use of r13 is deprecated
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `cmp.n r0,r15'
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `cmp.w r15,r0'
|
||||
[^:]*:[0-9]+: Error: r13 not allowed here -- `cmp.w r0,r13'
|
||||
@@ -147,10 +147,10 @@
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `mov.w r15,r13'
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `mov.w r13,r15'
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `mov.w r15,r15'
|
||||
[^:]*:[0-9]+: Use of r13 as a source register is deprecated when r13 is the destination register.
|
||||
[^:]*:[0-9]+: Use of r13 as a source register is deprecated when r15 is the destination register.
|
||||
[^:]*:[0-9]+: Use of r15 as a source register is deprecated when r13 is the destination register.
|
||||
[^:]*:[0-9]+: Use of r15 as a source register is deprecated when r15 is the destination register.
|
||||
[^:]*:[0-9]+: Warning: Use of r13 as a source register is deprecated when r13 is the destination register.
|
||||
[^:]*:[0-9]+: Warning: Use of r13 as a source register is deprecated when r15 is the destination register.
|
||||
[^:]*:[0-9]+: Warning: Use of r15 as a source register is deprecated when r13 is the destination register.
|
||||
[^:]*:[0-9]+: Warning: Use of r15 as a source register is deprecated when r15 is the destination register.
|
||||
[^:]*:[0-9]+: Error: r13 not allowed here -- `movs r13,r13'
|
||||
[^:]*:[0-9]+: Error: r15 not allowed here -- `movs r15,r13'
|
||||
[^:]*:[0-9]+: Error: r13 not allowed here -- `movs r13,r15'
|
||||
|
||||
@@ -1,33 +1,33 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:438: s suffix on comparison instruction is deprecated
|
||||
[^:]*:438: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:450: *Info: macro .*
|
||||
[^:]*:440: s suffix on comparison instruction is deprecated
|
||||
[^:]*:440: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:450: *Info: macro .*
|
||||
[^:]*:444: s suffix on comparison instruction is deprecated
|
||||
[^:]*:444: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:450: *Info: macro .*
|
||||
[^:]*:445: s suffix on comparison instruction is deprecated
|
||||
[^:]*:445: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:450: *Info: macro .*
|
||||
[^:]*:438: s suffix on comparison instruction is deprecated
|
||||
[^:]*:438: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:451: *Info: macro .*
|
||||
[^:]*:440: s suffix on comparison instruction is deprecated
|
||||
[^:]*:440: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:451: *Info: macro .*
|
||||
[^:]*:444: s suffix on comparison instruction is deprecated
|
||||
[^:]*:444: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:451: *Info: macro .*
|
||||
[^:]*:445: s suffix on comparison instruction is deprecated
|
||||
[^:]*:445: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:451: *Info: macro .*
|
||||
[^:]*:438: s suffix on comparison instruction is deprecated
|
||||
[^:]*:438: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:452: *Info: macro .*
|
||||
[^:]*:440: s suffix on comparison instruction is deprecated
|
||||
[^:]*:440: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:452: *Info: macro .*
|
||||
[^:]*:444: s suffix on comparison instruction is deprecated
|
||||
[^:]*:444: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:452: *Info: macro .*
|
||||
[^:]*:445: s suffix on comparison instruction is deprecated
|
||||
[^:]*:445: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:452: *Info: macro .*
|
||||
[^:]*:438: s suffix on comparison instruction is deprecated
|
||||
[^:]*:438: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:453: *Info: macro .*
|
||||
[^:]*:440: s suffix on comparison instruction is deprecated
|
||||
[^:]*:440: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:453: *Info: macro .*
|
||||
[^:]*:444: s suffix on comparison instruction is deprecated
|
||||
[^:]*:444: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:453: *Info: macro .*
|
||||
[^:]*:445: s suffix on comparison instruction is deprecated
|
||||
[^:]*:445: Warning: s suffix on comparison instruction is deprecated
|
||||
[^:]*:453: *Info: macro .*
|
||||
|
||||
@@ -1,3 +1,3 @@
|
||||
^[^:]*: Assembler messages:
|
||||
^[^:]*:16: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
^[^:]*:21: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
|
||||
^[^:]*:16: Warning: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
|
||||
^[^:]*:21: Warning: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
|
||||
|
||||
@@ -1,3 +1,3 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:6: Use of PC here is deprecated
|
||||
[^:]*:7: Use of PC here is deprecated
|
||||
[^:]*:6: Warning: Use of PC here is deprecated
|
||||
[^:]*:7: Warning: Use of PC here is deprecated
|
||||
|
||||
@@ -1,3 +1,3 @@
|
||||
.*asi-arch-error.s: Assembler messages:
|
||||
.*asi-arch-error.s:3: Error: Architecture mismatch on "ldda \[%g0] ?#ASI_FL16_P,%f0".
|
||||
.*asi-arch-error.s:3: \(Requires v9b\|v9c\|v9d\|v9e\|v9v\|v9m.*; requested architecture is v9.\)
|
||||
.*asi-arch-error.s:3: Warning: \(Requires v9b\|v9c\|v9d\|v9e\|v9v\|v9m.*; requested architecture is v9.\)
|
||||
|
||||
Reference in New Issue
Block a user