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x86/APX: permit wider than 4-bit immediates with V{EXTRACT,INSERT}{F,I}128
These aren't useful, but can be encoded for their AVX forms and hence
should also be permitted for the APX surrogates. Extend the respective
conditional by a base opcode check, to restrict it to VROUND{P,S}{S,D}.
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@@ -8230,7 +8230,9 @@ check_VecOperands (const insn_template *t)
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/* Check the special Imm4 cases; must be the first operand. */
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if ((is_cpu (t, CpuXOP) && t->operands == 5)
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|| (is_cpu (t, CpuAPX_F) && t->opcode_space == SPACE_0F3A))
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|| (t->opcode_space == SPACE_0F3A
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&& (t->base_opcode | 3) == 0x0b
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&& is_cpu (t, CpuAPX_F)))
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{
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if (i.op[0].imms->X_op != O_constant
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|| !fits_in_imm4 (i.op[0].imms->X_add_number))
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