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Remove and modernize dependencies in sim

Browse Source 
Some spots in the sim build used manual dependencies, and some spots
did a compilation by hand but did not use the automatic dependency
tracking code.  This patch fixes these spots.

I didn't touch ppc, because it doesn't use the common Makefile code.
I also didn't touch objects that are for the build machine, because
automatic dependencies don't work for those.

sim/arm/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (armemu26.o, armemu32.o): Use COMPILE and
	POSTCOMPILE.

sim/bpf/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (arch.o, cpu.o, sim-if.o, traps.o): Remove.
	(mloop-le.o, mloop-be.o, decode-le.o, decode-be.o, sim-le.o)
	(sim-be.o): Use COMPILE and POSTCOMPILE.
	(SIM_EXTRA_DEPS): Add eng-le.h, eng-be.h.

sim/cr16/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (SIM_EXTRA_DEPS): New variable.
	(simops.o): Remove.

sim/cris/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (sim-if.o, dv-cris.o, dv-rv.o, arch.o, traps.o)
	(devices.o, crisv10f.o, mloopv10f.o, cpuv10.o, decodev10.o)
	(modelv10.o, crisv32f.o, mloopv32f.o, cpuv32.o, decodev32.o)
	(modelv32.o): Remove.
	(SIM_EXTRA_DEPS): Add engv10.h.

sim/d10v/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (SIM_EXTRA_DEPS): New variable.
	(simops.o): Remove.

sim/frv/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (arch.o, devices.o, frv.o, traps.o, pipeline.o)
	(interrupts.o, memory.o, cache.o, options.o, reset.o)
	(registers.o, profile.o, profile-fr400.o, profile-fr450.o)
	(profile-fr500.o, profile-fr550.o, sim-if.o, mloop.o, cpu.o)
	(decode.o, sem.o, model.o): Remove.
	(SIM_EXTRA_DEPS): Add eng.h.

sim/iq2000/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (sim-if.o): Remove.
	(arch.o): Use COMPILE and POSTCOMPILE.
	(devices.o, iq2000.o, mloop.o, cpu.o, decode.o, sem.o, model.o):
	Remove.
	(SIM_EXTRA_DEPS): Add eng.h.

sim/lm32/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (arch.o, traps.o, sim-if.o, lm32.o, mloop.o)
	(cpu.o, decode.o, sem.o, model.o): Remove.
	(SIM_EXTRA_DEPS): Add eng.h.

sim/m32r/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (sim-if.o, arch.o, traps.o, traps-linux.o)
	(devices.o, m32r.o, mloop.o, cpu.o, decode.o, sem.o, model.o)
	(m32rx.o, mloopx.o, cpux.o, decodex.o, semx.o, modelx.o)
	(m32r2.o, mloop2.o, cpu2.o, decode2.o, sem2.o, model2.o): Remove.
	(SIM_EXTRA_DEPS): Add eng.h, engx.h, eng2.h.

sim/m68hc11/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (interp.o): Remove.

sim/mips/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
	Remove.
	(SIM_EXTRA_DEPS): New variable.

sim/mn10300/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (interp.o): Remove.
	(idecode.o op_utils.o semantics.o): Remove.

sim/or1k/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (mloop.o, arch.o, cpu.o, decode.o, sem.o)
	(sem-switch.o, model.o): Remove.

sim/rl78/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o)
	(reg.o, rl78.o): Remove.

sim/rx/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o)
	(misc.o, reg.o, rx.o, syscalls.o, trace.o): Remove.

sim/sh/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (SIM_EXTRA_DEPS): New variable.
	(interp.o): Remove.

sim/v850/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* Makefile.in (interp.o, simops.o, semantics.o): Remove.
This commit is contained in:
Tom Tromey
2021-04-22 19:51:54 -06:00
parent efd82ac7cb
commit e7d8f1da71
33 changed files with 140 additions and 194 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
sim/arm/ChangeLog
View File

@@ -1,3 +1,8 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (armemu26.o, armemu32.o): Use COMPILE and
POSTCOMPILE.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

10
sim/arm/Makefile.in
View File

@@ -29,8 +29,10 @@ SIM_OBJS = \
## COMMON_POST_CONFIG_FRAG
armemu26.o: armemu.c armdefs.h armemu.h
$(CC) -c $(srcdir)/armemu.c -o armemu26.o $(ALL_CFLAGS)
armemu26.o: armemu.c
$(COMPILE) $(srcdir)/armemu.c
$(POSTCOMPILE)
armemu32.o: armemu.c armdefs.h armemu.h
$(CC) -c $(srcdir)/armemu.c -o armemu32.o -DMODE32 $(ALL_CFLAGS)
armemu32.o: armemu.c
$(COMPILE) -DMODE32 $(srcdir)/armemu.c
$(POSTCOMPILE)

7
sim/bpf/ChangeLog
View File

@@ -1,3 +1,10 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (arch.o, cpu.o, sim-if.o, traps.o): Remove.
(mloop-le.o, mloop-be.o, decode-le.o, decode-be.o, sim-le.o)
(sim-be.o): Use COMPILE and POSTCOMPILE.
(SIM_EXTRA_DEPS): Add eng-le.h, eng-be.h.
2021-04-21 Mike Frysinger <vapier@gentoo.org>
* aclocal.m4: Regenerate.

40
sim/bpf/Makefile.in
View File

@@ -35,6 +35,7 @@ SIM_EXTRA_DEPS = \
$(CGEN_INCLUDE_DEPS) \
arch.h \
bpf-sim.h \
eng-le.h eng-be.h \
$(srcdir)/../../opcodes/bpf-desc.h \
$(srcdir)/../../opcodes/bpf-opc.h
@@ -60,33 +61,26 @@ BPF_INCLUDE_DEPS = \
# Dependencies for binaries from CGEN generated source
arch.o: arch.c $(SIM_MAIN_DEPS)
cpu.o: cpu.c $(BPF_INCLUDE_DEPS)
decode-le.o: decode-le.c $(BPF_INCLUDE_DEPS)
decode-be.o: decode-be.c $(BPF_INCLUDE_DEPS)
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng.h
$(COMPILE) $<
mloop-le.o: mloop-le.c
$(COMPILE) -DWANT_ISA_EBPFLE mloop-le.c
$(POSTCOMPILE)
mloop-be.o: mloop-be.c
$(COMPILE) -DWANT_ISA_EBPFBE mloop-be.c
$(POSTCOMPILE)
traps.o: traps.c $(SIM_MAIN_DEPS) eng.h
$(COMPILE) $<
decode-le.o: decode-le.c
$(COMPILE) -DWANT_ISA_EBPFLE $(srcdir)/decode-le.c
$(POSTCOMPILE)
decode-be.o: decode-be.c $(BPF_INCLUDE_DEPS)
$(COMPILE) -DWANT_ISA_EBPFBE $(srcdir)/decode-be.c
$(POSTCOMPILE)
mloop-le.o: mloop-le.c $(BPF_INCLUDE_DEPS)
$(CC) -c mloop-le.c $(ALL_CFLAGS) -DWANT_ISA_EBPFLE
mloop-be.o: mloop-be.c $(BPF_INCLUDE_DEPS)
$(CC) -c mloop-be.c $(ALL_CFLAGS) -DWANT_ISA_EBPFBE
decode-le.o: decode-le.c $(BPF_INCLUDE_DEPS)
$(CC) -c $(srcdir)/decode-le.c $(ALL_CFLAGS) -DWANT_ISA_EBPFLE
decode-be.o: decode-be.c $(BPF_INCLUDE_DEPS)
$(CC) -c $(srcdir)/decode-be.c $(ALL_CFLAGS) -DWANT_ISA_EBPFBE
sem-le.o: sem-le.c $(BPF_INCLUDE_DEPS)
$(CC) -c $(srcdir)/sem-le.c $(ALL_CFLAGS) -DWANT_ISA_EBPFLE
sem-be.o: sem-be.c $(BPF_INCLUDE_DEPS)
$(CC) -c $(srcdir)/sem-be.c $(ALL_CFLAGS) -DWANT_ISA_EBPFBE
sem-le.o: sem-le.c
$(COMPILE) -DWANT_ISA_EBPFLE $(srcdir)/sem-le.c
$(POSTCOMPILE)
sem-be.o: sem-be.c
$(COMPILE) -DWANT_ISA_EBPFBE $(srcdir)/sem-be.c
$(POSTCOMPILE)
arch = bpf

5
sim/cr16/ChangeLog
View File

@@ -1,3 +1,8 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (SIM_EXTRA_DEPS): New variable.
(simops.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

4
sim/cr16/Makefile.in
View File

@@ -25,6 +25,8 @@ SIM_OBJS = \
simops.o
SIM_EXTRA_CLEAN = clean-extra
SIM_EXTRA_DEPS = simops.h
INCLUDE = cr16_sim.h $(srcroot)/include/gdb/callback.h targ-vals.h \
$(srcroot)/include/gdb/sim-cr16.h
@@ -33,8 +35,6 @@ NL_TARGET = -DNL_TARGET_cr16
## COMMON_POST_CONFIG_FRAG
simops.o: simops.h
simops.h: gencode
./gencode -h >$@

8
sim/cris/ChangeLog
View File

@@ -1,3 +1,11 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (sim-if.o, dv-cris.o, dv-rv.o, arch.o, traps.o)
(devices.o, crisv10f.o, mloopv10f.o, cpuv10.o, decodev10.o)
(modelv10.o, crisv32f.o, mloopv32f.o, cpuv32.o, decodev32.o)
(modelv32.o): Remove.
(SIM_EXTRA_DEPS): Add engv10.h.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

29
sim/cris/Makefile.in
View File

@@ -36,7 +36,7 @@ SIM_OBJS = \
# FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
SIM_EXTRA_DEPS = \
$(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
arch.h cpuall.h cris-sim.h cris-desc.h
arch.h cpuall.h cris-sim.h cris-desc.h engv10.h
SIM_EXTRA_CLEAN = cris-clean
@@ -47,19 +47,6 @@ NL_TARGET = -DNL_TARGET_cris
arch = cris
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h)
# Needs CPU-specific knowledge.
dv-cris.o: dv-cris.c $(SIM_MAIN_DEPS) $(sim-core_h)
# This is the same rule as dv-core.o etc.
dv-rv.o: dv-rv.c $(hw_main_headers) $(sim_main_headers)
arch.o: arch.c $(SIM_MAIN_DEPS)
traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) $(sim-options_h)
devices.o: devices.c $(SIM_MAIN_DEPS)
# rvdummy is just used for testing. It does nothing if
# --enable-sim-hardware isn't active.
@@ -78,8 +65,6 @@ CRISV10F_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpuv10.h decodev10.h engv10.h
crisv10f.o: crisv10f.c cris-tmpl.c $(CRISV10F_INCLUDE_DEPS)
# FIXME: What is mono and what does "Use of `mono' is wip" mean (other
# than the apparent; some "mono" feature is work in progress)?
mloopv10f.c engv10.h: stamp-v10fmloop
@@ -90,11 +75,6 @@ stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
$(SHELL) $(srcroot)/move-if-change eng.hin engv10.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c
touch stamp-v10fmloop
mloopv10f.o: mloopv10f.c semcrisv10f-switch.c $(CRISV10F_INCLUDE_DEPS)
cpuv10.o: cpuv10.c $(CRISV10F_INCLUDE_DEPS)
decodev10.o: decodev10.c $(CRISV10F_INCLUDE_DEPS)
modelv10.o: modelv10.c $(CRISV10F_INCLUDE_DEPS)
# CRISV32 objs
@@ -102,8 +82,6 @@ CRISV32F_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpuv32.h decodev32.h engv32.h
crisv32f.o: crisv32f.c cris-tmpl.c $(CRISV32F_INCLUDE_DEPS)
# FIXME: What is mono and what does "Use of `mono' is wip" mean (other
# than the apparent; some "mono" feature is work in progress)?
mloopv32f.c engv32.h: stamp-v32fmloop
@@ -116,11 +94,6 @@ stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefi
$(SHELL) $(srcroot)/move-if-change eng.hin engv32.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c
touch stamp-v32fmloop
mloopv32f.o: mloopv32f.c semcrisv32f-switch.c $(CRISV32F_INCLUDE_DEPS)
cpuv32.o: cpuv32.c $(CRISV32F_INCLUDE_DEPS)
decodev32.o: decodev32.c $(CRISV32F_INCLUDE_DEPS)
modelv32.o: modelv32.c $(CRISV32F_INCLUDE_DEPS)
cris-clean:
for v in 10 32; do \

5
sim/d10v/ChangeLog
View File

@@ -1,3 +1,8 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (SIM_EXTRA_DEPS): New variable.
(simops.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

4
sim/d10v/Makefile.in
View File

@@ -26,6 +26,8 @@ SIM_OBJS = \
endian.o
SIM_EXTRA_CLEAN = clean-extra
SIM_EXTRA_DEPS = simops.h
INCLUDE = d10v_sim.h $(srcroot)/include/gdb/callback.h targ-vals.h endian.c \
$(srcroot)/include/gdb/sim-d10v.h
@@ -34,8 +36,6 @@ NL_TARGET = -DNL_TARGET_d10v
## COMMON_POST_CONFIG_FRAG
simops.o: simops.h
simops.h: gencode
./gencode -h >$@

9
sim/frv/ChangeLog
View File

@@ -1,3 +1,12 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (arch.o, devices.o, frv.o, traps.o, pipeline.o)
(interrupts.o, memory.o, cache.o, options.o, reset.o)
(registers.o, profile.o, profile-fr400.o, profile-fr450.o)
(profile-fr500.o, profile-fr550.o, sim-if.o, mloop.o, cpu.o)
(decode.o, sem.o, model.o): Remove.
(SIM_EXTRA_DEPS): Add eng.h.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

29
sim/frv/Makefile.in
View File

@@ -33,7 +33,7 @@ SIM_OBJS = \
SIM_EXTRA_DEPS = \
$(CGEN_INCLUDE_DEPS) \
arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
registers.h profile.h \
registers.h profile.h eng.h \
$(sim-options_h)
SIM_EXTRA_CFLAGS = @sim_trapdump@
@@ -47,10 +47,6 @@ NL_TARGET = -DNL_TARGET_frv
arch = frv
arch.o: arch.c $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)
# FRV objs
FRVBF_INCLUDE_DEPS = \
@@ -58,23 +54,6 @@ FRVBF_INCLUDE_DEPS = \
$(SIM_EXTRA_DEPS) \
cpu.h decode.h eng.h
frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
options.o: options.c $(FRVBF_INCLUDE_DEPS)
reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS)
profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS)
profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS)
sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h
# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
@@ -84,12 +63,6 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
touch stamp-mloop
mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)
cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
model.o: model.c $(FRVBF_INCLUDE_DEPS)
frv-clean:
rm -f mloop.c eng.h stamp-mloop

8
sim/iq2000/ChangeLog
View File

@@ -1,3 +1,11 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (sim-if.o): Remove.
(arch.o): Use COMPILE and POSTCOMPILE.
(devices.o, iq2000.o, mloop.o, cpu.o, decode.o, sem.o, model.o):
Remove.
(SIM_EXTRA_DEPS): Add eng.h.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

19
sim/iq2000/Makefile.in
View File

@@ -32,7 +32,7 @@ SIM_OBJS = \
# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
$(CGEN_INCLUDE_DEPS) \
arch.h cpuall.h $(srcdir)/../../opcodes/iq2000-desc.h
arch.h cpuall.h $(srcdir)/../../opcodes/iq2000-desc.h eng.h
SIM_EXTRA_CFLAGS =
@@ -44,12 +44,9 @@ SIM_EXTRA_CLEAN = iq2000-clean
arch = iq2000
sim-if.o: $(srcdir)/sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
arch.o: arch.c $(SIM_MAIN_DEPS)
$(CC) -c $(srcdir)/arch.c $(ALL_CFLAGS) -UHAVE_CPU_IQ10BF
devices.o: $(srcdir)/devices.c $(SIM_MAIN_DEPS)
arch.o: arch.c
$(COMPILE) -UHAVE_CPU_IQ10BF $(srcdir)/arch.c
$(POSTCOMPILE)
# IQ2000 objs
@@ -57,8 +54,6 @@ IQ2000BF_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpu.h decode.h eng.h
iq2000.o: $(srcdir)/iq2000.c $(IQ2000BF_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
@@ -68,12 +63,6 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
touch stamp-mloop
mloop.o: mloop.c $(srcdir)/sem-switch.c $(IQ2000BF_INCLUDE_DEPS)
cpu.o: $(srcdir)/cpu.c $(IQ2000BF_INCLUDE_DEPS)
decode.o: $(srcdir)/decode.c $(IQ2000BF_INCLUDE_DEPS)
sem.o: $(srcdir)/sem.c $(IQ2000BF_INCLUDE_DEPS)
model.o: $(srcdir)/model.c $(IQ2000BF_INCLUDE_DEPS)
iq2000-clean:
rm -f mloop.c eng.h stamp-mloop

6
sim/lm32/ChangeLog
View File

@@ -1,3 +1,9 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (arch.o, traps.o, sim-if.o, lm32.o, mloop.o)
(cpu.o, decode.o, sem.o, model.o): Remove.
(SIM_EXTRA_DEPS): Add eng.h.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

17
sim/lm32/Makefile.in
View File

@@ -14,7 +14,8 @@ SIM_OBJS = \
# List of extra dependencies.
# Generally this consists of simulator specific files included by sim-main.h.
SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h
SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h \
eng.h
# List of flags to always pass to $(CC).
#SIM_EXTRA_CFLAGS =
@@ -28,18 +29,10 @@ NL_TARGET = -DNL_TARGET_lm32
arch = lm32
arch.o: arch.c $(SIM_MAIN_DEPS)
traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
LM32BF_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpu.h decode.h eng.h
lm32.o: lm32.c $(LM32BF_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
@@ -49,12 +42,6 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
touch stamp-mloop
mloop.o: mloop.c sem-switch.c
cpu.o: cpu.c $(LM32BF_INCLUDE_DEPS)
decode.o: decode.c $(LM32BF_INCLUDE_DEPS)
sem.o: sem.c $(LM32BF_INCLUDE_DEPS)
model.o: model.c $(LM32BF_INCLUDE_DEPS)
lm32-clean:
rm -f mloop.c eng.h stamp-mloop

8
sim/m32r/ChangeLog
View File

@@ -1,3 +1,11 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (sim-if.o, arch.o, traps.o, traps-linux.o)
(devices.o, m32r.o, mloop.o, cpu.o, decode.o, sem.o, model.o)
(m32rx.o, mloopx.o, cpux.o, decodex.o, semx.o, modelx.o)
(m32r2.o, mloop2.o, cpu2.o, decode2.o, sem2.o, model2.o): Remove.
(SIM_EXTRA_DEPS): Add eng.h, engx.h, eng2.h.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

35
sim/m32r/Makefile.in
View File

@@ -37,7 +37,8 @@ SIM_OBJS = \
# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
$(CGEN_INCLUDE_DEPS) \
arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h \
eng.h engx.h eng2.h
SIM_EXTRA_CFLAGS = @sim_extra_cflags@
@@ -50,22 +51,12 @@ NL_TARGET = -DNL_TARGET_m32r
arch = m32r
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
arch.o: arch.c $(SIM_MAIN_DEPS)
traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
devices.o: devices.c $(SIM_MAIN_DEPS)
# M32R objs
M32RBF_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpu.h decode.h eng.h
m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop ; @true
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
@@ -75,12 +66,6 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
touch stamp-mloop
mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
model.o: model.c $(M32RBF_INCLUDE_DEPS)
# M32RX objs
@@ -88,8 +73,6 @@ M32RXF_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpux.h decodex.h engx.h
m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
mloopx.c engx.h: stamp-xmloop ; @true
stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
@@ -100,12 +83,6 @@ stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
$(SHELL) $(srcroot)/move-if-change engx.hin engx.h
$(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
touch stamp-xmloop
mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
# M32R2 objs
@@ -113,8 +90,6 @@ M32R2F_INCLUDE_DEPS = \
$(CGEN_MAIN_CPU_DEPS) \
cpu2.h decode2.h eng2.h
m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
mloop2.c eng2.h: stamp-2mloop ; @true
stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
@@ -126,12 +101,6 @@ stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
$(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
touch stamp-2mloop
mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
m32r-clean:
rm -f mloop.c eng.h stamp-mloop
rm -f mloopx.c engx.h stamp-xmloop

4
sim/m68hc11/ChangeLog
View File

@@ -1,3 +1,7 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (interp.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

2
sim/m68hc11/Makefile.in
View File

@@ -54,7 +54,5 @@ gencode.o: gencode.c
gencode: gencode.o
$(LINK_FOR_BUILD) $^
interp.o: interp.c $(INCLUDE)
clean-extra:
rm -f gencode m68hc11int.c

6
sim/mips/ChangeLog
View File

@@ -1,3 +1,9 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
Remove.
(SIM_EXTRA_DEPS): New variable.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

11
sim/mips/Makefile.in
View File

@@ -83,18 +83,11 @@ all: $(SIM_@sim_gen@_ALL)
SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
SIM_EXTRA_DEPS = itable.h
## COMMON_POST_CONFIG_FRAG
interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
m16run.o: sim-main.h m16_idecode.h m32_idecode.h m16run.c $(SIM_EXTRA_DEPS)
micromipsrun.o: sim-main.h micromips16_idecode.h micromips32_idecode.h \
micromips_m32_idecode.h micromipsrun.c $(SIM_EXTRA_DEPS)
multi-run.o: multi-include.h tmp-mach-multi
IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
IGEN_INSN=$(srcdir)/mips.igen
IGEN_DC=$(srcdir)/mips.dc

5
sim/mn10300/ChangeLog
View File

@@ -1,3 +1,8 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (interp.o): Remove.
(idecode.o op_utils.o semantics.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

4
sim/mn10300/Makefile.in
View File

@@ -39,8 +39,6 @@ SIM_EXTRA_CFLAGS = -DPOLL_QUIT_INTERVAL=0x20
## COMMON_POST_CONFIG_FRAG
idecode.o op_utils.o semantics.o: targ-vals.h
BUILT_SRC_FROM_IGEN = \
icache.h \
icache.c \
@@ -110,5 +108,3 @@ tmp-igen: $(IGEN_INSN) $(IGEN_INSN_INC) $(IGEN_DC) ../igen/igen
$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
touch tmp-igen
interp.o: interp.c $(INCLUDE)

5
sim/or1k/ChangeLog
View File

@@ -1,3 +1,8 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (mloop.o, arch.o, cpu.o, decode.o, sem.o)
(sem-switch.o, model.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

7
sim/or1k/Makefile.in
View File

@@ -75,16 +75,9 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
touch stamp-mloop
mloop.o: mloop.c sem-switch.c $(OR1K32BF_INCLUDE_DEPS)
or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS)
$(COMPILE) $<
$(POSTCOMPILE)
arch.o: arch.c $(SIM_MAIN_DEPS)
cpu.o: cpu.c $(OR1K32BF_INCLUDE_DEPS)
decode.o: decode.c $(OR1K32BF_INCLUDE_DEPS)
sem.o: sem.c $(OR1K32BF_INCLUDE_DEPS)
sem-switch.o: sem-switch.c $(OR1K32BF_INCLUDE_DEPS)
model.o: model.c $(OR1K32BF_INCLUDE_DEPS)
sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng.h
$(COMPILE) $<

5
sim/rl78/ChangeLog
View File

@@ -1,3 +1,8 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o)
(reg.o, rl78.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

5
sim/rx/ChangeLog
View File

@@ -1,3 +1,8 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o)
(misc.o, reg.o, rx.o, syscalls.o, trace.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

16
sim/rx/Makefile.in
View File

@@ -47,19 +47,3 @@ LIBS = $B/bfd/libbfd.a $B/libiberty/libiberty.a
## COMMON_POST_CONFIG_FRAG
arch = rx
err.o : err.h
fpu.o : cpu.h fpu.h
gdb-if.o : cpu.h mem.h load.h syscalls.h err.h \
$(srcdir)/../../include/gdb/callback.h \
$(srcdir)/../../include/gdb/remote-sim.h \
$(srcdir)/../../include/gdb/signals.h \
$(srcdir)/../../include/gdb/sim-rx.h
load.o : ../../bfd/bfd.h cpu.h mem.h
main.o : ../../bfd/bfd.h cpu.h mem.h misc.h load.h trace.h err.h
mem.o : mem.h cpu.h syscalls.h misc.h err.h
misc.o : cpu.h misc.h
reg.o : cpu.h trace.h
rx.o : $(srcdir)/../../include/opcode/rx.h cpu.h mem.h syscalls.h fpu.h
syscalls.o : $(srcdir)/../../include/gdb/callback.h cpu.h mem.h syscalls.h
trace.o : ../../bfd/bfd.h $(srcdir)/../../include/dis-asm.h cpu.h mem.h load.h

5
sim/sh/ChangeLog
View File

@@ -1,3 +1,8 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (SIM_EXTRA_DEPS): New variable.
(interp.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

3
sim/sh/Makefile.in
View File

@@ -26,11 +26,10 @@ SIM_OBJS = \
table.o
SIM_EXTRA_LIBS = -lm
SIM_EXTRA_CLEAN = sh-clean
SIM_EXTRA_DEPS = table.c code.c ppi.c
## COMMON_POST_CONFIG_FRAG
interp.o: interp.c code.c table.c ppi.c $(srcroot)/include/gdb/sim-sh.h
code.c: gencode
./gencode -x >code.c
# indent code.c

4
sim/v850/ChangeLog
View File

@@ -1,3 +1,7 @@
2021-04-22 Tom Tromey <tom@tromey.com>
* Makefile.in (interp.o, simops.o, semantics.o): Remove.
2021-04-22 Tom Tromey <tom@tromey.com>
* configure: Rebuild.

4
sim/v850/Makefile.in
View File

@@ -110,7 +110,3 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen
clean-extra: clean-igen
rm -f table.c simops.h gencode
interp.o: interp.c $(INCLUDE)
simops.o: simops.c simops.h $(INCLUDE) targ-vals.h
semantics.o: $(INCLUDE)