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i386: Clear vex instead of vex.evex

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"vex" has many fields to control how to decode an instruction.  Clear
all fields in "vex" before decoding an instruction to avoid using values
left from the previous instruction.

gas/

	PR binutils/23025
	* testsuite/gas/i386/prefix.s: Add tests for vcvtpd2dq with
	VEX and EVEX prefixes.
	* testsuite/gas/i386/prefix.d: Updated.

opcodes/

	PR binutils/23025
	* i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
	to 0.
	(print_insn): Clear vex instead of vex.evex.
This commit is contained in:
H.J. Lu
2018-04-04 04:36:44 -07:00
parent 142b7a144b
commit caf0678c84
5 changed files with 22 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
gas/ChangeLog
View File

@@ -1,3 +1,10 @@
2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/23025
* testsuite/gas/i386/prefix.s: Add tests for vcvtpd2dq with
VEX and EVEX prefixes.
* testsuite/gas/i386/prefix.d: Updated.
2018-03-30 Peter Bergner <bergner@vnet.ibm.com>
PR binutils/23013

3
gas/testsuite/gas/i386/prefix.d
View File

@@ -72,5 +72,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: f2 0f c7 \(bad\)
[ ]*[a-f0-9]+: f0 90 lock nop
[ ]*[a-f0-9]+: c5 fb e6 40 20 vcvtpd2dqx 0x20\(%eax\),%xmm0
[ ]*[a-f0-9]+: 62 f1 ff 18 e6 40 04 vcvtpd2dq 0x20\(%eax\)\{1to2\},%xmm0
[ ]*[a-f0-9]+: c5 fb e6 40 20 vcvtpd2dqx 0x20\(%eax\),%xmm0
...
#pass

4
gas/testsuite/gas/i386/prefix.s
View File

@@ -391,5 +391,9 @@
nop
vcvtpd2dqx 0x20(%eax),%xmm0
vcvtpd2dq 0x20(%eax){1to2},%xmm0
vcvtpd2dqx 0x20(%eax),%xmm0
# Get a good alignment.
.p2align 4,0

7
opcodes/ChangeLog
View File

@@ -1,3 +1,10 @@
2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/23025
* i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
to 0.
(print_insn): Clear vex instead of vex.evex.
2018-04-04 Nick Clifton <nickc@redhat.com>
* po/es.po: Updated Spanish translation.

7
opcodes/i386-dis.c
View File

@@ -12826,7 +12826,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
switch ((*codep & 0x3))
{
case 0:
vex.prefix = 0;
break;
case 1:
vex.prefix = DATA_PREFIX_OPCODE;
@@ -12891,7 +12890,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
switch ((*codep & 0x3))
{
case 0:
vex.prefix = 0;
break;
case 1:
vex.prefix = DATA_PREFIX_OPCODE;
@@ -12929,12 +12927,10 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
/* For the 2-byte VEX prefix in 32-bit mode, the highest bit in
VEX.vvvv is 1. */
vex.register_specifier = (~(*codep >> 3)) & 0xf;
vex.w = 0;
vex.length = (*codep & 0x4) ? 256 : 128;
switch ((*codep & 0x3))
{
case 0:
vex.prefix = 0;
break;
case 1:
vex.prefix = DATA_PREFIX_OPCODE;
@@ -13009,7 +13005,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
switch ((*codep & 0x3))
{
case 0:
vex.prefix = 0;
break;
case 1:
vex.prefix = DATA_PREFIX_OPCODE;
@@ -13367,7 +13362,7 @@ print_insn (bfd_vma pc, disassemble_info *info)
need_vex = 0;
need_vex_reg = 0;
vex_w_done = 0;
vex.evex = 0;
memset (&vex, 0, sizeof (vex));
if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
{