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AArch64: Fix SME za register description

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Peter Maydell and Vacha Bhavsar pointed out that we have an incorrect
description of the SME za register in the documentation.  It is currently
described as a vector of SVL x SVL bytes, but that is incorrect.

What we really have is a 2-dimensional array of bytes, with each dimension
having size SVL.

Change the documentation to reflect that.

Approved-By: Eli Zaretskii <eliz@gnu.org>
This commit is contained in:
Luis Machado
2025-10-11 11:43:48 +01:00
parent 37ffcc8891
commit b1d1eb8ef5
1 changed files with 2 additions and 2 deletions
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gdb/doc/gdb.texinfo
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@@ -49789,8 +49789,8 @@ it should contain registers @code{ZA}, @code{SVG} and @code{SVCR}.
@itemize @minus
@item
@code{ZA} is a register represented by a vector of @var{svl}x@var{svl}
bytes. @xref{svl}.
@code{ZA} is a register represented by a 2-dimensional array of bytes, with each
dimension having size @var{svl}. @xref{svl}.
@item
@code{SVG} is a 64-bit register containing the value of @var{svg}. @xref{svg}.