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sim: riscv: Make stack 16-byte aligned

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Various gcc test cases fail due to the stack
alignment of 16 bytes is expected by gcc,
causing issues mostly with vararg functions,
e.g.

FAIL: gcc.c-torture/execute/nest-align-1.c   -O0  execution test
FAIL: gcc.c-torture/execute/nest-stdar-1.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-12.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-15.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-16.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-17.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-20.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-26.c   -O0  execution test
...

Approved-By: Andrew Burgess <aburgess@redhat.com>
This commit is contained in:
Bernd Edlinger
2024-04-10 13:34:21 +02:00
parent ae14cde6fd
commit a73073dc7f
1 changed files with 2 additions and 0 deletions
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2
sim/riscv/sim-main.c
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@@ -1575,6 +1575,8 @@ initialize_env (SIM_DESC sd, const char * const *argv, const char * const *env)
sp = sp_flat - ((argc + 1 + envc + 1) * sizeof (address_word));
/* Then the argc. */
sp -= sizeof (unsigned_word);
/* Align to 16 bytes. */
sp = align_down (sp, 16);
/* Set up the regs the libgloss crt0 expects. */
riscv_cpu->a0 = argc;