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gdb: Add XMM16-XMM31 and K0-K1 DWARF register number mapping

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Add XMM16-XMM31 and K0-K1 DWARF register number mapping to
amd64_dwarf_regmap.

Reviewed-By: Felix Willgerodt <felix.willgerodt@intel.com>
Approved-By: John Baldwin <jhb@FreeBSD.org>
This commit is contained in:
H.J. Lu
2024-02-14 07:40:12 -08:00
parent b33d2d3f11
commit 97f2a34ed1
1 changed files with 22 additions and 1 deletions
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23
gdb/amd64-tdep.c
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@@ -235,7 +235,28 @@ static int amd64_dwarf_regmap[] =
/* Floating Point Control Registers. */
AMD64_MXCSR_REGNUM,
AMD64_FCTRL_REGNUM,
AMD64_FSTAT_REGNUM
AMD64_FSTAT_REGNUM,
/* XMM16-XMM31. */
AMD64_XMM16_REGNUM + 0, AMD64_XMM16_REGNUM + 1,
AMD64_XMM16_REGNUM + 2, AMD64_XMM16_REGNUM + 3,
AMD64_XMM16_REGNUM + 4, AMD64_XMM16_REGNUM + 5,
AMD64_XMM16_REGNUM + 6, AMD64_XMM16_REGNUM + 7,
AMD64_XMM16_REGNUM + 8, AMD64_XMM16_REGNUM + 9,
AMD64_XMM16_REGNUM + 10, AMD64_XMM16_REGNUM + 11,
AMD64_XMM16_REGNUM + 12, AMD64_XMM16_REGNUM + 13,
AMD64_XMM16_REGNUM + 14, AMD64_XMM16_REGNUM + 15,
/* Reserved. */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
/* Mask Registers. */
AMD64_K0_REGNUM + 0, AMD64_K0_REGNUM + 1,
AMD64_K0_REGNUM + 2, AMD64_K0_REGNUM + 3,
AMD64_K0_REGNUM + 4, AMD64_K0_REGNUM + 5,
AMD64_K0_REGNUM + 6, AMD64_K0_REGNUM + 7
};
static const int amd64_dwarf_regmap_len =