aarch64: Add FEAT_MPAMv2_VID system registers

This patch adds the system registers defined by
FEAT_MPAMv2_VID. These registers are:

   *mpamvidcr_el2
   *mpamvidsr_el2
   *mpamvidsr_el3
This commit is contained in:
Richard Ball
2026-01-16 12:16:03 +00:00
parent c810cfe842
commit 5fc6b09c07
5 changed files with 38 additions and 0 deletions

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@@ -0,0 +1,3 @@
#as: -march=armv9.4-a -menable-sysreg-checking -I$srcdir/$subdir
#source: mpamv2_vid.s
#error_output: mpamv2_vid-bad.l

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@@ -0,0 +1,13 @@
.*: Assembler messages:
.*: Error: selected processor does not support system register name 'mpamvidcr_el2'
.*: Info: macro invoked from here
.*: Error: selected processor does not support system register name 'mpamvidcr_el2'
.*: Info: macro invoked from here
.*: Error: selected processor does not support system register name 'mpamvidsr_el2'
.*: Info: macro invoked from here
.*: Error: selected processor does not support system register name 'mpamvidsr_el2'
.*: Info: macro invoked from here
.*: Error: selected processor does not support system register name 'mpamvidsr_el3'
.*: Info: macro invoked from here
.*: Error: selected processor does not support system register name 'mpamvidsr_el3'
.*: Info: macro invoked from here

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@@ -0,0 +1,14 @@
#as: -menable-sysreg-checking -march=armv8-a+mpamv2 -I$srcdir/$subdir
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0+ <.*>:
.*: d51ca700 msr mpamvidcr_el2, x0
.*: d53ca700 mrs x0, mpamvidcr_el2
.*: d51ca720 msr mpamvidsr_el2, x0
.*: d53ca720 mrs x0, mpamvidsr_el2
.*: d51ea720 msr mpamvidsr_el3, x0
.*: d53ea720 mrs x0, mpamvidsr_el3

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@@ -0,0 +1,5 @@
.include "sysreg-test-utils.inc"
rw_sys_reg mpamvidcr_el2
rw_sys_reg mpamvidsr_el2
rw_sys_reg mpamvidsr_el3

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@@ -929,6 +929,9 @@
SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), 0, AARCH64_FEATURES (2, SME, V8_2A)) /* SME && MPAM */
SYSREG ("mpamvidcr_el2", CPENC (3,4,10,7,0), 0, AARCH64_FEATURE (MPAMv2))
SYSREG ("mpamvidsr_el2", CPENC (3,4,10,7,1), 0, AARCH64_FEATURE (MPAMv2))
SYSREG ("mpamvidsr_el3", CPENC (3,6,10,7,1), 0, AARCH64_FEATURE (MPAMv2))
SYSREG ("mpamvpm0_el2", CPENC (3,4,10,6,0), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamvpm1_el2", CPENC (3,4,10,6,1), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */
SYSREG ("mpamvpm2_el2", CPENC (3,4,10,6,2), 0, AARCH64_FEATURE (V8_2A)) /* MPAM */