sim: mips: trim redundant igen settings

These variables are setting the same value as the defaults.  Trim
this redundant logic to make it easier to see the real differences
so we can try to keep unifying cases.
This commit is contained in:
Mike Frysinger
2022-12-22 21:28:16 -05:00
parent 022e1fb26c
commit 3841a73a27
2 changed files with 0 additions and 18 deletions

9
sim/mips/configure vendored
View File

@@ -1850,8 +1850,6 @@ case "${target}" in
mips64vr41*) sim_gen=M16
sim_igen_machine="-M vr4100"
sim_m16_machine="-M vr4100"
sim_igen_filter="32,64,f"
sim_m16_filter="16"
;;
mips64*)
sim_gen=MULTI
@@ -1872,8 +1870,6 @@ case "${target}" in
sim_multi_default=mipsisa64r2
;;
mips16*) sim_gen=M16
sim_igen_filter="32,64,f"
sim_m16_filter="16"
;;
mipsisa32r2*) sim_gen=MULTI
sim_multi_configs="\
@@ -1893,26 +1889,21 @@ case "${target}" in
mipsisa64r2*) sim_gen=M16
sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
sim_m16_machine="-M mips16,mips16e,mips64r2"
sim_igen_filter="32,64,f"
;;
mipsisa64r6*) sim_gen=IGEN
sim_igen_machine="-M mips64r6"
sim_igen_filter="32,64,f"
;;
mipsisa64sb1*) sim_gen=IGEN
sim_igen_machine="-M mips64,mips3d,sb1"
sim_igen_filter="32,64,f"
;;
mipsisa64*) sim_gen=M16
sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
sim_m16_machine="-M mips16,mips16e,mips64"
sim_igen_filter="32,64,f"
;;
mips*lsi*) sim_gen=M16
sim_igen_machine="-M mipsIII,mips16"
sim_m16_machine="-M mips16,mipsIII"
sim_igen_filter="32,f"
sim_m16_filter="16"
;;
mips*) sim_gen=IGEN
sim_igen_filter="32,f"

View File

@@ -23,8 +23,6 @@ case "${target}" in
mips64vr41*) sim_gen=M16
sim_igen_machine="-M vr4100"
sim_m16_machine="-M vr4100"
sim_igen_filter="32,64,f"
sim_m16_filter="16"
;;
mips64*)
sim_gen=MULTI
@@ -45,8 +43,6 @@ case "${target}" in
sim_multi_default=mipsisa64r2
;;
mips16*) sim_gen=M16
sim_igen_filter="32,64,f"
sim_m16_filter="16"
;;
mipsisa32r2*) sim_gen=MULTI
sim_multi_configs="\
@@ -66,26 +62,21 @@ case "${target}" in
mipsisa64r2*) sim_gen=M16
sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
sim_m16_machine="-M mips16,mips16e,mips64r2"
sim_igen_filter="32,64,f"
;;
mipsisa64r6*) sim_gen=IGEN
sim_igen_machine="-M mips64r6"
sim_igen_filter="32,64,f"
;;
mipsisa64sb1*) sim_gen=IGEN
sim_igen_machine="-M mips64,mips3d,sb1"
sim_igen_filter="32,64,f"
;;
mipsisa64*) sim_gen=M16
sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
sim_m16_machine="-M mips16,mips16e,mips64"
sim_igen_filter="32,64,f"
;;
mips*lsi*) sim_gen=M16
sim_igen_machine="-M mipsIII,mips16"
sim_m16_machine="-M mips16,mipsIII"
sim_igen_filter="32,f"
sim_m16_filter="16"
;;
mips*) sim_gen=IGEN
sim_igen_filter="32,f"