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636 Commits

Author SHA1 Message Date
Yuhui.Zheng
88e32327e9 version bump to v10.3.1 (#16)
* Verion bump from 10.3.0 to 10.3.1.
* version bump in task.h
* change history for 10.3.1.
2020-02-18 22:03:54 -08:00
Yuhui.Zheng
87beba4a4a Removing License/license.txt and add LICENSE under root. (#12) 2020-02-17 09:52:58 -08:00
Yuhui.Zheng
08c9c9151a Replacing readme.txt with README.md. (#11) 2020-02-16 13:18:58 -08:00
Yuhui.Zheng
10bbbcf0b9 Correct the xTimerCreate() documentation which said NULL was returned if the timer period was passed into the function as 0, whereas that is not the case. (#10)
Add a note to the documentation for both the xTimerCreate() and xTimerCreateStatic() functions that the timer period must be greater than 0.
2020-02-14 12:16:10 -08:00
Yuhui Zheng
210b1ffcc8 Re-sync with upstream and stripping away none kernel related. 2020-02-10 13:45:57 -08:00
Richard Barry
9c0c37ab9b Added back some TCP/IP stack port layer files. 2020-02-07 21:51:48 +00:00
Richard Barry
7cf721ccf7 2020-02-07 21:49:55 +00:00
Yuhui.Zheng
589dd9f149 Update version number in readiness for V10.3.0 release. Sync SVN with reviewed release candidate. 2020-02-07 20:14:50 +00:00
Yuhui.Zheng
f988394e0d Fix spelling issues. 2020-02-07 19:19:47 +00:00
Richard Barry
28efb5449c Add "is inside interrupt" function to MPU ports.
Make clock setup functions weak symbols in ARMv8-M ports.
Update Cortex-M33 ports to use an interrupt mask in place of globally disabling interrupts, as per the other Cortex-M ports.
2020-02-07 01:56:25 +00:00
Richard Barry
8e5addee1e Update TCP to last release versions in preparation for kernel V10.3.0 release. 2020-02-06 22:45:37 +00:00
Richard Barry
7bea399061 Update libraries and sundry check-ins ready for the V10.3.0 kernel release. 2020-02-06 18:52:35 +00:00
Yuhui.Zheng
d319bb0c71 ESP GCC port -- Added LoadStore Exception handlers.
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/9 -- Handles LoadStoreErrorCause and LoadStoreAlignmentCause allowing to use 32-bit memory region (IRAM) as 8-bit or 16-bit memory region
2020-01-31 19:31:50 +00:00
Yuhui.Zheng
9fdfbf33e9 Sync FreeRTOS-Labs -CLI -TCP -Trace with the version in FreeRTOS-Plus.
Projects under FreeRTOS-Labs directory are in beta, developers updating projects please make sure you are using the correct version of -CLI -TCP -Trace. If you must edit -CLI -TCP and -Trace, please ensure the copies are synced.
2020-01-31 19:21:15 +00:00
Yuhui.Zheng
ec6f3d77c3 Sync FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP with the version in GitHub at (23665258cabe49d5d68ba23968b6845a7c80eb34).
Notes: 
- header has version 2.2.0. 
- This sync did not bring in ./test directory, though we should. 
- New NetworkInterfaces are introduced by this merge.
- Keil compiler support. 
- FreeRTOS_IP.h new API xApplicationGetRandomNumber().
- FreeRTOS_IP_Private.h new eIPEvent_t eNetworkTxEvent. 
- FreeRTOS_Stream_Buffer.h removing static xStreamBufferIsEmpty() and xStreamBufferIsFull().
- FreeRTOSConfigDefaults.h provides default ipconfigDNS_RECEIVE_BLOCK_TIME_TICKS. 
- other type changes.
2020-01-31 00:07:53 +00:00
Yuhui.Zheng
0c1c85a9dd Removing RISC-V port under ThirdParty.
RISC-V ports for IAR and GCC can now be found under \FreeRTOS\Source\portable\GCC\RISC-V and \FreeRTOS\Source\portable\IAR\RISC-V.
2020-01-30 22:23:03 +00:00
Yuhui.Zheng
99e796eb01 Removing unnecessary ThirdParty ports -- Wiced_CY and nrf52840-dk.
For projects depending on either of these two ports, please update your projects according to below:
Wiced_CY -- Use GCC/ARM_CRx_No_GIC instead. 
nrf52840-dk -- Use GCC/ARM_CM7/r0p1 instead. Please note that, kernel port shall only take dependency on MCU core, not MCU peripherals. (Please take out RTC related from kernel port.) For low power feature (tickless) in FreeRTOS, please follow this page https://www.freertos.org/low-power-ARM-cortex-rtos.html. In case ARM_CM7/rop1 is missing any feature, reach out to us.
2020-01-30 19:45:03 +00:00
Richard Barry
4d4493e61a Remove the FreeRTOS-IoT-Libraries from FreeRTOS-Plus as it was an old copy with a newer copy in FreeRTOS-Labs. 2020-01-30 00:05:23 +00:00
Richard Barry
0d54d1c4dc Correct an err in queue.c introduced when previously updating behaviour when queue sets are used in combination with queue overwrites. 2020-01-29 19:52:38 +00:00
Yuhui.Zheng
f5b5b2db04 Cleaning up LPC51U68 projects:
- user playable settings are all in FreeRTOSConfig.h.
- removed reference to IntQueue.h in main_full.c
- readme.txt wording.
2020-01-24 07:53:14 +00:00
Richard Barry
2415dc26b0 Introduce the portSOFTWARE_BARRIER macro which thus far is only used by the Win32 demo to hold execution up in case a simulated interrupt is executing simultaneously. That should never happen as all threads should execute on the same core, but we have had numerous reports that this and other Win32 port changes we have made fixed these issues - although we have not been able to replicate them ourselves. 2020-01-23 23:49:24 +00:00
Gaurav Aggarwal
18f87e8c33 Add MPU demo project for Nulceo-L152RE which is Coretx-M3. 2020-01-23 01:56:36 +00:00
Gaurav Aggarwal
e058a65b16 Updates to CM3_MPU GCC port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2020-01-23 01:50:25 +00:00
Richard Barry
42a0eaafdc Ensure both one-shot and auto-reload are written consistently with a hyphen in comments. 2020-01-16 04:25:29 +00:00
Richard Barry
9456992c1f Added uxTimerGetReloadMode() API function. 2020-01-16 04:10:18 +00:00
Gaurav Aggarwal
c472c5b04f Add MPU demo project for LPC54018 board. 2020-01-12 12:33:17 +00:00
Yuhui.Zheng
0d95aca202 Introduce a port for T-HEAD CK802. A simple demo for T-HEAD CB2201 is also included. 2020-01-10 07:53:14 +00:00
Richard Barry
d2914041f8 Update the GCC and IAR SiFive HiFive rev-b demos to use the new configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS constants in place of the deprecated configCLINT_BASE_ADDRESS constant.
Update the IAR RISC-V HiFive demo to use the latest IAR Embedded Workbench version.
2020-01-09 02:28:45 +00:00
Richard Barry
066e2bc7d2 Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the IAR RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-09 02:23:51 +00:00
Richard Barry
75b81a1fab Work in progress update of LPC51U68 MCUXpresso project to rearrange the folder structure and names. 2020-01-09 00:19:36 +00:00
Richard Barry
fbb23055cd Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the GCC RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-07 01:14:36 +00:00
Richard Barry
eaf9318df8 Add Source/portable/ARMClang file that directs users to the GCC port if they which to use the ARMClang compiler. 2020-01-04 00:14:18 +00:00
Richard Barry
881958514b If tickless idle mode is in use then ensure prvResetNextTaskUnblockTime() is called after a task is unblocked due to a bit being set in an event group. This allows the MCU to re-enter sleep mode at the earliest possible time (rather than waiting until the timeout that would occur had the task not being unblocked be the event group) and matches a similar change made for queues and derivative objects (semaphores, etc.) some time ago. 2020-01-03 22:50:31 +00:00
Richard Barry
853856e8cc Correct #error text in multiple fat file system files. 2020-01-03 20:53:27 +00:00
Richard Barry
9e86cb95a7 Add xPortIsInsideInterrupt() to the IAR ARMv7-M ports. 2020-01-03 01:17:29 +00:00
Richard Barry
be3561ed53 Added xTaskAbortDelayFromISR() and ulTaskNotifyValueClear() API functions.
Added tests for xTaskAbortDelayFromISR() into Demo/Common/Minimal/AbortDelay.c.
Added tests for ulTaskNotifyValueClear() into Demo/Common/Minimal/TaskNotify.c.
2020-01-02 18:55:20 +00:00
Richard Barry
0a29d350b1 Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive1-RevB_IAR as it targets the RevB hardware. 2020-01-01 22:38:23 +00:00
Richard Barry
62b413627a Minor updates to comment block for xTaskCheckForTimeOut(). 2020-01-01 22:24:44 +00:00
Richard Barry
dfc1bf8ec3 Rename RISC-V_RV32_SiFive_HiFive1-FreedomStudio directory to RISC-V_RV32_SiFive_HiFive1-RevB-FreedomStudio as it targets Rev B of the hardware. 2020-01-01 22:05:35 +00:00
Richard Barry
4b943b35e0 Update RISCC-V-RV32-SiFive_HiFive1_FreedomStudio project to latest tools and metal library versions. 2020-01-01 22:02:06 +00:00
Gaurav Aggarwal
cfa83672ef Rename STM32Cube to GCC for STM32L4 Discovery projects as GCC is
the compiler used.
2020-01-01 00:35:42 +00:00
Gaurav Aggarwal
474182ab39 Make vSetupTimerInterrupt weak in the RVDS M4 MPU port to give the
application writer a chance to override this function. This gives
the application write ability to use a different timer.
2020-01-01 00:04:10 +00:00
Gaurav Aggarwal
22dd9a55ab Update documentation of xTaskCheckForTimeOut function to reflect the
intended use of this API.
2019-12-31 20:49:07 +00:00
Yuhui.Zheng
8f0eaf274c - Updates to projects due to demo folder name change. (IAR source file paths and assembler path were fixed. Keil source file paths were fixed.)
- Added back power static library for GCC and IAR. (Power management related interface definitions are in drivers/fsl_power.h. power.c is empty due to "implementation is in header file and power library")
- Note for GCC link: the command used for linking is `arm-none-eabi-gcc -nostdlib -L<additional lib search path> -Xlinker ... -o "CORTEX_M0+_LPC51U68_LPCXpresso.axf" <all *.o> -lpower`. Per GCC doc, static library name in file system is libpower.a.
2019-12-31 08:06:33 +00:00
Richard Barry
3203c5cc85 Previously the STM32F0518 compiler setting was changed to enable the use of the __weak attribute - however changing the port layer to use #pragma weak in place of __weak means the compiler setting change is not required and removes the risk of introducing incompatibilities - so this check in reverts the compiler settings change. 2019-12-30 22:24:58 +00:00
Richard Barry
cc673eb6a5 Ensure the CORTEX_M0_STM32F0518_IAR demo builds after updates to the Cortex-M0 port layer - required an update to the project settings to allow IAR extensions as the port layer now uses the _weak qualifier. 2019-12-30 22:07:33 +00:00
Richard Barry
801e63bd10 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 22:00:26 +00:00
Richard Barry
53c98357b0 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 21:59:11 +00:00
Richard Barry
49052a6581 Ensure the XMC1000_IAR_KEIL_GCC projects still build after updates to the Cortex-M0 port layer - minor change to remove warning related to using a newer version of the IAR tools. 2019-12-30 21:44:22 +00:00
Richard Barry
e292c67933 Replace the static prvSetupTimerInterrupt() function in the Cortex-M port layers that still used it (other than MPU ports so far) with a weakly defined function call vPortSetupTimerInterrupt() - which allows application writers to override the function with one that uses a different clock. 2019-12-30 21:16:09 +00:00
Richard Barry
e23d638afd Correct use of xStreamBufferRead() to xStreamBufferReceive() in code comments - no source code changes. 2019-12-30 20:00:49 +00:00
Richard Barry
c72df2f98d Tidy up comments only. 2019-12-27 21:22:07 +00:00
Richard Barry
7ddea8fc8b Enable the Win32 comprehensive test/demo build and run when configUSE_QUEUE_SETS is set to 0. 2019-12-27 21:02:23 +00:00
Richard Barry
70dbc12579 Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and executes in QEMU. 2019-12-27 20:59:57 +00:00
Gaurav Aggarwal
cef6548e8b Updates to CM4_MPU RCDS port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-24 22:45:32 +00:00
Gaurav Aggarwal
18c3e5e02a Remove local paths from the URL files 2019-12-24 19:16:19 +00:00
Richard Barry
05adf564f6 Add readme into the third party RISC-V port that points to the directories that contains the official ports. 2019-12-24 17:24:23 +00:00
Gaurav Aggarwal
ce7e8b87d8 Add IAR MPU project for STM32L475 Discovery Kit IoT Node 2019-12-21 00:04:04 +00:00
Gaurav Aggarwal
96b6746364 Updates to CM4_MPU IAR port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-21 00:02:31 +00:00
Richard Barry
b27fb82bc1 Increase test coverage for queue sets.
Rename the CORTEX_M0+_LPC51U68_LPCXpresso demo to CORTEX_M0+_LPC51U68_GCC_IAR_KEIL as it supports all three compilers.
2019-12-20 02:54:30 +00:00
Richard Barry
b55bbe55ac Remove build files accidentally checked in.
Remove the CMSIS math library as it is large and not used.
2019-12-20 02:49:15 +00:00
Gaurav Aggarwal
47c666bb1e Add MPU projects for STM32L475 Discovery Kit IoT Node 2019-12-20 02:07:09 +00:00
Gaurav Aggarwal
47d8ac6ac6 Updates to CM4_MPU GCC port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-20 02:05:44 +00:00
Yuhui.Zheng
c07f60c383 Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+).
Please see readme.txt for todo items.
2019-12-18 10:06:30 +00:00
Yuhui.Zheng
9c0e3fe9f1 Cortex M0 GCC/IAR/Keil ports -- tickless support.
The default portMISSED_COUNTS_FACTOR is set to 45 cycles. User could override this value, if a more accurate count is available.
2019-12-18 09:55:08 +00:00
Yuhui.Zheng
3cde02a046 RVDS/Keil weak linkage for vPortSetupTimerInterrupt() -- CM4F, CM3
Test steps are documented in this PR https://github.com/aws/amazon-freertos/pull/1141.
2019-12-18 02:08:06 +00:00
Gaurav Aggarwal
d58e6a7b09 Use linker script variables for MPU setup for Nuvoton M2351 Keil Project
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil uVision project for Nuvoton Numaker-PFM-M2351
to use the variables exported from the linker script. This ensures
that the MPU setup never goes out of sync with linker script.
2019-12-17 01:45:53 +00:00
Gaurav Aggarwal
d449c8979d Use the linker script variables for MPU setup for Keil Simulator Demo
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil Simulator demo to use the variables exported
from the linker script. This ensures that the MPU setup does not
go out of sync with linker script.
2019-12-17 00:14:26 +00:00
Gaurav Aggarwal
66ce9f7d72 Move warning suppression for IAR compiler to portmacro.h for v8M ports
IAR produces some warnings which can not be fixed in the source code because
then other compilers start generating warnings. We suppressed those warnings
in the project file before. This change moves the warning suppression from
project files to portmacro.h.
2019-12-07 01:23:17 +00:00
Yuhui.Zheng
1deeb6dd84 Check socket binding result before doing anything with socket. (This is to address ARG findings.) Breaking the single return rule here, due to precedent violation at line 1039 and 1144.
prvTransferConnect() now returns:
- pdTRUE: everything's good. pdTRUE = 1.
- -pdFREERTOS_ERRNO_ENOMEM: FreeRTOS_socket() failed. -pdFREERTOS_ERRNO_ENOMEM = -12.
- -pdFREERTOS_ERRNO_EINVAL || -pdFREERTOS_ERRNO_ECANCELED: FreeRTOS_bind() failed. Negative values.

Thus, at line 569 and line 617, needs to check != pdTRUE instead of == pdFALSE.

This commit is done on behalf of Alfred.
2019-12-04 07:52:49 +00:00
Richard Barry
9491af1fd7 Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to overwrite items in two queues that are part of the same set.
Minor queue optimisations.
2019-12-03 01:50:07 +00:00
Richard Barry
e5708b38e9 Add the Labs projects provided in the V10.2.1_191129 zip file. 2019-12-02 23:39:25 +00:00
Richard Barry
46e5937529 Remove guards against __ARMCC_VERSION version numbers that were previously used to avoid compiler warnings in some GCC ARM Cortex ports. 2019-11-21 22:35:21 +00:00
Richard Barry
d1fb8907ab Add software timer to the Win32 blinky demo. 2019-11-18 17:35:40 +00:00
Richard Barry
07622ed3ee Remove driver files that generate compiler warnings from the RISC-V_Renode_Emulator_SoftConsole project.
Update RISC-V ports so the interrupt stack is set to a known value before the scheduler is started if the interrupt stack is statically defined rather than re-using the main.c() stack.
2019-11-18 17:23:14 +00:00
Richard Barry
16639d2d63 Update to the latest atomic.h.
Improve commenting in RISC-V GCC port.
Fix IAR RISC-V port so the first task starts with interrupts enabled.
Add references to third party page ref using newlib with FreeRTOS into the tasks.c file in each place newlib is referenced.
Move the position of the traceTASK_DELETE() trace macro in case of use with a memory allocator that writes over freed memory even when inside a critical section.
Efficiency improvement:  Make sure xTaskIncrementTick() does not return pdTRUE when the scheduler is locked.  This just prevents an unnecessary yield interrupt (unnecessary as it is ignored) when xYieldPending happens to be pdTRUE.
2019-11-18 16:28:03 +00:00
Richard Barry
18916d5820 Rename the RISC-V_RV32_SiFive_Hifive1_GCC folder to RISC-V_RV32_SiFive_HiFive1_FreedomStudio as it is built with Freedom Studio. 2019-10-22 22:30:06 +00:00
Richard Barry
5306ba245d Add nano-specs linker option to HiFive1_GCC demo. 2019-10-22 22:27:55 +00:00
Richard Barry
c0741e36ed Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c files. 2019-10-22 16:31:57 +00:00
Richard Barry
fccc445865 Change version and license text in RISC-V_RV32_SiFive_HiFive1_GCC FreeRTOSConfig.h file. 2019-10-22 02:17:15 +00:00
Richard Barry
11c391dfb3 Tidy up main_full.c and change alignment of variable accesses in RegTest.S for the RISC-V_Renode_Emulator_SoftConsole demo. 2019-10-22 02:15:28 +00:00
Richard Barry
343fbe795f Rework RISC-V QEMU example to use vanilla Eclipse in place of Freedom Studio. NOTE: RISC-V QEMU mtime interrupts are not generated consistently. 2019-10-22 02:03:15 +00:00
Richard Barry
ef31243396 Add some asserts into the common demo tasks to catch scenarios where the tasks are not being used but the part of the demo/test that gets called from the tick hook is called resultant in an access to objects that were not created. 2019-10-21 17:17:34 +00:00
Richard Barry
61a003088d Update RISK-V GCC port to ensure the first task starts with interrupts enabled - previously its interrupts were only enabled after it yielded for the first time. 2019-10-21 04:16:32 +00:00
Richard Barry
a83244a37e Add the miv-basic.resc reNode script into the RISC-V_Renode_Emulator_SoftConsole demo as it is no longer shipped with the Microsemi tools. 2019-10-17 20:39:40 +00:00
Richard Barry
c7c60cff15 Rename RISC-V-Qemu-sive_e_Freedom_Studio directory to RISC-V-Qemu-sifive_e-Eclipse-GCC as it is now using Vanilla Eclipse and vanilla GCC in place of Freedom Studio. 2019-10-16 04:31:57 +00:00
Richard Barry
f78ccd077a Recreate the RISC-V-Qemu demo using Vanilla Eclipse in place of Freedom Studio as there is not a new Freedom Studio project that targets the HiFive1 board, and the updated Freedom Studio version didn't work with this project any more anyway. 2019-10-16 04:28:28 +00:00
Richard Barry
d435a7b62d Move the call to traceTASK_DELETE() to before port portPRE_TASK_DELETE_HOOK() as in the Windows port portPRE_TASK_DELETE_HOOK() never returns. 2019-10-15 22:14:40 +00:00
Richard Barry
4922cff4ce Add IAR demo for the SiFive RISC-V HiFive Rev B board. 2019-10-14 03:20:18 +00:00
Richard Barry
f6edf4adf9 Update the RegTest.S file used by several GCC RISC-V demos to ensure correct alignment of constant loads from assembly code. 2019-10-14 00:16:25 +00:00
Richard Barry
96e61a10a5 Tidy up the RISC-V_RV32_SiFive_HiFive1_GCC demo ready for its eventual release. 2019-10-14 00:04:53 +00:00
Richard Barry
d4216903d9 Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup check in only as still a work in progress. 2019-10-13 22:53:00 +00:00
Richard Barry
71d9450836 RIS-V_RV32_SiFive_HiFive1_GCC project now running the blinky demo - still a work in progress. 2019-10-11 02:59:13 +00:00
Richard Barry
dbac79045c Formatting changes only. 2019-10-10 17:56:10 +00:00
Richard Barry
dbbebbfcbc RISC-V-RV32_SiFive_HiFive1_GCC project is now also building the FreeRTOS kernel code - but not using it yet - still a work in progress. 2019-10-10 17:54:56 +00:00
Richard Barry
9bb072a2ab Base project to replace existing Freedom Studio project using latest Freedom Studio project format - builds and executes but does not yet include RTOS code. 2019-10-09 04:50:11 +00:00
Richard Barry
fd118f1888 Minor formatting change in comment only. 2019-10-07 18:56:33 +00:00
Yuhui.Zheng
eb5c60c60b Update FreeRTOS.h with the version in GitHub. This is also to test submodule. 2019-09-24 22:29:35 +00:00
Yuhui.Zheng
0fe36e497d Nordic port. Notes for Richard -- the work items we discussed about for nrf52840-dk and Wiced_CY still remain. The only reason for this commit is we want to test out submodule. 2019-09-24 22:26:36 +00:00
Yuhui.Zheng
35bc9d7938 Revert 2728. Not because the files are still needed, but because we want to test out submodule.
Before further updating project files in GitHub, keeping an additional copy.
2019-09-24 22:19:54 +00:00
Yuhui.Zheng
f001126ea8 Wiced_CY port is not needed anymore. Use GCC/ARM_CRx_No_GIC instead. 2019-09-24 20:56:55 +00:00
Yuhui.Zheng
9052882500 Adding tickless hooks to GCC/ARM_CRx_No_GIC port. 2019-09-24 20:07:40 +00:00
Richard Barry
80c1cb5de1 Correct code comments that referred to taskYIELD_FROM_ISR to portYIELD_FROM_ISR.
Update RV32 port to use 16 byte-alignment all the time (only strictly necessary when using FLOP instructions).
2019-09-24 16:06:21 +00:00
Yuhui.Zheng
c217b68d38 sync from github to svn: this version of atomic.h does not have compiler specific symbols. compiler specific optimization is to be merged in each port/<compiler>/<arch> directory. 2019-09-23 16:51:03 +00:00
Yuhui.Zheng
6f958bbf80 sync from github to svn: Xtensa GCC as-is. 2019-09-20 22:09:21 +00:00
Yuhui.Zheng
1c5fcc7f05 sync from github to svn: Wiced_CY for AFR Cypress ports. 2019-09-20 20:52:30 +00:00
Yuhui.Zheng
74df636c78 sync from github to svn: documentation for RISC-V. This may be a temporary parking location. 2019-09-20 20:47:29 +00:00
Yuhui.Zheng
cc0aee651e sync from github to svn: Renasas/RX100 #pragma _VECT() 2019-09-20 20:41:32 +00:00
Richard Barry
da3d370ff7 RISC-V port updates: The machine timer compare register can now be for any HART, and correct the sequence used to update the 64-bit machine timer compare register on 32-bit cores. 2019-09-04 15:46:45 +00:00
Richard Barry
96bad0f6c3 Minor bug fix in NTPDemo.c -> use of FREERTOS_INVALID_SOCKET in place of NULL.
Update trace recorder code to account for uxPendedTicks renaming to xPendedTicks.
2019-09-04 00:13:17 +00:00
Richard Barry
ab41d89285 Add IAR RISC-V port to SVN - a work in progress. 2019-09-03 01:39:29 +00:00
Yuhui Zheng
2b546b1984 Atollic project update for CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC, GCC port. 2019-08-30 00:18:41 +00:00
Richard Barry
973a4f9869 Correct alignment of stack top in RISC-V port when configISR_STACK_SIZE_WORDS is defined to a non zero value. 2019-08-27 15:57:45 +00:00
Richard Barry
7d285f3dcb + Moved the History.txt file from the website git repo into the source code SVN repo.
+ Added xTaskCatchUpTicks() which corrects the tick count value after the application code has held interrupts disabled for an extended period.
+ Updated the xTaskResumeAll() implementation so it uses the new xTaskCatchUpTicks() function mentioned above to unwind ticks that were pended while the scheduler was suspended.
+ Various maintenance on the message buffer, stream buffer and abort delay demos.
+ Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it has same type as variables it is compared to, and therefore also rename the variable xPendingTicks.
+ Correct spelling mistake within a comment that was common to all the ARMv7-M ports.
2019-08-25 19:35:59 +00:00
Richard Barry
72af51cd86 Starting point for IAR RISC-V project created some time ago - checking in now so it can be completed - currently work in progress. 2019-08-04 15:24:15 +00:00
Richard Barry
5352cb4f45 Tidy up Win32 port layer - include addition of new variable that prevents recursive attempts to obtain a mutex when the trace recorder is used inside an interrupt. 2019-08-04 01:14:43 +00:00
Gaurav Aggarwal
b1e35551c4 Update the FreeRTOS version number in task.h 2019-07-29 23:48:11 +00:00
Gaurav Aggarwal
6bad7d2055 Add the default definition of configPRECONDITION to FreeRTOS.h.
This is needed for CBMC proofs.
2019-07-27 23:03:23 +00:00
Richard Barry
b4c06085e1 Files as per 190725_FreeRTOS_IoT_Libs_Task_Pool_and_MQTT_Preview interim release. 2019-07-25 20:20:24 +00:00
Richard Barry
b24ab46d39 Delete obsolete makefiles that were causing confusion from RISC-V-Qemu-sifive_e-FreedomStudio demo. 2019-07-25 20:11:37 +00:00
Richard Barry
10b7b52995 Remove unnecessary include path from the MQTT demo. 2019-07-24 02:01:43 +00:00
Gaurav Aggarwal
38b6553abd Cosmetic changes in the MQTT demo - mostly comment updates. 2019-07-24 01:29:01 +00:00
Richard Barry
fe4511b35e Continued to work on the MQTT demo project.
A few review comments added into the MQTT implementation.
2019-07-24 00:27:14 +00:00
Richard Barry
53842d4cac Remove the simple UDP client/server tasks from the MQTT demo as the demo's network connection can be tested more easily just by pinging it.
Tidy up the iot_config.h header files a little.
2019-07-23 19:23:12 +00:00
Gaurav Aggarwal
95f60318d5 Cosmetic changes in the MQTT demo
- Fix warnings in the MQTT code.
- Update comments in the iot_config.h.
2019-07-23 18:20:06 +00:00
Richard Barry
17b18c8b7e Reduce warning level in Visual Studio project as it generates lots of warnings in the library files. 2019-07-23 17:30:18 +00:00
Richard Barry
d1dd8da12e Revert a couple of changes in Win32 demo that should not have been checked in. 2019-07-23 17:02:59 +00:00
Gaurav Aggarwal
05e7d9cc08 Remove dependency on secure sockets
Network interface implementation for FreeRTOS now directly calls into
FreeRTOS+TCP instead of going via secure sockets.
2019-07-23 06:55:54 +00:00
Gaurav Aggarwal
68fd276886 Remove IotMqtt_Assert( pTaskPool == IOT_SYSTEM_TASKPOOL ) from MQTT code
The cut down version of the task pool has only one task pool, namely,
system task pool. All the task pool API functions accept NULL as a
valid parameter for IotTaskPool_t and use the system task pool when
NULL is passed for the system task pool.

IOT_SYSTEM_TASKPOOL is defined to NULL to use system task pool and
therefore the above assert is no longer valid.
2019-07-23 04:49:24 +00:00
Gaurav Aggarwal
8ea501ef11 Update projects to use the new directory name
IotTaskPool_GetSystemTaskPool has been removed from the cut down version
of the task pool. define IOT_SYSTEM_TASKPOOL to NULL so that the MQTT library
builds successfully.

Use the new #defines in the iot_config.h.
2019-07-23 04:16:32 +00:00
Gaurav Aggarwal
9dd72d4b44 Rename \FreeRTOS-Plus\Source\FreeRTOS-Plus-IoT-SDK to \FreeRTOS-Plus\Source\FreeRTOS-IoT-Libraries. 2019-07-23 03:41:27 +00:00
Richard Barry
7af8756c97 Update task pool so tasks and timer are allocated statically. 2019-07-23 01:46:59 +00:00
Richard Barry
1840d38abf Another backup check-in during process of optimising task pool for FreeRTOS. This checkin is prior to making the task pool statically allocated. 2019-07-23 00:00:37 +00:00
Richard Barry
63c87504a0 Backup checking on - part way through optimising task pool. 2019-07-22 21:46:13 +00:00
Gaurav Aggarwal
4c775574eb Fix DNS resolution failure for test.mosquitto.org
The DNS cache entry size was not big enough to fit the DNS name and
as a result the DNS reply parsing code returned error. Increased the
size of the entry to ensure that the DNS name can fit in.
2019-07-22 18:27:45 +00:00
Gaurav Aggarwal
06f9278de3 The MQTT example now works with the local MQTT broker.
It still needs to be tested with the public mosquitto broker.
2019-07-21 23:26:54 +00:00
Gaurav Aggarwal
a7ef9c3b61 Add first draft of mqtt example
Note that it is still work in progress and not working as of now.
2019-07-21 22:14:13 +00:00
Richard Barry
238a23e4d5 Add the files from the MQTT project that were not check in. 2019-07-19 01:39:42 +00:00
Richard Barry
5dd6cf1295 Add missing files so base MQTT project builds. 2019-07-19 00:37:33 +00:00
Gaurav Aggarwal
d708efe997 Update the task pool demo to show re-use of recyclable jobs
The example now creates a recyclable job, schedules it and returns it
back to the task pool when it is done. It then again creates a
recyclable job and ensures that the task pool the same job present
it its cache.
2019-07-19 00:02:45 +00:00
Richard Barry
2b295f9015 Added simple UDP demo into the mqtt project to enable the network connectivity to be tested in a simple way prior to performing any MQTT operations. 2019-07-17 20:50:15 +00:00
Richard Barry
d362efca8d Add MQTT project that builds on the task pool project - currently the library is building but not being used. 2019-07-17 19:44:13 +00:00
Richard Barry
3c3b32b8e4 Rename the FreeRTOS_Plus_IoT_SDK directory to FreeRTOS_IoT_Libraries. 2019-07-16 18:21:42 +00:00
Richard Barry
290c8cedfd Function rename in task pool demo. 2019-07-16 18:19:44 +00:00
Richard Barry
bb0e1f356d Remove any TCP/IP functionality from the task pool demo - the TCP/IP stack is still built as it will be used in later revisions. 2019-07-14 23:33:05 +00:00
Richard Barry
2e18203bb7 Update TCP/IP tack to latest form Git. 2019-07-14 22:07:41 +00:00
Richard Barry
a6a0403fd6 Synch IoT libraries with latest versions. 2019-07-14 19:29:16 +00:00
Richard Barry
e4e86a464e New MSVC task pool demo now building both the task pool and TCP libraries. 2019-07-14 19:13:51 +00:00
Richard Barry
3afd918ecd Rename the task pool version of FreeRTOS_Plus_TCP_Minimal.sln to task_pool_demo.sln. 2019-07-14 18:04:40 +00:00
Richard Barry
232a94c3f0 Restart the task pool demo, this time using the minimal FreeRTOS+TCP project as a base. 2019-07-14 18:01:57 +00:00
Richard Barry
d8a3ad3c6f Minor modification to the WIn32 simple TCP/IP stack example only. 2019-07-14 16:06:31 +00:00
Richard Barry
8bd1813446 Only partially implemented and may get reverted - updates to the Win32 port that uses a per-task event to prevent the task proceeding past its yield point if the SuspendThread() call used to stop the task does not take effect immediately. This is intended to fix issues reported by users, although we have been unable to replicate them ourselves. 2019-07-12 01:52:22 +00:00
Richard Barry
e60f71855a Remove IotTaskPool_CreateRecyclableSystemJob() and IotTaskPool_ScheduleSystemJob() again, which were intended to be alternative APIs that only access the system task pool, and instead update IotTaskPool_CreateRecyclableJob() and IotTaskPool_ScheduleJob() to allow the parameter used to pass in the task pool handle to be NULL if the system task pool is the only one available.
Update the task pool demo app to include a lot more functionality.
2019-07-08 15:48:21 +00:00
Richard Barry
4d6570b009 Exercise the new vPortGetHeapStats() function from the Win32 demo projects. 2019-07-05 20:21:59 +00:00
Richard Barry
fa404422b9 Add link to dual core blog post into STM32H745I demo.
Doxygen corrections in list.h.
Use #error to check FreeRTOS.h is included before message_buffer.h and stream_buffer.h.
2019-07-04 21:18:36 +00:00
Richard Barry
246bb6e806 Add vPortGetHeapStats() function to query heap statistics. 2019-07-04 19:34:48 +00:00
Gaurav Aggarwal
7235743749 Only check once before re-setting ready priority
The macro taskRESET_READY_PRIORITY checks if the task being removed from the
ready list is the last one and only then resets the top ready priority
by calling portRESET_READY_PRIORITY. If we already know that it is the
last ready task being removed then there is no need to perform the check
again and the macro portRESET_READY_PRIORITY can be called directly. We were
doing the unnecessary check at two places and this commit fixes them.

This commit also increases the time period of check task to ensure that all
the demo tasks get a chance to run before the check is performed.
2019-07-03 00:08:16 +00:00
Gaurav Aggarwal
004e2b637e Use ARMCM33_DSP_FP_TZ_config.txt which comes with the MDS installation
We had a copy of ARMCM33_DSP_FP_TZ_config.txt file within the project directory
and it used to get outdated with each release of MDK because of non-backward
compatible changes in MDK. This change removes the copy in the project and
instead uses the one shipped with the MDK installation.
2019-07-02 18:47:36 +00:00
Richard Barry
e75b609c74 In small FreeRTOS applications it is unlikely there will be any task pools other than the system task pool. IotTaskPool_CreateRecyclableSystemJob() is therefore introduced to complement IotTaskPool_CreateRecyclableJob() that does not require the handle of the target task pool to be specified as a parameter. Likewise IotTaskPool_ScheduleSystemJob() is introduced to complement IotTaskPool_ScheduleJob() for the same reason.
IotTaskPool_CreateSystemTaskPool() calls synchronisation primitives, so cannot be called before the scheduler starts.  Add a configASSERT() to ensure the scheduler is running when it executes.
IotTaskPool_CreateSystemTaskPool() can conceivably be called from multiple different libraries that depend on the thread pool.  In this version _IotSystemTaskPool.running can be used to check the system task pool has not already been created.  If the task pool has been created simply return from IotTaskPool_CreateSystemTaskPool() instead of re-creating it (which would leak memory and leave orphaned tasks).
Call taskENTER_CRITICAL() and taskEXIT_CRITICAL() directly in place of mapping them to TASKPOOL_ENTER_CRITICAL() and TASKPOOL_EXIT_CRITICAL() in the same file.
Rename _timerThread() _timerCallback(), as it is a callback function and not a thread.
Remove the unused flags parameter from _scheduleInternal().
2019-07-01 17:05:20 +00:00
Richard Barry
76cc2a00c6 Add the first and most basic task pool example. 2019-06-28 23:20:52 +00:00
Richard Barry
87eb37342f Create a project that builds a subset of the dependencies of the IoT SDK that have been brought into SVN thus far. The application does nothing other than build at this time. 2019-06-19 18:42:58 +00:00
Richard Barry
0b0a02b76a Bring in a minimum subset of the IoT SDK - at this time just a subset of the library dependencies rather than the libraries themselves. 2019-06-19 18:41:21 +00:00
Richard Barry
fb3eaeac40 Added additional xMessageBufferSpacesAvailable() (plural) to existing xMessageBufferSpaceAvailable() (singular) macro as the documentation muddled both.
Added #define portPOINTER_SIZE_TYPE 	uint64_t to the 64-bit RISC-V port layer.
2019-05-13 03:14:05 +00:00
Richard Barry
b51529a284 Update version number ready for next release. 2019-05-11 01:47:37 +00:00
Gaurav Aggarwal
9e10b08a3a Delete the Release configuration from the NXP project.
Also, some cosmetic changes.
2019-05-11 00:53:34 +00:00
Richard Barry
db5d265c07 Removing obsolete code and files only. 2019-05-10 22:19:18 +00:00
Richard Barry
53cb12e389 Add M7/M4 AMP demo. 2019-05-10 18:25:10 +00:00
Gaurav Aggarwal
0b1a025789 Add NXP libs needed to build the project 2019-05-09 22:27:44 +00:00
Gaurav Aggarwal
aa9c8d2697 Delete the not needed file missed in last commit 2019-05-09 22:09:12 +00:00
Gaurav Aggarwal
b9e379951a Do not strip required symbols when LTO is on
Link time optimization was stripping off some symbols which were
accessed from assembly code.
2019-05-09 22:04:29 +00:00
Gaurav Aggarwal
b6e5f96f0e Ensure that fault handlers are declared naked. 2019-05-05 02:26:42 +00:00
Gaurav Aggarwal
2279a86566 Add ARMv8M demo project for NXP LPC55S69. 2019-05-05 02:15:55 +00:00
Gaurav Aggarwal
ae448fc952 Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351. 2019-05-02 21:08:28 +00:00
Richard Barry
079d081346 Basic 64-bit RISC-V port now functional. RISC-V port layer automatically switches between 32-bit and 64-bit. 2019-04-29 00:57:14 +00:00
Richard Barry
27ca5c8341 Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM Cortex-M33 ports to assist with link time optimisation. 2019-04-25 19:49:50 +00:00
Richard Barry
84377442fc Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM GCC ports to assist with link time optimisation. 2019-04-21 20:15:34 +00:00
Richard Barry
606845492b Fix potential memory leak in the Win32 FreeRTOS+TCP network interface initialisation sequence.
Introduce portMEMORY_BARRIER() macro to assist with memory access ordering when suspending the scheduler if link time optimization is used.
2019-04-17 17:16:04 +00:00
Gaurav Aggarwal
dd9a9710c6 Export port architecture name for COrtex-M33. This can be used by debuggers to find the port in-use to be able to correctly decode the context stored on the stack. 2019-03-28 00:00:46 +00:00
Gaurav Aggarwal
ba39a958b5 Fix spelling of priority in comments. 2019-03-18 23:28:03 +00:00
Gaurav Aggarwal
12fb75be37 Fix warning portHAS_STACK_OVERFLOW_CHECKING not defined
portHAS_STACK_OVERFLOW_CHECKING was getting defined too late before
being used in portable.h for the platforms that do not have stack
overflow checking registers. This commit ensures that it is defined
before it is used.
2019-03-13 21:10:44 +00:00
Richard Barry
2265d70499 Correcting spelling mistakes in comments only. 2019-03-08 17:30:49 +00:00
Richard Barry
06596c3192 Prepare the RISC-V port layer for addition of 64-bit port. 2019-03-08 17:03:43 +00:00
Richard Barry
50e67a89f1 Update version number in +TCP code. 2019-02-21 18:08:36 +00:00
Gaurav Aggarwal
5fe8465a35 Change type of usStackDepth to configSTACK_DEPTH_TYPE. 2019-02-21 03:25:30 +00:00
Gaurav Aggarwal
5623c69748 Fix Build and Links failure in MPU projects. Minor cosmetic changes in some V8M files. 2019-02-20 20:27:07 +00:00
Richard Barry
8b6ab5f197 Add instructions on building the Cortex-M33 secure and non secure projects into the comments of that project and into a readme.txt file.
Enable configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES setting to be used in statically allocated systems.
2019-02-20 17:55:59 +00:00
Gaurav Aggarwal
ceeff14524 Set default value of configRUN_FREERTOS_SECURE_ONLY to 0. 2019-02-20 00:40:46 +00:00
Gaurav Aggarwal
5849459c65 Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change spaces to tabs. 2019-02-20 00:25:45 +00:00
Richard Barry
c3c9c12ce2 Update the common demo death.c to use the updated macro name to give it a secure context. 2019-02-19 02:57:44 +00:00
Gaurav Aggarwal
ce576f3683 First Official Release of ARMV8M Support. This release removes Pre-Release from all the ARMv8M files licensees. 2019-02-19 02:30:32 +00:00
Richard Barry
58ba10eee8 Update version number in readiness for V10.2.0 release. 2019-02-17 22:36:16 +00:00
Gaurav Aggarwal
55ad3861c5 Sync the Renesas port to AFR Git Repo 2019-02-17 01:27:16 +00:00
Gaurav Aggarwal
0de2a2758a Fix definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE
tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE was not correctly defined resulting in
dynamically allocated TCB not being freed when MPU was enabled. This commit fixes
the definition to ensure that dynamically allocated RAM (Stack and TCB) is freed
always.
2019-02-17 01:24:58 +00:00
Gaurav Aggarwal
2c88fb7fa1 Fix build failure when dynamic allocation is not enabled.
When dynamic allocation is not enabled, vPortFree is not available. The current code used
vPortFree and this resulted in linker error. This commit removes the use of vPortFree when
dynamic allocation is not enabled.
2019-02-16 20:21:47 +00:00
Richard Barry
6844bef74f Replace the pdf RISC-V documentation with links to the documentation web pages. 2019-02-16 01:15:33 +00:00
Richard Barry
b2b1b09ea5 Fix bug in core_cm3.c atomic macros.
Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
2019-02-16 01:08:38 +00:00
Richard Barry
3153131fa7 Add Dornerworks attribution to makefiles that build the Freedom Studio RISC-V project. 2019-02-12 02:43:28 +00:00
Richard Barry
7e08fd6d07 Add makefiles that build the FreedomStudio project (provided by Dornerworks - thanks). 2019-02-11 19:44:13 +00:00
Richard Barry
fb73829148 Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
2019-02-08 01:18:08 +00:00
Richard Barry
df5952f655 Add xTaskGetIdleRunTimeCounter() API function to return the run time stats counter for the idle task - useful for POSIX time implementations. 2019-01-21 23:39:48 +00:00
Gaurav Aggarwal
817783d75c Copyright updates from Cadence.
e1df894752
2019-01-16 19:01:25 +00:00
Richard Barry
a4941ac5db Update main.c() for the WIN32-MingW project so the trace recorder is initialized even when the simple blinky demo is used - otherwise the trace recorder causes an exception as it is used without first being initialized. 2019-01-07 19:40:13 +00:00
Richard Barry
80df5cd517 Update the pin mux setup on the Vega board demo to enable the LED. 2018-12-31 20:14:34 +00:00
Richard Barry
11d9c440b8 Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
Add a project for the Vega board's RI5CY core.
2018-12-31 18:19:52 +00:00
Richard Barry
e2af102c80 Re-org of RISC-V file structure and naming step 2. 2018-12-30 23:53:47 +00:00
Richard Barry
818eeccc0c Re-org of RISC-V file structure and naming step 1. 2018-12-30 23:20:26 +00:00
Richard Barry
3474e750fa Create folder to hold RISC-V chip specific extensions. 2018-12-30 23:15:37 +00:00
Richard Barry
db750d0c82 Update RSIC-V port layer after testing saving and receiving of chip specific registers. 2018-12-30 23:11:40 +00:00
Richard Barry
60b133b2c6 Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack. 2018-12-30 20:00:43 +00:00
Richard Barry
911a1de273 Correct accidental deletion in GenQTest.c. 2018-12-28 03:38:27 +00:00
Richard Barry
d369110167 Allow the size of the stack used by many of the standard demo/test tasks to be overridden by FreeRTOSConfig.h settings.
Update the Freedom Studio RISC-V project so the 'full' build configuration is now functional.
2018-12-28 00:44:18 +00:00
Richard Barry
178fe4f143 Update the Freedom Studio RISC-V project so the gdbinit options are now specified on the command line. 2018-12-27 04:57:49 +00:00
Richard Barry
e5daf23d75 Update Freedom Studio RISC-V demo for the latest GCC RISC-V port - not yet tested. 2018-12-27 04:34:08 +00:00
Richard Barry
80f6f3e59b Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running. 2018-12-24 17:48:10 +00:00
Richard Barry
ce36928ea8 Rename directories in the RISC-V port. 2018-12-24 17:37:02 +00:00
Richard Barry
2181c0375e Backup Microsemi Renode project before adding a build configuration for the target hardware. 2018-12-19 02:56:13 +00:00
Richard Barry
8d213b42f2 Add vTimerSetReloadMode() calls to the code coverage tests. 2018-12-17 23:19:23 +00:00
Richard Barry
6edabbe7ea Update the the MPU simulator project to exercise the timer API. 2018-12-17 22:06:58 +00:00
Richard Barry
148f588f56 Remove "FromISR' functions from the list of functions that switch to a privileged mode as IRQs are privileged already.
Add the vTimerSetReloadMode() API function.
2018-12-17 22:04:18 +00:00
Richard Barry
8285ca6b5f Update RISC-V_IGLOO2_Creative_SoftConsole demo to make use of new RISC-V porting layer structure and exercise some external interrupts - all tests currently passing in Renode. 2018-12-17 00:01:36 +00:00
Richard Barry
101806906d Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions and accommodate chips that don't include the CLINT. 2018-12-16 23:59:49 +00:00
Richard Barry
7cc42b2ab6 Save changes to the RISC-V port layer before making changes necessary to support pulpino too:
+ Switch positions of the asm functions used to start the kernel and handle traps to enable one to reference to the other.
+ Handle external interrupts (working with Renode emulator).
+ The _sp linker variable is now called __freertos_irq_stack_top.
2018-12-16 20:21:29 +00:00
Richard Barry
866635d2ad Microsemi RISC-V project:
Reorganize project to separate Microsemi code into its own directory.
    Add many more demo and tests.
2018-12-10 20:55:32 +00:00
Richard Barry
6b37800ade Backup checkin of MiFive demo running in ReNode emulator. 2018-12-10 05:28:05 +00:00
Richard Barry
9a136a52df Backup check in of the Microsemi IGLOO2 Creative Board RISC-V demo - still a work in progress. 2018-12-04 01:27:06 +00:00
Richard Barry
4b9dd38d1c Backup checking of the Freedom Studio RISC-V project - still a work in progress. 2018-12-04 01:25:53 +00:00
Richard Barry
65f7a2dc19 Update RISC-V port to use a separate interrupt stack. 2018-12-04 01:23:41 +00:00
Richard Barry
e85ea96f78 Some efficiency improvements in Risc-V port. 2018-11-28 19:35:40 +00:00
Richard Barry
dc99300fa9 First task running in RISC-V-Qemu-sifive_e-FreedomStudio demo. 2018-11-24 20:59:07 +00:00
Richard Barry
d0ef322b13 Add kernel code to the RISC-V-Qemu-sifive_e-FreedomStudio demo. 2018-11-24 04:42:20 +00:00
Richard Barry
f7102f2342 Add a starting point for a Freedom Studio Risc V project. 2018-11-24 03:48:55 +00:00
Richard Barry
db64297487 Provide each Risc V task with an initial mstatus register value. 2018-11-20 20:12:35 +00:00
Richard Barry
8cef339aec Update Risc-V port to use environment call in place of software interrupt - still very much a work in progress. 2018-11-19 06:01:29 +00:00
Richard Barry
baee711cb6 Continue work on Risc V port. 2018-11-06 02:04:28 +00:00
Richard Barry
74d0d16aab Update xTaskRemoveFromEventList() so when tickless idle is used prvResetNextTaskUnblockTime() only gets called if the scheduler is not locked, as it would get called when the scheduler is unlocked in any case. 2018-11-05 19:35:54 +00:00
Richard Barry
55ff89373a Update the method used to detect if a timer is active. Previously the timer was deemed to be inactive if it was not referenced from a list. However, when a timer is updated it is temporarily removed from, then re-added to a list, so now the timer's active status is stored separately. 2018-10-24 21:37:59 +00:00
Richard Barry
6fab2b9e0d Add xTaskGetApplicationTaskTagFromISR(), which is an interrupt safe version of xTaskGetApplicationTaskTagFrom(). 2018-10-08 15:10:18 +00:00
Gaurav Aggarwal
1af80854e6 Fix Xtensa project file and some documentation improvements. 2018-10-02 23:54:51 +00:00
Richard Barry
c6de0001fa Added uxTaskGetStackHighWaterMark2(), which is the same as uxTaskGetStackHighWaterMark() other than the return type.
Allows the task name parameter passed into xTaskCreate() to be NULL.
2018-09-30 21:50:05 +00:00
Richard Barry
e3dc5e934b RISC-V tasks now context switching to each other using taskYIELD() - not fully tested yet. 2018-09-27 17:25:17 +00:00
Richard Barry
2bcb1ab02b Add trap handler to RISC-V port so there is no dependency on third party code. 2018-09-23 03:52:23 +00:00
Richard Barry
32f35e9130 RISC-V:
Added code to setup the timer interrupt - not tested yet.
Added the taskYIELD() implementation - so far just checked it generates an interrupt.
2018-09-12 16:33:05 +00:00
Richard Barry
b11eb3a59c RISC-V work in progress:
+ Initialise task stack.
    + Successfully jump to start of first task.
2018-09-10 20:50:05 +00:00
Richard Barry
0c0f0d0f8f Minor synching - no functional changes. 2018-09-07 22:24:51 +00:00
Richard Barry
ab49c6ae04 Very minor formatting changes, and remove legacy link to V8 upgrade information. 2018-09-07 21:35:05 +00:00
Richard Barry
92ae8e7aff Update version numbers ready for release. 2018-09-07 18:13:20 +00:00
Richard Barry
1a235efd2b Update trace configuration files for the updated trace recorder code. 2018-09-06 18:52:45 +00:00
Richard Barry
be9c0730c3 Update trace recorder code to the latest.
Some minor changes to enable the configREMOVE_STATIC_QUALIFIER constant to be used by those debuggers that cannot cope with statics being used.
2018-09-06 03:23:03 +00:00
Richard Barry
21a8ff35dd Two minor updates in the comments to fix html formatting that was preventing doxygen creating documents correctly. 2018-09-01 02:42:34 +00:00
Richard Barry
97a686b2e1 Fix mixed tabs and spaces in the latest TCP patches. 2018-08-30 18:25:53 +00:00
Richard Barry
e2750cd388 Case unused return values for memset and memcpy to void in stream_buffer.c to avoid compiler warnings when the warning level is turned up.
Remove duplicate comment in heap_1.c.
2018-08-29 15:43:41 +00:00
Richard Barry
0d6e3df7ec Minor updates to fix issues with the Segger kernel aware plug since V10.1.0. 2018-08-28 18:10:42 +00:00
Richard Barry
9bda04b472 Fix build issues in the FreeRTOS_Plus_TCP_Minimal_Windows_Simulator project:
+ Set configENABLE_BACKWARD_COMPATIBILITY to 1 in FreeRTOSConfig.h to account for the fact that a member of the List_t structure has been renamed.
+ Provide a dummy implementation of ulApplicationGetNextSequenceNumber() to prevent linker warnings.
2018-08-28 16:58:21 +00:00
Richard Barry
893db45834 Changes required for the IAR StateViewer plug-in to work with FreeRTOS V10.1.0. 2018-08-27 23:11:28 +00:00
Richard Barry
b0ce1f61c9 Move some variables from function scope back to being file scope for the benefit of some kernel aware debuggers that were left working in a non-functioning mode after the V10.1.0 release - not last change for this purpose. 2018-08-27 21:59:26 +00:00
Richard Barry
a11b1a494d FreeRTOS+UDP was removed in FreeRTOS V10.1.0 as it was replaced by FreeRTOS+TCP,
which was brought into the main download in FreeRTOS V10.0.0.  FreeRTOS+TCP can
be configured as a UDP only stack, and FreeRTOS+UDP does not contain the patches
applied to FreeRTOS+TCP.
2018-08-23 00:00:20 +00:00
Richard Barry
3a1631fda3 Update copyright date ready for tagging V10.1.0. 2018-08-22 23:23:03 +00:00
Richard Barry
bdb088e66f Fix some build issues in older kernel demo projects.
Update to V2.0.7 of the TCP/IP stack:
   + Multiple security improvements and fixes in packet parsing routines, DNS
     caching, and TCP sequence number and ID generation.
   + Disable NBNS and LLMNR by default.
   + Add TCP hang protection by default.

We thank Ori Karliner of Zimperium zLabs Team for reporting these issues.
2018-08-22 21:29:21 +00:00
Richard Barry
fb9de58f56 Update version numbers in preparation for a new release. 2018-08-21 19:50:48 +00:00
Richard Barry
722ca8fb2b Update demo project for Tensilita - work in progres..
Add support for POSIX style errno - work in progress.
2018-08-21 19:37:04 +00:00
Richard Barry
78d20e2854 Only include the static definition of freertos_tasks_c_additions_init if FREERTOS_TASKS_C_ADDITIONS_INIT is defined, matching the guide used to include the function's prototype. 2018-08-20 15:08:35 +00:00
Gaurav Aggarwal
56dc0dd9b4 Merge bug fixes from Cadence 2018-08-07 07:21:07 +00:00
Richard Barry
f6cbf20019 Update RISC-V project to used official port stubs in place of third party port. 2018-07-07 21:54:41 +00:00
Richard Barry
3bfc32d444 Add stubs for official RISC-V RV32 port. 2018-07-07 21:47:31 +00:00
Richard Barry
d525d5092d Update trace recorder code.
Add TCP Echo server to the FreeR_Plus_TCP_Minimal_Window_Simulator project.
2018-07-02 22:29:02 +00:00
Richard Barry
f7fc215247 Update stream buffer tests to try resetting a statically allocated stream buffer before deleting it (tests fix in code).
Update trace recorder library.
2018-07-02 21:58:28 +00:00
Richard Barry
0887713969 Fix issues whereby vStreamBufferReset() clobbered the flag that indicated the stream buffer was statically allocated. 2018-06-20 21:21:55 +00:00
Richard Barry
9119e1e0e3 Add starting point for IGLOO2 RISV-V demo project. 2018-06-20 21:18:14 +00:00
Richard Barry
483f4a8c4b Small change to the directory name in which the RISC-V port is stored. 2018-06-20 21:15:04 +00:00
Richard Barry
3d8d2f3cc8 Add RISCV port layer. 2018-06-20 19:21:18 +00:00
Richard Barry
10eea4aded Remove period from the URL that links to the web page that describes the FreeRTOSConfig.h parameters. 2018-06-15 00:03:20 +00:00
Gaurav Aggarwal
c4b1afc4ef Add Xtensa port
The project file is for Xtensa Xplorer simulator.
Also add tests for one size stream buffer.
2018-06-14 19:43:17 +00:00
Richard Barry
7d92e4dd8f Sync with TCP version from AWS, including:
+ Add FreeRTOS_UpdateMACAddress().
+ Fix bug in lTCPWindowRxCheck() that manifested itself when flooded with lots of very small packets.
2018-06-13 21:16:22 +00:00
Richard Barry
d6fcd5dbba Add the option to specify a stack size in the standard demo MessageBuffer tests.
Add stream and message buffer tests into the Zynq demo project.
2018-06-13 16:50:16 +00:00
Richard Barry
4fbcdbf13b Fix misra violations in queue.c by introducing a union that allows the correct data types to be used in place of void *, then tidy up where the union is used. 2018-06-11 18:51:53 +00:00
Richard Barry
4a8c4c9eaf TimerHandle_t is now type safe instead of void *.
Remove casts that are no longer required not type safe handles are used.
2018-06-11 04:43:12 +00:00
Richard Barry
3d8681de9e Continue updating to MISRA 2012 from 2004 - currently working on queue.c and committing as working copy prior to making larger change.
Change QueueHandle_t to be typesafe from void *.
Change StreamBuffer_t to be typesafe from void *.
2018-06-11 01:56:32 +00:00
Richard Barry
7a9f453f96 Remove casts from EventGroupHandle_t to EventGroup_t, and corresponding lint comments, which are not required now EventGroupHandle_t is type safe.
Fix the prototype of prvTimerCallback() in the MPU simulator demo (caught due to the new type safety in tasks.c).
2018-06-04 04:02:57 +00:00
Richard Barry
390fb06b49 First pass at updating from MISRA 2004 to MISRA 2012:
Updated pvContainer member of list items to List_t * rather than void * as they are always contained in a list if anywhere.
Made EventGroupHandle_t typesafe pointer to forward referenced struct rather than void pointer.
Made TaskHandle_t typesafe pointer to forward referenced struct, rather than a void pointer.
2018-06-03 22:57:46 +00:00
Richard Barry
5bebf10fa4 Minor updates to comments only. 2018-05-17 17:50:14 +00:00
Richard Barry
585b16a39f Update definition of StaticTimer_t so its size is correct on MSP403X large memory model builds. 2018-05-07 16:31:50 +00:00
Richard Barry
d30249789b Previously the MPSoC Cortex-A53 demo was updated to the latest Xilinx SDK tools to the point where it was building, but not tested. This check in modifies the project files slightly following testing. 2018-05-04 15:06:50 +00:00
Richard Barry
26d8c76996 Update Zynq, MPSoc Cortex-A53 and MPSoc Cortex-R5 demo projects to build with the 18.1 version of the Xilinx SDK - building BUT NOT YET TESTED. 2018-05-02 04:04:54 +00:00
Richard Barry
a3148ba638 xTaskGenericNotify() now sets xYieldPending to pdTRUE even when the 'higher priority task woken' parameter is provided - making its behaviour consistent with event objects.
Ensure tasks that are blocked indefinitely on a direct to task notification return their state as eBlocked, previously was returned as eSuspended - making its behaviour consistent with event objects.
Fix typo in stream_buffer.c where "size_t xBytesAvailable ); PRIVILEGED_FUNCTION" had the semicolon in the wrong place.
Add testing of Stream Buffers to the AbortDelay.c tests.
Guard inclusion of C code when FreeRTOSConfig.h is included from an assembly file in the ARM7_LPC2129_IAR demo.
Fix minor typos in the Windows demo comment blocks.
2018-04-29 18:15:38 +00:00
Richard Barry
025088c280 Fix regressions introduced by introduction of configMESSAGE_BUFFER_LENGTH_TYPE constant - specifically enabling big endian support and updates to xStreamBufferNextMessageLengthBytes. 2018-03-15 18:31:02 +00:00
Richard Barry
3ec86b7a98 Introduce sbBYTES_TO_STORE_MESSAGE_LENGTH to allow the number of bytes used to hold a message length in a message buffer to be reduced if 4 bytes is always too many (save a little RAM). 2018-03-15 15:51:22 +00:00
Richard Barry
aec45f2479 Import the code coverage test additions from the (unpublished) Visual Studio project to the (published) MingW/Eclipse project.
Update the MingW/Eclipse project to add a code coverage build configuration in addition to the existing Debug build configuration.
Update StreamBufferDemo.c so functions are called directly, rather than via configASSERT(), so their code coverage can be measured when configASSERT() is not defined.
In the Win32 port, replace the call to TerminateProcess() in vPortEndScheduler() with exit( 0 ) - which triggers the writing of the code coverage data to the disk.
Fix bug in ucStreamBufferGetStreamBufferType() - which is only used by the Percepio trace tool.
Update the line within vTaskStartScheduler() that was setting xTickCount to 0 to instead set it to configINITIAL_TICK_COUNT.
2018-03-14 15:58:47 +00:00
Richard Barry
bf8d9f4726 Start moving code coverage tests from VisualStudio (not checked in) to the MingW project (checked in) by creating a second build configuration in the Windows Eclipse project that includes the code coverage command line options. Additionally make minor code updates to ensure configASSERT() is not defined, and the application runs for a finite time, when the code coverage build configuration is used. 2018-03-06 17:23:55 +00:00
Richard Barry
c156522695 Complete testing of changes that allow xQueueOverwrite() to be used on a queue that is part of a queue set.
Fix some compiler warnings in stream_buffer.c.
Update the MingW/Eclipse project so it also includes static allocation tests.
2018-03-05 21:35:50 +00:00
Richard Barry
f9bef06ec0 Introduce xMessageBufferNextLengthBytes() and tests for the same.
Add call to traceTASK_SWITCHED_IN() in vTaskStartScheduler() so trace tools can see the first task to run.
2018-03-04 19:25:14 +00:00
Richard Barry
9ed3a9fe18 Fix buffer clean up in \FreeRTOS_Plus_TCP_Minimal_Windows_Simulator\demo_logging.c.
Update queue code to allow an overwrite operation on a queue that is in a queue set, and add prvTestQueueOverwriteWithQueueSet() to test function.
Update Eclipse Win32 project to bring it closer the the Visual Studio equivalent.
2018-02-26 21:22:44 +00:00
Richard Barry
ff74e7aa63 Allow IP address to be passed into gethostbyname().
Ensure xNetworkBuffersInitialise() doesn't use a semaphore before it has been tested against NULL.
2018-02-18 19:58:26 +00:00
Richard Barry
7ddb8b342d Microblaze port: Place critical section around XIntc_Enable() to protect read/modify/write operation performed inside the library. 2018-01-30 17:42:12 +00:00
Richard Barry
208cc18a90 Ensure data cannot be sent to a TCP socket if the socket is in the process of closing.
Correct definition of StaticTask_t in the case that portUSE_MPU_WRAPPERS is set to 1.
prvTaskCheckFreeStackSpace() now returns configSTACK_DEPTH_TYPE to allow return values greater than max uint16_t value if required.
xStreamBufferSend() and xStreamBufferReceive() no longer clear task notification bits - clearing was unnecessary as only the task notification state is used.
2018-01-30 17:39:14 +00:00
Richard Barry
0fe82b4d91 Correct out of date comment in tasks.c.
Fix typo in comment in queue.h.
2017-12-28 20:20:26 +00:00
Richard Barry
13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 2017-12-18 22:54:18 +00:00
Richard Barry
f998c8119a Update license information text files for the CLI, TCP and UDP products to be correct for V10. 2017-12-13 17:00:13 +00:00
Richard Barry
0d903cf2d6 FreeRTOS+TCP: Added ipconfigSOCKET_HAS_USER_WAKE_CALLBACK configuration option so the user can specify a callback to execute when data arrives.
FreeRTOS+TCP: Improve print output when using WinPCap to assist in selecting the correct network interface.
FreeRTOS kernel: Fix extern "C" { in stream_buffer.h.
FreeRTOS kernel: Correct tskKERNEL_VERSION_NUMBER and tskKERNEL_VERSION_MAJOR constants for V10.
Ensure the currently executing task is printed correctly in vTaskList().
2017-12-12 17:47:56 +00:00
Richard Barry
cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 2017-11-29 16:53:26 +00:00
Richard Barry
e42a701e99 Add missing +TCP code. 2017-08-17 12:26:43 +00:00
Richard Barry
77e95538dc Added +TCP code to main repo. 2017-08-17 12:18:14 +00:00
Richard Barry
037abdddf2 Update TriCore port to work with latest GCC compiler. 2017-08-09 16:57:35 +00:00
Richard Barry
b6f2402f3f Update trace recorder source to fix some compile time warnings. 2017-06-01 14:16:16 +00:00
Richard Barry
2307bc9dfa Add MSVC .vs directory to keep the IDE's windows layout. 2017-06-01 14:15:24 +00:00
Richard Barry
6eea3d8d4b Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURN 2017-05-30 00:36:09 +00:00
Richard Barry
3f74cd483b Update linker script so main stack starts on 8-byte alignment. 2017-05-30 00:17:14 +00:00
Richard Barry
6b8eb1e936 Update IAR project for MSP432 to IAR version 8.11. 2017-05-30 00:03:31 +00:00
Richard Barry
2887612f27 FreeRTOS.h changes to go with the last tasks.c checkin. 2017-05-29 23:08:34 +00:00
Richard Barry
b5d8be2209 Remove obsolete code from prvCheckTasksWaitingTermination(). 2017-05-29 22:55:09 +00:00
Richard Barry
533b533820 Fix typo in comment that got copied into multiple main.c file.s 2017-05-29 22:06:54 +00:00
Richard Barry
504d9c8bab Update the FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator demo to use the latest FreeRTOS+Trace recorder code. 2017-05-29 22:05:25 +00:00
Richard Barry
35f5990e7a Update the MSVC and MingW demos to use the latest FreeRTOS+Trace recorder library. 2017-05-29 21:45:31 +00:00
Richard Barry
f289bfb388 Update to the latest trace recorder library. 2017-05-29 21:43:07 +00:00
Richard Barry
9f84f353d0 Remove configurations other than 'debug' from the Win32 demo. 2017-05-07 18:22:31 +00:00
Richard Barry
2e89c13c1c Cosmetic changes only. 2017-04-26 00:23:57 +00:00
Richard Barry
a99cd32208 Updated name of CORTEX_MPU_CEC_MEC_17xx_Keil_GCC to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC. 2017-04-20 05:33:05 +00:00
Richard Barry
59925359ed Added traceQUEUE_CREATE_FAILED() trace macros into the queue create functions. 2017-04-10 01:58:58 +00:00
Richard Barry
b080f13543 Add more "memory" clobbers into the MPU ports to make them robust to more aggressive optimisation in newer GCC version. 2017-04-10 01:58:01 +00:00
Richard Barry
0f85ead175 Add more "memory" clobbers into asm code of GCC/ARM_CRx_No_GIC port to make it robust with higher optimisation in newer versions of GCC. 2017-04-10 01:01:11 +00:00
Richard Barry
0a7a0a79d6 Updates to prevent warnings when compiled with LLVM. 2017-04-10 00:26:22 +00:00
Richard Barry
8ca40d80a9 Ensure the PIC32 interrupt stack is 8 byte aligned for all values of configISR_STACK_SIZE. 2017-04-09 20:13:48 +00:00
Richard Barry
96db5a3600 PIC32MZ project using later MPLAB X tools. 2017-04-09 19:35:32 +00:00
Richard Barry
ffb228e448 Change name of the CEC and MEC directory to CORTEX_CEC_MEC_17xx_51xx_Keil_GCC as it is also applicable to the MEC5105 part. 2017-04-04 20:21:40 +00:00
Richard Barry
7fc04bfebe Change name of the CEC and MEC directory to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC as it is also applicable to the MEC5105 part. 2017-04-04 20:16:37 +00:00
Richard Barry
464c2660ad Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
2017-03-28 03:13:48 +00:00
Richard Barry
7ee26c1b5e Enable button interrupts in the MSP432 demos in order to test code paths when an MCU exits low power mode for a reason other than a tick interrupt. 2017-03-28 03:12:20 +00:00
Richard Barry
aa810cb926 Ensure vTaskGetInfo() sets the sate of the currently running task to eRunning - previously it was set to eReady. 2017-03-27 20:31:03 +00:00
Richard Barry
3b2bbcb56a Maintenance on MSP432 demo. 2017-03-09 02:13:40 +00:00
Richard Barry
ad5659e93d Housekeeping check-in, no code changes. 2017-03-08 22:19:14 +00:00
Richard Barry
34b194150e Add CEC and MEC 17xx demo that is completely statically allocated. NOT FULLY TESTED YET. 2017-03-08 18:38:02 +00:00
Richard Barry
b9fe24962e Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across asm code as optimisers get more aggressive. 2017-03-07 04:06:10 +00:00
Richard Barry
c3acc441ac Introduce vTaskInternalSetTimeOutState() which does not have a critical section, and add a critical section to the public version of the same. 2017-02-24 02:16:54 +00:00
Richard Barry
9b213e8c34 Add SimpleLink CC3220SF demo. 2017-02-24 02:12:27 +00:00
Richard Barry
67def3c14b Update Reliance Edge fail safe file system to the latest version. 2017-01-24 00:20:35 +00:00
Richard Barry
8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry
979e41c9da Update UltraScale R5 hardware definition and BSP for 2016.4 SDK tools. 2017-01-21 21:59:25 +00:00
Richard Barry
ff55eb920c Update Zynq MPSoC hardware definition and BSP files to be those shipped with the 2016.4 SDK. 2017-01-19 16:33:13 +00:00
Richard Barry
992a3c8c71 Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions.
Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-19 04:11:21 +00:00
Richard Barry
6ffaa6f018 Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the Zynq demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-18 18:33:48 +00:00
Richard Barry
d67dcf9c74 Enhanced priority dis-inheritance functionality in the case where a task that caused another task to inherit its priority times out before obtain a mutex.
Added test code to GenQTest to test the new priority dis-inheritance functionality.
Allow the default names given to the Idle and Timer tasks to be overwridden by definitions in FreeRTOSConfig.h.
2017-01-16 03:58:51 +00:00
Richard Barry
883541bc8e Rename the CORTEX_MPU_MEC17xx_KEIL_GCC directory to CORTEX_MPU_CEC_MEC_Keil_GCC as it is also applicable to the CEC17xx parts. 2017-01-09 21:29:42 +00:00
Richard Barry
c882141175 Change how volatile is used in some of the standard demos to remove compiler warnings in the latest GCC versions. 2017-01-04 05:07:12 +00:00
Richard Barry
ca9edf3531 Increase the priority of the Windows threads used by the FreeRTOS Windows port, and, because the threads have high priority and run on the same core, prevent the port running on single core hosts so as to avoid locking up the host. 2017-01-04 04:48:22 +00:00
Richard Barry
f98b675671 Add MPU project for multiple MEC17xx devices. 2016-12-11 22:56:30 +00:00
Richard Barry
225f13bac2 Update TaskNotify.c to test the condition where a direct to task notification is sent to a suspended task.
Introduce configSTACK_DEPTH_TYPE so the application writer change the type used to specify a stack size from uint16_t to whatever they like.  Defaults to uint16_t if not defined.
Introduce configINITIAL_TICK_COUNT to allow users to start the tick count at something other than 0.  Used for testing, but overflows can be better tested by setting configUSE_16_BIT_TICKS to 1.
Split xQueueGenericReceive() into xQueueReceive(), xQueuePeek() and xQueueSemaphoreTake() as the first step in refactoring xQueueGenericReceive().
Add Cortex-M3 port layer for Code Composer Studio - previously there was only a Cortex-M4F port.
Introduce configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING() to allow applications to prevent portSUPPRESS_TICKS_AND_SLEEP() being called.  Previously the portPRE_SLEEP_PROCESSING() macro could only be used to abort entry into sleep time after clocks had been re-programmed for the distant wake time.
2016-11-25 21:07:56 +00:00
Richard Barry
7fcc976248 Update version of Reliance Edge. 2016-11-21 04:30:49 +00:00
Richard Barry
7cce089e40 Add support for statically allocated memory protected tasks - previously only dynamically allocated tasks could be memory protected. 2016-09-20 13:54:28 +00:00
Richard Barry
5c75e5a38a Correct the definition of StaticTask_t and add additional configASSERT() statements to catch future errors. 2016-09-14 08:21:24 +00:00
Richard Barry
40201bc253 Introduce configRECORD_STACK_HIGH_ADDRESS, which when set will result in both limits of the stack being saved in the TCB to allow enhanced debug capabilities.
Introduce configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H, which allows a user provided header file to be included at the bottom of the tasks.c source file, which can add user functions and access file scope data.
Replace global on/off switches used for lint errors with save/restore switches.
2016-09-04 15:46:34 +00:00
Richard Barry
f11912c5de Clean up lint errors. 2016-08-16 13:44:30 +00:00
Richard Barry
75ffac21d7 Changes to core code and port layer:
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
2016-08-16 11:38:58 +00:00
Richard Barry
bdbf347c22 Remove clrex instruction from Cortex-M ports again as it is implicit in interrupt entry. 2016-06-28 10:39:25 +00:00
Richard Barry
c296e2cff8 Improvements to the Cortex-M ports:
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
2016-06-27 13:13:05 +00:00
Richard Barry
6c975cd46a Final check in before tagging V9.0.0. 2016-05-25 11:47:42 +00:00
Richard Barry
2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
2016-05-20 18:05:46 +00:00
Richard Barry
e23eca901d Preparing for V9.0.0 formal release:
+ Update various projects to use the latest versions of their build tools.
2016-05-20 12:18:59 +00:00
Richard Barry
0063b29cdf Prepare for V9.0.0 release.
+ Set flash wait states on MSP432 demos.
+ Remove use of obsolete IO library in PIC32 demos.
+ Remove obsolete item left on stack of first task to run in the Cortex-M0 ports.
+ Correct IA32 GCC vPortExitCritical() implementation when configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
2016-05-19 13:28:12 +00:00
Richard Barry
e10647f9c0 Increase the test coverage of the GCC MPU demo that runs in the Keil simulator.
Add an MPU demo that uses the Keil simulator that also uses the Keil compiler.
Correct a few version numbers for files recently added to the repository.
2016-05-18 19:51:14 +00:00
Richard Barry
ee9cd40b6d Add GCC ARM Cortex-M4F MPU port.
Add RVDS ARM Cortex-M4F MPU port.
Increase the size of each buffer allocated to pbufs in the Microblaze lwIP demo to prevent pbufs chaining.
Use _start as the top of the stack for each Microblaze task, rather than NULL, as NULL was causing the Xilinx SDK to try and unwind the stack too far.
2016-05-18 10:41:28 +00:00
Richard Barry
fedb98c5f6 Recreated MicroBlaze example using Vivado 2016.1 - the Microblaze project is still a work in progress - not yet fully functional. 2016-05-10 14:05:22 +00:00
Richard Barry
501be60574 Update the Microblaze hardware design and BSP to the latest IP and tool versions. 2016-05-09 15:55:51 +00:00
Richard Barry
324127837c Update some more standard demos for use on 64-bit architectures.
Update the Xilinx Ultrascale+ Cortex-A53 (64-bit) and Cortex-R5 (32-bit) demos to use version 2016.1 of the SDK.
2016-05-06 12:40:27 +00:00
Richard Barry
0cb71ee9ce Update the Xilinx UltraScale+ demo project to use the BSP and hardware platform generated by the 2016.1 version of the SDK. 2016-04-28 12:49:19 +00:00
Richard Barry
11fe9de0f0 Update the Xilinx UltraScale+ 64-bit demo to use the hardware definition and BSP from version 2016.1 of the SDK. 2016-04-28 12:23:52 +00:00
Richard Barry
0721cf102a Completely re-generate the Zynq 7000 demo using the 2016.1 SDK tools.
Introduce configUSE_TASK_FPU_SUPPORT into the GCC Cortex-A9 port to allow tasks to have an FPU context by default.
Add MikroC Cortex-M4F port.
2016-04-25 17:24:54 +00:00
Richard Barry
2ec97696db Remove Zynq 7000 project so it can be re-created using the 2016.1 edition of the SDK. 2016-04-25 13:37:57 +00:00
Richard Barry
0b5906d404 Remove obsolete MPU demos.
Separate the MPU wrappers into their own file so they can be used from future MPU ports.
2016-04-25 12:03:47 +00:00
Richard Barry
afd4b432f6 Improve coverage of the MPU API in the new MPU demo, fixing typos in the MPU port layer as they are found. 2016-04-24 18:33:16 +00:00
Richard Barry
12a0be1e69 Add software timer use to the new MPU demo.
Update CEC1302 demos to demonstrate both aggregated and disaggregated interrupts.
2016-04-24 10:06:20 +00:00
Richard Barry
345819d550 Update the GCC Cortex-A9 port to introduce a version of the IRQ handler that saves the FPU registers. 2016-04-23 10:53:57 +00:00
Richard Barry
ac67c39be9 Update the MPU port so it supports all the public functions found in V9.0.0rc2. 2016-04-20 15:42:34 +00:00
Richard Barry
da6c95edae Update CEC1302 peripheral library version. 2016-04-18 15:52:19 +00:00
Richard Barry
057b38ad23 Updates to support FreeRTOS MPU in FreeRTOS V9.0.0 - including a GCC project that runs in the Keil simulator to allow development and testing. 2016-04-18 10:49:24 +00:00
Richard Barry
255145bde1 xTaskGetTaskHandle() changed to xTaskGetHandle().
Tidy up CEC1302 demo.
Ensure bit 0 of the task address is clear when setting up stack of initial Cortex-M3/4/7 stacks (for strict compliance, although not practically necessary).
vTaskGetTaskInfo() changed to vTaskGetInfo() - with a macro added for backward compatibility.
2016-04-15 11:48:07 +00:00
Richard Barry
ee5386756d Correct selected device in IAR SAMA5D2 project. 2016-04-14 11:18:13 +00:00
Richard Barry
f0f2378961 Add SAMA5D2 Xplained IAR demo. 2016-04-14 11:14:58 +00:00
Richard Barry
5252301cb8 Rename CORTEX_M4F_CEC1302_Keil to CORTEX_M4F_CEC1302_Keil_GCC as it now contains both GCC and Keil projects. 2016-04-07 10:57:36 +00:00
Richard Barry
912445c341 Added GCC project to the CEC1302 demo. 2016-04-07 10:56:04 +00:00
Richard Barry
4b9c4aa757 Correct comment error that was replicated on many different main_full.c files. 2016-04-04 14:53:04 +00:00
Richard Barry
f1725afbe5 Remove compiler warning by ensure prvInitialiseMutex() is not included if configUSE_MUTEXES is 0.
Reduce the number of xTaskCreateStatic() parameters by having the function return the task handle, rather than pass the task handle out using a parameter.  This is also consistent with other objectCreate() functions.
2016-03-31 15:22:10 +00:00
Richard Barry
07ac1399ee Update version number to 9.0.0rc2. 2016-03-30 12:20:36 +00:00
Richard Barry
f9c02d09c3 Update MSP432 projects to use updated driver library files.
Remove references to INCLUDE_pcTaskGetTaskName and INCLUDE_xTimerGetTimerDaemonTaskHandle, which are no longer required.
2016-03-30 11:12:06 +00:00
Richard Barry
b9b64c0889 Make the pcObjectGetName() API function naming consistent - so rename pcTaskGetTaskName() to pcTaskGetName(), rename pcTimerGetTimerName() to pcTimerGetName() and add a #defines in FreeRTOS.h to make the changes backward compatible. 2016-03-29 17:16:34 +00:00
Richard Barry
aeb03e5fa0 Create minor optimisations (just an asm instruction or two) by using consts in a few places where previously a volatile variable that didn't change was used.
Add the simple xTimerGetPeriod() and xTimerGetExpiryTime() functions.
2016-03-29 13:07:27 +00:00
Richard Barry
26d3770fad - Rework the StaticAllocation.c common demo file to reflect the changes to the static allocation object create functions from the previous check-in.
- Correct various typos in comments.
- Add xTimerGetPeriod() function (feature request).
2016-03-29 11:08:42 +00:00
Richard Barry
9dda62372c Update the documentation contained in the header files to be correct for V9.0.0 release candidate 2. 2016-03-26 11:05:42 +00:00
Richard Barry
6568ba6eb0 Notes:
+ The MPU port is not supported in this revision number.
+ The documentation for the static allocation functions in the header files has not yet been updated for this revision.

Kernel updates:
+ Simplify the static allocation of objects implementation.
+ Introduce configSUPPORT_DYNAMIC_ALLOCATION in addition to the existing configSUPPORT_STATIC_ALLOCATION so FreeRTOS can be built without providing a heap at all.

Demo application updates:
+ Update the demos to take into account the new configSUPPORT_DYNAMIC_ALLOCATION constant.
+ Add an MSVC demo that only uses static allocation, and does not include a FreeRTOS heap.
+ Update the MSVC project to use both configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION.
+ Update the MingW project to use only configSUPPORT_DYNAMIC_ALLOCATION.
2016-03-22 16:23:37 +00:00
Richard Barry
283bc18d23 Very minor changes to the EFM32 Giant and Pearl Geckos demos in preparation for pre-release of the projects. 2016-03-18 19:40:03 +00:00
Richard Barry
60537ce7cb Add low power timer library source file for the Pearl Gecko demo.
Fix types in comments.
2016-03-16 17:18:21 +00:00
Richard Barry
9f5095f6bd Rework the low power demo that uses the RTCC clock on the Pearl Gecko, and add attentional test code. 2016-03-16 17:17:07 +00:00
Richard Barry
8ffe75f665 Replace Gecko Simplicity Studio project that had multiple build configurations with one that has a single build configuration and targets the Giant Gecko starter kit. Now there are separate projects for the Giant and Pearl Geckos.
Update the Pearl Gecko project to use the register test tasks that include the FPU registers.
2016-03-02 17:45:55 +00:00
Richard Barry
c0abb762ff Add Pearl Gecko demo.
Fix build error when configSUPPORT_STATIC_ALLOCATION and configNUM_THREAD_LOCAL_STORAGE_POINTERS were greater than zero at the same time.
Allow the pdMS_TO_TICKS macro to be overridden by a definition in FreeRTOSConfig.h.
2016-03-02 16:03:25 +00:00
Richard Barry
780aa7e325 Add files necessary to create a Pearl Gecko build configuration in the new EFM32 SimplicityStudio project. 2016-02-20 15:27:40 +00:00
Richard Barry
f4033581b5 Update FreeRTOS+ version number ready for version 9 release candidate 1. 2016-02-18 19:02:43 +00:00
Richard Barry
d3ba0aa98d Update version number ready for version 9 release candidate 1. 2016-02-18 17:11:14 +00:00
Richard Barry
d7253324cd Prepare for a FreeRTOS V9 release candidate:
- Remove the standard demo files that used the [long since deprecated] alternative API.
- Add standard demo task that tests the new xTaskAbortDelay() function.
- Update the Win32 Visual Studio project to use Visual Studio 2015 Community Edition.
- Rename the xGenericListItem TCB member to xStateListItem as it better describes the member's purpose.
2016-02-18 10:07:42 +00:00
Richard Barry
c7b7b90cc9 Core kernel code changes:
+ Added xTaskAbortDelay() function, which causes a task to exit the Blocked state even before the timeout has expired or the event the task is waiting for has occurred.
+ For efficiency and code size reasons on some architectures, replace many instances of "== pdTRUE" with "!= pdFALSE".
2016-02-14 11:58:11 +00:00
Richard Barry
2acc8f2c99 FreeRTOS source:
- Major refactor to consolidate the multiple places where a task is removed from a ready list and placed in a delay list into a single function, reducing code size, and enabling the easy addition of up-coming functionality.
 - Replace the enum used for task notification states with a uint8_t to reduce the TCB struct size with some compilers, and allow additional members to be added without increasing its size.
 - Rearrange FreeRTOS.h so all INCLUDE_ defaults are grouped together.
2016-02-10 12:58:15 +00:00
Richard Barry
42e73b9b8f Kernel source code:
+ Added xPortIsInsideInterrupt() to RVDS ARM CM4F port - the same will get added to other ports in time.

Demo application code:
+ Added first pass Microchip CEC1302 demo for Keil.
+ Harden the new StaticAllocation.c standard demo tasks against integer promotion rules causing problems on 16-bit architectures.
2016-02-09 16:02:54 +00:00
Richard Barry
732778a971 Test the RTC and BURTC tickless implementations on the Gecko parts, and make correct as appropriate.
Replace some references to the older portTICK_RATE_MS macro with the newer pdMS_TO_TICKS() macro in the standard demo files.
2016-02-03 11:58:30 +00:00
Richard Barry
556de14a1d Update EFM32 demos to include an option to use the RTC as the clock source when using low power tickless mode. 2016-02-01 18:04:50 +00:00
Richard Barry
c4dd17eeb5 Added a build configuration for the Wonder Gecko starter kit to the existing Giant Gecko Simplicity Studio project.
Fix some lint warnings that were generated by some of the new core functionality.
2016-01-31 20:22:00 +00:00
Richard Barry
802af0150c Add vTaskGetTaskInfo() function that allows a TaskStatus_t structure to be returned for an individual task (previously information could only be obtained for all the tasks at once).
Add a member to the TaskStatus_t structure that is used to return the base address of the stack used by the task being queried.
Add xTaskGetTaskHandle() that allows the handle of a task to be looked up from the task's text name.
Continue to document the macros that allow RTOS objects to be created using statically allocated memory.
Introduced vApplicationDaemonTaskStartupHook(), which allows initialisation that that needs to be executed after the scheduler has been started to be executed from the RTOS daemon task.
Call prvResetNextTaskUnblockTime() in xTaskResumeAll() if a task is moved from the pending ready list - this can prevent an unnecessary wake from sleep mode if a task is unblocked by an interrupt while in a low power tickless state.
2016-01-28 16:59:57 +00:00
Richard Barry
b514f4fa4e Baseline the Giant Gecko demo, which now has the first pass at a low power tickless implementation. 2016-01-25 21:17:47 +00:00
Richard Barry
8ef7849199 Ensure the code builds when configSUPPORT_STATIC_ALLOCATION is 0.
Continue to document the new static allocation functions.
2016-01-22 22:09:11 +00:00
Richard Barry
f82953554d Provide the ability to create event groups and software timers using pre statically allocated memory - now all RTOS objects can be created using statically allocated memory.
Rename StaticTCB_t to StaticTask_t.
2016-01-21 14:10:04 +00:00
Richard Barry
68fced741d Continue to add the ability to create RTOS objects using static rather than dynamic memory allocation - now including all the semaphore types.
Update the StaticAllocation.c standard demo file to exercise the new static allocation functions.
2016-01-20 14:04:40 +00:00
Richard Barry
cf0ed4e2ac Implement functionality that allows the memory required to create a queue or semaphore to be allocated statically.
Update the standard demo task that tests statically allocated tasks to also test statically allocated queues.
2016-01-19 13:41:28 +00:00
Richard Barry
eae4815bf3 Rename DummyTCB_t to StaticTCB_t.
Move structures used for static allocation of tasks and queues into FreeRTOS.h from their individual API header files.
Add SAME70 Xplained Atmel Studio project.
Update SAMV71 Atmel Studio project to use Studio 7.
Revert some changes to GenQTest.c standard demo task which only function correctly when a queue registry was used.
2016-01-18 15:57:02 +00:00
Richard Barry
41b5e486dd Remove unused header files from new EFM32 demo.
Prep the code ready to create a tickless implementation.
2016-01-17 16:04:56 +00:00
Richard Barry
53b996077f Add EFM32 Giant Gecko Starter Kit demo - still a work in progress as the low power tick management has not been implemented yet. 2016-01-17 14:34:27 +00:00
Richard Barry
b832d5801f Kernel changes:
Minor change to xQueueGenericReceive() to catch the extreme case of data being placed into a queue between a task timing out and leaving the xQueueGenericReceive() function.
Added xSemaphoreGetCount() macro.


Demo app changes:
Updated countsem.c to test the new xSemaphoreGetCount() macro.
2016-01-12 15:52:44 +00:00
Richard Barry
f81575dcee Correct a comment that had been cut and paste into multiple main.c files. 2016-01-12 10:38:16 +00:00
Richard Barry
5690221c5c Add in the CORTEX_A53_64-bit_UltraScale_MPSoC demo application (a demo has been included in the Xilinx SDK download for some time already).
Update a few demo application files to work with 64-bit data types.
2015-12-22 13:56:20 +00:00
Richard Barry
51560d9a96 FreeRTOS source updates:
+ Add the pre-existing 64-bit Cortex-A53 port layer into the head revision of the main repository.

Demo application updates:
+ Update Zynq demo to use SDK version 2015.4
+ Add task static allocation standard demo to Zynq demo.
+ Make the XScuGic object accessible outside of the vConfigureTickInterrupt(), again in the Zynq demo.
2015-12-21 08:25:41 +00:00
Richard Barry
ea95020ffd Changes to the FreeRTOS code:
+ Introduced xTaskCreateStatic() to allow tasks to be created without any dynamic memory allocation.
+ When a task notification is used to unblock a task from an ISR, but the xHigherPriorityTaskWoken parameter is not used, then pend a context switch to occur during the next tick interrupt.

Demo application changes:
+ Updated TaskNotify.c to test the case where a task is unblocked by an ISR, but does not use its xHigherPriorityTaskWoken parameter.
+ Updated the Win32 MSVC project to test statically allocated tasks being created and deleted.
+ Introduced StaticAllocation.c standard demo task.
2015-12-20 13:44:21 +00:00
Richard Barry
7d6609f8db FreeRTOS source:
+ Previously, if a task was deleted, the memory allocated to the task by the RTOS was freed in the Idle task.  Now if a task deletes another task the memory is freed immediately.  The idle task is however still responsible for freeing the memory when a task deletes itself.
+ Added pcQueueGetQueueName() function to return the name of a queue from its handle, assuming the queue is registers.

Demo application:
+ Update GenQTest to exercise the new pcQueueGetQueueName() function.
+ Delete workspaces from old Eclipse examples, leaving just the projects.
+ Rework comments in the MSVC simply blinky demo.
2015-12-08 20:22:58 +00:00
Richard Barry
94dd3f871b FreeRTOS Source files:
+ Updated all ARM Cortex-M0 ports to include an additional ISB instruction as the scheduler is started.

Demo app files:
+ Fixex build issues in XMC1000 demos.
2015-11-22 22:03:00 +00:00
Richard Barry
fa86d4eece FreeRTOS source changes:
+ heap_1.c and heap_2.c now support configAPPLICATION_ALLOCATED_HEAP (heap_4.c already did) which allows the heap to be placed by the user rather than the linker.

Demo app changes:
+ SAMD20 project has been updated to use Atmel Studio 7.
2015-11-22 21:14:39 +00:00
Richard Barry
e9561c946c Kernel changes:
+ Support tickless idle when configUSE_PREEMPTION is 0 (previously tickless idle was only supported when the pre-emptive scheduler was being used).
+ If a stack was statically allocated, then don't try freeing it if the TCB cannot be allocated.
+ Remove use of INCLUDE_xEventGroupsSetBitsFromISR() pre-processor macro, as it was not tested anyway.

Demo app changes:

+ Updated SAM4L Atmel Studio project to use Atmel Studio 7.
2015-11-20 14:11:11 +00:00
Richard Barry
5e9787978c Final tidy up before tagging V8.2.3. 2015-10-17 17:25:50 +00:00
Richard Barry
825b43a188 Update version number ready for the V8.2.3 release. 2015-10-16 14:57:00 +00:00
Richard Barry
d289525e1b Preparing for maintenance release:
Kernel source changes:
- Added xTaskNotifyStateClear() API function.
- Added the GCC Cortex-R port (existed for a while) into the main download.
- Improved the IAR RL78 port's handling of different memory model combinations.
- Removed some compiler warnings in heap_5.c.

Demo app changes:
- Added example use of xTaskNotifyStateClear() to the TaskNotify standard demo tasks.
2015-10-16 11:29:36 +00:00
Richard Barry
57cc3389a5 Preparing for maintenance release -
Bug fix - issue introduced in V8.2.2 when the current timer list is empty and the overflow timer list is not empty.
Add PIC32MZ EF (floating point) support and update the MZ demo project to test the flop context switching.
Improve efficiency of the stack overflow checking.
Add CLI to RX71M demo.
General tidy up of new RZ and RX projects - including ensuring the UART driver copes with 0 length strings.
Add stack overflow checking to the [old] PIC24 demo.
2015-10-15 20:19:26 +00:00
Richard Barry
38cb08133d Check in RX231 IAR demo. 2015-10-10 20:38:12 +00:00
Richard Barry
c6a4e3191e Add FreeRTOS+CLI examples to the Renesas RZ/T demos.
Fix some compiler warnings.
Correct spellings in comments.
2015-10-10 10:29:29 +00:00
Richard Barry
96ff3925d2 Update FreeRTOS+Trace recorder library to v3.0.2
Add streaming version of the FreeRTOS+Trace recorder, also V3.0.2
2015-10-09 13:30:09 +00:00
Richard Barry
f218cf5680 Demo tasks:
- Complete the demo projects for the RX113 using IAR, GCC and Renesas compilers by including a basic UART CLI.

Standard demo tasks:
- Add some volatile qualifiers to variables in IntQueue.c.
2015-10-05 15:23:09 +00:00
Richard Barry
cd42d2c215 Changes in common files:
Add additional asserts into timers.c.

Trivial changes and changes in demo applications:
RX113 IAR project is not building and running.
Make FreeRTOS_SetupInterrupt() and FreeRTOS_ClearInterrupt() weak symbols in the Zynq SDK repository.
Correct typo in the port layer comments that was cut and paste into multiple files.
2015-10-03 18:48:41 +00:00
Richard Barry
b3f343fdae Update RX231 projects to blink the LED. 2015-09-25 09:33:37 +00:00
Richard Barry
e5c8119b96 Baseline new RX projects before refining and tidying them up. 2015-09-25 08:26:55 +00:00
Richard Barry
87243e4a16 FreeRTOS source:
+ Added Renesas RXv2 port for IAR.

Demo apps:
+ Demo/Rename the CORTEX_R4F_T_GCC_IAR_ARM directory to just Rename the CORTEX_R4F_T_GCC_IAR.
+ Add IAR project for the RX113.
+ Add RX231 e2studio projects for the RX231.
2015-09-23 12:16:10 +00:00
Richard Barry
27ff871a37 Baseline new GCC and Renesas compiler projects for RX71M and RX113 before adding IAR projects. 2015-09-22 08:45:15 +00:00
Richard Barry
b71bb46a5b Modify RZ/T e2studio directory structure to accommodate an IAR project.
Start RZ/T port and demo project.
2015-09-13 21:39:17 +00:00
Richard Barry
aa80622d72 Remove compiler warnings from auto-generated code.
Baseline prior to starting IAR RZ/T project.
2015-09-13 07:30:43 +00:00
Richard Barry
a29dc8d6c6 Add PIC32MEC14xx port and demo application. 2015-09-12 20:47:59 +00:00
Richard Barry
f19497c3d6 Simplify and improve GIC-less Cortex-R4 port.
Add final tests into RZ/T demo.
2015-09-12 12:14:58 +00:00
Richard Barry
b9f235846f Common source code:
- Remove configASSERT() if a queue cannot be created, malloc failed hook will be called anyway.

Demo apps:
- RZ/T blinky demo working, but still lots to do to improve the port.
2015-09-11 13:29:40 +00:00
Richard Barry
28d8a27f8f Initial RZ/T port and demo - work in progress, currently only the tick interrupt can be installed. 2015-09-07 17:29:14 +00:00
Richard Barry
717654471e Update the FreeRTOS+WolfSSL Win32 demo to use the latest WolfSSL libraries. 2015-08-28 13:58:05 +00:00
Richard Barry
02d0847567 Rename the FreeRTOS_Plus_CyaSSL_Windows_Simulator directory to FreeRTOS_Plus_WolfSSL_Windows_Simulator. 2015-08-28 13:49:47 +00:00
Richard Barry
5a6242fbd0 Update WolfSSL library to the latest version. 2015-08-28 13:46:22 +00:00
Richard Barry
8af1ad9bac Rename the CyaSSL directory to WolfSSL 2015-08-28 13:27:31 +00:00
Richard Barry
1b010fbaa7 Final commit before tagging - cosmetic changes only. 2015-08-12 16:45:24 +00:00
Richard Barry
3291f5a08d Final preparation for new release:
FreeRTOS+Trace:
 - Add trace macros for task notifications.
 - Update to the latest trace recorder library.

Demo projects:
 - Only include the CLI command to show run time states if configGENERATE_RUN_TIME_STATS is set to 1.
2015-08-12 10:34:30 +00:00
Richard Barry
99d4f2c454 Update version numbers in preparation for new release. 2015-08-05 12:59:42 +00:00
Richard Barry
b4c3d91aff Add FreeRTOS BSP for Xilinx SDK. 2015-08-05 10:21:59 +00:00
Richard Barry
4c847711bd Common scheduler code:
- Back out changes that allow mutexes to be given from a semaphore after tests showed issues that would not be fast to fix.

Demo projects:

- Update the Microblaze Kintex 7 project and BSP to use version 2015.2 of the Xilinx SDK.
2015-08-04 17:36:55 +00:00
Richard Barry
95eed0c8f3 Preparing for next release...
Zynq ZC702 demo application:
Update the memcpy, memset and memcmp implementations so they don't err with -O3 optimisation.
Update to use the 2015.2 version of the SDK.
2015-08-01 15:00:22 +00:00
Richard Barry
4c3722bd76 Preparing for new release...
Kernel changes:
- Remove an assert that was preventing xQueueSendFromISR() being used to give a mutex from an ISR (mutexes cannot be given using xSemaphoreGiveFromISR()).
- Introduce xTaskNotifyAndQueryFromISR() as the interrupt safe version of xTaskNotifyAndQuery().

Common demo task changes:
- Update IntSemTest.c to prove the theory that it is safe to give a mutex type semaphore from an interrupt using xQueueSendFromISR() instead of xSemaphoreGiveFromISR().
- Update TaskNotify.c to test the new xTaskNotifyAndQuery() from ISR fuction.
2015-08-01 07:03:32 +00:00
Richard Barry
25b911e0bd Add resource filters to the Eclipse project used to build the Galileo demo. 2015-07-30 21:13:03 +00:00
Richard Barry
cff5cfdd4f Preparing for the next release...
New port and demo project:  Intel Galileo.
2015-07-30 11:46:30 +00:00
Richard Barry
8b5c27b679 Preparing for the next release...
PIC32MZ demo application:
- Update to use the latest XC32 compiler.
2015-07-30 11:37:33 +00:00
Richard Barry
672ae6cbb6 Starting to prepare for the next release...
Core FreeRTOS code:
+ Added PRIVILEGED_FUNCTION qualifier to those functions from which it was previously missing.
2015-07-30 11:30:05 +00:00
Richard Barry
d3e053568d MSP430:
Add additional NOPs as required by hardware manual.

Microblaze:
Previously a task inherited the exception enable state from the context from which xTaskCreate() was called.  Now tasks all have exceptions enabled if they are enabled in the hardware.

Windows/GCC:
Improve the implementation of portGET_HIGHEST_PRIORITY.

Common code:
Simplify the pointer use in xQueueGenericCreate()

Demo apps: 
Remove jpg images that were used to create web pages.
Fix capitalisation issues in some demos where some header files are incldued with the wrong case, preventing building on Linux.
Remove the Microblaze demos that are using obsolete tools.
Update main_blinky for the Windows port demo to include a software timer example.
2015-07-26 16:41:12 +00:00
Richard Barry
95b73d40d9 Correct calculation of xHeapStructSize in heap_4 and heap_5.
Convert uint32_t types to size_t types in heap_5.c, as was previously done for heap_4.c.
2015-06-25 12:14:54 +00:00
Richard Barry
4ee2a96861 Add back some files essential for the PIC32MZ build. 2015-06-24 16:49:21 +00:00
Richard Barry
8a1450effc Microblaze: Add a port optimised task selection implementation to the Microblaze port.
Windows port:  Add code to ensure Windows threads are truely suspended before resuming another thread.
Typo correction to the task notification standard demo task.
Correct case of some include file names to fix build issues on Linux.
2015-06-24 15:10:03 +00:00
Richard Barry
cfb8223232 Add SAMV7 (Cortex-M7) demo for Atmel Studio. 2015-06-16 12:38:35 +00:00
Richard Barry
7456c232ce Update library files used in STM32F7 demo to the latest version released by ST. 2015-06-04 15:35:12 +00:00
Richard Barry
267dc24bb3 Kernel changes to improve power saving:
+ The timer task now blocks indefinitely if there are no timers active, allowing eTaskConfirmSleepModeStatus to return eNoTasksWaitingTimeout when configUSE_TIMERS is set to 1.
+ The next unblock time is calculated automatically after a task unblocks when waiting for a notification, allowing deep sleep to be entered earlier.
2015-05-20 15:46:40 +00:00
Richard Barry
067c1573c3 Finalise MSP43FR5969 IAR and CCS demos (hopefully). 2015-04-28 13:53:30 +00:00
Richard Barry
9bb5b40c81 Add CCS project for MSP430FR5969 demo. 2015-04-27 15:23:29 +00:00
Richard Barry
a9d1ff4f5e Change some data types in heap_4.c to allow it to be used on hardware that has 16-bit pointers without generating compiler warnings.
Add a small data model configuration to the MSP43FR5969 IAR demo.
Correct some code comments in the SAMA5D4 demo.
2015-04-27 11:14:11 +00:00
Richard Barry
976a9b44af Rename /Demo/MSP430FR5969_LaunchPad to /Demo/MSP430X_MSP430FR5969_LaunchPad for consistency with other MSP430 demo directory names.
Fixed typos in comments repeated in multiple source files.
2015-04-24 11:42:25 +00:00
Richard Barry
34a7b0431b Complete large memory model MSP430FR5969 demo - including CLI and run-time stats. 2015-04-24 11:34:19 +00:00
Richard Barry
91b249d24b Start of an MSP430FR5969 IAR project - currently running Blinky only. 2015-04-22 15:36:44 +00:00
Richard Barry
d39c0d5926 Update TimerDemo.c to test the new vTimerSetTimerID() function.
Update WinPCap NetworkInterface.c for FreeRTOS+UDP to correctly store a pointer to the network buffer structure at the beginning of the network buffer.
2015-04-13 19:58:51 +00:00
Richard Barry
03213b9e4a Add the errno definitions used by FreeRTOS+TCP and FreeRTOS+FAT into FreeRTOS's projdefs.h.
Remove redundant global definition vPortInstallFreeRTOSVectorTable from the GCC ARM_CA9 portASM.S file.
Ensure correct sequence of start up sequence when the Windows port is used on multi-core Windows machines by starting one thread in the suspended state.
Move initialisation of xNextTaskUnblockTime to the function that starts the scheduler, rather than from where the variable is declared - this fixes a compiler warning in newer IAR compilers.
Fix "elif (SELECTED_PORT == PORT_MICROCHIP_PIC32MX || PORT_MICROCHIP_PIC32MZ)" in the FreeRTOS+Trace trcHardwarePort.h header file.
2015-04-13 18:45:02 +00:00
Richard Barry
8dadb6b87c Final V8.2.1 release ready for tagging:
+ Added MSP432 (ARM Cortex-M4F MSP430!) demos for IAR, Keil and CCS.
+ Renamed directory containing demo for STM32F7 ARM Cortex-M7.
+ Renamed directory containing demo for SAMV71 ARM Cortex-M7.
+ Introduced xTaskNotifyAndQuery().
2015-03-24 15:24:49 +00:00
Richard Barry
693d0520bc Update version number ready for V8.2.1 release. 2015-03-21 21:03:42 +00:00
Richard Barry
63b3c773d5 Kernel changes:
Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0.

New ports:
Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices.
Added Cortex-M4F port layer for CCS.

New demo applications:
Added demo application for STM32F7.
Added demo application for SAMv71.
2015-03-21 14:01:43 +00:00
Richard Barry
2bf93bf925 Minor updates relating to formatting and comments only. 2015-03-20 15:43:20 +00:00
Richard Barry
a61db8f155 Minor updates to the Microblaze KC702 demo to allow easier connection from a Telnet server. 2015-03-16 11:22:43 +00:00
Richard Barry
18ff880e75 Add networking option to the Microblaze Kintex demo. 2015-03-13 15:05:09 +00:00
Richard Barry
3012d9b94d Work-in-progress check in of MicroBlaze Kintex7 demo. 2015-03-10 15:58:19 +00:00
Richard Barry
96e72413f7 Kernel code:
+ Added mtCOVERAGE_TEST_DELAY() macro to facilitate getting better code coverage during testing.
+ Update prvNotifyQueueSetContainer() so it does not call xTaskRemoveFromEventList() if it is called from an interrupt, and the queue is locked.

Demo apps:
Added QueueSetPolling.c/h demo/test functions.
2015-03-04 17:45:18 +00:00
Richard Barry
7d169cef52 Correct typeo that broke the Win32 port. 2015-02-17 14:28:10 +00:00
Richard Barry
86b09bfeb9 Kernel updates:
+ Added vTimerSetTimerID() to compliment vTimerGetTimerID().  Now the timer ID can be used as timer local storage.
+ Updated comments and added some additional assert() calls.

Win32 port:
+ Some changes to allow easier 64-bit builds

PIC24/dsPIC port:
+ Added NOP after disable interrupt instruction.
2015-02-11 15:41:30 +00:00
Richard Barry
dfdc319518 Kernel updates:
- Add user configurable thread local storage array, with get/set access function.
2015-01-26 17:40:35 +00:00
Richard Barry
51aa373c4c Add run-time stats to the Kintex7 Microblaze demo. 2015-01-19 13:34:26 +00:00
Richard Barry
acfbb7dd14 Add the beginnings of a Microblaze project for the KC705. 2015-01-16 19:16:12 +00:00
Richard Barry
501a531d46 Update version number in preparation for official V8.2.0 release. 2015-01-16 13:20:28 +00:00
Richard Barry
c37b2ca39b Demo app changes:
Add a "query heap" command to the standard sample CLI commands.
Remove casting from configMAX_PRIORITIES setting in Win32 simulator demos as it was preventing a clean build. 

Source code changes.
General tidy up and addition of assert points.
2015-01-15 21:37:32 +00:00
Richard Barry
e4e6328300 Remove casting from configMAX_PRIORITIES setting in FAT SL / CLI demo as it was preventing a clean build. 2015-01-07 07:02:17 +00:00
Richard Barry
271393b7d9 Release candidate - this will be tagged as FreeRTOS V8.2.0rc1 and a zip file provided.
Minor lint changes.
2014-12-24 09:40:58 +00:00
Richard Barry
5dd77c7aeb Rename SAM4E demo directory to include the 'F' in 'M4F' - minor point for the sake of consistency. 2014-12-24 08:55:14 +00:00
Richard Barry
6741592026 Update version numbers in preparation for V8.2.0 release candidate 1. 2014-12-21 19:09:18 +00:00
Richard Barry
fd02010886 Kernel changes:
+ Made xTaskNotifyGiveFromISR() its own function, rather than a macro that calls xTaskNotifyFromISR() (minor performance improvement).
+ GCC and Keil Cortex-M4F ports now use vPortRaiseBASEPRI() in place of ulPortRaiseBASEPRI() where the return value is not required (minor performance improvement).

Demo changes:
Change the [very basic] FreeRTOS+UDP SAM4E driver to use task notifications rather than a semaphore (execution time now 55% what it was in FreeRTOS V8.1.2!).
Robustness improvements to IntQueue.c standard demo task.h.
Added the latest standard demo tasks, reg test tasks and int q  tasks to the SAM4E demo.
2014-12-21 10:26:36 +00:00
Richard Barry
2de32c0141 Kernel changes:
+ Do not attempt to free the stack of a deleted task if the stack was statically allocated.
+ Introduce configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - which optionally writes known values into the list and list item data structures in order to assist with the detection of memory corruptions.

Microblase port:  
+Change occurrences of #if XPAR_MICROBLAZE_0_USE_FPU == 1 to 	#if XPAR_MICROBLAZE_0_USE_FPU != 0 as the value can also be 2 or 3.

Demo app modifications:
+ Update Zynq project to use the 2014.4 tools and add in tests for the new task notification feature.
+ Update SAM4S project to include tests for the new task notification feature.
2014-12-19 16:27:56 +00:00
Richard Barry
f407b70dcc + Update demos that use FreeRTOS+Trace to work with the latest trace recorder library.
+ Fix a few compiler warnings.
+ Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
2014-12-18 11:02:15 +00:00
Richard Barry
85fb1cc024 + New feature added: Task notifications.
+ Optimise Cortex-M4F ports by inlining some critical section macros.
+ Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h.
+ Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked.
+ Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos.
+ Update trace recorder code, and some demos to use the new version (more to do).
+ Introduce uxTaskPriorityGetFromISR().
+ Minor typo corrections.
+ Update MingW simulator demo to match the MSVC simulator demo.
2014-12-15 14:13:03 +00:00
Richard Barry
ca22607d14 Core kernel code:
Allow the stats formatting functions to be built in without stdio.h being included inside tasks.c.

Kernel port code:
- Slight change to the Cortex-A GIC-less port to move all non portable code to the application level.

SAMA5D4 demo project:
- Update the Atmel provided library to V1.1.
- Create a DDR build configuration.
- Ensure interrupts are all edge sensitive.
- Update the regtest code to use all 32 flop registers.
2014-10-15 21:01:31 +00:00
Richard Barry
e3263bb9b3 Demo projects only:
+ Remove some #warnings messages from the Cycle 5 - which were left in the code as reminders of tests that were not yet completed but are now.
2014-10-09 15:42:43 +00:00
Richard Barry
9e66637bec Core kernel files:
+ Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2.
+ Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction.  The stack will not grow into the TCB.
+ Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap.  This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM.

Demo application:
+ Add demo for SAMA5D4 using IAR.
2014-10-08 20:31:14 +00:00
Richard Barry
ee541a347d MSP430 Demo projects only:
Update project format to new IAR version.
2014-10-05 20:43:12 +00:00
Richard Barry
e0d9a274e2 Demo project only:
Added comprehensive demo including FreeRTOS+CLI to the Cyclone V SoC project.
2014-10-01 17:28:42 +00:00
Richard Barry
d269f2027a Demo project only: Cyclone V SoC now running from external RAM. 2014-10-01 09:30:35 +00:00
Richard Barry
e2f2cfa816 Added project for Altera Cyclone V SoC, currently running from internal RAM. 2014-09-30 15:32:19 +00:00
Richard Barry
3b0854bf96 Core kernel code:
+ Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt.

Demo applications:
+ Update IntSemTest.c to provide more code coverage in xSemaphoreGenericGiveFromISR().
+ Ensure the MMU is turned on in the RZ IAR demo.  It was already on in the RZ ARM demo.
2014-09-16 14:54:32 +00:00
Richard Barry
b3c040fc27 SAM4L tickless implementation: Bug fix and update the demo project to exercise the fix. 2014-09-16 12:24:14 +00:00
Richard Barry
4f03f7d1bb Demo project only:
Add the new IntSem test/demo code into the MSVC demo project.
2014-09-12 11:32:47 +00:00
Richard Barry
b6e4854f26 Demo tasks only, with the aim of improving test coverage:
+ Split out the code that uses a mutex from an interrupt from GenQTest.c and add to new common demo task IntSemTest.c.
2014-09-11 12:06:27 +00:00
Richard Barry
d55e7e77a2 Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition. 2014-09-02 22:39:54 +00:00
Richard Barry
33cc3a292b Demo code only:
Add the IntQ standard test to the SAM4S project.
2014-09-02 16:06:57 +00:00
Richard Barry
99229b597b Correct potential compiler warning when configUSE_MUTEXES is set to 0.
Add comments.
2014-08-30 20:18:18 +00:00
Richard Barry
a60ce58731 Update version number to 8.1.1 for patch release that re-enables mutexes to be given from an interrupt. 2014-08-29 19:14:23 +00:00
Richard Barry
ff5d3512b3 Core kernel code:
- Re-introduce the ability to give a mutex from an ISR.

Common demo code:
- Add additional tests into the GenQTest files for priority inheritance and using a mutex from an ISR.
2014-08-29 13:53:58 +00:00
Richard Barry
6507701fdf Lower the minimum stack size used by the ATSAMA5 demo. 2014-08-26 16:53:40 +00:00
Richard Barry
7d49c2190c Minor edits prior to tagging V8.1.0. 2014-08-26 16:23:09 +00:00
Richard Barry
d33a14b5fb ***IMMINENT RELEASE NOTICE***
Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days.
2014-08-16 20:19:40 +00:00
Richard Barry
e491610725 Remove some irrelevant CyaSSL files. 2014-08-16 15:43:43 +00:00
Richard Barry
52e687086c Demo application related:
+ Update the RZ IAR project so it targets the RZ RSK rather than custom hardware.
+ Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware.
+ Updated RX64M demos to use the new iodefine.h naming.

Cortex-A9 port related:
+ Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function.
+ Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task.

Core kernel files related:
+ Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
2014-08-16 14:29:39 +00:00
Richard Barry
162448f06b General maintenance - changing comments and correcting spellings only. 2014-08-04 07:57:18 +00:00
Richard Barry
60538c7480 Common demo tasks:
- Add additional tests to GenQTest.c to test the updated priority inheritance mechanism.
- Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases.

SAMA5D3 Xplained IAR demo:
- Remove space being allocated for stacks that are not used.
- Remove explicit enabling of interrupts in ISR handers as this is now done from the central ISR callback before the individual handers are invoked.
- Reduce both the allocated heap size and the stack allocated to each task.
- Enable I cache.
2014-08-04 07:53:20 +00:00
Richard Barry
47f895cb34 Cortex-A5 IAR port:
- Removed SAMA5 specifics from the port layer, and instead call a generic ISR callback as per Cortex-A9 ports.
2014-08-03 19:15:30 +00:00
Richard Barry
b2e739495a Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.:
- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.
2014-08-03 18:37:58 +00:00
Richard Barry
3a3d061cc5 Continue working on the GIC-less Cortex-A5 port for IAR:
- Add in the assert when a task attempts to exit its implementing function without deleting itself.
- Remove obsolete code from the context switch asm code (obsoleted by the fact that there is no mask register).
- Attempt to make code more generic by using definitions for additional register addresses.
2014-07-29 21:31:04 +00:00
Richard Barry
e9b5deb34a Carry on working on SAMA5D3 demo:
- Add full interrupt nesting tests.
- Add additional critical section/context switching tests.
- Set interrupt priorities so everything can run at once without any software watchdog errors.
- Re-enable interrupts in each IRQ handler.
- Add in run-time stats.
2014-07-29 21:28:22 +00:00
Richard Barry
146b46df87 SAMA5D3 demo: Add CDC driver code and use CDC to create a simple command console. 2014-07-23 21:07:03 +00:00
Richard Barry
3d007d0b4b Update CyaSSL to latest version. 2014-07-18 18:54:25 +00:00
Richard Barry
5fcd270398 Re-test Zynq demo now it is using the latest tools. 2014-07-14 14:01:07 +00:00
Richard Barry
bd9d37924d Add back Zynq demo - this time using SDK V14.2. 2014-07-14 13:00:18 +00:00
Richard Barry
96ceb9f537 Remove Zynq demo project ready to recreate the project using the 14.2 version of Xilinx's SDK. 2014-07-14 11:46:34 +00:00
Richard Barry
5b96cf6eea Add 'full' demo to the SAMA5 Xplained demo - but so far without interrupt nesting tests or CLI. 2014-07-12 20:40:33 +00:00
Richard Barry
8ad9b75810 Rename ARM_CAx_No_GIC ARM_CA5_No_GIC and add FreeRTOSConfig setting to specify the number of registers in the FPU unit. 2014-07-12 20:39:22 +00:00
Richard Barry
29336e35b5 SAMA5D3 Xplained demo blinky running. 2014-07-12 19:25:18 +00:00
Richard Barry
f4a1a7d577 Add new port layer for Cortex-A devices without the means to mask interrupt priorities. 2014-07-12 19:21:04 +00:00
Richard Barry
5b96c12e92 Start of SAMA5D3 XPlained demo. 2014-07-09 21:19:01 +00:00
Richard Barry
8aa5fa3459 Make the parameters to vPortDefineHeapRegions() const.
Add additional asserts to the Keil CM3 and CM4F ports (other CM3/4 ports already updated).
Add the additional yield necessitated by the mutex held count to the case when configUSE_QUEUE_SETS is 0.
2014-07-04 13:17:21 +00:00
Richard Barry
4fe2abc792 Update the MSVC simulator demo to demonstrate heap_5 allocator and pdTICKS_TO_MS macro being used. 2014-07-03 16:49:29 +00:00
Richard Barry
d96dc2adb0 Simply some of the alignment calculations in heap_4.c to match those used in heap_5.c.
Remove some apparently obsolete code from xTaskPriorityDisinherit() (a task cannot be both blocked and giving bac a mutex at the same time].
Update the new "mutex held count" increment and decrement functions to allow mutexes to be created before the scheduler is started.
2014-07-03 14:44:37 +00:00
Richard Barry
b0ba273489 Check in the portable.h version required to use heap_5.c. 2014-07-02 10:20:35 +00:00
Richard Barry
4b26dc0614 Check in the new memory allocator that allows the heap to span multiple blocks. 2014-07-02 10:19:49 +00:00
Richard Barry
5e47df8c01 Update FreeRTOS+ components and demos to use typedef names introduced in FreeRTOS V8. 2014-06-20 20:15:20 +00:00
Richard Barry
4ce4de750a Update timer demo in PIC32MZ demo to remove multiple extern definition created by adding in the macro that checks non ISR safe functions are not called from ISRs. 2014-06-16 13:07:01 +00:00
Richard Barry
42b1688a30 Implementation of mutex held counting in tasks.c - needs optimisation before release. 2014-06-16 12:55:50 +00:00
Richard Barry
583b144bc3 Default the definition of portASSERT_IF_IN_ISR() to nothing if it is not defined.
Helper updates to allow a count of the number of mutexes held to be added.
Updates to the CCS Cortex-R4 implementation necessitated by a change in compiler semantics.
Update PIC32MX and MZ ports to assert if a non ISR safe function is called from an ISR.
2014-06-16 12:51:35 +00:00
Richard Barry
b4659d8872 Add code to assert() if non ISR safe API function is called from ISR in Tasking CM4F ports - plus fix bug where the max syscall interrupt priority was used incorrectly in the Tasking CM4F port. 2014-06-15 09:24:08 +00:00
Richard Barry
113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. 2014-06-14 13:56:25 +00:00
Richard Barry
4723209074 Simplify the assert that checks if a non-ISR safe function is called from an ISR in the GCC Cortex-A9 port. 2014-06-13 14:08:28 +00:00
Richard Barry
d45f18cc8d Add additional comments to the Zynq lwIP demo. 2014-06-13 14:06:43 +00:00
Richard Barry
8426eba8e7 Added portASSERT_IF_IN_INTERRUPT() macro to the GCC Cortex A9 port layer. 2014-06-12 16:28:56 +00:00
Richard Barry
de7df3cfda Zynq demo: Fix Xilinx network driver by deferring the function that allocated memory from the interrupt into a task. Add DHCP option. 2014-06-12 16:27:35 +00:00
Richard Barry
f1a0534a56 Remove some of the lwip asserts to allow use with 64-bit alignment. 2014-06-10 16:29:32 +00:00
Richard Barry
7fa64efeeb Switch to using the private watchdog as the run time stats timer in the Zynq demo. 2014-06-10 16:25:46 +00:00
Richard Barry
2f6cb8a86c Reorganise Zynq project after spitting lwIP example into a separate configuration. 2014-06-09 20:20:23 +00:00
Richard Barry
e92795bcc8 Move the Zynq's lwIP example from the Full demo into its own configuration as having the lwIP tasks at a high priority made the self checking test tasks report failures, while having the lwIP tasks at a low priority slugged the throughput. 2014-06-09 19:35:08 +00:00
Richard Barry
be8b0ed21d Update lwIP byte alignment to make Zynq pings more reliable. 2014-06-09 12:43:18 +00:00
Richard Barry
16ff69e873 Update RL78 GCC demo application after testing with fixed compiler. 2014-06-05 12:44:38 +00:00
Richard Barry
9efb5c8b2f Check in RL78 GCC port layer now it has been verified with the fixed compiler. 2014-06-05 12:42:49 +00:00
Richard Barry
5cbab67186 Complete RX64M GCC demo. 2014-06-04 09:19:16 +00:00
Richard Barry
1130a53ec8 Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro.
Update RXv2 GCC port to match RXv2 Renesas port.
2014-06-04 09:17:14 +00:00
Richard Barry
5cd0b1e5ef Add -nomessage command line option to RX64M demo to suppress warning about the yield function being defined when it is not called directly. 2014-05-29 13:56:16 +00:00
Richard Barry
f46070dc79 Ensure demo app files are using FreeRTOS V8 names - a few were missed previously. 2014-05-29 13:54:15 +00:00
Richard Barry
ef254df85f A few additional casts to keep the Renesas RX compiler happy. 2014-05-29 13:39:48 +00:00
Richard Barry
74ffdb0b89 Add lwIP driver into Zynq demo - not yet fully functional. 2014-05-23 16:38:18 +00:00
Richard Barry
09a89763ee Add brackets in lwIP assert statement to prevent compiler warnings. 2014-05-23 16:36:49 +00:00
Richard Barry
b215310e63 Add some missing volatiles to __asm statements in the CA9 GCC port. 2014-05-19 13:14:02 +00:00
Richard Barry
0bb794301a Update version number ready for release. 2014-04-24 14:26:36 +00:00
Richard Barry
911e82a909 Add xQueueGetMutexHolder() to MPU functions. 2014-04-24 12:29:40 +00:00
Richard Barry
f25503977e Event Groups: Convert the 'clear bits from ISR' function into a pended function to fix reentrancy issue.
Event Groups: Ensure the 'wait bits' and 'sync' functions don't return values that still contain some internal control bits.
2014-04-23 15:23:54 +00:00
Richard Barry
fa7222ab4a Update demos that use FreeRTOS+FAT SL to have correct version numbers after the update of FreeRTOS+FAT SL itself. 2014-04-23 14:34:49 +00:00
Richard Barry
03c95b5950 Update IAR XMC4200 project to fix link error that resulted from updating the IAR version to 7.x. 2014-04-23 13:59:56 +00:00
Richard Barry
a46f251d11 Update FreeRTOS+FAT SL to version 1.0.1. 2014-04-23 13:28:21 +00:00
Richard Barry
6af9b013eb Ensure xNewLib_reent is reclaimed when a task is deleted. 2014-04-09 09:07:19 +00:00
Richard Barry
82207ebffa Add test and correct code for the unusual case of a task using an event group to synchronise only with itself.
Add critical sections around call to prvResetNextTaskUnblockTime() that can occur from within a task.
2014-03-31 02:12:17 +00:00
Richard Barry
ef7f3c5320 Add the pcTimerGetTimerName() API function. 2014-03-28 14:41:15 +00:00
Richard Barry
887fcd04f4 Add interrupt nesting test code into RX64M demo. 2014-03-28 13:05:29 +00:00
Richard Barry
42cbd6a778 Add RSK definition and LED flash tasks into RX64M demo. 2014-03-28 11:47:40 +00:00
Richard Barry
29a08b5e24 Update Cortex-A port layers to ensure the ICCRPR and ICCPMR registers are always accessed as 32-bit values. 2014-03-25 17:12:31 +00:00
Richard Barry
d59bf60ff9 Started to create RX64M GCC project - building but not yet converted to new core. 2014-03-20 12:04:49 +00:00
Richard Barry
6fe7e7ef67 Delete old RL78 launch configurations. 2014-03-19 16:45:53 +00:00
Richard Barry
7f7ad3d081 Add RL78/L1C configuration into e2studio demo. 2014-03-19 16:44:58 +00:00
Richard Barry
2283bfb0ae RL78/L1C configuration added to the IAR RL78 demo projects. 2014-03-19 13:29:11 +00:00
Richard Barry
a5f00caf16 Working but incomplete RXv2 demo. 2014-03-07 17:13:05 +00:00
Richard Barry
05a0e4379e First pass at RXv2 port layer. 2014-03-07 17:12:06 +00:00
Richard Barry
3788026636 RXv1 tests running before updating to RXv2. 2014-03-06 12:46:16 +00:00
Richard Barry
b17ab311af Start to create an RX64M demo. 2014-03-03 16:39:41 +00:00
Richard Barry
9bd5e5cf03 Cast away a few unused return types to ensure lint/compilers don't generate warnings when the warning level is high. 2014-02-23 20:01:07 +00:00
Richard Barry
c8953a68cd Add extra #error message as a configuration sanity check. 2014-02-19 13:08:34 +00:00
Richard Barry
ba6d285ea8 Minor updates to ensure all kernel aware debuggers are happy with V8. 2014-02-19 11:58:52 +00:00
Richard Barry
e101e7e437 Update version number to V8.0.0 (without the release candidate number). 2014-02-18 14:01:57 +00:00
Richard Barry
38ae9b76bc Add logic to determine the tick timer source and vector installation into the PIC32MZ port assembly file to allow more efficient interrupt entry. 2014-02-18 10:10:32 +00:00
Richard Barry
c3dd6f6593 Add event group code to the PIC32MZ demo. 2014-02-18 10:08:33 +00:00
Richard Barry
0f6b699eef Linting. 2014-02-17 19:41:29 +00:00
Richard Barry
a2089bbcf6 Add #define INCLUDE_eTaskGetState 1 to the demos that use the int queue test. 2014-02-17 19:32:20 +00:00
Richard Barry
2346014918 Update final demos that use the trace recorder code to use the new version. 2014-02-17 15:11:16 +00:00
Richard Barry
33e11c72c3 Update LPC1830 example to use the latest trace recorder code. 2014-02-17 14:18:00 +00:00
Richard Barry
d6da7b1231 Remove test of trace functions from the Win32/GCC build as it messes up the trace recorder. 2014-02-17 12:56:05 +00:00
Richard Barry
0ccfdd1021 Remove test of trace functions from the Win32 build as it messes up the trace recorder. 2014-02-17 12:48:18 +00:00
Richard Barry
04ae37ef12 Update trace recorder to include heap tracing and new v8 features. 2014-02-17 12:45:56 +00:00
Richard Barry
853696a991 Add event groups demo to SAM4E demo. 2014-02-16 22:03:39 +00:00
Richard Barry
b7eb76904a Add event group tests to IAR LM3S demo. 2014-02-16 21:47:07 +00:00
Richard Barry
e4dbc6b770 Make xEventGroupSetBitsFromISR() a function when configUSE_TRACE_FACILITY is enabled to allow the inclusion of a trace macro. 2014-02-14 11:07:25 +00:00
Richard Barry
b96016e234 Follow instructions on http://blogs.msdn.com/b/vsproject/archive/2009/07/21/enable-c-project-system-logging.aspx to manually prevent MSVC from incorrectly reporting the MSVC demo project as being out of date. 2014-02-11 15:15:36 +00:00
Richard Barry
5a2a8fc319 Update the demo directory to use the version 8 type naming conventions. 2014-02-11 12:04:59 +00:00
Richard Barry
c6d8892b0d Replace xTaskIsTaskSuspended() call with eTaskGetState() call in IntQueue.c as the former is now a private function. 2014-02-11 11:38:33 +00:00
Richard Barry
4f01401c00 Add a small amount of randomisation into the Zynq demo. 2014-02-11 11:37:42 +00:00
Richard Barry
0cc51d99a7 Add event groups demo to Zynq demo.
Add C implementations of some standard library functions to the Zynq demo to prevent the GCC libraries (which use floating point registers as scratch registers) being linked in.
2014-02-11 09:24:33 +00:00
Richard Barry
3eb212f454 Update IAR RL78 demo regtest tasks to make use of SKZ instructions as the latest IAR linker didn't seem to like the previous version. 2014-02-10 19:13:49 +00:00
Richard Barry
84f4ae9aa0 Make xTaskIsTaskSuspended() a private function as it should only be called from within critical sections.
Fix issue in and simplify the xTaskRemoveFromUnorderedEventList() function.  The function is new to the V8 release candidates so does not effect official released code.
2014-02-10 17:02:37 +00:00
Richard Barry
eea669240b Remove inclusion of now removed header file from the RZ/IAR LowLevelInitialise.c file. 2014-02-10 14:22:19 +00:00
Richard Barry
d4ca65f22f Third attempt: Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-10 14:21:17 +00:00
Richard Barry
660162a5b8 Update the Win32/MingW demo to match the latest Win32/MSVC demo. 2014-02-10 14:16:39 +00:00
Richard Barry
d12ec14160 Add configCLEAR_TICK_INTERRUPT() to the IAR and RVDS Cortex-A9 ports.
Replace LDMFD with POP instructions in IAR and RVDS Cortex-A9 ports.
Replace branch to address with indirect branch and exchange to address in register in the IAR and RVDS Cortex-A9 ports.
2014-02-04 17:02:52 +00:00
Richard Barry
9a8da3ff38 Second attempt: Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-04 15:51:48 +00:00
Richard Barry
03f9bbda52 Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-04 14:55:53 +00:00
Richard Barry
481db56078 Related to Zynq demo: Remove compiler warnings when configASSERT() is not defined and set the type of the assembly functions to allow them to be called when the C code is compiled to THUMB instructions. 2014-02-04 14:53:17 +00:00
Richard Barry
f843888e60 Complete GCC/Cortex-A9 port. 2014-02-04 14:49:48 +00:00
Richard Barry
c83414ccc4 Finish the Zynq demo. 2014-02-03 17:39:45 +00:00
Richard Barry
2fc4e89b98 Add in interrupt nesting test. 2014-01-30 14:45:48 +00:00
Richard Barry
d898d16c44 Check in working IntQueueTimer.c for Zynq before overhauling to ensure it conforms to the FreeRTOS style and coding standard. 2014-01-30 12:09:32 +00:00
Richard Barry
6c72f470ac Update Zynq serial.c to be interrupt driven. 2014-01-29 15:20:34 +00:00
Richard Barry
d310ac4552 Add very basic serial CLI to the Zynq demo - needs a lot of tidy up yet! 2014-01-28 17:41:28 +00:00
Richard Barry
51ea2639a9 vQueueAddToRegistry() now takes a const char * instead of a char *.
tmrCOMMAND_CHANGE_PERIOD_FROM_ISR constant added for the "FromISR" version of the software timer change period API function.
2014-01-28 12:32:03 +00:00
Richard Barry
0bf2e615b2 Uncheck the "Do not search standard system directories for header files" compiler option in two RX600 project to ensure stdint.h can be found correctly. 2014-01-27 10:33:57 +00:00
Richard Barry
6130fec60e Introduce xTimerPendFunctionCall().
Change INCLUDE_xTimerPendFunctionCallFromISR to INCLUDE_xTimerPendFunctionCall
Update event group trace macros to match the new trace recorder code.
Ensure parameter name consistency by renaming any occurrences of xBlockTime and xBlockTimeTicks to xTicksToWait.
Continue work on GCC/RL78 port - still a work in progress.
Adjust how the critical section was used in xQueueAddToSet.
2014-01-25 17:01:41 +00:00
Richard Barry
e4f495012f Fixes to FreeRTOS+UDP trace macro parameters and placements. 2014-01-25 09:50:28 +00:00
Richard Barry
888733ef79 Add main_full.c to Zynq demo. Still a work in progress. 2014-01-24 17:11:22 +00:00
Richard Barry
b352be2e23 Tidy up GCC Cortex-A port layer - still a work in progress. 2014-01-24 17:09:31 +00:00
Richard Barry
14f895478d Continue work on GCC/Cortex-A port layer. 2014-01-24 13:27:56 +00:00
Richard Barry
4c9b5d88ae Continue Zynq demo - ParTest.c now working (with single LED), but still very much a work in progress. 2014-01-24 13:27:01 +00:00
Richard Barry
1e26b1875f Remove #error that attempted to catch stdint.h not being included.
Split the previously overloaded trmCOMMAND_nnn definitions into individual definitions to enable better logging.
2014-01-23 14:51:53 +00:00
Richard Barry
d0323e67ae Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up. 2014-01-23 11:51:57 +00:00
Richard Barry
8cb6a4f032 Continue working on Zynq demo - tick interrupt now working but needs tidy up. 2014-01-23 11:50:48 +00:00
Richard Barry
371f6f359a Carry on working on the Zynq demo - still a work in progress. 2014-01-22 15:43:27 +00:00
Richard Barry
3e430b3801 Carry on working on the Cortex-A/GCC port layer - still a work in progress. 2014-01-22 15:39:58 +00:00
Richard Barry
33351b02c9 Beginnings of a project to build the GCC Cortex-A port targeting a Zynq. 2014-01-20 17:55:16 +00:00
Richard Barry
86023aa5a6 Beginnings of GCC Cortex-A port - not yet completely converted from IAR version. 2014-01-20 17:53:30 +00:00
Richard Barry
d8c135e2dc Add extern 'C' to FreeRTOS.h.
Remove obsolete extern declaration of vTaskSwitchContext() from the MPX430X IAR portmacro.h (other older portmacro.h header files contain the same declaration).
2014-01-17 09:45:02 +00:00
Richard Barry
a1b8079df1 Introduce configENABLE_BACKWARD_COMPATIBILITY to allow the #defines that provide backward compatibility with FreeRTOS version prior to V8 to be optionally omitted. 2014-01-13 20:26:47 +00:00
Richard Barry
f01bf9fdc3 Add additional NOP after EINT instruction in MSP430 ports. 2014-01-10 10:38:02 +00:00
Richard Barry
a20e75082e Remove obsolete OpenOCD driver. 2014-01-05 20:41:34 +00:00
Richard Barry
1aaa80fba6 Map portTICK_RATE_MS to portTICK_PERIOD_MS. 2014-01-05 20:40:55 +00:00
Richard Barry
a56d4b998c Minor tidy ups that don't effect code generation, plus:
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
2014-01-05 20:12:20 +00:00
8691 changed files with 145149 additions and 3007938 deletions

View File

@@ -1,568 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* File system includes. */
#include "fat_sl.h"
#include "api_mdriver_ram.h"
#ifdef _WINDOWS_
#define snprintf _snprintf
#endif
#define cliNEW_LINE "\r\n"
/*******************************************************************************
* See the URL in the comments within main.c for the location of the online
* documentation.
******************************************************************************/
/*
* Print out information on a single file.
*/
static void prvCreateFileInfoString( char *pcBuffer, F_FIND *pxFindStruct );
/*
* Copies an existing file into a newly created file.
*/
static portBASE_TYPE prvPerformCopy( const char *pcSourceFile,
int32_t lSourceFileLength,
const char *pcDestinationFile,
char *pxWriteBuffer,
size_t xWriteBufferLen );
/*
* Implements the DIR command.
*/
static portBASE_TYPE prvDIRCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the CD command.
*/
static portBASE_TYPE prvCDCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the DEL command.
*/
static portBASE_TYPE prvDELCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the TYPE command.
*/
static portBASE_TYPE prvTYPECommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the COPY command.
*/
static portBASE_TYPE prvCOPYCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/* Structure that defines the DIR command line command, which lists all the
files in the current directory. */
static const CLI_Command_Definition_t xDIR =
{
"dir", /* The command string to type. */
"\r\ndir:\r\n Lists the files in the current directory\r\n",
prvDIRCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the CD command line command, which changes the
working directory. */
static const CLI_Command_Definition_t xCD =
{
"cd", /* The command string to type. */
"\r\ncd <dir name>:\r\n Changes the working directory\r\n",
prvCDCommand, /* The function to run. */
1 /* One parameter is expected. */
};
/* Structure that defines the TYPE command line command, which prints the
contents of a file to the console. */
static const CLI_Command_Definition_t xTYPE =
{
"type", /* The command string to type. */
"\r\ntype <filename>:\r\n Prints file contents to the terminal\r\n",
prvTYPECommand, /* The function to run. */
1 /* One parameter is expected. */
};
/* Structure that defines the DEL command line command, which deletes a file. */
static const CLI_Command_Definition_t xDEL =
{
"del", /* The command string to type. */
"\r\ndel <filename>:\r\n deletes a file or directory\r\n",
prvDELCommand, /* The function to run. */
1 /* One parameter is expected. */
};
/* Structure that defines the COPY command line command, which deletes a file. */
static const CLI_Command_Definition_t xCOPY =
{
"copy", /* The command string to type. */
"\r\ncopy <source file> <dest file>:\r\n Copies <source file> to <dest file>\r\n",
prvCOPYCommand, /* The function to run. */
2 /* Two parameters are expected. */
};
/*-----------------------------------------------------------*/
void vRegisterFileSystemCLICommands( void )
{
/* Register all the command line commands defined immediately above. */
FreeRTOS_CLIRegisterCommand( &xDIR );
FreeRTOS_CLIRegisterCommand( &xCD );
FreeRTOS_CLIRegisterCommand( &xTYPE );
FreeRTOS_CLIRegisterCommand( &xDEL );
FreeRTOS_CLIRegisterCommand( &xCOPY );
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvTYPECommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn = pdTRUE;
static F_FILE *pxFile = NULL;
int iChar;
size_t xByte;
size_t xColumns = 50U;
/* Ensure there is always a null terminator after each character written. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
/* Ensure the buffer leaves space for the \r\n. */
configASSERT( xWriteBufferLen > ( strlen( cliNEW_LINE ) * 2 ) );
xWriteBufferLen -= strlen( cliNEW_LINE );
if( xWriteBufferLen < xColumns )
{
/* Ensure the loop that uses xColumns as an end condition does not
write off the end of the buffer. */
xColumns = xWriteBufferLen;
}
if( pxFile == NULL )
{
/* The file has not been opened yet. Find the file name. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to open the requested file. */
pxFile = f_open( pcParameter, "r" );
}
if( pxFile != NULL )
{
/* Read the next chunk of data from the file. */
for( xByte = 0; xByte < xColumns; xByte++ )
{
iChar = f_getc( pxFile );
if( iChar == -1 )
{
/* No more characters to return. */
f_close( pxFile );
pxFile = NULL;
break;
}
else
{
pcWriteBuffer[ xByte ] = ( char ) iChar;
}
}
}
if( pxFile == NULL )
{
/* Either the file was not opened, or all the data from the file has
been returned and the file is now closed. */
xReturn = pdFALSE;
}
strcat( pcWriteBuffer, cliNEW_LINE );
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvCDCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength;
unsigned char ucReturned;
size_t xStringLength;
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to move to the requested directory. */
ucReturned = f_chdir( pcParameter );
if( ucReturned == F_NO_ERROR )
{
sprintf( pcWriteBuffer, "In: " );
xStringLength = strlen( pcWriteBuffer );
f_getcwd( &( pcWriteBuffer[ xStringLength ] ), ( unsigned char ) ( xWriteBufferLen - xStringLength ) );
}
else
{
sprintf( pcWriteBuffer, "Error" );
}
strcat( pcWriteBuffer, cliNEW_LINE );
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvDIRCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
static F_FIND *pxFindStruct = NULL;
unsigned char ucReturned;
portBASE_TYPE xReturn = pdFALSE;
/* This assumes pcWriteBuffer is long enough. */
( void ) pcCommandString;
/* Ensure the buffer leaves space for the \r\n. */
configASSERT( xWriteBufferLen > ( strlen( cliNEW_LINE ) * 2 ) );
xWriteBufferLen -= strlen( cliNEW_LINE );
if( pxFindStruct == NULL )
{
/* This is the first time this function has been executed since the Dir
command was run. Create the find structure. */
pxFindStruct = ( F_FIND * ) pvPortMalloc( sizeof( F_FIND ) );
if( pxFindStruct != NULL )
{
ucReturned = f_findfirst( "*.*", pxFindStruct );
if( ucReturned == F_NO_ERROR )
{
prvCreateFileInfoString( pcWriteBuffer, pxFindStruct );
xReturn = pdPASS;
}
else
{
snprintf( pcWriteBuffer, xWriteBufferLen, "Error: f_findfirst() failed." );
}
}
else
{
snprintf( pcWriteBuffer, xWriteBufferLen, "Failed to allocate RAM (using heap_4.c will prevent fragmentation)." );
}
}
else
{
/* The find struct has already been created. Find the next file in
the directory. */
ucReturned = f_findnext( pxFindStruct );
if( ucReturned == F_NO_ERROR )
{
prvCreateFileInfoString( pcWriteBuffer, pxFindStruct );
xReturn = pdPASS;
}
else
{
/* There are no more files. Free the find structure. */
vPortFree( pxFindStruct );
pxFindStruct = NULL;
/* No string to return. */
pcWriteBuffer[ 0 ] = 0x00;
}
}
strcat( pcWriteBuffer, cliNEW_LINE );
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvDELCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength;
unsigned char ucReturned;
/* This function assumes xWriteBufferLen is large enough! */
( void ) xWriteBufferLen;
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to delete the file. */
ucReturned = f_delete( pcParameter );
if( ucReturned == F_NO_ERROR )
{
sprintf( pcWriteBuffer, "%s was deleted", pcParameter );
}
else
{
sprintf( pcWriteBuffer, "Error" );
}
strcat( pcWriteBuffer, cliNEW_LINE );
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvCOPYCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
char *pcSourceFile, *pcDestinationFile;
portBASE_TYPE xParameterStringLength;
long lSourceLength, lDestinationLength = 0;
/* Obtain the name of the destination file. */
pcDestinationFile = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
2, /* Return the second parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcDestinationFile );
/* Obtain the name of the source file. */
pcSourceFile = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcSourceFile );
/* Terminate the string. */
pcSourceFile[ xParameterStringLength ] = 0x00;
/* See if the source file exists, obtain its length if it does. */
lSourceLength = f_filelength( pcSourceFile );
if( lSourceLength == 0 )
{
sprintf( pcWriteBuffer, "Source file does not exist" );
}
else
{
/* See if the destination file exists. */
lDestinationLength = f_filelength( pcDestinationFile );
if( lDestinationLength != 0 )
{
sprintf( pcWriteBuffer, "Error: Destination file already exists" );
}
}
/* Continue only if the source file exists and the destination file does
not exist. */
if( ( lSourceLength != 0 ) && ( lDestinationLength == 0 ) )
{
if( prvPerformCopy( pcSourceFile, lSourceLength, pcDestinationFile, pcWriteBuffer, xWriteBufferLen ) == pdPASS )
{
sprintf( pcWriteBuffer, "Copy made" );
}
else
{
sprintf( pcWriteBuffer, "Error during copy" );
}
}
strcat( pcWriteBuffer, cliNEW_LINE );
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvPerformCopy( const char *pcSourceFile,
int32_t lSourceFileLength,
const char *pcDestinationFile,
char *pxWriteBuffer,
size_t xWriteBufferLen )
{
int32_t lBytesRead = 0, lBytesToRead, lBytesRemaining;
F_FILE *pxFile;
portBASE_TYPE xReturn = pdPASS;
/* NOTE: Error handling has been omitted for clarity. */
while( lBytesRead < lSourceFileLength )
{
/* How many bytes are left? */
lBytesRemaining = lSourceFileLength - lBytesRead;
/* How many bytes should be read this time around the loop. Can't
read more bytes than will fit into the buffer. */
if( lBytesRemaining > ( long ) xWriteBufferLen )
{
lBytesToRead = ( long ) xWriteBufferLen;
}
else
{
lBytesToRead = lBytesRemaining;
}
/* Open the source file, seek past the data that has already been
read from the file, read the next block of data, then close the
file again so the destination file can be opened. */
pxFile = f_open( pcSourceFile, "r" );
if( pxFile != NULL )
{
f_seek( pxFile, lBytesRead, F_SEEK_SET );
f_read( pxWriteBuffer, lBytesToRead, 1, pxFile );
f_close( pxFile );
}
else
{
xReturn = pdFAIL;
break;
}
/* Open the destination file and write the block of data to the end of
the file. */
pxFile = f_open( pcDestinationFile, "a" );
if( pxFile != NULL )
{
f_write( pxWriteBuffer, lBytesToRead, 1, pxFile );
f_close( pxFile );
}
else
{
xReturn = pdFAIL;
break;
}
lBytesRead += lBytesToRead;
}
return xReturn;
}
/*-----------------------------------------------------------*/
static void prvCreateFileInfoString( char *pcBuffer, F_FIND *pxFindStruct )
{
const char *pcWritableFile = "writable file", *pcReadOnlyFile = "read only file", *pcDirectory = "directory";
const char * pcAttrib;
/* Point pcAttrib to a string that describes the file. */
if( ( pxFindStruct->attr & F_ATTR_DIR ) != 0 )
{
pcAttrib = pcDirectory;
}
else if( pxFindStruct->attr & F_ATTR_READONLY )
{
pcAttrib = pcReadOnlyFile;
}
else
{
pcAttrib = pcWritableFile;
}
/* Create a string that includes the file name, the file size and the
attributes string. */
sprintf( pcBuffer, "%s [%s] [size=%d]", pxFindStruct->filename, pcAttrib, ( int ) pxFindStruct->filesize );
}

View File

@@ -1,419 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
*
* See the following URL for information on the commands defined in this file:
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Ethernet_Related_CLI_Commands.shtml
*
******************************************************************************/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
#ifndef configINCLUDE_TRACE_RELATED_CLI_COMMANDS
#define configINCLUDE_TRACE_RELATED_CLI_COMMANDS 0
#endif
/*
* Implements the task-stats command.
*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the run-time-stats command.
*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the echo-three-parameters command.
*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the echo-parameters command.
*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the "trace start" and "trace stop" commands;
*/
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
#endif
/* Structure that defines the "run-time-stats" command line command. This
generates a table that shows how much run time each task has */
static const CLI_Command_Definition_t xRunTimeStats =
{
"run-time-stats", /* The command string to type. */
"\r\nrun-time-stats:\r\n Displays a table showing how much processing time each FreeRTOS task has used\r\n",
prvRunTimeStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "task-stats" command line command. This generates
a table that gives information on each task in the system. */
static const CLI_Command_Definition_t xTaskStats =
{
"task-stats", /* The command string to type. */
"\r\ntask-stats:\r\n Displays a table showing the state of each FreeRTOS task\r\n",
prvTaskStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "echo_3_parameters" command line command. This
takes exactly three parameters that the command simply echos back one at a
time. */
static const CLI_Command_Definition_t xThreeParameterEcho =
{
"echo-3-parameters",
"\r\necho-3-parameters <param1> <param2> <param3>:\r\n Expects three parameters, echos each in turn\r\n",
prvThreeParameterEchoCommand, /* The function to run. */
3 /* Three parameters are expected, which can take any value. */
};
/* Structure that defines the "echo_parameters" command line command. This
takes a variable number of parameters that the command simply echos back one at
a time. */
static const CLI_Command_Definition_t xParameterEcho =
{
"echo-parameters",
"\r\necho-parameters <...>:\r\n Take variable number of parameters, echos each in turn\r\n",
prvParameterEchoCommand, /* The function to run. */
-1 /* The user can enter any number of commands. */
};
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
/* Structure that defines the "trace" command line command. This takes a single
parameter, which can be either "start" or "stop". */
static const CLI_Command_Definition_t xStartStopTrace =
{
"trace",
"\r\ntrace [start | stop]:\r\n Starts or stops a trace recording for viewing in FreeRTOS+Trace\r\n",
prvStartStopTraceCommand, /* The function to run. */
1 /* One parameter is expected. Valid values are "start" and "stop". */
};
#endif /* configINCLUDE_TRACE_RELATED_CLI_COMMANDS */
/*-----------------------------------------------------------*/
void vRegisterSampleCLICommands( void )
{
/* Register all the command line commands defined immediately above. */
FreeRTOS_CLIRegisterCommand( &xTaskStats );
FreeRTOS_CLIRegisterCommand( &xRunTimeStats );
FreeRTOS_CLIRegisterCommand( &xThreeParameterEcho );
FreeRTOS_CLIRegisterCommand( &xParameterEcho );
#if( configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1 )
{
FreeRTOS_CLIRegisterCommand( & xStartStopTrace );
}
#endif
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *const pcHeader = "Task State Priority Stack #\r\n************************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskList( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char * const pcHeader = "Task Abs Time % Time\r\n****************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskGetRunTimeStats( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The three parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", ( int ) lParameterNumber );
strncat( pcWriteBuffer, pcParameter, xParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
if( lParameterNumber == 3L )
{
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
xReturn = pdFALSE;
lParameterNumber = 0L;
}
else
{
/* There are more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
if( pcParameter != NULL )
{
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", ( int ) lParameterNumber );
strncat( pcWriteBuffer, pcParameter, xParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* There might be more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
else
{
/* No more parameters were found. Make sure the write buffer does
not contain a valid string. */
pcWriteBuffer[ 0 ] = 0x00;
/* No more data to return. */
xReturn = pdFALSE;
/* Start over the next time this command is executed. */
lParameterNumber = 0;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE lParameterStringLength;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* There are only two valid parameter values. */
if( strncmp( pcParameter, "start", strlen( "start" ) ) == 0 )
{
/* Start or restart the trace. */
vTraceStop();
vTraceClear();
vTraceStart();
sprintf( pcWriteBuffer, "Trace recording (re)started.\r\n" );
}
else if( strncmp( pcParameter, "stop", strlen( "stop" ) ) == 0 )
{
/* End the trace, if one is running. */
vTraceStop();
sprintf( pcWriteBuffer, "Stopping trace recording.\r\n" );
}
else
{
sprintf( pcWriteBuffer, "Valid parameters are 'start' and 'stop'.\r\n" );
}
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
#endif /* configINCLUDE_TRACE_RELATED_CLI_COMMANDS */

View File

@@ -1,351 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
*
* See the following URL for information on the commands defined in this file:
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Ethernet_Related_CLI_Commands.shtml
*
******************************************************************************/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* FreeRTOS+UDP includes, just to make the stats available to the CLI
commands. */
#include "FreeRTOS_UDP_IP.h"
#include "FreeRTOS_Sockets.h"
/*
* Defines a command that prints out IP address information.
*/
static portBASE_TYPE prvDisplayIPConfig( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that prints out the gathered demo debug stats.
*/
static portBASE_TYPE prvDisplayIPDebugStats( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that sends an ICMP ping request to an IP address.
*/
static portBASE_TYPE prvPingCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/* Structure that defines the "ip-config" command line command. */
static const CLI_Command_Definition_t xIPConfig =
{
"ip-config",
"ip-config:\r\n Displays IP address configuration\r\n\r\n",
prvDisplayIPConfig,
0
};
#if configINCLUDE_DEMO_DEBUG_STATS != 0
/* Structure that defines the "ip-debug-stats" command line command. */
static const CLI_Command_Definition_t xIPDebugStats =
{
"ip-debug-stats", /* The command string to type. */
"ip-debug-stats:\r\n Shows some IP stack stats useful for debug - an example only.\r\n\r\n",
prvDisplayIPDebugStats, /* The function to run. */
0 /* No parameters are expected. */
};
#endif /* configINCLUDE_DEMO_DEBUG_STATS */
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
/* Structure that defines the "ping" command line command. This takes an IP
address or host name and (optionally) the number of bytes to ping as
parameters. */
static const CLI_Command_Definition_t xPing =
{
"ping",
"ping <ipaddress> <optional:bytes to send>:\r\n for example, ping 192.168.0.3 8, or ping www.example.com\r\n\r\n",
prvPingCommand, /* The function to run. */
-1 /* Ping can take either one or two parameter, so the number of parameters has to be determined by the ping command implementation. */
};
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
/*-----------------------------------------------------------*/
void vRegisterUDPCLICommands( void )
{
/* Register all the command line commands defined immediately above. */
FreeRTOS_CLIRegisterCommand( &xIPConfig );
#if configINCLUDE_DEMO_DEBUG_STATS == 1
{
FreeRTOS_CLIRegisterCommand( &xIPDebugStats );
}
#endif /* configINCLUDE_DEMO_DEBUG_STATS */
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
{
FreeRTOS_CLIRegisterCommand( &xPing );
}
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
}
/*-----------------------------------------------------------*/
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
static portBASE_TYPE prvPingCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
char * pcParameter;
portBASE_TYPE lParameterStringLength, xReturn;
uint32_t ulIPAddress, ulBytesToPing;
const uint32_t ulDefaultBytesToPing = 8UL;
char cBuffer[ 16 ];
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Start with an empty string. */
pcWriteBuffer[ 0 ] = 0x00;
/* Obtain the number of bytes to ping. */
pcParameter = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
2, /* Return the second parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
if( pcParameter == NULL )
{
/* The number of bytes was not specified, so default it. */
ulBytesToPing = ulDefaultBytesToPing;
}
else
{
ulBytesToPing = atol( pcParameter );
}
/* Obtain the IP address string. */
pcParameter = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to obtain the IP address. If the first character is not a
digit, assume the host name has been passed in. */
if( ( *pcParameter >= '0' ) && ( *pcParameter <= '9' ) )
{
ulIPAddress = FreeRTOS_inet_addr( pcParameter );
}
else
{
/* Terminate the host name. */
pcParameter[ lParameterStringLength ] = 0x00;
/* Attempt to resolve host. */
ulIPAddress = FreeRTOS_gethostbyname( pcParameter );
}
/* Convert IP address, which may have come from a DNS lookup, to string. */
FreeRTOS_inet_ntoa( ulIPAddress, cBuffer );
if( ulIPAddress != 0 )
{
xReturn = FreeRTOS_SendPingRequest( ulIPAddress, ( uint16_t ) ulBytesToPing, portMAX_DELAY );
}
else
{
xReturn = pdFALSE;
}
if( xReturn == pdFALSE )
{
sprintf( pcWriteBuffer, "%s", "Could not send ping request\r\n" );
}
else
{
sprintf( pcWriteBuffer, "Ping sent to %s with identifier %d\r\n", cBuffer, ( int ) xReturn );
}
return pdFALSE;
}
/*-----------------------------------------------------------*/
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
#if configINCLUDE_DEMO_DEBUG_STATS != 0
static portBASE_TYPE prvDisplayIPDebugStats( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
static portBASE_TYPE xIndex = -1;
extern xExampleDebugStatEntry_t xIPTraceValues[];
portBASE_TYPE xReturn;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
xIndex++;
if( xIndex < xExampleDebugStatEntries() )
{
sprintf( pcWriteBuffer, "%s %d\r\n", ( char * ) xIPTraceValues[ xIndex ].pucDescription, ( int ) xIPTraceValues[ xIndex ].ulData );
xReturn = pdPASS;
}
else
{
/* Reset the index for the next time it is called. */
xIndex = -1;
/* Ensure nothing remains in the write buffer. */
pcWriteBuffer[ 0 ] = 0x00;
xReturn = pdFALSE;
}
return xReturn;
}
/*-----------------------------------------------------------*/
#endif /* configINCLUDE_DEMO_DEBUG_STATS */
static portBASE_TYPE prvDisplayIPConfig( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
static portBASE_TYPE xIndex = 0;
portBASE_TYPE xReturn;
uint32_t ulAddress;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
switch( xIndex )
{
case 0 :
FreeRTOS_GetAddressConfiguration( &ulAddress, NULL, NULL, NULL );
sprintf( pcWriteBuffer, "\r\nIP address " );
xReturn = pdTRUE;
xIndex++;
break;
case 1 :
FreeRTOS_GetAddressConfiguration( NULL, &ulAddress, NULL, NULL );
sprintf( pcWriteBuffer, "\r\nNet mask " );
xReturn = pdTRUE;
xIndex++;
break;
case 2 :
FreeRTOS_GetAddressConfiguration( NULL, NULL, &ulAddress, NULL );
sprintf( pcWriteBuffer, "\r\nGateway address " );
xReturn = pdTRUE;
xIndex++;
break;
case 3 :
FreeRTOS_GetAddressConfiguration( NULL, NULL, NULL, &ulAddress );
sprintf( pcWriteBuffer, "\r\nDNS server address " );
xReturn = pdTRUE;
xIndex++;
break;
default :
ulAddress = 0;
sprintf( pcWriteBuffer, "\r\n\r\n" );
xReturn = pdFALSE;
xIndex = 0;
break;
}
if( ulAddress != 0 )
{
FreeRTOS_inet_ntoa( ulAddress, ( &( pcWriteBuffer[ strlen( pcWriteBuffer ) ] ) ) );
}
return xReturn;
}
/*-----------------------------------------------------------*/

View File

@@ -1,359 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*******************************************************************************
* See the URL in the comments within main.c for the location of the online
* documentation.
******************************************************************************/
/* Standard includes. */
#include <stdio.h>
#include <string.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
/* File system includes. */
#include "fat_sl.h"
#include "api_mdriver_ram.h"
/* 8.3 format, plus null terminator. */
#define fsMAX_FILE_NAME_LEN 13
/* The number of bytes read/written to the example files at a time. */
#define fsRAM_BUFFER_SIZE 200
/* The number of bytes written to the file that uses f_putc() and f_getc(). */
#define fsPUTC_FILE_SIZE 100
/*-----------------------------------------------------------*/
/*
* Creates and verifies different files on the volume, demonstrating the use of
* various different API functions.
*/
void vCreateAndVerifySampleFiles( void );
/*
* Create a set of example files in the root directory of the volume using
* f_write().
*/
static void prvCreateDemoFilesUsing_f_write( void );
/*
* Use f_read() to read back and verify the files that were created by
* prvCreateDemoFilesUsing_f_write().
*/
static void prvVerifyDemoFileUsing_f_read( void );
/*
* Create an example file in a sub-directory using f_putc().
*/
static void prvCreateDemoFileUsing_f_putc( void );
/*
* Use f_getc() to read back and verify the file that was created by
* prvCreateDemoFileUsing_f_putc().
*/
static void prvVerifyDemoFileUsing_f_getc( void );
/*-----------------------------------------------------------*/
/* A buffer used to both create content to write to disk, and read content back
from a disk. Note there is no mutual exclusion on this buffer. */
static char cRAMBuffer[ fsRAM_BUFFER_SIZE ];
/* Names of directories that are created. */
static const char *pcRoot = "/", *pcDirectory1 = "SUB1", *pcDirectory2 = "SUB2", *pcFullPath = "/SUB1/SUB2";
/*-----------------------------------------------------------*/
void vCreateAndVerifySampleFiles( void )
{
unsigned char ucStatus;
/* First create the volume. */
ucStatus = f_initvolume( ram_initfunc );
/* It is expected that the volume is not formatted. */
if( ucStatus == F_ERR_NOTFORMATTED )
{
/* Format the created volume. */
ucStatus = f_format( F_FAT12_MEDIA );
}
if( ucStatus == F_NO_ERROR )
{
/* Create a set of files using f_write(). */
prvCreateDemoFilesUsing_f_write();
/* Read back and verify the files that were created using f_write(). */
prvVerifyDemoFileUsing_f_read();
/* Create sub directories two deep then create a file using putc. */
prvCreateDemoFileUsing_f_putc();
/* Read back and verify the file created by
prvCreateDemoFileUsing_f_putc(). */
prvVerifyDemoFileUsing_f_getc();
}
}
/*-----------------------------------------------------------*/
static void prvCreateDemoFilesUsing_f_write( void )
{
portBASE_TYPE xFileNumber, xWriteNumber;
char cFileName[ fsMAX_FILE_NAME_LEN ];
const portBASE_TYPE xMaxFiles = 5;
long lItemsWritten;
F_FILE *pxFile;
/* Create xMaxFiles files. Each created file will be
( xFileNumber * fsRAM_BUFFER_SIZE ) bytes in length, and filled
with a different repeating character. */
for( xFileNumber = 1; xFileNumber <= xMaxFiles; xFileNumber++ )
{
/* Generate a file name. */
sprintf( cFileName, "root%03d.txt", ( int ) xFileNumber );
/* Obtain the current working directory and print out the file name and
the directory into which the file is being written. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
/* Open the file, creating the file if it does not already exist. */
pxFile = f_open( cFileName, "w" );
configASSERT( pxFile );
/* Fill the RAM buffer with data that will be written to the file. This
is just a repeating ascii character that indicates the file number. */
memset( cRAMBuffer, ( int ) ( '0' + xFileNumber ), fsRAM_BUFFER_SIZE );
/* Write the RAM buffer to the opened file a number of times. The
number of times the RAM buffer is written to the file depends on the
file number, so the length of each created file will be different. */
for( xWriteNumber = 0; xWriteNumber < xFileNumber; xWriteNumber++ )
{
lItemsWritten = f_write( cRAMBuffer, fsRAM_BUFFER_SIZE, 1, pxFile );
configASSERT( lItemsWritten == 1 );
}
/* Close the file so another file can be created. */
f_close( pxFile );
}
}
/*-----------------------------------------------------------*/
static void prvVerifyDemoFileUsing_f_read( void )
{
portBASE_TYPE xFileNumber, xReadNumber;
char cFileName[ fsMAX_FILE_NAME_LEN ];
const portBASE_TYPE xMaxFiles = 5;
long lItemsRead, lChar;
F_FILE *pxFile;
/* Read back the files that were created by
prvCreateDemoFilesUsing_f_write(). */
for( xFileNumber = 1; xFileNumber <= xMaxFiles; xFileNumber++ )
{
/* Generate the file name. */
sprintf( cFileName, "root%03d.txt", ( int ) xFileNumber );
/* Obtain the current working directory and print out the file name and
the directory from which the file is being read. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
/* Open the file for reading. */
pxFile = f_open( cFileName, "r" );
configASSERT( pxFile );
/* Read the file into the RAM buffer, checking the file contents are as
expected. The size of the file depends on the file number. */
for( xReadNumber = 0; xReadNumber < xFileNumber; xReadNumber++ )
{
/* Start with the RAM buffer clear. */
memset( cRAMBuffer, 0x00, fsRAM_BUFFER_SIZE );
lItemsRead = f_read( cRAMBuffer, fsRAM_BUFFER_SIZE, 1, pxFile );
configASSERT( lItemsRead == 1 );
/* Check the RAM buffer is filled with the expected data. Each
file contains a different repeating ascii character that indicates
the number of the file. */
for( lChar = 0; lChar < fsRAM_BUFFER_SIZE; lChar++ )
{
configASSERT( cRAMBuffer[ lChar ] == ( '0' + ( char ) xFileNumber ) );
}
}
/* Close the file. */
f_close( pxFile );
}
}
/*-----------------------------------------------------------*/
static void prvCreateDemoFileUsing_f_putc( void )
{
unsigned char ucReturn;
int iByte, iReturned;
F_FILE *pxFile;
char cFileName[ fsMAX_FILE_NAME_LEN ];
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
/* Create a sub directory. */
ucReturn = f_mkdir( pcDirectory1 );
configASSERT( ucReturn == F_NO_ERROR );
/* Move into the created sub-directory. */
ucReturn = f_chdir( pcDirectory1 );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
/* Create a subdirectory in the new directory. */
ucReturn = f_mkdir( pcDirectory2 );
configASSERT( ucReturn == F_NO_ERROR );
/* Move into the directory just created - now two directories down from
the root. */
ucReturn = f_chdir( pcDirectory2 );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
configASSERT( strcmp( cRAMBuffer, pcFullPath ) == 0 );
/* Generate the file name. */
sprintf( cFileName, "%s.txt", pcDirectory2 );
/* Print out the file name and the directory into which the file is being
written. */
pxFile = f_open( cFileName, "w" );
/* Create a file 1 byte at a time. The file is filled with incrementing
ascii characters starting from '0'. */
for( iByte = 0; iByte < fsPUTC_FILE_SIZE; iByte++ )
{
iReturned = f_putc( ( ( int ) '0' + iByte ), pxFile );
configASSERT( iReturned == ( ( int ) '0' + iByte ) );
}
/* Finished so close the file. */
f_close( pxFile );
/* Move back to the root directory. */
ucReturn = f_chdir( "../.." );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
configASSERT( strcmp( cRAMBuffer, pcRoot ) == 0 );
}
/*-----------------------------------------------------------*/
static void prvVerifyDemoFileUsing_f_getc( void )
{
unsigned char ucReturn;
int iByte, iReturned;
F_FILE *pxFile;
char cFileName[ fsMAX_FILE_NAME_LEN ];
/* Move into the directory in which the file was created. */
ucReturn = f_chdir( pcFullPath );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
configASSERT( strcmp( cRAMBuffer, pcFullPath ) == 0 );
/* Generate the file name. */
sprintf( cFileName, "%s.txt", pcDirectory2 );
/* This time the file is opened for reading. */
pxFile = f_open( cFileName, "r" );
/* Read the file 1 byte at a time. */
for( iByte = 0; iByte < fsPUTC_FILE_SIZE; iByte++ )
{
iReturned = f_getc( pxFile );
configASSERT( iReturned == ( ( int ) '0' + iByte ) );
}
/* Finished so close the file. */
f_close( pxFile );
/* Move back to the root directory. */
ucReturn = f_chdir( "../.." );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
}

View File

@@ -1,667 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
*
* See the following URL for information on the commands defined in this file:
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Ethernet_Related_CLI_Commands.shtml
*
******************************************************************************/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* FreeRTOS+UDP includes, just to make the stats available to the CLI
commands. */
#include "FreeRTOS_UDP_IP.h"
#include "FreeRTOS_Sockets.h"
#ifndef configINCLUDE_TRACE_RELATED_CLI_COMMANDS
#define configINCLUDE_TRACE_RELATED_CLI_COMMANDS 0
#endif
/*
* Implements the run-time-stats command.
*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the task-stats command.
*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the echo-three-parameters command.
*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the echo-parameters command.
*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that prints out IP address information.
*/
static portBASE_TYPE prvDisplayIPConfig( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that prints out the gathered demo debug stats.
*/
static portBASE_TYPE prvDisplayIPDebugStats( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that sends an ICMP ping request to an IP address.
*/
static portBASE_TYPE prvPingCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the "trace start" and "trace stop" commands;
*/
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
#endif
/* Structure that defines the "ip-config" command line command. */
static const CLI_Command_Definition_t xIPConfig =
{
"ip-config",
"ip-config:\r\n Displays IP address configuration\r\n\r\n",
prvDisplayIPConfig,
0
};
#if configINCLUDE_DEMO_DEBUG_STATS != 0
/* Structure that defines the "ip-debug-stats" command line command. */
static const CLI_Command_Definition_t xIPDebugStats =
{
"ip-debug-stats", /* The command string to type. */
"ip-debug-stats:\r\n Shows some IP stack stats useful for debug - an example only.\r\n\r\n",
prvDisplayIPDebugStats, /* The function to run. */
0 /* No parameters are expected. */
};
#endif /* configINCLUDE_DEMO_DEBUG_STATS */
/* Structure that defines the "run-time-stats" command line command. This
generates a table that shows how much run time each task has */
static const CLI_Command_Definition_t xRunTimeStats =
{
"run-time-stats", /* The command string to type. */
"run-time-stats:\r\n Displays a table showing how much processing time each FreeRTOS task has used\r\n\r\n",
prvRunTimeStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "task-stats" command line command. This generates
a table that gives information on each task in the system. */
static const CLI_Command_Definition_t xTaskStats =
{
"task-stats", /* The command string to type. */
"task-stats:\r\n Displays a table showing the state of each FreeRTOS task\r\n\r\n",
prvTaskStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "echo_3_parameters" command line command. This
takes exactly three parameters that the command simply echos back one at a
time. */
static const CLI_Command_Definition_t xThreeParameterEcho =
{
"echo-3-parameters",
"echo-3-parameters <param1> <param2> <param3>:\r\n Expects three parameters, echos each in turn\r\n\r\n",
prvThreeParameterEchoCommand, /* The function to run. */
3 /* Three parameters are expected, which can take any value. */
};
/* Structure that defines the "echo_parameters" command line command. This
takes a variable number of parameters that the command simply echos back one at
a time. */
static const CLI_Command_Definition_t xParameterEcho =
{
"echo-parameters",
"echo-parameters <...>:\r\n Take variable number of parameters, echos each in turn\r\n\r\n",
prvParameterEchoCommand, /* The function to run. */
-1 /* The user can enter any number of commands. */
};
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
/* Structure that defines the "ping" command line command. This takes an IP
address or host name and (optionally) the number of bytes to ping as
parameters. */
static const CLI_Command_Definition_t xPing =
{
"ping",
"ping <ipaddress> <optional:bytes to send>:\r\n for example, ping 192.168.0.3 8, or ping www.example.com\r\n\r\n",
prvPingCommand, /* The function to run. */
-1 /* Ping can take either one or two parameter, so the number of parameters has to be determined by the ping command implementation. */
};
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
/* Structure that defines the "trace" command line command. This takes a single
parameter, which can be either "start" or "stop". */
static const CLI_Command_Definition_t xStartStopTrace =
{
"trace",
"trace [start | stop]:\r\n Starts or stops a trace recording for viewing in FreeRTOS+Trace\r\n\r\n",
prvStartStopTraceCommand, /* The function to run. */
1 /* One parameter is expected. Valid values are "start" and "stop". */
};
#endif /* configINCLUDE_TRACE_RELATED_CLI_COMMANDS */
/*-----------------------------------------------------------*/
void vRegisterCLICommands( void )
{
/* Register all the command line commands defined immediately above. */
FreeRTOS_CLIRegisterCommand( &xTaskStats );
FreeRTOS_CLIRegisterCommand( &xRunTimeStats );
FreeRTOS_CLIRegisterCommand( &xThreeParameterEcho );
FreeRTOS_CLIRegisterCommand( &xParameterEcho );
FreeRTOS_CLIRegisterCommand( &xIPDebugStats );
FreeRTOS_CLIRegisterCommand( &xIPConfig );
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
{
FreeRTOS_CLIRegisterCommand( &xPing );
}
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
FreeRTOS_CLIRegisterCommand( & xStartStopTrace );
#endif
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *const pcHeader = "Task State Priority Stack #\r\n************************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskList( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char * const pcHeader = "Task Abs Time % Time\r\n****************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskGetRunTimeStats( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The three parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", ( int ) lParameterNumber );
strncat( pcWriteBuffer, pcParameter, xParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
if( lParameterNumber == 3L )
{
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
xReturn = pdFALSE;
lParameterNumber = 0L;
}
else
{
/* There are more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
if( pcParameter != NULL )
{
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", ( int ) lParameterNumber );
strncat( pcWriteBuffer, pcParameter, xParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* There might be more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
else
{
/* No more parameters were found. Make sure the write buffer does
not contain a valid string. */
pcWriteBuffer[ 0 ] = 0x00;
/* No more data to return. */
xReturn = pdFALSE;
/* Start over the next time this command is executed. */
lParameterNumber = 0;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
static portBASE_TYPE prvPingCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
char * pcParameter;
portBASE_TYPE lParameterStringLength, xReturn;
uint32_t ulIPAddress, ulBytesToPing;
const uint32_t ulDefaultBytesToPing = 8UL;
char cBuffer[ 16 ];
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Start with an empty string. */
pcWriteBuffer[ 0 ] = 0x00;
/* Obtain the number of bytes to ping. */
pcParameter = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
2, /* Return the second parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
if( pcParameter == NULL )
{
/* The number of bytes was not specified, so default it. */
ulBytesToPing = ulDefaultBytesToPing;
}
else
{
ulBytesToPing = atol( pcParameter );
}
/* Obtain the IP address string. */
pcParameter = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to obtain the IP address. If the first character is not a
digit, assume the host name has been passed in. */
if( ( *pcParameter >= '0' ) && ( *pcParameter <= '9' ) )
{
ulIPAddress = FreeRTOS_inet_addr( pcParameter );
}
else
{
/* Terminate the host name. */
pcParameter[ lParameterStringLength ] = 0x00;
/* Attempt to resolve host. */
ulIPAddress = FreeRTOS_gethostbyname( pcParameter );
}
/* Convert IP address, which may have come from a DNS lookup, to string. */
FreeRTOS_inet_ntoa( ulIPAddress, cBuffer );
if( ulIPAddress != 0 )
{
xReturn = FreeRTOS_SendPingRequest( ulIPAddress, ( uint16_t ) ulBytesToPing, portMAX_DELAY );
}
else
{
xReturn = pdFALSE;
}
if( xReturn == pdFALSE )
{
sprintf( pcWriteBuffer, "%s", "Could not send ping request\r\n" );
}
else
{
sprintf( pcWriteBuffer, "Ping sent to %s with identifier %d\r\n", cBuffer, xReturn );
}
return pdFALSE;
}
/*-----------------------------------------------------------*/
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
#if configINCLUDE_DEMO_DEBUG_STATS != 0
static portBASE_TYPE prvDisplayIPDebugStats( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
static portBASE_TYPE xIndex = -1;
extern xExampleDebugStatEntry_t xIPTraceValues[];
portBASE_TYPE xReturn;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
xIndex++;
if( xIndex < xExampleDebugStatEntries() )
{
sprintf( pcWriteBuffer, "%s %d\r\n", xIPTraceValues[ xIndex ].pucDescription, ( int ) xIPTraceValues[ xIndex ].ulData );
xReturn = pdPASS;
}
else
{
/* Reset the index for the next time it is called. */
xIndex = -1;
/* Ensure nothing remains in the write buffer. */
pcWriteBuffer[ 0 ] = 0x00;
xReturn = pdFALSE;
}
return xReturn;
}
/*-----------------------------------------------------------*/
#endif /* configINCLUDE_DEMO_DEBUG_STATS */
static portBASE_TYPE prvDisplayIPConfig( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
static portBASE_TYPE xIndex = 0;
portBASE_TYPE xReturn;
uint32_t ulAddress;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
switch( xIndex )
{
case 0 :
FreeRTOS_GetAddressConfiguration( &ulAddress, NULL, NULL, NULL );
sprintf( pcWriteBuffer, "\r\nIP address " );
xReturn = pdTRUE;
xIndex++;
break;
case 1 :
FreeRTOS_GetAddressConfiguration( NULL, &ulAddress, NULL, NULL );
sprintf( pcWriteBuffer, "\r\nNet mask " );
xReturn = pdTRUE;
xIndex++;
break;
case 2 :
FreeRTOS_GetAddressConfiguration( NULL, NULL, &ulAddress, NULL );
sprintf( pcWriteBuffer, "\r\nGateway address " );
xReturn = pdTRUE;
xIndex++;
break;
case 3 :
FreeRTOS_GetAddressConfiguration( NULL, NULL, NULL, &ulAddress );
sprintf( pcWriteBuffer, "\r\nDNS server address " );
xReturn = pdTRUE;
xIndex++;
break;
default :
ulAddress = 0;
sprintf( pcWriteBuffer, "\r\n\r\n" );
xReturn = pdFALSE;
xIndex = 0;
break;
}
if( ulAddress != 0 )
{
FreeRTOS_inet_ntoa( ulAddress, &( pcWriteBuffer[ strlen( pcWriteBuffer ) ] ) );
}
return xReturn;
}
/*-----------------------------------------------------------*/
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE lParameterStringLength;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* There are only two valid parameter values. */
if( strncmp( pcParameter, "start", strlen( "start" ) ) == 0 )
{
/* Start or restart the trace. */
vTraceStop();
vTraceClear();
vTraceStart();
sprintf( pcWriteBuffer, "Trace recording (re)started.\r\n" );
}
else if( strncmp( pcParameter, "stop", strlen( "stop" ) ) == 0 )
{
/* End the trace, if one is running. */
vTraceStop();
sprintf( pcWriteBuffer, "Stopping trace recording.\r\n" );
}
else
{
sprintf( pcWriteBuffer, "Valid parameters are 'start' and 'stop'.\r\n" );
}
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
#endif /* configINCLUDE_TRACE_RELATED_CLI_COMMANDS */

View File

@@ -1,71 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef UDP_COMMAND_INTERPRETER_H
#define UDP_COMMAND_INTERPRETER_H
void vStartUDPCommandInterpreterTask( uint16_t usStackSize, uint32_t ulPort, unsigned portBASE_TYPE uxPriority );
#endif /* UDP_COMMAND_INTERPRETER_H */

View File

@@ -1,244 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* FreeRTOS+UDP includes. */
#include "FreeRTOS_UDP_IP.h"
#include "FreeRTOS_Sockets.h"
/* Demo app includes. */
#include "UDPCommandInterpreter.h"
/* Dimensions the buffer into which input characters are placed. */
#define cmdMAX_INPUT_SIZE 60
/* Dimensions the buffer into which string outputs can be placed. */
#define cmdMAX_OUTPUT_SIZE 1024
/* Dimensions the buffer passed to the recvfrom() call. */
#define cmdSOCKET_INPUT_BUFFER_SIZE 60
/*
* The task that runs FreeRTOS+CLI.
*/
void vUDPCommandInterpreterTask( void *pvParameters );
/*
* Open and configure the UDP socket.
*/
static xSocket_t prvOpenUDPServerSocket( uint16_t usPort );
/*-----------------------------------------------------------*/
void vStartUDPCommandInterpreterTask( uint16_t usStackSize, uint32_t ulPort, unsigned portBASE_TYPE uxPriority )
{
xTaskCreate( vUDPCommandInterpreterTask, "CLI", usStackSize, ( void * ) ulPort, uxPriority, NULL );
}
/*-----------------------------------------------------------*/
/*
* Task that provides the input and output for the FreeRTOS+CLI command
* interpreter. In this case a UDP port is used. See the URL in the comments
* within main.c for the location of the online documentation.
*/
void vUDPCommandInterpreterTask( void *pvParameters )
{
long lBytes, lByte;
signed char cInChar, cInputIndex = 0;
static char cInputString[ cmdMAX_INPUT_SIZE ], cOutputString[ cmdMAX_OUTPUT_SIZE ], cLocalBuffer[ cmdSOCKET_INPUT_BUFFER_SIZE ];
portBASE_TYPE xMoreDataToFollow;
struct freertos_sockaddr xClient;
socklen_t xClientAddressLength = 0; /* This is required as a parameter to maintain the sendto() Berkeley sockets API - but it is not actually used so can take any value. */
xSocket_t xSocket;
/* Just to prevent compiler warnings. */
( void ) pvParameters;
/* Attempt to open the socket. The port number is passed in the task
parameter. The strange casting is to remove compiler warnings on 32-bit
machines. */
xSocket = prvOpenUDPServerSocket( ( uint16_t ) ( ( uint32_t ) pvParameters ) & 0xffffUL );
if( xSocket != FREERTOS_INVALID_SOCKET )
{
for( ;; )
{
/* Wait for incoming data on the opened socket. */
lBytes = FreeRTOS_recvfrom( xSocket, ( void * ) cLocalBuffer, sizeof( cLocalBuffer ), 0, &xClient, &xClientAddressLength );
if( lBytes != FREERTOS_SOCKET_ERROR )
{
/* Process each received byte in turn. */
lByte = 0;
while( lByte < lBytes )
{
/* The next character in the input buffer. */
cInChar = cLocalBuffer[ lByte ];
lByte++;
/* Newline characters are taken as the end of the command
string. */
if( cInChar == '\n' )
{
/* Process the input string received prior to the
newline. */
do
{
/* Pass the string to FreeRTOS+CLI. */
xMoreDataToFollow = FreeRTOS_CLIProcessCommand( cInputString, cOutputString, cmdMAX_OUTPUT_SIZE );
/* Send the output generated by the command's
implementation. */
FreeRTOS_sendto( xSocket, cOutputString, strlen( cOutputString ), 0, &xClient, xClientAddressLength );
} while( xMoreDataToFollow != pdFALSE ); /* Until the command does not generate any more output. */
/* All the strings generated by the command processing
have been sent. Clear the input string ready to receive
the next command. */
cInputIndex = 0;
memset( cInputString, 0x00, cmdMAX_INPUT_SIZE );
/* Transmit a spacer, just to make the command console
easier to read. */
FreeRTOS_sendto( xSocket, "\r\n", strlen( "\r\n" ), 0, &xClient, xClientAddressLength );
}
else
{
if( cInChar == '\r' )
{
/* Ignore the character. Newlines are used to
detect the end of the input string. */
}
else if( cInChar == '\b' )
{
/* Backspace was pressed. Erase the last character
in the string - if any. */
if( cInputIndex > 0 )
{
cInputIndex--;
cInputString[ cInputIndex ] = '\0';
}
}
else
{
/* A character was entered. Add it to the string
entered so far. When a \n is entered the complete
string will be passed to the command interpreter. */
if( cInputIndex < cmdMAX_INPUT_SIZE )
{
cInputString[ cInputIndex ] = cInChar;
cInputIndex++;
}
}
}
}
}
}
}
else
{
/* The socket could not be opened. */
vTaskDelete( NULL );
}
}
/*-----------------------------------------------------------*/
static xSocket_t prvOpenUDPServerSocket( uint16_t usPort )
{
struct freertos_sockaddr xServer;
xSocket_t xSocket = FREERTOS_INVALID_SOCKET;
xSocket = FreeRTOS_socket( FREERTOS_AF_INET, FREERTOS_SOCK_DGRAM, FREERTOS_IPPROTO_UDP );
if( xSocket != FREERTOS_INVALID_SOCKET)
{
/* Zero out the server structure. */
memset( ( void * ) &xServer, 0x00, sizeof( xServer ) );
/* Set family and port. */
xServer.sin_port = FreeRTOS_htons( usPort );
/* Bind the address to the socket. */
if( FreeRTOS_bind( xSocket, &xServer, sizeof( xServer ) ) == -1 )
{
FreeRTOS_closesocket( xSocket );
xSocket = FREERTOS_INVALID_SOCKET;
}
}
return xSocket;
}

View File

@@ -1,397 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
*
* See the following web page for essential TwoEchoClient.c usage and
* configuration details:
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Common_Echo_Clients.shtml
*
******************************************************************************/
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* FreeRTOS+UDP includes. */
#include "FreeRTOS_UDP_IP.h"
#include "FreeRTOS_Sockets.h"
/* Small delay used between attempts to obtain a zero copy buffer. */
#define echoTINY_DELAY ( ( portTickType ) 2 )
/* The echo tasks create a socket, send out a number of echo requests
(listening for each echo reply), then close the socket again before
starting over. This delay is used between each iteration to ensure the
network does not get too congested. */
#define echoLOOP_DELAY ( ( portTickType ) 250 / portTICK_RATE_MS )
#if ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS == 1
/* When the trace recorder code is included user events are generated to
mark the sending and receiving of the echoed data (only in the zero copy
task. */
#define echoMARK_SEND_IN_TRACE_BUFFER( x ) vTraceUserEvent( x )
traceLabel xZeroCopySendEvent, xZeroCopyReceiveEvent;
#else
/* When the trace recorder code is not included just #define away the call
to post the user event. */
#define echoMARK_SEND_IN_TRACE_BUFFER( x )
#define xZeroCopySendEvent 0
#define xZeroCopyReceiveEvent 0
#endif
/* The echo server is assumed to be on port 7, which is the standard echo
protocol port. */
#define echoECHO_PORT ( 7 )
/*
* Uses a socket to send data to, then receive data from, the standard echo
* port number 7. prvEchoClientTask() uses the standard interface.
* prvZeroCopyEchoClientTask() uses the zero copy interface.
*/
static void prvEchoClientTask( void *pvParameters );
static void prvZeroCopyEchoClientTask( void *pvParameters );
/* The receive timeout is set shorter when the windows simulator is used
because simulated time is slower than real time. */
#ifdef _WINDOWS_
const portTickType xReceiveTimeOut = 50 / portTICK_RATE_MS;
#else
const portTickType xReceiveTimeOut = 500 / portTICK_RATE_MS;
#endif
/*-----------------------------------------------------------*/
void vStartEchoClientTasks( uint16_t usTaskStackSize, unsigned portBASE_TYPE uxTaskPriority )
{
/* Create the echo client task that does not use the zero copy interface. */
xTaskCreate( prvEchoClientTask, /* The function that implements the task. */
"Echo0", /* Just a text name for the task to aid debugging. */
usTaskStackSize, /* The stack size is defined in FreeRTOSIPConfig.h. */
NULL, /* The task parameter, not used in this case. */
uxTaskPriority, /* The priority assigned to the task is defined in FreeRTOSConfig.h. */
NULL ); /* The task handle is not used. */
/* Create the echo client task that does use the zero copy interface. */
xTaskCreate( prvZeroCopyEchoClientTask, /* The function that implements the task. */
"Echo1", /* Just a text name for the task to aid debugging. */
usTaskStackSize, /* The stack size is defined in FreeRTOSIPConfig.h. */
NULL, /* The task parameter, not used in this case. */
uxTaskPriority, /* The priority assigned to the task is defined in FreeRTOSConfig.h. */
NULL ); /* The task handle is not used. */
}
/*-----------------------------------------------------------*/
static void prvEchoClientTask( void *pvParameters )
{
xSocket_t xSocket;
struct freertos_sockaddr xEchoServerAddress;
char cTxString[ 25 ], cRxString[ 25 ]; /* Make sure the stack is large enough to hold these. Turn on stack overflow checking during debug to be sure. */
int32_t lLoopCount = 0UL;
const int32_t lMaxLoopCount = 50;
volatile uint32_t ulRxCount = 0UL, ulTxCount = 0UL;
uint32_t xAddressLength = sizeof( xEchoServerAddress );
/* Remove compiler warning about unused parameters. */
( void ) pvParameters;
/* Echo requests are sent to the echo server. The address of the echo
server is configured by the constants configECHO_SERVER_ADDR0 to
configECHO_SERVER_ADDR3 in FreeRTOSConfig.h. */
xEchoServerAddress.sin_port = FreeRTOS_htons( echoECHO_PORT );
xEchoServerAddress.sin_addr = FreeRTOS_inet_addr_quick( configECHO_SERVER_ADDR0,
configECHO_SERVER_ADDR1,
configECHO_SERVER_ADDR2,
configECHO_SERVER_ADDR3 );
for( ;; )
{
/* Create a socket. */
xSocket = FreeRTOS_socket( FREERTOS_AF_INET, FREERTOS_SOCK_DGRAM, FREERTOS_IPPROTO_UDP );
configASSERT( xSocket != FREERTOS_INVALID_SOCKET );
/* Set a time out so a missing reply does not cause the task to block
indefinitely. */
FreeRTOS_setsockopt( xSocket, 0, FREERTOS_SO_RCVTIMEO, &xReceiveTimeOut, sizeof( xReceiveTimeOut ) );
/* Send a number of echo requests. */
for( lLoopCount = 0; lLoopCount < lMaxLoopCount; lLoopCount++ )
{
/* Create the string that is sent to the echo server. */
sprintf( cTxString, "Message number %u\r\n", ( unsigned int ) ulTxCount );
/* Send the string to the socket. ulFlags is set to 0, so the zero
copy interface is not used. That means the data from cTxString is
copied into a network buffer inside FreeRTOS_sendto(), and cTxString
can be reused as soon as FreeRTOS_sendto() has returned. 1 is added
to ensure the NULL string terminator is sent as part of the message. */
FreeRTOS_sendto( xSocket, /* The socket being sent to. */
( void * ) cTxString, /* The data being sent. */
strlen( cTxString ) + 1,/* The length of the data being sent. */
0, /* ulFlags with the FREERTOS_ZERO_COPY bit clear. */
&xEchoServerAddress, /* The destination address. */
sizeof( xEchoServerAddress ) );
/* Keep a count of how many echo requests have been transmitted so
it can be compared to the number of echo replies received. It would
be expected to loose at least one to an ARP message the first time
the connection is created. */
ulTxCount++;
/* Receive data echoed back to the socket. ulFlags is zero, so the
zero copy option is not being used and the received data will be
copied into the buffer pointed to by cRxString. xAddressLength is
not actually used (at the time of writing this comment, anyway) by
FreeRTOS_recvfrom(), but is set appropriately in case future
versions do use it. */
memset( ( void * ) cRxString, 0x00, sizeof( cRxString ) );
FreeRTOS_recvfrom( xSocket, /* The socket being received from. */
cRxString, /* The buffer into which the received data will be written. */
sizeof( cRxString ), /* The size of the buffer provided to receive the data. */
0, /* ulFlags with the FREERTOS_ZERO_COPY bit clear. */
&xEchoServerAddress, /* The address from where the data was sent (the source address). */
&xAddressLength );
/* Compare the transmitted string to the received string. */
if( strcmp( cRxString, cTxString ) == 0 )
{
/* The echo reply was received without error. */
ulRxCount++;
}
};
/* Pause for a short while to ensure the network is not too
congested. */
vTaskDelay( echoLOOP_DELAY );
/* Close this socket before looping back to create another. */
FreeRTOS_closesocket( xSocket );
}
}
/*-----------------------------------------------------------*/
static void prvZeroCopyEchoClientTask( void *pvParameters )
{
xSocket_t xSocket;
struct freertos_sockaddr xEchoServerAddress;
static char cTxString[ 40 ];
int32_t lLoopCount = 0UL;
volatile uint32_t ulRxCount = 0UL, ulTxCount = 0UL;
uint32_t xAddressLength = sizeof( xEchoServerAddress );
int32_t lReturned;
uint8_t *pucUDPPayloadBuffer;
const int32_t lMaxLoopCount = 50;
const char * const pcStringToSend = "Zero copy message number";
/* The buffer is large enough to hold the string, a number, and the string terminator. */
const size_t xBufferLength = strlen( pcStringToSend ) + 15;
#if ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS == 1
{
/* When the trace recorder code is included user events are generated to
mark the sending and receiving of the echoed data (only in the zero copy
task). */
xZeroCopySendEvent = xTraceOpenLabel( "ZeroCopyTx" );
xZeroCopyReceiveEvent = xTraceOpenLabel( "ZeroCopyRx" );
}
#endif /* ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS */
/* Remove compiler warning about unused parameters. */
( void ) pvParameters;
/* Delay for a little while to ensure the task is out of synch with the
other echo task implemented above. */
vTaskDelay( echoLOOP_DELAY >> 1 );
/* Echo requests are sent to the echo server. The address of the echo
server is configured by the constants configECHO_SERVER_ADDR0 to
configECHO_SERVER_ADDR3 in FreeRTOSConfig.h. */
xEchoServerAddress.sin_port = FreeRTOS_htons( echoECHO_PORT );
xEchoServerAddress.sin_addr = FreeRTOS_inet_addr_quick( configECHO_SERVER_ADDR0,
configECHO_SERVER_ADDR1,
configECHO_SERVER_ADDR2,
configECHO_SERVER_ADDR3 );
for( ;; )
{
/* Create a socket. */
xSocket = FreeRTOS_socket( FREERTOS_AF_INET, FREERTOS_SOCK_DGRAM, FREERTOS_IPPROTO_UDP );
configASSERT( xSocket != FREERTOS_INVALID_SOCKET );
/* Set a time out so a missing reply does not cause the task to block
indefinitely. */
FreeRTOS_setsockopt( xSocket, 0, FREERTOS_SO_RCVTIMEO, &xReceiveTimeOut, sizeof( xReceiveTimeOut ) );
/* Send a number of echo requests. */
for( lLoopCount = 0; lLoopCount < lMaxLoopCount; lLoopCount++ )
{
/* This task is going to send using the zero copy interface. The
data being sent is therefore written directly into a buffer that is
passed by reference into the FreeRTOS_sendto() function. First
obtain a buffer of adequate size from the IP stack. Although a max
delay is used, the actual delay will be capped to
ipconfigMAX_SEND_BLOCK_TIME_TICKS, hence the test to ensure a buffer
was actually obtained. */
pucUDPPayloadBuffer = ( uint8_t * ) FreeRTOS_GetUDPPayloadBuffer( xBufferLength, portMAX_DELAY );
if( pucUDPPayloadBuffer != NULL )
{
/* A buffer was successfully obtained. Create the string that is
sent to the echo server. Note the string is written directly
into the buffer obtained from the IP stack. */
sprintf( ( char * ) pucUDPPayloadBuffer, "%s %u\r\n", "Zero copy message number", ( unsigned int ) ulTxCount );
/* Also copy the string into a local buffer so it can be compared
with the string that is later received back from the echo server. */
strcpy( cTxString, ( char * ) pucUDPPayloadBuffer );
/* Pass the buffer into the send function. ulFlags has the
FREERTOS_ZERO_COPY bit set so the IP stack will take control of
the buffer, rather than copy data out of the buffer. */
echoMARK_SEND_IN_TRACE_BUFFER( xZeroCopySendEvent );
lReturned = FreeRTOS_sendto( xSocket, /* The socket being sent to. */
( void * ) pucUDPPayloadBuffer, /* The buffer being passed into the IP stack. */
strlen( cTxString ) + 1, /* The length of the data being sent. Plus 1 to ensure the null terminator is part of the data. */
FREERTOS_ZERO_COPY, /* ulFlags with the zero copy bit is set. */
&xEchoServerAddress, /* Where the data is being sent. */
sizeof( xEchoServerAddress ) );
if( lReturned == 0 )
{
/* The send operation failed, so this task is still
responsible for the buffer obtained from the IP stack. To
ensure the buffer is not lost it must either be used again,
or, as in this case, returned to the IP stack using
FreeRTOS_ReleaseUDPPayloadBuffer(). pucUDPPayloadBuffer can
be safely re-used to receive from the socket below once the
buffer has been returned to the stack. */
FreeRTOS_ReleaseUDPPayloadBuffer( ( void * ) pucUDPPayloadBuffer );
}
else
{
/* The send was successful so the IP stack is now managing
the buffer pointed to by pucUDPPayloadBuffer, and the IP
stack will return the buffer once it has been sent.
pucUDPPayloadBuffer can be safely re-used to receive from
the socket below. */
}
/* Keep a count of how many echo requests have been transmitted
so it can be compared to the number of echo replies received.
It would be expected to loose at least one to an ARP message the
first time the connection is created. */
ulTxCount++;
/* Receive data on the socket. ulFlags has the zero copy bit set
(FREERTOS_ZERO_COPY) indicating to the stack that a reference to
the received data should be passed out to this task using the
second parameter to the FreeRTOS_recvfrom() call. When this is
done the IP stack is no longer responsible for releasing the
buffer, and the task *must* return the buffer to the stack when
it is no longer needed. By default the receive block time is
portMAX_DELAY. */
echoMARK_SEND_IN_TRACE_BUFFER( xZeroCopyReceiveEvent );
lReturned = FreeRTOS_recvfrom( xSocket, /* The socket to receive from. */
( void * ) &pucUDPPayloadBuffer, /* pucUDPPayloadBuffer will be set to point to the buffer that already contains the received data. */
0, /* Ignored because the zero copy interface is being used. */
FREERTOS_ZERO_COPY, /* ulFlags with the FREERTOS_ZERO_COPY bit set. */
&xEchoServerAddress, /* The address from which the data was sent. */
&xAddressLength );
if( lReturned > 0 )
{
/* Compare the string sent to the echo server with the string
received back from the echo server. */
if( strcmp( ( char * ) pucUDPPayloadBuffer, cTxString ) == 0 )
{
/* The strings matched. */
ulRxCount++;
}
/* The buffer that contains the data passed out of the stack
*must* be returned to the stack. */
FreeRTOS_ReleaseUDPPayloadBuffer( pucUDPPayloadBuffer );
}
}
}
/* Pause for a short while to ensure the network is not too
congested. */
vTaskDelay( echoLOOP_DELAY );
/* Close this socket before looping back to create another. */
FreeRTOS_closesocket( xSocket );
}
}
/*-----------------------------------------------------------*/

View File

@@ -1,76 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef TWO_ECHO_CLIENTS_H
#define TWO_ECHO_CLIENTS_H
/*
* Create the two UDP echo client tasks. One task uses the standard interface
* to send to and receive from an echo server. The other task uses the zero
* copy interface to send to and receive from an echo server.
*/
void vStartEchoClientTasks( uint16_t usTaskStackSize, unsigned portBASE_TYPE uxTaskPriority );
#endif /* TWO_ECHO_CLIENTS_H */

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@@ -1,188 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*
* This file, along with DemoIPTrace.h, provides a basic example use of the
* FreeRTOS+UDP trace macros. The statistics gathered here can be viewed in
* the command line interface.
* See http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/UDP_IP_Trace.shtml
*/
/* Standard includes. */
#include <stdint.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* FreeRTOS+UDP includes. */
#include "FreeRTOS_UDP_IP.h"
#include "DemoIPTrace.h"
/* It is possible to remove the trace macros using the
configINCLUDE_DEMO_DEBUG_STATS setting in FreeRTOSIPConfig.h. */
#if configINCLUDE_DEMO_DEBUG_STATS == 1
/*
* Each row in the xIPTraceValues[] table contains a pointer to a function that
* updates the value for that row. Rows that latch the lowest value point to
* this function (for example, this function can be used to latch the lowest
* number of network buffers that were available during the execution of the
* stack).
*/
static void prvStoreLowest( uint32_t *pulCurrentValue, uint32_t ulCount );
/*
* Each row in the xIPTraceValues[] table contains a pointer to a function that
* updates the value for that row. Rows that simply increment an event count
* point to this function.
*/
static void prvIncrementEventCount( uint32_t *pulCurrentValue, uint32_t ulCount );
xExampleDebugStatEntry_t xIPTraceValues[] =
{
/* Comment out array entries to remove individual trace items. */
{ iptraceID_NETWORK_INTERFACE_RECEIVE, ( const uint8_t * const ) "Packets received by the network interface", prvIncrementEventCount, 0 },
{ iptraceID_NETWORK_INTERFACE_TRANSMIT, ( const uint8_t * const ) "Count of transmitted packets", prvIncrementEventCount, 0 },
{ iptraceID_PACKET_DROPPED_TO_GENERATE_ARP, ( const uint8_t * const ) "Count of packets dropped to generate ARP", prvIncrementEventCount, 0 },
{ iptraceID_NETWORK_BUFFER_OBTAINED, ( const uint8_t * const ) "Lowest ever available network buffers", prvStoreLowest, 0xffffUL },
{ iptraceID_NETWORK_EVENT_RECEIVED, ( const uint8_t * const ) "Lowest ever free space in network event queue", prvStoreLowest, 0xffffUL },
{ iptraceID_FAILED_TO_OBTAIN_NETWORK_BUFFER, ( const uint8_t * const ) "Count of failed attempts to obtain a network buffer",prvIncrementEventCount, 0 },
{ iptraceID_ARP_TABLE_ENTRY_EXPIRED, ( const uint8_t * const ) "Count of expired ARP entries", prvIncrementEventCount, 0 },
{ iptraceID_FAILED_TO_CREATE_SOCKET, ( const uint8_t * const ) "Count of failures to create a socket", prvIncrementEventCount, 0 },
{ iptraceID_RECVFROM_DISCARDING_BYTES, ( const uint8_t * const ) "Count of times recvfrom() has discarding bytes", prvIncrementEventCount, 0 },
{ iptraceID_ETHERNET_RX_EVENT_LOST, ( const uint8_t * const ) "Count of lost Ethenret Rx events (event queue full?)",prvIncrementEventCount, 0 },
{ iptraceID_STACK_TX_EVENT_LOST, ( const uint8_t * const ) "Count of lost IP stack events (event queue full?)", prvIncrementEventCount, 0 },
{ ipconfigID_BIND_FAILED, ( const uint8_t * const ) "Count of failed calls to bind()", prvIncrementEventCount, 0 },
{ iptraceID_RECVFROM_TIMEOUT, ( const uint8_t * const ) "Count of receive timeouts", prvIncrementEventCount, 0 },
{ iptraceID_SENDTO_DATA_TOO_LONG, ( const uint8_t * const ) "Count of failed sends due to oversized payload", prvIncrementEventCount, 0 },
{ iptraceID_SENDTO_SOCKET_NOT_BOUND, ( const uint8_t * const ) "Count of failed sends due to unbound socket", prvIncrementEventCount, 0 },
{ iptraceID_NO_BUFFER_FOR_SENDTO, ( const uint8_t * const ) "Count of failed transmits due to timeout", prvIncrementEventCount, 0 },
{ iptraceID_WAIT_FOR_TX_DMA_DESCRIPTOR, ( const uint8_t * const ) "Number of times task had to wait to obtain a DMA Tx descriptor", prvIncrementEventCount, 0 },
{ iptraceID_FAILED_TO_NOTIFY_SELECT_GROUP, ( const uint8_t * const ) "Failed to notify select group", prvIncrementEventCount, 0 }
};
/*-----------------------------------------------------------*/
portBASE_TYPE xExampleDebugStatEntries( void )
{
/* Return the number of entries in the xIPTraceValues[] table. */
return ( portBASE_TYPE ) ( sizeof( xIPTraceValues ) / sizeof( xExampleDebugStatEntry_t ) );
}
/*-----------------------------------------------------------*/
void vExampleDebugStatUpdate( uint8_t ucIdentifier, uint32_t ulValue )
{
portBASE_TYPE xIndex;
const portBASE_TYPE xEntries = sizeof( xIPTraceValues ) / sizeof( xExampleDebugStatEntry_t );
/* Update an entry in the xIPTraceValues[] table. Each row in the table
includes a pointer to a function that performs the actual update. This
function just executes the update function from that table row. */
for( xIndex = 0; xIndex < xEntries; xIndex++ )
{
if( xIPTraceValues[ xIndex ].ucIdentifier == ucIdentifier )
{
xIPTraceValues[ xIndex ].vPerformAction( &( xIPTraceValues[ xIndex ].ulData ), ulValue );
break;
}
}
configASSERT( xIndex != xEntries );
}
/*-----------------------------------------------------------*/
static void prvIncrementEventCount( uint32_t *pulCurrentValue, uint32_t ulCount )
{
/* Each row in the xIPTraceValues[] table contains a pointer to a function
that updates the value for that row. Rows that simply increment an event
count point to this function. */
( void ) ulCount;
( *pulCurrentValue )++;
}
/*-----------------------------------------------------------*/
static void prvStoreLowest( uint32_t *pulCurrentValue, uint32_t ulCount )
{
/* Each row in the xIPTraceValues[] table contains a pointer to a function
that updates the value for that row. Rows that latch the lowest value
point to this function (for example, this function can be used to latch
the lowest number of network buffers that were available during the
execution of the stack). */
if( ulCount < *pulCurrentValue )
{
*pulCurrentValue = ulCount;
}
}
/*-----------------------------------------------------------*/
#endif /* configINCLUDE_DEMO_DEBUG_STATS == 1 */

View File

@@ -1,159 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*
* This file, along with DemoIPTrace.h, provides a basic example use of the
* FreeRTOS+UDP trace macros. The statistics gathered here can be viewed in
* the command line interface.
* See http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/UDP_IP_Trace.shtml
*/
#ifndef DEMO_IP_TRACE_MACROS_H
#define DEMO_IP_TRACE_MACROS_H
typedef void ( *vTraceAction_t )( uint32_t *, uint32_t );
/* Type that defines each statistic being gathered. */
typedef struct ExampleDebugStatEntry
{
uint8_t ucIdentifier; /* Unique identifier for statistic. */
const uint8_t * const pucDescription; /* Text description for the statistic. */
vTraceAction_t vPerformAction; /* Action to perform when the statistic is updated (increment counter, store minimum value, store maximum value, etc. */
uint32_t ulData; /* The meaning of this data is dependent on the trace macro ID. */
} xExampleDebugStatEntry_t;
/* Unique identifiers used to locate the entry for each trace macro in the
xIPTraceValues[] table defined in DemoIPTrace.c. */
#define iptraceID_NETWORK_INTERFACE_RECEIVE 0
#define iptraceID_NETWORK_INTERFACE_TRANSMIT 1
#define iptraceID_PACKET_DROPPED_TO_GENERATE_ARP 2
/* Do not change IDs above this line as the ID is shared with a FreeRTOS+Nabto
demo. */
#define iptraceID_NETWORK_BUFFER_OBTAINED 3
#define iptraceID_NETWORK_BUFFER_OBTAINED_FROM_ISR 4
#define iptraceID_NETWORK_EVENT_RECEIVED 5
#define iptraceID_FAILED_TO_OBTAIN_NETWORK_BUFFER 6
#define iptraceID_ARP_TABLE_ENTRY_EXPIRED 7
#define iptraceID_FAILED_TO_CREATE_SOCKET 8
#define iptraceID_RECVFROM_DISCARDING_BYTES 9
#define iptraceID_ETHERNET_RX_EVENT_LOST 10
#define iptraceID_STACK_TX_EVENT_LOST 11
#define ipconfigID_BIND_FAILED 12
#define iptraceID_RECVFROM_TIMEOUT 13
#define iptraceID_SENDTO_DATA_TOO_LONG 14
#define iptraceID_SENDTO_SOCKET_NOT_BOUND 15
#define iptraceID_NO_BUFFER_FOR_SENDTO 16
#define iptraceID_WAIT_FOR_TX_DMA_DESCRIPTOR 17
#define iptraceID_FAILED_TO_NOTIFY_SELECT_GROUP 18
/* It is possible to remove the trace macros using the
configINCLUDE_DEMO_DEBUG_STATS setting in FreeRTOSIPConfig.h. */
#if configINCLUDE_DEMO_DEBUG_STATS == 1
/* The trace macro definitions themselves. Any trace macros left undefined
will default to be empty macros. */
#define iptraceNETWORK_BUFFER_OBTAINED( pxBufferAddress ) vExampleDebugStatUpdate( iptraceID_NETWORK_BUFFER_OBTAINED, uxQueueMessagesWaiting( ( xQueueHandle ) xNetworkBufferSemaphore ) )
#define iptraceNETWORK_BUFFER_OBTAINED_FROM_ISR( pxBufferAddress ) vExampleDebugStatUpdate( iptraceID_NETWORK_BUFFER_OBTAINED, uxQueueMessagesWaiting( ( xQueueHandle ) xNetworkBufferSemaphore ) )
#define iptraceNETWORK_EVENT_RECEIVED( eEvent ) { \
uint16_t usSpace; \
usSpace = ( uint16_t ) uxQueueMessagesWaiting( xNetworkEventQueue ); \
/* Minus one as an event was removed before the space was queried. */ \
usSpace = ( ipconfigEVENT_QUEUE_LENGTH - usSpace ) - 1; \
vExampleDebugStatUpdate( iptraceID_NETWORK_EVENT_RECEIVED, usSpace ); \
}
#define iptraceFAILED_TO_OBTAIN_NETWORK_BUFFER() vExampleDebugStatUpdate( iptraceID_FAILED_TO_OBTAIN_NETWORK_BUFFER, 0 )
#define iptraceARP_TABLE_ENTRY_EXPIRED( ulIPAddress ) vExampleDebugStatUpdate( iptraceID_ARP_TABLE_ENTRY_EXPIRED, 0 )
#define iptracePACKET_DROPPED_TO_GENERATE_ARP( ulIPAddress ) vExampleDebugStatUpdate( iptraceID_PACKET_DROPPED_TO_GENERATE_ARP, 0 )
#define iptraceFAILED_TO_CREATE_SOCKET() vExampleDebugStatUpdate( iptraceID_FAILED_TO_CREATE_SOCKET, 0 )
#define iptraceRECVFROM_DISCARDING_BYTES( xNumberOfBytesDiscarded ) vExampleDebugStatUpdate( iptraceID_RECVFROM_DISCARDING_BYTES, 0 )
#define iptraceETHERNET_RX_EVENT_LOST() vExampleDebugStatUpdate( iptraceID_ETHERNET_RX_EVENT_LOST, 0 )
#define iptraceSTACK_TX_EVENT_LOST( xEvent ) vExampleDebugStatUpdate( iptraceID_STACK_TX_EVENT_LOST, 0 )
#define iptraceBIND_FAILED( xSocket, usPort ) vExampleDebugStatUpdate( ipconfigID_BIND_FAILED, 0 )
#define iptraceNETWORK_INTERFACE_TRANSMIT() vExampleDebugStatUpdate( iptraceID_NETWORK_INTERFACE_TRANSMIT, 0 )
#define iptraceRECVFROM_TIMEOUT() vExampleDebugStatUpdate( iptraceID_RECVFROM_TIMEOUT, 0 )
#define iptraceSENDTO_DATA_TOO_LONG() vExampleDebugStatUpdate( iptraceID_SENDTO_DATA_TOO_LONG, 0 )
#define iptraceSENDTO_SOCKET_NOT_BOUND() vExampleDebugStatUpdate( iptraceID_SENDTO_SOCKET_NOT_BOUND, 0 )
#define iptraceNO_BUFFER_FOR_SENDTO() vExampleDebugStatUpdate( iptraceID_NO_BUFFER_FOR_SENDTO, 0 )
#define iptraceWAITING_FOR_TX_DMA_DESCRIPTOR() vExampleDebugStatUpdate( iptraceID_WAIT_FOR_TX_DMA_DESCRIPTOR, 0 )
#define iptraceFAILED_TO_NOTIFY_SELECT_GROUP( xSocket ) vExampleDebugStatUpdate( iptraceID_FAILED_TO_NOTIFY_SELECT_GROUP, 0 )
#define iptraceNETWORK_INTERFACE_RECEIVE() vExampleDebugStatUpdate( iptraceID_NETWORK_INTERFACE_RECEIVE, 0 )
/*
* The function that updates a line in the xIPTraceValues table.
*/
void vExampleDebugStatUpdate( uint8_t ucIdentifier, uint32_t ulValue );
/*
* Returns the number of entries in the xIPTraceValues table.
*/
portBASE_TYPE xExampleDebugStatEntries( void );
#endif /* configINCLUDE_DEMO_DEBUG_STATS == 1 */
#endif /* DEMO_IP_TRACE_MACROS_H */

View File

@@ -1,419 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* FreeRTOS+Trace includes. */
#include "trcUser.h"
/*
* Writes trace data to a disk file when the trace recording is stopped.
* This function will simply overwrite any trace files that already exist.
*/
static void prvSaveTraceFile( void );
/*
* Defines a command that returns a table showing the state of each task at the
* time the command is called.
*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that returns a table showing how much time each task has
* spent in the Running state.
*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that expects exactly three parameters. Each of the three
* parameter are echoed back one at a time.
*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that can take a variable number of parameters. Each
* parameter is echoes back one at a time.
*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that starts/stops events being recorded for offline viewing
* in FreeRTOS+Trace.
*/
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/* Structure that defines the "run-time-stats" command line command. */
static const CLI_Command_Definition_t xRunTimeStats =
{
"run-time-stats", /* The command string to type. */
"\r\nrun-time-stats:\r\n Displays a table showing how much processing time each FreeRTOS task has used\r\n\r\n",
prvRunTimeStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "task-stats" command line command. */
static const CLI_Command_Definition_t xTaskStats =
{
"task-stats", /* The command string to type. */
"\r\ntask-stats:\r\n Displays a table showing the state of each FreeRTOS task\r\n\r\n",
prvTaskStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "echo_3_parameters" command line command. This
takes exactly three parameters that the command simply echos back one at a
time. */
static const CLI_Command_Definition_t xThreeParameterEcho =
{
"echo_3_parameters",
"\r\necho_3_parameters <param1> <param2> <param3>:\r\n Expects three parameters, echos each in turn\r\n\r\n",
prvThreeParameterEchoCommand, /* The function to run. */
3 /* Three parameters are expected, which can take any value. */
};
/* Structure that defines the "echo_parameters" command line command. This
takes a variable number of parameters that the command simply echos back one at
a time. */
static const CLI_Command_Definition_t xParameterEcho =
{
"echo_parameters",
"\r\necho_parameters <...>:\r\n Take variable number of parameters, echos each in turn\r\n\r\n",
prvParameterEchoCommand, /* The function to run. */
-1 /* The user can enter any number of commands. */
};
/* Structure that defines the "trace" command line command. This takes a single
parameter, which can be either "start" or "stop". */
static const CLI_Command_Definition_t xStartTrace =
{
"trace",
"\r\ntrace [start | stop]:\r\n Starts or stops a trace recording for viewing in FreeRTOS+Trace\r\n\r\n",
prvStartStopTraceCommand, /* The function to run. */
1 /* One parameter is expected. Valid values are "start" and "stop". */
};
/*-----------------------------------------------------------*/
void vRegisterCLICommands( void )
{
/* Register all the command line commands defined immediately above. */
FreeRTOS_CLIRegisterCommand( &xTaskStats );
FreeRTOS_CLIRegisterCommand( &xRunTimeStats );
FreeRTOS_CLIRegisterCommand( &xThreeParameterEcho );
FreeRTOS_CLIRegisterCommand( &xParameterEcho );
FreeRTOS_CLIRegisterCommand( &xStartTrace );
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *const pcHeader = "Task State Priority Stack #\r\n************************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskList( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char * const pcHeader = "Task Abs Time % Time\r\n****************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskGetRunTimeStats( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE lParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The three parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", lParameterNumber );
strncat( pcWriteBuffer, pcParameter, lParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
if( lParameterNumber == 3L )
{
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
xReturn = pdFALSE;
lParameterNumber = 0L;
}
else
{
/* There are more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE lParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
if( pcParameter != NULL )
{
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", lParameterNumber );
strncat( pcWriteBuffer, pcParameter, lParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* There might be more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
else
{
/* No more parameters were found. Make sure the write buffer does
not contain a valid string. */
pcWriteBuffer[ 0 ] = 0x00;
/* No more data to return. */
xReturn = pdFALSE;
/* Start over the next time this command is executed. */
lParameterNumber = 0;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE lParameterStringLength;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* There are only two valid parameter values. */
if( strncmp( pcParameter, "start", strlen( "start" ) ) == 0 )
{
/* Start or restart the trace. */
vTraceStop();
vTraceClear();
uiTraceStart();
sprintf( pcWriteBuffer, "Trace recording (re)started.\r\n" );
}
else if( strncmp( pcParameter, "stop", strlen( "stop" ) ) == 0 )
{
/* End the trace, if one is running. */
vTraceStop();
sprintf( pcWriteBuffer, "Stopping trace recording and dumping log to disk.\r\n" );
prvSaveTraceFile();
}
else
{
sprintf( pcWriteBuffer, "Valid parameters are 'start' and 'stop'.\r\n" );
}
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static void prvSaveTraceFile( void )
{
FILE* pxOutputFile;
fopen_s( &pxOutputFile, "Trace.dump", "wb");
if( pxOutputFile != NULL )
{
fwrite( RecorderDataPtr, sizeof( RecorderDataType ), 1, pxOutputFile );
fclose( pxOutputFile );
printf( "\r\nTrace output saved to Trace.dump\r\n" );
}
else
{
printf( "\r\nFailed to create trace dump file\r\n" );
}
}

View File

@@ -1,162 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <stdint.h>
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
* http://www.freertos.org/a00110.html
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 1
#define configTICK_RATE_HZ ( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 60 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the Win32 thread. */
#define configTOTAL_HEAP_SIZE ( ( size_t ) 0 ) /* This parameter has no effect when heap_3.c is included in the project. */
#define configMAX_TASK_NAME_LEN ( 7 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_CO_ROUTINES 0
#define configUSE_MUTEXES 1
#define configCHECK_FOR_STACK_OVERFLOW 0 /* Not applicable to the Win32 port. */
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_MALLOC_FAILED_HOOK 0
#define configUSE_APPLICATION_TASK_TAG 0
#define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_ALTERNATIVE_API 0
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY 2
#define configTIMER_QUEUE_LENGTH 20
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 7 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTaskGetSchedulerState 1
/* This demo makes use of one or more example stats formatting functions. These
format the raw data provided by the uxTaskGetSystemState() function in to human
readable ASCII form. See the notes in the implementation of vTaskList() within
FreeRTOS/Source/tasks.c for limitations. */
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
/* Run time stats gathering definitions. */
unsigned long ulGetRunTimeCounterValue( void );
void vConfigureTimerForRunTimeStats( void );
#define configGENERATE_RUN_TIME_STATS 1
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats()
#define portGET_RUN_TIME_COUNTER_VALUE() ulGetRunTimeCounterValue()
extern void vAssertCalled( void );
#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled()
/* The UDP port to use for incoming command inputs. The outgoing port is
set to ( configUDP_CLI_PORT_NUMBER + 1 ). */
#define configUDP_CLI_PORT_NUMBER 5001
/* The size of the global output buffer that is available for use when there
are multiple command interpreters running at once (for example, one on a UART
and one on TCP/IP). This is done to prevent an output buffer being defined by
each implementation - which would waste RAM. In this case, there is only one
command interpreter running, and it has its own local output buffer, so the
global buffer is just set to be one byte long as it is not used and should not
take up unnecessary RAM. */
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 1
/* Include the FreeRTOS+Trace FreeRTOS trace macro definitions. */
#include "trcKernelPort.h"
#endif /* FREERTOS_CONFIG_H */

View File

@@ -1,20 +0,0 @@

Microsoft Visual Studio Solution File, Format Version 11.00
# Visual C++ Express 2010
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "WIN32", "WIN32.vcxproj", "{C686325E-3261-42F7-AEB1-DDE5280E1CEB}"
EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
Debug|Win32 = Debug|Win32
Release|Win32 = Release|Win32
EndGlobalSection
GlobalSection(ProjectConfigurationPlatforms) = postSolution
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.ActiveCfg = Debug|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.Build.0 = Debug|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.ActiveCfg = Release|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.Build.0 = Release|Win32
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE
EndGlobalSection
EndGlobal

View File

@@ -1,5 +0,0 @@
[InternetShortcut]
URL=http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_Trace/Free_RTOS_Plus_Trace_CLI_Example.shtml
IDList=
[{000214A0-0000-0000-C000-000000000046}]
Prop3=19,2

View File

@@ -1,141 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*
* Utility functions required to gather run time statistics. See:
* http://www.freertos.org/rtos-run-time-stats.html
*
* Note that this is a simulated port, where simulated time is a lot slower than
* real time, therefore the run time counter values have no real meaningful
* units.
*
* Also note that it is assumed this demo is going to be used for short periods
* of time only, and therefore timer overflows are not handled.
*/
/* FreeRTOS includes. */
#include <FreeRTOS.h>
/* FreeRTOS+Trace includes. */
#include "trcUser.h"
/* Variables used in the creation of the run time stats time base. Run time
stats record how much time each task spends in the Running state. */
static long long llInitialRunTimeCounterValue = 0LL, llTicksPerHundedthMillisecond = 0LL;
/*-----------------------------------------------------------*/
void vConfigureTimerForRunTimeStats( void )
{
LARGE_INTEGER liPerformanceCounterFrequency, liInitialRunTimeValue;
/* Initialise the variables used to create the run time stats time base.
Run time stats record how much time each task spends in the Running
state. */
if( QueryPerformanceFrequency( &liPerformanceCounterFrequency ) == 0 )
{
llTicksPerHundedthMillisecond = 1;
}
else
{
/* How many times does the performance counter increment in 1/100th
millisecond. */
llTicksPerHundedthMillisecond = liPerformanceCounterFrequency.QuadPart / 100000LL;
/* What is the performance counter value now, this will be subtracted
from readings taken at run time. */
QueryPerformanceCounter( &liInitialRunTimeValue );
llInitialRunTimeCounterValue = liInitialRunTimeValue.QuadPart;
}
}
/*-----------------------------------------------------------*/
unsigned long ulGetRunTimeCounterValue( void )
{
LARGE_INTEGER liCurrentCount;
unsigned long ulReturn;
/* What is the performance counter value now? */
QueryPerformanceCounter( &liCurrentCount );
/* Subtract the performance counter value reading taken when the
application started to get a count from that reference point, then
scale to (simulated) 1/100ths of a millisecond. */
if( llTicksPerHundedthMillisecond == 0 )
{
/* The trace macros can call this function before the kernel has been
started, in which case llTicksPerHundedthMillisecond will not have been
initialised. */
ulReturn = 0;
}
else
{
ulReturn = ( unsigned long ) ( ( liCurrentCount.QuadPart - llInitialRunTimeCounterValue ) / llTicksPerHundedthMillisecond );
}
return ulReturn;
}
/*-----------------------------------------------------------*/

View File

@@ -1,510 +0,0 @@
/*******************************************************************************
* Tracealyzer v2.4.1 Recorder Library
* Percepio AB, www.percepio.com
*
* trcConfig.h
*
* Configuration parameters for the trace recorder library. Before using the
* trace recorder library, please check that the default settings are
* appropriate for your system, and if necessary adjust these. Most likely, you
* will need to adjust the NTask, NISR, NQueue, NMutex and NSemaphore values to
* reflect the number of such objects in your system. These may be
* over-approximated, although larger values values implies more RAM usage.
*
* Terms of Use
* This software is copyright Percepio AB. The recorder library is free for
* use together with Percepio products. You may distribute the recorder library
* in its original form, including modifications in trcHardwarePort.c/.h
* given that these modification are clearly marked as your own modifications
* and documented in the initial comment section of these source files.
* This software is the intellectual property of Percepio AB and may not be
* sold or in other ways commercially redistributed without explicit written
* permission by Percepio AB.
*
* Disclaimer
* The trace tool and recorder library is being delivered to you AS IS and
* Percepio AB makes no warranty as to its use or performance. Percepio AB does
* not and cannot warrant the performance or results you may obtain by using the
* software or documentation. Percepio AB make no warranties, express or
* implied, as to noninfringement of third party rights, merchantability, or
* fitness for any particular purpose. In no event will Percepio AB, its
* technology partners, or distributors be liable to you for any consequential,
* incidental or special damages, including any lost profits or lost savings,
* even if a representative of Percepio AB has been advised of the possibility
* of such damages, or for any claim by any third party. Some jurisdictions do
* not allow the exclusion or limitation of incidental, consequential or special
* damages, or the exclusion of implied warranties or limitations on how long an
* implied warranty may last, so the above limitations may not apply to you.
*
* Copyright Percepio AB, 2013.
* www.percepio.com
******************************************************************************/
#ifndef TRCCONFIG_H
#define TRCCONFIG_H
#include <stdint.h>
/*******************************************************************************
* CONFIGURATION RELATED TO CAPACITY AND ALLOCATION
******************************************************************************/
/*******************************************************************************
* EVENT_BUFFER_SIZE
*
* Macro which should be defined as an integer value.
*
* This defines the capacity of the event buffer, i.e., the number of records
* it may store. Each registered event typically use one record (4 byte), but
* vTracePrintF may use multiple records depending on the number of data args.
******************************************************************************/
#define EVENT_BUFFER_SIZE 4000 /* Adjust wrt. to available RAM */
/*******************************************************************************
* USE_LINKER_PRAGMA
*
* Macro which should be defined as an integer value, default is 0.
*
* If this is 1, the header file "recorderdata_linker_pragma.h" is included just
* before the declaration of RecorderData (in trcBase.c), i.e., the trace data
* structure. This allows the user to specify a pragma with linker options.
*
* Example (for IAR Embedded Workbench and NXP LPC17xx):
* #pragma location="AHB_RAM_MEMORY"
*
* This example instructs the IAR linker to place RecorderData in another RAM
* bank, the AHB RAM. This can also be used for other compilers with a similar
* pragmas for linker options.
*
* Note that this only applies if using static allocation, see below.
******************************************************************************/
#define USE_LINKER_PRAGMA 0
/*******************************************************************************
* SYMBOL_TABLE_SIZE
*
* Macro which should be defined as an integer value.
*
* This defines the capacity of the symbol table, in bytes. This symbol table
* stores User Events labels and names of deleted tasks, queues, or other kernel
* objects. Note that the names of active objects not stored here but in the
* Object Table. Thus, if you don't use User Events or delete any kernel
* objects you set this to zero (0) to minimize RAM usage.
******************************************************************************/
#define SYMBOL_TABLE_SIZE 1000
/*******************************************************************************
* USE_SEPARATE_USER_EVENT_BUFFER
*
* Macro which should be defined as an integer value.
* Default is zero (0).
*
* This enables and disables the use of the separate user event buffer.
*
* Note: When using the separate user event buffer, you may get an artificial
* task instance named "Unknown actor". This is added as a placeholder when the
* user event history is longer than the task scheduling history.
******************************************************************************/
#define USE_SEPARATE_USER_EVENT_BUFFER 0
/*******************************************************************************
* USER_EVENT_BUFFER_SIZE
*
* Macro which should be defined as an integer value.
*
* This defines the capacity of the user event buffer, in number of slots.
* A single user event can use between 1 and X slots, depending on the data.
*
* Only in use if USE_SEPARATE_USER_EVENT_BUFFER is set to 1.
******************************************************************************/
#define USER_EVENT_BUFFER_SIZE 500
/*******************************************************************************
* USER_EVENT_CHANNELS
*
* Macro which should be defined as an integer value.
*
* This defines the number of allowed user event channels.
*
* Only in use if USE_SEPARATE_USER_EVENT_BUFFER is set to 1.
******************************************************************************/
#define CHANNEL_FORMAT_PAIRS 32
/*******************************************************************************
* NTask, NISR, NQueue, NSemaphore, NMutex
*
* A group of Macros which should be defined as an integer value of zero (0)
* or larger.
*
* This defines the capacity of the Object Property Table - the maximum number
* of objects active at any given point within each object class.
*
* NOTE: In case objects are deleted and created during runtime, this setting
* does not limit the total amount of objects, only the number of concurrently
* active objects.
*
* Using too small values will give an error message through the vTraceError
* routine, which makes the error message appear when opening the trace data
* in Tracealyzer. If you are using the recorder status monitor task,
* any error messages are displayed in console prints, assuming that the
* print macro has been defined properly (vConsolePrintMessage).
*
* It can be wise to start with very large values for these constants,
* unless you are very confident on these numbers. Then do a recording and
* check the actual usage in Tracealyzer. This is shown by selecting
* View -> Trace Details -> Resource Usage -> Object Table
*
* NOTE 2: Remember to account for all tasks created by the kernel, such as the
* IDLE task, timer task, and any tasks created by other 3rd party
* software components, such as communication stacks. The recorder also has an
* optional monitor task to account for, if this is used.
* Moreover, one task slot is used to indicate "(startup)", i.e., a fictive
* task that represent the time before the scheduler starts.
* NTask should thus be at least 2-3 slots larger than your application task count.
*
******************************************************************************/
#define NTask 15
#define NISR 15
#define NQueue 15
#define NSemaphore 15
#define NMutex 15
/* Maximum object name length for each class (includes zero termination) */
#define NameLenTask 15
#define NameLenISR 15
#define NameLenQueue 15
#define NameLenSemaphore 15
#define NameLenMutex 15
/******************************************************************************
* TRACE_DESCRIPTION
*
* Macro which should be defined as a string.
*
* This string is stored in the trace and displayed in Tracealyzer. Can be
* used to store, e.g., system version or build date. This is also used to store
* internal error messages from the recorder, which if occurs overwrites the
* value defined here. This may be maximum 256 chars.
*****************************************************************************/
#define TRACE_DESCRIPTION "Tracealyzer Recorder Test Program"
/******************************************************************************
* TRACE_DESCRIPTION_MAX_LENGTH
*
* The maximum length (including zero termination) for the TRACE_DESCRIPTION
* string. Since this string also is used for internal error messages from the
* recorder do not make it too short, as this may truncate the error messages.
* Default is 80.
* Maximum allowed length is 256 - the trace will fail to load if longer.
*****************************************************************************/
#define TRACE_DESCRIPTION_MAX_LENGTH 80
/******************************************************************************
* TRACE_DATA_ALLOCATION
*
* This defines how to allocate the recorder data structure, i.e., using a
* static declaration or using a dynamic allocation in runtime (malloc).
*
* Should be one of these two options:
* - TRACE_DATA_ALLOCATION_STATIC (default)
* - TRACE_DATA_ALLOCATION_DYNAMIC
*
* Using static allocation has the benefits of compile-time errors if the buffer
* is too large (too large constants in trcConfig.h) and no need to call the
* initialization routine (xTraceInitTraceData).
*
* Using dynamic allocation may give more flexibility in some cases.
*****************************************************************************/
#define TRACE_DATA_ALLOCATION TRACE_DATA_ALLOCATION_STATIC
/******************************************************************************
* CONFIGURATION REGARDING WHAT CODE/FEATURES TO INCLUDE
*****************************************************************************/
/******************************************************************************
* USE_TRACE_ASSERT
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 0.
*
* If this is one (1), the TRACE_ASSERT macro will verify that a condition is
* true. If the condition is false, vTraceError() will be called.
*****************************************************************************/
#define USE_TRACE_ASSERT 1
/******************************************************************************
* INCLUDE_FLOAT_SUPPORT
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 1.
*
* If this is zero (0), all references to floating point values are removed,
* in case floating point values are not supported by the platform used.
* Floating point values are only used in vTracePrintF and its subroutines, to
* store float (%f) or double (%lf) argments.
*
* Note: vTracePrintF can still be used with integer and string arguments in
* either case.
*****************************************************************************/
#define INCLUDE_FLOAT_SUPPORT 0
/******************************************************************************
* INCLUDE_USER_EVENTS
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 1.
*
* If this is zero (0) the code for creating User Events is excluded to
* reduce code size. User Events are application-generated events, like
* "printf" but for the trace log instead of console output. User Events are
* much faster than a printf and can therefore be used in timing critical code.
* See vTraceUserEvent() and vTracePrintF() in trcUser.h
*
* Note that Tracealyzer Standard Edition or Professional Edition is required
* for User Events, they are not displayed in Tracealyzer Free Edition.
*****************************************************************************/
#define INCLUDE_USER_EVENTS 1
/*****************************************************************************
* INCLUDE_READY_EVENTS
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 1.
*
* If this is zero (0), the code for recording Ready events is
* excluded. Note, this will make it impossible to calculate the correct
* response times.
*****************************************************************************/
#define INCLUDE_READY_EVENTS 1
/*****************************************************************************
* INCLUDE_NEW_TIME_EVENTS
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 0.
*
* If this is zero (1), events will be generated whenever the os clock is
* increased.
*****************************************************************************/
#define INCLUDE_NEW_TIME_EVENTS 0
/*****************************************************************************
* INCLUDE_ISR_TRACING
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 1.
*
* If this is zero (0), the code for recording Interrupt Service Routines is
* excluded to reduce code size.
*
* Note, if the kernel has no central interrupt dispatcher, recording ISRs
* require that you insert calls to vTraceStoreISRBegin and vTraceStoreISREnd
* in your interrupt handlers.
*****************************************************************************/
#define INCLUDE_ISR_TRACING 1
/******************************************************************************
* INCLUDE_OBJECT_DELETE
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 1.
*
* This must be enabled (1) if tasks, queues or other
* traced kernel objects are deleted at runtime. If no deletes are made, this
* can be set to 0 in order to exclude the delete-handling code.
*****************************************************************************/
#define INCLUDE_OBJECT_DELETE 0
/******************************************************************************
* CONFIGURATION RELATED TO BEHAVIOR
*****************************************************************************/
/******************************************************************************
* TRACE_RECORDER_STORE_MODE
*
* Macro which should be defined as one of:
* - TRACE_STORE_MODE_RING_BUFFER
* - TRACE_STORE_MODE_STOP_WHEN_FULL
* Default is TRACE_STORE_MODE_RING_BUFFER.
*
* With TRACE_RECORDER_STORE_MODE set to TRACE_STORE_MODE_RING_BUFFER, the events are
* stored in a ring buffer, i.e., where the oldest events are overwritten when
* the buffer becomes full. This allows you to get the last events leading up
* to an interesting state, e.g., an error, without having a large trace buffer
* for string the whole run since startup. In this mode, the recorder can run
* "forever" as the buffer never gets full, i.e., in the sense that it always
* has room for more events.
*
* To fetch the trace in mode TRACE_STORE_MODE_RING_BUFFER, you need to first halt the
* system using your debugger and then do a RAM dump, or to explicitly stop the
* recorder using vTraceStop() and then store/upload the trace data using a
* task that you need to provide yourself. The trace data is found in the struct
* RecorderData, initialized in trcBase.c.
*
* Note that, if you upload the trace using a RAM dump, i.e., when the system is
* halted on a breakpoint or by a debugger command, there is no need to stop the
* recorder first.
*
* When TRACE_RECORDER_STORE_MODE is TRACE_STORE_MODE_STOP_WHEN_FULL, the recording is
* stopped when the buffer becomes full. When the recorder stops itself this way
* vTracePortEnd() is called which allows for custom actions, such as triggering
* a task that stores the trace buffer, i.e., in case taking a RAM dump
* using an on-chip debugger is not possible. In the Windows port, vTracePortEnd
* saves the trace to file directly, but this is not recommended in a real-time
* system since the scheduler is blocked during the processing of vTracePortEnd.
*****************************************************************************/
#define TRACE_RECORDER_STORE_MODE TRACE_STORE_MODE_RING_BUFFER
/******************************************************************************
* STOP_AFTER_N_EVENTS
*
* Macro which should be defined as an integer value, or not defined.
* Default is -1
*
* STOP_AFTER_N_EVENTS is intended for tests of the ring buffer mode (when
* RECORDER_STORE_MODE is STORE_MODE_RING_BUFFER). It stops the recording when
* the specified number of events has been observed. This value can be larger
* than the buffer size, to allow for test of the "wrapping around" that occurs
* in ring buffer mode . A negative value (or no definition of this macro)
* disables this feature.
*****************************************************************************/
#define STOP_AFTER_N_EVENTS -1
/******************************************************************************
* USE_IMPLICIT_IFE_RULES
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 1.
*
* ### Instance Finish Events (IFE) ###
*
* For tasks with "infinite" main loops (non-terminating tasks), the concept
* of a task instance has no clear definition, it is an application-specific
* thing. Tracealyzer allows you to define Instance Finish Events (IFEs),
* which marks the point in a cyclic task when the "task instance" ends.
* The IFE is a blocking kernel call, typically in the main loop of a task
* which typically reads a message queue, waits for a semaphore or performs
* an explicit delay.
*
* If USE_IMPLICIT_IFE_RULES is one (1), the kernel macros (trcKernelPort.h)
* will define what kernel calls are considered by default to be IFEs.
*
* However, Implicit IFEs only applies to blocking kernel calls. If a
* service reads a message without blocking, it does not create a new
* instance since no blocking occurred.
*
* Moreover, the actual IFE might sometimes be another blocking call. We
* therefore allow for user-defined Explicit IFEs by calling
*
* vTraceTaskInstanceIsFinished()
*
* right before the kernel call considered as IFE. This does not create an
* additional event but instead stores the service code and object handle
* of the IFE call as properties of the task.
*
* If using Explicit IFEs and the task also calls an Implicit IFE, this may
* result in additional incorrect task instances.
* This is solved by disabling the Implicit IFEs for the task, by adding
* a call to
*
* vTraceTaskSkipDefaultInstanceFinishedEvents()
*
* in the very beginning of that task. This allows you to combine Explicit IFEs
* for some tasks with Implicit IFEs for the rest of the tasks, if
* USE_IMPLICIT_IFE_RULES is 1.
*
* By setting USE_IMPLICIT_IFE_RULES to zero (0), the implicit IFEs are disabled
* for all tasks. Tasks will then be considered to have a single instance only,
* covering all execution fragments, unless you define an explicit IFE in each
* task by calling vTraceTaskInstanceIsFinished before the blocking call.
*****************************************************************************/
#define USE_IMPLICIT_IFE_RULES 1
/******************************************************************************
* INCLUDE_SAVE_TO_FILE
*
* Macro which should be defined as either zero (0) or one (1).
* Default is 0.
*
* If enabled (1), the recorder will include code for saving the trace
* to a local file system.
******************************************************************************/
#ifdef WIN32
#define INCLUDE_SAVE_TO_FILE 1
#else
#define INCLUDE_SAVE_TO_FILE 0
#endif
/******************************************************************************
* TRACE_PROGRESS_MONITOR_TASK_PRIORITY
*
* Macro which sets the priority of the "recorder status monitor" task.
*
* This task, vTraceMonitorTask in trcUser.c, periodically writes
* the recorder status using the vTraceConsoleMessage macro, which is to
* be mapped to your console "printf" routine. The task is named TraceMon but
* is intentionally excluded from the demo trace.
*
* Default is tskIDLE_PRIORITY + 1
* Note that if your system constantly has a high CPU load from high-priority
* tasks, this might not be get a chance to execute.
*
* See vTraceMonitorTask in trcUser.c
*****************************************************************************/
#define TRACE_PROGRESS_MONITOR_TASK_PRIORITY (tskIDLE_PRIORITY + 1)
/******************************************************************************
* TRACE_PROGRESS_MONITOR_TASK_STACKSIZE
*
* Macro which sets the stack size of the "recorder status monitor" task.
*
* This task, vTraceMonitorTask in trcUser.c, periodically writes
* the recorder status using the vTraceConsoleMessage macro, which is to
* be mapped to your console "printf" routine. The task is intentionally
* excluded from the demo trace.
*
* See vTraceMonitorTask in trcUser.c
*****************************************************************************/
#define TRACE_PROGRESS_MONITOR_TASK_STACKSIZE 500
/******************************************************************************
* TRACE_PROGRESS_MONITOR_TASK_PERIOD
*
* Macro which sets the period of the "recorder status monitor" task.
*
* This task, vTraceMonitorTask in trcUser.c, periodically writes
* the recorder status using the vTraceConsoleMessage macro, which is to
* be mapped to your console "printf" routine. The task is named TraceMon but
* is intentionally excluded from the demo trace.
*
* Default is 1000 ticks (typically 1 second). On the Windows port, a lower
* value is suggested since the Windows port runs very slowly, often 20-40
* times slower than the simulated time.
*
* See vTraceMonitorTask in trcUser.c
*****************************************************************************/
#ifdef WIN32
#define TRACE_PROGRESS_MONITOR_TASK_PERIOD 100
#else
#define TRACE_PROGRESS_MONITOR_TASK_PERIOD 1000
#endif
/******************************************************************************
* TEAM_LICENSE_CODE
*
* Macro which defines a string - the team license code.
* If no team license is available, this should be an empty string "".
* This should be maximum 32 chars, including zero-termination.
*****************************************************************************/
#define TEAM_LICENSE_CODE ""
#endif

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@@ -1,474 +0,0 @@
/*******************************************************************************
* Tracealyzer v2.4.1 Recorder Library
* Percepio AB, www.percepio.com
*
* trcHardwarePort.h
*
* Contains together with trcHardwarePort.c all hardware portability issues of
* the trace recorder library.
*
* Terms of Use
* This software is copyright Percepio AB. The recorder library is free for
* use together with Percepio products. You may distribute the recorder library
* in its original form, including modifications in trcPort.c and trcPort.h
* given that these modification are clearly marked as your own modifications
* and documented in the initial comment section of these source files.
* This software is the intellectual property of Percepio AB and may not be
* sold or in other ways commercially redistributed without explicit written
* permission by Percepio AB.
*
* Disclaimer
* The trace tool and recorder library is being delivered to you AS IS and
* Percepio AB makes no warranty as to its use or performance. Percepio AB does
* not and cannot warrant the performance or results you may obtain by using the
* software or documentation. Percepio AB make no warranties, express or
* implied, as to noninfringement of third party rights, merchantability, or
* fitness for any particular purpose. In no event will Percepio AB, its
* technology partners, or distributors be liable to you for any consequential,
* incidental or special damages, including any lost profits or lost savings,
* even if a representative of Percepio AB has been advised of the possibility
* of such damages, or for any claim by any third party. Some jurisdictions do
* not allow the exclusion or limitation of incidental, consequential or special
* damages, or the exclusion of implied warranties or limitations on how long an
* implied warranty may last, so the above limitations may not apply to you.
*
* Copyright Percepio AB, 2013.
* www.percepio.com
******************************************************************************/
#ifndef TRCPORT_H
#define TRCPORT_H
#include "trcKernelPort.h"
/* If Win32 port */
#ifdef WIN32
#undef _WIN32_WINNT
#define _WIN32_WINNT 0x0600
/* Standard includes. */
#include <stdio.h>
#include <windows.h>
#include <direct.h>
/*******************************************************************************
* The Win32 port by default saves the trace to file and then kills the
* program when the recorder is stopped, to facilitate quick, simple tests
* of the recorder.
******************************************************************************/
#define WIN32_PORT_SAVE_WHEN_STOPPED 1
#define WIN32_PORT_EXIT_WHEN_STOPPED 1
#endif
#define DIRECTION_INCREMENTING 1
#define DIRECTION_DECREMENTING 2
/******************************************************************************
* Supported ports
*
* PORT_HWIndependent
* A hardware independent fallback option for event timestamping. Provides low
* resolution timestamps based on the OS tick.
* This may be used on the Win32 port, but may also be used on embedded hardware
* platforms. All time durations will be truncated to the OS tick frequency,
* typically 1 KHz. This means that a task or ISR that executes in less than
* 1 ms get an execution time of zero.
*
* PORT_Win32
* "Accurate" timestamping based on the Windows performance counter. Note that
* this gives the host machine time.
*
* Officially supported hardware timer ports:
* - PORT_Atmel_AT91SAM7
* - PORT_Atmel_UC3A0
* - PORT_ARM_CortexM
* - PORT_Renesas_RX600
* - PORT_Microchip_dsPIC_AND_PIC24
*
* We also provide several "unofficial" hardware-specific ports. There have
* been developed by external contributors, and have not yet been verified
* by Percepio AB. Let us know if you have problems getting these to work.
*
* Unofficial hardware specific ports provided are:
* - PORT_TEXAS_INSTRUMENTS_TMS570
* - PORT_TEXAS_INSTRUMENTS_MSP430
* - PORT_MICROCHIP_PIC32
* - PORT_XILINX_PPC405
* - PORT_XILINX_PPC440
* - PORT_XILINX_MICROBLAZE
* - PORT_NXP_LPC210X
*
*****************************************************************************/
#define PORT_NOT_SET -1
/*** Officially supported hardware timer ports *******************************/
#define PORT_HWIndependent 0
#define PORT_Win32 1
#define PORT_Atmel_AT91SAM7 2
#define PORT_Atmel_UC3A0 3
#define PORT_ARM_CortexM 4
#define PORT_Renesas_RX600 5
#define PORT_Microchip_dsPIC_AND_PIC24 6
/*** Unofficial ports, provided by external developers, not yet verified *****/
#define PORT_TEXAS_INSTRUMENTS_TMS570 7
#define PORT_TEXAS_INSTRUMENTS_MSP430 8
#define PORT_MICROCHIP_PIC32 9
#define PORT_XILINX_PPC405 10
#define PORT_XILINX_PPC440 11
#define PORT_XILINX_MICROBLAZE 12
#define PORT_NXP_LPC210X 13
/*** Select your port here! **************************************************/
#define SELECTED_PORT PORT_Win32
/*****************************************************************************/
#if (SELECTED_PORT == PORT_NOT_SET)
#error "You need to define SELECTED_PORT here!"
#endif
/*******************************************************************************
* IRQ_PRIORITY_ORDER
*
* Macro which should be defined as an integer of 0 or 1.
*
* This should be 0 if lower IRQ priority values implies higher priority
* levels, such as on ARM Cortex M. If the opposite scheme is used, i.e.,
* if higher IRQ priority values means higher priority, this should be 1.
*
* This setting is not critical. It is used only to sort and colorize the
* interrupts in priority order, in case you record interrupts using
* the vTraceStoreISRBegin and vTraceStoreISREnd routines.
*
* We provide this setting for some hardware architectures below:
* - ARM Cortex M: 0 (lower IRQ priority values are more significant)
* - Atmel AT91SAM7x: 1 (higher IRQ priority values are more significant)
* - Atmel AVR32: 1 (higher IRQ priority values are more significant)
* - Renesas RX600: 1 (higher IRQ priority values are more significant)
* - Microchip PIC24: 0 (lower IRQ priority values are more significant)
* - Microchip dsPIC: 0 (lower IRQ priority values are more significant)
* - TI TMS570: 0 (lower IRQ priority values are more significant)
* - Freescale HCS08: 0 (lower IRQ priority values are more significant)
* - Freescale HCS12: 0 (lower IRQ priority values are more significant)
* - PowerPC 405: 0 (lower IRQ priority values are more significant)
* - PowerPC 440: 0 (lower IRQ priority values are more significant)
* - Freescale ColdFire: 1 (higher IRQ priority values are more significant)
* - NXP LPC210x: 0 (lower IRQ priority values are more significant)
* - MicroBlaze: 0 (lower IRQ priority values are more significant)
*
* If your chip is not on the above list, and you perhaps know this detail by
* heart, please inform us by e-mail to support@percepio.com.
*
******************************************************************************
*
* HWTC Macros
*
* These four HWTC macros provides a hardware isolation layer representing a
* generic hardware timer/counter used for driving the operating system tick,
* such as the SysTick feature of ARM Cortex M3/M4, or the PIT of the Atmel
* AT91SAM7X.
*
* HWTC_COUNT: The current value of the counter. This is expected to be reset
* a each tick interrupt. Thus, when the tick handler starts, the counter has
* already wrapped.
*
* HWTC_COUNT_DIRECTION: Should be one of:
* - DIRECTION_INCREMENTING - for hardware timer/counters of incrementing type
* such as the PIT on Atmel AT91SAM7X.
* When the counter value reach HWTC_PERIOD, it is reset to zero and the
* interrupt is signaled.
* - DIRECTION_DECREMENTING - for hardware timer/counters of decrementing type
* such as the SysTick on ARM Cortex M3/M4 chips.
* When the counter value reach 0, it is reset to HWTC_PERIOD and the
* interrupt is signaled.
*
* HWTC_PERIOD: The number of increments or decrements of HWTC_COUNT between
* two tick interrupts. This should preferably be mapped to the reload
* register of the hardware timer, to make it more portable between chips in the
* same family. The macro should in most cases be (reload register + 1).
*
* HWTC_DIVISOR: If the timer frequency is very high, like on the Cortex M chips
* (where the SysTick runs at the core clock frequency), the "differential
* timestamping" used in the recorder will more frequently insert extra XTS
* events to store the timestamps, which increases the event buffer usage.
* In such cases, to reduce the number of XTS events and thereby get longer
* traces, you use HWTC_DIVISOR to scale down the timestamps and frequency.
* Assuming a OS tick rate of 1 KHz, it is suggested to keep the effective timer
* frequency below 65 MHz to avoid an excessive amount of XTS events. Thus, a
* Cortex M chip running at 72 MHZ should use a HWTC_DIVISOR of 2, while a
* faster chip require a higher HWTC_DIVISOR value.
*
* The HWTC macros and vTracePortGetTimeStamp is the main porting issue
* or the trace recorder library. Typically you should not need to change
* the code of vTracePortGetTimeStamp if using the HWTC macros.
*
******************************************************************************/
#if (SELECTED_PORT == PORT_Win32)
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT (ulGetRunTimeCounterValue())
#define HWTC_PERIOD 0
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...
#elif (SELECTED_PORT == PORT_HWIndependent)
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT 0
#define HWTC_PERIOD 1
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 1 // Please update according to your hardware...
#elif (SELECTED_PORT == PORT_Atmel_AT91SAM7)
/* HWTC_PERIOD is hardcoded for AT91SAM7X256-EK Board (48 MHz)
A more generic solution is to get the period from pxPIT->PITC_PIMR */
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT (AT91C_BASE_PITC->PITC_PIIR & 0xFFFFF)
#define HWTC_PERIOD 2995
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_Atmel_UC3A0)
/* For Atmel AVR32 (AT32UC3A) */
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT sysreg_read(AVR32_COUNT)
#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_ARM_CortexM)
/* For all chips using ARM Cortex M cores */
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
#define HWTC_COUNT (*((uint32_t*)0xE000E018))
#define HWTC_PERIOD ((*(uint32_t*)0xE000E014) + 1)
#define HWTC_DIVISOR 2
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_Renesas_RX600)
#include "iodefine.h"
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT (CMT0.CMCNT)
#define HWTC_PERIOD ((((TRACE_PERIPHERAL_CLOCK_HZ/TRACE_TICK_RATE_HZ)-1)/8))
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_Microchip_dsPIC_AND_PIC24)
/* For Microchip PIC24 and dsPIC (16 bit) */
/* Note: The trace library was originally designed for 32-bit MCUs, and is slower
than intended on 16-bit MCUs. Storing an event on a PIC24 takes about 70 <20>s.
In comparison, 32-bit MCUs are often 10-20 times faster. If recording overhead
becomes a problem on PIC24, use the filters to exclude less interesting tasks
or system calls. */
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT (TMR1)
#define HWTC_PERIOD (PR1+1)
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_NXP_LPC210X)
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
/* Tested with LPC2106, but should work with most LPC21XX chips. */
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT *((uint32_t *)0xE0004008 )
#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_TMS570)
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
#define RTIFRC0 *((uint32_t *)0xFFFFFC10)
#define RTICOMP0 *((uint32_t *)0xFFFFFC50)
#define RTIUDCP0 *((uint32_t *)0xFFFFFC54)
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT (RTIFRC0 - (RTICOMP0 - RTIUDCP0))
#define HWTC_PERIOD (RTIUDCP0)
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_TEXAS_INSTRUMENTS_MSP430)
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT (TA0R)
#define HWTC_PERIOD TRACE_CPU_CLOCKS_PER_TICK
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 1 // higher IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_MICROCHIP_PIC32)
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
#define HWTC_COUNT_DIRECTION DIRECTION_INCREMENTING
#define HWTC_COUNT (ReadTimer1()) /* Should be available in BSP */
#define HWTC_PERIOD (ReadPeriod1()+1) /* Should be available in BSP */
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_XILINX_PPC405)
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
#define HWTC_COUNT mfspr( 0x3db)
#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_XILINX_PPC440)
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
/* This should work with most PowerPC chips */
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
#define HWTC_COUNT mfspr( 0x016 )
#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
#define HWTC_DIVISOR 1
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
#elif (SELECTED_PORT == PORT_XILINX_MICROBLAZE)
/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */
/* This should work with most Microblaze configurations.
* It uses the AXI Timer 0 - the tick interrupt source.
* If an AXI Timer 0 peripheral is available on your hardware platform, no modifications are required.
*/
#include "xtmrctr_l.h"
#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING
#define HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 )
#define HWTC_PERIOD ( TRACE_CPU_CLOCK_HZ / TRACE_TICK_RATE_HZ )
#define HWTC_DIVISOR 16
#define IRQ_PRIORITY_ORDER 0 // lower IRQ priority values are more significant
#elif (SELECTED_PORT != PORT_NOT_SET)
#error "SELECTED_PORT had unsupported value!"
#define SELECTED_PORT PORT_NOT_SET
#endif
#if (SELECTED_PORT != PORT_NOT_SET)
#ifndef HWTC_COUNT_DIRECTION
#error "HWTC_COUNT_DIRECTION is not set!"
#endif
#ifndef HWTC_COUNT
#error "HWTC_COUNT is not set!"
#endif
#ifndef HWTC_PERIOD
#error "HWTC_PERIOD is not set!"
#endif
#ifndef HWTC_DIVISOR
#error "HWTC_DIVISOR is not set!"
#endif
#ifndef IRQ_PRIORITY_ORDER
#error "IRQ_PRIORITY_ORDER is not set!"
#elif (IRQ_PRIORITY_ORDER != 0) && (IRQ_PRIORITY_ORDER != 1)
#error "IRQ_PRIORITY_ORDER has bad value!"
#endif
#if (HWTC_DIVISOR < 1)
#error "HWTC_DIVISOR must be a non-zero positive value!"
#endif
#endif
/*******************************************************************************
* vTraceConsoleMessage
*
* A wrapper for your system-specific console "printf" console output function.
* This needs to be correctly defined to see status reports from the trace
* status monitor task (this is defined in trcUser.c).
******************************************************************************/
#if (SELECTED_PORT == PORT_Atmel_AT91SAM7)
/* Port specific includes */
#include "console.h"
#endif
#define vTraceConsoleMessage(x)
/*******************************************************************************
* vTracePortGetTimeStamp
*
* Returns the current time based on the HWTC macros which provide a hardware
* isolation layer towards the hardware timer/counter.
*
* The HWTC macros and vTracePortGetTimeStamp is the main porting issue
* or the trace recorder library. Typically you should not need to change
* the code of vTracePortGetTimeStamp if using the HWTC macros.
*
******************************************************************************/
void vTracePortGetTimeStamp(uint32_t *puiTimestamp);
/*******************************************************************************
* vTracePortEnd
*
* This function is called when the recorder is stopped due to full buffer.
* Mainly intended to show a message in the console.
* This is used by the Win32 port to store the trace to a file. The file path is
* set using vTracePortSetFileName.
******************************************************************************/
void vTracePortEnd(void);
#if (INCLUDE_SAVE_TO_FILE == 1)
/*******************************************************************************
* vTracePortSetOutFile
*
* Sets the filename/path used in vTracePortSave.
* This is set in a separate function, since the Win32 port calls vTracePortSave
* in vTracePortEnd if WIN32_PORT_SAVE_WHEN_STOPPED is set.
******************************************************************************/
void vTracePortSetOutFile(char* path);
/******************************************************************************
* vTracePortSave
*
* Saves the trace to a file on a target-side file system. The path is set in a
* separate function, vTracePortSetOutFile, since the Win32 port may call
* vTracePortSave in vTracePortEnd, if using WIN32_PORT_SAVE_WHEN_STOPPED.
******************************************************************************/
void vTracePortSave(void);
#else
#define vTraceConsoleMessage(x)
#define vTracePortSetOutFile(path)
#define vTracePortSave(void)
#endif
#endif

View File

@@ -1,259 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#pragma comment( lib, "ws2_32.lib" )
/* Win32 includes. */
#include <WinSock2.h>
#include <stdio.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* Dimensions the buffer into which input characters are placed. */
#define cmdMAX_INPUT_SIZE 60
/* Dimensions the buffer into which string outputs can be placed. */
#define cmdMAX_OUTPUT_SIZE 1024
/* Dimensions the buffer passed to the recvfrom() call. */
#define cmdSOCKET_INPUT_BUFFER_SIZE 60
/*
* Open and configure the UDP socket.
*/
static SOCKET prvOpenUDPSocket( void );
/*-----------------------------------------------------------*/
/*
* Task that provides the input and output for the FreeRTOS+CLI command
* interpreter. In this case a UDP port is used. See the URL in the comments
* within main.c for the location of the online documentation.
*/
void vUDPCommandInterpreterTask( void *pvParameters )
{
long lBytes, lByte;
signed char cInChar, cInputIndex = 0;
static signed char cInputString[ cmdMAX_INPUT_SIZE ], cOutputString[ cmdMAX_OUTPUT_SIZE ], cLocalBuffer[ cmdSOCKET_INPUT_BUFFER_SIZE ];
portBASE_TYPE xMoreDataToFollow;
volatile int iErrorCode = 0;
struct sockaddr_in xClient;
int xClientAddressLength = sizeof( struct sockaddr_in );
SOCKET xSocket;
/* Just to prevent compiler warnings. */
( void ) pvParameters;
/* Attempt to open the socket. */
xSocket = prvOpenUDPSocket();
if( xSocket != INVALID_SOCKET )
{
for( ;; )
{
/* Wait for incoming data on the opened socket. */
lBytes = recvfrom( xSocket, cLocalBuffer, sizeof( cLocalBuffer ), 0, ( struct sockaddr * ) &xClient, &xClientAddressLength );
if( lBytes == SOCKET_ERROR )
{
/* Something went wrong, but it is not handled by this simple
example. */
iErrorCode = WSAGetLastError();
}
else
{
/* Process each received byte in turn. */
lByte = 0;
while( lByte < lBytes )
{
/* The next character in the input buffer. */
cInChar = cLocalBuffer[ lByte ];
lByte++;
/* Newline characters are taken as the end of the command
string. */
if( cInChar == '\n' )
{
/* Process the input string received prior to the
newline. */
do
{
/* Pass the string to FreeRTOS+CLI. */
xMoreDataToFollow = FreeRTOS_CLIProcessCommand( cInputString, cOutputString, cmdMAX_OUTPUT_SIZE );
/* Send the output generated by the command's
implementation. */
sendto( xSocket, cOutputString, strlen( cOutputString ), 0, ( SOCKADDR * ) &xClient, xClientAddressLength );
} while( xMoreDataToFollow != pdFALSE ); /* Until the command does not generate any more output. */
/* All the strings generated by the command processing
have been sent. Clear the input string ready to receive
the next command. */
cInputIndex = 0;
memset( cInputString, 0x00, cmdMAX_INPUT_SIZE );
/* Transmit a spacer, just to make the command console
easier to read. */
sendto( xSocket, "\r\n", strlen( "\r\n" ), 0, ( SOCKADDR * ) &xClient, xClientAddressLength );
}
else
{
if( cInChar == '\r' )
{
/* Ignore the character. Newlines are used to
detect the end of the input string. */
}
else if( cInChar == '\b' )
{
/* Backspace was pressed. Erase the last character
in the string - if any. */
if( cInputIndex > 0 )
{
cInputIndex--;
cInputString[ cInputIndex ] = '\0';
}
}
else
{
/* A character was entered. Add it to the string
entered so far. When a \n is entered the complete
string will be passed to the command interpreter. */
if( cInputIndex < cmdMAX_INPUT_SIZE )
{
cInputString[ cInputIndex ] = cInChar;
cInputIndex++;
}
}
}
}
}
}
}
else
{
/* The socket could not be opened. */
vTaskDelete( NULL );
}
}
/*-----------------------------------------------------------*/
static SOCKET prvOpenUDPSocket( void )
{
WSADATA xWSAData;
WORD wVersionRequested;
struct sockaddr_in xServer;
SOCKET xSocket = INVALID_SOCKET;
wVersionRequested = MAKEWORD( 2, 2 );
/* Prepare to use WinSock. */
if( WSAStartup( wVersionRequested, &xWSAData ) != 0 )
{
fprintf( stderr, "Could not open Windows connection.\n" );
}
else
{
xSocket = socket( AF_INET, SOCK_DGRAM, 0 );
if( xSocket == INVALID_SOCKET)
{
fprintf( stderr, "Could not create socket.\n" );
WSACleanup();
}
else
{
/* Zero out the server structure. */
memset( ( void * ) &xServer, 0x00, sizeof( struct sockaddr_in ) );
/* Set family and port. */
xServer.sin_family = AF_INET;
xServer.sin_port = htons( configUDP_CLI_PORT_NUMBER );
/* Assign the loopback address */
xServer.sin_addr.S_un.S_un_b.s_b1 = 127;
xServer.sin_addr.S_un.S_un_b.s_b2 = 0;
xServer.sin_addr.S_un.S_un_b.s_b3 = 0;
xServer.sin_addr.S_un.S_un_b.s_b4 = 1;
/* Bind the address to the socket. */
if( bind( xSocket, ( struct sockaddr * ) &xServer, sizeof( struct sockaddr_in ) ) == -1 )
{
fprintf( stderr, "Could not socket to port %d.\n", configUDP_CLI_PORT_NUMBER );
closesocket( xSocket );
xSocket = INVALID_SOCKET;
WSACleanup();
}
}
}
return xSocket;
}

View File

@@ -1,166 +0,0 @@
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View File

@@ -1,302 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*
******************************************************************************
* -NOTE- The Win32 port is a simulation (or is that emulation?) only! Do not
* expect to get real time behaviour from the Win32 port or this demo
* application. It is provided as a convenient development and demonstration
* test bed only. This was tested using Windows XP on a dual core laptop.
*
* Windows will not be running the FreeRTOS simulator threads continuously, so
* the timing information in the FreeRTOS+Trace logs have no meaningful units.
* See the documentation page for the Windows simulator for an explanation of
* the slow timing:
* http://www.freertos.org/FreeRTOS-Windows-Simulator-Emulator-for-Visual-Studio-and-Eclipse-MingW.html
* - READ THE WEB DOCUMENTATION FOR THIS PORT FOR MORE INFORMATION ON USING IT -
*
* Documentation for this demo can be found on:
* http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_Trace/Free_RTOS_Plus_Trace_CLI_Example.shtml
******************************************************************************
*
* This is a simple FreeRTOS Windows simulator project that makes it easy to
* evaluate FreeRTOS+CLI and FreeRTOS+Trace on a standard desktop PC, without
* any external hardware or interfaces being required.
*
* To keep everything as simple as possible, the command line interface is
* accessed through a UDP socket on the default Windows loopback IP address of
* 127.0.0.1. Full instructions are provided on the documentation page
* referenced above.
*
* Commands are provided to both start and stop a FreeRTOS+Trace recording.
* Stopping a recording will result in the recorded data being saved to the
* hard disk, ready for viewing in the FreeRTOS+Trace graphical user interface.
* Again, full instructions are provided on the documentation page referenced
* above.
*
* A queue send task and a queue receive task are defined in this file. The
* queue receive task spends most of its time blocked on the queue waiting for
* messages to arrive. The queue send task periodically sends a message to the
* queue, causing the queue receive task to exit the Blocked state. The
* priority of the queue receive task is above that of the queue send task, so
* it pre-empts the queue send task as soon as it leaves the Blocked state. It
* then consumes the message from the queue and prints "message received" to
* the screen before returning to block on the queue once again. This
* sequencing is clearly visible in the recorded FreeRTOS+Trace data.
*
*/
/* Standard includes. */
#include <stdio.h>
#include <stdint.h>
/* FreeRTOS includes. */
#include <FreeRTOS.h>
#include "task.h"
#include "queue.h"
/* FreeRTOS+Trace includes. */
#include "trcUser.h"
/* Priorities at which the tasks are created. */
#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainUDP_CLI_TASK_PRIORITY ( tskIDLE_PRIORITY )
/* The rate at which data is sent to the queue. The (simulated) 250ms value is
converted to ticks using the portTICK_RATE_MS constant. */
#define mainQUEUE_SEND_FREQUENCY_MS ( 250 / portTICK_RATE_MS )
/* The number of items the queue can hold. This is 1 as the receive task
will remove items as they are added, meaning the send task should always find
the queue empty. */
#define mainQUEUE_LENGTH ( 1 )
/*-----------------------------------------------------------*/
/*
* The queue send and receive tasks as described in the comments at the top of
* this file.
*/
static void prvQueueReceiveTask( void *pvParameters );
static void prvQueueSendTask( void *pvParameters );
/*
* The task that implements the UDP command interpreter using FreeRTOS+CLI.
*/
extern void vUDPCommandInterpreterTask( void *pvParameters );
/*
* Register commands that can be used with FreeRTOS+CLI through the UDP socket.
* The commands are defined in CLI-commands.c.
*/
extern void vRegisterCLICommands( void );
/* The queue used by both tasks. */
static xQueueHandle xQueue = NULL;
/* The user trace event posted to the trace recording on each tick interrupt.
Note tick events will not appear in the trace recording with regular period
because this project runs in a Windows simulator, and does not therefore
exhibit deterministic behaviour. */
traceLabel xTickTraceUserEvent;
/*-----------------------------------------------------------*/
int main( void )
{
const uint32_t ulLongTime_ms = 250UL;
/* Initialise the trace recorder and create the label used to post user
events to the trace recording on each tick interrupt. */
vTraceInitTraceData();
xTickTraceUserEvent = xTraceOpenLabel( "tick" );
/* Create the queue used to pass messages from the queue send task to the
queue receive task. */
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );
/* Give the queue a name for the FreeRTOS+Trace log. */
vTraceSetQueueName( xQueue, "DemoQ" );
/* Start the two tasks as described in the comments at the top of this
file. */
xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
"Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. Not actually used as a stack in the Win32 simulator port. */
NULL, /* The parameter passed to the task - not used in this example. */
mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
NULL ); /* The task handle is not required, so NULL is passed. */
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );
/* Create the task that handles the CLI on a UDP port. The port number
is set using the configUDP_CLI_PORT_NUMBER setting in FreeRTOSConfig.h. */
xTaskCreate( vUDPCommandInterpreterTask, "CLI", configMINIMAL_STACK_SIZE, NULL, mainUDP_CLI_TASK_PRIORITY, NULL );
/* Register commands with the FreeRTOS+CLI command interpreter. */
vRegisterCLICommands();
/* Start the tasks and timer running. */
vTaskStartScheduler();
/* If all is well, the scheduler will now be running, and the following
line will never be reached. If the following line does execute, then
there was insufficient FreeRTOS heap memory available for the idle and/or
timer tasks to be created. See the memory management section on the
FreeRTOS web site for more details (this is standard text that is not not
really applicable to the Win32 simulator port). */
for( ;; )
{
Sleep( ulLongTime_ms );
}
}
/*-----------------------------------------------------------*/
static void prvQueueSendTask( void *pvParameters )
{
portTickType xNextWakeTime;
const unsigned long ulValueToSend = 100UL;
/* Remove warning about unused parameters. */
( void ) pvParameters;
/* Initialise xNextWakeTime - this only needs to be done once. */
xNextWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Place this task in the blocked state until it is time to run again.
While in the Blocked state this task will not consume any CPU time. */
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
/* Send to the queue - causing the queue receive task to unblock and
write a message to the display. 0 is used as the block time so the
sending operation will not block - it shouldn't need to block as the
queue should always be empty at this point in the code, and it is an
error if it is not. */
xQueueSend( xQueue, &ulValueToSend, 0U );
}
}
/*-----------------------------------------------------------*/
static void prvQueueReceiveTask( void *pvParameters )
{
unsigned long ulReceivedValue;
/* Remove warning about unused parameters. */
( void ) pvParameters;
for( ;; )
{
/* Wait until something arrives in the queue - this task will block
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
FreeRTOSConfig.h. */
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
/* To get here something must have been received from the queue, but
is it the expected value? If it is, write the message to the
display before looping back to block on the queue again. */
if( ulReceivedValue == 100UL )
{
printf( "Message received!\r\n" );
ulReceivedValue = 0U;
}
}
}
/*-----------------------------------------------------------*/
void vApplicationIdleHook( void )
{
const unsigned long ulMSToSleep = 5;
/* This function is called on each cycle of the idle task if
configUSE_IDLE_HOOK is set to 1 in FreeRTOSConfig.h. Sleep to reduce CPU
load. */
Sleep( ulMSToSleep );
}
/*-----------------------------------------------------------*/
void vAssertCalled( void )
{
const unsigned long ulLongSleep = 1000UL;
taskDISABLE_INTERRUPTS();
for( ;; )
{
Sleep( ulLongSleep );
}
}
/*-----------------------------------------------------------*/
void vApplicationTickHook( void )
{
/* Write a user event to the trace log.
Note tick events will not appear in the trace recording with regular period
because this project runs in a Windows simulator, and does not therefore
exhibit deterministic behaviour. */
vTraceUserEvent( xTickTraceUserEvent );
}

View File

@@ -1,7 +0,0 @@
Directories:
+ FreeRTOS-Plus/Demo_Projects_Using_FreeRTOS_Simulator/FreeRTOS_Plus_CLI_with_Trace
contains a FreeRTOS windows simulator demo project for both FreeRTOS+CLI and
FreeRTOS+Trace. See http://www.FreeRTOS.org/trace for information on using
the project.

View File

@@ -1,135 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
* http://www.freertos.org/a00110.html
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configTICK_RATE_HZ ( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 60 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the Win32 thread. */
#define configTOTAL_HEAP_SIZE ( ( size_t ) 0 ) /* This parameter has no effect when heap_3.c is included in the project. */
#define configMAX_TASK_NAME_LEN ( 7 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_CO_ROUTINES 0
#define configUSE_MUTEXES 1
#define configCHECK_FOR_STACK_OVERFLOW 0 /* Not applicable to the Win32 port. */
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_MALLOC_FAILED_HOOK 0
#define configUSE_APPLICATION_TASK_TAG 0
#define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_ALTERNATIVE_API 0
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY 2
#define configTIMER_QUEUE_LENGTH 20
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 7 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTaskGetSchedulerState 1
/* Run time stats gathering definitions. */
#define configGENERATE_RUN_TIME_STATS 0
extern void vAssertCalled( void );
#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled()
/* The TCP port used by both the secure client and the secure server. */
#define configTCP_PORT_NUMBER 5001
#endif /* FREERTOS_CONFIG_H */

View File

@@ -1,20 +0,0 @@

Microsoft Visual Studio Solution File, Format Version 11.00
# Visual C++ Express 2010
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "WIN32", "WIN32.vcxproj", "{C686325E-3261-42F7-AEB1-DDE5280E1CEB}"
EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
Debug|Win32 = Debug|Win32
Release|Win32 = Release|Win32
EndGlobalSection
GlobalSection(ProjectConfigurationPlatforms) = postSolution
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.ActiveCfg = Debug|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.Build.0 = Debug|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.ActiveCfg = Release|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.Build.0 = Release|Win32
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE
EndGlobalSection
EndGlobal

View File

@@ -1,5 +0,0 @@
[InternetShortcut]
URL=http://www.freertos.org/FreeRTOS-Plus/CyaSSL/FreeRTOS_CyaSSL_Example.shtml
IDList=
[{000214A0-0000-0000-C000-000000000046}]
Prop3=19,2

View File

@@ -1,174 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#pragma comment( lib, "ws2_32.lib" )
/* Win32 includes. */
#include <WinSock2.h>
/* CyaSSL includes. */
#include "cyassl/ssl.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/*-----------------------------------------------------------*/
/* The CyaSSL context for the client. */
static CYASSL_CTX* xCyaSSL_ClientContext = NULL;
/*-----------------------------------------------------------*/
/* See the comments at the top of main.c. */
void vSecureTCPClientTask( void *pvParameters )
{
SOCKET xClientSocket;
struct sockaddr_in xConnection;
CYASSL* xCyaSSL_Object;
WORD wVersionRequested;
WSADATA xWSAData;
char cString[ 50 ];
portBASE_TYPE lReturned;
uint32_t ulCount = 0UL;
/* Remove compiler warning about unused parameters. */
( void ) pvParameters;
/* Prepare to use WinSock. */
wVersionRequested = MAKEWORD( 2, 2 );
configASSERT( WSAStartup( wVersionRequested, &xWSAData ) == 0 );
/* Set family and port for client socket. */
memset( ( void * ) &xConnection, 0x00, sizeof( struct sockaddr_in ) );
xConnection.sin_family = AF_INET;
xConnection.sin_addr.s_addr = inet_addr("127.0.0.1");
xConnection.sin_port = htons( configTCP_PORT_NUMBER );
/* Attempt to create a context that uses the TLS V1 server protocol. */
xCyaSSL_ClientContext = CyaSSL_CTX_new( CyaTLSv1_client_method() );
configASSERT( xCyaSSL_ClientContext );
/* Load the CA certificate. */
lReturned = CyaSSL_CTX_load_verify_locations( xCyaSSL_ClientContext, "ca-cert.pem", 0 );
configASSERT( lReturned == SSL_SUCCESS );
for( ;; )
{
/* Create the socket. */
xClientSocket = socket( AF_INET, SOCK_STREAM, 0 );
configASSERT( xClientSocket != INVALID_SOCKET );
/* Connect to the secure server. */
if( connect( xClientSocket, ( SOCKADDR * ) &xConnection, sizeof( xConnection ) ) == 0 )
{
/* The connect was successful. Create a CyaSSL object to associate
with this connection. */
xCyaSSL_Object = CyaSSL_new( xCyaSSL_ClientContext );
if( xCyaSSL_Object != NULL )
{
/* Associate the created CyaSSL object with the connected
socket. */
lReturned = CyaSSL_set_fd( xCyaSSL_Object, xClientSocket );
configASSERT( lReturned == SSL_SUCCESS );
/* The count is used to differentiate between messages sent to
the server, and to break out of the do while loop below. */
ulCount = 0UL;
do
{
/* Create the string that is sent to the secure server. */
sprintf( cString, "Message number %lu\r\n", ulCount );
/* The next line is the secure equivalent of the standard
sockets call:
lReturned = send( xClientSocket, cString, strlen( cString ) + 1, 0 ); */
lReturned = CyaSSL_write( xCyaSSL_Object, cString, strlen( cString ) + 1 );
/* Short delay to prevent the messages streaming up the
console too quickly. */
vTaskDelay( 50 );
ulCount++;
} while( ( lReturned != SOCKET_ERROR ) && ( ulCount < 10UL ) );
}
CyaSSL_free( xCyaSSL_Object );
closesocket( xClientSocket );
/* Delay for a short time before starting over. */
vTaskDelay( 250 );
}
}
}
/*-----------------------------------------------------------*/

View File

@@ -1,284 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#pragma comment( lib, "ws2_32.lib" )
/* Win32 includes. */
#include <WinSock2.h>
/* CyaSSL includes. */
#include "cyassl/ssl.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* This application is using the FreeRTOS Windows simulator, which uses the
FreeRTOS scheduler to schedule FreeRTOS task within the Windows environment.
The Windows envrionment must not be allowed to block any Windows threads that
are running FreeRTOS tasks, unless the FreeRTOS task is running at the FreeRTOS
idle priority. For simplicity, this demo uses the Windows TCP/IP stack, the
API for which can cause Windows threads to block. Therefore, any FreeRTOS task
that makes calls to the Windows TCP/IP stack must be assigned the idle prioity.
Note this is only a restriction of the simulated Windows environment - real
FreeRTOS ports do not have this restriction. */
#define sstSECURE_CLIENT_TASK_PRIORITY ( tskIDLE_PRIORITY )
/*-----------------------------------------------------------*/
/*
* Open, configures and binds the server's TCP socket.
*/
static SOCKET prvOpenServerSocket( void );
/*
* Prepare the CyaSSL library for use.
*/
static void prvInitialiseCyaSSL( void );
/*
* The task that implements the client side of the connection.
*/
extern void vSecureTCPClientTask( void *pvParameters );
/*-----------------------------------------------------------*/
/* The CyaSSL context for the server. */
static CYASSL_CTX* xCyaSSL_ServerContext = NULL;
/*-----------------------------------------------------------*/
/* See the comments at the top of main.c. */
void vSecureTCPServerTask( void *pvParameters )
{
portBASE_TYPE xReturned;
long lBytes;
uint8_t cReceivedString[ 60 ];
struct sockaddr_in xClient;
int xClientAddressLength = sizeof( struct sockaddr_in );
SOCKET xListeningSocket, xConnectedSocket;
CYASSL* xCyaSSL_Object; /* Only one connection is accepted at a time, so only one object is needed at a time. */
/* Just to prevent compiler warnings. */
( void ) pvParameters;
/* Perform the initialisation necessary before CyaSSL can be used. */
prvInitialiseCyaSSL();
configASSERT( xCyaSSL_ServerContext );
/* Attempt to open the socket. */
xListeningSocket = prvOpenServerSocket();
/* Now the server socket has been created and the CyaSSL library has been
initialised, the task that implements the client side can be created. */
xTaskCreate( vSecureTCPClientTask, "Client", configMINIMAL_STACK_SIZE, NULL, sstSECURE_CLIENT_TASK_PRIORITY, NULL );
if( xListeningSocket != INVALID_SOCKET )
{
for( ;; )
{
/* Wait until the client connects. */
printf( "Waiting for new connection\r\n" );
xConnectedSocket = accept( xListeningSocket, ( struct sockaddr * ) &xClient, &xClientAddressLength );
if( xConnectedSocket != INVALID_SOCKET )
{
printf( "Connection established\r\n" );
/* A connection has been accepted by the server. Create a
CyaSSL object for use with the newly connected socket. */
xCyaSSL_Object = NULL;
xCyaSSL_Object = CyaSSL_new( xCyaSSL_ServerContext );
if( xCyaSSL_Object != NULL )
{
/* Associate the created CyaSSL object with the connected
socket. */
xReturned = CyaSSL_set_fd( xCyaSSL_Object, xConnectedSocket );
configASSERT( xReturned == SSL_SUCCESS );
do
{
/* The next line is the secure equivalent to the
standard sockets call:
lBytes = recv( xConnectedSocket, cReceivedString, 50, 0 ); */
lBytes = CyaSSL_read( xCyaSSL_Object, cReceivedString, sizeof( cReceivedString ) );
/* Print the received characters. */
if( lBytes > 0 )
{
printf( "Received by the secure server: %s\r\n", cReceivedString );
}
} while ( lBytes > 0 );
/* The connection was closed, close the socket and free the
CyaSSL object. */
closesocket( xConnectedSocket );
CyaSSL_free( xCyaSSL_Object );
printf( "Connection closed, back to start\r\n\r\n" );
}
}
}
}
else
{
/* The socket could not be opened. */
vTaskDelete( NULL );
}
}
/*-----------------------------------------------------------*/
static SOCKET prvOpenServerSocket( void )
{
WSADATA xWSAData;
WORD wVersionRequested;
struct sockaddr_in xConnection;
SOCKET xSocket = INVALID_SOCKET;
wVersionRequested = MAKEWORD( 2, 2 );
/* Prepare to use WinSock. */
if( WSAStartup( wVersionRequested, &xWSAData ) != 0 )
{
fprintf( stderr, "Could not open Windows connection.\n" );
}
else
{
xSocket = socket( AF_INET, SOCK_STREAM, 0 );
if( xSocket == INVALID_SOCKET)
{
fprintf( stderr, "Could not create socket.\n" );
WSACleanup();
}
else
{
/* Zero out the server structure. */
memset( ( void * ) &xConnection, 0x00, sizeof( struct sockaddr_in ) );
xConnection.sin_family = AF_INET;
xConnection.sin_addr.s_addr = inet_addr("127.0.0.1");
xConnection.sin_port = htons( configTCP_PORT_NUMBER );
/* Bind the address to the socket. */
if( bind( xSocket, ( struct sockaddr * ) &xConnection, sizeof( struct sockaddr_in ) ) == -1 )
{
fprintf( stderr, "Could not socket to port %d.\n", configTCP_PORT_NUMBER );
closesocket( xSocket );
xSocket = INVALID_SOCKET;
WSACleanup();
}
if( listen( xSocket, 20 ) != 0 )
{
closesocket( xSocket );
xSocket = INVALID_SOCKET;
WSACleanup();
}
}
}
return xSocket;
}
/*-----------------------------------------------------------*/
static void prvInitialiseCyaSSL( void )
{
int32_t iReturn;
#ifdef DEBUG_CYASSL
{
CyaSSL_Debugging_ON();
}
#endif
/* Initialise CyaSSL. This must be done before any other CyaSSL functions
are called. */
CyaSSL_Init();
/* Attempt to create a context that uses the TLS V1 server protocol. */
xCyaSSL_ServerContext = CyaSSL_CTX_new( CyaTLSv1_server_method() );
if( xCyaSSL_ServerContext != NULL )
{
/* Load the CA certificate. Real applications should ensure that
CyaSSL_CTX_load_verify_locations() returns SSL_SUCCESS before
proceeding. */
iReturn = CyaSSL_CTX_load_verify_locations( xCyaSSL_ServerContext, "ca-cert.pem", 0 );
configASSERT( iReturn == SSL_SUCCESS );
iReturn = CyaSSL_CTX_use_certificate_file( xCyaSSL_ServerContext, "server-cert.pem", SSL_FILETYPE_PEM );
configASSERT( iReturn == SSL_SUCCESS );
iReturn = CyaSSL_CTX_use_PrivateKey_file( xCyaSSL_ServerContext, "server-key.pem", SSL_FILETYPE_PEM );
configASSERT( iReturn == SSL_SUCCESS );
}
}

View File

@@ -1,177 +0,0 @@
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View File

@@ -1,144 +0,0 @@
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View File

@@ -1,3 +0,0 @@
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View File

@@ -1,87 +0,0 @@
Certificate:
Data:
Version: 3 (0x2)
Serial Number:
e9:d0:a7:5f:79:25:f4:3c
Signature Algorithm: sha1WithRSAEncryption
Issuer: C=US, ST=Montana, L=Bozeman, O=Sawtooth, OU=Consulting, CN=www.yassl.com/emailAddress=info@yassl.com
Validity
Not Before: Oct 24 18:18:15 2011 GMT
Not After : Jul 20 18:18:15 2014 GMT
Subject: C=US, ST=Montana, L=Bozeman, O=Sawtooth, OU=Consulting, CN=www.yassl.com/emailAddress=info@yassl.com
Subject Public Key Info:
Public Key Algorithm: rsaEncryption
RSA Public Key: (2048 bit)
Modulus (2048 bit):
00:bf:0c:ca:2d:14:b2:1e:84:42:5b:cd:38:1f:4a:
f2:4d:75:10:f1:b6:35:9f:df:ca:7d:03:98:d3:ac:
de:03:66:ee:2a:f1:d8:b0:7d:6e:07:54:0b:10:98:
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a5:c0:b0:d2:70:76:50:30:5b:a8:e8:08:2c:7c:ed:
a7:a2:7a:8d:38:29:1c:ac:c7:ed:f2:7c:95:b0:95:
82:7d:49:5c:38:cd:77:25:ef:bd:80:75:53:94:3c:
3d:ca:63:5b:9f:15:b5:d3:1d:13:2f:19:d1:3c:db:
76:3a:cc:b8:7d:c9:e5:c2:d7:da:40:6f:d8:21:dc:
73:1b:42:2d:53:9c:fe:1a:fc:7d:ab:7a:36:3f:98:
de:84:7c:05:67:ce:6a:14:38:87:a9:f1:8c:b5:68:
cb:68:7f:71:20:2b:f5:a0:63:f5:56:2f:a3:26:d2:
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ed:51:45:1d:b9:04:d9:0b:ec:d8:28:b3:4b:bd:ed:
36:79
Exponent: 65537 (0x10001)
X509v3 extensions:
X509v3 Subject Key Identifier:
27:8E:67:11:74:C3:26:1D:3F:ED:33:63:B3:A4:D8:1D:30:E5:E8:D5
X509v3 Authority Key Identifier:
keyid:27:8E:67:11:74:C3:26:1D:3F:ED:33:63:B3:A4:D8:1D:30:E5:E8:D5
DirName:/C=US/ST=Montana/L=Bozeman/O=Sawtooth/OU=Consulting/CN=www.yassl.com/emailAddress=info@yassl.com
serial:E9:D0:A7:5F:79:25:F4:3C
X509v3 Basic Constraints:
CA:TRUE
Signature Algorithm: sha1WithRSAEncryption
5f:86:14:f4:51:8b:bc:a5:4e:30:da:5e:ac:9a:f8:6c:d9:26:
4b:93:f9:e3:1c:89:6f:9e:ee:b3:9d:77:3e:89:20:76:a3:e6:
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b8:f3:e7:ce:a1:3d:c0:db:6d:f3:b2:d9:46:c8:9f:c3:b8:70:
5a:1f:7f:ca
-----BEGIN CERTIFICATE-----
MIIEnjCCA4agAwIBAgIJAOnQp195JfQ8MA0GCSqGSIb3DQEBBQUAMIGQMQswCQYD
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rwG1I6HsMdp7Y2nEuPPnzqE9wNtt87LZRsifw7hwWh9/yg==
-----END CERTIFICATE-----

View File

@@ -1,141 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/* Standard includes. */
#include <stdio.h>
#include <stdint.h>
/* FreeRTOS includes. */
#include <FreeRTOS.h>
#include "task.h"
/* This application is using the FreeRTOS Windows simulator, which uses the
FreeRTOS scheduler to schedule FreeRTOS task within the Windows environment.
The Windows environment must not be allowed to block any Windows threads that
are running FreeRTOS tasks, unless the FreeRTOS task is running at the FreeRTOS
idle priority. For simplicity, this demo uses the Windows TCP/IP stack, the
API for which can cause Windows threads to block. Therefore, any FreeRTOS task
that makes calls to the Windows TCP/IP stack must be assigned the idle priority.
Note this is only a restriction of the simulated Windows environment - real
FreeRTOS ports do not have this restriction. */
#define mainSECURE_SERVER_TASK_PRIORITY ( tskIDLE_PRIORITY )
/*-----------------------------------------------------------*/
/*
* The task that implements the server side.
*/
extern void vSecureTCPServerTask( void *pvParameters );
/*-----------------------------------------------------------*/
int main( void )
{
const uint32_t ulLongTime_ms = 250UL;
/* Create the TCP server task. This will itself create the client task
once it has completed the CyaSSL initialisation. */
xTaskCreate( vSecureTCPServerTask, "Server", configMINIMAL_STACK_SIZE, NULL, mainSECURE_SERVER_TASK_PRIORITY, NULL );
/* Start the task running. */
vTaskStartScheduler();
/* If all is well, the scheduler will now be running, and the following
line will never be reached. If the following line does execute, then
there was insufficient FreeRTOS heap memory available for the idle and/or
timer tasks to be created. See the memory management section on the
FreeRTOS web site for more details (this is standard text that is not not
really applicable to the Win32 simulator port). */
for( ;; )
{
Sleep( ulLongTime_ms );
}
}
/*-----------------------------------------------------------*/
void vApplicationIdleHook( void )
{
const unsigned long ulMSToSleep = 5;
/* This function is called on each cycle of the idle task if
configUSE_IDLE_HOOK is set to 1 in FreeRTOSConfig.h. Sleep to reduce CPU
load. */
Sleep( ulMSToSleep );
}
/*-----------------------------------------------------------*/
void vAssertCalled( void )
{
const unsigned long ulLongSleep = 1000UL;
taskDISABLE_INTERRUPTS();
for( ;; )
{
Sleep( ulLongSleep );
}
}
/*-----------------------------------------------------------*/

View File

@@ -1,158 +0,0 @@
Certificate:
Data:
Version: 1 (0x0)
Serial Number: 2 (0x2)
Signature Algorithm: sha1WithRSAEncryption
Issuer: C=US, ST=Montana, L=Bozeman, O=Sawtooth, OU=Consulting, CN=www.yassl.com/emailAddress=info@yassl.com
Validity
Not Before: Oct 24 18:27:13 2011 GMT
Not After : Jul 20 18:27:13 2014 GMT
Subject: C=US, ST=Montana, L=Bozeman, O=yaSSL, OU=Support, CN=www.yassl.com/emailAddress=info@yassl.com
Subject Public Key Info:
Public Key Algorithm: rsaEncryption
RSA Public Key: (2048 bit)
Modulus (2048 bit):
00:c0:95:08:e1:57:41:f2:71:6d:b7:d2:45:41:27:
01:65:c6:45:ae:f2:bc:24:30:b8:95:ce:2f:4e:d6:
f6:1c:88:bc:7c:9f:fb:a8:67:7f:fe:5c:9c:51:75:
f7:8a:ca:07:e7:35:2f:8f:e1:bd:7b:c0:2f:7c:ab:
64:a8:17:fc:ca:5d:7b:ba:e0:21:e5:72:2e:6f:2e:
86:d8:95:73:da:ac:1b:53:b9:5f:3f:d7:19:0d:25:
4f:e1:63:63:51:8b:0b:64:3f:ad:43:b8:a5:1c:5c:
34:b3:ae:00:a0:63:c5:f6:7f:0b:59:68:78:73:a6:
8c:18:a9:02:6d:af:c3:19:01:2e:b8:10:e3:c6:cc:
40:b4:69:a3:46:33:69:87:6e:c4:bb:17:a6:f3:e8:
dd:ad:73:bc:7b:2f:21:b5:fd:66:51:0c:bd:54:b3:
e1:6d:5f:1c:bc:23:73:d1:09:03:89:14:d2:10:b9:
64:c3:2a:d0:a1:96:4a:bc:e1:d4:1a:5b:c7:a0:c0:
c1:63:78:0f:44:37:30:32:96:80:32:23:95:a1:77:
ba:13:d2:97:73:e2:5d:25:c9:6a:0d:c3:39:60:a4:
b4:b0:69:42:42:09:e9:d8:08:bc:33:20:b3:58:22:
a7:aa:eb:c4:e1:e6:61:83:c5:d2:96:df:d9:d0:4f:
ad:d7
Exponent: 65537 (0x10001)
Signature Algorithm: sha1WithRSAEncryption
71:4e:d3:62:df:cc:4c:f7:cd:b7:6e:52:0b:6c:6e:e0:bd:c2:
2d:07:d7:c0:b0:6e:43:1e:35:bc:30:01:50:f0:ff:99:23:6c:
18:1a:41:b6:11:d6:d4:19:61:fd:e4:77:97:1c:39:e1:57:ab:
c5:15:63:77:11:36:5e:74:e2:24:0b:1f:41:78:ad:b7:81:e7:
b4:40:66:80:f0:4b:91:a0:6d:a8:6e:3d:53:d9:8b:ce:2a:e1:
0b:45:65:87:a1:96:ae:ee:3e:88:d5:12:1f:78:17:ae:2c:c5:
73:44:d8:dc:f4:af:d8:cc:ae:4c:e1:0c:be:55:a4:99:f7:6e:
96:c0:c8:45:87:bf:dc:51:57:ff:9e:73:37:6a:18:9c:c3:f9:
22:7a:f4:b0:52:bd:fc:21:30:f8:c5:ff:1e:87:7d:ad:a2:5a:
35:f5:22:a8:b4:0a:76:38:e6:76:b0:98:af:1b:ec:8a:0a:43:
74:d2:85:34:37:84:07:e1:f6:23:b2:29:de:a6:b6:b7:4c:57:
7e:96:06:cb:a9:16:25:29:3a:03:2d:55:7d:a6:8c:a4:f7:9e:
81:c9:95:b6:7c:c1:4a:ce:94:66:0c:ca:88:eb:d2:09:f5:5b:
19:58:82:df:27:fd:67:95:78:b7:02:06:d5:a7:61:bd:ef:3a:
fc:b2:61:cd
-----BEGIN CERTIFICATE-----
MIIDkDCCAngCAQIwDQYJKoZIhvcNAQEFBQAwgZAxCzAJBgNVBAYTAlVTMRAwDgYD
VQQIEwdNb250YW5hMRAwDgYDVQQHEwdCb3plbWFuMREwDwYDVQQKEwhTYXd0b290
aDETMBEGA1UECxMKQ29uc3VsdGluZzEWMBQGA1UEAxMNd3d3Lnlhc3NsLmNvbTEd
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Hod9raJaNfUiqLQKdjjmdrCYrxvsigpDdNKFNDeEB+H2I7Ip3qa2t0xXfpYGy6kW
JSk6Ay1VfaaMpPeegcmVtnzBSs6UZgzKiOvSCfVbGViC3yf9Z5V4twIG1adhve86
/LJhzQ==
-----END CERTIFICATE-----
Certificate:
Data:
Version: 3 (0x2)
Serial Number:
e9:d0:a7:5f:79:25:f4:3c
Signature Algorithm: sha1WithRSAEncryption
Issuer: C=US, ST=Montana, L=Bozeman, O=Sawtooth, OU=Consulting, CN=www.yassl.com/emailAddress=info@yassl.com
Validity
Not Before: Oct 24 18:18:15 2011 GMT
Not After : Jul 20 18:18:15 2014 GMT
Subject: C=US, ST=Montana, L=Bozeman, O=Sawtooth, OU=Consulting, CN=www.yassl.com/emailAddress=info@yassl.com
Subject Public Key Info:
Public Key Algorithm: rsaEncryption
RSA Public Key: (2048 bit)
Modulus (2048 bit):
00:bf:0c:ca:2d:14:b2:1e:84:42:5b:cd:38:1f:4a:
f2:4d:75:10:f1:b6:35:9f:df:ca:7d:03:98:d3:ac:
de:03:66:ee:2a:f1:d8:b0:7d:6e:07:54:0b:10:98:
21:4d:80:cb:12:20:e7:cc:4f:de:45:7d:c9:72:77:
32:ea:ca:90:bb:69:52:10:03:2f:a8:f3:95:c5:f1:
8b:62:56:1b:ef:67:6f:a4:10:41:95:ad:0a:9b:e3:
a5:c0:b0:d2:70:76:50:30:5b:a8:e8:08:2c:7c:ed:
a7:a2:7a:8d:38:29:1c:ac:c7:ed:f2:7c:95:b0:95:
82:7d:49:5c:38:cd:77:25:ef:bd:80:75:53:94:3c:
3d:ca:63:5b:9f:15:b5:d3:1d:13:2f:19:d1:3c:db:
76:3a:cc:b8:7d:c9:e5:c2:d7:da:40:6f:d8:21:dc:
73:1b:42:2d:53:9c:fe:1a:fc:7d:ab:7a:36:3f:98:
de:84:7c:05:67:ce:6a:14:38:87:a9:f1:8c:b5:68:
cb:68:7f:71:20:2b:f5:a0:63:f5:56:2f:a3:26:d2:
b7:6f:b1:5a:17:d7:38:99:08:fe:93:58:6f:fe:c3:
13:49:08:16:0b:a7:4d:67:00:52:31:67:23:4e:98:
ed:51:45:1d:b9:04:d9:0b:ec:d8:28:b3:4b:bd:ed:
36:79
Exponent: 65537 (0x10001)
X509v3 extensions:
X509v3 Subject Key Identifier:
27:8E:67:11:74:C3:26:1D:3F:ED:33:63:B3:A4:D8:1D:30:E5:E8:D5
X509v3 Authority Key Identifier:
keyid:27:8E:67:11:74:C3:26:1D:3F:ED:33:63:B3:A4:D8:1D:30:E5:E8:D5
DirName:/C=US/ST=Montana/L=Bozeman/O=Sawtooth/OU=Consulting/CN=www.yassl.com/emailAddress=info@yassl.com
serial:E9:D0:A7:5F:79:25:F4:3C
X509v3 Basic Constraints:
CA:TRUE
Signature Algorithm: sha1WithRSAEncryption
5f:86:14:f4:51:8b:bc:a5:4e:30:da:5e:ac:9a:f8:6c:d9:26:
4b:93:f9:e3:1c:89:6f:9e:ee:b3:9d:77:3e:89:20:76:a3:e6:
e8:86:15:21:db:e2:33:b2:34:d5:d0:9f:f3:c1:a4:87:92:5c:
f9:d1:ff:30:2f:8e:03:bc:b3:3c:0c:32:a3:90:5f:1a:90:1e:
af:9d:f3:9e:d7:07:02:a9:7d:27:66:63:2f:af:18:d7:ac:18:
98:8c:83:8f:38:f3:0b:ac:36:10:75:fb:ca:76:13:50:5b:02:
8f:73:bf:e3:a0:ee:83:52:25:54:ce:26:ce:9c:bd:2f:79:ab:
1b:60:b8:92:f1:03:c0:fc:3b:08:d9:c0:ad:d5:72:08:25:80:
61:2d:dc:9f:a7:83:62:07:47:e0:07:4c:4b:07:30:04:a9:87:
1c:55:7f:07:12:d0:cb:42:5d:cb:cf:66:01:1a:17:ee:f9:0f:
60:b7:db:6f:68:e5:4e:41:62:6e:d3:6f:60:4f:4b:27:de:cf:
18:07:f1:13:5d:cb:3f:a9:25:44:da:52:5c:c8:04:e1:56:12:
f5:2a:90:4e:d1:e2:af:01:b5:23:a1:ec:31:da:7b:63:69:c4:
b8:f3:e7:ce:a1:3d:c0:db:6d:f3:b2:d9:46:c8:9f:c3:b8:70:
5a:1f:7f:ca
-----BEGIN CERTIFICATE-----
MIIEnjCCA4agAwIBAgIJAOnQp195JfQ8MA0GCSqGSIb3DQEBBQUAMIGQMQswCQYD
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PokgdqPm6IYVIdviM7I01dCf88Gkh5Jc+dH/MC+OA7yzPAwyo5BfGpAer53zntcH
Aql9J2ZjL68Y16wYmIyDjzjzC6w2EHX7ynYTUFsCj3O/46Dug1IlVM4mzpy9L3mr
G2C4kvEDwPw7CNnArdVyCCWAYS3cn6eDYgdH4AdMSwcwBKmHHFV/BxLQy0Jdy89m
ARoX7vkPYLfbb2jlTkFibtNvYE9LJ97PGAfxE13LP6klRNpSXMgE4VYS9SqQTtHi
rwG1I6HsMdp7Y2nEuPPnzqE9wNtt87LZRsifw7hwWh9/yg==
-----END CERTIFICATE-----

View File

@@ -1,27 +0,0 @@
-----BEGIN RSA PRIVATE KEY-----
MIIEpQIBAAKCAQEAwJUI4VdB8nFtt9JFQScBZcZFrvK8JDC4lc4vTtb2HIi8fJ/7
qGd//lycUXX3isoH5zUvj+G9e8AvfKtkqBf8yl17uuAh5XIuby6G2JVz2qwbU7lf
P9cZDSVP4WNjUYsLZD+tQ7ilHFw0s64AoGPF9n8LWWh4c6aMGKkCba/DGQEuuBDj
xsxAtGmjRjNph27Euxem8+jdrXO8ey8htf1mUQy9VLPhbV8cvCNz0QkDiRTSELlk
wyrQoZZKvOHUGlvHoMDBY3gPRDcwMpaAMiOVoXe6E9KXc+JdJclqDcM5YKS0sGlC
Qgnp2Ai8MyCzWCKnquvE4eZhg8XSlt/Z0E+t1wIDAQABAoIBAQCa0DQPUmIFUAHv
n+1kbsLE2hryhNeSEEiSxOlq64t1bMZ5OPLJckqGZFSVd8vDmp231B2kAMieTuTd
x7pnFsF0vKnWlI8rMBr77d8hBSPZSjm9mGtlmrjcxH3upkMVLj2+HSJgKnMw1T7Y
oqyGQy7E9WReP4l1DxHYUSVOn9iqo85gs+KK2X4b8GTKmlsFC1uqy+XjP24yIgXz
0PrvdFKB4l90073/MYNFdfpjepcu1rYZxpIm5CgGUFAOeC6peA0Ul7QS2DFAq6EB
QcIw+AdfFuRhd9Jg8p+N6PS662PeKpeB70xs5lU0USsoNPRTHMRYCj+7r7X3SoVD
LTzxWFiBAoGBAPIsVHY5I2PJEDK3k62vvhl1loFk5rW4iUJB0W3QHBv4G6xpyzY8
ZH3c9Bm4w2CxV0hfUk9ZOlV/MsAZQ1A/rs5vF/MOn0DKTq0VO8l56cBZOHNwnAp8
yTpIMqfYSXUKhcLC/RVz2pkJKmmanwpxv7AEpox6Wm9IWlQ7xrFTF9/nAoGBAMuT
3ncVXbdcXHzYkKmYLdZpDmOzo9ymzItqpKISjI57SCyySzfcBhh96v52odSh6T8N
zRtfr1+elltbD6F8r7ObkNtXczrtsCNErkFPHwdCEyNMy/r0FKTV9542fFufqDzB
hV900jkt/9CE3/uzIHoumxeu5roLrl9TpFLtG8SRAoGBAOyY2rvV/vlSSn0CVUlv
VW5SL4SjK7OGYrNU0mNS2uOIdqDvixWl0xgUcndex6MEH54ZYrUbG57D8rUy+UzB
qusMJn3UX0pRXKRFBnBEp1bA1CIUdp7YY1CJkNPiv4GVkjFBhzkaQwsYpVMfORpf
H0O8h2rfbtMiAP4imHBOGhkpAoGBAIpBVihRnl/Ungs7mKNU8mxW1KrpaTOFJAza
1AwtxL9PAmk4fNTm3Ezt1xYRwz4A58MmwFEC3rt1nG9WnHrzju/PisUr0toGakTJ
c/5umYf4W77xfOZltU9s8MnF/xbKixsX4lg9ojerAby/QM5TjI7t7+5ZneBj5nxe
9Y5L8TvBAoGATUX5QIzFW/QqGoq08hysa+kMVja3TnKW1eWK0uL/8fEYEz2GCbjY
dqfJHHFSlDBD4PF4dP1hG0wJzOZoKnGtHN9DvFbbpaS+NXCkXs9P/ABVmTo9I89n
WvUi+LUp0EQR6zUuRr79jhiyX6i/GTKh9dwD5nyaHwx8qbAOITc78bA=
-----END RSA PRIVATE KEY-----

View File

@@ -1,168 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
* http://www.freertos.org/a00110.html
*
* The bottom of this file contains some constants specific to running the UDP
* stack in this demo. Constants specific to FreeRTOS+UDP itself (rather than
* the demo) are contained in FreeRTOSIPConfig.h.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 7 )
#define configTICK_RATE_HZ ( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 60 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the Win32 thread. */
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 32U * 1024U ) )
#define configMAX_TASK_NAME_LEN ( 7 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_CO_ROUTINES 0
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_APPLICATION_TASK_TAG 0
#define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_ALTERNATIVE_API 0
/* Hook function related definitions. */
#define configUSE_TICK_HOOK 0
#define configUSE_IDLE_HOOK 1
#define configUSE_MALLOC_FAILED_HOOK 1
#define configCHECK_FOR_STACK_OVERFLOW 0 /* Not applicable to the Win32 port. */
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
/* Run time stats gathering definitions. */
unsigned long ulGetRunTimeCounterValue( void );
void vConfigureTimerForRunTimeStats( void );
#define configGENERATE_RUN_TIME_STATS 1
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats()
#define portGET_RUN_TIME_COUNTER_VALUE() ulGetRunTimeCounterValue()
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTaskGetSchedulerState 1
#define INCLUDE_xTimerGetTimerTaskHandle 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xQueueGetMutexHolder 1
/* This demo makes use of one or more example stats formatting functions. These
format the raw data provided by the uxTaskGetSystemState() function in to human
readable ASCII form. See the notes in the implementation of vTaskList() within
FreeRTOS/Source/tasks.c for limitations. */
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
/* Assert call defined for debug builds. */
#ifdef _DEBUG
extern void vAssertCalled( const char *pcFile, unsigned long ulLine );
#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ )
#endif /* _DEBUG */
/* Application specific definitions follow. **********************************/
/* The UDP port to use for incoming command inputs. The outgoing port is
set to ( configUDP_CLI_PORT_NUMBER + 1 ). */
#define configUDP_CLI_PORT_NUMBER 5001
/* The size of the global output buffer that is available for use when there
are multiple command interpreters running at once (for example, one on a UART
and one on TCP/IP). This is done to prevent an output buffer being defined by
each implementation - which would waste RAM. In this case, there is only one
command interpreter running, and it has its own local output buffer, so the
global buffer is just set to be one byte long as it is not used and should not
take up unnecessary RAM. */
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 1
#endif /* FREERTOS_CONFIG_H */

View File

@@ -1,67 +0,0 @@
/*
* FreeRTOS+FAT FS V1.0.0 (C) 2013 HCC Embedded
*
* FreeRTOS+FAT SL is an complementary component provided to Real Time Engineers
* Ltd. by HCC Embedded for use with FreeRTOS. It is not, in itself, part of
* the FreeRTOS kernel. FreeRTOS+FAT SL is licensed separately from FreeRTOS,
* and uses a different license to FreeRTOS. FreeRTOS+FAT SL uses a dual
* license model, information on which is provided below:
*
* - Open source licensing -
* FreeRTOS+FAT SL is a free download and may be used, modified and distributed
* without charge provided the user adheres to version two of the GNU General
* Public license (GPL) and does not remove the copyright notice or this text.
* The GPL V2 text is available on the gnu.org web site, and on the following
* URL: http://www.FreeRTOS.org/gpl-2.0.txt
*
* - Commercial licensing -
* Businesses and individuals who wish to incorporate FreeRTOS+FAT SL into
* proprietary software for redistribution in any form must first obtain a
* commercial license - and in-so-doing support the maintenance, support and
* further development of the FreeRTOS+FAT SL product. Commercial licenses can
* be obtained from http://shop.freertos.org and do not require any source files
* to be changed.
*
* FreeRTOS+FAT SL is distributed in the hope that it will be useful. You
* cannot use FreeRTOS+FAT SL unless you agree that you use the software 'as
* is'. FreeRTOS+FAT SL is provided WITHOUT ANY WARRANTY; without even the
* implied warranties of NON-INFRINGEMENT, MERCHANTABILITY or FITNESS FOR A
* PARTICULAR PURPOSE. Real Time Engineers Ltd. and HCC Embedded disclaims all
* conditions and terms, be they implied, expressed, or statutory.
*
* http://www.FreeRTOS.org
* http://www.FreeRTOS.org/FreeRTOS-Plus
*
*/
#ifndef _CONFIG_FAT_SL_H
#define _CONFIG_FAT_SL_H
#include "../version/ver_fat_sl.h"
#if VER_FAT_SL_MAJOR != 3 || VER_FAT_SL_MINOR != 2
#error Incompatible FAT_SL version number!
#endif
#include "../api/api_mdriver.h"
#ifdef __cplusplus
extern "C" {
#endif
/**************************************************************************
**
** FAT SL user settings
**
**************************************************************************/
#define F_SECTOR_SIZE 512u /* Disk sector size. */
#define F_FS_THREAD_AWARE 1 /* Set to one if the file system will be access from more than one task. */
#define F_MAXPATH 64 /* Maximum length a file name (including its full path) can be. */
#define F_MAX_LOCK_WAIT_TICKS 20 /* The maximum number of RTOS ticks to wait when attempting to obtain a lock on the file system when F_FS_THREAD_AWARE is set to 1. */
#ifdef __cplusplus
}
#endif
#endif /* _CONFIG_FAT_SL_H */

View File

@@ -1,52 +0,0 @@
/*
* FreeRTOS+FAT FS V1.0.0 (C) 2013 HCC Embedded
*
* FreeRTOS+FAT SL is an complementary component provided to Real Time Engineers
* Ltd. by HCC Embedded for use with FreeRTOS. It is not, in itself, part of
* the FreeRTOS kernel. FreeRTOS+FAT SL is licensed separately from FreeRTOS,
* and uses a different license to FreeRTOS. FreeRTOS+FAT SL uses a dual
* license model, information on which is provided below:
*
* - Open source licensing -
* FreeRTOS+FAT SL is a free download and may be used, modified and distributed
* without charge provided the user adheres to version two of the GNU General
* Public license (GPL) and does not remove the copyright notice or this text.
* The GPL V2 text is available on the gnu.org web site, and on the following
* URL: http://www.FreeRTOS.org/gpl-2.0.txt
*
* - Commercial licensing -
* Businesses and individuals who wish to incorporate FreeRTOS+FAT SL into
* proprietary software for redistribution in any form must first obtain a
* commercial license - and in-so-doing support the maintenance, support and
* further development of the FreeRTOS+FAT SL product. Commercial licenses can
* be obtained from http://shop.freertos.org and do not require any source files
* to be changed.
*
* FreeRTOS+FAT SL is distributed in the hope that it will be useful. You
* cannot use FreeRTOS+FAT SL unless you agree that you use the software 'as
* is'. FreeRTOS+FAT SL is provided WITHOUT ANY WARRANTY; without even the
* implied warranties of NON-INFRINGEMENT, MERCHANTABILITY or FITNESS FOR A
* PARTICULAR PURPOSE. Real Time Engineers Ltd. and HCC Embedded disclaims all
* conditions and terms, be they implied, expressed, or statutory.
*
* http://www.FreeRTOS.org
* http://www.FreeRTOS.org/FreeRTOS-Plus
*
*/
#ifndef _CONFIG_MDRIVER_RAM_H_
#define _CONFIG_MDRIVER_RAM_H_
#include "../version/ver_mdriver_ram.h"
#if VER_MDRIVER_RAM_MAJOR != 1 || VER_MDRIVER_RAM_MINOR != 2
#error Incompatible MDRIVER_RAM version number!
#endif
#define MDRIVER_RAM_SECTOR_SIZE 512 /* Sector size */
#define MDRIVER_RAM_VOLUME0_SIZE (128 * 1024) /* defintion for size of ramdrive0 */
#define MDRIVER_MEM_LONG_ACCESS 1 /* set this value to 1 if 32bit access available */
#endif /* ifndef _CONFIG_MDRIVER_RAM_H_ */

View File

@@ -1,610 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* File system includes. */
#include "fat_sl.h"
#include "api_mdriver_ram.h"
#include "test.h"
#ifdef _WINDOWS_
#define snprintf _snprintf
#endif
#define cliNEW_LINE "\r\n"
/*******************************************************************************
* See the URL in the comments within main.c for the location of the online
* documentation.
******************************************************************************/
/*
* Print out information on a single file.
*/
static void prvCreateFileInfoString( char *pcBuffer, F_FIND *pxFindStruct );
/*
* Copies an existing file into a newly created file.
*/
static portBASE_TYPE prvPerformCopy( const char *pcSourceFile,
int32_t lSourceFileLength,
const char *pcDestinationFile,
char *pxWriteBuffer,
size_t xWriteBufferLen );
/*
* Implements the DIR command.
*/
static portBASE_TYPE prvDIRCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the CD command.
*/
static portBASE_TYPE prvCDCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the DEL command.
*/
static portBASE_TYPE prvDELCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the TYPE command.
*/
static portBASE_TYPE prvTYPECommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the COPY command.
*/
static portBASE_TYPE prvCOPYCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the TEST command.
*/
static portBASE_TYPE prvTESTFSCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/* Structure that defines the DIR command line command, which lists all the
files in the current directory. */
static const CLI_Command_Definition_t xDIR =
{
"dir", /* The command string to type. */
"\r\ndir:\r\n Lists the files in the current directory\r\n",
prvDIRCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the CD command line command, which changes the
working directory. */
static const CLI_Command_Definition_t xCD =
{
"cd", /* The command string to type. */
"\r\ncd <dir name>:\r\n Changes the working directory\r\n",
prvCDCommand, /* The function to run. */
1 /* One parameter is expected. */
};
/* Structure that defines the TYPE command line command, which prints the
contents of a file to the console. */
static const CLI_Command_Definition_t xTYPE =
{
"type", /* The command string to type. */
"\r\ntype <filename>:\r\n Prints file contents to the terminal\r\n",
prvTYPECommand, /* The function to run. */
1 /* One parameter is expected. */
};
/* Structure that defines the DEL command line command, which deletes a file. */
static const CLI_Command_Definition_t xDEL =
{
"del", /* The command string to type. */
"\r\ndel <filename>:\r\n deletes a file or directory\r\n",
prvDELCommand, /* The function to run. */
1 /* One parameter is expected. */
};
/* Structure that defines the COPY command line command, which deletes a file. */
static const CLI_Command_Definition_t xCOPY =
{
"copy", /* The command string to type. */
"\r\ncopy <source file> <dest file>:\r\n Copies <source file> to <dest file>\r\n",
prvCOPYCommand, /* The function to run. */
2 /* Two parameters are expected. */
};
/* Structure that defines the TEST command line command, which executes some
file system driver tests. */
static const CLI_Command_Definition_t xTEST_FS =
{
"test-fs", /* The command string to type. */
"\r\ntest-fs:\r\n Executes file system tests. ALL FILES WILL BE DELETED!!!\r\n",
prvTESTFSCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/*-----------------------------------------------------------*/
void vRegisterFileSystemCLICommands( void )
{
/* Register all the command line commands defined immediately above. */
FreeRTOS_CLIRegisterCommand( &xDIR );
FreeRTOS_CLIRegisterCommand( &xCD );
FreeRTOS_CLIRegisterCommand( &xTYPE );
FreeRTOS_CLIRegisterCommand( &xDEL );
FreeRTOS_CLIRegisterCommand( &xCOPY );
FreeRTOS_CLIRegisterCommand( &xTEST_FS );
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvTYPECommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn = pdTRUE;
static F_FILE *pxFile = NULL;
int iChar;
size_t xByte;
size_t xColumns = 50U;
/* Ensure there is always a null terminator after each character written. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
/* Ensure the buffer leaves space for the \r\n. */
configASSERT( xWriteBufferLen > ( strlen( cliNEW_LINE ) * 2 ) );
xWriteBufferLen -= strlen( cliNEW_LINE );
if( xWriteBufferLen < xColumns )
{
/* Ensure the loop that uses xColumns as an end condition does not
write off the end of the buffer. */
xColumns = xWriteBufferLen;
}
if( pxFile == NULL )
{
/* The file has not been opened yet. Find the file name. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to open the requested file. */
pxFile = f_open( pcParameter, "r" );
}
if( pxFile != NULL )
{
/* Read the next chunk of data from the file. */
for( xByte = 0; xByte < xColumns; xByte++ )
{
iChar = f_getc( pxFile );
if( iChar == -1 )
{
/* No more characters to return. */
f_close( pxFile );
pxFile = NULL;
break;
}
else
{
pcWriteBuffer[ xByte ] = ( char ) iChar;
}
}
}
if( pxFile == NULL )
{
/* Either the file was not opened, or all the data from the file has
been returned and the file is now closed. */
xReturn = pdFALSE;
}
strcat( pcWriteBuffer, cliNEW_LINE );
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvCDCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength;
unsigned char ucReturned;
size_t xStringLength;
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to move to the requested directory. */
ucReturned = f_chdir( pcParameter );
if( ucReturned == F_NO_ERROR )
{
sprintf( pcWriteBuffer, "In: " );
xStringLength = strlen( pcWriteBuffer );
f_getcwd( &( pcWriteBuffer[ xStringLength ] ), ( unsigned char ) ( xWriteBufferLen - xStringLength ) );
}
else
{
sprintf( pcWriteBuffer, "Error" );
}
strcat( pcWriteBuffer, cliNEW_LINE );
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvDIRCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
static F_FIND *pxFindStruct = NULL;
unsigned char ucReturned;
portBASE_TYPE xReturn = pdFALSE;
/* This assumes pcWriteBuffer is long enough. */
( void ) pcCommandString;
/* Ensure the buffer leaves space for the \r\n. */
configASSERT( xWriteBufferLen > ( strlen( cliNEW_LINE ) * 2 ) );
xWriteBufferLen -= strlen( cliNEW_LINE );
if( pxFindStruct == NULL )
{
/* This is the first time this function has been executed since the Dir
command was run. Create the find structure. */
pxFindStruct = ( F_FIND * ) pvPortMalloc( sizeof( F_FIND ) );
if( pxFindStruct != NULL )
{
ucReturned = f_findfirst( "*.*", pxFindStruct );
if( ucReturned == F_NO_ERROR )
{
prvCreateFileInfoString( pcWriteBuffer, pxFindStruct );
xReturn = pdPASS;
}
else
{
snprintf( pcWriteBuffer, xWriteBufferLen, "Error: f_findfirst() failed." );
}
}
else
{
snprintf( pcWriteBuffer, xWriteBufferLen, "Failed to allocate RAM (using heap_4.c will prevent fragmentation)." );
}
}
else
{
/* The find struct has already been created. Find the next file in
the directory. */
ucReturned = f_findnext( pxFindStruct );
if( ucReturned == F_NO_ERROR )
{
prvCreateFileInfoString( pcWriteBuffer, pxFindStruct );
xReturn = pdPASS;
}
else
{
/* There are no more files. Free the find structure. */
vPortFree( pxFindStruct );
pxFindStruct = NULL;
/* No string to return. */
pcWriteBuffer[ 0 ] = 0x00;
}
}
strcat( pcWriteBuffer, cliNEW_LINE );
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvDELCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength;
unsigned char ucReturned;
/* This function assumes xWriteBufferLen is large enough! */
( void ) xWriteBufferLen;
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to delete the file. */
ucReturned = f_delete( pcParameter );
if( ucReturned == F_NO_ERROR )
{
sprintf( pcWriteBuffer, "%s was deleted", pcParameter );
}
else
{
sprintf( pcWriteBuffer, "Error" );
}
strcat( pcWriteBuffer, cliNEW_LINE );
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvTESTFSCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
unsigned portBASE_TYPE uxOriginalPriority;
/* Avoid compiler warnings. */
( void ) xWriteBufferLen;
( void ) pcCommandString;
/* Limitations in the interaction with the Windows TCP/IP stack require
the command console to run at the idle priority. Raise the priority for
the duration of the tests to ensure there are not multiple switches to the
idle task as in the simulated environment the idle task hook function may
include a (relatively) long delay. */
uxOriginalPriority = uxTaskPriorityGet( NULL );
vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 );
f_dotest( 0 );
/* Reset back to the original priority. */
vTaskPrioritySet( NULL, uxOriginalPriority );
sprintf( pcWriteBuffer, "%s", "Test results were sent to Windows console" );
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvCOPYCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
char *pcSourceFile;
const char *pcDestinationFile;
portBASE_TYPE xParameterStringLength;
long lSourceLength, lDestinationLength = 0;
/* Obtain the name of the destination file. */
pcDestinationFile = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
2, /* Return the second parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcDestinationFile );
/* Obtain the name of the source file. */
pcSourceFile = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcSourceFile );
/* Terminate the string. */
pcSourceFile[ xParameterStringLength ] = 0x00;
/* See if the source file exists, obtain its length if it does. */
lSourceLength = f_filelength( pcSourceFile );
if( lSourceLength == 0 )
{
sprintf( pcWriteBuffer, "Source file does not exist" );
}
else
{
/* See if the destination file exists. */
lDestinationLength = f_filelength( pcDestinationFile );
if( lDestinationLength != 0 )
{
sprintf( pcWriteBuffer, "Error: Destination file already exists" );
}
}
/* Continue only if the source file exists and the destination file does
not exist. */
if( ( lSourceLength != 0 ) && ( lDestinationLength == 0 ) )
{
if( prvPerformCopy( pcSourceFile, lSourceLength, pcDestinationFile, pcWriteBuffer, xWriteBufferLen ) == pdPASS )
{
sprintf( pcWriteBuffer, "Copy made" );
}
else
{
sprintf( pcWriteBuffer, "Error during copy" );
}
}
strcat( pcWriteBuffer, cliNEW_LINE );
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvPerformCopy( const char *pcSourceFile,
int32_t lSourceFileLength,
const char *pcDestinationFile,
char *pxWriteBuffer,
size_t xWriteBufferLen )
{
int32_t lBytesRead = 0, lBytesToRead, lBytesRemaining;
F_FILE *pxFile;
portBASE_TYPE xReturn = pdPASS;
/* NOTE: Error handling has been omitted for clarity. */
while( lBytesRead < lSourceFileLength )
{
/* How many bytes are left? */
lBytesRemaining = lSourceFileLength - lBytesRead;
/* How many bytes should be read this time around the loop. Can't
read more bytes than will fit into the buffer. */
if( lBytesRemaining > ( long ) xWriteBufferLen )
{
lBytesToRead = ( long ) xWriteBufferLen;
}
else
{
lBytesToRead = lBytesRemaining;
}
/* Open the source file, seek past the data that has already been
read from the file, read the next block of data, then close the
file again so the destination file can be opened. */
pxFile = f_open( pcSourceFile, "r" );
if( pxFile != NULL )
{
f_seek( pxFile, lBytesRead, F_SEEK_SET );
f_read( pxWriteBuffer, lBytesToRead, 1, pxFile );
f_close( pxFile );
}
else
{
xReturn = pdFAIL;
break;
}
/* Open the destination file and write the block of data to the end of
the file. */
pxFile = f_open( pcDestinationFile, "a" );
if( pxFile != NULL )
{
f_write( pxWriteBuffer, lBytesToRead, 1, pxFile );
f_close( pxFile );
}
else
{
xReturn = pdFAIL;
break;
}
lBytesRead += lBytesToRead;
}
return xReturn;
}
/*-----------------------------------------------------------*/
static void prvCreateFileInfoString( char *pcBuffer, F_FIND *pxFindStruct )
{
const char *pcWritableFile = "writable file", *pcReadOnlyFile = "read only file", *pcDirectory = "directory";
const char * pcAttrib;
/* Point pcAttrib to a string that describes the file. */
if( ( pxFindStruct->attr & F_ATTR_DIR ) != 0 )
{
pcAttrib = pcDirectory;
}
else if( pxFindStruct->attr & F_ATTR_READONLY )
{
pcAttrib = pcReadOnlyFile;
}
else
{
pcAttrib = pcWritableFile;
}
/* Create a string that includes the file name, the file size and the
attributes string. */
sprintf( pcBuffer, "%s [%s] [size=%d]", pxFindStruct->filename, pcAttrib, pxFindStruct->filesize );
}

View File

@@ -1,372 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*******************************************************************************
* See the URL in the comments within main.c for the location of the online
* documentation.
******************************************************************************/
/* Standard includes. */
#include <stdio.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
/* File system includes. */
#include "fat_sl.h"
#include "api_mdriver_ram.h"
/* 8.3 format, plus null terminator. */
#define fsMAX_FILE_NAME_LEN 13
/* The number of bytes read/written to the example files at a time. */
#define fsRAM_BUFFER_SIZE 200
/* The number of bytes written to the file that uses f_putc() and f_getc(). */
#define fsPUTC_FILE_SIZE 100
/*-----------------------------------------------------------*/
/*
* Creates and verifies different files on the volume, demonstrating the use of
* various different API functions.
*/
void vCreateAndVerifySampleFiles( void );
/*
* Create a set of example files in the root directory of the volume using
* f_write().
*/
static void prvCreateDemoFilesUsing_f_write( void );
/*
* Use f_read() to read back and verify the files that were created by
* prvCreateDemoFilesUsing_f_write().
*/
static void prvVerifyDemoFileUsing_f_read( void );
/*
* Create an example file in a sub-directory using f_putc().
*/
static void prvCreateDemoFileUsing_f_putc( void );
/*
* Use f_getc() to read back and verify the file that was created by
* prvCreateDemoFileUsing_f_putc().
*/
static void prvVerifyDemoFileUsing_f_getc( void );
/*-----------------------------------------------------------*/
/* A buffer used to both create content to write to disk, and read content back
from a disk. Note there is no mutual exclusion on this buffer. */
static char cRAMBuffer[ fsRAM_BUFFER_SIZE ];
/* Names of directories that are created. */
static const char *pcRoot = "/", *pcDirectory1 = "SUB1", *pcDirectory2 = "SUB2", *pcFullPath = "/SUB1/SUB2";
/*-----------------------------------------------------------*/
void vCreateAndVerifySampleFiles( void )
{
unsigned char ucStatus;
/* First create the volume. */
ucStatus = f_initvolume( ram_initfunc );
/* It is expected that the volume is not formatted. */
if( ucStatus == F_ERR_NOTFORMATTED )
{
/* Format the created volume. */
ucStatus = f_format( F_FAT12_MEDIA );
}
if( ucStatus == F_NO_ERROR )
{
/* Create a set of files using f_write(). */
prvCreateDemoFilesUsing_f_write();
/* Read back and verify the files that were created using f_write(). */
prvVerifyDemoFileUsing_f_read();
/* Create sub directories two deep then create a file using putc. */
prvCreateDemoFileUsing_f_putc();
/* Read back and verify the file created by
prvCreateDemoFileUsing_f_putc(). */
prvVerifyDemoFileUsing_f_getc();
}
}
/*-----------------------------------------------------------*/
static void prvCreateDemoFilesUsing_f_write( void )
{
portBASE_TYPE xFileNumber, xWriteNumber;
char cFileName[ fsMAX_FILE_NAME_LEN ];
const portBASE_TYPE xMaxFiles = 5;
long lItemsWritten;
F_FILE *pxFile;
/* Create xMaxFiles files. Each created file will be
( xFileNumber * fsRAM_BUFFER_SIZE ) bytes in length, and filled
with a different repeating character. */
for( xFileNumber = 1; xFileNumber <= xMaxFiles; xFileNumber++ )
{
/* Generate a file name. */
sprintf( cFileName, "root%03d.txt", xFileNumber );
/* Obtain the current working directory and print out the file name and
the directory into which the file is being written. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
printf( "Creating file %s in %s\r\n", cFileName, cRAMBuffer );
/* Open the file, creating the file if it does not already exist. */
pxFile = f_open( cFileName, "w" );
configASSERT( pxFile );
/* Fill the RAM buffer with data that will be written to the file. This
is just a repeating ascii character that indicates the file number. */
memset( cRAMBuffer, ( int ) ( '0' + xFileNumber ), fsRAM_BUFFER_SIZE );
/* Write the RAM buffer to the opened file a number of times. The
number of times the RAM buffer is written to the file depends on the
file number, so the length of each created file will be different. */
for( xWriteNumber = 0; xWriteNumber < xFileNumber; xWriteNumber++ )
{
lItemsWritten = f_write( cRAMBuffer, fsRAM_BUFFER_SIZE, 1, pxFile );
configASSERT( lItemsWritten == 1 );
}
/* Close the file so another file can be created. */
f_close( pxFile );
}
}
/*-----------------------------------------------------------*/
static void prvVerifyDemoFileUsing_f_read( void )
{
portBASE_TYPE xFileNumber, xReadNumber;
char cFileName[ fsMAX_FILE_NAME_LEN ];
const portBASE_TYPE xMaxFiles = 5;
long lItemsRead, lChar;
F_FILE *pxFile;
/* Read back the files that were created by
prvCreateDemoFilesUsing_f_write(). */
for( xFileNumber = 1; xFileNumber <= xMaxFiles; xFileNumber++ )
{
/* Generate the file name. */
sprintf( cFileName, "root%03d.txt", xFileNumber );
/* Obtain the current working directory and print out the file name and
the directory from which the file is being read. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
printf( "Reading file %s from %s\r\n", cFileName, cRAMBuffer );
/* Open the file for reading. */
pxFile = f_open( cFileName, "r" );
configASSERT( pxFile );
/* Read the file into the RAM buffer, checking the file contents are as
expected. The size of the file depends on the file number. */
for( xReadNumber = 0; xReadNumber < xFileNumber; xReadNumber++ )
{
/* Start with the RAM buffer clear. */
memset( cRAMBuffer, 0x00, fsRAM_BUFFER_SIZE );
lItemsRead = f_read( cRAMBuffer, fsRAM_BUFFER_SIZE, 1, pxFile );
configASSERT( lItemsRead == 1 );
/* Check the RAM buffer is filled with the expected data. Each
file contains a different repeating ascii character that indicates
the number of the file. */
for( lChar = 0; lChar < fsRAM_BUFFER_SIZE; lChar++ )
{
configASSERT( cRAMBuffer[ lChar ] == ( '0' + ( char ) xFileNumber ) );
}
}
/* Close the file. */
f_close( pxFile );
}
}
/*-----------------------------------------------------------*/
static void prvCreateDemoFileUsing_f_putc( void )
{
unsigned char ucReturn;
int iByte, iReturned;
F_FILE *pxFile;
char cFileName[ fsMAX_FILE_NAME_LEN ];
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
printf( "In directory %s\r\n", cRAMBuffer );
/* Create a sub directory. */
ucReturn = f_mkdir( pcDirectory1 );
configASSERT( ucReturn == F_NO_ERROR );
/* Move into the created sub-directory. */
ucReturn = f_chdir( pcDirectory1 );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
printf( "In directory %s\r\n", cRAMBuffer );
/* Create a subdirectory in the new directory. */
ucReturn = f_mkdir( pcDirectory2 );
configASSERT( ucReturn == F_NO_ERROR );
/* Move into the directory just created - now two directories down from
the root. */
ucReturn = f_chdir( pcDirectory2 );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
printf( "In directory %s\r\n", cRAMBuffer );
configASSERT( strcmp( cRAMBuffer, pcFullPath ) == 0 );
/* Generate the file name. */
sprintf( cFileName, "%s.txt", pcDirectory2 );
/* Print out the file name and the directory into which the file is being
written. */
printf( "Writing file %s in %s\r\n", cFileName, cRAMBuffer );
pxFile = f_open( cFileName, "w" );
/* Create a file 1 byte at a time. The file is filled with incrementing
ascii characters starting from '0'. */
for( iByte = 0; iByte < fsPUTC_FILE_SIZE; iByte++ )
{
iReturned = f_putc( ( ( int ) '0' + iByte ), pxFile );
configASSERT( iReturned == ( ( int ) '0' + iByte ) );
}
/* Finished so close the file. */
f_close( pxFile );
/* Move back to the root directory. */
ucReturn = f_chdir( "../.." );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
printf( "Back in root directory %s\r\n", cRAMBuffer );
configASSERT( strcmp( cRAMBuffer, pcRoot ) == 0 );
}
/*-----------------------------------------------------------*/
static void prvVerifyDemoFileUsing_f_getc( void )
{
unsigned char ucReturn;
int iByte, iReturned;
F_FILE *pxFile;
char cFileName[ fsMAX_FILE_NAME_LEN ];
/* Move into the directory in which the file was created. */
ucReturn = f_chdir( pcFullPath );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
printf( "Back in directory %s\r\n", cRAMBuffer );
configASSERT( strcmp( cRAMBuffer, pcFullPath ) == 0 );
/* Generate the file name. */
sprintf( cFileName, "%s.txt", pcDirectory2 );
/* Print out the file name and the directory from which the file is being
read. */
printf( "Reading file %s in %s\r\n", cFileName, cRAMBuffer );
/* This time the file is opened for reading. */
pxFile = f_open( cFileName, "r" );
/* Read the file 1 byte at a time. */
for( iByte = 0; iByte < fsPUTC_FILE_SIZE; iByte++ )
{
iReturned = f_getc( pxFile );
configASSERT( iReturned == ( ( int ) '0' + iByte ) );
}
/* Finished so close the file. */
f_close( pxFile );
/* Move back to the root directory. */
ucReturn = f_chdir( "../.." );
configASSERT( ucReturn == F_NO_ERROR );
/* Obtain and print out the working directory. */
f_getcwd( cRAMBuffer, fsRAM_BUFFER_SIZE );
printf( "Back in root directory %s\r\n", cRAMBuffer );
}

View File

@@ -1,20 +0,0 @@

Microsoft Visual Studio Solution File, Format Version 11.00
# Visual C++ Express 2010
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "WIN32", "WIN32.vcxproj", "{C686325E-3261-42F7-AEB1-DDE5280E1CEB}"
EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
Debug|Win32 = Debug|Win32
Release|Win32 = Release|Win32
EndGlobalSection
GlobalSection(ProjectConfigurationPlatforms) = postSolution
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.ActiveCfg = Debug|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.Build.0 = Debug|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.ActiveCfg = Release|Win32
{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.Build.0 = Release|Win32
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE
EndGlobalSection
EndGlobal

View File

@@ -1,5 +0,0 @@
[InternetShortcut]
URL=http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_FAT_SL/Demos/File_System_Win32_Simulator_demo.shtml
IDList=
[{000214A0-0000-0000-C000-000000000046}]
Prop3=19,2

View File

@@ -1,128 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*
* Utility functions required to gather run time statistics. See:
* http://www.freertos.org/rtos-run-time-stats.html
*
* Note that this is a simulated port, where simulated time is a lot slower than
* real time, therefore the run time counter values have no real meaningful
* units.
*
* Also note that it is assumed this demo is going to be used for short periods
* of time only, and therefore timer overflows are not handled.
*/
/* FreeRTOS includes. */
#include <FreeRTOS.h>
/* Variables used in the creation of the run time stats time base. Run time
stats record how much time each task spends in the Running state. */
static long long llInitialRunTimeCounterValue = 0LL, llTicksPerHundedthMillisecond = 0LL;
/*-----------------------------------------------------------*/
void vConfigureTimerForRunTimeStats( void )
{
LARGE_INTEGER liPerformanceCounterFrequency, liInitialRunTimeValue;
/* Initialise the variables used to create the run time stats time base.
Run time stats record how much time each task spends in the Running
state. */
if( QueryPerformanceFrequency( &liPerformanceCounterFrequency ) == 0 )
{
llTicksPerHundedthMillisecond = 1;
}
else
{
/* How many times does the performance counter increment in 1/100th
millisecond. */
llTicksPerHundedthMillisecond = liPerformanceCounterFrequency.QuadPart / 100000LL;
/* What is the performance counter value now, this will be subtracted
from readings taken at run time. */
QueryPerformanceCounter( &liInitialRunTimeValue );
llInitialRunTimeCounterValue = liInitialRunTimeValue.QuadPart;
}
}
/*-----------------------------------------------------------*/
unsigned long ulGetRunTimeCounterValue( void )
{
LARGE_INTEGER liCurrentCount;
unsigned long ulReturn;
/* What is the performance counter value now? */
QueryPerformanceCounter( &liCurrentCount );
/* Subtract the performance counter value reading taken when the
application started to get a count from that reference point, then
scale to (simulated) 1/100ths of a millisecond. */
ulReturn = ( unsigned long ) ( ( liCurrentCount.QuadPart - llInitialRunTimeCounterValue ) / llTicksPerHundedthMillisecond );
return ulReturn;
}
/*-----------------------------------------------------------*/

View File

@@ -1,417 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
*
* See the following URL for information on the commands defined in this file:
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Ethernet_Related_CLI_Commands.shtml
*
******************************************************************************/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
#ifndef configINCLUDE_TRACE_RELATED_CLI_COMMANDS
#define configINCLUDE_TRACE_RELATED_CLI_COMMANDS 0
#endif
/*
* Implements the run-time-stats command.
*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the task-stats command.
*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the echo-three-parameters command.
*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the echo-parameters command.
*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the "trace start" and "trace stop" commands;
*/
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
#endif
/* Structure that defines the "run-time-stats" command line command. This
generates a table that shows how much run time each task has */
static const CLI_Command_Definition_t xRunTimeStats =
{
"run-time-stats", /* The command string to type. */
"\r\nrun-time-stats:\r\n Displays a table showing how much processing time each FreeRTOS task has used\r\n",
prvRunTimeStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "task-stats" command line command. This generates
a table that gives information on each task in the system. */
static const CLI_Command_Definition_t xTaskStats =
{
"task-stats", /* The command string to type. */
"\r\ntask-stats:\r\n Displays a table showing the state of each FreeRTOS task\r\n",
prvTaskStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "echo_3_parameters" command line command. This
takes exactly three parameters that the command simply echos back one at a
time. */
static const CLI_Command_Definition_t xThreeParameterEcho =
{
"echo-3-parameters",
"\r\necho-3-parameters <param1> <param2> <param3>:\r\n Expects three parameters, echos each in turn\r\n",
prvThreeParameterEchoCommand, /* The function to run. */
3 /* Three parameters are expected, which can take any value. */
};
/* Structure that defines the "echo_parameters" command line command. This
takes a variable number of parameters that the command simply echos back one at
a time. */
static const CLI_Command_Definition_t xParameterEcho =
{
"echo-parameters",
"\r\necho-parameters <...>:\r\n Take variable number of parameters, echos each in turn\r\n",
prvParameterEchoCommand, /* The function to run. */
-1 /* The user can enter any number of commands. */
};
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
/* Structure that defines the "trace" command line command. This takes a single
parameter, which can be either "start" or "stop". */
static const CLI_Command_Definition_t xStartStopTrace =
{
"trace",
"\r\ntrace [start | stop]:\r\n Starts or stops a trace recording for viewing in FreeRTOS+Trace\r\n",
prvStartStopTraceCommand, /* The function to run. */
1 /* One parameter is expected. Valid values are "start" and "stop". */
};
#endif /* configINCLUDE_TRACE_RELATED_CLI_COMMANDS */
/*-----------------------------------------------------------*/
void vRegisterSampleCLICommands( void )
{
/* Register all the command line commands defined immediately above. */
FreeRTOS_CLIRegisterCommand( &xTaskStats );
FreeRTOS_CLIRegisterCommand( &xRunTimeStats );
FreeRTOS_CLIRegisterCommand( &xThreeParameterEcho );
FreeRTOS_CLIRegisterCommand( &xParameterEcho );
#if( configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1 )
{
FreeRTOS_CLIRegisterCommand( & xStartStopTrace );
}
#endif
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *const pcHeader = "Task State Priority Stack #\r\n************************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskList( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char * const pcHeader = "Task Abs Time % Time\r\n****************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskGetRunTimeStats( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The three parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", ( int ) lParameterNumber );
strncat( pcWriteBuffer, pcParameter, xParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
if( lParameterNumber == 3L )
{
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
xReturn = pdFALSE;
lParameterNumber = 0L;
}
else
{
/* There are more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
if( pcParameter != NULL )
{
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", ( int ) lParameterNumber );
strncat( pcWriteBuffer, pcParameter, xParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* There might be more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
else
{
/* No more parameters were found. Make sure the write buffer does
not contain a valid string. */
pcWriteBuffer[ 0 ] = 0x00;
/* No more data to return. */
xReturn = pdFALSE;
/* Start over the next time this command is executed. */
lParameterNumber = 0;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE lParameterStringLength;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* There are only two valid parameter values. */
if( strncmp( pcParameter, "start", strlen( "start" ) ) == 0 )
{
/* Start or restart the trace. */
vTraceStop();
vTraceClear();
vTraceStart();
sprintf( pcWriteBuffer, "Trace recording (re)started.\r\n" );
}
else if( strncmp( pcParameter, "stop", strlen( "stop" ) ) == 0 )
{
/* End the trace, if one is running. */
vTraceStop();
sprintf( pcWriteBuffer, "Stopping trace recording.\r\n" );
}
else
{
sprintf( pcWriteBuffer, "Valid parameters are 'start' and 'stop'.\r\n" );
}
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
#endif /* configINCLUDE_TRACE_RELATED_CLI_COMMANDS */

View File

@@ -1,267 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#pragma comment( lib, "ws2_32.lib" )
/* Win32 includes. */
#include <WinSock2.h>
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* Dimensions the buffer into which input characters are placed. */
#define cmdMAX_INPUT_SIZE 60
/* Dimensions the buffer into which string outputs can be placed. */
#define cmdMAX_OUTPUT_SIZE 1024
/* Dimensions the buffer passed to the recvfrom() call. */
#define cmdSOCKET_INPUT_BUFFER_SIZE 60
/* DEL acts as a backspace. */
#define cmdASCII_DEL ( 0x7F )
/*
* Open and configure the UDP socket.
*/
static SOCKET prvOpenUDPSocket( void );
/*-----------------------------------------------------------*/
/*
* Task that provides the input and output for the FreeRTOS+CLI command
* interpreter. In this case a WinSock UDP port is used for convenience as this
* demo runs in a simulated environment on a Windows PC. See the URL in the
* comments within main.c for the location of the online documentation.
*/
void vUDPCommandInterpreterTask( void *pvParameters )
{
long lBytes, lByte;
signed char cInChar, cInputIndex = 0;
static signed char cInputString[ cmdMAX_INPUT_SIZE ], cOutputString[ cmdMAX_OUTPUT_SIZE ], cLocalBuffer[ cmdSOCKET_INPUT_BUFFER_SIZE ];
portBASE_TYPE xMoreDataToFollow;
volatile int iErrorCode = 0;
struct sockaddr_in xClient;
int xClientAddressLength = sizeof( struct sockaddr_in );
SOCKET xSocket;
/* Just to prevent compiler warnings. */
( void ) pvParameters;
/* Attempt to open the socket. */
xSocket = prvOpenUDPSocket();
if( xSocket != INVALID_SOCKET )
{
for( ;; )
{
/* Wait for incoming data on the opened socket. */
lBytes = recvfrom( xSocket, cLocalBuffer, sizeof( cLocalBuffer ), 0, ( struct sockaddr * ) &xClient, &xClientAddressLength );
if( lBytes == SOCKET_ERROR )
{
/* Something went wrong, but it is not handled by this simple
example. */
iErrorCode = WSAGetLastError();
}
else
{
/* Process each received byte in turn. */
lByte = 0;
while( lByte < lBytes )
{
/* The next character in the input buffer. */
cInChar = cLocalBuffer[ lByte ];
lByte++;
/* Newline characters are taken as the end of the command
string. */
if( cInChar == '\n' )
{
/* Process the input string received prior to the
newline. */
do
{
/* Pass the string to FreeRTOS+CLI. */
xMoreDataToFollow = FreeRTOS_CLIProcessCommand( cInputString, cOutputString, cmdMAX_OUTPUT_SIZE );
/* Send the output generated by the command's
implementation. */
sendto( xSocket, cOutputString, strlen( cOutputString ), 0, ( SOCKADDR * ) &xClient, xClientAddressLength );
} while( xMoreDataToFollow != pdFALSE ); /* Until the command does not generate any more output. */
/* All the strings generated by the command processing
have been sent. Clear the input string ready to receive
the next command. */
cInputIndex = 0;
memset( cInputString, 0x00, cmdMAX_INPUT_SIZE );
/* Transmit a spacer, just to make the command console
easier to read. */
sendto( xSocket, "\r\n", strlen( "\r\n" ), 0, ( SOCKADDR * ) &xClient, xClientAddressLength );
}
else
{
if( cInChar == '\r' )
{
/* Ignore the character. Newlines are used to
detect the end of the input string. */
}
else if( ( cInChar == '\b' ) || ( cInChar == cmdASCII_DEL ) )
{
/* Backspace was pressed. Erase the last character
in the string - if any. */
if( cInputIndex > 0 )
{
cInputIndex--;
cInputString[ cInputIndex ] = '\0';
}
}
else
{
/* A character was entered. Add it to the string
entered so far. When a \n is entered the complete
string will be passed to the command interpreter. */
if( cInputIndex < cmdMAX_INPUT_SIZE )
{
cInputString[ cInputIndex ] = cInChar;
cInputIndex++;
}
}
}
}
}
}
}
else
{
/* The socket could not be opened. */
vTaskDelete( NULL );
}
}
/*-----------------------------------------------------------*/
static SOCKET prvOpenUDPSocket( void )
{
WSADATA xWSAData;
WORD wVersionRequested;
struct sockaddr_in xServer;
SOCKET xSocket = INVALID_SOCKET;
wVersionRequested = MAKEWORD( 2, 2 );
/* Prepare to use WinSock. */
if( WSAStartup( wVersionRequested, &xWSAData ) != 0 )
{
fprintf( stderr, "Could not open Windows connection.\n" );
}
else
{
xSocket = socket( AF_INET, SOCK_DGRAM, 0 );
if( xSocket == INVALID_SOCKET)
{
fprintf( stderr, "Could not create socket.\n" );
WSACleanup();
}
else
{
/* Zero out the server structure. */
memset( ( void * ) &xServer, 0x00, sizeof( struct sockaddr_in ) );
/* Set family and port. */
xServer.sin_family = AF_INET;
xServer.sin_port = htons( configUDP_CLI_PORT_NUMBER );
/* Assign the loopback address */
xServer.sin_addr.S_un.S_un_b.s_b1 = 127;
xServer.sin_addr.S_un.S_un_b.s_b2 = 0;
xServer.sin_addr.S_un.S_un_b.s_b3 = 0;
xServer.sin_addr.S_un.S_un_b.s_b4 = 1;
/* Bind the address to the socket. */
if( bind( xSocket, ( struct sockaddr * ) &xServer, sizeof( struct sockaddr_in ) ) == -1 )
{
fprintf( stderr, "Could not socket to port %d.\n", configUDP_CLI_PORT_NUMBER );
closesocket( xSocket );
xSocket = INVALID_SOCKET;
WSACleanup();
}
}
}
return xSocket;
}

View File

@@ -1,183 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
<ItemGroup Label="ProjectConfigurations">
<ProjectConfiguration Include="Debug|Win32">
<Configuration>Debug</Configuration>
<Platform>Win32</Platform>
</ProjectConfiguration>
<ProjectConfiguration Include="Release|Win32">
<Configuration>Release</Configuration>
<Platform>Win32</Platform>
</ProjectConfiguration>
</ItemGroup>
<PropertyGroup Label="Globals">
<ProjectGuid>{C686325E-3261-42F7-AEB1-DDE5280E1CEB}</ProjectGuid>
<ProjectName>RTOSDemo</ProjectName>
</PropertyGroup>
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="Configuration">
<ConfigurationType>Application</ConfigurationType>
<UseOfMfc>false</UseOfMfc>
<CharacterSet>MultiByte</CharacterSet>
</PropertyGroup>
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="Configuration">
<ConfigurationType>Application</ConfigurationType>
<UseOfMfc>false</UseOfMfc>
<CharacterSet>MultiByte</CharacterSet>
</PropertyGroup>
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
<ImportGroup Label="ExtensionSettings">
</ImportGroup>
<ImportGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="PropertySheets">
<Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
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<ImportGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="PropertySheets">
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<Import Project="$(VCTargetsPath)Microsoft.CPP.UpgradeFromVC60.props" />
</ImportGroup>
<PropertyGroup Label="UserMacros" />
<PropertyGroup>
<_ProjectFileVersion>10.0.30319.1</_ProjectFileVersion>
<OutDir Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">.\Debug\</OutDir>
<IntDir Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">.\Debug\</IntDir>
<LinkIncremental Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">true</LinkIncremental>
<OutDir Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">.\Release\</OutDir>
<IntDir Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">.\Release\</IntDir>
<LinkIncremental Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">false</LinkIncremental>
</PropertyGroup>
<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
<Midl>
<TypeLibraryName>.\Debug/WIN32.tlb</TypeLibraryName>
<HeaderFileName>
</HeaderFileName>
</Midl>
<ClCompile>
<Optimization>Disabled</Optimization>
<AdditionalIncludeDirectories>..\..\..\FreeRTOS\Source\include;..\..\..\FreeRTOS\Source\portable\MSVC-MingW;..\..\Source\FreeRTOS-Plus-CLI;.;.\..\..\Source\FreeRTOS-Plus-FAT-SL\api;.\..\..\Source\FreeRTOS-Plus-FAT-SL\fat_sl\test;.\ConfigurationFiles;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
<PreprocessorDefinitions>WIN32;_DEBUG;_CONSOLE;_WIN32_WINNT=0x0500;WINVER=0x400;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions)</PreprocessorDefinitions>
<MinimalRebuild>true</MinimalRebuild>
<BasicRuntimeChecks>EnableFastChecks</BasicRuntimeChecks>
<RuntimeLibrary>MultiThreadedDebug</RuntimeLibrary>
<PrecompiledHeaderOutputFile>.\Debug/WIN32.pch</PrecompiledHeaderOutputFile>
<AssemblerListingLocation>.\Debug/</AssemblerListingLocation>
<ObjectFileName>.\Debug/</ObjectFileName>
<ProgramDataBaseFileName>.\Debug/</ProgramDataBaseFileName>
<WarningLevel>Level4</WarningLevel>
<SuppressStartupBanner>true</SuppressStartupBanner>
<DisableLanguageExtensions>false</DisableLanguageExtensions>
<DebugInformationFormat>EditAndContinue</DebugInformationFormat>
</ClCompile>
<ResourceCompile>
<PreprocessorDefinitions>_DEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
<Culture>0x0c09</Culture>
</ResourceCompile>
<Link>
<OutputFile>.\Debug/RTOSDemo.exe</OutputFile>
<SuppressStartupBanner>true</SuppressStartupBanner>
<GenerateDebugInformation>true</GenerateDebugInformation>
<ProgramDatabaseFile>.\Debug/WIN32.pdb</ProgramDatabaseFile>
<SubSystem>Console</SubSystem>
<TargetMachine>MachineX86</TargetMachine>
<AdditionalDependencies>%(AdditionalDependencies)</AdditionalDependencies>
<AdditionalLibraryDirectories>.\WinPCap</AdditionalLibraryDirectories>
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<Bscmake>
<SuppressStartupBanner>true</SuppressStartupBanner>
<OutputFile>.\Debug/WIN32.bsc</OutputFile>
</Bscmake>
</ItemDefinitionGroup>
<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
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<ClCompile>
<Optimization>MaxSpeed</Optimization>
<InlineFunctionExpansion>OnlyExplicitInline</InlineFunctionExpansion>
<PreprocessorDefinitions>_WINSOCKAPI_;WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions)</PreprocessorDefinitions>
<StringPooling>true</StringPooling>
<RuntimeLibrary>MultiThreaded</RuntimeLibrary>
<FunctionLevelLinking>true</FunctionLevelLinking>
<PrecompiledHeaderOutputFile>.\Release/WIN32.pch</PrecompiledHeaderOutputFile>
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View File

@@ -1,228 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
*
* This demo is described on the following web page:
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_FAT_SL/Demos/File_System_Win32_Simulator_demo.shtml
*
******************************************************************************/
/* Standard includes. */
#include <stdio.h>
#include <stdint.h>
/* FreeRTOS includes. */
#include <FreeRTOS.h>
#include "task.h"
#include "queue.h"
#include "semphr.h"
/* File system includes. */
#include "config_fat_sl.h"
/* Priorities at which the tasks are created. */
#define mainUDP_CLI_TASK_PRIORITY ( tskIDLE_PRIORITY )
/*-----------------------------------------------------------*/
/*
* Register the generic commands that can be used with FreeRTOS+CLI.
*/
extern void vRegisterSampleCLICommands( void );
/*
* Register the file system commands that can be used with FreeRTOS+CLI.
*/
extern void vRegisterFileSystemCLICommands( void );
/*
* The task that implements the UDP command interpreter using FreeRTOS+CLI.
*/
extern void vUDPCommandInterpreterTask( void *pvParameters );
/*
* Creates and verifies different files on the volume, demonstrating the use of
* various different API functions.
*/
extern void vCreateAndVerifySampleFiles( void );
/*-----------------------------------------------------------*/
/******************************************************************************
*
* This demo is described on the following web page:
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_FAT_SL/Demos/File_System_Win32_Simulator_demo.shtml
*
******************************************************************************/
int main( void )
{
const uint32_t ulLongTime_ms = 250UL;
/* If the file system is only going to be accessed from one task then
F_FS_THREAD_AWARE can be set to 0 and the set of example files are created
before the RTOS scheduler is started. If the file system is going to be
access from more than one task then F_FS_THREAD_AWARE must be set to 1 and
the set of sample files are created from the idle task hook function
vApplicationIdleHook() - which is defined in this file. */
#if F_FS_THREAD_AWARE == 0
{
/* Initialise the drive and file system, then create a few example
files. The output from this function just goes to the stdout window,
allowing the output to be viewed when the UDP command console is not
connected. */
vCreateAndVerifySampleFiles();
}
#endif
/* Register generic commands with the FreeRTOS+CLI command interpreter. */
vRegisterSampleCLICommands();
/* Register file system related commands with the FreeRTOS+CLI command
interpreter. */
vRegisterFileSystemCLICommands();
/* Create the task that handles the CLI on a UDP port. The port number
is set using the configUDP_CLI_PORT_NUMBER setting in FreeRTOSConfig.h. */
xTaskCreate( vUDPCommandInterpreterTask, /* The function that implements the command interpreter IO handling. */
"CLI", /* The name of the task - just to assist debugging. */
configMINIMAL_STACK_SIZE, NULL, /* The size of the stack allocated to the task. */
mainUDP_CLI_TASK_PRIORITY, /* The priority at which the task will run. */
NULL ); /* A handle to the task is not required, so NULL is passed. */
/* Start the RTOS scheduler. */
vTaskStartScheduler();
/* If all is well, the scheduler will now be running, and the following
line will never be reached. If the following line does execute, then
there was insufficient FreeRTOS heap memory available for the idle and/or
timer tasks to be created. See the memory management section on the
FreeRTOS web site for more details (this is standard text that is not not
really applicable to the Win32 simulator port). */
for( ;; )
{
Sleep( ulLongTime_ms );
}
}
/*-----------------------------------------------------------*/
void vApplicationIdleHook( void )
{
const unsigned long ulMSToSleep = 5;
/* If the file system is only going to be accessed from one task then
F_FS_THREAD_AWARE can be set to 0 and the set of example files is created
before the RTOS scheduler is started. If the file system is going to be
access from more than one task then F_FS_THREAD_AWARE must be set to 1 and
the set of sample files are created from the idle task hook function. */
#if F_FS_THREAD_AWARE == 1
{
static portBASE_TYPE xCreatedSampleFiles = pdFALSE;
/* Initialise the drive and file system, then create a few example
files. The output from this function just goes to the stdout window,
allowing the output to be viewed when the UDP command console is not
connected. */
if( xCreatedSampleFiles == pdFALSE )
{
vCreateAndVerifySampleFiles();
xCreatedSampleFiles = pdTRUE;
}
}
#endif
/* This function is called on each cycle of the idle task if
configUSE_IDLE_HOOK is set to 1 in FreeRTOSConfig.h. Sleep to reduce CPU
load. */
Sleep( ulMSToSleep );
}
/*-----------------------------------------------------------*/
void vAssertCalled( const char *pcFile, unsigned long ulLine )
{
printf( "ASSERT FAILED: File %s, line %u\r\n", pcFile, ulLine );
}
/*-----------------------------------------------------------*/
void vApplicationMallocFailedHook( void )
{
/* vApplicationMallocFailedHook() will only be called if
configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
function that will get called if a call to pvPortMalloc() fails.
pvPortMalloc() is called internally by the kernel whenever a task, queue,
timer or semaphore is created. It is also called by various parts of the
demo application. If heap_1.c, heap_2.c or heap_4.c are used, then the
size of the heap available to pvPortMalloc() is defined by
configTOTAL_HEAP_SIZE in FreeRTOSConfig.h, and the xPortGetFreeHeapSize()
API function can be used to query the size of free heap space that remains
(although it does not provide information on how the remaining heap might
be fragmented). */
taskDISABLE_INTERRUPTS();
for( ;; );
}

View File

@@ -1,5 +0,0 @@
[InternetShortcut]
URL=http://www.freertos.org/Atmel_SAM4E_RTOS_Demo.html
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<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
</projectDescription>

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@@ -1,2 +0,0 @@
eclipse.preferences.version=1
useParentScope=false

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@@ -1,2 +0,0 @@
eclipse.preferences.version=1
org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false

View File

@@ -1,667 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
*
* See the following URL for information on the commands defined in this file:
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Ethernet_Related_CLI_Commands.shtml
*
******************************************************************************/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Standard includes. */
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
/* FreeRTOS+CLI includes. */
#include "FreeRTOS_CLI.h"
/* FreeRTOS+UDP includes, just to make the stats available to the CLI
commands. */
#include "FreeRTOS_UDP_IP.h"
#include "FreeRTOS_Sockets.h"
#ifndef configINCLUDE_TRACE_RELATED_CLI_COMMANDS
#define configINCLUDE_TRACE_RELATED_CLI_COMMANDS 0
#endif
/*
* Implements the run-time-stats command.
*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the task-stats command.
*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the echo-three-parameters command.
*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the echo-parameters command.
*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that prints out IP address information.
*/
static portBASE_TYPE prvDisplayIPConfig( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that prints out the gathered demo debug stats.
*/
static portBASE_TYPE prvDisplayIPDebugStats( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Defines a command that sends an ICMP ping request to an IP address.
*/
static portBASE_TYPE prvPingCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
/*
* Implements the "trace start" and "trace stop" commands;
*/
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString );
#endif
/* Structure that defines the "ip-config" command line command. */
static const CLI_Command_Definition_t xIPConfig =
{
"ip-config",
"ip-config:\r\n Displays IP address configuration\r\n\r\n",
prvDisplayIPConfig,
0
};
#if configINCLUDE_DEMO_DEBUG_STATS != 0
/* Structure that defines the "ip-debug-stats" command line command. */
static const CLI_Command_Definition_t xIPDebugStats =
{
"ip-debug-stats", /* The command string to type. */
"ip-debug-stats:\r\n Shows some IP stack stats useful for debug - an example only.\r\n\r\n",
prvDisplayIPDebugStats, /* The function to run. */
0 /* No parameters are expected. */
};
#endif /* configINCLUDE_DEMO_DEBUG_STATS */
/* Structure that defines the "run-time-stats" command line command. This
generates a table that shows how much run time each task has */
static const CLI_Command_Definition_t xRunTimeStats =
{
"run-time-stats", /* The command string to type. */
"run-time-stats:\r\n Displays a table showing how much processing time each FreeRTOS task has used\r\n\r\n",
prvRunTimeStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "task-stats" command line command. This generates
a table that gives information on each task in the system. */
static const CLI_Command_Definition_t xTaskStats =
{
"task-stats", /* The command string to type. */
"task-stats:\r\n Displays a table showing the state of each FreeRTOS task\r\n\r\n",
prvTaskStatsCommand, /* The function to run. */
0 /* No parameters are expected. */
};
/* Structure that defines the "echo_3_parameters" command line command. This
takes exactly three parameters that the command simply echos back one at a
time. */
static const CLI_Command_Definition_t xThreeParameterEcho =
{
"echo-3-parameters",
"echo-3-parameters <param1> <param2> <param3>:\r\n Expects three parameters, echos each in turn\r\n\r\n",
prvThreeParameterEchoCommand, /* The function to run. */
3 /* Three parameters are expected, which can take any value. */
};
/* Structure that defines the "echo_parameters" command line command. This
takes a variable number of parameters that the command simply echos back one at
a time. */
static const CLI_Command_Definition_t xParameterEcho =
{
"echo-parameters",
"echo-parameters <...>:\r\n Take variable number of parameters, echos each in turn\r\n\r\n",
prvParameterEchoCommand, /* The function to run. */
-1 /* The user can enter any number of commands. */
};
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
/* Structure that defines the "ping" command line command. This takes an IP
address or host name and (optionally) the number of bytes to ping as
parameters. */
static const CLI_Command_Definition_t xPing =
{
"ping",
"ping <ipaddress> <optional:bytes to send>:\r\n for example, ping 192.168.0.3 8, or ping www.example.com\r\n\r\n",
prvPingCommand, /* The function to run. */
-1 /* Ping can take either one or two parameter, so the number of parameters has to be determined by the ping command implementation. */
};
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
/* Structure that defines the "trace" command line command. This takes a single
parameter, which can be either "start" or "stop". */
static const CLI_Command_Definition_t xStartStopTrace =
{
"trace",
"trace [start | stop]:\r\n Starts or stops a trace recording for viewing in FreeRTOS+Trace\r\n\r\n",
prvStartStopTraceCommand, /* The function to run. */
1 /* One parameter is expected. Valid values are "start" and "stop". */
};
#endif /* configINCLUDE_TRACE_RELATED_CLI_COMMANDS */
/*-----------------------------------------------------------*/
void vRegisterCLICommands( void )
{
/* Register all the command line commands defined immediately above. */
FreeRTOS_CLIRegisterCommand( &xTaskStats );
FreeRTOS_CLIRegisterCommand( &xRunTimeStats );
FreeRTOS_CLIRegisterCommand( &xThreeParameterEcho );
FreeRTOS_CLIRegisterCommand( &xParameterEcho );
FreeRTOS_CLIRegisterCommand( &xIPDebugStats );
FreeRTOS_CLIRegisterCommand( &xIPConfig );
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
{
FreeRTOS_CLIRegisterCommand( &xPing );
}
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
FreeRTOS_CLIRegisterCommand( & xStartStopTrace );
#endif
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvTaskStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *const pcHeader = "Task State Priority Stack #\r\n************************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskList( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvRunTimeStatsCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char * const pcHeader = "Task Abs Time % Time\r\n****************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Generate a table of task stats. */
strcpy( pcWriteBuffer, pcHeader );
vTaskGetRunTimeStats( pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvThreeParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The three parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", ( int ) lParameterNumber );
strncat( pcWriteBuffer, pcParameter, xParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
if( lParameterNumber == 3L )
{
/* If this is the last of the three parameters then there are no more
strings to return after this one. */
xReturn = pdFALSE;
lParameterNumber = 0L;
}
else
{
/* There are more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvParameterEchoCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE xParameterStringLength, xReturn;
static portBASE_TYPE lParameterNumber = 0;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
if( lParameterNumber == 0 )
{
/* The first time the function is called after the command has been
entered just a header string is returned. */
sprintf( pcWriteBuffer, "The parameters were:\r\n" );
/* Next time the function is called the first parameter will be echoed
back. */
lParameterNumber = 1L;
/* There is more data to be returned as no parameters have been echoed
back yet. */
xReturn = pdPASS;
}
else
{
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
lParameterNumber, /* Return the next parameter. */
&xParameterStringLength /* Store the parameter string length. */
);
if( pcParameter != NULL )
{
/* Return the parameter string. */
memset( pcWriteBuffer, 0x00, xWriteBufferLen );
sprintf( pcWriteBuffer, "%d: ", ( int ) lParameterNumber );
strncat( pcWriteBuffer, pcParameter, xParameterStringLength );
strncat( pcWriteBuffer, "\r\n", strlen( "\r\n" ) );
/* There might be more parameters to return after this one. */
xReturn = pdTRUE;
lParameterNumber++;
}
else
{
/* No more parameters were found. Make sure the write buffer does
not contain a valid string. */
pcWriteBuffer[ 0 ] = 0x00;
/* No more data to return. */
xReturn = pdFALSE;
/* Start over the next time this command is executed. */
lParameterNumber = 0;
}
}
return xReturn;
}
/*-----------------------------------------------------------*/
#if ipconfigSUPPORT_OUTGOING_PINGS == 1
static portBASE_TYPE prvPingCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
char * pcParameter;
portBASE_TYPE lParameterStringLength, xReturn;
uint32_t ulIPAddress, ulBytesToPing;
const uint32_t ulDefaultBytesToPing = 8UL;
char cBuffer[ 16 ];
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Start with an empty string. */
pcWriteBuffer[ 0 ] = 0x00;
/* Obtain the number of bytes to ping. */
pcParameter = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
2, /* Return the second parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
if( pcParameter == NULL )
{
/* The number of bytes was not specified, so default it. */
ulBytesToPing = ulDefaultBytesToPing;
}
else
{
ulBytesToPing = atol( pcParameter );
}
/* Obtain the IP address string. */
pcParameter = ( char * ) FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* Attempt to obtain the IP address. If the first character is not a
digit, assume the host name has been passed in. */
if( ( *pcParameter >= '0' ) && ( *pcParameter <= '9' ) )
{
ulIPAddress = FreeRTOS_inet_addr( pcParameter );
}
else
{
/* Terminate the host name. */
pcParameter[ lParameterStringLength ] = 0x00;
/* Attempt to resolve host. */
ulIPAddress = FreeRTOS_gethostbyname( pcParameter );
}
/* Convert IP address, which may have come from a DNS lookup, to string. */
FreeRTOS_inet_ntoa( ulIPAddress, cBuffer );
if( ulIPAddress != 0 )
{
xReturn = FreeRTOS_SendPingRequest( ulIPAddress, ( uint16_t ) ulBytesToPing, portMAX_DELAY );
}
else
{
xReturn = pdFALSE;
}
if( xReturn == pdFALSE )
{
sprintf( pcWriteBuffer, "%s", "Could not send ping request\r\n" );
}
else
{
sprintf( pcWriteBuffer, "Ping sent to %s with identifier %d\r\n", cBuffer, xReturn );
}
return pdFALSE;
}
/*-----------------------------------------------------------*/
#endif /* ipconfigSUPPORT_OUTGOING_PINGS */
#if configINCLUDE_DEMO_DEBUG_STATS != 0
static portBASE_TYPE prvDisplayIPDebugStats( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
static portBASE_TYPE xIndex = -1;
extern xExampleDebugStatEntry_t xIPTraceValues[];
portBASE_TYPE xReturn;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
xIndex++;
if( xIndex < xExampleDebugStatEntries() )
{
sprintf( pcWriteBuffer, "%s %d\r\n", xIPTraceValues[ xIndex ].pucDescription, ( int ) xIPTraceValues[ xIndex ].ulData );
xReturn = pdPASS;
}
else
{
/* Reset the index for the next time it is called. */
xIndex = -1;
/* Ensure nothing remains in the write buffer. */
pcWriteBuffer[ 0 ] = 0x00;
xReturn = pdFALSE;
}
return xReturn;
}
/*-----------------------------------------------------------*/
#endif /* configINCLUDE_DEMO_DEBUG_STATS */
static portBASE_TYPE prvDisplayIPConfig( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
static portBASE_TYPE xIndex = 0;
portBASE_TYPE xReturn;
uint32_t ulAddress;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
switch( xIndex )
{
case 0 :
FreeRTOS_GetAddressConfiguration( &ulAddress, NULL, NULL, NULL );
sprintf( pcWriteBuffer, "\r\nIP address " );
xReturn = pdTRUE;
xIndex++;
break;
case 1 :
FreeRTOS_GetAddressConfiguration( NULL, &ulAddress, NULL, NULL );
sprintf( pcWriteBuffer, "\r\nNet mask " );
xReturn = pdTRUE;
xIndex++;
break;
case 2 :
FreeRTOS_GetAddressConfiguration( NULL, NULL, &ulAddress, NULL );
sprintf( pcWriteBuffer, "\r\nGateway address " );
xReturn = pdTRUE;
xIndex++;
break;
case 3 :
FreeRTOS_GetAddressConfiguration( NULL, NULL, NULL, &ulAddress );
sprintf( pcWriteBuffer, "\r\nDNS server address " );
xReturn = pdTRUE;
xIndex++;
break;
default :
ulAddress = 0;
sprintf( pcWriteBuffer, "\r\n\r\n" );
xReturn = pdFALSE;
xIndex = 0;
break;
}
if( ulAddress != 0 )
{
FreeRTOS_inet_ntoa( ulAddress, &( pcWriteBuffer[ strlen( pcWriteBuffer ) ] ) );
}
return xReturn;
}
/*-----------------------------------------------------------*/
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
static portBASE_TYPE prvStartStopTraceCommand( char *pcWriteBuffer, size_t xWriteBufferLen, const char *pcCommandString )
{
const char *pcParameter;
portBASE_TYPE lParameterStringLength;
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
write buffer length is adequate, so does not check for buffer overflows. */
( void ) pcCommandString;
( void ) xWriteBufferLen;
configASSERT( pcWriteBuffer );
/* Obtain the parameter string. */
pcParameter = FreeRTOS_CLIGetParameter
(
pcCommandString, /* The command string itself. */
1, /* Return the first parameter. */
&lParameterStringLength /* Store the parameter string length. */
);
/* Sanity check something was returned. */
configASSERT( pcParameter );
/* There are only two valid parameter values. */
if( strncmp( pcParameter, "start", strlen( "start" ) ) == 0 )
{
/* Start or restart the trace. */
vTraceStop();
vTraceClear();
vTraceStart();
sprintf( pcWriteBuffer, "Trace recording (re)started.\r\n" );
}
else if( strncmp( pcParameter, "stop", strlen( "stop" ) ) == 0 )
{
/* End the trace, if one is running. */
vTraceStop();
sprintf( pcWriteBuffer, "Stopping trace recording.\r\n" );
}
else
{
sprintf( pcWriteBuffer, "Valid parameters are 'start' and 'stop'.\r\n" );
}
/* There is no more data to return after this single string, so return
pdFALSE. */
return pdFALSE;
}
#endif /* configINCLUDE_TRACE_RELATED_CLI_COMMANDS */

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@@ -1,80 +0,0 @@
REM This file should be executed from the command line prior to the first
REM build. It will be necessary to refresh the Eclipse project once the
REM .bat file has been executed (normally just press F5 to refresh).
REM Copies all the required files from their location within the standard
REM FreeRTOS directory structure to under the Eclipse project directory.
REM This permits the Eclipse project to be used in 'managed' mode and without
REM having to setup any linked resources.
REM Standard paths
SET FREERTOS_SOURCE=..\..\..\FreeRTOS\Source
SET FREERTOS_UDP_SOURCE=..\..\Source\FreeRTOS-Plus-UDP
SET FREERTOS_CLI_SOURCE=..\..\Source\FreeRTOS-Plus-CLI
set FREERTOS_TRACE_RECORDER_SOURCE=..\..\Source\FreeRTOS-Plus-Trace
REM Have the files already been copied?
IF EXIST FreeRTOS_Source Goto END
REM Create the required directory structure.
MD FreeRTOS_Source
MD FreeRTOS_Source\include
MD FreeRTOS_Source\portable\
MD FreeRTOS_Source\portable\GCC
MD FreeRTOS_Source\portable\GCC\ARM_CM3
MD FreeRTOS_Source\portable\MemMang
MD FreeRTOS_Plus_UDP
MD FreeRTOS_Plus_UDP\include
MD FreeRTOS_Plus_UDP\portable
MD FreeRTOS_Plus_UDP\portable\Compiler
MD FreeRTOS_Plus_UDP\portable\Compiler\GCC
MD FreeRTOS_Plus_UDP\portable\BufferManagement
MD FreeRTOS_Plus_UDP\portable\NetworkInterface
MD FreeRTOS_Plus_UDP\portable\NetworkInterface\LPC18xx
MD FreeRTOS_Plus_CLI
MD Examples\Ethernet
REM Copy the core kernel files into the SDK projects directory
copy %FREERTOS_SOURCE%\tasks.c FreeRTOS_Source
copy %FREERTOS_SOURCE%\queue.c FreeRTOS_Source
copy %FREERTOS_SOURCE%\list.c FreeRTOS_Source
copy %FREERTOS_SOURCE%\timers.c FreeRTOS_Source
REM Copy the common header files into the SDK projects directory
copy %FREERTOS_SOURCE%\include\*.* FreeRTOS_Source\include
REM Copy the portable layer files into the projects directory
copy %FREERTOS_SOURCE%\portable\GCC\ARM_CM3\*.* FreeRTOS_Source\portable\GCC\ARM_CM3
REM Copy the memory allocation file into the project's directory
copy %FREERTOS_SOURCE%\portable\MemMang\heap_4.c FreeRTOS_Source\portable\MemMang
REM Copy the FreeRTOS+UDP core files
copy %FREERTOS_UDP_SOURCE%\*.c FreeRTOS_Plus_UDP
copy %FREERTOS_UDP_SOURCE%\readme.txt FreeRTOS_Plus_UDP
copy %FREERTOS_UDP_SOURCE%\include\*.* FreeRTOS_Plus_UDP\include
REM Copy the FreeRTOS+UDP portable layer files
copy %FREERTOS_UDP_SOURCE%\portable\NetworkInterface\LPC18xx\Using_CMSISv2p10_LPC18xx_DriverLib\*.* FreeRTOS_Plus_UDP\portable\NetworkInterface\LPC18xx
copy %FREERTOS_UDP_SOURCE%\portable\BufferManagement\BufferAllocation_2.c FreeRTOS_Plus_UDP\portable\BufferManagement
copy %FREERTOS_UDP_SOURCE%\portable\Compiler\GCC\*.* FreeRTOS_Plus_UDP\portable\Compiler\GCC
REM Copy the FreeRTOS+CLI files
copy %FREERTOS_CLI_SOURCE%\*.* FreeRTOS_Plus_CLI
REM Copy the FreeRTOS+Trace recorder files
copy %FREERTOS_TRACE_RECORDER_SOURCE%\*.* ThirdParty\FreeRTOS_Plus_Trace_Recorder
copy %FREERTOS_TRACE_RECORDER_SOURCE%\include\*.* ThirdParty\FreeRTOS_Plus_Trace_Recorder\include
REM Copy the echo client example implementation
copy ..\Common\FreeRTOS_Plus_UDP_Demos\EchoClients\TwoEchoClients.c Examples\Ethernet
copy ..\Common\FreeRTOS_Plus_UDP_Demos\EchoClients\TwoEchoClients.h Examples\include
REM Copy the example IP trace macro implementation
copy ..\Common\FreeRTOS_Plus_UDP_Demos\TraceMacros\Example1\DemoIPTrace.c Examples\Ethernet
copy ..\Common\FreeRTOS_Plus_UDP_Demos\TraceMacros\Example1\DemoIPTrace.h Examples\include
REM Copy the CLI commands implementation into the project directory.
copy ..\Common\FreeRTOS_Plus_UDP_Demos\CLICommands\CLI-commands.c .
: END

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@@ -1,339 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*
* NOTE: This file uses a third party USB CDC driver.
*/
/* Standard includes. */
#include "string.h"
#include "stdio.h"
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
/* Driver includes. */
#include "usbhw.h"
#include "cdcuser.h"
#include "usbcfg.h"
#include "usbuser.h"
/* Example includes. */
#include "FreeRTOS_CLI.h"
#include "CDCCommandConsole.h"
/* Dimensions the buffer into which input characters are placed. */
#define cmdMAX_INPUT_SIZE 50
/* The maximum time in ticks to wait for the CDC access mutex. */
#define cmdMAX_MUTEX_WAIT ( 200 / portTICK_RATE_MS )
/*-----------------------------------------------------------*/
/*
* The task that implements the command console processing.
*/
static void prvCDCCommandConsoleTask( void *pvParameters );
/*
* Obtain a character from the CDC input. The calling task will be held in the
* Blocked state (so other tasks can execute) until a character is avilable.
*/
char cGetCDCChar( void );
/*
* Initialise the third party virtual comport files driver
*/
static void prvSetupUSBDrivers( void );
/*-----------------------------------------------------------*/
/* 'Given' by the CDC interrupt to unblock the receiving task when new data
is available. */
static xSemaphoreHandle xNewDataSemaphore = NULL;
/* Used to guard access to the CDC output, which is used by more than one
task. */
static xSemaphoreHandle xCDCMutex = NULL;
/* Const messages output by the command console. */
static const char * const pcWelcomeMessage = "FreeRTOS command server.\r\nType Help to view a list of registered commands.\r\n\r\n>";
static const char * const pcEndOfOutputMessage = "\r\n[Press ENTER to execute the previous command again]\r\n>";
static const char * const pcNewLine = "\r\n";
/*-----------------------------------------------------------*/
void vCDCCommandConsoleStart( uint16_t usStackSize, unsigned portBASE_TYPE uxPriority )
{
/* Create the semaphores and mutexes used by the CDC to task interface. */
xCDCMutex = xSemaphoreCreateMutex();
vSemaphoreCreateBinary( xNewDataSemaphore );
configASSERT( xCDCMutex );
configASSERT( xNewDataSemaphore );
/* Add the semaphore and mutex to the queue registry for viewing in the
kernel aware state viewer. */
vQueueAddToRegistry( xCDCMutex, "CDCMu" );
vQueueAddToRegistry( xNewDataSemaphore, "CDCDat" );
/* Create that task that handles the console itself. */
xTaskCreate( prvCDCCommandConsoleTask, /* The task that implements the command console. */
"CDCCmd", /* Text name assigned to the task. This is just to assist debugging. The kernel does not use this name itself. */
usStackSize, /* The size of the stack allocated to the task. */
NULL, /* The parameter is not used, so NULL is passed. */
uxPriority, /* The priority allocated to the task. */
NULL ); /* A handle is not required, so just pass NULL. */
}
/*-----------------------------------------------------------*/
static void prvCDCCommandConsoleTask( void *pvParameters )
{
char cRxedChar;
uint8_t ucInputIndex = 0;
char *pcOutputString;
static char cInputString[ cmdMAX_INPUT_SIZE ], cLastInputString[ cmdMAX_INPUT_SIZE ];
portBASE_TYPE xReturned;
( void ) pvParameters;
/* Obtain the address of the output buffer. Note there is no mutual
exclusion on this buffer as it is assumed only one command console
interface will be used at any one time. */
pcOutputString = FreeRTOS_CLIGetOutputBuffer();
/* Initialise the virtual com port (CDC) interface. */
prvSetupUSBDrivers();
/* Send the welcome message. This probably won't be seen as the console
will not have been connected yet. */
USB_WriteEP( CDC_DEP_IN, ( uint8_t * ) pcWelcomeMessage, strlen( pcWelcomeMessage ) );
for( ;; )
{
/* No characters received yet for the current input string. */
cRxedChar = 0;
/* Only interested in reading one character at a time. */
cRxedChar = cGetCDCChar();
if( xSemaphoreTake( xCDCMutex, cmdMAX_MUTEX_WAIT ) == pdPASS )
{
/* Echo the character back. */
USB_WriteEP( CDC_DEP_IN, ( uint8_t * ) &cRxedChar, sizeof( uint8_t ) );
/* Was it the end of the line? */
if( cRxedChar == '\n' || cRxedChar == '\r' )
{
/* Just to space the output from the input. */
USB_WriteEP( CDC_DEP_IN, ( uint8_t * ) pcNewLine, strlen( pcNewLine ) );
/* See if the command is empty, indicating that the last command is
to be executed again. */
if( ucInputIndex == 0 )
{
/* Copy the last command back into the input string. */
strcpy( cInputString, cLastInputString );
}
/* Pass the received command to the command interpreter. The
command interpreter is called repeatedly until it returns pdFALSE
(indicating there is no more output) as it might generate more than
one string. */
do
{
/* Get the next output string from the command interpreter. */
xReturned = FreeRTOS_CLIProcessCommand( cInputString, pcOutputString, configCOMMAND_INT_MAX_OUTPUT_SIZE );
/* Write the generated string to the CDC. */
USB_WriteEP( CDC_DEP_IN, ( uint8_t * ) pcOutputString, strlen( pcOutputString ) );
vTaskDelay( 1 );
} while( xReturned != pdFALSE );
/* All the strings generated by the input command have been sent.
Clear the input string ready to receive the next command. Remember
the command that was just processed first in case it is to be
processed again. */
strcpy( cLastInputString, cInputString );
ucInputIndex = 0;
memset( cInputString, 0x00, cmdMAX_INPUT_SIZE );
USB_WriteEP( CDC_DEP_IN, ( uint8_t * ) pcEndOfOutputMessage, strlen( pcEndOfOutputMessage ) );
}
else
{
if( cRxedChar == '\r' )
{
/* Ignore the character. */
}
else if( cRxedChar == '\b' )
{
/* Backspace was pressed. Erase the last character in the
string - if any. */
if( ucInputIndex > 0 )
{
ucInputIndex--;
cInputString[ ucInputIndex ] = '\0';
}
}
else
{
/* A character was entered. Add it to the string
entered so far. When a \n is entered the complete
string will be passed to the command interpreter. */
if( ( cRxedChar >= ' ' ) && ( cRxedChar <= '~' ) )
{
if( ucInputIndex < cmdMAX_INPUT_SIZE )
{
cInputString[ ucInputIndex ] = cRxedChar;
ucInputIndex++;
}
}
}
}
/* Must ensure to give the mutex back. */
xSemaphoreGive( xCDCMutex );
}
}
}
/*-----------------------------------------------------------*/
void vOutputString( const char * const pcMessage )
{
if( xSemaphoreTake( xCDCMutex, cmdMAX_MUTEX_WAIT ) == pdPASS )
{
USB_WriteEP( CDC_DEP_IN, ( uint8_t * ) pcMessage, strlen( pcMessage ) );
xSemaphoreGive( xCDCMutex );
}
}
/*-----------------------------------------------------------*/
char cGetCDCChar( void )
{
int32_t lAvailableBytes, xBytes = 0;
char cInputChar;
do
{
/* Are there any characters already available? */
CDC_OutBufAvailChar( &lAvailableBytes );
if( lAvailableBytes > 0 )
{
if( xSemaphoreTake( xCDCMutex, cmdMAX_MUTEX_WAIT ) == pdPASS )
{
/* Attempt to read one character. */
xBytes = 1;
xBytes = CDC_RdOutBuf( &cInputChar, &xBytes );
xSemaphoreGive( xCDCMutex );
}
}
if( xBytes == 0 )
{
/* A character was not available. Wait until signalled by the
CDC Rx callback function that new data has arrived. */
xSemaphoreTake( xNewDataSemaphore, portMAX_DELAY );
}
} while( xBytes == 0 );
return cInputChar;
}
/*-----------------------------------------------------------*/
/* Callback function executed by the USB interrupt when new data arrives. */
void vCDCNewDataNotify( void )
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
configASSERT( xNewDataSemaphore );
/* 'Give' the semaphore that signals the arrival of new data to the command
console task. */
xSemaphoreGiveFromISR( xNewDataSemaphore, &xHigherPriorityTaskWoken );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
/*-----------------------------------------------------------*/
static void prvSetupUSBDrivers( void )
{
LPC_USBDRV_INIT_T xUSBCallback;
/* Initialise the callback structure. */
memset( ( void * ) &xUSBCallback, 0, sizeof( LPC_USBDRV_INIT_T ) );
xUSBCallback.USB_Reset_Event = USB_Reset_Event;
xUSBCallback.USB_P_EP[ 0 ] = USB_EndPoint0;
xUSBCallback.USB_P_EP[ 1 ] = USB_EndPoint1;
xUSBCallback.USB_P_EP[ 2 ] = USB_EndPoint2;
xUSBCallback.ep0_maxp = USB_MAX_PACKET0;
/* Initialise then connect the USB. */
USB_Init( &xUSBCallback );
USB_Connect( pdTRUE );
}

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@@ -1,78 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef CDC_COMMAND_CONSOLE_H
#define CDC_COMMAND_CONSOLE_H
/*
* Create the task that implements a command console using the USB virtual com
* port driver for intput and output.
*/
void vCDCCommandConsoleStart( uint16_t usStackSize, unsigned portBASE_TYPE uxPriority );
#endif /* CDC_COMMAND_CONSOLE_H */

View File

@@ -1,76 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef TWO_ECHO_CLIENTS_H
#define TWO_ECHO_CLIENTS_H
/*
* Create the two UDP echo client tasks. One task uses the standard interface
* to send to and receive from an echo server. The other task uses the zero
* copy interface to send to and receive from an echo server.
*/
void vStartEchoClientTasks( uint16_t usTaskStackSize, unsigned portBASE_TYPE uxTaskPriority );
#endif /* TWO_ECHO_CLIENTS_H */

View File

@@ -1,12 +0,0 @@
<info flash_driver='LPC1850A_4350A_SPIFI.cfx'>
<chip>
<memory id='Flash' type='Flash' is_ro='true' can_program='true'></memory>
<memory id='RAM' type='RAM'></memory>
<memoryInstance id='SPIFlash' derived_from='Flash' location='0x14000000' size='0x400000' edited='true'/>
<memoryInstance id='RamLoc96' derived_from='RAM' location='0x10000000' size='0x18000' edited='true'/>
<memoryInstance id='RamLoc40' derived_from='RAM' location='0x10080000' size='0xa000' edited='true'/>
<memoryInstance id='RamAHB32' derived_from='RAM' location='0x20000000' size='0x8000' edited='true'/>
<memoryInstance id='RamAHB16' derived_from='RAM' location='0x20008000' size='0x4000' edited='true'/>
<memoryInstance id='RamAHB_ETB16' derived_from='RAM' location='0x2000c000' size='0x4000' edited='true'/>
</chip>
</info>

View File

@@ -1,282 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <stdint.h>
extern uint32_t SystemCoreClock;
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
* http://www.freertos.org/a00110.html
*
* The bottom of this file contains some constants specific to running the UDP
* stack in this demo. Constants specific to FreeRTOS+UDP itself (rather than
* the demo) are contained in FreeRTOSIPConfig.h.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#define configUSE_TICKLESS_IDLE 0
#define configMAX_PRIORITIES ( 7 )
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ 100
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 300 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 40 * 1024 ) ) /* Has not effect in this demo as the heap is manually pointed to AHB RAM. */
#define configMAX_TASK_NAME_LEN ( 12 )
#define configIDLE_SHOULD_YIELD 0
#define configQUEUE_REGISTRY_SIZE 10
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
#define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_ALTERNATIVE_API 0
#define configUSE_RECURSIVE_MUTEXES 1
/* Hook function related definitions. */
#define configUSE_TICK_HOOK 0
#define configUSE_IDLE_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 1
#define configCHECK_FOR_STACK_OVERFLOW 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Run time stats gathering definitions. */
void vMainConfigureTimerForRunTimeStats( void );
uint32_t ulMainGetRunTimeCounterValue( void );
#define configGENERATE_RUN_TIME_STATS 1
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vMainConfigureTimerForRunTimeStats()
#define portGET_RUN_TIME_COUNTER_VALUE() ulMainGetRunTimeCounterValue()
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTimerGetTimerTaskHandle 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xQueueGetMutexHolder 1
/* This demo makes use of one or more example stats formatting functions. These
format the raw data provided by the uxTaskGetSystemState() function in to human
readable ASCII form. See the notes in the implementation of vTaskList() within
FreeRTOS/Source/tasks.c for limitations. */
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
/* Assert statement defined for debug builds. */
#ifdef DEBUG
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
#endif
/* Interrupt priority configuration settings follow.
http://www.freertos.org/RTOS-Cortex-M3-M4.html */
/* Use the system definition for the number of interrupt priorities, if there
is one */
#ifdef __NVIC_PRIO_BITS
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 3 /* 8 priority levels */
#endif
/* The maximum priority an interrupt that uses an interrupt safe FreeRTOS API
function can have. Note that lower priority have numerically higher values. */
#define configMAX_LIBRARY_INTERRUPT_PRIORITY ( 5 )
/* The minimum possible interrupt priority. */
#define configMIN_LIBRARY_INTERRUPT_PRIORITY ( 7 )
/* The lowest priority. */
#define configKERNEL_INTERRUPT_PRIORITY ( configMIN_LIBRARY_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Priority 5, or 248 as only the top five bits are implemented. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configMAX_LIBRARY_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
/*
* DEMO APPLICATION SPECIFIC DEFINITIONS FOLLOW FROM HERE
*/
/* Set to 1 to include "trace start" and "trace stop" CLI commands. These
commands start and stop the FreeRTOS+Trace recording. */
#define configINCLUDE_TRACE_RELATED_CLI_COMMANDS 0
/* Dimensions a buffer that can be used by the FreeRTOS+CLI command
interpreter. See the FreeRTOS+CLI documentation for more information:
http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_CLI/ */
#define configCOMMAND_INT_MAX_OUTPUT_SIZE 1024
/* The priority used by the Ethernet MAC driver interrupt. */
#define configMAC_INTERRUPT_PRIORITY ( configMAX_LIBRARY_INTERRUPT_PRIORITY )
/* If configINCLUDE_DEMO_DEBUG_STATS is set to one, then a few basic IP trace
macros are defined to gather some UDP stack statistics that can then be viewed
through the CLI interface. See
http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/UDP_IP_Trace.shtml*/
#define configINCLUDE_DEMO_DEBUG_STATS 1
/* The LPC1830 Ethernet peripheral uses a DMA to transmit and receive packets.
The DMA uses a chain of descriptors to reference Ethernet buffers, and provide
information on the state of each buffer (full/empty/error/etc.).
configNUM_RX_ETHERNET_DMA_DESCRIPTORS defines the total number of receive
descriptors (descriptors that point to buffers into which the DMA will write
packets received from the network). An Ethernet buffer is assigned to each
descriptor. Having too few descriptors will impact reliability because the DMA
will have to drop packets that are received when there are no receive
descriptors free. It is however only necessary to have a couple of free
descriptors at a time, and having more wastes the RAM used by the Ethernet
buffers that are surplus to requirements. */
#define configNUM_RX_ETHERNET_DMA_DESCRIPTORS 4
/* The LPC1830 Ethernet peripheral uses a DMA to transmit and receive packets.
The DMA uses a chain of descriptors to reference Ethernet buffers that are
waiting to be sent onto the network. configNUM_TX_ETHERNET_DMA_DESCRIPTORS
defines the total number of transmit descriptors. An Ethernet buffer is
not assigned to a transmit descriptor until data is actually sent, but will
remain assigned to the descriptor until the descriptor is re-used. It is not
necessary to have many transmit descriptors as the IP stack task will be held
in the Blocked state (so other tasks can run) until a descriptor becomes
available if it attempts to transmit when all the descriptors are in use. See
the iptraceWAITING_FOR_TX_DMA_DESCRIPTOR() IP trace macro. */
#define configNUM_TX_ETHERNET_DMA_DESCRIPTORS 1
/* The address of an echo server that will be used by the two demo echo client
tasks.
http://FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/Common_Echo_Clients.shtml */
#define configECHO_SERVER_ADDR0 172
#define configECHO_SERVER_ADDR1 25
#define configECHO_SERVER_ADDR2 218
#define configECHO_SERVER_ADDR3 103
/* MAC address configuration. In a deployed production system this would
probably be read from an EEPROM. In the demo it is just hard coded. Make sure
each node on the network has a unique MAC address. */
#define configMAC_ADDR0 0x00
#define configMAC_ADDR1 0x01
#define configMAC_ADDR2 0x02
#define configMAC_ADDR3 0x03
#define configMAC_ADDR4 0x04
#define configMAC_ADDR5 0x08
/* Default IP address configuration. Used in ipconfigUSE_DNS is set to 0, or
ipconfigUSE_DNS is set to 1 but a DNS server cannot be contacted. */
#define configIP_ADDR0 172
#define configIP_ADDR1 25
#define configIP_ADDR2 218
#define configIP_ADDR3 200
/* Default gateway IP address configuration. Used in ipconfigUSE_DNS is set to
0, or ipconfigUSE_DNS is set to 1 but a DNS server cannot be contacted. */
#define configGATEWAY_ADDR0 172
#define configGATEWAY_ADDR1 25
#define configGATEWAY_ADDR2 218
#define configGATEWAY_ADDR3 1
/* Default DNS server configuration. OpenDNS addresses are 208.67.222.222 and
208.67.220.220. Used in ipconfigUSE_DNS is set to 0, or ipconfigUSE_DNS is set
to 1 but a DNS server cannot be contacted.*/
#define configDNS_SERVER_ADDR0 208
#define configDNS_SERVER_ADDR1 67
#define configDNS_SERVER_ADDR2 222
#define configDNS_SERVER_ADDR3 222
/* Defalt netmask configuration. Used in ipconfigUSE_DNS is set to 0, or
ipconfigUSE_DNS is set to 1 but a DNS server cannot be contacted. */
#define configNET_MASK0 255
#define configNET_MASK1 255
#define configNET_MASK2 255
#define configNET_MASK3 0
#if configINCLUDE_TRACE_RELATED_CLI_COMMANDS == 1
/* Only include the trace macro definitions required by FreeRTOS+Trace if
the trace start and trace stop CLI commands are included. */
#include "trcKernelPort.h"
#endif
#endif /* FREERTOS_CONFIG_H */

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@@ -1,233 +0,0 @@
/*
* FreeRTOS+UDP V1.0.1 (C) 2013 Real Time Engineers ltd.
* All rights reserved
*
* FreeRTOS+UDP is an add-on component to FreeRTOS. It is not, in itself, part
* of the FreeRTOS kernel. FreeRTOS+UDP is licensed separately from FreeRTOS,
* and uses a different license to FreeRTOS. FreeRTOS+UDP uses a dual license
* model, information on which is provided below:
*
* - Open source licensing -
* FreeRTOS+UDP is a free download and may be used, modified and distributed
* without charge provided the user adheres to version two of the GNU General
* Public license (GPL) and does not remove the copyright notice or this text.
* The GPL V2 text is available on the gnu.org web site, and on the following
* URL: http://www.FreeRTOS.org/gpl-2.0.txt
*
* - Commercial licensing -
* Businesses and individuals who wish to incorporate FreeRTOS+UDP into
* proprietary software for redistribution in any form must first obtain a
* (very) low cost commercial license - and in-so-doing support the maintenance,
* support and further development of the FreeRTOS+UDP product. Commercial
* licenses can be obtained from http://shop.freertos.org and do not require any
* source files to be changed.
*
* FreeRTOS+UDP is distributed in the hope that it will be useful. You cannot
* use FreeRTOS+UDP unless you agree that you use the software 'as is'.
* FreeRTOS+UDP is provided WITHOUT ANY WARRANTY; without even the implied
* warranties of NON-INFRINGEMENT, MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. Real Time Engineers Ltd. disclaims all conditions and terms, be they
* implied, expressed, or statutory.
*
* 1 tab == 4 spaces!
*
* http://www.FreeRTOS.org
* http://www.FreeRTOS.org/FreeRTOS-Plus
*
*/
/*****************************************************************************
*
* See the following URL for configuration information.
* http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/UDP_IP_Configuration.shtml
*
*****************************************************************************/
#ifndef FREERTOS_IP_CONFIG_H
#define FREERTOS_IP_CONFIG_H
/* The IP stack executes it its own task (although any application task can make
use of its services through the published sockets API). ipconfigUDP_TASK_PRIORITY
sets the priority of the task that executes the IP stack. The priority is a
standard FreeRTOS task priority so can take any value from 0 (the lowest
priority) to (configMAX_PRIORITIES - 1) (the highest priority).
configMAX_PRIORITIES is a standard FreeRTOS configuration parameter defined in
FreeRTOSConfig.h, not FreeRTOSIPConfig.h. Consideration needs to be given as to
the priority assigned to the task executing the IP stack relative to the
priority assigned to tasks that use the IP stack. */
#define ipconfigUDP_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )
/* The size, in words (not bytes), of the stack allocated to the FreeRTOS+UDP
task. This setting is less important when the FreeRTOS Win32 simulator is used
as the Win32 simulator only stores a fixed amount of information on the task
stack. FreeRTOS includes optional stack overflow detection, see:
http://www.freertos.org/Stacks-and-stack-overflow-checking.html */
#define ipconfigUDP_TASK_STACK_SIZE_WORDS ( configMINIMAL_STACK_SIZE * 3 )
/* ipconfigRAND32() is called by the IP stack to generate a random number that
is then used as a DHCP transaction number. Random number generation is performed
via this macro to allow applications to use their own random number generation
method. For example, it might be possible to generate a random number by
sampling noise on an analogue input. */
#define ipconfigRAND32() 1
/* If ipconfigUSE_NETWORK_EVENT_HOOK is set to 1 then FreeRTOS+UDP will call the
network event hook at the appropriate times. If ipconfigUSE_NETWORK_EVENT_HOOK
is not set to 1 then the network event hook will never be called. See
http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/API/vApplicationIPNetworkEventHook.shtml
*/
#define ipconfigUSE_NETWORK_EVENT_HOOK 1
/* Sockets have a send block time attribute. If FreeRTOS_sendto() is called but
a network buffer cannot be obtained then the calling task is held in the Blocked
state (so other tasks can continue to executed) until either a network buffer
becomes available or the send block time expires. If the send block time expires
then the send operation is aborted. The maximum allowable send block time is
capped to the value set by ipconfigMAX_SEND_BLOCK_TIME_TICKS. Capping the
maximum allowable send block time prevents prevents a deadlock occurring when
all the network buffers are in use and the tasks that process (and subsequently
free) the network buffers are themselves blocked waiting for a network buffer.
ipconfigMAX_SEND_BLOCK_TIME_TICKS is specified in RTOS ticks. A time in
milliseconds can be converted to a time in ticks by dividing the time in
milliseconds by portTICK_RATE_MS. */
#define ipconfigMAX_SEND_BLOCK_TIME_TICKS ( 20 / portTICK_RATE_MS )
/* If ipconfigUSE_DHCP is 1 then FreeRTOS+UDP will attempt to retrieve an IP
address, netmask, DNS server address and gateway address from a DHCP server. If
ipconfigUSE_DHCP is 0 then FreeRTOS+UDP will use a static IP address. The
stack will revert to using the static IP address even when ipconfigUSE_DHCP is
set to 1 if a valid configuration cannot be obtained from a DHCP server for any
reason. The static configuration used is that passed into the stack by the
FreeRTOS_IPInit() function call. */
#define ipconfigUSE_DHCP 1
/* When ipconfigUSE_DHCP is set to 1, DHCP requests will be sent out at
increasing time intervals until either a reply is received from a DHCP server
and accepted, or the interval between transmissions reaches
ipconfigMAXIMUM_DISCOVER_TX_PERIOD. The IP stack will revert to using the
static IP address passed as a parameter to FreeRTOS_IPInit() if the
re-transmission time interval reaches ipconfigMAXIMUM_DISCOVER_TX_PERIOD without
a DHCP reply being received. */
#ifdef _WINDOWS_
/* The windows simulated time is not real time so the max delay is much
shorter. */
#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD ( 999 / portTICK_RATE_MS )
#else
#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD ( 120000 / portTICK_RATE_MS )
#endif /* _WINDOWS_ */
/* The ARP cache is a table that maps IP addresses to MAC addresses. The IP
stack can only send a UDP message to a remove IP address if it knowns the MAC
address associated with the IP address, or the MAC address of the router used to
contact the remote IP address. When a UDP message is received from a remote IP
address the MAC address and IP address are added to the ARP cache. When a UDP
message is sent to a remote IP address that does not already appear in the ARP
cache then the UDP message is replaced by a ARP message that solicits the
required MAC address information. ipconfigARP_CACHE_ENTRIES defines the maximum
number of entries that can exist in the ARP table at any one time. */
#define ipconfigARP_CACHE_ENTRIES 6
/* ARP requests that do not result in an ARP response will be re-transmitted a
maximum of ipconfigMAX_ARP_RETRANSMISSIONS times before the ARP request is
aborted. */
#define ipconfigMAX_ARP_RETRANSMISSIONS ( 5 )
/* ipconfigMAX_ARP_AGE defines the maximum time between an entry in the ARP
table being created or refreshed and the entry being removed because it is stale.
New ARP requests are sent for ARP cache entries that are nearing their maximum
age. ipconfigMAX_ARP_AGE is specified in tens of seconds, so a value of 150 is
equal to 1500 seconds (or 25 minutes). */
#define ipconfigMAX_ARP_AGE 150
/* Implementing FreeRTOS_inet_addr() necessitates the use of string handling
routines, which are relatively large. To save code space the full
FreeRTOS_inet_addr() implementation is made optional, and a smaller and faster
alternative called FreeRTOS_inet_addr_quick() is provided. FreeRTOS_inet_addr()
takes an IP in decimal dot format (for example, "192.168.0.1") as its parameter.
FreeRTOS_inet_addr_quick() takes an IP address as four separate numerical octets
(for example, 192, 168, 0, 1) as its parameters. If
ipconfigINCLUDE_FULL_INET_ADDR is set to 1 then both FreeRTOS_inet_addr() and
FreeRTOS_indet_addr_quick() are available. If ipconfigINCLUDE_FULL_INET_ADDR is
not set to 1 then only FreeRTOS_indet_addr_quick() is available. */
#define ipconfigINCLUDE_FULL_INET_ADDR 1
/* ipconfigNUM_NETWORK_BUFFERS defines the total number of network buffer that
are available to the IP stack. The total number of network buffers is limited
to ensure the total amount of RAM that can be consumed by the IP stack is capped
to a pre-determinable value. */
#define ipconfigNUM_NETWORK_BUFFERS 10
/* A FreeRTOS queue is used to send events from application tasks to the IP
stack. ipconfigEVENT_QUEUE_LENGTH sets the maximum number of events that can
be queued for processing at any one time. The event queue must be a minimum of
5 greater than the total number of network buffers. */
#define ipconfigEVENT_QUEUE_LENGTH ( ipconfigNUM_NETWORK_BUFFERS + 5 )
/* The address of a socket is the combination of its IP address and its port
number. FreeRTOS_bind() is used to manually allocate a port number to a socket
(to 'bind' the socket to a port), but manual binding is not normally necessary
for client sockets (those sockets that initiate outgoing connections rather than
wait for incoming connections on a known port number). If
ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 1 then calling
FreeRTOS_sendto() on a socket that has not yet been bound will result in the IP
stack automatically binding the socket to a port number from the range
socketAUTO_PORT_ALLOCATION_START_NUMBER to 0xffff. If
ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 0 then calling FreeRTOS_sendto()
on a socket that has not yet been bound will result in the send operation being
aborted. */
#define ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND 1
/* Defines the Time To Live (TTL) values used in outgoing UDP packets. */
#define updconfigIP_TIME_TO_LIVE 128
/* If ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is set to 1 then UDP packets that
contain more data than will fit in a single network frame will be fragmented
across multiple IP packets. Also see the ipconfigNETWORK_MTU setting. If
ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must
be divisible by 8. Setting ipconfigCAN_FRAGMENT_OUTGOING_PACKETS to 1 will
increase both the code size and execution time. */
#define ipconfigCAN_FRAGMENT_OUTGOING_PACKETS 0
/* The MTU is the maximum number of bytes the payload of a network frame can
contain. For normal Ethernet V2 frames the maximum MTU is 1500. Setting a
lower value can save RAM, depending on the buffer management scheme used. If
ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must
be divisible by 8. */
#define ipconfigNETWORK_MTU 586
/* Set ipconfigUSE_DNS to 1 to include a basic DNS client/resolver. DNS is used
through the FreeRTOS_gethostbyname() API function. */
#define ipconfigUSE_DNS 1
/* If ipconfigREPLY_TO_INCOMING_PINGS is set to 1 then the IP stack will
generate replies to incoming ICMP echo (ping) requests. */
#define ipconfigREPLY_TO_INCOMING_PINGS 1
/* If ipconfigSUPPORT_OUTGOING_PINGS is set to 1 then the
FreeRTOS_SendPingRequest() API function is available. */
#define ipconfigSUPPORT_OUTGOING_PINGS 1
/* Used for stack testing only, and must be implemented in the network
interface. */
#define updconfigLOOPBACK_ETHERNET_PACKETS 0
/* If ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES is set to 1 then Ethernet frames
that are not in Ethernet II format will be dropped. This option is included for
potential future IP stack developments. */
#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES 1
/* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1 then it is the
responsibility of the Ethernet interface to filter out packets that are of no
interest. If the Ethernet interface does not implement this functionality, then
set ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES to 0 to have the IP stack
perform the filtering instead (it is much less efficient for the stack to do it
because the packet will already have been passed into the stack). If the
Ethernet driver does all the necessary filtering in hardware then software
filtering can be removed by using a value other than 1 or 0. */
#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES 2
/* The example IP trace macros are included here so the definitions are
available in all the FreeRTOS+UDP source files. */
#include "DemoIPTrace.h"
#endif /* FREERTOS_IP_CONFIG_H */

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@@ -1,137 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/* Simple LED IO functions. LED 0 is toggled by a timer every half second. */
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "timers.h"
/* Library includes. */
#include "lpc18xx_gpio.h"
#include "lpc18xx_scu.h"
#include "lpc18xx_cgu.h"
#define ledTOGGLE_RATE ( 500 / portTICK_RATE_MS )
#define ledLED0_PORT 1
#define ledLED0_BIT ( 1UL << 11UL )
#define ledLED1_PORT 2
#define ledLED1_BIT ( 1UL << 12UL )
/*
* Toggles an LED just to show the application is running.
*/
static void prvLEDToggleTimerCallback( xTimerHandle xTimer );
/*-----------------------------------------------------------*/
void vLEDsInitialise( void )
{
static xTimerHandle xLEDToggleTimer = NULL;
/* Set the LED pin-muxing and configure as output. */
scu_pinmux( 0x2 , 11, MD_PUP, FUNC0 );
scu_pinmux( 0x2 , 12, MD_PUP, FUNC0 );
GPIO_SetDir( ledLED0_PORT, ledLED0_BIT, 1 );
GPIO_SetDir( ledLED1_PORT, ledLED1_BIT, 1 );
/* Create the timer used to toggle LED0. */
xLEDToggleTimer = xTimerCreate( "LEDTmr", /* Just a text name to associate with the timer, useful for debugging, but not used by the kernel. */
ledTOGGLE_RATE, /* The period of the timer. */
pdTRUE, /* This timer will autoreload, so uxAutoReload is set to pdTRUE. */
NULL, /* The timer ID is not used, so can be set to NULL. */
prvLEDToggleTimerCallback ); /* The callback function executed each time the timer expires. */
/* Sanity check that the timer was actually created. */
configASSERT( xLEDToggleTimer );
/* Start the timer. If this is called before the scheduler is started then
the block time will automatically get changed to 0 (from portMAX_DELAY). */
xTimerStart( xLEDToggleTimer, portMAX_DELAY );
}
/*-----------------------------------------------------------*/
static void prvLEDToggleTimerCallback( xTimerHandle xTimer )
{
static uint8_t ucState = 0;
/* Remove compiler warnings. */
( void ) xTimer;
/* Just toggle an LED to show the program is running. */
if( ucState == 0 )
{
GPIO_SetValue( ledLED0_PORT, ledLED0_BIT );
}
else
{
GPIO_ClearValue( ledLED0_PORT, ledLED0_BIT );
}
ucState = !ucState;
}

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@@ -1,11 +0,0 @@
This demo is documented on the following web page:
http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/Embedded_Ethernet_Examples/RTOS_UDP_and_CLI_LPC1830_NGX.shtml
The FreeRTOS+UDP API is documented on the following web page:
http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/FreeRTOS_UDP_API_Functions.shtml
Other information, including a FreeRTOS+UDP primer, a description of the
directory structure, and a glossary of networking terminology, can be found in
the FreeRTOS+UDP portal:
http://www.FreeRTOS.org/udp

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@@ -1,136 +0,0 @@
/*
FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
/* Utility functions to implement run time stats on Cortex-M CPUs. The collected
run time data can be viewed through the CLI interface. See the following URL for
more information on run time stats:
http://www.freertos.org/rtos-run-time-stats.html */
/* Addresses of registers in the Cortex-M debug hardware. */
#define rtsDWT_CYCCNT ( *( ( unsigned long * ) 0xE0001004 ) )
#define rtsDWT_CONTROL ( *( ( unsigned long * ) 0xE0001000 ) )
#define rtsSCB_DEMCR ( *( ( unsigned long * ) 0xE000EDFC ) )
#define rtsTRCENA_BIT ( 0x01000000UL )
#define rtsCOUNTER_ENABLE_BIT ( 0x01UL )
/* Simple shift divide for scaling to avoid an overflow occurring too soon. The
number of bits to shift depends on the clock speed. */
#define runtimeSLOWER_CLOCK_SPEEDS ( 70000000UL )
#define runtimeSHIFT_13 13
#define runtimeOVERFLOW_BIT_13 ( 1UL << ( 32UL - runtimeSHIFT_13 ) )
#define runtimeSHIFT_14 14
#define runtimeOVERFLOW_BIT_14 ( 1UL << ( 32UL - runtimeSHIFT_14 ) )
/*-----------------------------------------------------------*/
void vMainConfigureTimerForRunTimeStats( void )
{
/* Enable TRCENA. */
rtsSCB_DEMCR = rtsSCB_DEMCR | rtsTRCENA_BIT;
/* Reset counter. */
rtsDWT_CYCCNT = 0;
/* Enable counter. */
rtsDWT_CONTROL = rtsDWT_CONTROL | rtsCOUNTER_ENABLE_BIT;
}
/*-----------------------------------------------------------*/
uint32_t ulMainGetRunTimeCounterValue( void )
{
static unsigned long ulLastCounterValue = 0UL, ulOverflows = 0;
unsigned long ulValueNow;
ulValueNow = rtsDWT_CYCCNT;
/* Has the value overflowed since it was last read. */
if( ulValueNow < ulLastCounterValue )
{
ulOverflows++;
}
ulLastCounterValue = ulValueNow;
/* Cannot use configCPU_CLOCK_HZ directly as it may itself not be a constant
but instead map to a variable that holds the clock speed. */
/* There is no prescale on the counter, so simulate in software. */
if( configCPU_CLOCK_HZ < runtimeSLOWER_CLOCK_SPEEDS )
{
ulValueNow >>= runtimeSHIFT_13;
ulValueNow += ( runtimeOVERFLOW_BIT_13 * ulOverflows );
}
else
{
ulValueNow >>= runtimeSHIFT_14;
ulValueNow += ( runtimeOVERFLOW_BIT_14 * ulOverflows );
}
return ulValueNow;
}
/*-----------------------------------------------------------*/

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@@ -1,44 +0,0 @@
CMSIS : Cortex Microcontroller Software Interface Standard
==========================================================
Introduction
~~~~~~~~~~~~
CMSIS defines for a Cortex-M Microcontroller System:
* A common way to access peripheral registers and a
common way to define exception vectors.
* The register names of the Core Peripherals and the
names of the Core Exception Vectors.
* An device independent interface for RTOS Kernels
including a debug channel.
By using CMSIS compliant software components, the user can
easier re-use template code. CMSIS is intended to enable the
combination of software components from multiple middleware
vendors.
This project contains appropriate files for this MCU family
taken from CMSIS. A full copy of the CMSIS files, together
with additional information on CMSIS can be found at:
http://www.onarm.com/
http://www.arm.com/
Documentation
~~~~~~~~~~~~~
The standard CMSIS documentation can be found within the
Code Red IDE help system, via:
Help -> Help Contents -> Code Red Product Documentation -> CMSIS
More information on the use of CMSIS within the Code Red IDE
can be found in the Support area of the Code Red website at
http://www.code-red-tech.com/
At the time of writing, the CMSIS FAQ can be found directly
at:
http://support.code-red-tech.com/CodeRedWiki/Support4CMSIS

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@@ -1,325 +0,0 @@
RELEASE CMSIS for REV A 20111209
1/ New LPC18xx.h header file. Changes GPIO structure.
2/ Addition of lpc18xx_emc.c and lpc18xx_emc.h to configure memory on Hitex board.
3/ Addition of spifi_rom_api.h, spifi_drv_M3.lib and SPIFI_ROM_support.doc SPIFI driver package
4/ Updated SPIFI programming driver for Keil MDK which uses the SPIFI lib
5/ New BOOTFAST example shows how to boot from external flash or QSPI and ramp to 180 MHz
RELEASE CMSIS for REV A 20111130
1./ lpc18xx_lcd.h LCD_CFG_type add member pcd, lpc18xx_lcd.c add init pcd in LCD_Init function
2./ protect MAX and MIN macro in lpc_types.h
3./ Add getPC function to ARM,GNU, IAR startup_lpc18xx.s
4./ Add VTOR init in SystemInit function
5./ Change All ADC examples to use ADC port 0
6./ These example: CortexM3_Mpu, Pwr_DeepPowerDown, Timer_FreqMeasure, SCT_SimpleMatch and all USBDEV_ROM examples Keil project was adjusted
7./ SDRAM example and LCD example was changed not to use uint64_t in NS2CLK function
8./ Nvic_VectorTableRelocation.c
removed:
#if __RAM_MODE__//Run in RAM mode
memcpy((void *)VTOR_OFFSET, (const void *)0x10000000, 256*4);
#else
memcpy((void *)VTOR_OFFSET, (const void *)0x1C000000, 256*4);
#endif
added:
memcpy((void *)VTOR_OFFSET, (const void *)(getPC()& 0xFF000000), 256*4);
9./ Pwr_PowerDown change method for testing this feature
RELEASE CMSIS for REV A 20111028
1./ Add GNU support
2./ Addition of new Keil flash drivers for eFlash and SPIFI
3./ Change of Keil projects to support eFlash and SPIFI operation
PRE-RELEASE CMSIS for REV A 20111011
1/ PowerDown Example IAR issue fixed
2/ Upgraded CMSIS to version 2.10
3/ Upgraded Core header to Rev A
4/ lpc18xx_can.h remove all bitrates from 8Mhz, add bitrates from 12Mhz
/** Bitrate: 100K */
#define CAN_BITRATE100K12MHZ 0x00004509
/** Bitrate: 125K */
#define CAN_BITRATE125K12MHZ 0x00004507
/** Bitrate: 250K */
#define CAN_BITRATE250K12MHZ 0x00004503
/** Bitrate: 500K */
#define CAN_BITRATE500K12MHZ 0x00004501
/** Bitrate: 1000K */
#define CAN_BITRATE1000K12MHZ 0x00004500
5./ lpc18xx_cgu.* add PLL audio clock, modify alloc connect table and CGU_Entity_ControlReg_Offset
6./ lpc18xx_evrt.h
add EVRT_SRC_SDIO
7./ lpc18xx_i2s.h separate LPC_I2S0 and LPC_I2S1
8./ lpc18xx_scu.h
redefine, add pin modes and add pin functions 4->7
9./ debug_frmwrk.c
changed pin mode for UART RXD0 and UART RXD1
10./ lpc_can.c replace LPC_CAN by LPC_CAN0
11./ lpc18xx_i2c.* replace i2c pin configurations
12./ lpc18xx_ssp.c down default clock speed to 100kHz
13./ Examples\CCAN\CCan_SimpleTxRx\CCan_SimpleTxRx.c change RD pin mode to enable input buffer
14./ Examples\EMAC\Emac_EasyWeb\emac.c
replace MII and RMII pin setting by source from CodeBundle
15./ Examples\EMC\Emc_Sdram\SDRAM_Init.c and Examples\EMC\Emc_NorFlash\SST39VF320.c
replace EMC pin setting to be compatible with Rev A
16./ Examples\I2S\I2s_Audio\I2s_Audio.c
replace I2S pin setting to be compatible with Rev A
replace I2S to I2S0
17./ Examples\LCD\Lcd_Demo\IS42S16400D.c
replace EMC pin setting to be compatible with Rev A
18./ Examples\SSP\All SSP examples: replace SSP pin setting to be compatible with Rev A
19./ Timer_Capture and Timer_FreqMeasure: replace Capture input pin setting to be compatible with Rev A
20./ Examples\UART\All UART examples: replace UART pin setting to be compatible with Rev A
21./ Examples\USBDEV\USB_*\usbhw.c
replace USB pin setting to be compatible with Rev A
correct clock in Init function
RELEASE: LPC1800CMSIS_20110829
1./ Add GNU Support
modify pasting in can.c to be compatible with GCC
RELEASE: LPC1800CMSIS_20110729
1./ IAR flash support is moved to Tools folder
2./ ADC.h fixed macro ADC_CR_BITACC
3./ I2S.h fixed comment
from #endif /* LPC17XX_SSP_H_ */
to #endif /* LPC18XX_I2S_H_ */
4./ ADC.c fix ADC_Init Clock by rounding clk div value
5./ i2s.c fixed some comment
6./ EMC Nor Flash renamed file flash programing function
7./ SDRAM can run at MAX EMC Speed
8./ Removed flash programing support for LHF00L28
RELEASE: LPC1800CMSIS_20110627
1./ Fix abstract
2./ Fix I2S FreqConfig mistake
3./ Add DFU Driver and App
RELEASE: LPC1800CMSIS_20110613
1./ Add DSP Document
2./ Speed Up External FLash Mode
3./ Add IAR Flash Support
4./ Fix GPDMA Flash transfer issue in IAR
5./ Set default taget is EXFLASH(Keil only)
************************************************************************************************************************************************
RELEASE: LPC1800CMSIS_20110603
1./ Add DSP_lib into Core folder
2./ Update core_cmFunc.h and core_cmInstr.h for solving conflict with IAR EWARM version 6.20 or later
3./ add IAR startup file and IAR support files in Core\DeviceSupport\NXP\LPC18xx
4./ Modify SystemInit function to support RAM mode
#if (__RAM_MODE__)
SCB->VTOR = 0x10000000;
#endif
5./ Modify CCU1 and CCU2 struct in LPC18xx.h
6./ Fix bug in uart_set_divisors function
7./ Change UART clock source from XTAL to PLL1 in uart driver
8./ Fix RTC bugs
9./ Modify lpc18xx_GPDMA.c to support IAR compiler
10./ Modify lpc18xx_cgu.c to support IAR compiler
11./ Update lpc_types.h to support IAR compiler
12./ Fix bugs in I2S driver
13./ Remove Warnings
14./ Change new header, add more comments
15./ Standalize example, project, output names
16./ Support IAR EWARM (RAM mode)
17./ SUpport Hitex Board as default
18./ Modify hardware configuration in abstract files
19./ Set default Target to RAM mode
************************************************************************************************************************************************
RELEASE: LPC1800CMSIS_20110514
1./ Change all Keil example projects from device Cortex M3 to LPC1850
2./ change all examples to support Hitex board only
3./ Verify all project option
4./ separated CGU and PWR into 2 independent drivers
************************************************************************************************************************************************
RELEASE: LPC1800CMSIS_20110421
1./ Add CAN driver:
Drivers/include/lpc18xx_can.h
Drivers/source/lpc18xx_can.c
2./ Add CAN example for simple Transceiver
Examples\C_CAN\simpleTxRx
3./ Add 4 USB Rom examples:
USB_DFU
USB_HID
USB_MassStorage
USB_Composite
4./ Enable _printf function
debug_frmwrk.h:
uncomment _printf function declaration
debug_frmwrk.c:
uncomment _printf function
************************************************************************************************************************************************
RELEASE: LPC1800CMSIS_20110401
1./ Change all Keil example proiects from device NXP LPC1768 to ARM Cortex-M3
2./ Fix bug in I2C driver (customer feedback)
Problem description:
I2C_MasterTransferData() is not able to
(1) Send,
(2) doing a repeated Start and
(3) starting to receive with one function call.
Problem is that the repeated start is not generated, but a retransmission of the
last word is startet.
Solve: change
I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
I2Cx->I2CONSET = I2C_I2CONSET_STA;
to
I2Cx->I2CONSET = I2C_I2CONSET_STA;
I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
in function I2C_Start ()
3./ lpc18xx_timer.c:
Function TIM_ClearIntPending():
Change TIMx->IR |= TIM_IR_CLR(IntFlag);
To TIMx->IR = TIM_IR_CLR(IntFlag);
Function TIM_ClearIntCapturePending():
Change TIMx->IR |= (1<<(4+IntFlag));
To TIMx->IR = (1<<(4+IntFlag));
Function TIM_GetCaptureValue():
Add return 0;
4./ EMC - Nor Flash: remove example build target for FLASH mode as it only can run in RAM mode.
5./ SCT: update Fizzim tool to version 1.1
6./ Tools:
Update Flash burning for LHF00L28 and SST39X320X
************************************************************************************************************************************************
RELEASE: LPC1800CMSIS_20110324
1./ Current support hardwares:
- NXP LPC1800 Evaluation board through definition 'BOARD_NXP_EA'
- Hitex LPC1800 Board through definition 'BOARD_HITEX_LPC1800'
Some examples can run on LPC1800 Evaluation board, some can run on Hitex board...Please refer to abstract.txt
2./ Addin new flash support under Tools/Flash/SST39X320X
3./ lpc18xx_evrt.c:
Change EVRTx->SET_EN |= (1<<(uint8_t)EVRT_Src);
To EVRTx->SET_EN = (1<<(uint8_t)EVRT_Src);
Purpose: prevent clearing other set bits as writing '0' has no effect
4./ Fix ATIMER_WIC example:
- Configure 32KHZ osc in lpc18xx_atimer.c
- Call the configuration function in atimer_wic.c
5./ Fix RTC_Alarm example:
- Configure 32KHZ osc in lpc18xx_rtc.c
- Update Rtc_Alarm.c
6./ Add in PWR_PowerDown example
7./ Add in PWR_DeepPowerDown example
8./ All example in PWR are modified to wait for '1' sent from PC's COM port to start
9./ Fix LCD Logic4.3 example to run on Hitex LPC1800 Board
10./ Add in GPDMA Flash_2_Ram_Test example
11./ EMC EXT_SDRAM example: join IS42S16400D.c and MT48LC4M32B2.c into SDRAM_Init.c
12./ lpc18xx_i2s.c: update I2S_FreqConfig() function
************************************************************************************************************************************************
RELEASE: LPC1800CMSIS_20110311
1./ This package is compliant to CMSIS 2.0
2./ Add in 'Tools' folder which contains neccessary material for building project, examples like flash burning,..
3./ Examples are given in Keil uVision 4 project
4./ Current support hardwares:
- NXP LPC1800 Evaluation board through definition 'BOARD_NXP_EA'
5./ Examples can run:
- RAM (debug) mode
- ROM (Flash, stand alone) mode
+ External Nor Flash. Flash Part supporting:
1) LHF00L28
6./ Each example folder has an 'abstract.txt' file, this is where user can start
7./ Below is list of drivers and examples:
- ADC (lpc18xx_adc):
+ ADC_Interrupt
+ ADC_Polling
+ ADC_Burst
+ ADC_Dma
- ATIMER (lpc18xx_atimer):
+ ATIMER_interrupt
- PWR (lpc18xx_clkpwr):
+ CLKPWR_Sleep
+ CLKPWR_DeepSleep
- DAC (lpc18xx_dac):
+ DAC_WaveGenerator
+ DAC_Dma
- EMAC (lpc18xx_emac):
+ EMAC_EasyWeb
- EMC (no driver):
+ EXT_SDRAM
+ NOR_FLASH
- GPDMA (lpc18xx_gpdma):
+ GPDMA_Ram2Ram
+ GPDMA_LinkList
- GPIO (lpc18xx_gpio):
+ GPIO_LedBlinky
- I2C (lpc18xx_i2c):
+ I2C_Master
- I2S (lpc18xx_i2s):
+ I2S_Audio
- LCD (lpc18xx_lcd)
- MCPWM (lpc18xx_mcpwm):
+ MCPWM_Simple
- SCU (lpc18xx_scu)
- QEI (lpc18xx_qei):
+ QEI_Velo
- RIT (lpc18xx_rit):
+ RIT_Interrupt
- RTC (lpc18xx_rtc):
+ RTC_Calib
+ RTC_Alarm
- SSP (lpc18xx_ssp):
+ SSP_SPI
+ SSP_Microwire
+ SSP_TI
- TIMER (lpc18xx_timer):
+ TIMER_Capture
+ TIMER_MatchInterrupt
+ TIMER_FreqMeasure
- UART (lpc18xx_uart):
+ UART_Autobaud
+ UART_Dma
+ UART_Interrupt
+ UART_Polling
+ UART_RS485
- SCT(LPC18xx_SCT):
+ SCT_Capture
+ SCT_Match
- WWDT (lpc18xx_wwdt):
+ WWDT_Interrupt
- CORTEXM3 (no driver):
+ CORTEXM3_BitBanding
+ CORTEXM3_MPU
+ CORTEXM3_PriviledgeMode
- USBDEV (no driver):
+ USBDEV_VirtualCOM
+ USBDEV_MassStorage
- NVIC (no driver):
+ NVIC_Priority
+ NVIC_VecRelocation
- EVRT (lpc18xx_evrt)

View File

@@ -1,9 +0,0 @@
NXP's documentation for their peripheral driver library can be found
as a Microsoft Compiled HTML Help file (.chm) within the LPC18xx
CMSIS Standard Peripheral Driver Library download on NXP's website.
At the time of writing, this can be found at the following link:
http://lpcware.com/file_filter/nxp?term_node_tid_depth=All&term_node_tid_depth_1=103

View File

@@ -1,609 +0,0 @@
/**************************************************************************//**
* @file core_cmFunc.h
* @brief CMSIS Cortex-M Core Function Access Header File
* @version V2.10
* @date 26. July 2011
*
* @note
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
/* ARM armcc specific functions */
#if (__ARMCC_VERSION < 400677)
#error "Please use ARM Compiler Toolchain V4.0.677 or later!"
#endif
/* intrinsic void __enable_irq(); */
/* intrinsic void __disable_irq(); */
/** \brief Get Control Register
This function returns the content of the Control Register.
\return Control Register value
*/
static __INLINE uint32_t __get_CONTROL(void)
{
register uint32_t __regControl __ASM("control");
return(__regControl);
}
/** \brief Set Control Register
This function writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
static __INLINE void __set_CONTROL(uint32_t control)
{
register uint32_t __regControl __ASM("control");
__regControl = control;
}
/** \brief Get ISPR Register
This function returns the content of the ISPR Register.
\return ISPR Register value
*/
static __INLINE uint32_t __get_IPSR(void)
{
register uint32_t __regIPSR __ASM("ipsr");
return(__regIPSR);
}
/** \brief Get APSR Register
This function returns the content of the APSR Register.
\return APSR Register value
*/
static __INLINE uint32_t __get_APSR(void)
{
register uint32_t __regAPSR __ASM("apsr");
return(__regAPSR);
}
/** \brief Get xPSR Register
This function returns the content of the xPSR Register.
\return xPSR Register value
*/
static __INLINE uint32_t __get_xPSR(void)
{
register uint32_t __regXPSR __ASM("xpsr");
return(__regXPSR);
}
/** \brief Get Process Stack Pointer
This function returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
static __INLINE uint32_t __get_PSP(void)
{
register uint32_t __regProcessStackPointer __ASM("psp");
return(__regProcessStackPointer);
}
/** \brief Set Process Stack Pointer
This function assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
static __INLINE void __set_PSP(uint32_t topOfProcStack)
{
register uint32_t __regProcessStackPointer __ASM("psp");
__regProcessStackPointer = topOfProcStack;
}
/** \brief Get Main Stack Pointer
This function returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
static __INLINE uint32_t __get_MSP(void)
{
register uint32_t __regMainStackPointer __ASM("msp");
return(__regMainStackPointer);
}
/** \brief Set Main Stack Pointer
This function assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
static __INLINE void __set_MSP(uint32_t topOfMainStack)
{
register uint32_t __regMainStackPointer __ASM("msp");
__regMainStackPointer = topOfMainStack;
}
/** \brief Get Priority Mask
This function returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
static __INLINE uint32_t __get_PRIMASK(void)
{
register uint32_t __regPriMask __ASM("primask");
return(__regPriMask);
}
/** \brief Set Priority Mask
This function assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
static __INLINE void __set_PRIMASK(uint32_t priMask)
{
register uint32_t __regPriMask __ASM("primask");
__regPriMask = (priMask);
}
#if (__CORTEX_M >= 0x03)
/** \brief Enable FIQ
This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq
/** \brief Disable FIQ
This function disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq
/** \brief Get Base Priority
This function returns the current value of the Base Priority register.
\return Base Priority register value
*/
static __INLINE uint32_t __get_BASEPRI(void)
{
register uint32_t __regBasePri __ASM("basepri");
return(__regBasePri);
}
/** \brief Set Base Priority
This function assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
static __INLINE void __set_BASEPRI(uint32_t basePri)
{
register uint32_t __regBasePri __ASM("basepri");
__regBasePri = (basePri & 0xff);
}
/** \brief Get Fault Mask
This function returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
static __INLINE uint32_t __get_FAULTMASK(void)
{
register uint32_t __regFaultMask __ASM("faultmask");
return(__regFaultMask);
}
/** \brief Set Fault Mask
This function assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
static __INLINE void __set_FAULTMASK(uint32_t faultMask)
{
register uint32_t __regFaultMask __ASM("faultmask");
__regFaultMask = (faultMask & (uint32_t)1);
}
#endif /* (__CORTEX_M >= 0x03) */
#if (__CORTEX_M == 0x04)
/** \brief Get FPSCR
This function returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
static __INLINE uint32_t __get_FPSCR(void)
{
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
register uint32_t __regfpscr __ASM("fpscr");
return(__regfpscr);
#else
return(0);
#endif
}
/** \brief Set FPSCR
This function assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
static __INLINE void __set_FPSCR(uint32_t fpscr)
{
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
register uint32_t __regfpscr __ASM("fpscr");
__regfpscr = (fpscr);
#endif
}
#endif /* (__CORTEX_M == 0x04) */
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#include <cmsis_iar.h>
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */
/** \brief Enable IRQ Interrupts
This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __enable_irq(void)
{
__ASM volatile ("cpsie i");
}
/** \brief Disable IRQ Interrupts
This function disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i");
}
/** \brief Get Control Register
This function returns the content of the Control Register.
\return Control Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_CONTROL(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
}
/** \brief Set Control Register
This function writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) );
}
/** \brief Get ISPR Register
This function returns the content of the ISPR Register.
\return ISPR Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_IPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
return(result);
}
/** \brief Get APSR Register
This function returns the content of the APSR Register.
\return APSR Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_APSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, apsr" : "=r" (result) );
return(result);
}
/** \brief Get xPSR Register
This function returns the content of the xPSR Register.
\return xPSR Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_xPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
return(result);
}
/** \brief Get Process Stack Pointer
This function returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void)
{
register uint32_t result;
__ASM volatile ("MRS %0, psp\n" : "=r" (result) );
return(result);
}
/** \brief Set Process Stack Pointer
This function assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
}
/** \brief Get Main Stack Pointer
This function returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void)
{
register uint32_t result;
__ASM volatile ("MRS %0, msp\n" : "=r" (result) );
return(result);
}
/** \brief Set Main Stack Pointer
This function assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
}
/** \brief Get Priority Mask
This function returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PRIMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return(result);
}
/** \brief Set Priority Mask
This function assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
}
#if (__CORTEX_M >= 0x03)
/** \brief Enable FIQ
This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __enable_fault_irq(void)
{
__ASM volatile ("cpsie f");
}
/** \brief Disable FIQ
This function disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void)
{
__ASM volatile ("cpsid f");
}
/** \brief Get Base Priority
This function returns the current value of the Base Priority register.
\return Base Priority register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
return(result);
}
/** \brief Set Base Priority
This function assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t value)
{
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
}
/** \brief Get Fault Mask
This function returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
}
/** \brief Set Fault Mask
This function assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
}
#endif /* (__CORTEX_M >= 0x03) */
#if (__CORTEX_M == 0x04)
/** \brief Get FPSCR
This function returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FPSCR(void)
{
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
uint32_t result;
__ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
return(result);
#else
return(0);
#endif
}
/** \brief Set FPSCR
This function assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
__attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fpscr)
{
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
#endif
}
#endif /* (__CORTEX_M == 0x04) */
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
/* TASKING carm specific functions */
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all instrinsics,
* Including the CMSIS ones.
*/
#endif
/*@} end of CMSIS_Core_RegAccFunctions */
#endif /* __CORE_CMFUNC_H */

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@@ -1,585 +0,0 @@
/**************************************************************************//**
* @file core_cmInstr.h
* @brief CMSIS Cortex-M Core Instruction Access Header File
* @version V2.10
* @date 19. July 2011
*
* @note
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
/* ARM armcc specific functions */
#if (__ARMCC_VERSION < 400677)
#error "Please use ARM Compiler Toolchain V4.0.677 or later!"
#endif
/** \brief No Operation
No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __nop
/** \brief Wait For Interrupt
Wait For Interrupt is a hint instruction that suspends execution
until one of a number of events occurs.
*/
#define __WFI __wfi
/** \brief Wait For Event
Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __wfe
/** \brief Send Event
Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __sev
/** \brief Instruction Synchronization Barrier
Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or
memory, after the instruction has been completed.
*/
#define __ISB() __isb(0xF)
/** \brief Data Synchronization Barrier
This function acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() __dsb(0xF)
/** \brief Data Memory Barrier
This function ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() __dmb(0xF)
/** \brief Reverse byte order (32 bit)
This function reverses the byte order in integer value.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV __rev
/** \brief Reverse byte order (16 bit)
This function reverses the byte order in two unsigned short values.
\param [in] value Value to reverse
\return Reversed value
*/
static __INLINE __ASM uint32_t __REV16(uint32_t value)
{
rev16 r0, r0
bx lr
}
/** \brief Reverse byte order in signed short value
This function reverses the byte order in a signed short value with sign extension to integer.
\param [in] value Value to reverse
\return Reversed value
*/
static __INLINE __ASM int32_t __REVSH(int32_t value)
{
revsh r0, r0
bx lr
}
#if (__CORTEX_M >= 0x03)
/** \brief Reverse bit order of value
This function reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#define __RBIT __rbit
/** \brief LDR Exclusive (8 bit)
This function performs a exclusive LDR command for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
/** \brief LDR Exclusive (16 bit)
This function performs a exclusive LDR command for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
/** \brief LDR Exclusive (32 bit)
This function performs a exclusive LDR command for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
/** \brief STR Exclusive (8 bit)
This function performs a exclusive STR command for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXB(value, ptr) __strex(value, ptr)
/** \brief STR Exclusive (16 bit)
This function performs a exclusive STR command for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXH(value, ptr) __strex(value, ptr)
/** \brief STR Exclusive (32 bit)
This function performs a exclusive STR command for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#define __STREXW(value, ptr) __strex(value, ptr)
/** \brief Remove the exclusive lock
This function removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __clrex
/** \brief Signed Saturate
This function saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __ssat
/** \brief Unsigned Saturate
This function saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __usat
/** \brief Count leading zeros
This function counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
#define __CLZ __clz
#endif /* (__CORTEX_M >= 0x03) */
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#include <cmsis_iar.h>
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */
/** \brief No Operation
No Operation does nothing. This instruction can be used for code alignment purposes.
*/
__attribute__( ( always_inline ) ) static __INLINE void __NOP(void)
{
__ASM volatile ("nop");
}
/** \brief Wait For Interrupt
Wait For Interrupt is a hint instruction that suspends execution
until one of a number of events occurs.
*/
__attribute__( ( always_inline ) ) static __INLINE void __WFI(void)
{
__ASM volatile ("wfi");
}
/** \brief Wait For Event
Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
__attribute__( ( always_inline ) ) static __INLINE void __WFE(void)
{
__ASM volatile ("wfe");
}
/** \brief Send Event
Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
__attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
{
__ASM volatile ("sev");
}
/** \brief Instruction Synchronization Barrier
Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or
memory, after the instruction has been completed.
*/
__attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
{
__ASM volatile ("isb");
}
/** \brief Data Synchronization Barrier
This function acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
__attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
{
__ASM volatile ("dsb");
}
/** \brief Data Memory Barrier
This function ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
__attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
{
__ASM volatile ("dmb");
}
/** \brief Reverse byte order (32 bit)
This function reverses the byte order in integer value.
\param [in] value Value to reverse
\return Reversed value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value)
{
uint32_t result;
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/** \brief Reverse byte order (16 bit)
This function reverses the byte order in two unsigned short values.
\param [in] value Value to reverse
\return Reversed value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value)
{
uint32_t result;
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/** \brief Reverse byte order in signed short value
This function reverses the byte order in a signed short value with sign extension to integer.
\param [in] value Value to reverse
\return Reversed value
*/
__attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value)
{
uint32_t result;
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
#if (__CORTEX_M >= 0x03)
/** \brief Reverse bit order of value
This function reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/** \brief LDR Exclusive (8 bit)
This function performs a exclusive LDR command for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
__attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr)
{
uint8_t result;
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/** \brief LDR Exclusive (16 bit)
This function performs a exclusive LDR command for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
__attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr)
{
uint16_t result;
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/** \brief LDR Exclusive (32 bit)
This function performs a exclusive LDR command for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/** \brief STR Exclusive (8 bit)
This function performs a exclusive STR command for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
{
uint32_t result;
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
/** \brief STR Exclusive (16 bit)
This function performs a exclusive STR command for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
{
uint32_t result;
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
/** \brief STR Exclusive (32 bit)
This function performs a exclusive STR command for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
/** \brief Remove the exclusive lock
This function removes the exclusive lock which is created by LDREX.
*/
__attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
{
__ASM volatile ("clrex");
}
/** \brief Signed Saturate
This function saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT(ARG1,ARG2) \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
/** \brief Unsigned Saturate
This function saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT(ARG1,ARG2) \
({ \
uint32_t __RES, __ARG1 = (ARG1); \
__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
__RES; \
})
/** \brief Count leading zeros
This function counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
__attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
{
uint8_t result;
__ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
#endif /* (__CORTEX_M >= 0x03) */
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
/* TASKING carm specific functions */
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
#endif
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
#endif /* __CORE_CMINSTR_H */

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@@ -1,90 +0,0 @@
/**********************************************************************
* $Id$ debug_frmwrk.h 2011-06-02
*//**
* @file debug_frmwrk.h
* @brief Contains some utilities that used for debugging through UART
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup DEBUG_FRMWRK DEBUG FRAMEWORK
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef DEBUG_FRMWRK_H_
#define DEBUG_FRMWRK_H_
/* Includes ------------------------------------------------------------------- */
#include "lpc18xx_uart.h"
#define VCOM_DEBUG_MESSEGES
//#define UART_DEBUG_MESSEGES
#define USED_UART_DEBUG_PORT 1
#if (USED_UART_DEBUG_PORT==0)
#define DEBUG_UART_PORT LPC_UART0
#elif (USED_UART_DEBUG_PORT==1)
#define DEBUG_UART_PORT LPC_UART1
#endif
#define _DBG(x) _db_msg((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DBG_(x) _db_msg_((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DBC(x) _db_char((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DBD(x) _db_dec((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DBD16(x) _db_dec_16((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DBD32(x) _db_dec_32((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DBH(x) _db_hex((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DBH16(x) _db_hex_16((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DBH32(x) _db_hex_32((LPC_USARTn_Type*)DEBUG_UART_PORT, x)
#define _DG _db_get_char((LPC_USARTn_Type*)DEBUG_UART_PORT)
void lpc_printf (const char *format, ...);
extern void (*_db_msg)(LPC_USARTn_Type *UARTx, const void *s);
extern void (*_db_msg_)(LPC_USARTn_Type *UARTx, const void *s);
extern void (*_db_char)(LPC_USARTn_Type *UARTx, uint8_t ch);
extern void (*_db_dec)(LPC_USARTn_Type *UARTx, uint8_t decn);
extern void (*_db_dec_16)(LPC_USARTn_Type *UARTx, uint16_t decn);
extern void (*_db_dec_32)(LPC_USARTn_Type *UARTx, uint32_t decn);
extern void (*_db_hex)(LPC_USARTn_Type *UARTx, uint8_t hexn);
extern void (*_db_hex_16)(LPC_USARTn_Type *UARTx, uint16_t hexn);
extern void (*_db_hex_32)(LPC_USARTn_Type *UARTx, uint32_t hexn);
extern uint8_t (*_db_get_char)(LPC_USARTn_Type *UARTx);
void UARTPutChar (LPC_USARTn_Type *UARTx, uint8_t ch);
void UARTPuts(LPC_USARTn_Type *UARTx, const void *str);
void UARTPuts_(LPC_USARTn_Type *UARTx, const void *str);
void UARTPutDec(LPC_USARTn_Type *UARTx, uint8_t decnum);
void UARTPutDec16(LPC_USARTn_Type *UARTx, uint16_t decnum);
void UARTPutDec32(LPC_USARTn_Type *UARTx, uint32_t decnum);
void UARTPutHex (LPC_USARTn_Type *UARTx, uint8_t hexnum);
void UARTPutHex16 (LPC_USARTn_Type *UARTx, uint16_t hexnum);
void UARTPutHex32 (LPC_USARTn_Type *UARTx, uint32_t hexnum);
uint8_t UARTGetChar (LPC_USARTn_Type *UARTx);
void debug_frmwrk_init(void);
#endif /* DEBUG_FRMWRK_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,295 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_adc.h 2011-06-02
*//**
* @file lpc18xx_adc.h
* @brief Contains all macro definitions and function prototypes
* support for ADC firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup ADC ADC (Analog to Digital Converter)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_ADC_H_
#define LPC18XX_ADC_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private macros ------------------------------------------------------------- */
/** @defgroup ADC_Private_Macros ADC Private Macros
* @{
*/
/* -------------------------- BIT DEFINITIONS ----------------------------------- */
/*********************************************************************//**
* Macro defines for ADC control register
**********************************************************************/
/** Selects which of the AD0.0:7 pins is (are) to be sampled and converted */
#define ADC_CR_CH_SEL(n) ((1UL << n))
/** The APB clock (PCLK) is divided by (this value plus one)
* to produce the clock for the A/D */
#define ADC_CR_CLKDIV(n) ((n<<8))
/** Repeated conversions A/D enable bit */
#define ADC_CR_BURST ((1UL<<16))
/** number of accuracy bits */
#define ADC_CR_BITACC(n) (((n)<<17))
/** ADC convert in power down mode */
#define ADC_CR_PDN ((1UL<<21))
/** Start mask bits */
#define ADC_CR_START_MASK ((7UL<<24))
/** Select Start Mode */
#define ADC_CR_START_MODE_SEL(SEL) ((SEL<<24))
/** Start conversion now */
#define ADC_CR_START_NOW ((1UL<<24))
/** Start conversion when the edge selected by bit 27 occurs on CTOUT_15 */
#define ADC_CR_START_CTOUT15 ((2UL<<24))
/** Start conversion when the edge selected by bit 27 occurs on CTOUT_8 */
#define ADC_CR_START_CTOUT8 ((3UL<<24))
/** Start conversion when the edge selected by bit 27 occurs on ADCTRIG0 */
#define ADC_CR_START_ADCTRIG0 ((4UL<<24))
/** Start conversion when the edge selected by bit 27 occurs on ADCTRIG1 */
#define ADC_CR_START_ADCTRIG1 ((5UL<<24))
/** Start conversion when the edge selected by bit 27 occurs on Motocon PWM output MCOA2 */
#define ADC_CR_START_MCOA2 ((6UL<<24))
/** Start conversion on a falling edge on the selected CAP/MAT signal */
#define ADC_CR_EDGE ((1UL<<27))
/*********************************************************************//**
* Macro defines for ADC Global Data register
**********************************************************************/
/** When DONE is 1, this field contains result value of ADC conversion */
#define ADC_GDR_RESULT(n) (((n>>4)&0xFFF))
/** These bits contain the channel from which the LS bits were converted */
#define ADC_GDR_CH(n) (((n>>24)&0x7))
/** This bit is 1 in burst mode if the results of one or
* more conversions was (were) lost */
#define ADC_GDR_OVERRUN_FLAG ((1UL<<30))
/** This bit is set to 1 when an A/D conversion completes */
#define ADC_GDR_DONE_FLAG ((1UL<<31))
/** This bits is used to mask for Channel */
#define ADC_GDR_CH_MASK ((7UL<<24))
/*********************************************************************//**
* Macro defines for ADC Interrupt register
**********************************************************************/
/** These bits allow control over which A/D channels generate
* interrupts for conversion completion */
#define ADC_INTEN_CH(n) ((1UL<<n))
/** When 1, enables the global DONE flag in ADDR to generate an interrupt */
#define ADC_INTEN_GLOBAL ((1UL<<8))
/*********************************************************************//**
* Macro defines for ADC Data register
**********************************************************************/
/** When DONE is 1, this field contains result value of ADC conversion */
#define ADC_DR_RESULT(n) (((n>>6)&0x3FF))
/** These bits mirror the OVERRRUN status flags that appear in the
* result register for each A/D channel */
#define ADC_DR_OVERRUN_FLAG ((1UL<<30))
/** This bit is set to 1 when an A/D conversion completes. It is cleared
* when this register is read */
#define ADC_DR_DONE_FLAG ((1UL<<31))
/*********************************************************************//**
* Macro defines for ADC Status register
**********************************************************************/
/** These bits mirror the DONE status flags that appear in the result
* register for each A/D channel */
#define ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF))
/** These bits mirror the OVERRRUN status flags that appear in the
* result register for each A/D channel */
#define ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF))
/** This bit is the A/D interrupt flag */
#define ADC_STAT_INT_FLAG ((1UL<<16))
/*********************************************************************//**
* Macro defines for ADC Trim register
**********************************************************************/
/** Offset trim bits for ADC operation */
#define ADC_ADCOFFS(n) (((n&0xF)<<4))
/** Written to boot code*/
#define ADC_TRIM(n) (((n&0xF)<<8))
/* ------------------- CHECK PARAM DEFINITIONS ------------------------- */
/** Check ADC parameter */
#define PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC0) || ((uint32_t *)n)==((uint32_t *)LPC_ADC1))
/** Check ADC state parameter */
#define PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
/** Check ADC state parameter */
#define PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
/** Check ADC rate parameter */
#define PARAM_ADC_RATE(rate) ((rate>0)&&(rate<=200000))
/** Check ADC bits accuracy parameter */
#define PARAM_ADC_BITSACC(x) ((x>=3)&&(x<=10))
/** Check ADC channel selection parameter */
#define PARAM_ADC_CHANNEL_SELECTION(SEL) ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\
||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\
||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\
||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7))
/** Check ADC start option parameter */
#define PARAM_ADC_START_OPT(OPT) ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\
||(OPT == ADC_START_ON_CTOUT15)||(OPT == ADC_START_ON_CTOUT8)\
||(OPT == ADC_START_ON_ADCTRIG0)||(OPT == ADC_START_ON_ADCTRIG1)\
||(OPT == ADC_START_ON_MCOA2))
/** Check ADC interrupt type parameter */
#define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
||(OPT == ADC_ADGINTEN))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup ADC_Public_Types ADC Public Types
* @{
*/
/*********************************************************************//**
* @brief ADC enumeration
**********************************************************************/
/** @brief Channel Selection */
typedef enum
{
ADC_CHANNEL_0 = 0, /*!< Channel 0 */
ADC_CHANNEL_1, /*!< Channel 1 */
ADC_CHANNEL_2, /*!< Channel 2 */
ADC_CHANNEL_3, /*!< Channel 3 */
ADC_CHANNEL_4, /*!< Channel 4 */
ADC_CHANNEL_5, /*!< Channel 5 */
ADC_CHANNEL_6, /*!< Channel 6 */
ADC_CHANNEL_7 /*!< Channel 7 */
}ADC_CHANNEL_SELECTION;
/** @brief Type of start option */
typedef enum
{
ADC_START_CONTINUOUS =0, /*!< Continuous mode */
ADC_START_NOW, /*!< Start conversion now */
ADC_START_ON_CTOUT15, /*!< Start conversion when the edge selected
* by bit 27 occurs on CTOUT_15 */
ADC_START_ON_CTOUT8, /*!< Start conversion when the edge selected
* by bit 27 occurs on CTOUT_8 */
ADC_START_ON_ADCTRIG0, /*!< Start conversion when the edge selected
* by bit 27 occurs on ADCTRIG0 */
ADC_START_ON_ADCTRIG1, /*!< Start conversion when the edge selected
* by bit 27 occurs on ADCTRIG1 */
ADC_START_ON_MCOA2 /*!< Start conversion when the edge selected
* by bit 27 occurs on Motocon PWM output MCOA2 */
} ADC_START_OPT;
/** @brief Type of edge when start conversion on the selected CAP/MAT signal */
typedef enum
{
ADC_START_ON_RISING = 0, /*!< Start conversion on a rising edge
*on the selected CAP/MAT signal */
ADC_START_ON_FALLING /*!< Start conversion on a falling edge
*on the selected CAP/MAT signal */
} ADC_START_ON_EDGE_OPT;
/** @brief* ADC type interrupt enum */
typedef enum
{
ADC_ADINTEN0 = 0, /*!< Interrupt channel 0 */
ADC_ADINTEN1, /*!< Interrupt channel 1 */
ADC_ADINTEN2, /*!< Interrupt channel 2 */
ADC_ADINTEN3, /*!< Interrupt channel 3 */
ADC_ADINTEN4, /*!< Interrupt channel 4 */
ADC_ADINTEN5, /*!< Interrupt channel 5 */
ADC_ADINTEN6, /*!< Interrupt channel 6 */
ADC_ADINTEN7, /*!< Interrupt channel 7 */
ADC_ADGINTEN /*!< Individual channel/global flag done generate an interrupt */
}ADC_TYPE_INT_OPT;
/** @brief ADC Data status */
typedef enum
{
ADC_DATA_BURST = 0, /*Burst bit*/
ADC_DATA_DONE /*Done bit*/
}ADC_DATA_STATUS;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup ADC_Public_Functions ADC Public Functions
* @{
*/
/* Init/DeInit ADC peripheral ----------------*/
void ADC_Init(LPC_ADCn_Type *ADCx, uint32_t rate, uint8_t bits_accuracy);
void ADC_DeInit(LPC_ADCn_Type *ADCx);
/* Enable/Disable ADC functions --------------*/
void ADC_BurstCmd(LPC_ADCn_Type *ADCx, FunctionalState NewState);
void ADC_PowerdownCmd(LPC_ADCn_Type *ADCx, FunctionalState NewState);
void ADC_StartCmd(LPC_ADCn_Type *ADCx, uint8_t start_mode);
void ADC_ChannelCmd (LPC_ADCn_Type *ADCx, uint8_t Channel, FunctionalState NewState);
/* Configure ADC functions -------------------*/
void ADC_EdgeStartConfig(LPC_ADCn_Type *ADCx, uint8_t EdgeOption);
void ADC_IntConfig (LPC_ADCn_Type *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState);
/* Get ADC information functions -------------------*/
uint16_t ADC_ChannelGetData(LPC_ADCn_Type *ADCx, uint8_t channel);
FlagStatus ADC_ChannelGetStatus(LPC_ADCn_Type *ADCx, uint8_t channel, uint32_t StatusType);
uint32_t ADC_GlobalGetData(LPC_ADCn_Type *ADCx);
FlagStatus ADC_GlobalGetStatus(LPC_ADCn_Type *ADCx, uint32_t StatusType);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_ADC_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,93 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_atimer.h 2011-06-02
*//**
* @file lpc18xx_atimer.h
* @brief Contains all functions support for Alarm Timer firmware
* library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup ATIMER ATIMER (Alarm Timer)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef __LPC18XX_ATIMER_H_
#define __LPC18XX_ATIMER_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros ------------------------------------------------------------- */
/** @defgroup ATIMER_Private_Macros ALARM Timer Private Macros
* @{
*/
/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
/** Macro to determine if it is valid ALARM TIMER peripheral */
#define PARAM_ATIMERx(n) (((uint32_t *)n)==((uint32_t *)LPC_ATIMER))
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup ATIMER_Public_Functions ATIMER Public Functions
* @{
*/
/* Init/DeInit ATIMER functions -----------*/
void ATIMER_Init(LPC_ATIMER_Type *ATIMERx, uint32_t PresetValue);
void ATIMER_DeInit(LPC_ATIMER_Type *ATIMERx);
/* ATIMER interrupt functions -------------*/
void ATIMER_IntEnable(LPC_ATIMER_Type *ATIMERx);
void ATIMER_IntDisable(LPC_ATIMER_Type *ATIMERx);
void ATIMER_ClearIntStatus(LPC_ATIMER_Type *ATIMERx);
void ATIMER_SetIntStatus(LPC_ATIMER_Type *ATIMERx);
/* ATIMER configuration functions --------*/
void ATIMER_UpdatePresetValue(LPC_ATIMER_Type *ATIMERx,uint32_t PresetValue);
uint32_t ATIMER_GetPresetValue(LPC_ATIMER_Type *ATIMERx);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __LPC18XX_ATIMER_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,241 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_can.h 2011-06-02
*//**
* @file lpc18xx_can.h
* @brief Contains all macro definitions and function prototypes
* support for CAN firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup C_CAN C_CAN (Controller Area Network)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef __LPC18XX_CAN_H
#define __LPC18XX_CAN_H
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Macros -------------------------------------------------------------- */
/** @defgroup C_CAN_Public_Macros C_CAN Public Macros
* @{
*/
/** In BASIC_MODE IF1 registers are used directly as TX buffer, IF2 registers are used as RX buffer.
* If not BASIC_MODE use message objects and IF registers to communicate with message buffers
*/
#define BASIC_MODE 0
/** In Silent Mode, the CAN controller is able to receive valid data frames and valid remote
* frames, but it sends only recessive bits on the CAN bus, and it cannot start a transmission
*/
#define SILENT_MODE 0
/** In Loop-back Mode, the CAN Core treats its own transmitted messages as received messages
* and stores them (if they pass acceptance filtering) into a Receive Buffer.
*/
#define LOOPBACK_MODE 0
/** Enables receiving remote frame requests */
#define REMOTE_ENABLE 1
/**
* @}
*/
/* Private Macros -------------------------------------------------------------- */
/** @defgroup C_CAN_Private_Macros C_CAN Private Macros
* @{
*/
/** MAX CAN message obj */
#define CAN_MSG_OBJ_MAX 0x0020
/** MAX data length */
#define CAN_DLC_MAX 8
/********************************************************************//**
* BRP+1 = Fpclk/(CANBitRate * QUANTAValue)
* QUANTAValue = 1 + (Tseg1+1) + (Tseg2+1)
* QUANTA value varies based on the Fpclk and sample point
* e.g. (1) sample point is 87.5%, Fpclk is 48Mhz
* the QUANTA should be 16
* (2) sample point is 90%, Fpclk is 12.5Mhz
* the QUANTA should be 10
* Fpclk = Fclk /APBDIV
* or
* BitRate = Fcclk/(APBDIV * (BRP+1) * ((Tseg1+1)+(Tseg2+1)+1))
*/
/*********************************************************************//**
* @brief CAN Bit Timing Values definitions at 8Mhz
**********************************************************************/
/** Bitrate: 100K */
#define CAN_BITRATE100K12MHZ 0x00004509
/** Bitrate: 125K */
#define CAN_BITRATE125K12MHZ 0x00004507
/** Bitrate: 250K */
#define CAN_BITRATE250K12MHZ 0x00004503
/** Bitrate: 500K */
#define CAN_BITRATE500K12MHZ 0x00004501
/** Bitrate: 1000K */
#define CAN_BITRATE1000K12MHZ 0x00004500
/*********************************************************************//**
* @brief CAN Bit Timing Values definitions at 16Mhz
**********************************************************************/
/** Bitrate: 100K */
#define CAN_BITRATE100K16MHZ 0x00005809
/** Bitrate: 125K */
#define CAN_BITRATE125K16MHZ 0x00005807
/** Bitrate: 250K */
#define CAN_BITRATE250K16MHZ 0x00005803
/** Bitrate: 500K */
#define CAN_BITRATE500K16MHZ 0x00005801
/*********************************************************************//**
* @brief CAN Bit Timing Values definitions at 24Mhz
**********************************************************************/
/** Bitrate: 100K */
#define CAN_BITRATE100K24MHZ 0x00007E09
/** Bitrate: 125K */
#define CAN_BITRATE125K24MHZ 0x0000450F
/** Bitrate: 250K */
#define CAN_BITRATE250K24MHZ 0x00004507
/** Bitrate: 500K */
#define CAN_BITRATE500K24MHZ 0x00004503
/** Bitrate: 1000K */
#define CAN_BITRATE1000K24MHZ 0x00004501
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup CAN_Public_Types CAN Public Types
* @{
*/
/*********************************************************************//**
* @brief CAN enumeration
**********************************************************************/
/**
* @brief CAN interface register type definition
*/
typedef enum CCAN_IFREG
{
CMDREQ = 0, /**< Command request */
CMDMSK = 1, /**< Command mask */
MSK1 = 2, /**< Mask 1 */
MSK2 = 3, /**< Mask 2 */
ARB1 = 4, /**< Arbitration 1 */
ARB2 = 5, /**< Arbitration 2 */
MCTRL = 6, /**< Message control */
DA1 = 7, /**< Data A1 */
DA2 = 8, /**< Data A2 */
DB1 = 9, /**< Data B1 */
DB2 = 10 /**< Data B2 */
}CCAN_IFREG_Type;
/**
* @brief CAN Clock division rate type definition
*/
typedef enum CCAN_CLKDIV
{
CLKDIV1 = 0,
CLKDIV2 = 1,
CLKDIV3 = 2,
CLKDIV5 = 3,
CLKDIV9 = 4,
CLKDIV17 = 5,
CLKDIV33 = 6,
CLKDIV65 = 7
}CCAN_CLKDIV_Type;
/********************************************************************//**
* @brief Data structure definition for a CAN message
**********************************************************************/
/**
* @brief CAN message object structure
*/
typedef struct
{
uint32_t id; /**< ID of message, if bit 30 is set then this is extended frame */
uint32_t dlc; /**< Message data length */
uint8_t data[8]; /**< Message data */
} message_object;
/**
* @brief CAN call-back function
*/
typedef void (*MSG_CB)(uint32_t msg_no);
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup CAN_Public_Functions CAN Public Functions
* @{
*/
void CAN_IRQHandler (void);
void CAN_Init( uint32_t BitClk, CCAN_CLKDIV_Type ClkDiv , MSG_CB Tx_cb, MSG_CB Rx_cb);
void CAN_ConfigureRxMessageObjects( void );
void CAN_RxInt_MessageProcess( uint8_t MsgObjNo );
void CAN_TxInt_MessageProcess( uint8_t MsgObjNo );
void CAN_Send(uint8_t msg_no, uint32_t *msg_ptr );
void CAN_Recv(uint8_t msg_no, uint32_t *msg_ptr, Bool RemoteEnable);
void CAN_ReadMsg(uint32_t msg_no, message_object* buff);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __LPC18XX_CAN_H */
/**
* @}
*/
/*****************************************************************************
** End Of File
******************************************************************************/

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@@ -1,271 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_cgu.h 2011-06-02
*//**
* @file llpc18xx_cgu.h
* @brief Contains all macro definitions and function prototypes
* support for Clock Generation and Clock Control firmware
* library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup CGU CGU (Clock Generation Unit)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_CGU_H_
#define LPC18XX_CGU_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros -------------------------------------------------------------- */
/** @defgroup CGU_Private_Macros CGU Private Macros
* @{
*/
/** Branch clocks from CGU_BASE_SAFE */
#define CGU_ENTITY_NONE CGU_ENTITY_NUM
/** Check bit at specific position is clear or not */
#define ISBITCLR(x,bit) ((x&(1<<bit))^(1<<bit))
/** Check bit at specific position is set or not */
#define ISBITSET(x,bit) (x&(1<<bit))
/** Set mask */
#define ISMASKSET(x,mask) (x&mask)
/** CGU number of clock source */
#define CGU_CLKSRC_NUM (CGU_CLKSRC_IDIVE+1)
/*********************************************************************//**
* Macro defines for CGU control mask bit definitions
**********************************************************************/
/** CGU control enable mask bit */
#define CGU_CTRL_EN_MASK 1
/** CGU control clock-source mask bit */
#define CGU_CTRL_SRC_MASK (0xF<<24)
/** CGU control auto block mask bit */
#define CGU_CTRL_AUTOBLOCK_MASK (1<<11)
/*********************************************************************//**
* Macro defines for CGU PLL1 mask bit definitions
**********************************************************************/
/** CGU PLL1 feedback select mask bit */
#define CGU_PLL1_FBSEL_MASK (1<<6)
/** CGU PLL1 Input clock bypass control mask bit */
#define CGU_PLL1_BYPASS_MASK (1<<1)
/** CGU PLL1 direct CCO output mask bit */
#define CGU_PLL1_DIRECT_MASK (1<<7)
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup CGU_Public_Types CGU Public Types
* @{
*/
/*********************************************************************//**
* @brief CGU enumeration
**********************************************************************/
/*
* @brief CGU clock source enumerate definition
*/
typedef enum {
/* Clock Source */
CGU_CLKSRC_32KHZ_OSC = 0, /**< 32KHz oscillator clock source */
CGU_CLKSRC_IRC, /**< IRC 12 Mhz clock source */
CGU_CLKSRC_ENET_RX_CLK, /**< Ethernet receive clock source */
CGU_CLKSRC_ENET_TX_CLK, /**< Ethernet transmit clock source */
CGU_CLKSRC_GP_CLKIN, /**< General purpose clock source */
CGU_CLKSRC_TCK, /**< TCK clock source */
CGU_CLKSRC_XTAL_OSC, /**< Crystal oscillator clock source*/
CGU_CLKSRC_PLL0, /**< PLL0 (USB0) clock source */
CGU_CLKSRC_PLL0_AUDIO,
CGU_CLKSRC_PLL1, /**< PLL1 clock source */
CGU_CLKSRC_IDIVA = CGU_CLKSRC_PLL1 + 3, /**< IDIVA clock source */
CGU_CLKSRC_IDIVB, /**< IDIVB clock source */
CGU_CLKSRC_IDIVC, /**< IDIVC clock source */
CGU_CLKSRC_IDIVD, /**< IDIVD clock source */
CGU_CLKSRC_IDIVE, /**< IDIVE clock source */
/* Base */
CGU_BASE_SAFE, /**< Base save clock (always on) for WDT */
CGU_BASE_USB0, /**< USB0 base clock */
CGU_BASE_USB1 = CGU_BASE_USB0 + 2, /**< USB1 base clock */
CGU_BASE_M3, /**< ARM Cortex-M3 Core base clock */
CGU_BASE_SPIFI, /**< SPIFI base clock */
//CGU_BASE_SPI,
CGU_BASE_PHY_RX = CGU_BASE_SPIFI + 2, /**< Ethernet PHY Rx base clock */
CGU_BASE_PHY_TX, /**< Ethernet PHY Tx base clock */
CGU_BASE_APB1, /**< APB peripheral block #1 base clock */
CGU_BASE_APB3, /**< APB peripheral block #3 base clock */
CGU_BASE_LCD, /**< LCD base clock */
CGU_BASE_ENET_CSR,
CGU_BASE_SDIO, /**< SDIO base clock */
CGU_BASE_SSP0, /**< SSP0 base clock */
CGU_BASE_SSP1, /**< SSP1 base clock */
CGU_BASE_UART0, /**< UART0 base clock */
CGU_BASE_UART1, /**< UART1 base clock */
CGU_BASE_UART2, /**< UART2 base clock */
CGU_BASE_UART3, /**< UART3 base clock */
CGU_BASE_CLKOUT, /**< CLKOUT base clock */
CGU_BASE_APLL = CGU_BASE_CLKOUT + 5,
CGU_BASE_OUT0,
CGU_BASE_OUT1,
CGU_ENTITY_NUM /**< Number or clock source entity */
} CGU_ENTITY_T;
/*
* @brief CGU PPL0 mode enumerate definition
*/
typedef enum {
CGU_PLL0_MODE_1d = 0,
CGU_PLL0_MODE_1c,
CGU_PLL0_MODE_1b,
CGU_PLL0_MODE_1a
}CGU_PLL0_MODE;
/*
* @brief CGU peripheral enumerate definition
*/
typedef enum {
CGU_PERIPHERAL_ADC0 = 0, /**< ADC0 */
CGU_PERIPHERAL_ADC1, /**< ADC1 */
CGU_PERIPHERAL_AES, /**< AES */
// CGU_PERIPHERAL_ALARMTIMER_CGU_RGU_RTC_WIC,
CGU_PERIPHERAL_APB1_BUS, /**< APB1 bus */
CGU_PERIPHERAL_APB3_BUS, /**< APB3 bus */
CGU_PERIPHERAL_CAN, /**< CAN */
CGU_PERIPHERAL_CREG, /**< CREG */
CGU_PERIPHERAL_DAC, /**< DAC */
CGU_PERIPHERAL_DMA, /**< DMA */
CGU_PERIPHERAL_EMC, /**< EMC */
CGU_PERIPHERAL_ETHERNET, /**< Ethernet */
CGU_PERIPHERAL_ETHERNET_TX, //HIDE /**< Ethernet transmit */
CGU_PERIPHERAL_GPIO, /**< GPIO */
CGU_PERIPHERAL_I2C0, /**< I2C0 */
CGU_PERIPHERAL_I2C1, /**< I2C1 */
CGU_PERIPHERAL_I2S, /**< I2S */
CGU_PERIPHERAL_LCD, /**< LCD */
CGU_PERIPHERAL_M3CORE, /**< ARM Cortex-M3 Core */
CGU_PERIPHERAL_M3_BUS, /**< ARM Cortex-M3 Bus */
CGU_PERIPHERAL_MOTOCON, /**< Motor Control */
CGU_PERIPHERAL_QEI, /**< QEI */
CGU_PERIPHERAL_RITIMER, /**< RIT Timer */
CGU_PERIPHERAL_SCT, /**< SCT */
CGU_PERIPHERAL_SCU, /**< SCU */
CGU_PERIPHERAL_SDIO, /**< SDIO */
CGU_PERIPHERAL_SPIFI, /**< SPIFI */
CGU_PERIPHERAL_SSP0, /**< SSP0 */
CGU_PERIPHERAL_SSP1, /**< SSP1 */
CGU_PERIPHERAL_TIMER0, /**< TIMER 0 */
CGU_PERIPHERAL_TIMER1, /**< TIMER 1 */
CGU_PERIPHERAL_TIMER2, /**< TIMER 2 */
CGU_PERIPHERAL_TIMER3, /**< TIMER 3 */
CGU_PERIPHERAL_UART0, /**< UART0 */
CGU_PERIPHERAL_UART1, /**< UART1 */
CGU_PERIPHERAL_UART2, /**< UART2 */
CGU_PERIPHERAL_UART3, /**< UART3 */
CGU_PERIPHERAL_USB0, /**< USB0 */
CGU_PERIPHERAL_USB1, /**< USB1 */
CGU_PERIPHERAL_WWDT, /**< WWDT */
CGU_PERIPHERAL_NUM
} CGU_PERIPHERAL_T;
/**
* @brief CGU error status enumerate definition
*/
typedef enum {
CGU_ERROR_SUCCESS = 0,
CGU_ERROR_CONNECT_TOGETHER,
CGU_ERROR_INVALID_ENTITY,
CGU_ERROR_INVALID_CLOCK_SOURCE,
CGU_ERROR_INVALID_PARAM,
CGU_ERROR_FREQ_OUTOF_RANGE
} CGU_ERROR;
/********************************************************************//**
* @brief CGU structure definitions
**********************************************************************/
/*
* @brief CGU peripheral clock structure
*/
typedef struct {
uint8_t RegBaseEntity; /**< Base register address */
uint16_t RegBranchOffset; /**< Branch register offset */
uint8_t PerBaseEntity; /**< Base peripheral address */
uint16_t PerBranchOffset; /**< Base peripheral offset */
uint8_t next; /**< Pointer to next structure */
} CGU_PERIPHERAL_S;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup CGU_Public_Functions CGU Public Functions
* @{
*/
/** Clock generate initialize/de-initialize */
uint32_t CGU_Init(void);
uint32_t CGU_DeInit(void);
/** Clock Generator and Clock Control */
uint32_t CGU_ConfigPWR (CGU_PERIPHERAL_T PPType, FunctionalState en);
uint32_t CGU_GetPCLKFrequency (CGU_PERIPHERAL_T Clock);
/** Clock Source and Base Clock operation */
uint32_t CGU_SetXTALOSC(uint32_t ClockFrequency);
uint32_t CGU_SetDIV(CGU_ENTITY_T SelectDivider, uint32_t divisor);
uint32_t CGU_SetPLL0(void);
uint32_t CGU_SetPLL1(uint32_t mult);
uint32_t CGU_EnableEntity(CGU_ENTITY_T ClockEntity, uint32_t en);
uint32_t CGU_EntityConnect(CGU_ENTITY_T ClockSource, CGU_ENTITY_T ClockEntity);
uint32_t CGU_GetBaseStatus(CGU_ENTITY_T Base);
void CGU_UpdateClock(void);
uint32_t CGU_RealFrequencyCompare(CGU_ENTITY_T Clock, CGU_ENTITY_T CompareToClock, uint32_t *m, uint32_t *d);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_CGU_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,219 +0,0 @@
/***********************************************************************//**
* @file lpc18xx_clkpwr.h
* @brief Contains all macro definitions and function prototypes
* support for Clock and Power Control firmware library on LPC18xx
* @version 1.0
* @date 14. Dec. 2010
* @author NXP MCU SW Application Team
**************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**************************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup CLKPWR CLKPWR
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_CLKPWR_H_
#define LPC18XX_CLKPWR_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Macros -------------------------------------------------------------- */
/** @defgroup CLKPWR_Public_Macros CLKPWR Public Macros
* @{
*/
typedef enum {
/* Clock Source */
CLKPWR_CLKSRC_32KHZ_OSC = 0,
CLKPWR_CLKSRC_IRC,
CLKPWR_CLKSRC_ENET_RX_CLK,
CLKPWR_CLKSRC_ENET_TX_CLK,
CLKPWR_CLKSRC_GP_CLKIN,
CLKPWR_CLKSRC_TCK,
CLKPWR_CLKSRC_XTAL_OSC,
CLKPWR_CLKSRC_PLL0,
CLKPWR_CLKSRC_PLL1,
CLKPWR_CLKSRC_IDIVA = CLKPWR_CLKSRC_PLL1 + 3,
CLKPWR_CLKSRC_IDIVB,
CLKPWR_CLKSRC_IDIVC,
CLKPWR_CLKSRC_IDIVD,
CLKPWR_CLKSRC_IDIVE,
/* Base */
CLKPWR_BASE_SAFE,
CLKPWR_BASE_USB0,
CLKPWR_BASE_USB1 = CLKPWR_BASE_USB0 + 2,
CLKPWR_BASE_M3,
CLKPWR_BASE_SPIFI,
//CLKPWR_BASE_SPI,
CLKPWR_BASE_PHY_RX = CLKPWR_BASE_SPIFI + 2,
CLKPWR_BASE_PHY_TX,
CLKPWR_BASE_APB1,
CLKPWR_BASE_APB3,
CLKPWR_BASE_LCD,
CLKPWR_BASE_SDIO = CLKPWR_BASE_LCD + 2,
CLKPWR_BASE_SSP0,
CLKPWR_BASE_SSP1,
CLKPWR_BASE_UART0,
CLKPWR_BASE_UART1,
CLKPWR_BASE_UART2,
CLKPWR_BASE_UART3,
CLKPWR_BASE_CLKOUT,
CLKPWR_ENTITY_NUM
} CLKPWR_ENTITY_T;
#define CLKPWR_CLKSRC_NUM (CLKPWR_CLKSRC_IDIVE+1)
typedef enum {
CLKPWR_PLL0_MODE_1d = 0,
CLKPWR_PLL0_MODE_1c,
CLKPWR_PLL0_MODE_1b,
CLKPWR_PLL0_MODE_1a,
}CLKPWR_PLL0_MODE;
typedef enum {
CLKPWR_PERIPHERAL_ADC0 = 0,
CLKPWR_PERIPHERAL_ADC1,
CLKPWR_PERIPHERAL_AES,
// CLKPWR_PERIPHERAL_ALARMTIMER_CGU_RGU_RTC_WIC,
CLKPWR_PERIPHERAL_APB1_BUS,
CLKPWR_PERIPHERAL_APB3_BUS,
CLKPWR_PERIPHERAL_CAN,
CLKPWR_PERIPHERAL_CREG,
CLKPWR_PERIPHERAL_DAC,
CLKPWR_PERIPHERAL_DMA,
CLKPWR_PERIPHERAL_EMC,
CLKPWR_PERIPHERAL_ETHERNET,
CLKPWR_PERIPHERAL_ETHERNET_TX, //HIDE
CLKPWR_PERIPHERAL_GPIO,
CLKPWR_PERIPHERAL_I2C0,
CLKPWR_PERIPHERAL_I2C1,
CLKPWR_PERIPHERAL_I2S,
CLKPWR_PERIPHERAL_LCD,
CLKPWR_PERIPHERAL_M3CORE,
CLKPWR_PERIPHERAL_M3_BUS,
CLKPWR_PERIPHERAL_MOTOCON,
CLKPWR_PERIPHERAL_QEI,
CLKPWR_PERIPHERAL_RITIMER,
CLKPWR_PERIPHERAL_SCT,
CLKPWR_PERIPHERAL_SCU,
CLKPWR_PERIPHERAL_SDIO,
CLKPWR_PERIPHERAL_SPIFI,
CLKPWR_PERIPHERAL_SSP0,
CLKPWR_PERIPHERAL_SSP1,
CLKPWR_PERIPHERAL_TIMER0,
CLKPWR_PERIPHERAL_TIMER1,
CLKPWR_PERIPHERAL_TIMER2,
CLKPWR_PERIPHERAL_TIMER3,
CLKPWR_PERIPHERAL_UART0,
CLKPWR_PERIPHERAL_UART1,
CLKPWR_PERIPHERAL_UART2,
CLKPWR_PERIPHERAL_UART3,
CLKPWR_PERIPHERAL_USB0,
CLKPWR_PERIPHERAL_USB1,
CLKPWR_PERIPHERAL_WWDT,
CLKPWR_PERIPHERAL_NUM
} CLKPWR_PERIPHERAL_T;
//typedef CLKPWR_CLK_T CLKPWR_BASE_T;
typedef struct {
uint8_t RegBaseEntity;
uint16_t RegBranchOffset;
uint8_t PerBaseEntity;
uint16_t PerBranchOffset;
uint8_t next;
} CLKPWR_PERIPHERAL_S;
typedef enum {
CLKPWR_ERROR_SUCCESS = 0,
CLKPWR_ERROR_CONNECT_TOGETHER,
CLKPWR_ERROR_INVALID_ENTITY,
CLKPWR_ERROR_INVALID_CLOCK_SOURCE,
CLKPWR_ERROR_INVALID_PARAM,
CLKPWR_ERROR_FREQ_OUTOF_RANGE
} CLKPWR_ERROR;
/* Branch clocks from CLKPWR_BASE_SAFE */
#define CLKPWR_ENTITY_NONE CLKPWR_ENTITY_NUM
#define ISBITCLR(x,bit) ((x&(1<<bit))^(1<<bit))
#define ISBITSET(x,bit) (x&(1<<bit))
#define ISMASKSET(x,mask) (x&mask)
#define CLKPWR_CTRL_EN_MASK 1
#define CLKPWR_CTRL_SRC_MASK (0xF<<24)
#define CLKPWR_CTRL_AUTOBLOCK_MASK (1<<11)
#define CLKPWR_PLL1_FBSEL_MASK (1<<6)
#define CLKPWR_PLL1_BYPASS_MASK (1<<1)
#define CLKPWR_PLL1_DIRECT_MASK (1<<7)
#define CLKPWR_SLEEP_MODE_DEEP_SLEEP 0x3F00AA
#define CLKPWR_SLEEP_MODE_POWER_DOWN 0x3FFCBA
#define CLKPWR_SLEEP_MODE_DEEP_POWER_DOWN 0x3FFF7F
/* Public Functions ----------------------------------------------------------- */
/** @defgroup CLKPWR_Public_Functions CLKPWR Public Functions
* @{
*/
/* Clock Generator */
uint32_t CLKPWR_ConfigPWR (CLKPWR_PERIPHERAL_T PPType, FunctionalState en);
uint32_t CLKPWR_GetPCLKFrequency (CLKPWR_PERIPHERAL_T Clock);
/* Clock Source and Base Clock operation */
uint32_t CLKPWR_SetXTALOSC(uint32_t ClockFrequency);
uint32_t CLKPWR_SetDIV(CLKPWR_ENTITY_T SelectDivider, uint32_t divisor);
uint32_t CLKPWR_SetPLL0(void);
uint32_t CLKPWR_SetPLL1(uint32_t mult);
uint32_t CLKPWR_EnableEntity(CLKPWR_ENTITY_T ClockEntity, uint32_t en);
uint32_t CLKPWR_EntityConnect(CLKPWR_ENTITY_T ClockSource, CLKPWR_ENTITY_T ClockEntity);
uint32_t CLKPWR_GetBaseStatus(CLKPWR_ENTITY_T Base);
void CLKPWR_UpdateClock(void);
uint32_t CLKPWR_RealFrequencyCompare(CLKPWR_ENTITY_T Clock, CLKPWR_ENTITY_T CompareToClock, uint32_t *m, uint32_t *d);
uint32_t CLKPWR_Init(void);
uint32_t CLKPWR_DeInit(void);
void CLKPWR_Sleep(void);
void CLKPWR_DeepSleep(void);
void CLKPWR_PowerDown(void);
void CLKPWR_DeepPowerDown(void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_CLKPWR_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,149 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_dac.h 2011-06-02
*//**
* @file lpc18xx_dac.h
* @brief Contains all macro definitions and function prototypes
* support for DAC firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup DAC DAC (Digital to Analog Converter)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_DAC_H_
#define LPC18XX_DAC_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Macros -------------------------------------------------------------- */
/** @defgroup DAC_Private_Macros DAC Private Macros
* @{
*/
/** After the selected settling time after this field is written with a
new VALUE, the voltage on the AOUT pin (with respect to VSSA)
is VALUE/1024 <20> VREF */
#define DAC_VALUE(n) ((uint32_t)((n&0x3FF)<<6))
/** If this bit = 0: The settling time of the DAC is 1 microsecond max,
* and the maximum current is 700 microAmpere
* If this bit = 1: The settling time of the DAC is 2.5 microsecond
* and the maximum current is 350 microAmpere */
#define DAC_BIAS_EN ((uint32_t)(1<<16))
/** Value to reload interrupt DMA counter */
#define DAC_CCNT_VALUE(n) ((uint32_t)(n&0xffff))
/** DCAR double buffering */
#define DAC_DBLBUF_ENA ((uint32_t)(1<<1))
/** DCAR Time out count enable */
#define DAC_CNT_ENA ((uint32_t)(1<<2))
/** DCAR DMA access */
#define DAC_DMA_ENA ((uint32_t)(1<<3))
/** DCAR DACCTRL mask bit */
#define DAC_DACCTRL_MASK ((uint32_t)(0x0F))
/** Macro to determine if it is valid DAC peripheral */
#define PARAM_DACx(n) (((uint32_t *)n)==((uint32_t *)LPC_DAC))
/** Macro to check DAC current optional parameter */
#define PARAM_DAC_CURRENT_OPT(OPTION) ((OPTION == DAC_MAX_CURRENT_700uA)\
||(OPTION == DAC_MAX_CURRENT_350uA))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup DAC_Public_Types DAC Public Types
* @{
*/
/**
* @brief Current option in DAC configuration option */
typedef enum
{
DAC_MAX_CURRENT_700uA = 0, /*!< The settling time of the DAC is 1 us max,
and the maximum current is 700 uA */
DAC_MAX_CURRENT_350uA /*!< The settling time of the DAC is 2.5 us
and the maximum current is 350 uA */
} DAC_CURRENT_OPT;
/**
* @brief Configuration for DAC converter control register */
typedef struct
{
uint8_t DBLBUF_ENA; /**<
-0: Disable DACR double buffering
-1: when bit CNT_ENA, enable DACR double buffering feature
*/
uint8_t CNT_ENA; /*!<
-0: Time out counter is disable
-1: Time out conter is enable
*/
uint8_t DMA_ENA; /*!<
-0: DMA access is disable
-1: DMA burst request
*/
uint8_t RESERVED;
} DAC_CONVERTER_CFG_Type;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup DAC_Public_Functions DAC Public Functions
* @{
*/
void DAC_Init(LPC_DAC_Type *DACx);
void DAC_UpdateValue (LPC_DAC_Type *DACx, uint32_t dac_value);
void DAC_SetBias (LPC_DAC_Type *DACx,uint32_t bias);
void DAC_ConfigDAConverterControl (LPC_DAC_Type *DACx,DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct);
void DAC_SetDMATimeOut(LPC_DAC_Type *DACx,uint32_t time_out);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_DAC_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,79 +0,0 @@
/**********************************************************************
* $Id: lpc43xx_emc.h 8765 2011-12-08 00:51:21Z nxp21346 $ lpc43xx_emc.h 2011-12-07
*//**
* @file lpc43xx_emc.h
* @brief Contains all functions support for Clock Generation and Control
* firmware library on lpc43xx
* @version 1.0
* @date 07. December. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
#define __CRYSTAL (12000000UL) /* Crystal Oscillator frequency */
#define __PLLMULT (15)
#define __PLLOUTHZ (__CRYSTAL * __PLLMULT)
#define __EMCDIV (2)
#define __EMCHZ (__PLLOUTHZ / __EMCDIV)
void MemoryPinInit(void);
void EMCFlashInit(void);
/* SDRAM Address Base for DYCS0*/
#define SDRAM_BASE_ADDR 0x28000000
#define FLASH_BASE_ADDR 0x1C000000
#define EMC_SDRAM_WIDTH_8_BITS 0
#define EMC_SDRAM_WIDTH_16_BITS 1
#define EMC_SDRAM_WIDTH_32_BITS 2
#define EMC_SDRAM_SIZE_16_MBITS 0
#define EMC_SDRAM_SIZE_64_MBITS 1
#define EMC_SDRAM_SIZE_128_MBITS 2
#define EMC_SDRAM_SIZE_256_MBITS 3
#define EMC_SDRAM_SIZE_512_MBITS 4
#define EMC_SDRAM_DATA_BUS_16_BITS 0
#define EMC_SDRAM_DATA_BUS_32_BITS 1
#define EMC_B_ENABLE (1 << 19)
#define EMC_ENABLE (1 << 0)
#define EMC_CE_ENABLE (1 << 0)
#define EMC_CS_ENABLE (1 << 1)
#define EMC_CLOCK_DELAYED_STRATEGY (0 << 0)
#define EMC_COMMAND_DELAYED_STRATEGY (1 << 0)
#define EMC_COMMAND_DELAYED_STRATEGY2 (2 << 0)
#define EMC_COMMAND_DELAYED_STRATEGY3 (3 << 0)
#define EMC_INIT(i) ((i) << 7)
#define EMC_NORMAL (0)
#define EMC_MODE (1)
#define EMC_PRECHARGE_ALL (2)
#define EMC_NOP (3)
/* The Hitex LPC18xx Evaluation board contains a 64Mb SDRAM with a 16-bit data bus */
#define SDRAM_SIZE_BYTES (1024UL * 1024UL * 8UL)
#define SDRAM_WIDTH EMC_SDRAM_WIDTH_16_BITS
#define SDRAM_SIZE_MBITS EMC_SDRAM_SIZE_64_MBITS
#define SDRAM_DATA_BUS_BITS EMC_SDRAM_DATA_BUS_16_BITS
#define SDRAM_COL_ADDR_BITS 8
#define CLK0_DELAY 0
void vEMC_InitSRDRAM(uint32_t u32BaseAddr, uint32_t u32Width, uint32_t u32Size, uint32_t u32DataBus, uint32_t u32ColAddrBits);
void emc_WaitUS(volatile uint32_t us);
void emc_WaitMS(uint32_t ms);

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@@ -1,146 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_evrt.h 2011-06-02
*//**
* @file lpc18xx_evrt.h
* @brief Contains all macro definitions and function prototypes
* support for Event Router firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup EVRT EVRT (Event Router)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_EVRT_H_
#define LPC18XX_EVRT_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros ------------------------------------------------------------- */
/** @defgroup EVRT_Private_Macros EVRT Private Macros
* @{
*/
/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
/** Macro to determine if it is valid EVRT peripheral */
#define PARAM_EVRTx(x) (((uint32_t *)x)==((uint32_t *)LPC_EVENTROUTER))
/* Macro check EVRT source */
#define PARAM_EVRT_SOURCE(n) ((n==EVRT_SRC_WAKEUP0) || (n==EVRT_SRC_WAKEUP1) \
|| (n==EVRT_SRC_WAKEUP2) || (n==EVRT_SRC_WAKEUP3) \
|| (n==EVRT_SRC_ATIMER) || (n==EVRT_SRC_RTC) \
|| (n==EVRT_SRC_BOD1) || (n==EVRT_SRC_WWDT) \
|| (n==EVRT_SRC_ETHERNET) || (n==EVRT_SRC_USB0) \
|| (n==EVRT_SRC_USB1) || (n==EVRT_SRC_CCAN) || (n==EVRT_SRC_SDIO) \
|| (n==EVRT_SRC_COMBINE_TIMER2) || (n==EVRT_SRC_COMBINE_TIMER6) \
|| (n==EVRT_SRC_QEI) || (n==EVRT_SRC_COMBINE_TIMER14) \
|| (n==EVRT_SRC_RESET)) \
/* Macro check EVRT source active type*/
#define PARAM_EVRT_SOURCE_ACTIVE_TYPE(n) ((n==EVRT_SRC_ACTIVE_LOW_LEVEL) || (n==EVRT_SRC_ACTIVE_HIGH_LEVEL) \
|| (n==EVRT_SRC_ACTIVE_FALLING_EDGE) || (n==EVRT_SRC_ACTIVE_RISING_EDGE))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup EVRT_Public_Types EVRT Public Types
* @{
*/
/** @brief EVRT input sources */
typedef enum {
EVRT_SRC_WAKEUP0, /**< WAKEUP0 event router source */
EVRT_SRC_WAKEUP1, /**< WAKEUP1 event router source */
EVRT_SRC_WAKEUP2, /**< WAKEUP2 event router source */
EVRT_SRC_WAKEUP3, /**< WAKEUP3 event router source */
EVRT_SRC_ATIMER, /**< Alarm timer event router source */
EVRT_SRC_RTC, /**< RTC event router source */
EVRT_SRC_BOD1, /**< BOD event router source */
EVRT_SRC_WWDT, /**< WWDT event router source */
EVRT_SRC_ETHERNET, /**< Ethernet event router source */
EVRT_SRC_USB0, /**< USB0 event router source */
EVRT_SRC_USB1, /**< USB1 event router source */
EVRT_SRC_SDIO, /**< Reserved */
EVRT_SRC_CCAN, /**< C_CAN event router source */
EVRT_SRC_COMBINE_TIMER2, /**< Combined timer 2 event router source */
EVRT_SRC_COMBINE_TIMER6, /**< Combined timer 6 event router source */
EVRT_SRC_QEI, /**< QEI event router source */
EVRT_SRC_COMBINE_TIMER14, /**< Combined timer 14 event router source */
EVRT_SRC_RESERVED1, /**< Reserved */
EVRT_SRC_RESERVED2, /**< Reserved */
EVRT_SRC_RESET /**< Reset event router source */
} EVRT_SRC_ENUM;
/** @brief EVRT input sources detecting type */
typedef enum {
EVRT_SRC_ACTIVE_LOW_LEVEL, /**< Active low level */
EVRT_SRC_ACTIVE_HIGH_LEVEL, /**< Active high level */
EVRT_SRC_ACTIVE_FALLING_EDGE, /**< Active falling edge */
EVRT_SRC_ACTIVE_RISING_EDGE /**< Active rising edge */
}EVRT_SRC_ACTIVE_TYPE;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup EVRT_Public_Functions EVRT Public Functions
* @{
*/
void EVRT_Init (LPC_EVENTROUTER_Type *EVRTx);
void EVRT_DeInit(LPC_EVENTROUTER_Type *EVRTx);
void EVRT_ConfigIntSrcActiveType(LPC_EVENTROUTER_Type *EVRTx, EVRT_SRC_ENUM EVRT_Src, EVRT_SRC_ACTIVE_TYPE type);
void EVRT_SetUpIntSrc(LPC_EVENTROUTER_Type *EVRTx, EVRT_SRC_ENUM EVRT_Src, FunctionalState state);
Bool EVRT_IsSourceInterrupting(LPC_EVENTROUTER_Type *EVRTx, EVRT_SRC_ENUM EVRT_Src);
void EVRT_ClrPendIntSrc(LPC_EVENTROUTER_Type *EVRTx, EVRT_SRC_ENUM EVRT_Src);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_EVRT_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,468 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_gpdma.h 2011-06-02
*//**
* @file lpc18xx_gpdma.h
* @brief Contains all macro definitions and function prototypes
* support for GPDMA firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup GPDMA GPDMA (General Purpose DMA)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_GPDMA_H_
#define LPC18XX_GPDMA_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Macros -------------------------------------------------------------- */
/** @defgroup GPDMA_Public_Macros GPDMA Public Macros
* @{
*/
/** DMA Connection number definitions */
#define GPDMA_CONN_SPIFI ((0UL)) /**< SPIFI */
#define GPDMA_CONN_MAT0_0 ((1UL)) /**< MAT0.0 */
#define GPDMA_CONN_UART0_Tx ((2UL)) /**< UART0 Tx */
#define GPDMA_CONN_MAT0_1 ((3UL)) /**< MAT0.1 */
#define GPDMA_CONN_UART0_Rx ((4UL)) /**< UART0 Rx */
#define GPDMA_CONN_MAT1_0 ((5UL)) /**< MAT1.0 */
#define GPDMA_CONN_UART1_Tx ((6UL)) /**< UART1 Tx */
#define GPDMA_CONN_MAT1_1 ((7UL)) /**< MAT1.1 */
#define GPDMA_CONN_UART1_Rx ((8UL)) /**< UART1 Rx */
#define GPDMA_CONN_MAT2_0 ((9UL)) /**< MAT2.0 */
#define GPDMA_CONN_UART2_Tx ((10UL)) /**< UART2 Tx */
#define GPDMA_CONN_MAT2_1 ((11UL)) /**< MAT2.1 */
#define GPDMA_CONN_UART2_Rx ((12UL)) /**< UART2 Rx */
#define GPDMA_CONN_MAT3_0 ((13UL)) /**< MAT3.0 */
#define GPDMA_CONN_UART3_Tx ((14UL)) /**< UART3 Tx */
#define GPDMA_CONN_SCT_0 ((15UL)) /**< SCT timer channel 0*/
#define GPDMA_CONN_MAT3_1 ((16UL)) /**< MAT3.1 */
#define GPDMA_CONN_UART3_Rx ((17UL)) /**< UART3 Rx */
#define GPDMA_CONN_SCT_1 ((18UL)) /**< SCT timer channel 1*/
#define GPDMA_CONN_SSP0_Rx ((19UL)) /**< SSP0 Rx */
#define GPDMA_CONN_I2S_Channel_0 ((20UL)) /**< I2S channel 0 */
#define GPDMA_CONN_SSP0_Tx ((21UL)) /**< SSP0 Tx */
#define GPDMA_CONN_I2S_Channel_1 ((22UL)) /**< I2S channel 1 */
#define GPDMA_CONN_SSP1_Rx ((23UL)) /**< SSP1 Rx */
#define GPDMA_CONN_SSP1_Tx ((24UL)) /**< SSP1 Tx */
#define GPDMA_CONN_ADC_0 ((25UL)) /**< ADC 0 */
#define GPDMA_CONN_ADC_1 ((26UL)) /**< ADC 1 */
#define GPDMA_CONN_DAC ((27UL)) /**< DAC */
/** GPDMA Transfer type definitions */
#define GPDMA_TRANSFERTYPE_M2M_CONTROLLER_DMA ((0UL)) /**< Memory to memory - DMA control */
#define GPDMA_TRANSFERTYPE_M2P_CONTROLLER_DMA ((1UL)) /**< Memory to peripheral - DMA control */
#define GPDMA_TRANSFERTYPE_P2M_CONTROLLER_DMA ((2UL)) /**< Peripheral to memory - DMA control */
#define GPDMA_TRANSFERTYPE_P2P_CONTROLLER_DMA ((3UL)) /**< Source peripheral to destination peripheral - DMA control */
#define GPDMA_TRANSFERTYPE_P2P_CONTROLLER_DestPERIPHERAL ((4UL)) /**< Source peripheral to destination peripheral - destination peripheral control */
#define GPDMA_TRANSFERTYPE_M2P_CONTROLLER_PERIPHERAL ((5UL)) /**< Memory to peripheral - peripheral control */
#define GPDMA_TRANSFERTYPE_P2M_CONTROLLER_PERIPHERAL ((6UL)) /**< Peripheral to memory - peripheral control */
#define GPDMA_TRANSFERTYPE_P2P_CONTROLLER_SrcPERIPHERAL ((7UL)) /**< Source peripheral to destination peripheral - source peripheral control */
/** Burst size in Source and Destination definitions */
#define GPDMA_BSIZE_1 ((0UL)) /**< Burst size = 1 */
#define GPDMA_BSIZE_4 ((1UL)) /**< Burst size = 4 */
#define GPDMA_BSIZE_8 ((2UL)) /**< Burst size = 8 */
#define GPDMA_BSIZE_16 ((3UL)) /**< Burst size = 16 */
#define GPDMA_BSIZE_32 ((4UL)) /**< Burst size = 32 */
#define GPDMA_BSIZE_64 ((5UL)) /**< Burst size = 64 */
#define GPDMA_BSIZE_128 ((6UL)) /**< Burst size = 128 */
#define GPDMA_BSIZE_256 ((7UL)) /**< Burst size = 256 */
/** Width in Source transfer width and Destination transfer width definitions */
#define GPDMA_WIDTH_BYTE ((0UL)) /**< Width = 1 byte */
#define GPDMA_WIDTH_HALFWORD ((1UL)) /**< Width = 2 bytes */
#define GPDMA_WIDTH_WORD ((2UL)) /**< Width = 4 bytes */
/** LPC_GPDMA base addresses */
#define LPC_GPDMACH0_BASE 0x40002100
#define LPC_GPDMACH1_BASE 0x40002120
#define LPC_GPDMACH2_BASE 0x40002140
#define LPC_GPDMACH3_BASE 0x40002160
#define LPC_GPDMACH4_BASE 0x40002180
#define LPC_GPDMACH5_BASE 0x400021A0
#define LPC_GPDMACH6_BASE 0x400021C0
#define LPC_GPDMACH7_BASE 0x400021E0
/* LPC_GPDMA channels definitions */
#define LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE )
#define LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE )
#define LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE )
#define LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE )
#define LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE )
#define LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE )
#define LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE )
#define LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE )
/**
* @}
*/
/* Private Macros ------------------------------------------------------------- */
/** @defgroup GPDMA_Private_Macros GPDMA Private Macros
* @{
*/
/* --------------------- BIT DEFINITIONS -------------------------------------- */
/*********************************************************************//**
* Macro defines for DMA Interrupt Status register
**********************************************************************/
#define GPDMA_DMACIntStat_Ch(n) (((1UL<<n)&0xFF))
#define GPDMA_DMACIntStat_BITMASK ((0xFF))
/*********************************************************************//**
* Macro defines for DMA Interrupt Terminal Count Request Status register
**********************************************************************/
#define GPDMA_DMACIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define GPDMA_DMACIntTCStat_BITMASK ((0xFF))
/*********************************************************************//**
* Macro defines for DMA Interrupt Terminal Count Request Clear register
**********************************************************************/
#define GPDMA_DMACIntTCClear_Ch(n) (((1UL<<n)&0xFF))
#define GPDMA_DMACIntTCClear_BITMASK ((0xFF))
/*********************************************************************//**
* Macro defines for DMA Interrupt Error Status register
**********************************************************************/
#define GPDMA_DMACIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define GPDMA_DMACIntErrStat_BITMASK ((0xFF))
/*********************************************************************//**
* Macro defines for DMA Interrupt Error Clear register
**********************************************************************/
#define GPDMA_DMACIntErrClr_Ch(n) (((1UL<<n)&0xFF))
#define GPDMA_DMACIntErrClr_BITMASK ((0xFF))
/*********************************************************************//**
* Macro defines for DMA Raw Interrupt Terminal Count Status register
**********************************************************************/
#define GPDMA_DMACRawIntTCStat_Ch(n) (((1UL<<n)&0xFF))
#define GPDMA_DMACRawIntTCStat_BITMASK ((0xFF))
/*********************************************************************//**
* Macro defines for DMA Raw Error Interrupt Status register
**********************************************************************/
#define GPDMA_DMACRawIntErrStat_Ch(n) (((1UL<<n)&0xFF))
#define GPDMA_DMACRawIntErrStat_BITMASK ((0xFF))
/*********************************************************************//**
* Macro defines for DMA Enabled Channel register
**********************************************************************/
#define GPDMA_DMACEnbldChns_Ch(n) (((1UL<<n)&0xFF))
#define GPDMA_DMACEnbldChns_BITMASK ((0xFF))
/*********************************************************************//**
* Macro defines for DMA Software Burst Request register
**********************************************************************/
#define GPDMA_DMACSoftBReq_Src(n) (((1UL<<n)&0xFFFF))
#define GPDMA_DMACSoftBReq_BITMASK ((0xFFFF))
/*********************************************************************//**
* Macro defines for DMA Software Single Request register
**********************************************************************/
#define GPDMA_DMACSoftSReq_Src(n) (((1UL<<n)&0xFFFF))
#define GPDMA_DMACSoftSReq_BITMASK ((0xFFFF))
/*********************************************************************//**
* Macro defines for DMA Software Last Burst Request register
**********************************************************************/
#define GPDMA_DMACSoftLBReq_Src(n) (((1UL<<n)&0xFFFF))
#define GPDMA_DMACSoftLBReq_BITMASK ((0xFFFF))
/*********************************************************************//**
* Macro defines for DMA Software Last Single Request register
**********************************************************************/
#define GPDMA_DMACSoftLSReq_Src(n) (((1UL<<n)&0xFFFF))
#define GPDMA_DMACSoftLSReq_BITMASK ((0xFFFF))
/*********************************************************************//**
* Macro defines for DMA Configuration register
**********************************************************************/
#define GPDMA_DMACConfig_E ((0x01)) /**< DMA Controller enable*/
#define GPDMA_DMACConfig_M0 ((0x02)) /**< AHB Master 0 endianness configuration*/
#define GPDMA_DMACConfig_M1 ((0x04)) /**< AHB Master 1 endianness configuration*/
#define GPDMA_DMACConfig_BITMASK ((0x07))
/*********************************************************************//**
* Macro defines for DMA Synchronization register
**********************************************************************/
#define GPDMA_DMACSync_Src(n) (((1UL<<n)&0xFFFF))
#define GPDMA_DMACSync_BITMASK ((0xFFFF))
/*********************************************************************//**
* Macro defines for DMA Channel Linked List Item registers
**********************************************************************/
/** DMA Channel Linked List Item registers bit mask*/
#define GPDMA_DMACCxLLI_BITMASK ((0xFFFFFFFC))
/*********************************************************************//**
* Macro defines for DMA channel control registers
**********************************************************************/
#define GPDMA_DMACCxControl_TransferSize(n) (((n&0xFFF)<<0)) /**< Transfer size*/
#define GPDMA_DMACCxControl_SBSize(n) (((n&0x07)<<12)) /**< Source burst size*/
#define GPDMA_DMACCxControl_DBSize(n) (((n&0x07)<<15)) /**< Destination burst size*/
#define GPDMA_DMACCxControl_SWidth(n) (((n&0x07)<<18)) /**< Source transfer width*/
#define GPDMA_DMACCxControl_DWidth(n) (((n&0x07)<<21)) /**< Destination transfer width*/
#define GPDMA_DMACCxControl_SrcTransUseAHBMaster1 ((1UL<<24)) /**< Source AHB master select*/
#define GPDMA_DMACCxControl_DestTransUseAHBMaster1 ((1UL<<25)) /**< Destination AHB master select*/
#define GPDMA_DMACCxControl_SI ((1UL<<26)) /**< Source increment*/
#define GPDMA_DMACCxControl_DI ((1UL<<27)) /**< Destination increment*/
#define GPDMA_DMACCxControl_Prot1 ((1UL<<28)) /**< Indicates that the access is in user mode or privileged mode*/
#define GPDMA_DMACCxControl_Prot2 ((1UL<<29)) /**< Indicates that the access is bufferable or not bufferable*/
#define GPDMA_DMACCxControl_Prot3 ((1UL<<30)) /**< Indicates that the access is cacheable or not cacheable*/
#define GPDMA_DMACCxControl_I ((1UL<<31)) /**< Terminal count interrupt enable bit */
/** DMA channel control registers bit mask */
#define GPDMA_DMACCxControl_BITMASK ((0xFCFFFFFF))
/*********************************************************************//**
* Macro defines for DMA Channel Configuration registers
**********************************************************************/
#define GPDMA_DMACCxConfig_E ((1UL<<0)) /**< DMA control enable*/
#define GPDMA_DMACCxConfig_SrcPeripheral(n) (((n&0x1F)<<1)) /**< Source peripheral*/
#define GPDMA_DMACCxConfig_DestPeripheral(n) (((n&0x1F)<<6)) /**< Destination peripheral*/
#define GPDMA_DMACCxConfig_TransferType(n) (((n&0x7)<<11)) /**< This value indicates the type of transfer*/
#define GPDMA_DMACCxConfig_IE ((1UL<<14)) /**< Interrupt error mask*/
#define GPDMA_DMACCxConfig_ITC ((1UL<<15)) /**< Terminal count interrupt mask*/
#define GPDMA_DMACCxConfig_L ((1UL<<16)) /**< Lock*/
#define GPDMA_DMACCxConfig_A ((1UL<<17)) /**< Active*/
#define GPDMA_DMACCxConfig_H ((1UL<<18)) /**< Halt*/
/** DMA Channel Configuration registers bit mask */
#define GPDMA_DMACCxConfig_BITMASK ((0x7FFFF))
/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
/* Macros check GPDMA channel */
#define PARAM_GPDMA_CHANNEL(n) (n<=7)
/* Macros check GPDMA connection type */
#define PARAM_GPDMA_CONN(n) ((n==GPDMA_CONN_SPIFI) || (n==GPDMA_CONN_DAC) \
|| (n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \
|| (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \
|| (n==GPDMA_CONN_ADC_0) || (n==GPDMA_CONN_ADC_1) \
|| (n==GPDMA_CONN_I2S_Channel_0) || (n==GPDMA_CONN_I2S_Channel_1) \
|| (n==GPDMA_CONN_SCT_0) || (n==GPDMA_CONN_SCT_1) \
|| (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \
|| (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \
|| (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \
|| (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \
|| (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \
|| (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \
|| (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \
|| (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1))
/* Macros check GPDMA burst size type */
#define PARAM_GPDMA_BSIZE(n) ((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \
|| (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \
|| (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \
|| (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256))
/* Macros check GPDMA width type */
#define PARAM_GPDMA_WIDTH(n) ((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \
|| (n==GPDMA_WIDTH_WORD))
/* Macros check GPDMA status type */
#define PARAM_GPDMA_STAT(n) ((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \
|| (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \
|| (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH))
/* Macros check GPDMA transfer type */
#define PARAM_GPDMA_TRANSFERTYPE(n) ((n==GPDMA_TRANSFERTYPE_M2M_CONTROLLER_DMA)||(n==GPDMA_TRANSFERTYPE_M2P_CONTROLLER_DMA) \
||(n==GPDMA_TRANSFERTYPE_P2M_CONTROLLER_DMA)||(n==GPDMA_TRANSFERTYPE_P2P_CONTROLLER_DMA)\
||(n==GPDMA_TRANSFERTYPE_P2P_CONTROLLER_DestPERIPHERAL)||(n==GPDMA_TRANSFERTYPE_M2P_CONTROLLER_PERIPHERAL)\
||(n==GPDMA_TRANSFERTYPE_P2M_CONTROLLER_PERIPHERAL)||(n==GPDMA_TRANSFERTYPE_P2P_CONTROLLER_SrcPERIPHERAL))
/* Macros check GPDMA state clear type */
#define PARAM_GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup GPDMA_Public_Types GPDMA Public Types
* @{
*/
/**
* @brief GPDMA Channel Registers
*/
typedef struct
{
__IO uint32_t CSrcAddr;
__IO uint32_t CDestAddr;
__IO uint32_t CLLI;
__IO uint32_t CControl;
__IO uint32_t CConfig;
} LPC_GPDMACH_TypeDef;
/**
* @brief GPDMA Status enumeration
*/
typedef enum {
GPDMA_STAT_INT, /**< GPDMA Interrupt Status */
GPDMA_STAT_INTTC, /**< GPDMA Interrupt Terminal Count Request Status */
GPDMA_STAT_INTERR, /**< GPDMA Interrupt Error Status */
GPDMA_STAT_RAWINTTC, /**< GPDMA Raw Interrupt Terminal Count Status */
GPDMA_STAT_RAWINTERR, /**< GPDMA Raw Error Interrupt Status */
GPDMA_STAT_ENABLED_CH /**< GPDMA Enabled Channel Status */
} GPDMA_Status_Type;
/**
* @brief GPDMA Interrupt clear status enumeration
*/
typedef enum{
GPDMA_STATCLR_INTTC, /**< GPDMA Interrupt Terminal Count Request Clear */
GPDMA_STATCLR_INTERR /**< GPDMA Interrupt Error Clear */
}GPDMA_StateClear_Type;
/**
* @brief GPDMA Channel configuration structure type definition
*/
typedef struct {
uint32_t ChannelNum; /**< DMA channel number, should be in
range from 0 to 7.
Note: DMA channel 0 has the highest priority
and DMA channel 7 the lowest priority.
*/
uint32_t TransferSize; /**< Length/Size of transfer */
uint32_t TransferWidth; /**< Transfer width - used for TransferType is GPDMA_TRANSFERTYPE_M2M only */
uint32_t SrcMemAddr; /**< Physical Source Address, used in case TransferType is chosen as
GPDMA_TRANSFERTYPE_M2M or GPDMA_TRANSFERTYPE_M2P */
uint32_t DstMemAddr; /**< Physical Destination Address, used in case TransferType is chosen as
GPDMA_TRANSFERTYPE_M2M or GPDMA_TRANSFERTYPE_P2M */
uint32_t TransferType; /**< Transfer Type, should be one of the following:
- GPDMA_TRANSFERTYPE_M2M_CONTROLLER_DMA: Memory to memory - DMA control
- GPDMA_TRANSFERTYPE_M2P_CONTROLLER_DMA: Memory to peripheral - DMA control
- GPDMA_TRANSFERTYPE_P2M_CONTROLLER_DMA: Peripheral to memory - DMA control
- GPDMA_TRANSFERTYPE_P2P_CONTROLLER_DMA: Source peripheral to destination peripheral - DMA control
- GPDMA_TRANSFERTYPE_P2P_CONTROLLER_DestPERIPHERAL: Source peripheral to destination peripheral - destination peripheral control
- GPDMA_TRANSFERTYPE_M2P_CONTROLLER_PERIPHERAL: Memory to peripheral - peripheral control
- GPDMA_TRANSFERTYPE_P2M_CONTROLLER_PERIPHERAL: Peripheral to memory - peripheral control
- GPDMA_TRANSFERTYPE_P2P_CONTROLLER_SrcPERIPHERAL: Source peripheral to destination peripheral - source peripheral control
*/
uint32_t SrcConn; /**< Peripheral Source Connection type, used in case TransferType is chosen as
GPDMA_TRANSFERTYPE_P2M or GPDMA_TRANSFERTYPE_P2P, should be one of
following:
- GPDMA_CONN_SSP0_Tx: SSP0, Tx
- GPDMA_CONN_SSP0_Rx: SSP0, Rx
- GPDMA_CONN_SSP1_Tx: SSP1, Tx
- GPDMA_CONN_SSP1_Rx: SSP1, Rx
- GPDMA_CONN_ADC_0: ADC0
- GPDMA_CONN_ADC_1: ADC1
- GPDMA_CONN_SCT_0: SCT0
- GPDMA_CONN_SCT_1: SCT1
- GPDMA_CONN_I2S_Channel_0: I2S Channel 0
- GPDMA_CONN_I2S_Channel_1: I2S Channel 1
- GPDMA_CONN_DAC: DAC
- GPDMA_CONN_SPIFI: SPIFI
- GPDMA_CONN_UART0_Tx_MAT0_0: UART0 Tx / MAT0.0
- GPDMA_CONN_UART0_Rx_MAT0_1: UART0 Rx / MAT0.1
- GPDMA_CONN_UART1_Tx_MAT1_0: UART1 Tx / MAT1.0
- GPDMA_CONN_UART1_Rx_MAT1_1: UART1 Rx / MAT1.1
- GPDMA_CONN_UART2_Tx_MAT2_0: UART2 Tx / MAT2.0
- GPDMA_CONN_UART2_Rx_MAT2_1: UART2 Rx / MAT2.1
- GPDMA_CONN_UART3_Tx_MAT3_0: UART3 Tx / MAT3.0
- GPDMA_CONN_UART3_Rx_MAT3_1: UART3 Rx / MAT3.1
*/
uint32_t DstConn; /**< Peripheral Destination Connection type, used in case TransferType is chosen as
GPDMA_TRANSFERTYPE_M2P or GPDMA_TRANSFERTYPE_P2P, should be one of
following:
- GPDMA_CONN_SSP0_Tx: SSP0, Tx
- GPDMA_CONN_SSP0_Rx: SSP0, Rx
- GPDMA_CONN_SSP1_Tx: SSP1, Tx
- GPDMA_CONN_SSP1_Rx: SSP1, Rx
- GPDMA_CONN_ADC_0: ADC0
- GPDMA_CONN_ADC_1: ADC1
- GPDMA_CONN_SCT_0: SCT0
- GPDMA_CONN_SCT_1: SCT1
- GPDMA_CONN_I2S_Channel_0: I2S Channel 0
- GPDMA_CONN_I2S_Channel_1: I2S Channel 1
- GPDMA_CONN_DAC: DAC
- GPDMA_CONN_SPIFI: SPIFI
- GPDMA_CONN_UART0_Tx_MAT0_0: UART0 Tx / MAT0.0
- GPDMA_CONN_UART0_Rx_MAT0_1: UART0 Rx / MAT0.1
- GPDMA_CONN_UART1_Tx_MAT1_0: UART1 Tx / MAT1.0
- GPDMA_CONN_UART1_Rx_MAT1_1: UART1 Rx / MAT1.1
- GPDMA_CONN_UART2_Tx_MAT2_0: UART2 Tx / MAT2.0
- GPDMA_CONN_UART2_Rx_MAT2_1: UART2 Rx / MAT2.1
- GPDMA_CONN_UART3_Tx_MAT3_0: UART3 Tx / MAT3.0
- GPDMA_CONN_UART3_Rx_MAT3_1: UART3 Rx / MAT3.1
*/
uint32_t DMALLI; /**< Linker List Item structure data address
if there's no Linker List, set as '0'
*/
} GPDMA_Channel_CFG_Type;
/**
* @brief GPDMA Linker List Item structure type definition
*/
typedef struct {
uint32_t SrcAddr; /**< Source Address */
uint32_t DstAddr; /**< Destination address */
uint32_t NextLLI; /**< Next LLI address, otherwise set to '0' */
uint32_t Control; /**< GPDMA Control of this LLI */
} GPDMA_LLI_Type;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup GPDMA_Public_Functions GPDMA Public Functions
* @{
*/
void GPDMA_Init(void);
Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig);
IntStatus GPDMA_IntGetStatus(GPDMA_Status_Type type, uint8_t channel);
void GPDMA_ClearIntPending(GPDMA_StateClear_Type type, uint8_t channel);
void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_GPDMA_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,186 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_gpio.h 2011-06-02
*//**
* @file lpc18xx_gpio.h
* @brief Contains all macro definitions and function prototypes
* support for GPIO firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup GPIO GPIO (General Purpose I/O)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_GPIO_H_
#define LPC18XX_GPIO_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Macros -------------------------------------------------------------- */
/** @defgroup GPIO_Public_Macros GPIO Public Macros
* @{
*/
#if 0
/** General LPC GPIO Base */
#define LPC_GPIO_BASE LPC_GPIO0_BASE
/** Fast GPIO port 0 byte accessible definition */
#define GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO_BASE+0x00))
/** Fast GPIO port 1 byte accessible definition */
#define GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO_BASE+0x20))
/** Fast GPIO port 2 byte accessible definition */
#define GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO_BASE+0x40))
/** Fast GPIO port 3 byte accessible definition */
#define GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO_BASE+0x60))
/** Fast GPIO port 4 byte accessible definition */
#define GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO_BASE+0x80))
/** Fast GPIO port 0 half-word accessible definition */
#define GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO_BASE+0x00))
/** Fast GPIO port 1 half-word accessible definition */
#define GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO_BASE+0x20))
/** Fast GPIO port 2 half-word accessible definition */
#define GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO_BASE+0x40))
/** Fast GPIO port 3 half-word accessible definition */
#define GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO_BASE+0x60))
/** Fast GPIO port 4 half-word accessible definition */
#define GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO_BASE+0x80))
#endif
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup GPIO_Public_Types GPIO Public Types
* @{
*/
/**
* @brief Fast GPIO port byte type definition
*/
#if 0
typedef struct {
__IO uint8_t FIODIR[4]; /**< FIO direction register in byte-align */
uint32_t RESERVED0[3]; /**< Reserved */
__IO uint8_t FIOMASK[4]; /**< FIO mask register in byte-align */
__IO uint8_t FIOPIN[4]; /**< FIO pin register in byte align */
__IO uint8_t FIOSET[4]; /**< FIO set register in byte-align */
__O uint8_t FIOCLR[4]; /**< FIO clear register in byte-align */
} GPIO_Byte_TypeDef;
#endif
/**
* @brief Fast GPIO port half-word type definition
*/
#if 0
typedef struct {
__IO uint16_t FIODIRL; /**< FIO direction register lower halfword part */
__IO uint16_t FIODIRU; /**< FIO direction register upper halfword part */
uint32_t RESERVED0[3]; /**< Reserved */
__IO uint16_t FIOMASKL; /**< FIO mask register lower halfword part */
__IO uint16_t FIOMASKU; /**< FIO mask register upper halfword part */
__IO uint16_t FIOPINL; /**< FIO pin register lower halfword part */
__IO uint16_t FIOPINU; /**< FIO pin register upper halfword part */
__IO uint16_t FIOSETL; /**< FIO set register lower halfword part */
__IO uint16_t FIOSETU; /**< FIO set register upper halfword part */
__O uint16_t FIOCLRL; /**< FIO clear register lower halfword part */
__O uint16_t FIOCLRU; /**< FIO clear register upper halfword part */
} GPIO_HalfWord_TypeDef;
#endif
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup GPIO_Public_Functions GPIO Public Functions
* @{
*/
/* GPIO style ------------------------------- */
void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir);
void GPIO_SetValue(uint8_t portNum, uint32_t bitValue);
void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue);
uint32_t GPIO_ReadValue(uint8_t portNum);
#ifdef GPIO_INT
void GPIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState);
FunctionalState GPIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState);
void GPIO_ClearInt(uint8_t portNum, uint32_t bitValue);
#endif
/* FIO (word-accessible) style ------------------------------- */
void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir);
void FIO_SetValue(uint8_t portNum, uint32_t bitValue);
void FIO_ClearValue(uint8_t portNum, uint32_t bitValue);
uint32_t FIO_ReadValue(uint8_t portNum);
void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue);
#ifdef GPIO_INT
void FIO_IntCmd(uint8_t portNum, uint32_t bitValue, uint8_t edgeState);
FunctionalState FIO_GetIntStatus(uint8_t portNum, uint32_t pinNum, uint8_t edgeState);
void FIO_ClearInt(uint8_t portNum, uint32_t pinNum);
#endif
#if 0
/* FIO (halfword-accessible) style ------------------------------- */
void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir);
void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue);
void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue);
void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue);
uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum);
/* FIO (byte-accessible) style ------------------------------- */
void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir);
void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue);
void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue);
void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue);
uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum);
#endif
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_GPIO_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,383 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_i2c.h 2011-06-02
*//**
* @file lpc18xx_i2c.h
* @brief Contains all macro definitions and function prototypes
* support for I2C firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup I2C I2C (Inter-Integrated Circuit)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_I2C_H_
#define LPC18XX_I2C_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros ------------------------------------------------------------- */
/** @defgroup I2C_Private_Macros I2C Private Macros
* @{
*/
/* --------------------- BIT DEFINITIONS -------------------------------------- */
/*******************************************************************//**
* I2C Control Set register description
*********************************************************************/
#define I2C_I2CONSET_AA ((0x04)) /*!< Assert acknowledge flag */
#define I2C_I2CONSET_SI ((0x08)) /*!< I2C interrupt flag */
#define I2C_I2CONSET_STO ((0x10)) /*!< STOP flag */
#define I2C_I2CONSET_STA ((0x20)) /*!< START flag */
#define I2C_I2CONSET_I2EN ((0x40)) /*!< I2C interface enable */
/*******************************************************************//**
* I2C Control Clear register description
*********************************************************************/
/** Assert acknowledge Clear bit */
#define I2C_I2CONCLR_AAC ((1<<2))
/** I2C interrupt Clear bit */
#define I2C_I2CONCLR_SIC ((1<<3))
/** START flag Clear bit */
#define I2C_I2CONCLR_STAC ((1<<5))
/** I2C interface Disable bit */
#define I2C_I2CONCLR_I2ENC ((1<<6))
/********************************************************************//**
* I2C Status Code definition (I2C Status register)
*********************************************************************/
/* Return Code in I2C status register */
#define I2C_STAT_CODE_BITMASK ((0xF8))
/* I2C return status code definitions ----------------------------- */
/** No relevant information */
#define I2C_I2STAT_NO_INF ((0xF8))
/* Master transmit mode -------------------------------------------- */
/** A start condition has been transmitted */
#define I2C_I2STAT_M_TX_START ((0x08))
/** A repeat start condition has been transmitted */
#define I2C_I2STAT_M_TX_RESTART ((0x10))
/** SLA+W has been transmitted, ACK has been received */
#define I2C_I2STAT_M_TX_SLAW_ACK ((0x18))
/** SLA+W has been transmitted, NACK has been received */
#define I2C_I2STAT_M_TX_SLAW_NACK ((0x20))
/** Data has been transmitted, ACK has been received */
#define I2C_I2STAT_M_TX_DAT_ACK ((0x28))
/** Data has been transmitted, NACK has been received */
#define I2C_I2STAT_M_TX_DAT_NACK ((0x30))
/** Arbitration lost in SLA+R/W or Data bytes */
#define I2C_I2STAT_M_TX_ARB_LOST ((0x38))
/* Master receive mode -------------------------------------------- */
/** A start condition has been transmitted */
#define I2C_I2STAT_M_RX_START ((0x08))
/** A repeat start condition has been transmitted */
#define I2C_I2STAT_M_RX_RESTART ((0x10))
/** Arbitration lost */
#define I2C_I2STAT_M_RX_ARB_LOST ((0x38))
/** SLA+R has been transmitted, ACK has been received */
#define I2C_I2STAT_M_RX_SLAR_ACK ((0x40))
/** SLA+R has been transmitted, NACK has been received */
#define I2C_I2STAT_M_RX_SLAR_NACK ((0x48))
/** Data has been received, ACK has been returned */
#define I2C_I2STAT_M_RX_DAT_ACK ((0x50))
/** Data has been received, NACK has been return */
#define I2C_I2STAT_M_RX_DAT_NACK ((0x58))
/* Slave receive mode -------------------------------------------- */
/** Own slave address has been received, ACK has been returned */
#define I2C_I2STAT_S_RX_SLAW_ACK ((0x60))
/** Arbitration lost in SLA+R/W as master */
#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68))
/** Own SLA+W has been received, ACK returned */
//#define I2C_I2STAT_S_RX_SLAW_ACK ((0x68))
/** General call address has been received, ACK has been returned */
#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x70))
/** Arbitration lost in SLA+R/W (GENERAL CALL) as master */
#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78))
/** General call address has been received, ACK has been returned */
//#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x78))
/** Previously addressed with own SLV address;
* Data has been received, ACK has been return */
#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80))
/** Previously addressed with own SLA;
* Data has been received and NOT ACK has been return */
#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88))
/** Previously addressed with General Call;
* Data has been received and ACK has been return */
#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90))
/** Previously addressed with General Call;
* Data has been received and NOT ACK has been return */
#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98))
/** A STOP condition or repeated START condition has
* been received while still addressed as SLV/REC
* (Slave Receive) or SLV/TRX (Slave Transmit) */
#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0))
/** Slave transmit mode */
/** Own SLA+R has been received, ACK has been returned */
#define I2C_I2STAT_S_TX_SLAR_ACK ((0xA8))
/** Arbitration lost in SLA+R/W as master */
#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0))
/** Own SLA+R has been received, ACK has been returned */
//#define I2C_I2STAT_S_TX_SLAR_ACK ((0xB0))
/** Data has been transmitted, ACK has been received */
#define I2C_I2STAT_S_TX_DAT_ACK ((0xB8))
/** Data has been transmitted, NACK has been received */
#define I2C_I2STAT_S_TX_DAT_NACK ((0xC0))
/** Last data byte in I2DAT has been transmitted (AA = 0);
ACK has been received */
#define I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8))
/** Time out in case of using I2C slave mode */
#define I2C_SLAVE_TIME_OUT 0x10000UL
/********************************************************************//**
* I2C Data register definition
*********************************************************************/
/** Mask for I2DAT register*/
#define I2C_I2DAT_BITMASK ((0xFF))
/** Idle data value will be send out in slave mode in case of the actual
* expecting data requested from the master is greater than its sending data
* length that can be supported */
#define I2C_I2DAT_IDLE_CHAR (0xFF)
/********************************************************************//**
* I2C Monitor mode control register description
*********************************************************************/
#define I2C_I2MMCTRL_MM_ENA ((1<<0)) /**< Monitor mode enable */
#define I2C_I2MMCTRL_ENA_SCL ((1<<1)) /**< SCL output enable */
#define I2C_I2MMCTRL_MATCH_ALL ((1<<2)) /**< Select interrupt register match */
#define I2C_I2MMCTRL_BITMASK ((0x07)) /**< Mask for I2MMCTRL register */
/********************************************************************//**
* I2C Data buffer register description
*********************************************************************/
/** I2C Data buffer register bit mask */
#define I2DATA_BUFFER_BITMASK ((0xFF))
/********************************************************************//**
* I2C Slave Address registers definition
*********************************************************************/
/** General Call enable bit */
#define I2C_I2ADR_GC ((1<<0))
/** I2C Slave Address registers bit mask */
#define I2C_I2ADR_BITMASK ((0xFF))
/********************************************************************//**
* I2C Mask Register definition
*********************************************************************/
/** I2C Mask Register mask field */
#define I2C_I2MASK_MASK(n) ((n&0xFE))
/********************************************************************//**
* I2C SCL HIGH duty cycle Register definition
*********************************************************************/
/** I2C SCL HIGH duty cycle Register bit mask */
#define I2C_I2SCLH_BITMASK ((0xFFFF))
/********************************************************************//**
* I2C SCL LOW duty cycle Register definition
*********************************************************************/
/** I2C SCL LOW duty cycle Register bit mask */
#define I2C_I2SCLL_BITMASK ((0xFFFF))
/* I2C status values */
#define I2C_SETUP_STATUS_ARBF (1<<8) /**< Arbitration false */
#define I2C_SETUP_STATUS_NOACKF (1<<9) /**< No ACK returned */
#define I2C_SETUP_STATUS_DONE (1<<10) /**< Status DONE */
/*********************************************************************//**
* I2C monitor control configuration defines
**********************************************************************/
#define I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL /**< SCL output enable */
#define I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL /**< Select interrupt register match */
/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
/* Macros check I2C slave address */
#define PARAM_I2C_SLAVEADDR_CH(n) (n<=3)
/** Macro to determine if it is valid SSP port number */
#define PARAM_I2Cx(n) ((((uint32_t *)n)==((uint32_t *)LPC_I2C0)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_I2C1)))
/* Macros check I2C monitor configuration type */
#define PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup I2C_Public_Types I2C Public Types
* @{
*/
/**
* @brief I2C Own slave address setting structure
*/
typedef struct {
uint8_t SlaveAddrChannel; /**< Slave Address channel in I2C control,
should be in range from 0..3
*/
uint8_t SlaveAddr_7bit; /**< Value of 7-bit slave address */
uint8_t GeneralCallState; /**< Enable/Disable General Call Functionality
when I2C control being in Slave mode, should be:
- ENABLE: Enable General Call function.
- DISABLE: Disable General Call function.
*/
uint8_t SlaveAddrMaskValue; /**< Any bit in this 8-bit value (bit 7:1)
which is set to '1' will cause an automatic compare on
the corresponding bit of the received address when it
is compared to the SlaveAddr_7bit value associated with this
mask register. In other words, bits in SlaveAddr_7bit value
which are masked are not taken into account in determining
an address match
*/
} I2C_OWNSLAVEADDR_CFG_Type;
/**
* @brief Master transfer setup data structure definitions
*/
typedef struct
{
uint32_t sl_addr7bit; /**< Slave address in 7bit mode */
uint8_t* tx_data; /**< Pointer to Transmit data - NULL if data transmit
is not used */
uint32_t tx_length; /**< Transmit data length - 0 if data transmit
is not used*/
uint32_t tx_count; /**< Current Transmit data counter */
uint8_t* rx_data; /**< Pointer to Receive data - NULL if data receive
is not used */
uint32_t rx_length; /**< Receive data length - 0 if data receive is
not used */
uint32_t rx_count; /**< Current Receive data counter */
uint32_t retransmissions_max; /**< Max Re-Transmission value */
uint32_t retransmissions_count; /**< Current Re-Transmission counter */
uint32_t status; /**< Current status of I2C activity */
void (*callback)(void); /**< Pointer to Call back function when transmission complete
used in interrupt transfer mode */
} I2C_M_SETUP_Type;
/**
* @brief Slave transfer setup data structure definitions
*/
typedef struct
{
uint8_t* tx_data; /**< Pointer to transmit data - NULL if data transmit is not used */
uint32_t tx_length; /**< Transmit data length - 0 if data transmit is not used */
uint32_t tx_count; /**< Current transmit data counter */
uint8_t* rx_data; /**< Pointer to receive data - NULL if data received is not used */
uint32_t rx_length; /**< Receive data length - 0 if data receive is not used */
uint32_t rx_count; /**< Current receive data counter */
uint32_t status; /**< Current status of I2C activity */
void (*callback)(void); /**< Pointer to call-back function when transmission complete
used by interrupt transfer mode */
} I2C_S_SETUP_Type;
/**
* @brief Transfer option type definitions
*/
typedef enum {
I2C_TRANSFER_POLLING = 0, /**< Transfer in polling mode */
I2C_TRANSFER_INTERRUPT /**< Transfer in interrupt mode */
} I2C_TRANSFER_OPT_Type;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup I2C_Public_Functions I2C Public Functions
* @{
*/
/* I2C Init/DeInit functions ---------- */
void I2C_Init(LPC_I2Cn_Type *I2Cx, uint32_t clockrate);
void I2C_DeInit(LPC_I2Cn_Type* I2Cx);
//void I2C_SetClock (LPC_I2Cn_Type *I2Cx, uint32_t target_clock);
void I2C_Cmd(LPC_I2Cn_Type* I2Cx, FunctionalState NewState);
/* I2C transfer data functions -------- */
Status I2C_MasterTransferData(LPC_I2Cn_Type *I2Cx, \
I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt);
Status I2C_SlaveTransferData(LPC_I2Cn_Type *I2Cx, \
I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt);
uint32_t I2C_MasterTransferComplete(LPC_I2Cn_Type *I2Cx);
uint32_t I2C_SlaveTransferComplete(LPC_I2Cn_Type *I2Cx);
void I2C_SetOwnSlaveAddr(LPC_I2Cn_Type *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct);
uint8_t I2C_GetLastStatusCode(LPC_I2Cn_Type* I2Cx);
/* I2C Monitor functions ---------------*/
void I2C_MonitorModeConfig(LPC_I2Cn_Type *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState);
void I2C_MonitorModeCmd(LPC_I2Cn_Type *I2Cx, FunctionalState NewState);
uint8_t I2C_MonitorGetDatabuffer(LPC_I2Cn_Type *I2Cx);
BOOL_8 I2C_MonitorHandler(LPC_I2Cn_Type *I2Cx, uint8_t *buffer, uint32_t size);
/* I2C Interrupt handler functions ------*/
void I2C_IntCmd (LPC_I2Cn_Type *I2Cx, Bool NewState);
void I2C_MasterHandler (LPC_I2Cn_Type *I2Cx);
void I2C_SlaveHandler (LPC_I2Cn_Type *I2Cx);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_I2C_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,369 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_i2s.h 2011-06-02
*//**
* @file lpc18xx_i2s.h
* @brief Contains all macro definitions and function prototypes
* support for I2S firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup I2S I2S (Inter-IC Sound)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_I2S_H_
#define LPC18XX_I2S_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros ------------------------------------------------------------- */
/** @defgroup I2S_Private_Macros I2S Private Macros
* @{
*/
/*********************************************************************//**
* I2S configuration parameter defines
**********************************************************************/
/** I2S Wordwidth bit */
#define I2S_WORDWIDTH_8 ((uint32_t)(0))
#define I2S_WORDWIDTH_16 ((uint32_t)(1))
#define I2S_WORDWIDTH_32 ((uint32_t)(3))
/** I2S Channel bit */
#define I2S_STEREO ((uint32_t)(0))
#define I2S_MONO ((uint32_t)(1))
/** I2S Master/Slave mode bit */
#define I2S_MASTER_MODE ((uint8_t)(0))
#define I2S_SLAVE_MODE ((uint8_t)(1))
/** I2S Stop bit */
#define I2S_STOP_ENABLE ((uint8_t)(1))
#define I2S_STOP_DISABLE ((uint8_t)(0))
/** I2S Reset bit */
#define I2S_RESET_ENABLE ((uint8_t)(1))
#define I2S_RESET_DISABLE ((uint8_t)(0))
/** I2S Mute bit */
#define I2S_MUTE_ENABLE ((uint8_t)(1))
#define I2S_MUTE_DISABLE ((uint8_t)(0))
/** I2S Transmit/Receive bit */
#define I2S_TX_MODE ((uint8_t)(0))
#define I2S_RX_MODE ((uint8_t)(1))
/** I2S Clock Select bit */
#define I2S_CLKSEL_FRDCLK ((uint8_t)(0))
#define I2S_CLKSEL_MCLK ((uint8_t)(2))
/** I2S 4-pin Mode bit */
#define I2S_4PIN_ENABLE ((uint8_t)(1))
#define I2S_4PIN_DISABLE ((uint8_t)(0))
/** I2S MCLK Enable bit */
#define I2S_MCLK_ENABLE ((uint8_t)(1))
#define I2S_MCLK_DISABLE ((uint8_t)(0))
/** I2S select DMA bit */
#define I2S_DMA_1 ((uint8_t)(0))
#define I2S_DMA_2 ((uint8_t)(1))
/*********************************************************************//**
* Macro defines for DAO-Digital Audio Output register
**********************************************************************/
/** I2S wordwide - the number of bytes in data*/
#define I2S_DAO_WORDWIDTH_8 ((uint32_t)(0)) /** 8 bit */
#define I2S_DAO_WORDWIDTH_16 ((uint32_t)(1)) /** 16 bit */
#define I2S_DAO_WORDWIDTH_32 ((uint32_t)(3)) /** 32 bit */
/** I2S control mono or stereo format */
#define I2S_DAO_MONO ((uint32_t)(1<<2))
/** I2S control stop mode */
#define I2S_DAO_STOP ((uint32_t)(1<<3))
/** I2S control reset mode */
#define I2S_DAO_RESET ((uint32_t)(1<<4))
/** I2S control master/slave mode */
#define I2S_DAO_SLAVE ((uint32_t)(1<<5))
/** I2S word select half period minus one */
#define I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6))
/** I2S control mute mode */
#define I2S_DAO_MUTE ((uint32_t)(1<<15))
/*********************************************************************//**
* Macro defines for DAI-Digital Audio Input register
**********************************************************************/
/** I2S wordwide - the number of bytes in data*/
#define I2S_DAI_WORDWIDTH_8 ((uint32_t)(0)) /** 8 bit */
#define I2S_DAI_WORDWIDTH_16 ((uint32_t)(1)) /** 16 bit */
#define I2S_DAI_WORDWIDTH_32 ((uint32_t)(3)) /** 32 bit */
/** I2S control mono or stereo format */
#define I2S_DAI_MONO ((uint32_t)(1<<2))
/** I2S control stop mode */
#define I2S_DAI_STOP ((uint32_t)(1<<3))
/** I2S control reset mode */
#define I2S_DAI_RESET ((uint32_t)(1<<4))
/** I2S control master/slave mode */
#define I2S_DAI_SLAVE ((uint32_t)(1<<5))
/** I2S word select half period minus one (9 bits)*/
#define I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6))
/** I2S control mute mode */
#define I2S_DAI_MUTE ((uint32_t)(1<<15))
/*********************************************************************//**
* Macro defines for STAT register (Status Feedback register)
**********************************************************************/
/** I2S Status Receive or Transmit Interrupt */
#define I2S_STATE_IRQ ((uint32_t)(1))
/** I2S Status Receive or Transmit DMA1 */
#define I2S_STATE_DMA1 ((uint32_t)(1<<1))
/** I2S Status Receive or Transmit DMA2 */
#define I2S_STATE_DMA2 ((uint32_t)(1<<2))
/** I2S Status Current level of the Receive FIFO (5 bits)*/
#define I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8))
/** I2S Status Current level of the Transmit FIFO (5 bits)*/
#define I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16))
/*********************************************************************//**
* Macro defines for DMA1 register (DMA1 Configuration register)
**********************************************************************/
/** I2S control DMA1 for I2S receive */
#define I2S_DMA1_RX_ENABLE ((uint32_t)(1))
/** I2S control DMA1 for I2S transmit */
#define I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1))
/** I2S set FIFO level that trigger a receive DMA request on DMA1 */
#define I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
/** I2S set FIFO level that trigger a transmit DMA request on DMA1 */
#define I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
/*********************************************************************//**
* Macro defines for DMA2 register (DMA2 Configuration register)
**********************************************************************/
/** I2S control DMA2 for I2S receive */
#define I2S_DMA2_RX_ENABLE ((uint32_t)(1))
/** I2S control DMA1 for I2S transmit */
#define I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1))
/** I2S set FIFO level that trigger a receive DMA request on DMA1 */
#define I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
/** I2S set FIFO level that trigger a transmit DMA request on DMA1 */
#define I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
/*********************************************************************//**
* Macro defines for IRQ register (Interrupt Request Control register)
**********************************************************************/
/** I2S control I2S receive interrupt */
#define I2S_IRQ_RX_ENABLE ((uint32_t)(1))
/** I2S control I2S transmit interrupt */
#define I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1))
/** I2S set the FIFO level on which to create an irq request */
#define I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8))
/** I2S set the FIFO level on which to create an irq request */
#define I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16))
/********************************************************************************//**
* Macro defines for TXRATE/RXRATE register (Transmit/Receive Clock Rate register)
*********************************************************************************/
/** I2S Transmit MCLK rate denominator */
#define I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
/** I2S Transmit MCLK rate denominator */
#define I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
/** I2S Receive MCLK rate denominator */
#define I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF))
/** I2S Receive MCLK rate denominator */
#define I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8))
/*************************************************************************************//**
* Macro defines for TXBITRATE & RXBITRATE register (Transmit/Receive Bit Rate register)
**************************************************************************************/
#define I2S_TXBITRATE(n) ((uint32_t)(n&0x3F))
#define I2S_RXBITRATE(n) ((uint32_t)(n&0x3F))
/**********************************************************************************//**
* Macro defines for TXMODE/RXMODE register (Transmit/Receive Mode Control register)
************************************************************************************/
/** I2S Transmit select clock source (2 bits)*/
#define I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
/** I2S Transmit control 4-pin mode */
#define I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
/** I2S Transmit control the TX_MCLK output */
#define I2S_TXMODE_MCENA ((uint32_t)(1<<3))
/** I2S Receive select clock source */
#define I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03))
/** I2S Receive control 4-pin mode */
#define I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2))
/** I2S Receive control the TX_MCLK output */
#define I2S_RXMODE_MCENA ((uint32_t)(1<<3))
/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
/** Macro to determine if it is valid I2S peripheral */
#define PARAM_I2Sx(n) ((((uint32_t *)n)==((uint32_t *)LPC_I2S0)) || (((uint32_t *)n)==((uint32_t *)LPC_I2S1)))
/** Macro to check Data to send valid */
#define PRAM_I2S_FREQ(freq) ((freq>=8000)&&(freq <= 96000))
/* Macro check I2S word width type */
#define PARAM_I2S_WORDWIDTH(n) ((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\
||(n==I2S_WORDWIDTH_32))
/* Macro check I2S channel type */
#define PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO))
/* Macro check I2S master/slave mode */
#define PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n==I2S_SLAVE_MODE))
/* Macro check I2S stop mode */
#define PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE))
/* Macro check I2S reset mode */
#define PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE))
/* Macro check I2S reset mode */
#define PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE))
/* Macro check I2S transmit/receive mode */
#define PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE))
/* Macro check I2S clock select mode */
#define PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_FRDCLK)||(n==I2S_CLKSEL_MCLK))
/* Macro check I2S 4-pin mode */
#define PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE))
/* Macro check I2S MCLK mode */
#define PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE))
/* Macro check I2S DMA mode */
#define PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2))
/* Macro check I2S DMA depth value */
#define PARAM_I2S_DMA_DEPTH(n) ((n<=31))
/* Macro check I2S irq level value */
#define PARAM_I2S_IRQ_LEVEL(n) ((n<=31))
/* Macro check I2S half-period value */
#define PARAM_I2S_HALFPERIOD(n) ((n>0)&&(n<512))
/* Macro check I2S bit-rate value */
#define PARAM_I2S_BITRATE(n) ((n<=63))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup I2S_Public_Types I2S Public Types
* @{
*/
/**
* @brief I2S configuration structure definition
*/
typedef struct {
uint8_t wordwidth; /** the number of bytes in data as follow:
-I2S_WORDWIDTH_8: 8 bit data
-I2S_WORDWIDTH_16: 16 bit data
-I2S_WORDWIDTH_32: 32 bit data */
uint8_t mono; /** Set mono/stereo mode, should be:
- I2S_STEREO: stereo mode
- I2S_MONO: mono mode */
uint8_t stop; /** Disables accesses on FIFOs, should be:
- I2S_STOP_ENABLE: enable stop mode
- I2S_STOP_DISABLE: disable stop mode */
uint8_t reset; /** Asynchronously reset tje transmit channel and FIFO, should be:
- I2S_RESET_ENABLE: enable reset mode
- I2S_RESET_DISABLE: disable reset mode */
uint8_t ws_sel; /** Set Master/Slave mode, should be:
- I2S_MASTER_MODE: I2S master mode
- I2S_SLAVE_MODE: I2S slave mode */
uint8_t mute; /** MUTE mode: when true, the transmit channel sends only zeroes, shoule be:
- I2S_MUTE_ENABLE: enable mute mode
- I2S_MUTE_DISABLE: disable mute mode */
uint8_t Reserved0[2];
} I2S_CFG_Type;
/**
* @brief I2S DMA configuration structure definition
*/
typedef struct {
uint8_t DMAIndex; /** Select DMA1 or DMA2, should be:
- I2S_DMA_1: DMA1
- I2S_DMA_2: DMA2 */
uint8_t depth; /** FIFO level that triggers a DMA request */
uint8_t Reserved0[2];
}I2S_DMAConf_Type;
/**
* @brief I2S mode configuration structure definition
*/
typedef struct{
uint8_t clksel; /** Clock source selection, should be:
- I2S_CLKSEL_FRDCLK: Select the fractional rate divider clock output
- I2S_CLKSEL_MCLK: Select the MCLK signal as the clock source */
uint8_t fpin; /** Select four pin mode, should be:
- I2S_4PIN_ENABLE: 4-pin enable
- I2S_4PIN_DISABLE: 4-pin disable */
uint8_t mcena; /** Select MCLK mode, should be:
- I2S_MCLK_ENABLE: MCLK enable for output
- I2S_MCLK_DISABLE: MCLK disable for output */
uint8_t Reserved;
}I2S_MODEConf_Type;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup I2S_Public_Functions I2S Public Functions
* @{
*/
/* I2S Init/DeInit functions ---------*/
void I2S_Init(LPC_I2Sn_Type *I2Sx);
void I2S_DeInit(LPC_I2Sn_Type *I2Sx);
/* I2S configuration functions --------*/
void I2S_Config(LPC_I2Sn_Type *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct);
Status I2S_FreqConfig(LPC_I2Sn_Type *I2Sx, uint32_t Freq, uint8_t TRMode);
void I2S_SetBitRate(LPC_I2Sn_Type *I2Sx, uint8_t bitrate, uint8_t TRMode);
void I2S_ModeConfig(LPC_I2Sn_Type *I2Sx, I2S_MODEConf_Type* ModeConfig, uint8_t TRMode);
uint8_t I2S_GetLevel(LPC_I2Sn_Type *I2Sx, uint8_t TRMode);
/* I2S operate functions -------------*/
void I2S_Send(LPC_I2Sn_Type *I2Sx, uint32_t BufferData);
uint32_t I2S_Receive(LPC_I2Sn_Type* I2Sx);
void I2S_Start(LPC_I2Sn_Type *I2Sx);
void I2S_Pause(LPC_I2Sn_Type *I2Sx, uint8_t TRMode);
void I2S_Mute(LPC_I2Sn_Type *I2Sx, uint8_t TRMode);
void I2S_Stop(LPC_I2Sn_Type *I2Sx, uint8_t TRMode);
/* I2S DMA functions ----------------*/
void I2S_DMAConfig(LPC_I2Sn_Type *I2Sx, I2S_DMAConf_Type* DMAConfig, uint8_t TRMode);
void I2S_DMACmd(LPC_I2Sn_Type *I2Sx, uint8_t DMAIndex,uint8_t TRMode, FunctionalState NewState);
/* I2S IRQ functions ----------------*/
void I2S_IRQCmd(LPC_I2Sn_Type *I2Sx,uint8_t TRMode, FunctionalState NewState);
void I2S_IRQConfig(LPC_I2Sn_Type *I2Sx, uint8_t TRMode, uint8_t level);
FunctionalState I2S_GetIRQStatus(LPC_I2Sn_Type *I2Sx,uint8_t TRMode);
uint8_t I2S_GetIRQDepth(LPC_I2Sn_Type *I2Sx,uint8_t TRMode);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_I2S_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,224 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_lcd.h 2011-06-02
*//**
* @file lpc18xx_lcd.h
* @brief Contains all macro definitions and function prototypes
* support for LCD Driver
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup LCD LCD
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef __LPC18XX_LCD_H_
#define __LPC18XX_LCD_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros ------------------------------------------------------------- */
/** @defgroup LCD_Private_Macros LCD Private Macros
* @{
*/
/* --------------------- BIT DEFINITIONS -------------------------------------- */
/* LCD control enable bit */
#define CLCDC_LCDCTRL_ENABLE _BIT(0)
/* LCD control power enable bit */
#define CLCDC_LCDCTRL_PWR _BIT(11)
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup LCD_Public_Types LCD Public Types
* @{
*/
/*********************************************************************//**
* @brief LCD enumeration
**********************************************************************/
/** @brief LCD Interrupt Source */
typedef enum{
LCD_INT_FUF = _BIT(1), /* FIFO underflow bit */
LCD_INT_LNBU = _BIT(2), /* LCD next base address update bit */
LCD_INT_VCOMP = _BIT(3), /* vertical compare bit */
LCD_INT_BER = _BIT(4) /* AHB master error interrupt bit */
} LCD_INT_SRC;
/** @brief LCD signal polarity */
typedef enum {
LCD_SIGNAL_ACTIVE_HIGH = 0,
LCD_SIGNAL_ACTIVE_LOW = 1
} LCD_SIGNAL_POLARITY_OPT;
/** @brief LCD clock edge polarity */
typedef enum {
LCD_CLK_RISING = 0,
LCD_CLK_FALLING= 1
} LCD_CLK_EDGE_OPT;
/** @brief LCD bits per pixel and pixel format */
typedef enum {
LCD_BPP1 = 0,
LCD_BPP2,
LCD_BPP4,
LCD_BPP8,
LCD_BPP16,
LCD_BPP24,
LCD_BPP16_565,
LCD_BPP12_444
}LCD_PIXEL_FORMAT_OPT;
/** @brief LCD color format */
typedef enum {
LCD_COLOR_FORMAT_RGB = 0,
LCD_COLOR_FORMAT_BGR
}LCD_COLOR_FORMAT_OPT;
/*********************************************************************//**
* @brief LCD structure definitions
**********************************************************************/
/** @brief LCD Palette entry format */
typedef struct
{
uint32_t Rl:5;
uint32_t Gl:5;
uint32_t Bl:5;
uint32_t Il:1;
uint32_t Ru:5;
uint32_t Gu:5;
uint32_t Bu:5;
uint32_t Iu:1;
} LCD_PALETTE_ENTRY_Type;
/** @brief LCD cursor format in 1 byte LBBP */
typedef struct
{
uint8_t Pixel3:2;
uint8_t Pixel2:2;
uint8_t Pixel1:2;
uint8_t Pixel0:2;
} LCD_CURSOR_PIXEL_Type;
/** @brief LCD cursor size */
typedef enum
{
LCD_CURSOR_32x32 = 0,
LCD_CURSOR_64x64
} LCD_CURSOR_SIZE_OPT;
/** @brief LCD panel type */
typedef enum
{
LCD_TFT = 0x02, /* standard TFT */
LCD_MONO_4 = 0x01, /* 4-bit STN mono */
LCD_MONO_8 = 0x05, /* 8-bit STN mono */
LCD_CSTN = 0x00 /* color STN */
} LCD_PANEL_OPT;
/** @brief LCD porch configuration structure */
typedef struct {
uint16_t front; /* front porch setting in clocks */
uint16_t back; /* back porch setting in clocks */
}LCD_PORCHCFG_Type;
/** @brief LCD configuration structure */
typedef struct {
uint16_t screen_width; /* Pixels per line */
uint16_t screen_height; /* Lines per panel */
LCD_PORCHCFG_Type horizontal_porch; /* porch setting for horizontal */
LCD_PORCHCFG_Type vertical_porch; /* porch setting for vertical */
uint16_t HSync_pulse_width; /* HSYNC pulse width in clocks */
uint16_t VSync_pulse_width; /* VSYNC pulse width in clocks */
uint8_t ac_bias_frequency; /* AC bias frequency in clocks */
LCD_SIGNAL_POLARITY_OPT HSync_pol; /* HSYNC polarity */
LCD_SIGNAL_POLARITY_OPT VSync_pol; /* VSYNC polarity */
LCD_CLK_EDGE_OPT panel_clk_edge; /* Panel Clock Edge Polarity */
LCD_SIGNAL_POLARITY_OPT OE_pol; /* Output Enable polarity */
uint32_t line_end_delay; /* 0 if not use */
LCD_PIXEL_FORMAT_OPT bits_per_pixel; /* Maximum bits per pixel the display supports */
LCD_PANEL_OPT lcd_panel_type; /* LCD panel type */
LCD_COLOR_FORMAT_OPT color_format; /* BGR or RGB */
Bool dual_panel; /* Dual panel, TRUE = dual panel display */
uint16_t pcd;
} LCD_CFG_Type;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup LCD_Public_Functions LCD Public Functions
* @{
*/
void LCD_Init(LPC_LCD_Type *LCDx, LCD_CFG_Type *LCD_ConfigStruct);
void LCD_DeInit(LPC_LCD_Type *LCDx);
void LCD_Power(LPC_LCD_Type *LCDx, FunctionalState OnOff);
void LCD_Enable(LPC_LCD_Type *LCDx, FunctionalState EnDis);
void LCD_SetFrameBuffer(LPC_LCD_Type *LCDx, void* buffer);
void LCD_SetLPFrameBuffer(LPC_LCD_Type *LCDx, void* buffer);
void LCD_LoadPalette(LPC_LCD_Type *LCDx, void* palette);
void LCD_SetInterrupt(LPC_LCD_Type *LCDx, LCD_INT_SRC Int);
void LCD_ClrInterrupt(LPC_LCD_Type *LCDx, LCD_INT_SRC Int);
LCD_INT_SRC LCD_GetInterrupt(LPC_LCD_Type *LCDx);
void LCD_Cursor_Config(LPC_LCD_Type *LCDx, LCD_CURSOR_SIZE_OPT cursor_size, Bool sync);
void LCD_Cursor_WriteImage(LPC_LCD_Type *LCDx, uint8_t cursor_num, void* Image);
void* LCD_Cursor_GetImageBufferAddress(LPC_LCD_Type *LCDx, uint8_t cursor_num);
void LCD_Cursor_Enable(LPC_LCD_Type *LCDx, uint8_t cursor_num, FunctionalState OnOff);
void LCD_Cursor_LoadPalette0(LPC_LCD_Type *LCDx, uint32_t palette_color);
void LCD_Cursor_LoadPalette1(LPC_LCD_Type *LCDx, uint32_t palette_color);
void LCD_Cursor_SetInterrupt(LPC_LCD_Type *LCDx);
void LCD_Cursor_ClrInterrupt(LPC_LCD_Type *LCDx);
void LCD_Cursor_SetPos(LPC_LCD_Type *LCDx, uint16_t x, uint16_t y);
void LCD_Cursor_SetClipPos(LPC_LCD_Type *LCDx, uint16_t x, uint16_t y);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __LPC18XX_LCD_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,192 +0,0 @@
/*
* Modified for Code Red tools to prevent redefinition of DEBUG macro
* 2011/12/29
*/
/**********************************************************************
* $Id$ lpc18xx_libcfg_default.h 2011-06-02
*//**
* @file lpc18xx_libcfg_default.h
* @brief Default Library configuration header file
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Library Configuration group ----------------------------------------------------------- */
/** @defgroup LIBCFG_DEFAULT LIBCFG_DEFAULT
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_LIBCFG_DEFAULT_H_
#define LPC18XX_LIBCFG_DEFAULT_H_
/* Includes ------------------------------------------------------------------- */
#include "lpc_types.h"
/* Public Macros -------------------------------------------------------------- */
/** @defgroup LIBCFG_DEFAULT_Public_Macros LIBCFG_DEFAULT Public Macros
* @{
*/
/************************** DEBUG MODE DEFINITIONS *********************************/
/* Un-comment the line below to compile the library in DEBUG mode, this will expanse
the "CHECK_PARAM" macro in the FW library code */
#ifndef __CODE_RED
#define DEBUG
#endif
/******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/
/* Comment the line below to disable the specific peripheral inclusion */
/* GPIO ------------------------------- */
#define _GPIO
/* EXTI ------------------------------- */
#define _EXTI
/* UART ------------------------------- */
#define _UART
#define _UART0
#define _UART1
#define _UART2
#define _UART3
/* SPI ------------------------------- */
#define _SPI
/* SYSTICK --------------------------- */
#define _SYSTICK
/* SSP ------------------------------- */
#define _SSP
#define _SSP0
#define _SSP1
/* I2C ------------------------------- */
#define _I2C
#define _I2C0
#define _I2C1
#define _I2C2
/* TIMER ------------------------------- */
#define _TIM
/* WWDT ------------------------------- */
#define _WWDT
/* GPDMA ------------------------------- */
#define _GPDMA
/* DAC ------------------------------- */
#define _DAC
/* DAC ------------------------------- */
#define _ADC
/* PWM ------------------------------- */
#define _PWM
#define _PWM1
/* RTC ------------------------------- */
#define _RTC
/* I2S ------------------------------- */
#define _I2S
/* USB device ------------------------------- */
#define _USBDEV
#define _USB_DMA
/* QEI ------------------------------- */
#define _QEI
/* MCPWM ------------------------------- */
#define _MCPWM
/* CAN--------------------------------*/
#define _C_CAN
/* RIT ------------------------------- */
#define _RIT
/* EMAC ------------------------------ */
#define _EMAC
/* SCT ------------------------------ */
#define _SCT
/* LCD ------------------------------ */
#define _LCD
/* ATIMER ------------------------------ */
#define _ATIMER
/* RGU ------------------------------ */
#define _RGU
/************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/
#ifdef DEBUG
/*******************************************************************************
* @brief The CHECK_PARAM macro is used for function's parameters check.
* It is used only if the library is compiled in DEBUG mode.
* @param[in] expr - If expr is false, it calls check_failed() function
* which reports the name of the source file and the source
* line number of the call that failed.
* - If expr is true, it returns no value.
* @return None
*******************************************************************************/
#define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__))
#else
#define CHECK_PARAM(expr)
#endif /* DEBUG */
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup LIBCFG_DEFAULT_Public_Functions LIBCFG_DEFAULT Public Functions
* @{
*/
#ifdef DEBUG
void check_failed(uint8_t *file, uint32_t line);
#endif
/**
* @}
*/
#endif /* LPC18XX_LIBCFG_DEFAULT_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,338 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_mcpwm.h 2011-06-02
*//**
* @file lpc18xx_mcpwm.h
* @brief Contains all macro definitions and function prototypes
* support for Motor Control PWM firmware library on LPC18XX
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup MCPWM MCPWM (Motor Control PWM)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_MCPWM_H_
#define LPC18XX_MCPWM_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros ------------------------------------------------------------- */
/** @defgroup MCPWM_Private_Macros MCPWM Private Macros
* @{
*/
/** Edge aligned mode for channel in MCPWM */
#define MCPWM_CHANNEL_EDGE_MODE ((uint32_t)(0))
/** Center aligned mode for channel in MCPWM */
#define MCPWM_CHANNEL_CENTER_MODE ((uint32_t)(1))
/** Polarity of the MCOA and MCOB pins: Passive state is LOW, active state is HIGH */
#define MCPWM_CHANNEL_PASSIVE_LO ((uint32_t)(0))
/** Polarity of the MCOA and MCOB pins: Passive state is HIGH, active state is LOW */
#define MCPWM_CHANNEL_PASSIVE_HI ((uint32_t)(1))
/* Output Patent in 3-phase DC mode, the internal MCOA0 signal is routed to any or all of
* the six output pins under the control of the bits in this register */
#define MCPWM_PATENT_A0 ((uint32_t)(1<<0)) /**< MCOA0 tracks internal MCOA0 */
#define MCPWM_PATENT_B0 ((uint32_t)(1<<1)) /**< MCOB0 tracks internal MCOA0 */
#define MCPWM_PATENT_A1 ((uint32_t)(1<<2)) /**< MCOA1 tracks internal MCOA0 */
#define MCPWM_PATENT_B1 ((uint32_t)(1<<3)) /**< MCOB1 tracks internal MCOA0 */
#define MCPWM_PATENT_A2 ((uint32_t)(1<<4)) /**< MCOA2 tracks internal MCOA0 */
#define MCPWM_PATENT_B2 ((uint32_t)(1<<5)) /**< MCOB2 tracks internal MCOA0 */
/* Interrupt type in MCPWM */
/** Limit interrupt for channel (0) */
#define MCPWM_INTFLAG_LIM0 MCPWM_INT_ILIM(0)
/** Match interrupt for channel (0) */
#define MCPWM_INTFLAG_MAT0 MCPWM_INT_IMAT(0)
/** Capture interrupt for channel (0) */
#define MCPWM_INTFLAG_CAP0 MCPWM_INT_ICAP(0)
/** Limit interrupt for channel (1) */
#define MCPWM_INTFLAG_LIM1 MCPWM_INT_ILIM(1)
/** Match interrupt for channel (1) */
#define MCPWM_INTFLAG_MAT1 MCPWM_INT_IMAT(1)
/** Capture interrupt for channel (1) */
#define MCPWM_INTFLAG_CAP1 MCPWM_INT_ICAP(1)
/** Limit interrupt for channel (2) */
#define MCPWM_INTFLAG_LIM2 MCPWM_INT_ILIM(2)
/** Match interrupt for channel (2) */
#define MCPWM_INTFLAG_MAT2 MCPWM_INT_IMAT(2)
/** Capture interrupt for channel (2) */
#define MCPWM_INTFLAG_CAP2 MCPWM_INT_ICAP(2)
/** Fast abort interrupt */
#define MCPWM_INTFLAG_ABORT MCPWM_INT_ABORT
/*********************************************************************//**
* Macro defines for MCPWM Control register
**********************************************************************/
/* MCPWM Control register, these macro definitions below can be applied for these
* register type:
* - MCPWM Control read address
* - MCPWM Control set address
* - MCPWM Control clear address
*/
/**< Stops/starts timer channel n */
#define MCPWM_CON_RUN(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*8)+0))) : (0))
/**< Edge/center aligned operation for channel n */
#define MCPWM_CON_CENTER(n) (((n<=2)) ? ((uint32_t)(1<<((n*8)+1))) : (0))
/**< Select polarity of the MCOAn and MCOBn pin */
#define MCPWM_CON_POLAR(n) (((n<=2)) ? ((uint32_t)(1<<((n*8)+2))) : (0))
/**< Control the dead-time feature for channel n */
#define MCPWM_CON_DTE(n) (((n<=2)) ? ((uint32_t)(1<<((n*8)+3))) : (0))
/**< Enable/Disable update of functional register for channel n */
#define MCPWM_CON_DISUP(n) (((n<=2)) ? ((uint32_t)(1<<((n*8)+4))) : (0))
/**< Control the polarity for all 3 channels */
#define MCPWM_CON_INVBDC ((uint32_t)(1<<29))
/**< 3-phase AC mode select */
#define MCPWM_CON_ACMODE ((uint32_t)(1<<30))
/**< 3-phase DC mode select */
#define MCPWM_CON_DCMODE (((uint32_t)1<<31))
/*********************************************************************//**
* Macro defines for MCPWM Capture Control register
**********************************************************************/
/* Capture Control register, these macro definitions below can be applied for these
* register type:
* - MCPWM Capture Control read address
* - MCPWM Capture Control set address
* - MCPWM Capture control clear address
*/
/** Enables/Disable channel (cap) capture event on a rising edge on MCI(mci) */
#define MCPWM_CAPCON_CAPMCI_RE(cap,mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0))
/** Enables/Disable channel (cap) capture event on a falling edge on MCI(mci) */
#define MCPWM_CAPCON_CAPMCI_FE(cap,mci) (((cap<=2)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0))
/** TC(n) is reset by channel (n) capture event */
#define MCPWM_CAPCON_RT(n) (((n<=2)) ? ((uint32_t)(1<<(18+(n)))) : (0))
/** Hardware noise filter: channel (n) capture events are delayed */
#define MCPWM_CAPCON_HNFCAP(n) (((n<=2)) ? ((uint32_t)(1<<(21+(n)))) : (0))
/*********************************************************************//**
* Macro defines for MCPWM Interrupt register
**********************************************************************/
/* Interrupt registers, these macro definitions below can be applied for these
* register type:
* - MCPWM Interrupt Enable read address
* - MCPWM Interrupt Enable set address
* - MCPWM Interrupt Enable clear address
* - MCPWM Interrupt Flags read address
* - MCPWM Interrupt Flags set address
* - MCPWM Interrupt Flags clear address
*/
/** Limit interrupt for channel (n) */
#define MCPWM_INT_ILIM(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0))
/** Match interrupt for channel (n) */
#define MCPWM_INT_IMAT(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0))
/** Capture interrupt for channel (n) */
#define MCPWM_INT_ICAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0))
/** Fast abort interrupt */
#define MCPWM_INT_ABORT ((uint32_t)(1<<15))
/*********************************************************************//**
* Macro defines for MCPWM Count Control register
**********************************************************************/
/* MCPWM Count Control register, these macro definitions below can be applied for these
* register type:
* - MCPWM Count Control read address
* - MCPWM Count Control set address
* - MCPWM Count Control clear address
*/
/** Counter(tc) advances on a rising edge on MCI(mci) pin */
#define MCPWM_CNTCON_TCMCI_RE(tc,mci) (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0))
/** Counter(cnt) advances on a falling edge on MCI(mci) pin */
#define MCPWM_CNTCON_TCMCI_FE(tc,mci) (((tc<=2)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0))
/** Channel (n) is in counter mode */
#define MCPWM_CNTCON_CNTR(n) (((n<=2)) ? ((uint32_t)(1<<(29+n))) : (0))
/*********************************************************************//**
* Macro defines for MCPWM Dead-time register
**********************************************************************/
/** Dead time value x for channel n */
#define MCPWM_DT(n,x) (((n<=2)) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0))
/*********************************************************************//**
* Macro defines for MCPWM Communication Pattern register
**********************************************************************/
#define MCPWM_CP_A0 ((uint32_t)(1<<0)) /**< MCOA0 tracks internal MCOA0 */
#define MCPWM_CP_B0 ((uint32_t)(1<<1)) /**< MCOB0 tracks internal MCOA0 */
#define MCPWM_CP_A1 ((uint32_t)(1<<2)) /**< MCOA1 tracks internal MCOA0 */
#define MCPWM_CP_B1 ((uint32_t)(1<<3)) /**< MCOB1 tracks internal MCOA0 */
#define MCPWM_CP_A2 ((uint32_t)(1<<4)) /**< MCOA2 tracks internal MCOA0 */
#define MCPWM_CP_B2 ((uint32_t)(1<<5)) /**< MCOB2 tracks internal MCOA0 */
/*********************************************************************//**
* Macro defines for MCPWM Capture clear address register
**********************************************************************/
/** Clear the MCCAP (n) register */
#define MCPWM_CAPCLR_CAP(n) (((n<=2)) ? ((uint32_t)(1<<n)) : (0))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup MCPWM_Public_Types MCPWM Public Types
* @{
*/
/*********************************************************************//**
* @brief MCPWM enumeration
**********************************************************************/
/**
* @brief MCPWM channel identifier definition
*/
typedef enum
{
MCPWM_CHANNEL_0 = 0, /**< MCPWM channel 0 */
MCPWM_CHANNEL_1, /**< MCPWM channel 1 */
MCPWM_CHANNEL_2 /**< MCPWM channel 2 */
} en_MCPWM_Channel_Id;
/*********************************************************************//**
* @brief MCPWM structure definitions
**********************************************************************/
/**
* @brief Motor Control PWM Channel Configuration structure type definition
*/
typedef struct {
uint32_t channelType; /**< Edge/center aligned mode for this channel,
should be:
- MCPWM_CHANNEL_EDGE_MODE: Channel is in Edge mode
- MCPWM_CHANNEL_CENTER_MODE: Channel is in Center mode
*/
uint32_t channelPolarity; /**< Polarity of the MCOA and MCOB pins, should be:
- MCPWM_CHANNEL_PASSIVE_LO: Passive state is LOW, active state is HIGH
- MCPWM_CHANNEL_PASSIVE_HI: Passive state is HIGH, active state is LOW
*/
uint32_t channelDeadtimeEnable; /**< Enable/Disable DeadTime function for channel, should be:
- ENABLE.
- DISABLE.
*/
uint32_t channelDeadtimeValue; /**< DeadTime value, should be less than 0x3FF */
uint32_t channelUpdateEnable; /**< Enable/Disable updates of functional registers,
should be:
- ENABLE.
- DISABLE.
*/
uint32_t channelTimercounterValue; /**< MCPWM Timer Counter value */
uint32_t channelPeriodValue; /**< MCPWM Period value */
uint32_t channelPulsewidthValue; /**< MCPWM Pulse Width value */
} MCPWM_CHANNEL_CFG_Type;
/**
* @brief MCPWM Capture Configuration type definition
*/
typedef struct {
uint32_t captureChannel; /**< Capture Channel Number, should be in range from 0 to 2 */
uint32_t captureRising; /**< Enable/Disable Capture on Rising Edge event, should be:
- ENABLE.
- DISABLE.
*/
uint32_t captureFalling; /**< Enable/Disable Capture on Falling Edge event, should be:
- ENABLE.
- DISABLE.
*/
uint32_t timerReset; /**< Enable/Disable Timer reset function an capture, should be:
- ENABLE.
- DISABLE.
*/
uint32_t hnfEnable; /**< Enable/Disable Hardware noise filter function, should be:
- ENABLE.
- DISABLE.
*/
} MCPWM_CAPTURE_CFG_Type;
/**
* @brief MCPWM Count Control Configuration type definition
*/
typedef struct {
uint32_t counterChannel; /**< Counter Channel Number, should be in range from 0 to 2 */
uint32_t countRising; /**< Enable/Disable Capture on Rising Edge event, should be:
- ENABLE.
- DISABLE.
*/
uint32_t countFalling; /**< Enable/Disable Capture on Falling Edge event, should be:
- ENABLE.
- DISABLE.
*/
} MCPWM_COUNT_CFG_Type;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup MCPWM_Public_Functions MCPWM Public Functions
* @{
*/
void MCPWM_Init(LPC_MCPWM_Type *MCPWMx);
void MCPWM_ConfigChannel(LPC_MCPWM_Type *MCPWMx, uint32_t channelNum,
MCPWM_CHANNEL_CFG_Type * channelSetup);
void MCPWM_WriteToShadow(LPC_MCPWM_Type *MCPWMx, uint32_t channelNum,
MCPWM_CHANNEL_CFG_Type *channelSetup);
void MCPWM_ConfigCapture(LPC_MCPWM_Type *MCPWMx, uint32_t channelNum,
MCPWM_CAPTURE_CFG_Type *captureConfig);
void MCPWM_ClearCapture(LPC_MCPWM_Type *MCPWMx, uint32_t captureChannel);
uint32_t MCPWM_GetCapture(LPC_MCPWM_Type *MCPWMx, uint32_t captureChannel);
void MCPWM_CountConfig(LPC_MCPWM_Type *MCPWMx, uint32_t channelNum,
uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig);
void MCPWM_Start(LPC_MCPWM_Type *MCPWMx,uint32_t channel0, uint32_t channel1, uint32_t channel2);
void MCPWM_Stop(LPC_MCPWM_Type *MCPWMx,uint32_t channel0, uint32_t channel1, uint32_t channel2);
void MCPWM_ACMode(LPC_MCPWM_Type *MCPWMx,uint32_t acMode);
void MCPWM_DCMode(LPC_MCPWM_Type *MCPWMx, uint32_t dcMode,
uint32_t outputInvered, uint32_t outputPattern);
void MCPWM_IntConfig(LPC_MCPWM_Type *MCPWMx, uint32_t ulIntType, FunctionalState NewState);
void MCPWM_IntSet(LPC_MCPWM_Type *MCPWMx, uint32_t ulIntType);
void MCPWM_IntClear(LPC_MCPWM_Type *MCPWMx, uint32_t ulIntType);
FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_Type *MCPWMx, uint32_t ulIntType);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_MCPWM_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,68 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_nvic.h 2011-06-02
*//**
* @file lpc18xx_nvic.h
* @brief Contains all macro definitions and function prototypes
* support for Nesting Vectored Interrupt firmware library
* on LPC18XX
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup NVIC NVIC (Nested Vector Interrupt Controller)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_NVIC_H_
#define LPC18XX_NVIC_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Functions ----------------------------------------------------------- */
/** @defgroup NVIC_Public_Functions NVIC Public Functions
* @{
*/
void NVIC_SetVTOR(uint32_t offset);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_NVIC_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,83 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_pwr.h 2011-06-02
*//**
* @file lpc18xx_pwr.h
* @brief Contains all macro definitions and function prototypes
* support for Power Control firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup PWR PWR (Power Control)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_PWR_H_
#define LPC18XX_PWR_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Macros -------------------------------------------------------------- */
/** @defgroup PWR_Private_Macros PWR Private Macros
* @{
*/
#define PWR_SLEEP_MODE_DEEP_SLEEP 0x3F00AA
#define PWR_SLEEP_MODE_POWER_DOWN 0x30FCBA
#define PWR_SLEEP_MODE_DEEP_POWER_DOWN 0x3FFF7F
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup PWR_Public_Functions PWR Public Functions
* @{
*/
/* Clock Generator */
void PWR_Sleep(void);
void PWR_DeepSleep(void);
void PWR_PowerDown(void);
void PWR_DeepPowerDown(void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_PWR_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,426 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_qei.h 2011-06-02
*//**
* @file lpc18xx_qei.h
* @brief Contains all macro definitions and function prototypes
* support for QEI firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup QEI QEI (Quadrature Encoder Interface)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_QEI_H_
#define LPC18XX_QEI_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Macros -------------------------------------------------------------- */
/** @defgroup QEI_Private_Macros QEI Private Macros
* @{
*/
/** QEI peripheral numver definition */
#define QEI_0 (0) /** Always 0 - because we just have only one QEI peripheral */
/** QEI Reset types */
#define QEI_RESET_POS QEI_CON_RESP /**< Reset position counter */
#define QEI_RESET_POSOnIDX QEI_CON_RESPI /**< Reset Posistion Counter on Index */
#define QEI_RESET_VEL QEI_CON_RESV /**< Reset Velocity */
#define QEI_RESET_IDX QEI_CON_RESI /**< Reset Index Counter */
/** QEI Direction Invert Type Option */
#define QEI_DIRINV_NONE ((uint32_t)(0)) /**< Direction is not inverted */
#define QEI_DIRINV_CMPL ((uint32_t)(1)) /**< Direction is complemented */
/** QEI Signal Mode Option */
#define QEI_SIGNALMODE_QUAD ((uint32_t)(0)) /**< Signal operation: Quadrature phase mode */
#define QEI_SIGNALMODE_CLKDIR ((uint32_t)(1)) /**< Signal operation: Clock/Direction mode */
/** QEI Capture Mode Option */
#define QEI_CAPMODE_2X ((uint32_t)(0)) /**< Capture mode: Only Phase-A edges are counted (2X) */
#define QEI_CAPMODE_4X ((uint32_t)(1)) /**< Capture mode: BOTH PhA and PhB edges are counted (4X)*/
/** QEI Invert Index Signal Option */
#define QEI_INVINX_NONE ((uint32_t)(0)) /**< Invert Index signal option: None */
#define QEI_INVINX_EN ((uint32_t)(1)) /**< Invert Index signal option: Enable */
/** QEI timer reload option */
#define QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0)) /**< Reload value in absolute value */
#define QEI_TIMERRELOAD_USVAL ((uint8_t)(1)) /**< Reload value in microsecond value */
/** QEI Flag Status type */
#define QEI_STATUS_DIR ((uint32_t)(1<<0)) /**< Direction status */
/** QEI Compare Position channel option */
#define QEI_COMPPOS_CH_0 ((uint8_t)(0)) /**< QEI compare position channel 0 */
#define QEI_COMPPOS_CH_1 ((uint8_t)(1)) /**< QEI compare position channel 1 */
#define QEI_COMPPOS_CH_2 ((uint8_t)(2)) /**< QEI compare position channel 2 */
/** QEI interrupt flag type */
#define QEI_INTFLAG_INX_Int ((uint32_t)(1<<0)) /**< index pulse was detected interrupt */
#define QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1)) /**< Velocity timer over flow interrupt */
#define QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2)) /**< Capture velocity is less than compare interrupt */
#define QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3)) /**< Change of direction interrupt */
#define QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4)) /**< An encoder phase error interrupt */
#define QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5)) /**< An encoder clock pulse was detected interrupt */
#define QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6)) /**< position 0 compare value is equal to the
current position interrupt */
#define QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7)) /**< position 1 compare value is equal to the
current position interrupt */
#define QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8)) /**< position 2 compare value is equal to the
current position interrupt */
#define QEI_INTFLAG_REV_Int ((uint32_t)(1<<9)) /**< Index compare value is equal to the current
index count interrupt */
#define QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10)) /**< Combined position 0 and revolution count interrupt */
#define QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11)) /**< Combined position 1 and revolution count interrupt */
#define QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12)) /**< Combined position 2 and revolution count interrupt */
/* --------------------- BIT DEFINITIONS -------------------------------------- */
/* Quadrature Encoder Interface Control Register Definition --------------------- */
/*********************************************************************//**
* Macro defines for QEI Control register
**********************************************************************/
#define QEI_CON_RESP ((uint32_t)(1<<0)) /**< Reset position counter */
#define QEI_CON_RESPI ((uint32_t)(1<<1)) /**< Reset Posistion Counter on Index */
#define QEI_CON_RESV ((uint32_t)(1<<2)) /**< Reset Velocity */
#define QEI_CON_RESI ((uint32_t)(1<<3)) /**< Reset Index Counter */
#define QEI_CON_BITMASK ((uint32_t)(0x0F)) /**< QEI Control register bit-mask */
/*********************************************************************//**
* Macro defines for QEI Configuration register
**********************************************************************/
#define QEI_CONF_DIRINV ((uint32_t)(1<<0)) /**< Direction Invert */
#define QEI_CONF_SIGMODE ((uint32_t)(1<<1)) /**< Signal mode */
#define QEI_CONF_CAPMODE ((uint32_t)(1<<2)) /**< Capture mode */
#define QEI_CONF_INVINX ((uint32_t)(1<<3)) /**< Invert index */
#define QEI_CONF_BITMASK ((uint32_t)(0x0F)) /**< QEI Configuration register bit-mask */
/*********************************************************************//**
* Macro defines for QEI Status register
**********************************************************************/
#define QEI_STAT_DIR ((uint32_t)(1<<0)) /**< Direction bit */
#define QEI_STAT_BITMASK ((uint32_t)(1<<0)) /**< QEI status register bit-mask */
/* Quadrature Encoder Interface Interrupt registers definitions --------------------- */
/*********************************************************************//**
* Macro defines for QEI Interrupt Status register
**********************************************************************/
#define QEI_INTSTAT_INX_Int ((uint32_t)(1<<0)) /**< Indicates that an index pulse was detected */
#define QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1)) /**< Indicates that a velocity timer overflow occurred */
#define QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2)) /**< Indicates that capture velocity is less than compare velocity */
#define QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3)) /**< Indicates that a change of direction was detected */
#define QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4)) /**< Indicates that an encoder phase error was detected */
#define QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5)) /**< Indicates that and encoder clock pulse was detected */
#define QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6)) /**< Indicates that the position 0 compare value is equal to the
current position */
#define QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7)) /**< Indicates that the position 1compare value is equal to the
current position */
#define QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8)) /**< Indicates that the position 2 compare value is equal to the
current position */
#define QEI_INTSTAT_REV_Int ((uint32_t)(1<<9)) /**< Indicates that the index compare value is equal to the current
index count */
#define QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10)) /**< Combined position 0 and revolution count interrupt. Set when
both the POS0_Int bit is set and the REV_Int is set */
#define QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11)) /**< Combined position 1 and revolution count interrupt. Set when
both the POS1_Int bit is set and the REV_Int is set */
#define QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12)) /**< Combined position 2 and revolution count interrupt. Set when
both the POS2_Int bit is set and the REV_Int is set */
#define QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Status register bit-mask */
/*********************************************************************//**
* Macro defines for QEI Interrupt Set register
**********************************************************************/
#define QEI_INTSET_INX_Int ((uint32_t)(1<<0)) /**< Set Bit Indicates that an index pulse was detected */
#define QEI_INTSET_TIM_Int ((uint32_t)(1<<1)) /**< Set Bit Indicates that a velocity timer overflow occurred */
#define QEI_INTSET_VELC_Int ((uint32_t)(1<<2)) /**< Set Bit Indicates that capture velocity is less than compare velocity */
#define QEI_INTSET_DIR_Int ((uint32_t)(1<<3)) /**< Set Bit Indicates that a change of direction was detected */
#define QEI_INTSET_ERR_Int ((uint32_t)(1<<4)) /**< Set Bit Indicates that an encoder phase error was detected */
#define QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5)) /**< Set Bit Indicates that and encoder clock pulse was detected */
#define QEI_INTSET_POS0_Int ((uint32_t)(1<<6)) /**< Set Bit Indicates that the position 0 compare value is equal to the
current position */
#define QEI_INTSET_POS1_Int ((uint32_t)(1<<7)) /**< Set Bit Indicates that the position 1compare value is equal to the
current position */
#define QEI_INTSET_POS2_Int ((uint32_t)(1<<8)) /**< Set Bit Indicates that the position 2 compare value is equal to the
current position */
#define QEI_INTSET_REV_Int ((uint32_t)(1<<9)) /**< Set Bit Indicates that the index compare value is equal to the current
index count */
#define QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10)) /**< Set Bit that combined position 0 and revolution count interrupt */
#define QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11)) /**< Set Bit that Combined position 1 and revolution count interrupt */
#define QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12)) /**< Set Bit that Combined position 2 and revolution count interrupt */
#define QEI_INTSET_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Set register bit-mask */
/*********************************************************************//**
* Macro defines for QEI Interrupt Clear register
**********************************************************************/
#define QEI_INTCLR_INX_Int ((uint32_t)(1<<0)) /**< Clear Bit Indicates that an index pulse was detected */
#define QEI_INTCLR_TIM_Int ((uint32_t)(1<<1)) /**< Clear Bit Indicates that a velocity timer overflow occurred */
#define QEI_INTCLR_VELC_Int ((uint32_t)(1<<2)) /**< Clear Bit Indicates that capture velocity is less than compare velocity */
#define QEI_INTCLR_DIR_Int ((uint32_t)(1<<3)) /**< Clear Bit Indicates that a change of direction was detected */
#define QEI_INTCLR_ERR_Int ((uint32_t)(1<<4)) /**< Clear Bit Indicates that an encoder phase error was detected */
#define QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5)) /**< Clear Bit Indicates that and encoder clock pulse was detected */
#define QEI_INTCLR_POS0_Int ((uint32_t)(1<<6)) /**< Clear Bit Indicates that the position 0 compare value is equal to the
current position */
#define QEI_INTCLR_POS1_Int ((uint32_t)(1<<7)) /**< Clear Bit Indicates that the position 1compare value is equal to the
current position */
#define QEI_INTCLR_POS2_Int ((uint32_t)(1<<8)) /**< Clear Bit Indicates that the position 2 compare value is equal to the
current position */
#define QEI_INTCLR_REV_Int ((uint32_t)(1<<9)) /**< Clear Bit Indicates that the index compare value is equal to the current
index count */
#define QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10)) /**< Clear Bit that combined position 0 and revolution count interrupt */
#define QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11)) /**< Clear Bit that Combined position 1 and revolution count interrupt */
#define QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12)) /**< Clear Bit that Combined position 2 and revolution count interrupt */
#define QEI_INTCLR_BITMASK ((uint32_t)(0xFFFF)) /**< QEI Interrupt Clear register bit-mask */
/*********************************************************************//**
* Macro defines for QEI Interrupt Enable register
**********************************************************************/
#define QEI_INTEN_INX_Int ((uint32_t)(1<<0)) /**< Enabled Interrupt Bit Indicates that an index pulse was detected */
#define QEI_INTEN_TIM_Int ((uint32_t)(1<<1)) /**< Enabled Interrupt Bit Indicates that a velocity timer overflow occurred */
#define QEI_INTEN_VELC_Int ((uint32_t)(1<<2)) /**< Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity */
#define QEI_INTEN_DIR_Int ((uint32_t)(1<<3)) /**< Enabled Interrupt Bit Indicates that a change of direction was detected */
#define QEI_INTEN_ERR_Int ((uint32_t)(1<<4)) /**< Enabled Interrupt Bit Indicates that an encoder phase error was detected */
#define QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5)) /**< Enabled Interrupt Bit Indicates that and encoder clock pulse was detected */
#define QEI_INTEN_POS0_Int ((uint32_t)(1<<6)) /**< Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the
current position */
#define QEI_INTEN_POS1_Int ((uint32_t)(1<<7)) /**< Enabled Interrupt Bit Indicates that the position 1compare value is equal to the
current position */
#define QEI_INTEN_POS2_Int ((uint32_t)(1<<8)) /**< Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the
current position */
#define QEI_INTEN_REV_Int ((uint32_t)(1<<9)) /**< Enabled Interrupt Bit Indicates that the index compare value is equal to the current
index count */
#define QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10)) /**< Enabled Interrupt Bit that combined position 0 and revolution count interrupt */
#define QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11)) /**< Enabled Interrupt Bit that Combined position 1 and revolution count interrupt */
#define QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12)) /**< Enabled Interrupt Bit that Combined position 2 and revolution count interrupt */
#define QEI_INTEN_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable register bit-mask */
/*********************************************************************//**
* Macro defines for QEI Interrupt Enable Set register
**********************************************************************/
#define QEI_IESET_INX_Int ((uint32_t)(1<<0)) /**< Set Enable Interrupt Bit Indicates that an index pulse was detected */
#define QEI_IESET_TIM_Int ((uint32_t)(1<<1)) /**< Set Enable Interrupt Bit Indicates that a velocity timer overflow occurred */
#define QEI_IESET_VELC_Int ((uint32_t)(1<<2)) /**< Set Enable Interrupt Bit Indicates that capture velocity is less than compare velocity */
#define QEI_IESET_DIR_Int ((uint32_t)(1<<3)) /**< Set Enable Interrupt Bit Indicates that a change of direction was detected */
#define QEI_IESET_ERR_Int ((uint32_t)(1<<4)) /**< Set Enable Interrupt Bit Indicates that an encoder phase error was detected */
#define QEI_IESET_ENCLK_Int ((uint32_t)(1<<5)) /**< Set Enable Interrupt Bit Indicates that and encoder clock pulse was detected */
#define QEI_IESET_POS0_Int ((uint32_t)(1<<6)) /**< Set Enable Interrupt Bit Indicates that the position 0 compare value is equal to the
current position */
#define QEI_IESET_POS1_Int ((uint32_t)(1<<7)) /**< Set Enable Interrupt Bit Indicates that the position 1compare value is equal to the
current position */
#define QEI_IESET_POS2_Int ((uint32_t)(1<<8)) /**< Set Enable Interrupt Bit Indicates that the position 2 compare value is equal to the
current position */
#define QEI_IESET_REV_Int ((uint32_t)(1<<9)) /**< Set Enable Interrupt Bit Indicates that the index compare value is equal to the current
index count */
#define QEI_IESET_POS0REV_Int ((uint32_t)(1<<10)) /**< Set Enable Interrupt Bit that combined position 0 and revolution count interrupt */
#define QEI_IESET_POS1REV_Int ((uint32_t)(1<<11)) /**< Set Enable Interrupt Bit that Combined position 1 and revolution count interrupt */
#define QEI_IESET_POS2REV_Int ((uint32_t)(1<<12)) /**< Set Enable Interrupt Bit that Combined position 2 and revolution count interrupt */
#define QEI_IESET_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable Set register bit-mask */
/*********************************************************************//**
* Macro defines for QEI Interrupt Enable Clear register
**********************************************************************/
#define QEI_IECLR_INX_Int ((uint32_t)(1<<0)) /**< Clear Enabled Interrupt Bit Indicates that an index pulse was detected */
#define QEI_IECLR_TIM_Int ((uint32_t)(1<<1)) /**< Clear Enabled Interrupt Bit Indicates that a velocity timer overflow occurred */
#define QEI_IECLR_VELC_Int ((uint32_t)(1<<2)) /**< Clear Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity */
#define QEI_IECLR_DIR_Int ((uint32_t)(1<<3)) /**< Clear Enabled Interrupt Bit Indicates that a change of direction was detected */
#define QEI_IECLR_ERR_Int ((uint32_t)(1<<4)) /**< Clear Enabled Interrupt Bit Indicates that an encoder phase error was detected */
#define QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5)) /**< Clear Enabled Interrupt Bit Indicates that and encoder clock pulse was detected */
#define QEI_IECLR_POS0_Int ((uint32_t)(1<<6)) /**< Clear Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the
current position */
#define QEI_IECLR_POS1_Int ((uint32_t)(1<<7)) /**< Clear Enabled Interrupt Bit Indicates that the position 1compare value is equal to the
current position */
#define QEI_IECLR_POS2_Int ((uint32_t)(1<<8)) /**< Clear Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the
current position */
#define QEI_IECLR_REV_Int ((uint32_t)(1<<9)) /**< Clear Enabled Interrupt Bit Indicates that the index compare value is equal to the current
index count */
#define QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10)) /**< Clear Enabled Interrupt Bit that combined position 0 and revolution count interrupt */
#define QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11)) /**< Clear Enabled Interrupt Bit that Combined position 1 and revolution count interrupt */
#define QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12)) /**< Clear Enabled Interrupt Bit that Combined position 2 and revolution count interrupt */
#define QEI_IECLR_BITMASK ((uint32_t)(0xFFFF)) /**< QEI Interrupt Enable Clear register bit-mask */
/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
/* Macro check QEI peripheral */
#define PARAM_QEIx(n) ((n==LPC_QEI))
/* Macro check QEI reset type */
#define PARAM_QEI_RESET(n) ((n==QEI_CON_RESP) \
|| (n==QEI_RESET_POSOnIDX) \
|| (n==QEI_RESET_VEL) \
|| (n==QEI_RESET_IDX))
/* Macro check QEI Direction invert mode */
#define PARAM_QEI_DIRINV(n) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL))
/* Macro check QEI signal mode */
#define PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR))
/* Macro check QEI Capture mode */
#define PARAM_QEI_CAPMODE(n) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X))
/* Macro check QEI Invert index mode */
#define PARAM_QEI_INVINX(n) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN))
/* Macro check QEI Direction invert mode */
#define PARAM_QEI_TIMERRELOAD(n) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL))
/* Macro check QEI status type */
#define PARAM_QEI_STATUS(n) ((n==QEI_STATUS_DIR))
/* Macro check QEI combine position type */
#define PARAM_QEI_COMPPOS_CH(n) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2))
/* Macro check QEI interrupt flag type */
#define PARAM_QEI_INTFLAG(n) ((n==QEI_INTFLAG_INX_Int) \
|| (n==QEI_INTFLAG_TIM_Int) \
|| (n==QEI_INTFLAG_VELC_Int) \
|| (n==QEI_INTFLAG_DIR_Int) \
|| (n==QEI_INTFLAG_ERR_Int) \
|| (n==QEI_INTFLAG_ENCLK_Int) \
|| (n==QEI_INTFLAG_POS0_Int) \
|| (n==QEI_INTFLAG_POS1_Int) \
|| (n==QEI_INTFLAG_POS2_Int) \
|| (n==QEI_INTFLAG_REV_Int) \
|| (n==QEI_INTFLAG_POS0REV_Int) \
|| (n==QEI_INTFLAG_POS1REV_Int) \
|| (n==QEI_INTFLAG_POS2REV_Int))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup QEI_Public_Types QEI Public Types
* @{
*/
/*********************************************************************//**
* @brief QEI structure definitions
**********************************************************************/
/**
* @brief QEI Configuration structure type definition
*/
typedef struct {
uint32_t DirectionInvert :1; /**< Direction invert option:
- QEI_DIRINV_NONE: QEI Direction is normal
- QEI_DIRINV_CMPL: QEI Direction is complemented
*/
uint32_t SignalMode :1; /**< Signal mode Option:
- QEI_SIGNALMODE_QUAD: Signal is in Quadrature phase mode
- QEI_SIGNALMODE_CLKDIR: Signal is in Clock/Direction mode
*/
uint32_t CaptureMode :1; /**< Capture Mode Option:
- QEI_CAPMODE_2X: Only Phase-A edges are counted (2X)
- QEI_CAPMODE_4X: BOTH Phase-A and Phase-B edges are counted (4X)
*/
uint32_t InvertIndex :1; /**< Invert Index Option:
- QEI_INVINX_NONE: the sense of the index input is normal
- QEI_INVINX_EN: inverts the sense of the index input
*/
} QEI_CFG_Type;
/**
* @brief Timer Reload Configuration structure type definition
*/
typedef struct {
uint8_t ReloadOption; /**< Velocity Timer Reload Option, should be:
- QEI_TIMERRELOAD_TICKVAL: Reload value in absolute value
- QEI_TIMERRELOAD_USVAL: Reload value in microsecond value
*/
uint8_t Reserved[3];
uint32_t ReloadValue; /**< Velocity Timer Reload Value, 32-bit long, should be matched
with Velocity Timer Reload Option
*/
} QEI_RELOADCFG_Type;
typedef struct
{
uint32_t PHA_FilterVal; /**< FILTERPHA register input */
uint32_t PHB_FilterVal; /**< FILTERPHB register input */
uint32_t INX_FilterVal; /**< FILTERINX register input */
} st_Qei_FilterCfg;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup QEI_Public_Functions QEI Public Functions
* @{
*/
void QEI_Init(uint8_t qeiId, QEI_CFG_Type *QEI_ConfigStruct);
void QEI_DeInit(uint8_t qeiId);
void QEI_Reset(uint8_t qeiId, uint32_t ulResetType);
void QEI_GetCfgDefault(QEI_CFG_Type *QIE_InitStruct);
FlagStatus QEI_GetStatus(uint8_t qeiId, uint32_t ulFlagType);
uint32_t QEI_GetPosition(uint8_t qeiId);
void QEI_SetMaxPosition(uint8_t qeiId, uint32_t ulMaxPos);
void QEI_SetPositionComp(uint8_t qeiId, uint8_t bPosCompCh, uint32_t ulPosComp);
uint32_t QEI_GetIndex(uint8_t qeiId);
void QEI_SetIndexComp(uint8_t qeiId, uint32_t ulIndexComp);
void QEI_SetTimerReload(uint8_t qeiId, QEI_RELOADCFG_Type *QEIReloadStruct);
uint32_t QEI_GetTimer(uint8_t qeiId);
uint32_t QEI_GetVelocity(uint8_t qeiId);
uint32_t QEI_GetVelocityCap(uint8_t qeiId);
void QEI_SetVelocityComp(uint8_t qeiId, uint32_t ulVelComp);
void QEI_SetDigiFilter(uint8_t qeiId, st_Qei_FilterCfg FilterVal);
uint32_t QEI_CalculateRPM(uint8_t qeiId, uint32_t ulVelCapValue, uint32_t ulPPR);
FlagStatus QEI_GetIntStatus(uint8_t qeiId, uint32_t ulIntType);
void QEI_IntCmd(uint8_t qeiId, uint32_t ulIntType, FunctionalState NewState);
void QEI_IntSet(uint8_t qeiId, uint32_t ulIntType);
void QEI_IntClear(uint8_t qeiId, uint32_t ulIntType);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_QEI_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,139 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_rgu.h 2011-06-02
*//**
* @file lpc18xx_rgu.h
* @brief Contains all macro definitions and function prototypes
* support for RGU firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup RGU RGU (Reset Generation Unit)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_RGU_H_
#define LPC18XX_RGU_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Types --------------------------------------------------------------- */
/** @defgroup RGU_Public_Types RGU Public Types
* @{
*/
/*********************************************************************//**
* @brief RGU enumeration
**********************************************************************/
/** @brief Out Reset Signal Generated by RGU */
typedef enum
{
RGU_SIG_CORE = 0, /**< Core reset signal */
RGU_SIG_PERIPH, /**< Peripheral reset signal */
RGU_SIG_MASTER, /**< Master reset signal */
RGU_SIG_WWDT = 4, /**< WWDT reset signal */
RGU_SIG_CREG, /**< CREG reset signal */
RGU_SIG_BUS = 8, /**< Bus reset signal */
RGU_SIG_SCU, /**< SCU reset signal */
RGU_SIG_PINMUX, /**< Pin mux reset signal */
RGU_SIG_M3 = 13, /**< Cortex-M3 reset signal */
RGU_SIG_LCD = 16, /**< LCD reset signal */
RGU_SIG_USB0, /**< USB0 reset signal */
RGU_SIG_USB1, /**< USB1 reset signal */
RGU_SIG_DMA, /**< DMA reset signal */
RGU_SIG_SDIO, /**< SDIO reset signal */
RGU_SIG_EMC, /**< EMC reset signal */
RGU_SIG_ETHERNET, /**< Ethernet reset signal */
RGU_SIG_AES, /**< AES reset signal */
RGU_SIG_GPIO = 28, /**< GPIO reset signal */
RGU_SIG_TIMER0 = 32, /**< TIMER 0 reset signal */
RGU_SIG_TIMER1, /**< TIMER 1 reset signal */
RGU_SIG_TIMER2, /**< TIMER 2 reset signal */
RGU_SIG_TIMER3, /**< TIMER 3 reset signal */
RGU_SIG_RITIMER, /**< RIT timer reset signal */
RGU_SIG_SCT, /**< SCT reset signal */
RGU_SIG_MOTOCONPWM, /**< Motor control reset signal */
RGU_SIG_QEI, /**< QEI reset signal */
RGU_SIG_ADC0, /**< ADC0 reset signal */
RGU_SIG_ADC1, /**< ADC1 reset signal */
RGU_SIG_DAC, /**< DAC reset signal */
RGU_SIG_UART0 = 44, /**< UART0 reset signal */
RGU_SIG_UART1, /**< UART1 reset signal */
RGU_SIG_UART2, /**< UART2 reset signal */
RGU_SIG_UART3, /**< UART3 reset signal */
RGU_SIG_I2C0, /**< I2C0 reset signal */
RGU_SIG_I2C1, /**< I2C1 reset signal */
RGU_SIG_SSP0, /**< SSP0 reset signal */
RGU_SIG_SSP1, /**< SSP1 reset signal */
RGU_SIG_I2S, /**< I2S reset signal */
RGU_SIG_SPIFI, /**< SPIFI reset signal */
RGU_SIG_CAN = 55 /**< CAN reset signal */
}RGU_SIG;
/** @brief Reset Cause Source */
typedef enum {
RGU_SRC_NONE, /**< No source */
RGU_SRC_SOFT, /**< Software reset source */
RGU_SRC_EXT, /**< External reset source */
RGU_SRC_CORE, /**< Core reset source */
RGU_SRC_PERIPH, /**< Peripheral reset source*/
RGU_SRC_MASTER, /**< Master reset source */
RGU_SRC_BOD, /**< BOD reset source */
RGU_SRC_WWDT /**< WWDT reset source */
}RGU_SRC;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup RGU_Public_Functions RGU Public Functions
* @{
*/
/* RGU peripheral control function ----------------*/
void RGU_SoftReset(RGU_SIG ResetSignal);
RGU_SRC RGU_GetSource(RGU_SIG ResetSignal);
Bool RGU_GetSignalStatus(RGU_SIG ResetSignal);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_RGU_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,106 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_rit.h 2011-06-02
*//**
* @file lpc18xx_rit.h
* @brief Contains all macro definitions and function prototypes
* support for RIT firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup RIT RIT (Repetitive Interrupt Timer)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_RIT_H_
#define LPC18XX_RIT_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros ------------------------------------------------------------- */
/** @defgroup RIT_Private_Macros RIT Private Macros
* @{
*/
/* --------------------- BIT DEFINITIONS -------------------------------------- */
/*********************************************************************//**
* Macro defines for RIT control register
**********************************************************************/
/** Set interrupt flag when the counter value equals the masked compare value */
#define RIT_CTRL_INTEN ((uint32_t) (1))
/** Set timer enable clear to 0 when the counter value equals the masked compare value */
#define RIT_CTRL_ENCLR ((uint32_t) _BIT(1))
/** Set timer enable on debug */
#define RIT_CTRL_ENBR ((uint32_t) _BIT(2))
/** Set timer enable */
#define RIT_CTRL_TEN ((uint32_t) _BIT(3))
/** Macro to determine if it is valid RIT peripheral */
#define PARAM_RITx(n) (((uint32_t *)n)==((uint32_t *)LPC_RITIMER))
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup RIT_Public_Functions RIT Public Functions
* @{
*/
/* RIT Init/DeInit functions */
void RIT_Init(LPC_RITIMER_Type *RITx);
void RIT_DeInit(LPC_RITIMER_Type *RITx);
/* RIT config timer functions */
void RIT_TimerConfig(LPC_RITIMER_Type *RITx, uint32_t time_interval);
/* Enable/Disable RIT functions */
void RIT_TimerClearCmd(LPC_RITIMER_Type *RITx, FunctionalState NewState);
void RIT_Cmd(LPC_RITIMER_Type *RITx, FunctionalState NewState);
void RIT_TimerDebugCmd(LPC_RITIMER_Type *RITx, FunctionalState NewState);
/* RIT Interrupt functions */
IntStatus RIT_GetIntStatus(LPC_RITIMER_Type *RITx);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_RIT_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,322 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_rtc.h 2011-06-02
*//**
* @file lpc18xx_rtc.h
* @brief Contains all macro definitions and function prototypes
* support for RTC firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup RTC RTC (Real-Time Clock)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_RTC_H_
#define LPC18XX_RTC_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private Macros ------------------------------------------------------------- */
/** @defgroup RTC_Private_Macros RTC Private Macros
* @{
*/
/* ----------------------- BIT DEFINITIONS ----------------------------------- */
/* Miscellaneous register group --------------------------------------------- */
/**********************************************************************
* ILR register definitions
**********************************************************************/
/** ILR register mask */
#define RTC_ILR_BITMASK ((0x00000003))
/** Bit inform the source interrupt is counter increment*/
#define RTC_IRL_RTCCIF ((1<<0))
/** Bit inform the source interrupt is alarm match*/
#define RTC_IRL_RTCALF ((1<<1))
/**********************************************************************
* CCR register definitions
**********************************************************************/
/** CCR register mask */
#define RTC_CCR_BITMASK ((0x00000013))
/** Clock enable */
#define RTC_CCR_CLKEN ((1<<0))
/** Clock reset */
#define RTC_CCR_CTCRST ((1<<1))
/** Calibration counter enable */
#define RTC_CCR_CCALEN ((1<<4))
/**********************************************************************
* CIIR register definitions
**********************************************************************/
/** Counter Increment Interrupt bit for second */
#define RTC_CIIR_IMSEC ((1<<0))
/** Counter Increment Interrupt bit for minute */
#define RTC_CIIR_IMMIN ((1<<1))
/** Counter Increment Interrupt bit for hour */
#define RTC_CIIR_IMHOUR ((1<<2))
/** Counter Increment Interrupt bit for day of month */
#define RTC_CIIR_IMDOM ((1<<3))
/** Counter Increment Interrupt bit for day of week */
#define RTC_CIIR_IMDOW ((1<<4))
/** Counter Increment Interrupt bit for day of year */
#define RTC_CIIR_IMDOY ((1<<5))
/** Counter Increment Interrupt bit for month */
#define RTC_CIIR_IMMON ((1<<6))
/** Counter Increment Interrupt bit for year */
#define RTC_CIIR_IMYEAR ((1<<7))
/** CIIR bit mask */
#define RTC_CIIR_BITMASK ((0xFF))
/**********************************************************************
* AMR register definitions
**********************************************************************/
/** Counter Increment Select Mask bit for second */
#define RTC_AMR_AMRSEC ((1<<0))
/** Counter Increment Select Mask bit for minute */
#define RTC_AMR_AMRMIN ((1<<1))
/** Counter Increment Select Mask bit for hour */
#define RTC_AMR_AMRHOUR ((1<<2))
/** Counter Increment Select Mask bit for day of month */
#define RTC_AMR_AMRDOM ((1<<3))
/** Counter Increment Select Mask bit for day of week */
#define RTC_AMR_AMRDOW ((1<<4))
/** Counter Increment Select Mask bit for day of year */
#define RTC_AMR_AMRDOY ((1<<5))
/** Counter Increment Select Mask bit for month */
#define RTC_AMR_AMRMON ((1<<6))
/** Counter Increment Select Mask bit for year */
#define RTC_AMR_AMRYEAR ((1<<7))
/** AMR bit mask */
#define RTC_AMR_BITMASK ((0xFF))
/**********************************************************************
* RTC_AUX register definitions
**********************************************************************/
/** RTC Oscillator Fail detect flag */
#define RTC_AUX_RTC_OSCF ((1<<4))
/**********************************************************************
* RTC_AUXEN register definitions
**********************************************************************/
/** Oscillator Fail Detect interrupt enable*/
#define RTC_AUXEN_RTC_OSCFEN ((1<<4))
/* Consolidated time register group ----------------------------------- */
/**********************************************************************
* Consolidated Time Register 0 definitions
**********************************************************************/
#define RTC_CTIME0_SECONDS_MASK ((0x3F))
#define RTC_CTIME0_MINUTES_MASK ((0x3F00))
#define RTC_CTIME0_HOURS_MASK ((0x1F0000))
#define RTC_CTIME0_DOW_MASK ((0x7000000))
/**********************************************************************
* Consolidated Time Register 1 definitions
**********************************************************************/
#define RTC_CTIME1_DOM_MASK ((0x1F))
#define RTC_CTIME1_MONTH_MASK ((0xF00))
#define RTC_CTIME1_YEAR_MASK ((0xFFF0000))
/**********************************************************************
* Consolidated Time Register 2 definitions
**********************************************************************/
#define RTC_CTIME2_DOY_MASK ((0xFFF))
/**********************************************************************
* Time Counter Group and Alarm register group
**********************************************************************/
/** SEC register mask */
#define RTC_SEC_MASK (0x0000003F)
/** MIN register mask */
#define RTC_MIN_MASK (0x0000003F)
/** HOUR register mask */
#define RTC_HOUR_MASK (0x0000001F)
/** DOM register mask */
#define RTC_DOM_MASK (0x0000001F)
/** DOW register mask */
#define RTC_DOW_MASK (0x00000007)
/** DOY register mask */
#define RTC_DOY_MASK (0x000001FF)
/** MONTH register mask */
#define RTC_MONTH_MASK (0x0000000F)
/** YEAR register mask */
#define RTC_YEAR_MASK (0x00000FFF)
#define RTC_SECOND_MAX 59 /*!< Maximum value of second */
#define RTC_MINUTE_MAX 59 /*!< Maximum value of minute*/
#define RTC_HOUR_MAX 23 /*!< Maximum value of hour*/
#define RTC_MONTH_MIN 1 /*!< Minimum value of month*/
#define RTC_MONTH_MAX 12 /*!< Maximum value of month*/
#define RTC_DAYOFMONTH_MIN 1 /*!< Minimum value of day of month*/
#define RTC_DAYOFMONTH_MAX 31 /*!< Maximum value of day of month*/
#define RTC_DAYOFWEEK_MAX 6 /*!< Maximum value of day of week*/
#define RTC_DAYOFYEAR_MIN 1 /*!< Minimum value of day of year*/
#define RTC_DAYOFYEAR_MAX 366 /*!< Maximum value of day of year*/
#define RTC_YEAR_MAX 4095 /*!< Maximum value of year*/
/**********************************************************************
* Calibration register
**********************************************************************/
/* Calibration register */
/** Calibration value */
#define RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF))
/** Calibration direction */
#define RTC_CALIBRATION_LIBDIR ((1<<17))
/** Calibration max value */
#define RTC_CALIBRATION_MAX ((0x20000))
/** Calibration definitions */
#define RTC_CALIB_DIR_FORWARD ((uint8_t)(0))
#define RTC_CALIB_DIR_BACKWARD ((uint8_t)(1))
/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
/** Macro to determine if it is valid RTC peripheral */
#define PARAM_RTCx(x) (((uint32_t *)x)==((uint32_t *)LPC_RTC))
/* Macro check RTC interrupt type */
#define PARAM_RTC_INT(n) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM))
/* Macro check RTC time type */
#define PARAM_RTC_TIMETYPE(n) ((n==RTC_TIMETYPE_SECOND) || (n==RTC_TIMETYPE_MINUTE) \
|| (n==RTC_TIMETYPE_HOUR) || (n==RTC_TIMETYPE_DAYOFWEEK) \
|| (n==RTC_TIMETYPE_DAYOFMONTH) || (n==RTC_TIMETYPE_DAYOFYEAR) \
|| (n==RTC_TIMETYPE_MONTH) || (n==RTC_TIMETYPE_YEAR))
/* Macro check RTC calibration type */
#define PARAM_RTC_CALIB_DIR(n) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD))
/* Macro check RTC GPREG type */
#define PARAM_RTC_GPREG_CH(n) ((n<=63))
/* RTC GPREG base address*/
#define RTC_GPREG_BASE 0x40041000
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup RTC_Public_Types RTC Public Types
* @{
*/
/*********************************************************************//**
* @brief RTC enumeration
**********************************************************************/
/** @brief RTC interrupt source */
typedef enum {
RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF, /*!< Counter Increment Interrupt */
RTC_INT_ALARM = RTC_IRL_RTCALF /*!< The alarm interrupt */
} RTC_INT_OPT;
/** @brief RTC time type option */
typedef enum {
RTC_TIMETYPE_SECOND = 0, /*!< Second */
RTC_TIMETYPE_MINUTE = 1, /*!< Month */
RTC_TIMETYPE_HOUR = 2, /*!< Hour */
RTC_TIMETYPE_DAYOFWEEK = 3, /*!< Day of week */
RTC_TIMETYPE_DAYOFMONTH = 4, /*!< Day of month */
RTC_TIMETYPE_DAYOFYEAR = 5, /*!< Day of year */
RTC_TIMETYPE_MONTH = 6, /*!< Month */
RTC_TIMETYPE_YEAR = 7 /*!< Year */
} RTC_TIMETYPE_Num;
/*********************************************************************//**
* @brief RTC structure definitions
**********************************************************************/
/** @brief Time structure definitions for easy manipulate the data */
typedef struct {
uint32_t SEC; /*!< Seconds Register */
uint32_t MIN; /*!< Minutes Register */
uint32_t HOUR; /*!< Hours Register */
uint32_t DOM; /*!< Day of Month Register */
uint32_t DOW; /*!< Day of Week Register */
uint32_t DOY; /*!< Day of Year Register */
uint32_t MONTH; /*!< Months Register */
uint32_t YEAR; /*!< Years Register */
} RTC_TIME_Type;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup RTC_Public_Functions RTC Public Functions
* @{
*/
void RTC_Init (LPC_RTC_Type *RTCx);
void RTC_DeInit(LPC_RTC_Type *RTCx);
void RTC_ResetClockTickCounter(LPC_RTC_Type *RTCx);
void RTC_Cmd (LPC_RTC_Type *RTCx, FunctionalState NewState);
void RTC_SetTime (LPC_RTC_Type *RTCx, uint32_t Timetype, uint32_t TimeValue);
uint32_t RTC_GetTime(LPC_RTC_Type *RTCx, uint32_t Timetype);
void RTC_SetFullTime (LPC_RTC_Type *RTCx, RTC_TIME_Type *pFullTime);
void RTC_GetFullTime (LPC_RTC_Type *RTCx, RTC_TIME_Type *pFullTime);
void RTC_AlarmIntConfig (LPC_RTC_Type *RTCx, uint32_t AlarmTimeType, FunctionalState NewState);
void RTC_SetAlarmTime (LPC_RTC_Type *RTCx, uint32_t Timetype, uint32_t ALValue);
uint32_t RTC_GetAlarmTime (LPC_RTC_Type *RTCx, uint32_t Timetype);
void RTC_SetFullAlarmTime (LPC_RTC_Type *RTCx, RTC_TIME_Type *pFullTime);
void RTC_GetFullAlarmTime (LPC_RTC_Type *RTCx, RTC_TIME_Type *pFullTime);
void RTC_CntIncrIntConfig (LPC_RTC_Type *RTCx, uint32_t CntIncrIntType, FunctionalState NewState);
IntStatus RTC_GetIntPending (LPC_RTC_Type *RTCx, uint32_t IntType);
void RTC_ClearIntPending (LPC_RTC_Type *RTCx, uint32_t IntType);
void RTC_CalibCounterCmd(LPC_RTC_Type *RTCx, FunctionalState NewState);
void RTC_CalibConfig(LPC_RTC_Type *RTCx, uint32_t CalibValue, uint8_t CalibDir);
void RTC_WriteGPREG (LPC_RTC_Type *RTCx, uint8_t Channel, uint32_t Value);
uint32_t RTC_ReadGPREG (LPC_RTC_Type *RTCx, uint8_t Channel);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_RTC_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,142 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_sct.h 2011-06-02
*//**
* @file lpc18xx_sct.h
* @brief Contains all macro definitions and function prototypes
* support for SCT firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup SCT SCT (State Configurable Timer)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_SCT_H_
#define LPC18XX_SCT_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Private macros ------------------------------------------------------------- */
/** @defgroup SCT_Private_Macros SCT Private Macros
* @{
*/
/* -------------------------- BIT DEFINITIONS ----------------------------------- */
/*********************************************************************//**
* Macro defines for SCT configuration register
**********************************************************************/
/** Selects 16/32 bit counter */
#define SCT_CONFIG_16BIT_COUNTER 0x00000000
#define SCT_CONFIG_32BIT_COUNTER 0x00000001
/*********************************************************************//**
* Macro defines for SCT control register
**********************************************************************/
/** Stop low counter */
#define SCT_CTRL_STOP_L (1<<1)
/** Halt low counter */
#define SCT_CTRL_HALT_L (1<<2)
/** Clear low or unified counter */
#define SCT_CTRL_CLRCTR_L (1<<3)
/** Direction for low or unified counter */
#define COUNTUP_TO_LIMIT_THEN_CLEAR_TO_ZERO 0
#define COUNTUP_TO LIMIT_THEN_COUNTDOWN_TO_ZERO 1
#define SCT_CTRL_BIDIR_L(x) (((x)&0x01)<<4)
/** Prescale clock for low or unified counter */
#define SCT_CTRL_PRE_L(x) (((x)&0xFF)<<5)
/** Stop high counter */
#define SCT_CTRL_STOP_H (1<<17)
/** Halt high counter */
#define SCT_CTRL_HALT_H (1<<18)
/** Clear high counter */
#define SCT_CTRL_CLRCTR_H (1<<19)
/** Direction for high counter */
#define COUNTUP_TO_LIMIT_THEN_CLEAR_TO_ZERO 0
#define COUNTUP_TO LIMIT_THEN_COUNTDOWN_TO_ZERO 1
#define SCT_CTRL_BIDIR_H(x) (((x)&0x01)<<20)
/** Prescale clock for high counter */
#define SCT_CTRL_PRE_H(x) (((x)&0xFF)<<21)
/*********************************************************************//**
* Macro defines for SCT Conflict resolution register
**********************************************************************/
/** Define conflict solution */
#define SCT_RES_NOCHANGE (0)
#define SCT_RES_SET_OUTPUT (1)
#define SCT_RES_CLEAR_OUTPUT (2)
#define SCT_RES_TOGGLE_OUTPUT (3)
/* ------------------- CHECK PARAM DEFINITIONS ------------------------- */
/** Check SCT output number */
#define PARAM_SCT_OUTPUT_NUM(n) ((n)<= CONFIG_SCT_nOU )
/** Check SCT counter type */
#define PARAM_SCT_CONFIG_COUNTER_TYPE(n) ((n==SCT_CONFIG_16BIT_COUNTER)||(n==SCT_CONFIG_32BIT_COUNTER))
/** Check SCT conflict solution */
#define PARAM_SCT_RES(n) ((n==SCT_RES_NOCHANGE)||(n==SCT_RES_SET_OUTPUT)\
||(n==SCT_RES_CLEAR_OUTPUT)||(n==SCT_RES_TOGGLE_OUTPUT))
/** Check SCT event number */
#define PARAM_SCT_EVENT(n) ((n) <= 15)
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup SCT_Public_Functions SCT Public Functions
* @{
*/
void SCT_Config(uint32_t value);
void SCT_ControlSet(uint32_t value, FunctionalState ena);
void SCT_ConflictResolutionSet(uint8_t outnum, uint8_t value);
void SCT_EventFlagClear(uint8_t even_num);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_SCT_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,101 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_scu.h 2011-06-02
*//**
* @file lpc18xx_scu.h
* @brief Contains all macro definitions and function prototypes
* support for SCU firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup SCU SCU (System Control Unit)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef __SCU_H
#define __SCU_H
#ifdef __cplusplus
extern "C"
{
#endif
/* Private macros ------------------------------------------------------------- */
/** @defgroup SCT_Private_Macros SCT Private Macros
* @{
*/
/** Port offset definition */
#define PORT_OFFSET 0x80
/** Pin offset definition */
#define PIN_OFFSET 0x04
/* Pin modes */
#define MD_PUP (0x0<<3)
#define MD_BUK (0x1<<3)
#define MD_PLN (0x2<<3)
#define MD_PDN (0x3<<3)
#define MD_EHS (0x1<<5)
#define MD_EZI (0x1<<6)
#define MD_ZI (0x1<<7)
#define MD_EHD0 (0x1<<8)
#define MD_EHD1 (0x1<<8)
#define MD_PLN_FAST (MD_PLN | MD_EZI | MD_ZI | MD_EHS)
// 0xF0
/* Pin function */
#define FUNC0 0x0 /** Function 0 */
#define FUNC1 0x1 /** Function 1 */
#define FUNC2 0x2 /** Function 2 */
#define FUNC3 0x3 /** Function 3 */
#define FUNC4 0x4
#define FUNC5 0x5
#define FUNC6 0x6
#define FUNC7 0x7
/**
* @}
*/
#define LPC_SCU_PIN(po, pi) (*(volatile int *) (LPC_SCU_BASE + ((po) * 0x80) + ((pi) * 0x4)) )
#define LPC_SCU_CLK(c) (*(volatile int *) (LPC_SCU_BASE + 0xC00 + ((c) * 0x4)) )
/* Public Functions ----------------------------------------------------------- */
/** @defgroup SCU_Public_Functions SCU Public Functions
* @{
*/
void scu_pinmux(uint8_t port, uint8_t pin, uint8_t mode, uint8_t func);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* end __SCU_H */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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@@ -1,446 +0,0 @@
/**********************************************************************
* $Id$ lpc18xx_ssp.h 2011-06-02
*//**
* @file lpc18xx_ssp.h
* @brief Contains all macro definitions and function prototypes
* support for SSP firmware library on LPC18xx
* @version 1.0
* @date 02. June. 2011
* @author NXP MCU SW Application Team
*
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
**********************************************************************/
/* Peripheral group ----------------------------------------------------------- */
/** @defgroup SSP SSP (Synchronous Serial Port)
* @ingroup LPC1800CMSIS_FwLib_Drivers
* @{
*/
#ifndef LPC18XX_SSP_H_
#define LPC18XX_SSP_H_
/* Includes ------------------------------------------------------------------- */
#include "LPC18xx.h"
#include "lpc_types.h"
#ifdef __cplusplus
extern "C"
{
#endif
/* Public Macros -------------------------------------------------------------- */
/** @defgroup SSP_Private_Macros SSP Private Macros
* @{
*/
/*********************************************************************//**
* SSP configuration parameter defines
**********************************************************************/
/** Clock phase control bit */
#define SSP_CPHA_FIRST ((uint32_t)(0))
#define SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND
/** Clock polarity control bit */
/* There's no bug here!!!
* - If bit[6] in SSPnCR0 is 0: SSP controller maintains the bus clock low between frames.
* That means the active clock is in HI state.
* - If bit[6] in SSPnCR0 is 1 (SSP_CR0_CPOL_HI): SSP controller maintains the bus clock
* high between frames. That means the active clock is in LO state.
*/
#define SSP_CPOL_HI ((uint32_t)(0))
#define SSP_CPOL_LO SSP_CR0_CPOL_HI
/** SSP master mode enable */
#define SSP_SLAVE_MODE SSP_CR1_SLAVE_EN
#define SSP_MASTER_MODE ((uint32_t)(0))
/** SSP data bit number defines */
#define SSP_DATABIT_4 SSP_CR0_DSS(4) /*!< Databit number = 4 */
#define SSP_DATABIT_5 SSP_CR0_DSS(5) /*!< Databit number = 5 */
#define SSP_DATABIT_6 SSP_CR0_DSS(6) /*!< Databit number = 6 */
#define SSP_DATABIT_7 SSP_CR0_DSS(7) /*!< Databit number = 7 */
#define SSP_DATABIT_8 SSP_CR0_DSS(8) /*!< Databit number = 8 */
#define SSP_DATABIT_9 SSP_CR0_DSS(9) /*!< Databit number = 9 */
#define SSP_DATABIT_10 SSP_CR0_DSS(10) /*!< Databit number = 10 */
#define SSP_DATABIT_11 SSP_CR0_DSS(11) /*!< Databit number = 11 */
#define SSP_DATABIT_12 SSP_CR0_DSS(12) /*!< Databit number = 12 */
#define SSP_DATABIT_13 SSP_CR0_DSS(13) /*!< Databit number = 13 */
#define SSP_DATABIT_14 SSP_CR0_DSS(14) /*!< Databit number = 14 */
#define SSP_DATABIT_15 SSP_CR0_DSS(15) /*!< Databit number = 15 */
#define SSP_DATABIT_16 SSP_CR0_DSS(16) /*!< Databit number = 16 */
/** SSP Frame Format definition */
/** Motorola SPI mode */
#define SSP_FRAME_SPI SSP_CR0_FRF_SPI
/** TI synchronous serial mode */
#define SSP_FRAME_TI SSP_CR0_FRF_TI
/** National Micro-wire mode */
#define SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE
/*********************************************************************//**
* SSP Status defines
**********************************************************************/
/** SSP status TX FIFO Empty bit */
#define SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE
/** SSP status TX FIFO not full bit */
#define SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF
/** SSP status RX FIFO not empty bit */
#define SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE
/** SSP status RX FIFO full bit */
#define SSP_STAT_RXFIFO_FULL SSP_SR_RFF
/** SSP status SSP Busy bit */
#define SSP_STAT_BUSY SSP_SR_BSY
/*********************************************************************//**
* SSP Interrupt Configuration defines
**********************************************************************/
/** Receive Overrun */
#define SSP_INTCFG_ROR SSP_IMSC_ROR
/** Receive TimeOut */
#define SSP_INTCFG_RT SSP_IMSC_RT
/** Rx FIFO is at least half full */
#define SSP_INTCFG_RX SSP_IMSC_RX
/** Tx FIFO is at least half empty */
#define SSP_INTCFG_TX SSP_IMSC_TX
/*********************************************************************//**
* SSP Configured Interrupt Status defines
**********************************************************************/
/** Receive Overrun */
#define SSP_INTSTAT_ROR SSP_MIS_ROR
/** Receive TimeOut */
#define SSP_INTSTAT_RT SSP_MIS_RT
/** Rx FIFO is at least half full */
#define SSP_INTSTAT_RX SSP_MIS_RX
/** Tx FIFO is at least half empty */
#define SSP_INTSTAT_TX SSP_MIS_TX
/*********************************************************************//**
* SSP Raw Interrupt Status defines
**********************************************************************/
/** Receive Overrun */
#define SSP_INTSTAT_RAW_ROR SSP_RIS_ROR
/** Receive TimeOut */
#define SSP_INTSTAT_RAW_RT SSP_RIS_RT
/** Rx FIFO is at least half full */
#define SSP_INTSTAT_RAW_RX SSP_RIS_RX
/** Tx FIFO is at least half empty */
#define SSP_INTSTAT_RAW_TX SSP_RIS_TX
/*********************************************************************//**
* SSP Interrupt Clear defines
**********************************************************************/
/** Writing a 1 to this bit clears the "frame was received when
* RxFIFO was full" interrupt */
#define SSP_INTCLR_ROR SSP_ICR_ROR
/** Writing a 1 to this bit clears the "Rx FIFO was not empty and
* has not been read for a timeout period" interrupt */
#define SSP_INTCLR_RT SSP_ICR_RT
/*********************************************************************//**
* SSP DMA defines
**********************************************************************/
/** SSP bit for enabling RX DMA */
#define SSP_DMA_TX SSP_DMA_RXDMA_EN
/** SSP bit for enabling TX DMA */
#define SSP_DMA_RX SSP_DMA_TXDMA_EN
/* SSP Status Implementation definitions */
#define SSP_STAT_DONE (1UL<<8) /**< Done */
#define SSP_STAT_ERROR (1UL<<9) /**< Error */
/* --------------------- BIT DEFINITIONS -------------------------------------- */
/*********************************************************************//**
* Macro defines for CR0 register
**********************************************************************/
/** SSP data size select, must be 4 bits to 16 bits */
#define SSP_CR0_DSS(n) ((uint32_t)((n-1)&0xF))
/** SSP control 0 Motorola SPI mode */
#define SSP_CR0_FRF_SPI ((uint32_t)(0<<4))
/** SSP control 0 TI synchronous serial mode */
#define SSP_CR0_FRF_TI ((uint32_t)(1<<4))
/** SSP control 0 National Micro-wire mode */
#define SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4))
/** SPI clock polarity bit (used in SPI mode only), (1) = maintains the
bus clock high between frames, (0) = low */
#define SSP_CR0_CPOL_HI ((uint32_t)(1<<6))
/** SPI clock out phase bit (used in SPI mode only), (1) = captures data
on the second clock transition of the frame, (0) = first */
#define SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7))
/** SSP serial clock rate value load macro, divider rate is
PERIPH_CLK / (cpsr * (SCR + 1)) */
#define SSP_CR0_SCR(n) ((uint32_t)((n&0xFF)<<8))
/** SSP CR0 bit mask */
#define SSP_CR0_BITMASK ((uint32_t)(0xFFFF))
/*********************************************************************//**
* Macro defines for CR1 register
**********************************************************************/
/** SSP control 1 loopback mode enable bit */
#define SSP_CR1_LBM_EN ((uint32_t)(1<<0))
/** SSP control 1 enable bit */
#define SSP_CR1_SSP_EN ((uint32_t)(1<<1))
/** SSP control 1 slave enable */
#define SSP_CR1_SLAVE_EN ((uint32_t)(1<<2))
/** SSP control 1 slave out disable bit, disables transmit line in slave
mode */
#define SSP_CR1_SO_DISABLE ((uint32_t)(1<<3))
/** SSP CR1 bit mask */
#define SSP_CR1_BITMASK ((uint32_t)(0x0F))
/*********************************************************************//**
* Macro defines for DR register
**********************************************************************/
/** SSP data bit mask */
#define SSP_DR_BITMASK(n) ((n)&0xFFFF)
/*********************************************************************//**
* Macro defines for SR register
**********************************************************************/
/** SSP status TX FIFO Empty bit */
#define SSP_SR_TFE ((uint32_t)(1<<0))
/** SSP status TX FIFO not full bit */
#define SSP_SR_TNF ((uint32_t)(1<<1))
/** SSP status RX FIFO not empty bit */
#define SSP_SR_RNE ((uint32_t)(1<<2))
/** SSP status RX FIFO full bit */
#define SSP_SR_RFF ((uint32_t)(1<<3))
/** SSP status SSP Busy bit */
#define SSP_SR_BSY ((uint32_t)(1<<4))
/** SSP SR bit mask */
#define SSP_SR_BITMASK ((uint32_t)(0x1F))
/*********************************************************************//**
* Macro defines for CPSR register
**********************************************************************/
/** SSP clock prescaler */
#define SSP_CPSR_CPDVSR(n) ((uint32_t)(n&0xFF))
/** SSP CPSR bit mask */
#define SSP_CPSR_BITMASK ((uint32_t)(0xFF))
/*********************************************************************//**
* Macro define for (IMSC) Interrupt Mask Set/Clear registers
**********************************************************************/
/** Receive Overrun */
#define SSP_IMSC_ROR ((uint32_t)(1<<0))
/** Receive TimeOut */
#define SSP_IMSC_RT ((uint32_t)(1<<1))
/** Rx FIFO is at least half full */
#define SSP_IMSC_RX ((uint32_t)(1<<2))
/** Tx FIFO is at least half empty */
#define SSP_IMSC_TX ((uint32_t)(1<<3))
/** IMSC bit mask */
#define SSP_IMSC_BITMASK ((uint32_t)(0x0F))
/*********************************************************************//**
* Macro define for (RIS) Raw Interrupt Status registers
**********************************************************************/
/** Receive Overrun */
#define SSP_RIS_ROR ((uint32_t)(1<<0))
/** Receive TimeOut */
#define SSP_RIS_RT ((uint32_t)(1<<1))
/** Rx FIFO is at least half full */
#define SSP_RIS_RX ((uint32_t)(1<<2))
/** Tx FIFO is at least half empty */
#define SSP_RIS_TX ((uint32_t)(1<<3))
/** RIS bit mask */
#define SSP_RIS_BITMASK ((uint32_t)(0x0F))
/*********************************************************************//**
* Macro define for (MIS) Masked Interrupt Status registers
**********************************************************************/
/** Receive Overrun */
#define SSP_MIS_ROR ((uint32_t)(1<<0))
/** Receive TimeOut */
#define SSP_MIS_RT ((uint32_t)(1<<1))
/** Rx FIFO is at least half full */
#define SSP_MIS_RX ((uint32_t)(1<<2))
/** Tx FIFO is at least half empty */
#define SSP_MIS_TX ((uint32_t)(1<<3))
/** MIS bit mask */
#define SSP_MIS_BITMASK ((uint32_t)(0x0F))
/*********************************************************************//**
* Macro define for (ICR) Interrupt Clear registers
**********************************************************************/
/** Writing a 1 to this bit clears the "frame was received when
* RxFIFO was full" interrupt */
#define SSP_ICR_ROR ((uint32_t)(1<<0))
/** Writing a 1 to this bit clears the "Rx FIFO was not empty and
* has not been read for a timeout period" interrupt */
#define SSP_ICR_RT ((uint32_t)(1<<1))
/** ICR bit mask */
#define SSP_ICR_BITMASK ((uint32_t)(0x03))
/*********************************************************************//**
* Macro defines for DMACR register
**********************************************************************/
/** SSP bit for enabling RX DMA */
#define SSP_DMA_RXDMA_EN ((uint32_t)(1<<0))
/** SSP bit for enabling TX DMA */
#define SSP_DMA_TXDMA_EN ((uint32_t)(1<<1))
/** DMACR bit mask */
#define SSP_DMA_BITMASK ((uint32_t)(0x03))
/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
/** Macro to determine if it is valid SSP port number */
#define PARAM_SSPx(n) ((((uint32_t *)n)==((uint32_t *)LPC_SSP0)) \
|| (((uint32_t *)n)==((uint32_t *)LPC_SSP1)))
/** Macro check clock phase control mode */
#define PARAM_SSP_CPHA(n) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND))
/** Macro check clock polarity mode */
#define PARAM_SSP_CPOL(n) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO))
/* Macro check master/slave mode */
#define PARAM_SSP_MODE(n) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE))
/* Macro check databit value */
#define PARAM_SSP_DATABIT(n) ((n==SSP_DATABIT_4) || (n==SSP_DATABIT_5) \
|| (n==SSP_DATABIT_6) || (n==SSP_DATABIT_16) \
|| (n==SSP_DATABIT_7) || (n==SSP_DATABIT_8) \
|| (n==SSP_DATABIT_9) || (n==SSP_DATABIT_10) \
|| (n==SSP_DATABIT_11) || (n==SSP_DATABIT_12) \
|| (n==SSP_DATABIT_13) || (n==SSP_DATABIT_14) \
|| (n==SSP_DATABIT_15))
/* Macro check frame type */
#define PARAM_SSP_FRAME(n) ((n==SSP_FRAME_SPI) || (n==SSP_FRAME_TI)\
|| (n==SSP_FRAME_MICROWIRE))
/* Macro check SSP status */
#define PARAM_SSP_STAT(n) ((n==SSP_STAT_TXFIFO_EMPTY) || (n==SSP_STAT_TXFIFO_NOTFULL) \
|| (n==SSP_STAT_RXFIFO_NOTEMPTY) || (n==SSP_STAT_RXFIFO_FULL) \
|| (n==SSP_STAT_BUSY))
/* Macro check interrupt configuration */
#define PARAM_SSP_INTCFG(n) ((n==SSP_INTCFG_ROR) || (n==SSP_INTCFG_RT) \
|| (n==SSP_INTCFG_RX) || (n==SSP_INTCFG_TX))
/* Macro check interrupt status value */
#define PARAM_SSP_INTSTAT(n) ((n==SSP_INTSTAT_ROR) || (n==SSP_INTSTAT_RT) \
|| (n==SSP_INTSTAT_RX) || (n==SSP_INTSTAT_TX))
/* Macro check interrupt status raw value */
#define PARAM_SSP_INTSTAT_RAW(n) ((n==SSP_INTSTAT_RAW_ROR) || (n==SSP_INTSTAT_RAW_RT) \
|| (n==SSP_INTSTAT_RAW_RX) || (n==SSP_INTSTAT_RAW_TX))
/* Macro check interrupt clear mode */
#define PARAM_SSP_INTCLR(n) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT))
/* Macro check DMA mode */
#define PARAM_SSP_DMA(n) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX))
/**
* @}
*/
/* Public Types --------------------------------------------------------------- */
/** @defgroup SSP_Public_Types SSP Public Types
* @{
*/
/** @brief SSP configuration structure */
typedef struct {
uint32_t Databit; /** Databit number, should be SSP_DATABIT_x,
where x is in range from 4 - 16 */
uint32_t CPHA; /** Clock phase, should be:
- SSP_CPHA_FIRST: first clock edge
- SSP_CPHA_SECOND: second clock edge */
uint32_t CPOL; /** Clock polarity, should be:
- SSP_CPOL_HI: high level
- SSP_CPOL_LO: low level */
uint32_t Mode; /** SSP mode, should be:
- SSP_MASTER_MODE: Master mode
- SSP_SLAVE_MODE: Slave mode */
uint32_t FrameFormat; /** Frame Format:
- SSP_FRAME_SPI: Motorola SPI frame format
- SSP_FRAME_TI: TI frame format
- SSP_FRAME_MICROWIRE: National Microwire frame format */
uint32_t ClockRate; /** Clock rate,in Hz */
} SSP_CFG_Type;
/**
* @brief SSP Transfer Type definitions
*/
typedef enum {
SSP_TRANSFER_POLLING = 0, /**< Polling transfer */
SSP_TRANSFER_INTERRUPT /**< Interrupt transfer */
} SSP_TRANSFER_Type;
/**
* @brief SPI Data configuration structure definitions
*/
typedef struct {
void *tx_data; /**< Pointer to transmit data */
uint32_t tx_cnt; /**< Transmit counter */
void *rx_data; /**< Pointer to transmit data */
uint32_t rx_cnt; /**< Receive counter */
uint32_t length; /**< Length of transfer data */
uint32_t status; /**< Current status of SSP activity */
} SSP_DATA_SETUP_Type;
/**
* @}
*/
/* Public Functions ----------------------------------------------------------- */
/** @defgroup SSP_Public_Functions SSP Public Functions
* @{
*/
void SSP_Init(LPC_SSPn_Type *SSPx, SSP_CFG_Type *SSP_ConfigStruct);
void SSP_DeInit(LPC_SSPn_Type* SSPx);
void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct);
void SSP_Cmd(LPC_SSPn_Type* SSPx, FunctionalState NewState);
void SSP_LoopBackCmd(LPC_SSPn_Type* SSPx, FunctionalState NewState);
void SSP_SlaveOutputCmd(LPC_SSPn_Type* SSPx, FunctionalState NewState);
void SSP_SendData(LPC_SSPn_Type* SSPx, uint16_t Data);
uint16_t SSP_ReceiveData(LPC_SSPn_Type* SSPx);
int32_t SSP_ReadWrite (LPC_SSPn_Type *SSPx, SSP_DATA_SETUP_Type *dataCfg, \
SSP_TRANSFER_Type xfType);
FlagStatus SSP_GetStatus(LPC_SSPn_Type* SSPx, uint32_t FlagType);
uint8_t SSP_GetDataSize(LPC_SSPn_Type* SSPx);
void SSP_IntConfig(LPC_SSPn_Type *SSPx, uint32_t IntType, FunctionalState NewState);
IntStatus SSP_GetRawIntStatus(LPC_SSPn_Type *SSPx, uint32_t RawIntType);
IntStatus SSP_GetIntStatus (LPC_SSPn_Type *SSPx, uint32_t IntType);
void SSP_ClearIntPending(LPC_SSPn_Type *SSPx, uint32_t IntType);
void SSP_DMACmd(LPC_SSPn_Type *SSPx, uint32_t DMAMode, FunctionalState NewState);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LPC18XX_SSP_H_ */
/**
* @}
*/
/* --------------------------------- End Of File ------------------------------ */

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