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1350 Commits

Author SHA1 Message Date
Yuhui Zheng
210b1ffcc8 Re-sync with upstream and stripping away none kernel related. 2020-02-10 13:45:57 -08:00
Richard Barry
9c0c37ab9b Added back some TCP/IP stack port layer files. 2020-02-07 21:51:48 +00:00
Richard Barry
7cf721ccf7 2020-02-07 21:49:55 +00:00
Yuhui.Zheng
589dd9f149 Update version number in readiness for V10.3.0 release. Sync SVN with reviewed release candidate. 2020-02-07 20:14:50 +00:00
Yuhui.Zheng
f988394e0d Fix spelling issues. 2020-02-07 19:19:47 +00:00
Richard Barry
28efb5449c Add "is inside interrupt" function to MPU ports.
Make clock setup functions weak symbols in ARMv8-M ports.
Update Cortex-M33 ports to use an interrupt mask in place of globally disabling interrupts, as per the other Cortex-M ports.
2020-02-07 01:56:25 +00:00
Richard Barry
8e5addee1e Update TCP to last release versions in preparation for kernel V10.3.0 release. 2020-02-06 22:45:37 +00:00
Richard Barry
7bea399061 Update libraries and sundry check-ins ready for the V10.3.0 kernel release. 2020-02-06 18:52:35 +00:00
Yuhui.Zheng
d319bb0c71 ESP GCC port -- Added LoadStore Exception handlers.
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/9 -- Handles LoadStoreErrorCause and LoadStoreAlignmentCause allowing to use 32-bit memory region (IRAM) as 8-bit or 16-bit memory region
2020-01-31 19:31:50 +00:00
Yuhui.Zheng
9fdfbf33e9 Sync FreeRTOS-Labs -CLI -TCP -Trace with the version in FreeRTOS-Plus.
Projects under FreeRTOS-Labs directory are in beta, developers updating projects please make sure you are using the correct version of -CLI -TCP -Trace. If you must edit -CLI -TCP and -Trace, please ensure the copies are synced.
2020-01-31 19:21:15 +00:00
Yuhui.Zheng
ec6f3d77c3 Sync FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP with the version in GitHub at (23665258cabe49d5d68ba23968b6845a7c80eb34).
Notes: 
- header has version 2.2.0. 
- This sync did not bring in ./test directory, though we should. 
- New NetworkInterfaces are introduced by this merge.
- Keil compiler support. 
- FreeRTOS_IP.h new API xApplicationGetRandomNumber().
- FreeRTOS_IP_Private.h new eIPEvent_t eNetworkTxEvent. 
- FreeRTOS_Stream_Buffer.h removing static xStreamBufferIsEmpty() and xStreamBufferIsFull().
- FreeRTOSConfigDefaults.h provides default ipconfigDNS_RECEIVE_BLOCK_TIME_TICKS. 
- other type changes.
2020-01-31 00:07:53 +00:00
Yuhui.Zheng
0c1c85a9dd Removing RISC-V port under ThirdParty.
RISC-V ports for IAR and GCC can now be found under \FreeRTOS\Source\portable\GCC\RISC-V and \FreeRTOS\Source\portable\IAR\RISC-V.
2020-01-30 22:23:03 +00:00
Yuhui.Zheng
99e796eb01 Removing unnecessary ThirdParty ports -- Wiced_CY and nrf52840-dk.
For projects depending on either of these two ports, please update your projects according to below:
Wiced_CY -- Use GCC/ARM_CRx_No_GIC instead. 
nrf52840-dk -- Use GCC/ARM_CM7/r0p1 instead. Please note that, kernel port shall only take dependency on MCU core, not MCU peripherals. (Please take out RTC related from kernel port.) For low power feature (tickless) in FreeRTOS, please follow this page https://www.freertos.org/low-power-ARM-cortex-rtos.html. In case ARM_CM7/rop1 is missing any feature, reach out to us.
2020-01-30 19:45:03 +00:00
Richard Barry
4d4493e61a Remove the FreeRTOS-IoT-Libraries from FreeRTOS-Plus as it was an old copy with a newer copy in FreeRTOS-Labs. 2020-01-30 00:05:23 +00:00
Richard Barry
0d54d1c4dc Correct an err in queue.c introduced when previously updating behaviour when queue sets are used in combination with queue overwrites. 2020-01-29 19:52:38 +00:00
Yuhui.Zheng
f5b5b2db04 Cleaning up LPC51U68 projects:
- user playable settings are all in FreeRTOSConfig.h.
- removed reference to IntQueue.h in main_full.c
- readme.txt wording.
2020-01-24 07:53:14 +00:00
Richard Barry
2415dc26b0 Introduce the portSOFTWARE_BARRIER macro which thus far is only used by the Win32 demo to hold execution up in case a simulated interrupt is executing simultaneously. That should never happen as all threads should execute on the same core, but we have had numerous reports that this and other Win32 port changes we have made fixed these issues - although we have not been able to replicate them ourselves. 2020-01-23 23:49:24 +00:00
Gaurav Aggarwal
18f87e8c33 Add MPU demo project for Nulceo-L152RE which is Coretx-M3. 2020-01-23 01:56:36 +00:00
Gaurav Aggarwal
e058a65b16 Updates to CM3_MPU GCC port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2020-01-23 01:50:25 +00:00
Richard Barry
42a0eaafdc Ensure both one-shot and auto-reload are written consistently with a hyphen in comments. 2020-01-16 04:25:29 +00:00
Richard Barry
9456992c1f Added uxTimerGetReloadMode() API function. 2020-01-16 04:10:18 +00:00
Gaurav Aggarwal
c472c5b04f Add MPU demo project for LPC54018 board. 2020-01-12 12:33:17 +00:00
Yuhui.Zheng
0d95aca202 Introduce a port for T-HEAD CK802. A simple demo for T-HEAD CB2201 is also included. 2020-01-10 07:53:14 +00:00
Richard Barry
d2914041f8 Update the GCC and IAR SiFive HiFive rev-b demos to use the new configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS constants in place of the deprecated configCLINT_BASE_ADDRESS constant.
Update the IAR RISC-V HiFive demo to use the latest IAR Embedded Workbench version.
2020-01-09 02:28:45 +00:00
Richard Barry
066e2bc7d2 Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the IAR RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-09 02:23:51 +00:00
Richard Barry
75b81a1fab Work in progress update of LPC51U68 MCUXpresso project to rearrange the folder structure and names. 2020-01-09 00:19:36 +00:00
Richard Barry
fbb23055cd Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the GCC RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-07 01:14:36 +00:00
Richard Barry
eaf9318df8 Add Source/portable/ARMClang file that directs users to the GCC port if they which to use the ARMClang compiler. 2020-01-04 00:14:18 +00:00
Richard Barry
881958514b If tickless idle mode is in use then ensure prvResetNextTaskUnblockTime() is called after a task is unblocked due to a bit being set in an event group. This allows the MCU to re-enter sleep mode at the earliest possible time (rather than waiting until the timeout that would occur had the task not being unblocked be the event group) and matches a similar change made for queues and derivative objects (semaphores, etc.) some time ago. 2020-01-03 22:50:31 +00:00
Richard Barry
853856e8cc Correct #error text in multiple fat file system files. 2020-01-03 20:53:27 +00:00
Richard Barry
9e86cb95a7 Add xPortIsInsideInterrupt() to the IAR ARMv7-M ports. 2020-01-03 01:17:29 +00:00
Richard Barry
be3561ed53 Added xTaskAbortDelayFromISR() and ulTaskNotifyValueClear() API functions.
Added tests for xTaskAbortDelayFromISR() into Demo/Common/Minimal/AbortDelay.c.
Added tests for ulTaskNotifyValueClear() into Demo/Common/Minimal/TaskNotify.c.
2020-01-02 18:55:20 +00:00
Richard Barry
0a29d350b1 Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive1-RevB_IAR as it targets the RevB hardware. 2020-01-01 22:38:23 +00:00
Richard Barry
62b413627a Minor updates to comment block for xTaskCheckForTimeOut(). 2020-01-01 22:24:44 +00:00
Richard Barry
dfc1bf8ec3 Rename RISC-V_RV32_SiFive_HiFive1-FreedomStudio directory to RISC-V_RV32_SiFive_HiFive1-RevB-FreedomStudio as it targets Rev B of the hardware. 2020-01-01 22:05:35 +00:00
Richard Barry
4b943b35e0 Update RISCC-V-RV32-SiFive_HiFive1_FreedomStudio project to latest tools and metal library versions. 2020-01-01 22:02:06 +00:00
Gaurav Aggarwal
cfa83672ef Rename STM32Cube to GCC for STM32L4 Discovery projects as GCC is
the compiler used.
2020-01-01 00:35:42 +00:00
Gaurav Aggarwal
474182ab39 Make vSetupTimerInterrupt weak in the RVDS M4 MPU port to give the
application writer a chance to override this function. This gives
the application write ability to use a different timer.
2020-01-01 00:04:10 +00:00
Gaurav Aggarwal
22dd9a55ab Update documentation of xTaskCheckForTimeOut function to reflect the
intended use of this API.
2019-12-31 20:49:07 +00:00
Yuhui.Zheng
8f0eaf274c - Updates to projects due to demo folder name change. (IAR source file paths and assembler path were fixed. Keil source file paths were fixed.)
- Added back power static library for GCC and IAR. (Power management related interface definitions are in drivers/fsl_power.h. power.c is empty due to "implementation is in header file and power library")
- Note for GCC link: the command used for linking is `arm-none-eabi-gcc -nostdlib -L<additional lib search path> -Xlinker ... -o "CORTEX_M0+_LPC51U68_LPCXpresso.axf" <all *.o> -lpower`. Per GCC doc, static library name in file system is libpower.a.
2019-12-31 08:06:33 +00:00
Richard Barry
3203c5cc85 Previously the STM32F0518 compiler setting was changed to enable the use of the __weak attribute - however changing the port layer to use #pragma weak in place of __weak means the compiler setting change is not required and removes the risk of introducing incompatibilities - so this check in reverts the compiler settings change. 2019-12-30 22:24:58 +00:00
Richard Barry
cc673eb6a5 Ensure the CORTEX_M0_STM32F0518_IAR demo builds after updates to the Cortex-M0 port layer - required an update to the project settings to allow IAR extensions as the port layer now uses the _weak qualifier. 2019-12-30 22:07:33 +00:00
Richard Barry
801e63bd10 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 22:00:26 +00:00
Richard Barry
53c98357b0 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 21:59:11 +00:00
Richard Barry
49052a6581 Ensure the XMC1000_IAR_KEIL_GCC projects still build after updates to the Cortex-M0 port layer - minor change to remove warning related to using a newer version of the IAR tools. 2019-12-30 21:44:22 +00:00
Richard Barry
e292c67933 Replace the static prvSetupTimerInterrupt() function in the Cortex-M port layers that still used it (other than MPU ports so far) with a weakly defined function call vPortSetupTimerInterrupt() - which allows application writers to override the function with one that uses a different clock. 2019-12-30 21:16:09 +00:00
Richard Barry
e23d638afd Correct use of xStreamBufferRead() to xStreamBufferReceive() in code comments - no source code changes. 2019-12-30 20:00:49 +00:00
Richard Barry
c72df2f98d Tidy up comments only. 2019-12-27 21:22:07 +00:00
Richard Barry
7ddea8fc8b Enable the Win32 comprehensive test/demo build and run when configUSE_QUEUE_SETS is set to 0. 2019-12-27 21:02:23 +00:00
Richard Barry
70dbc12579 Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and executes in QEMU. 2019-12-27 20:59:57 +00:00
Gaurav Aggarwal
cef6548e8b Updates to CM4_MPU RCDS port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-24 22:45:32 +00:00
Gaurav Aggarwal
18c3e5e02a Remove local paths from the URL files 2019-12-24 19:16:19 +00:00
Richard Barry
05adf564f6 Add readme into the third party RISC-V port that points to the directories that contains the official ports. 2019-12-24 17:24:23 +00:00
Gaurav Aggarwal
ce7e8b87d8 Add IAR MPU project for STM32L475 Discovery Kit IoT Node 2019-12-21 00:04:04 +00:00
Gaurav Aggarwal
96b6746364 Updates to CM4_MPU IAR port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-21 00:02:31 +00:00
Richard Barry
b27fb82bc1 Increase test coverage for queue sets.
Rename the CORTEX_M0+_LPC51U68_LPCXpresso demo to CORTEX_M0+_LPC51U68_GCC_IAR_KEIL as it supports all three compilers.
2019-12-20 02:54:30 +00:00
Richard Barry
b55bbe55ac Remove build files accidentally checked in.
Remove the CMSIS math library as it is large and not used.
2019-12-20 02:49:15 +00:00
Gaurav Aggarwal
47c666bb1e Add MPU projects for STM32L475 Discovery Kit IoT Node 2019-12-20 02:07:09 +00:00
Gaurav Aggarwal
47d8ac6ac6 Updates to CM4_MPU GCC port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-20 02:05:44 +00:00
Yuhui.Zheng
c07f60c383 Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+).
Please see readme.txt for todo items.
2019-12-18 10:06:30 +00:00
Yuhui.Zheng
9c0e3fe9f1 Cortex M0 GCC/IAR/Keil ports -- tickless support.
The default portMISSED_COUNTS_FACTOR is set to 45 cycles. User could override this value, if a more accurate count is available.
2019-12-18 09:55:08 +00:00
Yuhui.Zheng
3cde02a046 RVDS/Keil weak linkage for vPortSetupTimerInterrupt() -- CM4F, CM3
Test steps are documented in this PR https://github.com/aws/amazon-freertos/pull/1141.
2019-12-18 02:08:06 +00:00
Gaurav Aggarwal
d58e6a7b09 Use linker script variables for MPU setup for Nuvoton M2351 Keil Project
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil uVision project for Nuvoton Numaker-PFM-M2351
to use the variables exported from the linker script. This ensures
that the MPU setup never goes out of sync with linker script.
2019-12-17 01:45:53 +00:00
Gaurav Aggarwal
d449c8979d Use the linker script variables for MPU setup for Keil Simulator Demo
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil Simulator demo to use the variables exported
from the linker script. This ensures that the MPU setup does not
go out of sync with linker script.
2019-12-17 00:14:26 +00:00
Gaurav Aggarwal
66ce9f7d72 Move warning suppression for IAR compiler to portmacro.h for v8M ports
IAR produces some warnings which can not be fixed in the source code because
then other compilers start generating warnings. We suppressed those warnings
in the project file before. This change moves the warning suppression from
project files to portmacro.h.
2019-12-07 01:23:17 +00:00
Yuhui.Zheng
1deeb6dd84 Check socket binding result before doing anything with socket. (This is to address ARG findings.) Breaking the single return rule here, due to precedent violation at line 1039 and 1144.
prvTransferConnect() now returns:
- pdTRUE: everything's good. pdTRUE = 1.
- -pdFREERTOS_ERRNO_ENOMEM: FreeRTOS_socket() failed. -pdFREERTOS_ERRNO_ENOMEM = -12.
- -pdFREERTOS_ERRNO_EINVAL || -pdFREERTOS_ERRNO_ECANCELED: FreeRTOS_bind() failed. Negative values.

Thus, at line 569 and line 617, needs to check != pdTRUE instead of == pdFALSE.

This commit is done on behalf of Alfred.
2019-12-04 07:52:49 +00:00
Richard Barry
9491af1fd7 Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to overwrite items in two queues that are part of the same set.
Minor queue optimisations.
2019-12-03 01:50:07 +00:00
Richard Barry
e5708b38e9 Add the Labs projects provided in the V10.2.1_191129 zip file. 2019-12-02 23:39:25 +00:00
Richard Barry
46e5937529 Remove guards against __ARMCC_VERSION version numbers that were previously used to avoid compiler warnings in some GCC ARM Cortex ports. 2019-11-21 22:35:21 +00:00
Richard Barry
d1fb8907ab Add software timer to the Win32 blinky demo. 2019-11-18 17:35:40 +00:00
Richard Barry
07622ed3ee Remove driver files that generate compiler warnings from the RISC-V_Renode_Emulator_SoftConsole project.
Update RISC-V ports so the interrupt stack is set to a known value before the scheduler is started if the interrupt stack is statically defined rather than re-using the main.c() stack.
2019-11-18 17:23:14 +00:00
Richard Barry
16639d2d63 Update to the latest atomic.h.
Improve commenting in RISC-V GCC port.
Fix IAR RISC-V port so the first task starts with interrupts enabled.
Add references to third party page ref using newlib with FreeRTOS into the tasks.c file in each place newlib is referenced.
Move the position of the traceTASK_DELETE() trace macro in case of use with a memory allocator that writes over freed memory even when inside a critical section.
Efficiency improvement:  Make sure xTaskIncrementTick() does not return pdTRUE when the scheduler is locked.  This just prevents an unnecessary yield interrupt (unnecessary as it is ignored) when xYieldPending happens to be pdTRUE.
2019-11-18 16:28:03 +00:00
Richard Barry
18916d5820 Rename the RISC-V_RV32_SiFive_Hifive1_GCC folder to RISC-V_RV32_SiFive_HiFive1_FreedomStudio as it is built with Freedom Studio. 2019-10-22 22:30:06 +00:00
Richard Barry
5306ba245d Add nano-specs linker option to HiFive1_GCC demo. 2019-10-22 22:27:55 +00:00
Richard Barry
c0741e36ed Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c files. 2019-10-22 16:31:57 +00:00
Richard Barry
fccc445865 Change version and license text in RISC-V_RV32_SiFive_HiFive1_GCC FreeRTOSConfig.h file. 2019-10-22 02:17:15 +00:00
Richard Barry
11c391dfb3 Tidy up main_full.c and change alignment of variable accesses in RegTest.S for the RISC-V_Renode_Emulator_SoftConsole demo. 2019-10-22 02:15:28 +00:00
Richard Barry
343fbe795f Rework RISC-V QEMU example to use vanilla Eclipse in place of Freedom Studio. NOTE: RISC-V QEMU mtime interrupts are not generated consistently. 2019-10-22 02:03:15 +00:00
Richard Barry
ef31243396 Add some asserts into the common demo tasks to catch scenarios where the tasks are not being used but the part of the demo/test that gets called from the tick hook is called resultant in an access to objects that were not created. 2019-10-21 17:17:34 +00:00
Richard Barry
61a003088d Update RISK-V GCC port to ensure the first task starts with interrupts enabled - previously its interrupts were only enabled after it yielded for the first time. 2019-10-21 04:16:32 +00:00
Richard Barry
a83244a37e Add the miv-basic.resc reNode script into the RISC-V_Renode_Emulator_SoftConsole demo as it is no longer shipped with the Microsemi tools. 2019-10-17 20:39:40 +00:00
Richard Barry
c7c60cff15 Rename RISC-V-Qemu-sive_e_Freedom_Studio directory to RISC-V-Qemu-sifive_e-Eclipse-GCC as it is now using Vanilla Eclipse and vanilla GCC in place of Freedom Studio. 2019-10-16 04:31:57 +00:00
Richard Barry
f78ccd077a Recreate the RISC-V-Qemu demo using Vanilla Eclipse in place of Freedom Studio as there is not a new Freedom Studio project that targets the HiFive1 board, and the updated Freedom Studio version didn't work with this project any more anyway. 2019-10-16 04:28:28 +00:00
Richard Barry
d435a7b62d Move the call to traceTASK_DELETE() to before port portPRE_TASK_DELETE_HOOK() as in the Windows port portPRE_TASK_DELETE_HOOK() never returns. 2019-10-15 22:14:40 +00:00
Richard Barry
4922cff4ce Add IAR demo for the SiFive RISC-V HiFive Rev B board. 2019-10-14 03:20:18 +00:00
Richard Barry
f6edf4adf9 Update the RegTest.S file used by several GCC RISC-V demos to ensure correct alignment of constant loads from assembly code. 2019-10-14 00:16:25 +00:00
Richard Barry
96e61a10a5 Tidy up the RISC-V_RV32_SiFive_HiFive1_GCC demo ready for its eventual release. 2019-10-14 00:04:53 +00:00
Richard Barry
d4216903d9 Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup check in only as still a work in progress. 2019-10-13 22:53:00 +00:00
Richard Barry
71d9450836 RIS-V_RV32_SiFive_HiFive1_GCC project now running the blinky demo - still a work in progress. 2019-10-11 02:59:13 +00:00
Richard Barry
dbac79045c Formatting changes only. 2019-10-10 17:56:10 +00:00
Richard Barry
dbbebbfcbc RISC-V-RV32_SiFive_HiFive1_GCC project is now also building the FreeRTOS kernel code - but not using it yet - still a work in progress. 2019-10-10 17:54:56 +00:00
Richard Barry
9bb072a2ab Base project to replace existing Freedom Studio project using latest Freedom Studio project format - builds and executes but does not yet include RTOS code. 2019-10-09 04:50:11 +00:00
Richard Barry
fd118f1888 Minor formatting change in comment only. 2019-10-07 18:56:33 +00:00
Yuhui.Zheng
eb5c60c60b Update FreeRTOS.h with the version in GitHub. This is also to test submodule. 2019-09-24 22:29:35 +00:00
Yuhui.Zheng
0fe36e497d Nordic port. Notes for Richard -- the work items we discussed about for nrf52840-dk and Wiced_CY still remain. The only reason for this commit is we want to test out submodule. 2019-09-24 22:26:36 +00:00
Yuhui.Zheng
35bc9d7938 Revert 2728. Not because the files are still needed, but because we want to test out submodule.
Before further updating project files in GitHub, keeping an additional copy.
2019-09-24 22:19:54 +00:00
Yuhui.Zheng
f001126ea8 Wiced_CY port is not needed anymore. Use GCC/ARM_CRx_No_GIC instead. 2019-09-24 20:56:55 +00:00
Yuhui.Zheng
9052882500 Adding tickless hooks to GCC/ARM_CRx_No_GIC port. 2019-09-24 20:07:40 +00:00
Richard Barry
80c1cb5de1 Correct code comments that referred to taskYIELD_FROM_ISR to portYIELD_FROM_ISR.
Update RV32 port to use 16 byte-alignment all the time (only strictly necessary when using FLOP instructions).
2019-09-24 16:06:21 +00:00
Yuhui.Zheng
c217b68d38 sync from github to svn: this version of atomic.h does not have compiler specific symbols. compiler specific optimization is to be merged in each port/<compiler>/<arch> directory. 2019-09-23 16:51:03 +00:00
Yuhui.Zheng
6f958bbf80 sync from github to svn: Xtensa GCC as-is. 2019-09-20 22:09:21 +00:00
Yuhui.Zheng
1c5fcc7f05 sync from github to svn: Wiced_CY for AFR Cypress ports. 2019-09-20 20:52:30 +00:00
Yuhui.Zheng
74df636c78 sync from github to svn: documentation for RISC-V. This may be a temporary parking location. 2019-09-20 20:47:29 +00:00
Yuhui.Zheng
cc0aee651e sync from github to svn: Renasas/RX100 #pragma _VECT() 2019-09-20 20:41:32 +00:00
Richard Barry
da3d370ff7 RISC-V port updates: The machine timer compare register can now be for any HART, and correct the sequence used to update the 64-bit machine timer compare register on 32-bit cores. 2019-09-04 15:46:45 +00:00
Richard Barry
96bad0f6c3 Minor bug fix in NTPDemo.c -> use of FREERTOS_INVALID_SOCKET in place of NULL.
Update trace recorder code to account for uxPendedTicks renaming to xPendedTicks.
2019-09-04 00:13:17 +00:00
Richard Barry
ab41d89285 Add IAR RISC-V port to SVN - a work in progress. 2019-09-03 01:39:29 +00:00
Yuhui Zheng
2b546b1984 Atollic project update for CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC, GCC port. 2019-08-30 00:18:41 +00:00
Richard Barry
973a4f9869 Correct alignment of stack top in RISC-V port when configISR_STACK_SIZE_WORDS is defined to a non zero value. 2019-08-27 15:57:45 +00:00
Richard Barry
7d285f3dcb + Moved the History.txt file from the website git repo into the source code SVN repo.
+ Added xTaskCatchUpTicks() which corrects the tick count value after the application code has held interrupts disabled for an extended period.
+ Updated the xTaskResumeAll() implementation so it uses the new xTaskCatchUpTicks() function mentioned above to unwind ticks that were pended while the scheduler was suspended.
+ Various maintenance on the message buffer, stream buffer and abort delay demos.
+ Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it has same type as variables it is compared to, and therefore also rename the variable xPendingTicks.
+ Correct spelling mistake within a comment that was common to all the ARMv7-M ports.
2019-08-25 19:35:59 +00:00
Richard Barry
72af51cd86 Starting point for IAR RISC-V project created some time ago - checking in now so it can be completed - currently work in progress. 2019-08-04 15:24:15 +00:00
Richard Barry
5352cb4f45 Tidy up Win32 port layer - include addition of new variable that prevents recursive attempts to obtain a mutex when the trace recorder is used inside an interrupt. 2019-08-04 01:14:43 +00:00
Gaurav Aggarwal
b1e35551c4 Update the FreeRTOS version number in task.h 2019-07-29 23:48:11 +00:00
Gaurav Aggarwal
6bad7d2055 Add the default definition of configPRECONDITION to FreeRTOS.h.
This is needed for CBMC proofs.
2019-07-27 23:03:23 +00:00
Richard Barry
b4c06085e1 Files as per 190725_FreeRTOS_IoT_Libs_Task_Pool_and_MQTT_Preview interim release. 2019-07-25 20:20:24 +00:00
Richard Barry
b24ab46d39 Delete obsolete makefiles that were causing confusion from RISC-V-Qemu-sifive_e-FreedomStudio demo. 2019-07-25 20:11:37 +00:00
Richard Barry
10b7b52995 Remove unnecessary include path from the MQTT demo. 2019-07-24 02:01:43 +00:00
Gaurav Aggarwal
38b6553abd Cosmetic changes in the MQTT demo - mostly comment updates. 2019-07-24 01:29:01 +00:00
Richard Barry
fe4511b35e Continued to work on the MQTT demo project.
A few review comments added into the MQTT implementation.
2019-07-24 00:27:14 +00:00
Richard Barry
53842d4cac Remove the simple UDP client/server tasks from the MQTT demo as the demo's network connection can be tested more easily just by pinging it.
Tidy up the iot_config.h header files a little.
2019-07-23 19:23:12 +00:00
Gaurav Aggarwal
95f60318d5 Cosmetic changes in the MQTT demo
- Fix warnings in the MQTT code.
- Update comments in the iot_config.h.
2019-07-23 18:20:06 +00:00
Richard Barry
17b18c8b7e Reduce warning level in Visual Studio project as it generates lots of warnings in the library files. 2019-07-23 17:30:18 +00:00
Richard Barry
d1dd8da12e Revert a couple of changes in Win32 demo that should not have been checked in. 2019-07-23 17:02:59 +00:00
Gaurav Aggarwal
05e7d9cc08 Remove dependency on secure sockets
Network interface implementation for FreeRTOS now directly calls into
FreeRTOS+TCP instead of going via secure sockets.
2019-07-23 06:55:54 +00:00
Gaurav Aggarwal
68fd276886 Remove IotMqtt_Assert( pTaskPool == IOT_SYSTEM_TASKPOOL ) from MQTT code
The cut down version of the task pool has only one task pool, namely,
system task pool. All the task pool API functions accept NULL as a
valid parameter for IotTaskPool_t and use the system task pool when
NULL is passed for the system task pool.

IOT_SYSTEM_TASKPOOL is defined to NULL to use system task pool and
therefore the above assert is no longer valid.
2019-07-23 04:49:24 +00:00
Gaurav Aggarwal
8ea501ef11 Update projects to use the new directory name
IotTaskPool_GetSystemTaskPool has been removed from the cut down version
of the task pool. define IOT_SYSTEM_TASKPOOL to NULL so that the MQTT library
builds successfully.

Use the new #defines in the iot_config.h.
2019-07-23 04:16:32 +00:00
Gaurav Aggarwal
9dd72d4b44 Rename \FreeRTOS-Plus\Source\FreeRTOS-Plus-IoT-SDK to \FreeRTOS-Plus\Source\FreeRTOS-IoT-Libraries. 2019-07-23 03:41:27 +00:00
Richard Barry
7af8756c97 Update task pool so tasks and timer are allocated statically. 2019-07-23 01:46:59 +00:00
Richard Barry
1840d38abf Another backup check-in during process of optimising task pool for FreeRTOS. This checkin is prior to making the task pool statically allocated. 2019-07-23 00:00:37 +00:00
Richard Barry
63c87504a0 Backup checking on - part way through optimising task pool. 2019-07-22 21:46:13 +00:00
Gaurav Aggarwal
4c775574eb Fix DNS resolution failure for test.mosquitto.org
The DNS cache entry size was not big enough to fit the DNS name and
as a result the DNS reply parsing code returned error. Increased the
size of the entry to ensure that the DNS name can fit in.
2019-07-22 18:27:45 +00:00
Gaurav Aggarwal
06f9278de3 The MQTT example now works with the local MQTT broker.
It still needs to be tested with the public mosquitto broker.
2019-07-21 23:26:54 +00:00
Gaurav Aggarwal
a7ef9c3b61 Add first draft of mqtt example
Note that it is still work in progress and not working as of now.
2019-07-21 22:14:13 +00:00
Richard Barry
238a23e4d5 Add the files from the MQTT project that were not check in. 2019-07-19 01:39:42 +00:00
Richard Barry
5dd6cf1295 Add missing files so base MQTT project builds. 2019-07-19 00:37:33 +00:00
Gaurav Aggarwal
d708efe997 Update the task pool demo to show re-use of recyclable jobs
The example now creates a recyclable job, schedules it and returns it
back to the task pool when it is done. It then again creates a
recyclable job and ensures that the task pool the same job present
it its cache.
2019-07-19 00:02:45 +00:00
Richard Barry
2b295f9015 Added simple UDP demo into the mqtt project to enable the network connectivity to be tested in a simple way prior to performing any MQTT operations. 2019-07-17 20:50:15 +00:00
Richard Barry
d362efca8d Add MQTT project that builds on the task pool project - currently the library is building but not being used. 2019-07-17 19:44:13 +00:00
Richard Barry
3c3b32b8e4 Rename the FreeRTOS_Plus_IoT_SDK directory to FreeRTOS_IoT_Libraries. 2019-07-16 18:21:42 +00:00
Richard Barry
290c8cedfd Function rename in task pool demo. 2019-07-16 18:19:44 +00:00
Richard Barry
bb0e1f356d Remove any TCP/IP functionality from the task pool demo - the TCP/IP stack is still built as it will be used in later revisions. 2019-07-14 23:33:05 +00:00
Richard Barry
2e18203bb7 Update TCP/IP tack to latest form Git. 2019-07-14 22:07:41 +00:00
Richard Barry
a6a0403fd6 Synch IoT libraries with latest versions. 2019-07-14 19:29:16 +00:00
Richard Barry
e4e86a464e New MSVC task pool demo now building both the task pool and TCP libraries. 2019-07-14 19:13:51 +00:00
Richard Barry
3afd918ecd Rename the task pool version of FreeRTOS_Plus_TCP_Minimal.sln to task_pool_demo.sln. 2019-07-14 18:04:40 +00:00
Richard Barry
232a94c3f0 Restart the task pool demo, this time using the minimal FreeRTOS+TCP project as a base. 2019-07-14 18:01:57 +00:00
Richard Barry
d8a3ad3c6f Minor modification to the WIn32 simple TCP/IP stack example only. 2019-07-14 16:06:31 +00:00
Richard Barry
8bd1813446 Only partially implemented and may get reverted - updates to the Win32 port that uses a per-task event to prevent the task proceeding past its yield point if the SuspendThread() call used to stop the task does not take effect immediately. This is intended to fix issues reported by users, although we have been unable to replicate them ourselves. 2019-07-12 01:52:22 +00:00
Richard Barry
e60f71855a Remove IotTaskPool_CreateRecyclableSystemJob() and IotTaskPool_ScheduleSystemJob() again, which were intended to be alternative APIs that only access the system task pool, and instead update IotTaskPool_CreateRecyclableJob() and IotTaskPool_ScheduleJob() to allow the parameter used to pass in the task pool handle to be NULL if the system task pool is the only one available.
Update the task pool demo app to include a lot more functionality.
2019-07-08 15:48:21 +00:00
Richard Barry
4d6570b009 Exercise the new vPortGetHeapStats() function from the Win32 demo projects. 2019-07-05 20:21:59 +00:00
Richard Barry
fa404422b9 Add link to dual core blog post into STM32H745I demo.
Doxygen corrections in list.h.
Use #error to check FreeRTOS.h is included before message_buffer.h and stream_buffer.h.
2019-07-04 21:18:36 +00:00
Richard Barry
246bb6e806 Add vPortGetHeapStats() function to query heap statistics. 2019-07-04 19:34:48 +00:00
Gaurav Aggarwal
7235743749 Only check once before re-setting ready priority
The macro taskRESET_READY_PRIORITY checks if the task being removed from the
ready list is the last one and only then resets the top ready priority
by calling portRESET_READY_PRIORITY. If we already know that it is the
last ready task being removed then there is no need to perform the check
again and the macro portRESET_READY_PRIORITY can be called directly. We were
doing the unnecessary check at two places and this commit fixes them.

This commit also increases the time period of check task to ensure that all
the demo tasks get a chance to run before the check is performed.
2019-07-03 00:08:16 +00:00
Gaurav Aggarwal
004e2b637e Use ARMCM33_DSP_FP_TZ_config.txt which comes with the MDS installation
We had a copy of ARMCM33_DSP_FP_TZ_config.txt file within the project directory
and it used to get outdated with each release of MDK because of non-backward
compatible changes in MDK. This change removes the copy in the project and
instead uses the one shipped with the MDK installation.
2019-07-02 18:47:36 +00:00
Richard Barry
e75b609c74 In small FreeRTOS applications it is unlikely there will be any task pools other than the system task pool. IotTaskPool_CreateRecyclableSystemJob() is therefore introduced to complement IotTaskPool_CreateRecyclableJob() that does not require the handle of the target task pool to be specified as a parameter. Likewise IotTaskPool_ScheduleSystemJob() is introduced to complement IotTaskPool_ScheduleJob() for the same reason.
IotTaskPool_CreateSystemTaskPool() calls synchronisation primitives, so cannot be called before the scheduler starts.  Add a configASSERT() to ensure the scheduler is running when it executes.
IotTaskPool_CreateSystemTaskPool() can conceivably be called from multiple different libraries that depend on the thread pool.  In this version _IotSystemTaskPool.running can be used to check the system task pool has not already been created.  If the task pool has been created simply return from IotTaskPool_CreateSystemTaskPool() instead of re-creating it (which would leak memory and leave orphaned tasks).
Call taskENTER_CRITICAL() and taskEXIT_CRITICAL() directly in place of mapping them to TASKPOOL_ENTER_CRITICAL() and TASKPOOL_EXIT_CRITICAL() in the same file.
Rename _timerThread() _timerCallback(), as it is a callback function and not a thread.
Remove the unused flags parameter from _scheduleInternal().
2019-07-01 17:05:20 +00:00
Richard Barry
76cc2a00c6 Add the first and most basic task pool example. 2019-06-28 23:20:52 +00:00
Richard Barry
87eb37342f Create a project that builds a subset of the dependencies of the IoT SDK that have been brought into SVN thus far. The application does nothing other than build at this time. 2019-06-19 18:42:58 +00:00
Richard Barry
0b0a02b76a Bring in a minimum subset of the IoT SDK - at this time just a subset of the library dependencies rather than the libraries themselves. 2019-06-19 18:41:21 +00:00
Richard Barry
fb3eaeac40 Added additional xMessageBufferSpacesAvailable() (plural) to existing xMessageBufferSpaceAvailable() (singular) macro as the documentation muddled both.
Added #define portPOINTER_SIZE_TYPE 	uint64_t to the 64-bit RISC-V port layer.
2019-05-13 03:14:05 +00:00
Richard Barry
b51529a284 Update version number ready for next release. 2019-05-11 01:47:37 +00:00
Gaurav Aggarwal
9e10b08a3a Delete the Release configuration from the NXP project.
Also, some cosmetic changes.
2019-05-11 00:53:34 +00:00
Richard Barry
db5d265c07 Removing obsolete code and files only. 2019-05-10 22:19:18 +00:00
Richard Barry
53cb12e389 Add M7/M4 AMP demo. 2019-05-10 18:25:10 +00:00
Gaurav Aggarwal
0b1a025789 Add NXP libs needed to build the project 2019-05-09 22:27:44 +00:00
Gaurav Aggarwal
aa9c8d2697 Delete the not needed file missed in last commit 2019-05-09 22:09:12 +00:00
Gaurav Aggarwal
b9e379951a Do not strip required symbols when LTO is on
Link time optimization was stripping off some symbols which were
accessed from assembly code.
2019-05-09 22:04:29 +00:00
Gaurav Aggarwal
b6e5f96f0e Ensure that fault handlers are declared naked. 2019-05-05 02:26:42 +00:00
Gaurav Aggarwal
2279a86566 Add ARMv8M demo project for NXP LPC55S69. 2019-05-05 02:15:55 +00:00
Gaurav Aggarwal
ae448fc952 Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351. 2019-05-02 21:08:28 +00:00
Richard Barry
079d081346 Basic 64-bit RISC-V port now functional. RISC-V port layer automatically switches between 32-bit and 64-bit. 2019-04-29 00:57:14 +00:00
Richard Barry
27ca5c8341 Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM Cortex-M33 ports to assist with link time optimisation. 2019-04-25 19:49:50 +00:00
Richard Barry
84377442fc Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM GCC ports to assist with link time optimisation. 2019-04-21 20:15:34 +00:00
Richard Barry
606845492b Fix potential memory leak in the Win32 FreeRTOS+TCP network interface initialisation sequence.
Introduce portMEMORY_BARRIER() macro to assist with memory access ordering when suspending the scheduler if link time optimization is used.
2019-04-17 17:16:04 +00:00
Gaurav Aggarwal
dd9a9710c6 Export port architecture name for COrtex-M33. This can be used by debuggers to find the port in-use to be able to correctly decode the context stored on the stack. 2019-03-28 00:00:46 +00:00
Gaurav Aggarwal
ba39a958b5 Fix spelling of priority in comments. 2019-03-18 23:28:03 +00:00
Gaurav Aggarwal
12fb75be37 Fix warning portHAS_STACK_OVERFLOW_CHECKING not defined
portHAS_STACK_OVERFLOW_CHECKING was getting defined too late before
being used in portable.h for the platforms that do not have stack
overflow checking registers. This commit ensures that it is defined
before it is used.
2019-03-13 21:10:44 +00:00
Richard Barry
2265d70499 Correcting spelling mistakes in comments only. 2019-03-08 17:30:49 +00:00
Richard Barry
06596c3192 Prepare the RISC-V port layer for addition of 64-bit port. 2019-03-08 17:03:43 +00:00
Richard Barry
50e67a89f1 Update version number in +TCP code. 2019-02-21 18:08:36 +00:00
Gaurav Aggarwal
5fe8465a35 Change type of usStackDepth to configSTACK_DEPTH_TYPE. 2019-02-21 03:25:30 +00:00
Gaurav Aggarwal
5623c69748 Fix Build and Links failure in MPU projects. Minor cosmetic changes in some V8M files. 2019-02-20 20:27:07 +00:00
Richard Barry
8b6ab5f197 Add instructions on building the Cortex-M33 secure and non secure projects into the comments of that project and into a readme.txt file.
Enable configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES setting to be used in statically allocated systems.
2019-02-20 17:55:59 +00:00
Gaurav Aggarwal
ceeff14524 Set default value of configRUN_FREERTOS_SECURE_ONLY to 0. 2019-02-20 00:40:46 +00:00
Gaurav Aggarwal
5849459c65 Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change spaces to tabs. 2019-02-20 00:25:45 +00:00
Richard Barry
c3c9c12ce2 Update the common demo death.c to use the updated macro name to give it a secure context. 2019-02-19 02:57:44 +00:00
Gaurav Aggarwal
ce576f3683 First Official Release of ARMV8M Support. This release removes Pre-Release from all the ARMv8M files licensees. 2019-02-19 02:30:32 +00:00
Richard Barry
58ba10eee8 Update version number in readiness for V10.2.0 release. 2019-02-17 22:36:16 +00:00
Gaurav Aggarwal
55ad3861c5 Sync the Renesas port to AFR Git Repo 2019-02-17 01:27:16 +00:00
Gaurav Aggarwal
0de2a2758a Fix definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE
tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE was not correctly defined resulting in
dynamically allocated TCB not being freed when MPU was enabled. This commit fixes
the definition to ensure that dynamically allocated RAM (Stack and TCB) is freed
always.
2019-02-17 01:24:58 +00:00
Gaurav Aggarwal
2c88fb7fa1 Fix build failure when dynamic allocation is not enabled.
When dynamic allocation is not enabled, vPortFree is not available. The current code used
vPortFree and this resulted in linker error. This commit removes the use of vPortFree when
dynamic allocation is not enabled.
2019-02-16 20:21:47 +00:00
Richard Barry
6844bef74f Replace the pdf RISC-V documentation with links to the documentation web pages. 2019-02-16 01:15:33 +00:00
Richard Barry
b2b1b09ea5 Fix bug in core_cm3.c atomic macros.
Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
2019-02-16 01:08:38 +00:00
Richard Barry
3153131fa7 Add Dornerworks attribution to makefiles that build the Freedom Studio RISC-V project. 2019-02-12 02:43:28 +00:00
Richard Barry
7e08fd6d07 Add makefiles that build the FreedomStudio project (provided by Dornerworks - thanks). 2019-02-11 19:44:13 +00:00
Richard Barry
fb73829148 Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
2019-02-08 01:18:08 +00:00
Richard Barry
df5952f655 Add xTaskGetIdleRunTimeCounter() API function to return the run time stats counter for the idle task - useful for POSIX time implementations. 2019-01-21 23:39:48 +00:00
Gaurav Aggarwal
817783d75c Copyright updates from Cadence.
e1df894752
2019-01-16 19:01:25 +00:00
Richard Barry
a4941ac5db Update main.c() for the WIN32-MingW project so the trace recorder is initialized even when the simple blinky demo is used - otherwise the trace recorder causes an exception as it is used without first being initialized. 2019-01-07 19:40:13 +00:00
Richard Barry
80df5cd517 Update the pin mux setup on the Vega board demo to enable the LED. 2018-12-31 20:14:34 +00:00
Richard Barry
11d9c440b8 Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
Add a project for the Vega board's RI5CY core.
2018-12-31 18:19:52 +00:00
Richard Barry
e2af102c80 Re-org of RISC-V file structure and naming step 2. 2018-12-30 23:53:47 +00:00
Richard Barry
818eeccc0c Re-org of RISC-V file structure and naming step 1. 2018-12-30 23:20:26 +00:00
Richard Barry
3474e750fa Create folder to hold RISC-V chip specific extensions. 2018-12-30 23:15:37 +00:00
Richard Barry
db750d0c82 Update RSIC-V port layer after testing saving and receiving of chip specific registers. 2018-12-30 23:11:40 +00:00
Richard Barry
60b133b2c6 Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack. 2018-12-30 20:00:43 +00:00
Richard Barry
911a1de273 Correct accidental deletion in GenQTest.c. 2018-12-28 03:38:27 +00:00
Richard Barry
d369110167 Allow the size of the stack used by many of the standard demo/test tasks to be overridden by FreeRTOSConfig.h settings.
Update the Freedom Studio RISC-V project so the 'full' build configuration is now functional.
2018-12-28 00:44:18 +00:00
Richard Barry
178fe4f143 Update the Freedom Studio RISC-V project so the gdbinit options are now specified on the command line. 2018-12-27 04:57:49 +00:00
Richard Barry
e5daf23d75 Update Freedom Studio RISC-V demo for the latest GCC RISC-V port - not yet tested. 2018-12-27 04:34:08 +00:00
Richard Barry
80f6f3e59b Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running. 2018-12-24 17:48:10 +00:00
Richard Barry
ce36928ea8 Rename directories in the RISC-V port. 2018-12-24 17:37:02 +00:00
Richard Barry
2181c0375e Backup Microsemi Renode project before adding a build configuration for the target hardware. 2018-12-19 02:56:13 +00:00
Richard Barry
8d213b42f2 Add vTimerSetReloadMode() calls to the code coverage tests. 2018-12-17 23:19:23 +00:00
Richard Barry
6edabbe7ea Update the the MPU simulator project to exercise the timer API. 2018-12-17 22:06:58 +00:00
Richard Barry
148f588f56 Remove "FromISR' functions from the list of functions that switch to a privileged mode as IRQs are privileged already.
Add the vTimerSetReloadMode() API function.
2018-12-17 22:04:18 +00:00
Richard Barry
8285ca6b5f Update RISC-V_IGLOO2_Creative_SoftConsole demo to make use of new RISC-V porting layer structure and exercise some external interrupts - all tests currently passing in Renode. 2018-12-17 00:01:36 +00:00
Richard Barry
101806906d Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions and accommodate chips that don't include the CLINT. 2018-12-16 23:59:49 +00:00
Richard Barry
7cc42b2ab6 Save changes to the RISC-V port layer before making changes necessary to support pulpino too:
+ Switch positions of the asm functions used to start the kernel and handle traps to enable one to reference to the other.
+ Handle external interrupts (working with Renode emulator).
+ The _sp linker variable is now called __freertos_irq_stack_top.
2018-12-16 20:21:29 +00:00
Richard Barry
866635d2ad Microsemi RISC-V project:
Reorganize project to separate Microsemi code into its own directory.
    Add many more demo and tests.
2018-12-10 20:55:32 +00:00
Richard Barry
6b37800ade Backup checkin of MiFive demo running in ReNode emulator. 2018-12-10 05:28:05 +00:00
Richard Barry
9a136a52df Backup check in of the Microsemi IGLOO2 Creative Board RISC-V demo - still a work in progress. 2018-12-04 01:27:06 +00:00
Richard Barry
4b9dd38d1c Backup checking of the Freedom Studio RISC-V project - still a work in progress. 2018-12-04 01:25:53 +00:00
Richard Barry
65f7a2dc19 Update RISC-V port to use a separate interrupt stack. 2018-12-04 01:23:41 +00:00
Richard Barry
e85ea96f78 Some efficiency improvements in Risc-V port. 2018-11-28 19:35:40 +00:00
Richard Barry
dc99300fa9 First task running in RISC-V-Qemu-sifive_e-FreedomStudio demo. 2018-11-24 20:59:07 +00:00
Richard Barry
d0ef322b13 Add kernel code to the RISC-V-Qemu-sifive_e-FreedomStudio demo. 2018-11-24 04:42:20 +00:00
Richard Barry
f7102f2342 Add a starting point for a Freedom Studio Risc V project. 2018-11-24 03:48:55 +00:00
Richard Barry
db64297487 Provide each Risc V task with an initial mstatus register value. 2018-11-20 20:12:35 +00:00
Richard Barry
8cef339aec Update Risc-V port to use environment call in place of software interrupt - still very much a work in progress. 2018-11-19 06:01:29 +00:00
Richard Barry
baee711cb6 Continue work on Risc V port. 2018-11-06 02:04:28 +00:00
Richard Barry
74d0d16aab Update xTaskRemoveFromEventList() so when tickless idle is used prvResetNextTaskUnblockTime() only gets called if the scheduler is not locked, as it would get called when the scheduler is unlocked in any case. 2018-11-05 19:35:54 +00:00
Richard Barry
55ff89373a Update the method used to detect if a timer is active. Previously the timer was deemed to be inactive if it was not referenced from a list. However, when a timer is updated it is temporarily removed from, then re-added to a list, so now the timer's active status is stored separately. 2018-10-24 21:37:59 +00:00
Richard Barry
6fab2b9e0d Add xTaskGetApplicationTaskTagFromISR(), which is an interrupt safe version of xTaskGetApplicationTaskTagFrom(). 2018-10-08 15:10:18 +00:00
Gaurav Aggarwal
1af80854e6 Fix Xtensa project file and some documentation improvements. 2018-10-02 23:54:51 +00:00
Richard Barry
c6de0001fa Added uxTaskGetStackHighWaterMark2(), which is the same as uxTaskGetStackHighWaterMark() other than the return type.
Allows the task name parameter passed into xTaskCreate() to be NULL.
2018-09-30 21:50:05 +00:00
Richard Barry
e3dc5e934b RISC-V tasks now context switching to each other using taskYIELD() - not fully tested yet. 2018-09-27 17:25:17 +00:00
Richard Barry
2bcb1ab02b Add trap handler to RISC-V port so there is no dependency on third party code. 2018-09-23 03:52:23 +00:00
Richard Barry
32f35e9130 RISC-V:
Added code to setup the timer interrupt - not tested yet.
Added the taskYIELD() implementation - so far just checked it generates an interrupt.
2018-09-12 16:33:05 +00:00
Richard Barry
b11eb3a59c RISC-V work in progress:
+ Initialise task stack.
    + Successfully jump to start of first task.
2018-09-10 20:50:05 +00:00
Richard Barry
0c0f0d0f8f Minor synching - no functional changes. 2018-09-07 22:24:51 +00:00
Richard Barry
ab49c6ae04 Very minor formatting changes, and remove legacy link to V8 upgrade information. 2018-09-07 21:35:05 +00:00
Richard Barry
92ae8e7aff Update version numbers ready for release. 2018-09-07 18:13:20 +00:00
Richard Barry
1a235efd2b Update trace configuration files for the updated trace recorder code. 2018-09-06 18:52:45 +00:00
Richard Barry
be9c0730c3 Update trace recorder code to the latest.
Some minor changes to enable the configREMOVE_STATIC_QUALIFIER constant to be used by those debuggers that cannot cope with statics being used.
2018-09-06 03:23:03 +00:00
Richard Barry
21a8ff35dd Two minor updates in the comments to fix html formatting that was preventing doxygen creating documents correctly. 2018-09-01 02:42:34 +00:00
Richard Barry
97a686b2e1 Fix mixed tabs and spaces in the latest TCP patches. 2018-08-30 18:25:53 +00:00
Richard Barry
e2750cd388 Case unused return values for memset and memcpy to void in stream_buffer.c to avoid compiler warnings when the warning level is turned up.
Remove duplicate comment in heap_1.c.
2018-08-29 15:43:41 +00:00
Richard Barry
0d6e3df7ec Minor updates to fix issues with the Segger kernel aware plug since V10.1.0. 2018-08-28 18:10:42 +00:00
Richard Barry
9bda04b472 Fix build issues in the FreeRTOS_Plus_TCP_Minimal_Windows_Simulator project:
+ Set configENABLE_BACKWARD_COMPATIBILITY to 1 in FreeRTOSConfig.h to account for the fact that a member of the List_t structure has been renamed.
+ Provide a dummy implementation of ulApplicationGetNextSequenceNumber() to prevent linker warnings.
2018-08-28 16:58:21 +00:00
Richard Barry
893db45834 Changes required for the IAR StateViewer plug-in to work with FreeRTOS V10.1.0. 2018-08-27 23:11:28 +00:00
Richard Barry
b0ce1f61c9 Move some variables from function scope back to being file scope for the benefit of some kernel aware debuggers that were left working in a non-functioning mode after the V10.1.0 release - not last change for this purpose. 2018-08-27 21:59:26 +00:00
Richard Barry
a11b1a494d FreeRTOS+UDP was removed in FreeRTOS V10.1.0 as it was replaced by FreeRTOS+TCP,
which was brought into the main download in FreeRTOS V10.0.0.  FreeRTOS+TCP can
be configured as a UDP only stack, and FreeRTOS+UDP does not contain the patches
applied to FreeRTOS+TCP.
2018-08-23 00:00:20 +00:00
Richard Barry
3a1631fda3 Update copyright date ready for tagging V10.1.0. 2018-08-22 23:23:03 +00:00
Richard Barry
bdb088e66f Fix some build issues in older kernel demo projects.
Update to V2.0.7 of the TCP/IP stack:
   + Multiple security improvements and fixes in packet parsing routines, DNS
     caching, and TCP sequence number and ID generation.
   + Disable NBNS and LLMNR by default.
   + Add TCP hang protection by default.

We thank Ori Karliner of Zimperium zLabs Team for reporting these issues.
2018-08-22 21:29:21 +00:00
Richard Barry
fb9de58f56 Update version numbers in preparation for a new release. 2018-08-21 19:50:48 +00:00
Richard Barry
722ca8fb2b Update demo project for Tensilita - work in progres..
Add support for POSIX style errno - work in progress.
2018-08-21 19:37:04 +00:00
Richard Barry
78d20e2854 Only include the static definition of freertos_tasks_c_additions_init if FREERTOS_TASKS_C_ADDITIONS_INIT is defined, matching the guide used to include the function's prototype. 2018-08-20 15:08:35 +00:00
Gaurav Aggarwal
56dc0dd9b4 Merge bug fixes from Cadence 2018-08-07 07:21:07 +00:00
Richard Barry
f6cbf20019 Update RISC-V project to used official port stubs in place of third party port. 2018-07-07 21:54:41 +00:00
Richard Barry
3bfc32d444 Add stubs for official RISC-V RV32 port. 2018-07-07 21:47:31 +00:00
Richard Barry
d525d5092d Update trace recorder code.
Add TCP Echo server to the FreeR_Plus_TCP_Minimal_Window_Simulator project.
2018-07-02 22:29:02 +00:00
Richard Barry
f7fc215247 Update stream buffer tests to try resetting a statically allocated stream buffer before deleting it (tests fix in code).
Update trace recorder library.
2018-07-02 21:58:28 +00:00
Richard Barry
0887713969 Fix issues whereby vStreamBufferReset() clobbered the flag that indicated the stream buffer was statically allocated. 2018-06-20 21:21:55 +00:00
Richard Barry
9119e1e0e3 Add starting point for IGLOO2 RISV-V demo project. 2018-06-20 21:18:14 +00:00
Richard Barry
483f4a8c4b Small change to the directory name in which the RISC-V port is stored. 2018-06-20 21:15:04 +00:00
Richard Barry
3d8d2f3cc8 Add RISCV port layer. 2018-06-20 19:21:18 +00:00
Richard Barry
10eea4aded Remove period from the URL that links to the web page that describes the FreeRTOSConfig.h parameters. 2018-06-15 00:03:20 +00:00
Gaurav Aggarwal
c4b1afc4ef Add Xtensa port
The project file is for Xtensa Xplorer simulator.
Also add tests for one size stream buffer.
2018-06-14 19:43:17 +00:00
Richard Barry
7d92e4dd8f Sync with TCP version from AWS, including:
+ Add FreeRTOS_UpdateMACAddress().
+ Fix bug in lTCPWindowRxCheck() that manifested itself when flooded with lots of very small packets.
2018-06-13 21:16:22 +00:00
Richard Barry
d6fcd5dbba Add the option to specify a stack size in the standard demo MessageBuffer tests.
Add stream and message buffer tests into the Zynq demo project.
2018-06-13 16:50:16 +00:00
Richard Barry
4fbcdbf13b Fix misra violations in queue.c by introducing a union that allows the correct data types to be used in place of void *, then tidy up where the union is used. 2018-06-11 18:51:53 +00:00
Richard Barry
4a8c4c9eaf TimerHandle_t is now type safe instead of void *.
Remove casts that are no longer required not type safe handles are used.
2018-06-11 04:43:12 +00:00
Richard Barry
3d8681de9e Continue updating to MISRA 2012 from 2004 - currently working on queue.c and committing as working copy prior to making larger change.
Change QueueHandle_t to be typesafe from void *.
Change StreamBuffer_t to be typesafe from void *.
2018-06-11 01:56:32 +00:00
Richard Barry
7a9f453f96 Remove casts from EventGroupHandle_t to EventGroup_t, and corresponding lint comments, which are not required now EventGroupHandle_t is type safe.
Fix the prototype of prvTimerCallback() in the MPU simulator demo (caught due to the new type safety in tasks.c).
2018-06-04 04:02:57 +00:00
Richard Barry
390fb06b49 First pass at updating from MISRA 2004 to MISRA 2012:
Updated pvContainer member of list items to List_t * rather than void * as they are always contained in a list if anywhere.
Made EventGroupHandle_t typesafe pointer to forward referenced struct rather than void pointer.
Made TaskHandle_t typesafe pointer to forward referenced struct, rather than a void pointer.
2018-06-03 22:57:46 +00:00
Richard Barry
5bebf10fa4 Minor updates to comments only. 2018-05-17 17:50:14 +00:00
Richard Barry
585b16a39f Update definition of StaticTimer_t so its size is correct on MSP403X large memory model builds. 2018-05-07 16:31:50 +00:00
Richard Barry
d30249789b Previously the MPSoC Cortex-A53 demo was updated to the latest Xilinx SDK tools to the point where it was building, but not tested. This check in modifies the project files slightly following testing. 2018-05-04 15:06:50 +00:00
Richard Barry
26d8c76996 Update Zynq, MPSoc Cortex-A53 and MPSoc Cortex-R5 demo projects to build with the 18.1 version of the Xilinx SDK - building BUT NOT YET TESTED. 2018-05-02 04:04:54 +00:00
Richard Barry
a3148ba638 xTaskGenericNotify() now sets xYieldPending to pdTRUE even when the 'higher priority task woken' parameter is provided - making its behaviour consistent with event objects.
Ensure tasks that are blocked indefinitely on a direct to task notification return their state as eBlocked, previously was returned as eSuspended - making its behaviour consistent with event objects.
Fix typo in stream_buffer.c where "size_t xBytesAvailable ); PRIVILEGED_FUNCTION" had the semicolon in the wrong place.
Add testing of Stream Buffers to the AbortDelay.c tests.
Guard inclusion of C code when FreeRTOSConfig.h is included from an assembly file in the ARM7_LPC2129_IAR demo.
Fix minor typos in the Windows demo comment blocks.
2018-04-29 18:15:38 +00:00
Richard Barry
025088c280 Fix regressions introduced by introduction of configMESSAGE_BUFFER_LENGTH_TYPE constant - specifically enabling big endian support and updates to xStreamBufferNextMessageLengthBytes. 2018-03-15 18:31:02 +00:00
Richard Barry
3ec86b7a98 Introduce sbBYTES_TO_STORE_MESSAGE_LENGTH to allow the number of bytes used to hold a message length in a message buffer to be reduced if 4 bytes is always too many (save a little RAM). 2018-03-15 15:51:22 +00:00
Richard Barry
aec45f2479 Import the code coverage test additions from the (unpublished) Visual Studio project to the (published) MingW/Eclipse project.
Update the MingW/Eclipse project to add a code coverage build configuration in addition to the existing Debug build configuration.
Update StreamBufferDemo.c so functions are called directly, rather than via configASSERT(), so their code coverage can be measured when configASSERT() is not defined.
In the Win32 port, replace the call to TerminateProcess() in vPortEndScheduler() with exit( 0 ) - which triggers the writing of the code coverage data to the disk.
Fix bug in ucStreamBufferGetStreamBufferType() - which is only used by the Percepio trace tool.
Update the line within vTaskStartScheduler() that was setting xTickCount to 0 to instead set it to configINITIAL_TICK_COUNT.
2018-03-14 15:58:47 +00:00
Richard Barry
bf8d9f4726 Start moving code coverage tests from VisualStudio (not checked in) to the MingW project (checked in) by creating a second build configuration in the Windows Eclipse project that includes the code coverage command line options. Additionally make minor code updates to ensure configASSERT() is not defined, and the application runs for a finite time, when the code coverage build configuration is used. 2018-03-06 17:23:55 +00:00
Richard Barry
c156522695 Complete testing of changes that allow xQueueOverwrite() to be used on a queue that is part of a queue set.
Fix some compiler warnings in stream_buffer.c.
Update the MingW/Eclipse project so it also includes static allocation tests.
2018-03-05 21:35:50 +00:00
Richard Barry
f9bef06ec0 Introduce xMessageBufferNextLengthBytes() and tests for the same.
Add call to traceTASK_SWITCHED_IN() in vTaskStartScheduler() so trace tools can see the first task to run.
2018-03-04 19:25:14 +00:00
Richard Barry
9ed3a9fe18 Fix buffer clean up in \FreeRTOS_Plus_TCP_Minimal_Windows_Simulator\demo_logging.c.
Update queue code to allow an overwrite operation on a queue that is in a queue set, and add prvTestQueueOverwriteWithQueueSet() to test function.
Update Eclipse Win32 project to bring it closer the the Visual Studio equivalent.
2018-02-26 21:22:44 +00:00
Richard Barry
ff74e7aa63 Allow IP address to be passed into gethostbyname().
Ensure xNetworkBuffersInitialise() doesn't use a semaphore before it has been tested against NULL.
2018-02-18 19:58:26 +00:00
Richard Barry
7ddb8b342d Microblaze port: Place critical section around XIntc_Enable() to protect read/modify/write operation performed inside the library. 2018-01-30 17:42:12 +00:00
Richard Barry
208cc18a90 Ensure data cannot be sent to a TCP socket if the socket is in the process of closing.
Correct definition of StaticTask_t in the case that portUSE_MPU_WRAPPERS is set to 1.
prvTaskCheckFreeStackSpace() now returns configSTACK_DEPTH_TYPE to allow return values greater than max uint16_t value if required.
xStreamBufferSend() and xStreamBufferReceive() no longer clear task notification bits - clearing was unnecessary as only the task notification state is used.
2018-01-30 17:39:14 +00:00
Richard Barry
0fe82b4d91 Correct out of date comment in tasks.c.
Fix typo in comment in queue.h.
2017-12-28 20:20:26 +00:00
Richard Barry
13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 2017-12-18 22:54:18 +00:00
Richard Barry
f998c8119a Update license information text files for the CLI, TCP and UDP products to be correct for V10. 2017-12-13 17:00:13 +00:00
Richard Barry
0d903cf2d6 FreeRTOS+TCP: Added ipconfigSOCKET_HAS_USER_WAKE_CALLBACK configuration option so the user can specify a callback to execute when data arrives.
FreeRTOS+TCP: Improve print output when using WinPCap to assist in selecting the correct network interface.
FreeRTOS kernel: Fix extern "C" { in stream_buffer.h.
FreeRTOS kernel: Correct tskKERNEL_VERSION_NUMBER and tskKERNEL_VERSION_MAJOR constants for V10.
Ensure the currently executing task is printed correctly in vTaskList().
2017-12-12 17:47:56 +00:00
Richard Barry
cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 2017-11-29 16:53:26 +00:00
Richard Barry
e42a701e99 Add missing +TCP code. 2017-08-17 12:26:43 +00:00
Richard Barry
77e95538dc Added +TCP code to main repo. 2017-08-17 12:18:14 +00:00
Richard Barry
037abdddf2 Update TriCore port to work with latest GCC compiler. 2017-08-09 16:57:35 +00:00
Richard Barry
b6f2402f3f Update trace recorder source to fix some compile time warnings. 2017-06-01 14:16:16 +00:00
Richard Barry
2307bc9dfa Add MSVC .vs directory to keep the IDE's windows layout. 2017-06-01 14:15:24 +00:00
Richard Barry
6eea3d8d4b Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURN 2017-05-30 00:36:09 +00:00
Richard Barry
3f74cd483b Update linker script so main stack starts on 8-byte alignment. 2017-05-30 00:17:14 +00:00
Richard Barry
6b8eb1e936 Update IAR project for MSP432 to IAR version 8.11. 2017-05-30 00:03:31 +00:00
Richard Barry
2887612f27 FreeRTOS.h changes to go with the last tasks.c checkin. 2017-05-29 23:08:34 +00:00
Richard Barry
b5d8be2209 Remove obsolete code from prvCheckTasksWaitingTermination(). 2017-05-29 22:55:09 +00:00
Richard Barry
533b533820 Fix typo in comment that got copied into multiple main.c file.s 2017-05-29 22:06:54 +00:00
Richard Barry
504d9c8bab Update the FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator demo to use the latest FreeRTOS+Trace recorder code. 2017-05-29 22:05:25 +00:00
Richard Barry
35f5990e7a Update the MSVC and MingW demos to use the latest FreeRTOS+Trace recorder library. 2017-05-29 21:45:31 +00:00
Richard Barry
f289bfb388 Update to the latest trace recorder library. 2017-05-29 21:43:07 +00:00
Richard Barry
9f84f353d0 Remove configurations other than 'debug' from the Win32 demo. 2017-05-07 18:22:31 +00:00
Richard Barry
2e89c13c1c Cosmetic changes only. 2017-04-26 00:23:57 +00:00
Richard Barry
a99cd32208 Updated name of CORTEX_MPU_CEC_MEC_17xx_Keil_GCC to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC. 2017-04-20 05:33:05 +00:00
Richard Barry
59925359ed Added traceQUEUE_CREATE_FAILED() trace macros into the queue create functions. 2017-04-10 01:58:58 +00:00
Richard Barry
b080f13543 Add more "memory" clobbers into the MPU ports to make them robust to more aggressive optimisation in newer GCC version. 2017-04-10 01:58:01 +00:00
Richard Barry
0f85ead175 Add more "memory" clobbers into asm code of GCC/ARM_CRx_No_GIC port to make it robust with higher optimisation in newer versions of GCC. 2017-04-10 01:01:11 +00:00
Richard Barry
0a7a0a79d6 Updates to prevent warnings when compiled with LLVM. 2017-04-10 00:26:22 +00:00
Richard Barry
8ca40d80a9 Ensure the PIC32 interrupt stack is 8 byte aligned for all values of configISR_STACK_SIZE. 2017-04-09 20:13:48 +00:00
Richard Barry
96db5a3600 PIC32MZ project using later MPLAB X tools. 2017-04-09 19:35:32 +00:00
Richard Barry
ffb228e448 Change name of the CEC and MEC directory to CORTEX_CEC_MEC_17xx_51xx_Keil_GCC as it is also applicable to the MEC5105 part. 2017-04-04 20:21:40 +00:00
Richard Barry
7fc04bfebe Change name of the CEC and MEC directory to CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC as it is also applicable to the MEC5105 part. 2017-04-04 20:16:37 +00:00
Richard Barry
464c2660ad Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
2017-03-28 03:13:48 +00:00
Richard Barry
7ee26c1b5e Enable button interrupts in the MSP432 demos in order to test code paths when an MCU exits low power mode for a reason other than a tick interrupt. 2017-03-28 03:12:20 +00:00
Richard Barry
aa810cb926 Ensure vTaskGetInfo() sets the sate of the currently running task to eRunning - previously it was set to eReady. 2017-03-27 20:31:03 +00:00
Richard Barry
3b2bbcb56a Maintenance on MSP432 demo. 2017-03-09 02:13:40 +00:00
Richard Barry
ad5659e93d Housekeeping check-in, no code changes. 2017-03-08 22:19:14 +00:00
Richard Barry
34b194150e Add CEC and MEC 17xx demo that is completely statically allocated. NOT FULLY TESTED YET. 2017-03-08 18:38:02 +00:00
Richard Barry
b9fe24962e Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across asm code as optimisers get more aggressive. 2017-03-07 04:06:10 +00:00
Richard Barry
c3acc441ac Introduce vTaskInternalSetTimeOutState() which does not have a critical section, and add a critical section to the public version of the same. 2017-02-24 02:16:54 +00:00
Richard Barry
9b213e8c34 Add SimpleLink CC3220SF demo. 2017-02-24 02:12:27 +00:00
Richard Barry
67def3c14b Update Reliance Edge fail safe file system to the latest version. 2017-01-24 00:20:35 +00:00
Richard Barry
8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry
979e41c9da Update UltraScale R5 hardware definition and BSP for 2016.4 SDK tools. 2017-01-21 21:59:25 +00:00
Richard Barry
ff55eb920c Update Zynq MPSoC hardware definition and BSP files to be those shipped with the 2016.4 SDK. 2017-01-19 16:33:13 +00:00
Richard Barry
992a3c8c71 Update BSP source files for UltraScale Cortex-A53 and Cortex-R5 and Microblaze to the 2016.4 versions.
Correct alignment issue in GCC Cortex-R port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the UltraScale R5 demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-19 04:11:21 +00:00
Richard Barry
6ffaa6f018 Correct alignment issue in GCC and RVDS Cortex-A9 port that was preventing full floating point usage in interrupts (other ports will be updated likewise).
Update the Zynq demo to test the GCC Cortex-A9 port layer modification mentioned on the line above.
2017-01-18 18:33:48 +00:00
Richard Barry
d67dcf9c74 Enhanced priority dis-inheritance functionality in the case where a task that caused another task to inherit its priority times out before obtain a mutex.
Added test code to GenQTest to test the new priority dis-inheritance functionality.
Allow the default names given to the Idle and Timer tasks to be overwridden by definitions in FreeRTOSConfig.h.
2017-01-16 03:58:51 +00:00
Richard Barry
883541bc8e Rename the CORTEX_MPU_MEC17xx_KEIL_GCC directory to CORTEX_MPU_CEC_MEC_Keil_GCC as it is also applicable to the CEC17xx parts. 2017-01-09 21:29:42 +00:00
Richard Barry
c882141175 Change how volatile is used in some of the standard demos to remove compiler warnings in the latest GCC versions. 2017-01-04 05:07:12 +00:00
Richard Barry
ca9edf3531 Increase the priority of the Windows threads used by the FreeRTOS Windows port, and, because the threads have high priority and run on the same core, prevent the port running on single core hosts so as to avoid locking up the host. 2017-01-04 04:48:22 +00:00
Richard Barry
f98b675671 Add MPU project for multiple MEC17xx devices. 2016-12-11 22:56:30 +00:00
Richard Barry
225f13bac2 Update TaskNotify.c to test the condition where a direct to task notification is sent to a suspended task.
Introduce configSTACK_DEPTH_TYPE so the application writer change the type used to specify a stack size from uint16_t to whatever they like.  Defaults to uint16_t if not defined.
Introduce configINITIAL_TICK_COUNT to allow users to start the tick count at something other than 0.  Used for testing, but overflows can be better tested by setting configUSE_16_BIT_TICKS to 1.
Split xQueueGenericReceive() into xQueueReceive(), xQueuePeek() and xQueueSemaphoreTake() as the first step in refactoring xQueueGenericReceive().
Add Cortex-M3 port layer for Code Composer Studio - previously there was only a Cortex-M4F port.
Introduce configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING() to allow applications to prevent portSUPPRESS_TICKS_AND_SLEEP() being called.  Previously the portPRE_SLEEP_PROCESSING() macro could only be used to abort entry into sleep time after clocks had been re-programmed for the distant wake time.
2016-11-25 21:07:56 +00:00
Richard Barry
7fcc976248 Update version of Reliance Edge. 2016-11-21 04:30:49 +00:00
Richard Barry
7cce089e40 Add support for statically allocated memory protected tasks - previously only dynamically allocated tasks could be memory protected. 2016-09-20 13:54:28 +00:00
Richard Barry
5c75e5a38a Correct the definition of StaticTask_t and add additional configASSERT() statements to catch future errors. 2016-09-14 08:21:24 +00:00
Richard Barry
40201bc253 Introduce configRECORD_STACK_HIGH_ADDRESS, which when set will result in both limits of the stack being saved in the TCB to allow enhanced debug capabilities.
Introduce configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H, which allows a user provided header file to be included at the bottom of the tasks.c source file, which can add user functions and access file scope data.
Replace global on/off switches used for lint errors with save/restore switches.
2016-09-04 15:46:34 +00:00
Richard Barry
f11912c5de Clean up lint errors. 2016-08-16 13:44:30 +00:00
Richard Barry
75ffac21d7 Changes to core code and port layer:
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
2016-08-16 11:38:58 +00:00
Richard Barry
bdbf347c22 Remove clrex instruction from Cortex-M ports again as it is implicit in interrupt entry. 2016-06-28 10:39:25 +00:00
Richard Barry
c296e2cff8 Improvements to the Cortex-M ports:
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
2016-06-27 13:13:05 +00:00
Richard Barry
6c975cd46a Final check in before tagging V9.0.0. 2016-05-25 11:47:42 +00:00
Richard Barry
2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
2016-05-20 18:05:46 +00:00
Richard Barry
e23eca901d Preparing for V9.0.0 formal release:
+ Update various projects to use the latest versions of their build tools.
2016-05-20 12:18:59 +00:00
Richard Barry
0063b29cdf Prepare for V9.0.0 release.
+ Set flash wait states on MSP432 demos.
+ Remove use of obsolete IO library in PIC32 demos.
+ Remove obsolete item left on stack of first task to run in the Cortex-M0 ports.
+ Correct IA32 GCC vPortExitCritical() implementation when configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
2016-05-19 13:28:12 +00:00
Richard Barry
e10647f9c0 Increase the test coverage of the GCC MPU demo that runs in the Keil simulator.
Add an MPU demo that uses the Keil simulator that also uses the Keil compiler.
Correct a few version numbers for files recently added to the repository.
2016-05-18 19:51:14 +00:00
Richard Barry
ee9cd40b6d Add GCC ARM Cortex-M4F MPU port.
Add RVDS ARM Cortex-M4F MPU port.
Increase the size of each buffer allocated to pbufs in the Microblaze lwIP demo to prevent pbufs chaining.
Use _start as the top of the stack for each Microblaze task, rather than NULL, as NULL was causing the Xilinx SDK to try and unwind the stack too far.
2016-05-18 10:41:28 +00:00
Richard Barry
fedb98c5f6 Recreated MicroBlaze example using Vivado 2016.1 - the Microblaze project is still a work in progress - not yet fully functional. 2016-05-10 14:05:22 +00:00
Richard Barry
501be60574 Update the Microblaze hardware design and BSP to the latest IP and tool versions. 2016-05-09 15:55:51 +00:00
Richard Barry
324127837c Update some more standard demos for use on 64-bit architectures.
Update the Xilinx Ultrascale+ Cortex-A53 (64-bit) and Cortex-R5 (32-bit) demos to use version 2016.1 of the SDK.
2016-05-06 12:40:27 +00:00
Richard Barry
0cb71ee9ce Update the Xilinx UltraScale+ demo project to use the BSP and hardware platform generated by the 2016.1 version of the SDK. 2016-04-28 12:49:19 +00:00
Richard Barry
11fe9de0f0 Update the Xilinx UltraScale+ 64-bit demo to use the hardware definition and BSP from version 2016.1 of the SDK. 2016-04-28 12:23:52 +00:00
Richard Barry
0721cf102a Completely re-generate the Zynq 7000 demo using the 2016.1 SDK tools.
Introduce configUSE_TASK_FPU_SUPPORT into the GCC Cortex-A9 port to allow tasks to have an FPU context by default.
Add MikroC Cortex-M4F port.
2016-04-25 17:24:54 +00:00
Richard Barry
2ec97696db Remove Zynq 7000 project so it can be re-created using the 2016.1 edition of the SDK. 2016-04-25 13:37:57 +00:00
Richard Barry
0b5906d404 Remove obsolete MPU demos.
Separate the MPU wrappers into their own file so they can be used from future MPU ports.
2016-04-25 12:03:47 +00:00
Richard Barry
afd4b432f6 Improve coverage of the MPU API in the new MPU demo, fixing typos in the MPU port layer as they are found. 2016-04-24 18:33:16 +00:00
Richard Barry
12a0be1e69 Add software timer use to the new MPU demo.
Update CEC1302 demos to demonstrate both aggregated and disaggregated interrupts.
2016-04-24 10:06:20 +00:00
Richard Barry
345819d550 Update the GCC Cortex-A9 port to introduce a version of the IRQ handler that saves the FPU registers. 2016-04-23 10:53:57 +00:00
Richard Barry
ac67c39be9 Update the MPU port so it supports all the public functions found in V9.0.0rc2. 2016-04-20 15:42:34 +00:00
Richard Barry
da6c95edae Update CEC1302 peripheral library version. 2016-04-18 15:52:19 +00:00
Richard Barry
057b38ad23 Updates to support FreeRTOS MPU in FreeRTOS V9.0.0 - including a GCC project that runs in the Keil simulator to allow development and testing. 2016-04-18 10:49:24 +00:00
Richard Barry
255145bde1 xTaskGetTaskHandle() changed to xTaskGetHandle().
Tidy up CEC1302 demo.
Ensure bit 0 of the task address is clear when setting up stack of initial Cortex-M3/4/7 stacks (for strict compliance, although not practically necessary).
vTaskGetTaskInfo() changed to vTaskGetInfo() - with a macro added for backward compatibility.
2016-04-15 11:48:07 +00:00
Richard Barry
ee5386756d Correct selected device in IAR SAMA5D2 project. 2016-04-14 11:18:13 +00:00
Richard Barry
f0f2378961 Add SAMA5D2 Xplained IAR demo. 2016-04-14 11:14:58 +00:00
Richard Barry
5252301cb8 Rename CORTEX_M4F_CEC1302_Keil to CORTEX_M4F_CEC1302_Keil_GCC as it now contains both GCC and Keil projects. 2016-04-07 10:57:36 +00:00
Richard Barry
912445c341 Added GCC project to the CEC1302 demo. 2016-04-07 10:56:04 +00:00
Richard Barry
4b9c4aa757 Correct comment error that was replicated on many different main_full.c files. 2016-04-04 14:53:04 +00:00
Richard Barry
f1725afbe5 Remove compiler warning by ensure prvInitialiseMutex() is not included if configUSE_MUTEXES is 0.
Reduce the number of xTaskCreateStatic() parameters by having the function return the task handle, rather than pass the task handle out using a parameter.  This is also consistent with other objectCreate() functions.
2016-03-31 15:22:10 +00:00
Richard Barry
07ac1399ee Update version number to 9.0.0rc2. 2016-03-30 12:20:36 +00:00
Richard Barry
f9c02d09c3 Update MSP432 projects to use updated driver library files.
Remove references to INCLUDE_pcTaskGetTaskName and INCLUDE_xTimerGetTimerDaemonTaskHandle, which are no longer required.
2016-03-30 11:12:06 +00:00
Richard Barry
b9b64c0889 Make the pcObjectGetName() API function naming consistent - so rename pcTaskGetTaskName() to pcTaskGetName(), rename pcTimerGetTimerName() to pcTimerGetName() and add a #defines in FreeRTOS.h to make the changes backward compatible. 2016-03-29 17:16:34 +00:00
Richard Barry
aeb03e5fa0 Create minor optimisations (just an asm instruction or two) by using consts in a few places where previously a volatile variable that didn't change was used.
Add the simple xTimerGetPeriod() and xTimerGetExpiryTime() functions.
2016-03-29 13:07:27 +00:00
Richard Barry
26d3770fad - Rework the StaticAllocation.c common demo file to reflect the changes to the static allocation object create functions from the previous check-in.
- Correct various typos in comments.
- Add xTimerGetPeriod() function (feature request).
2016-03-29 11:08:42 +00:00
Richard Barry
9dda62372c Update the documentation contained in the header files to be correct for V9.0.0 release candidate 2. 2016-03-26 11:05:42 +00:00
Richard Barry
6568ba6eb0 Notes:
+ The MPU port is not supported in this revision number.
+ The documentation for the static allocation functions in the header files has not yet been updated for this revision.

Kernel updates:
+ Simplify the static allocation of objects implementation.
+ Introduce configSUPPORT_DYNAMIC_ALLOCATION in addition to the existing configSUPPORT_STATIC_ALLOCATION so FreeRTOS can be built without providing a heap at all.

Demo application updates:
+ Update the demos to take into account the new configSUPPORT_DYNAMIC_ALLOCATION constant.
+ Add an MSVC demo that only uses static allocation, and does not include a FreeRTOS heap.
+ Update the MSVC project to use both configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION.
+ Update the MingW project to use only configSUPPORT_DYNAMIC_ALLOCATION.
2016-03-22 16:23:37 +00:00
Richard Barry
283bc18d23 Very minor changes to the EFM32 Giant and Pearl Geckos demos in preparation for pre-release of the projects. 2016-03-18 19:40:03 +00:00
Richard Barry
60537ce7cb Add low power timer library source file for the Pearl Gecko demo.
Fix types in comments.
2016-03-16 17:18:21 +00:00
Richard Barry
9f5095f6bd Rework the low power demo that uses the RTCC clock on the Pearl Gecko, and add attentional test code. 2016-03-16 17:17:07 +00:00
Richard Barry
8ffe75f665 Replace Gecko Simplicity Studio project that had multiple build configurations with one that has a single build configuration and targets the Giant Gecko starter kit. Now there are separate projects for the Giant and Pearl Geckos.
Update the Pearl Gecko project to use the register test tasks that include the FPU registers.
2016-03-02 17:45:55 +00:00
Richard Barry
c0abb762ff Add Pearl Gecko demo.
Fix build error when configSUPPORT_STATIC_ALLOCATION and configNUM_THREAD_LOCAL_STORAGE_POINTERS were greater than zero at the same time.
Allow the pdMS_TO_TICKS macro to be overridden by a definition in FreeRTOSConfig.h.
2016-03-02 16:03:25 +00:00
Richard Barry
780aa7e325 Add files necessary to create a Pearl Gecko build configuration in the new EFM32 SimplicityStudio project. 2016-02-20 15:27:40 +00:00
Richard Barry
f4033581b5 Update FreeRTOS+ version number ready for version 9 release candidate 1. 2016-02-18 19:02:43 +00:00
Richard Barry
d3ba0aa98d Update version number ready for version 9 release candidate 1. 2016-02-18 17:11:14 +00:00
Richard Barry
d7253324cd Prepare for a FreeRTOS V9 release candidate:
- Remove the standard demo files that used the [long since deprecated] alternative API.
- Add standard demo task that tests the new xTaskAbortDelay() function.
- Update the Win32 Visual Studio project to use Visual Studio 2015 Community Edition.
- Rename the xGenericListItem TCB member to xStateListItem as it better describes the member's purpose.
2016-02-18 10:07:42 +00:00
Richard Barry
c7b7b90cc9 Core kernel code changes:
+ Added xTaskAbortDelay() function, which causes a task to exit the Blocked state even before the timeout has expired or the event the task is waiting for has occurred.
+ For efficiency and code size reasons on some architectures, replace many instances of "== pdTRUE" with "!= pdFALSE".
2016-02-14 11:58:11 +00:00
Richard Barry
2acc8f2c99 FreeRTOS source:
- Major refactor to consolidate the multiple places where a task is removed from a ready list and placed in a delay list into a single function, reducing code size, and enabling the easy addition of up-coming functionality.
 - Replace the enum used for task notification states with a uint8_t to reduce the TCB struct size with some compilers, and allow additional members to be added without increasing its size.
 - Rearrange FreeRTOS.h so all INCLUDE_ defaults are grouped together.
2016-02-10 12:58:15 +00:00
Richard Barry
42e73b9b8f Kernel source code:
+ Added xPortIsInsideInterrupt() to RVDS ARM CM4F port - the same will get added to other ports in time.

Demo application code:
+ Added first pass Microchip CEC1302 demo for Keil.
+ Harden the new StaticAllocation.c standard demo tasks against integer promotion rules causing problems on 16-bit architectures.
2016-02-09 16:02:54 +00:00
Richard Barry
732778a971 Test the RTC and BURTC tickless implementations on the Gecko parts, and make correct as appropriate.
Replace some references to the older portTICK_RATE_MS macro with the newer pdMS_TO_TICKS() macro in the standard demo files.
2016-02-03 11:58:30 +00:00
Richard Barry
556de14a1d Update EFM32 demos to include an option to use the RTC as the clock source when using low power tickless mode. 2016-02-01 18:04:50 +00:00
Richard Barry
c4dd17eeb5 Added a build configuration for the Wonder Gecko starter kit to the existing Giant Gecko Simplicity Studio project.
Fix some lint warnings that were generated by some of the new core functionality.
2016-01-31 20:22:00 +00:00
Richard Barry
802af0150c Add vTaskGetTaskInfo() function that allows a TaskStatus_t structure to be returned for an individual task (previously information could only be obtained for all the tasks at once).
Add a member to the TaskStatus_t structure that is used to return the base address of the stack used by the task being queried.
Add xTaskGetTaskHandle() that allows the handle of a task to be looked up from the task's text name.
Continue to document the macros that allow RTOS objects to be created using statically allocated memory.
Introduced vApplicationDaemonTaskStartupHook(), which allows initialisation that that needs to be executed after the scheduler has been started to be executed from the RTOS daemon task.
Call prvResetNextTaskUnblockTime() in xTaskResumeAll() if a task is moved from the pending ready list - this can prevent an unnecessary wake from sleep mode if a task is unblocked by an interrupt while in a low power tickless state.
2016-01-28 16:59:57 +00:00
Richard Barry
b514f4fa4e Baseline the Giant Gecko demo, which now has the first pass at a low power tickless implementation. 2016-01-25 21:17:47 +00:00
Richard Barry
8ef7849199 Ensure the code builds when configSUPPORT_STATIC_ALLOCATION is 0.
Continue to document the new static allocation functions.
2016-01-22 22:09:11 +00:00
Richard Barry
f82953554d Provide the ability to create event groups and software timers using pre statically allocated memory - now all RTOS objects can be created using statically allocated memory.
Rename StaticTCB_t to StaticTask_t.
2016-01-21 14:10:04 +00:00
Richard Barry
68fced741d Continue to add the ability to create RTOS objects using static rather than dynamic memory allocation - now including all the semaphore types.
Update the StaticAllocation.c standard demo file to exercise the new static allocation functions.
2016-01-20 14:04:40 +00:00
Richard Barry
cf0ed4e2ac Implement functionality that allows the memory required to create a queue or semaphore to be allocated statically.
Update the standard demo task that tests statically allocated tasks to also test statically allocated queues.
2016-01-19 13:41:28 +00:00
Richard Barry
eae4815bf3 Rename DummyTCB_t to StaticTCB_t.
Move structures used for static allocation of tasks and queues into FreeRTOS.h from their individual API header files.
Add SAME70 Xplained Atmel Studio project.
Update SAMV71 Atmel Studio project to use Studio 7.
Revert some changes to GenQTest.c standard demo task which only function correctly when a queue registry was used.
2016-01-18 15:57:02 +00:00
Richard Barry
41b5e486dd Remove unused header files from new EFM32 demo.
Prep the code ready to create a tickless implementation.
2016-01-17 16:04:56 +00:00
Richard Barry
53b996077f Add EFM32 Giant Gecko Starter Kit demo - still a work in progress as the low power tick management has not been implemented yet. 2016-01-17 14:34:27 +00:00
Richard Barry
b832d5801f Kernel changes:
Minor change to xQueueGenericReceive() to catch the extreme case of data being placed into a queue between a task timing out and leaving the xQueueGenericReceive() function.
Added xSemaphoreGetCount() macro.


Demo app changes:
Updated countsem.c to test the new xSemaphoreGetCount() macro.
2016-01-12 15:52:44 +00:00
Richard Barry
f81575dcee Correct a comment that had been cut and paste into multiple main.c files. 2016-01-12 10:38:16 +00:00
Richard Barry
5690221c5c Add in the CORTEX_A53_64-bit_UltraScale_MPSoC demo application (a demo has been included in the Xilinx SDK download for some time already).
Update a few demo application files to work with 64-bit data types.
2015-12-22 13:56:20 +00:00
Richard Barry
51560d9a96 FreeRTOS source updates:
+ Add the pre-existing 64-bit Cortex-A53 port layer into the head revision of the main repository.

Demo application updates:
+ Update Zynq demo to use SDK version 2015.4
+ Add task static allocation standard demo to Zynq demo.
+ Make the XScuGic object accessible outside of the vConfigureTickInterrupt(), again in the Zynq demo.
2015-12-21 08:25:41 +00:00
Richard Barry
ea95020ffd Changes to the FreeRTOS code:
+ Introduced xTaskCreateStatic() to allow tasks to be created without any dynamic memory allocation.
+ When a task notification is used to unblock a task from an ISR, but the xHigherPriorityTaskWoken parameter is not used, then pend a context switch to occur during the next tick interrupt.

Demo application changes:
+ Updated TaskNotify.c to test the case where a task is unblocked by an ISR, but does not use its xHigherPriorityTaskWoken parameter.
+ Updated the Win32 MSVC project to test statically allocated tasks being created and deleted.
+ Introduced StaticAllocation.c standard demo task.
2015-12-20 13:44:21 +00:00
Richard Barry
7d6609f8db FreeRTOS source:
+ Previously, if a task was deleted, the memory allocated to the task by the RTOS was freed in the Idle task.  Now if a task deletes another task the memory is freed immediately.  The idle task is however still responsible for freeing the memory when a task deletes itself.
+ Added pcQueueGetQueueName() function to return the name of a queue from its handle, assuming the queue is registers.

Demo application:
+ Update GenQTest to exercise the new pcQueueGetQueueName() function.
+ Delete workspaces from old Eclipse examples, leaving just the projects.
+ Rework comments in the MSVC simply blinky demo.
2015-12-08 20:22:58 +00:00
Richard Barry
94dd3f871b FreeRTOS Source files:
+ Updated all ARM Cortex-M0 ports to include an additional ISB instruction as the scheduler is started.

Demo app files:
+ Fixex build issues in XMC1000 demos.
2015-11-22 22:03:00 +00:00
Richard Barry
fa86d4eece FreeRTOS source changes:
+ heap_1.c and heap_2.c now support configAPPLICATION_ALLOCATED_HEAP (heap_4.c already did) which allows the heap to be placed by the user rather than the linker.

Demo app changes:
+ SAMD20 project has been updated to use Atmel Studio 7.
2015-11-22 21:14:39 +00:00
Richard Barry
e9561c946c Kernel changes:
+ Support tickless idle when configUSE_PREEMPTION is 0 (previously tickless idle was only supported when the pre-emptive scheduler was being used).
+ If a stack was statically allocated, then don't try freeing it if the TCB cannot be allocated.
+ Remove use of INCLUDE_xEventGroupsSetBitsFromISR() pre-processor macro, as it was not tested anyway.

Demo app changes:

+ Updated SAM4L Atmel Studio project to use Atmel Studio 7.
2015-11-20 14:11:11 +00:00
Richard Barry
5e9787978c Final tidy up before tagging V8.2.3. 2015-10-17 17:25:50 +00:00
Richard Barry
825b43a188 Update version number ready for the V8.2.3 release. 2015-10-16 14:57:00 +00:00
Richard Barry
d289525e1b Preparing for maintenance release:
Kernel source changes:
- Added xTaskNotifyStateClear() API function.
- Added the GCC Cortex-R port (existed for a while) into the main download.
- Improved the IAR RL78 port's handling of different memory model combinations.
- Removed some compiler warnings in heap_5.c.

Demo app changes:
- Added example use of xTaskNotifyStateClear() to the TaskNotify standard demo tasks.
2015-10-16 11:29:36 +00:00
Richard Barry
57cc3389a5 Preparing for maintenance release -
Bug fix - issue introduced in V8.2.2 when the current timer list is empty and the overflow timer list is not empty.
Add PIC32MZ EF (floating point) support and update the MZ demo project to test the flop context switching.
Improve efficiency of the stack overflow checking.
Add CLI to RX71M demo.
General tidy up of new RZ and RX projects - including ensuring the UART driver copes with 0 length strings.
Add stack overflow checking to the [old] PIC24 demo.
2015-10-15 20:19:26 +00:00
Richard Barry
38cb08133d Check in RX231 IAR demo. 2015-10-10 20:38:12 +00:00
Richard Barry
c6a4e3191e Add FreeRTOS+CLI examples to the Renesas RZ/T demos.
Fix some compiler warnings.
Correct spellings in comments.
2015-10-10 10:29:29 +00:00
Richard Barry
96ff3925d2 Update FreeRTOS+Trace recorder library to v3.0.2
Add streaming version of the FreeRTOS+Trace recorder, also V3.0.2
2015-10-09 13:30:09 +00:00
Richard Barry
f218cf5680 Demo tasks:
- Complete the demo projects for the RX113 using IAR, GCC and Renesas compilers by including a basic UART CLI.

Standard demo tasks:
- Add some volatile qualifiers to variables in IntQueue.c.
2015-10-05 15:23:09 +00:00
Richard Barry
cd42d2c215 Changes in common files:
Add additional asserts into timers.c.

Trivial changes and changes in demo applications:
RX113 IAR project is not building and running.
Make FreeRTOS_SetupInterrupt() and FreeRTOS_ClearInterrupt() weak symbols in the Zynq SDK repository.
Correct typo in the port layer comments that was cut and paste into multiple files.
2015-10-03 18:48:41 +00:00
Richard Barry
b3f343fdae Update RX231 projects to blink the LED. 2015-09-25 09:33:37 +00:00
Richard Barry
e5c8119b96 Baseline new RX projects before refining and tidying them up. 2015-09-25 08:26:55 +00:00
Richard Barry
87243e4a16 FreeRTOS source:
+ Added Renesas RXv2 port for IAR.

Demo apps:
+ Demo/Rename the CORTEX_R4F_T_GCC_IAR_ARM directory to just Rename the CORTEX_R4F_T_GCC_IAR.
+ Add IAR project for the RX113.
+ Add RX231 e2studio projects for the RX231.
2015-09-23 12:16:10 +00:00
Richard Barry
27ff871a37 Baseline new GCC and Renesas compiler projects for RX71M and RX113 before adding IAR projects. 2015-09-22 08:45:15 +00:00
Richard Barry
b71bb46a5b Modify RZ/T e2studio directory structure to accommodate an IAR project.
Start RZ/T port and demo project.
2015-09-13 21:39:17 +00:00
Richard Barry
aa80622d72 Remove compiler warnings from auto-generated code.
Baseline prior to starting IAR RZ/T project.
2015-09-13 07:30:43 +00:00
Richard Barry
a29dc8d6c6 Add PIC32MEC14xx port and demo application. 2015-09-12 20:47:59 +00:00
Richard Barry
f19497c3d6 Simplify and improve GIC-less Cortex-R4 port.
Add final tests into RZ/T demo.
2015-09-12 12:14:58 +00:00
Richard Barry
b9f235846f Common source code:
- Remove configASSERT() if a queue cannot be created, malloc failed hook will be called anyway.

Demo apps:
- RZ/T blinky demo working, but still lots to do to improve the port.
2015-09-11 13:29:40 +00:00
Richard Barry
28d8a27f8f Initial RZ/T port and demo - work in progress, currently only the tick interrupt can be installed. 2015-09-07 17:29:14 +00:00
Richard Barry
717654471e Update the FreeRTOS+WolfSSL Win32 demo to use the latest WolfSSL libraries. 2015-08-28 13:58:05 +00:00
Richard Barry
02d0847567 Rename the FreeRTOS_Plus_CyaSSL_Windows_Simulator directory to FreeRTOS_Plus_WolfSSL_Windows_Simulator. 2015-08-28 13:49:47 +00:00
Richard Barry
5a6242fbd0 Update WolfSSL library to the latest version. 2015-08-28 13:46:22 +00:00
Richard Barry
8af1ad9bac Rename the CyaSSL directory to WolfSSL 2015-08-28 13:27:31 +00:00
Richard Barry
1b010fbaa7 Final commit before tagging - cosmetic changes only. 2015-08-12 16:45:24 +00:00
Richard Barry
3291f5a08d Final preparation for new release:
FreeRTOS+Trace:
 - Add trace macros for task notifications.
 - Update to the latest trace recorder library.

Demo projects:
 - Only include the CLI command to show run time states if configGENERATE_RUN_TIME_STATS is set to 1.
2015-08-12 10:34:30 +00:00
Richard Barry
99d4f2c454 Update version numbers in preparation for new release. 2015-08-05 12:59:42 +00:00
Richard Barry
b4c3d91aff Add FreeRTOS BSP for Xilinx SDK. 2015-08-05 10:21:59 +00:00
Richard Barry
4c847711bd Common scheduler code:
- Back out changes that allow mutexes to be given from a semaphore after tests showed issues that would not be fast to fix.

Demo projects:

- Update the Microblaze Kintex 7 project and BSP to use version 2015.2 of the Xilinx SDK.
2015-08-04 17:36:55 +00:00
Richard Barry
95eed0c8f3 Preparing for next release...
Zynq ZC702 demo application:
Update the memcpy, memset and memcmp implementations so they don't err with -O3 optimisation.
Update to use the 2015.2 version of the SDK.
2015-08-01 15:00:22 +00:00
Richard Barry
4c3722bd76 Preparing for new release...
Kernel changes:
- Remove an assert that was preventing xQueueSendFromISR() being used to give a mutex from an ISR (mutexes cannot be given using xSemaphoreGiveFromISR()).
- Introduce xTaskNotifyAndQueryFromISR() as the interrupt safe version of xTaskNotifyAndQuery().

Common demo task changes:
- Update IntSemTest.c to prove the theory that it is safe to give a mutex type semaphore from an interrupt using xQueueSendFromISR() instead of xSemaphoreGiveFromISR().
- Update TaskNotify.c to test the new xTaskNotifyAndQuery() from ISR fuction.
2015-08-01 07:03:32 +00:00
Richard Barry
25b911e0bd Add resource filters to the Eclipse project used to build the Galileo demo. 2015-07-30 21:13:03 +00:00
Richard Barry
cff5cfdd4f Preparing for the next release...
New port and demo project:  Intel Galileo.
2015-07-30 11:46:30 +00:00
Richard Barry
8b5c27b679 Preparing for the next release...
PIC32MZ demo application:
- Update to use the latest XC32 compiler.
2015-07-30 11:37:33 +00:00
Richard Barry
672ae6cbb6 Starting to prepare for the next release...
Core FreeRTOS code:
+ Added PRIVILEGED_FUNCTION qualifier to those functions from which it was previously missing.
2015-07-30 11:30:05 +00:00
Richard Barry
d3e053568d MSP430:
Add additional NOPs as required by hardware manual.

Microblaze:
Previously a task inherited the exception enable state from the context from which xTaskCreate() was called.  Now tasks all have exceptions enabled if they are enabled in the hardware.

Windows/GCC:
Improve the implementation of portGET_HIGHEST_PRIORITY.

Common code:
Simplify the pointer use in xQueueGenericCreate()

Demo apps: 
Remove jpg images that were used to create web pages.
Fix capitalisation issues in some demos where some header files are incldued with the wrong case, preventing building on Linux.
Remove the Microblaze demos that are using obsolete tools.
Update main_blinky for the Windows port demo to include a software timer example.
2015-07-26 16:41:12 +00:00
Richard Barry
95b73d40d9 Correct calculation of xHeapStructSize in heap_4 and heap_5.
Convert uint32_t types to size_t types in heap_5.c, as was previously done for heap_4.c.
2015-06-25 12:14:54 +00:00
Richard Barry
4ee2a96861 Add back some files essential for the PIC32MZ build. 2015-06-24 16:49:21 +00:00
Richard Barry
8a1450effc Microblaze: Add a port optimised task selection implementation to the Microblaze port.
Windows port:  Add code to ensure Windows threads are truely suspended before resuming another thread.
Typo correction to the task notification standard demo task.
Correct case of some include file names to fix build issues on Linux.
2015-06-24 15:10:03 +00:00
Richard Barry
cfb8223232 Add SAMV7 (Cortex-M7) demo for Atmel Studio. 2015-06-16 12:38:35 +00:00
Richard Barry
7456c232ce Update library files used in STM32F7 demo to the latest version released by ST. 2015-06-04 15:35:12 +00:00
Richard Barry
267dc24bb3 Kernel changes to improve power saving:
+ The timer task now blocks indefinitely if there are no timers active, allowing eTaskConfirmSleepModeStatus to return eNoTasksWaitingTimeout when configUSE_TIMERS is set to 1.
+ The next unblock time is calculated automatically after a task unblocks when waiting for a notification, allowing deep sleep to be entered earlier.
2015-05-20 15:46:40 +00:00
Richard Barry
067c1573c3 Finalise MSP43FR5969 IAR and CCS demos (hopefully). 2015-04-28 13:53:30 +00:00
Richard Barry
9bb5b40c81 Add CCS project for MSP430FR5969 demo. 2015-04-27 15:23:29 +00:00
Richard Barry
a9d1ff4f5e Change some data types in heap_4.c to allow it to be used on hardware that has 16-bit pointers without generating compiler warnings.
Add a small data model configuration to the MSP43FR5969 IAR demo.
Correct some code comments in the SAMA5D4 demo.
2015-04-27 11:14:11 +00:00
Richard Barry
976a9b44af Rename /Demo/MSP430FR5969_LaunchPad to /Demo/MSP430X_MSP430FR5969_LaunchPad for consistency with other MSP430 demo directory names.
Fixed typos in comments repeated in multiple source files.
2015-04-24 11:42:25 +00:00
Richard Barry
34a7b0431b Complete large memory model MSP430FR5969 demo - including CLI and run-time stats. 2015-04-24 11:34:19 +00:00
Richard Barry
91b249d24b Start of an MSP430FR5969 IAR project - currently running Blinky only. 2015-04-22 15:36:44 +00:00
Richard Barry
d39c0d5926 Update TimerDemo.c to test the new vTimerSetTimerID() function.
Update WinPCap NetworkInterface.c for FreeRTOS+UDP to correctly store a pointer to the network buffer structure at the beginning of the network buffer.
2015-04-13 19:58:51 +00:00
Richard Barry
03213b9e4a Add the errno definitions used by FreeRTOS+TCP and FreeRTOS+FAT into FreeRTOS's projdefs.h.
Remove redundant global definition vPortInstallFreeRTOSVectorTable from the GCC ARM_CA9 portASM.S file.
Ensure correct sequence of start up sequence when the Windows port is used on multi-core Windows machines by starting one thread in the suspended state.
Move initialisation of xNextTaskUnblockTime to the function that starts the scheduler, rather than from where the variable is declared - this fixes a compiler warning in newer IAR compilers.
Fix "elif (SELECTED_PORT == PORT_MICROCHIP_PIC32MX || PORT_MICROCHIP_PIC32MZ)" in the FreeRTOS+Trace trcHardwarePort.h header file.
2015-04-13 18:45:02 +00:00
Richard Barry
8dadb6b87c Final V8.2.1 release ready for tagging:
+ Added MSP432 (ARM Cortex-M4F MSP430!) demos for IAR, Keil and CCS.
+ Renamed directory containing demo for STM32F7 ARM Cortex-M7.
+ Renamed directory containing demo for SAMV71 ARM Cortex-M7.
+ Introduced xTaskNotifyAndQuery().
2015-03-24 15:24:49 +00:00
Richard Barry
693d0520bc Update version number ready for V8.2.1 release. 2015-03-21 21:03:42 +00:00
Richard Barry
63b3c773d5 Kernel changes:
Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0.

New ports:
Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices.
Added Cortex-M4F port layer for CCS.

New demo applications:
Added demo application for STM32F7.
Added demo application for SAMv71.
2015-03-21 14:01:43 +00:00
Richard Barry
2bf93bf925 Minor updates relating to formatting and comments only. 2015-03-20 15:43:20 +00:00
Richard Barry
a61db8f155 Minor updates to the Microblaze KC702 demo to allow easier connection from a Telnet server. 2015-03-16 11:22:43 +00:00
Richard Barry
18ff880e75 Add networking option to the Microblaze Kintex demo. 2015-03-13 15:05:09 +00:00
Richard Barry
3012d9b94d Work-in-progress check in of MicroBlaze Kintex7 demo. 2015-03-10 15:58:19 +00:00
Richard Barry
96e72413f7 Kernel code:
+ Added mtCOVERAGE_TEST_DELAY() macro to facilitate getting better code coverage during testing.
+ Update prvNotifyQueueSetContainer() so it does not call xTaskRemoveFromEventList() if it is called from an interrupt, and the queue is locked.

Demo apps:
Added QueueSetPolling.c/h demo/test functions.
2015-03-04 17:45:18 +00:00
Richard Barry
7d169cef52 Correct typeo that broke the Win32 port. 2015-02-17 14:28:10 +00:00
Richard Barry
86b09bfeb9 Kernel updates:
+ Added vTimerSetTimerID() to compliment vTimerGetTimerID().  Now the timer ID can be used as timer local storage.
+ Updated comments and added some additional assert() calls.

Win32 port:
+ Some changes to allow easier 64-bit builds

PIC24/dsPIC port:
+ Added NOP after disable interrupt instruction.
2015-02-11 15:41:30 +00:00
Richard Barry
dfdc319518 Kernel updates:
- Add user configurable thread local storage array, with get/set access function.
2015-01-26 17:40:35 +00:00
Richard Barry
51aa373c4c Add run-time stats to the Kintex7 Microblaze demo. 2015-01-19 13:34:26 +00:00
Richard Barry
acfbb7dd14 Add the beginnings of a Microblaze project for the KC705. 2015-01-16 19:16:12 +00:00
Richard Barry
501a531d46 Update version number in preparation for official V8.2.0 release. 2015-01-16 13:20:28 +00:00
Richard Barry
c37b2ca39b Demo app changes:
Add a "query heap" command to the standard sample CLI commands.
Remove casting from configMAX_PRIORITIES setting in Win32 simulator demos as it was preventing a clean build. 

Source code changes.
General tidy up and addition of assert points.
2015-01-15 21:37:32 +00:00
Richard Barry
e4e6328300 Remove casting from configMAX_PRIORITIES setting in FAT SL / CLI demo as it was preventing a clean build. 2015-01-07 07:02:17 +00:00
Richard Barry
271393b7d9 Release candidate - this will be tagged as FreeRTOS V8.2.0rc1 and a zip file provided.
Minor lint changes.
2014-12-24 09:40:58 +00:00
Richard Barry
5dd77c7aeb Rename SAM4E demo directory to include the 'F' in 'M4F' - minor point for the sake of consistency. 2014-12-24 08:55:14 +00:00
Richard Barry
6741592026 Update version numbers in preparation for V8.2.0 release candidate 1. 2014-12-21 19:09:18 +00:00
Richard Barry
fd02010886 Kernel changes:
+ Made xTaskNotifyGiveFromISR() its own function, rather than a macro that calls xTaskNotifyFromISR() (minor performance improvement).
+ GCC and Keil Cortex-M4F ports now use vPortRaiseBASEPRI() in place of ulPortRaiseBASEPRI() where the return value is not required (minor performance improvement).

Demo changes:
Change the [very basic] FreeRTOS+UDP SAM4E driver to use task notifications rather than a semaphore (execution time now 55% what it was in FreeRTOS V8.1.2!).
Robustness improvements to IntQueue.c standard demo task.h.
Added the latest standard demo tasks, reg test tasks and int q  tasks to the SAM4E demo.
2014-12-21 10:26:36 +00:00
Richard Barry
2de32c0141 Kernel changes:
+ Do not attempt to free the stack of a deleted task if the stack was statically allocated.
+ Introduce configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES - which optionally writes known values into the list and list item data structures in order to assist with the detection of memory corruptions.

Microblase port:  
+Change occurrences of #if XPAR_MICROBLAZE_0_USE_FPU == 1 to 	#if XPAR_MICROBLAZE_0_USE_FPU != 0 as the value can also be 2 or 3.

Demo app modifications:
+ Update Zynq project to use the 2014.4 tools and add in tests for the new task notification feature.
+ Update SAM4S project to include tests for the new task notification feature.
2014-12-19 16:27:56 +00:00
Richard Barry
f407b70dcc + Update demos that use FreeRTOS+Trace to work with the latest trace recorder library.
+ Fix a few compiler warnings.
+ Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
2014-12-18 11:02:15 +00:00
Richard Barry
85fb1cc024 + New feature added: Task notifications.
+ Optimise Cortex-M4F ports by inlining some critical section macros.
+ Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h.
+ Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked.
+ Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos.
+ Update trace recorder code, and some demos to use the new version (more to do).
+ Introduce uxTaskPriorityGetFromISR().
+ Minor typo corrections.
+ Update MingW simulator demo to match the MSVC simulator demo.
2014-12-15 14:13:03 +00:00
Richard Barry
ca22607d14 Core kernel code:
Allow the stats formatting functions to be built in without stdio.h being included inside tasks.c.

Kernel port code:
- Slight change to the Cortex-A GIC-less port to move all non portable code to the application level.

SAMA5D4 demo project:
- Update the Atmel provided library to V1.1.
- Create a DDR build configuration.
- Ensure interrupts are all edge sensitive.
- Update the regtest code to use all 32 flop registers.
2014-10-15 21:01:31 +00:00
Richard Barry
e3263bb9b3 Demo projects only:
+ Remove some #warnings messages from the Cycle 5 - which were left in the code as reminders of tests that were not yet completed but are now.
2014-10-09 15:42:43 +00:00
Richard Barry
9e66637bec Core kernel files:
+ Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2.
+ Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction.  The stack will not grow into the TCB.
+ Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap.  This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM.

Demo application:
+ Add demo for SAMA5D4 using IAR.
2014-10-08 20:31:14 +00:00
Richard Barry
ee541a347d MSP430 Demo projects only:
Update project format to new IAR version.
2014-10-05 20:43:12 +00:00
Richard Barry
e0d9a274e2 Demo project only:
Added comprehensive demo including FreeRTOS+CLI to the Cyclone V SoC project.
2014-10-01 17:28:42 +00:00
Richard Barry
d269f2027a Demo project only: Cyclone V SoC now running from external RAM. 2014-10-01 09:30:35 +00:00
Richard Barry
e2f2cfa816 Added project for Altera Cyclone V SoC, currently running from internal RAM. 2014-09-30 15:32:19 +00:00
Richard Barry
3b0854bf96 Core kernel code:
+ Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt.

Demo applications:
+ Update IntSemTest.c to provide more code coverage in xSemaphoreGenericGiveFromISR().
+ Ensure the MMU is turned on in the RZ IAR demo.  It was already on in the RZ ARM demo.
2014-09-16 14:54:32 +00:00
Richard Barry
b3c040fc27 SAM4L tickless implementation: Bug fix and update the demo project to exercise the fix. 2014-09-16 12:24:14 +00:00
Richard Barry
4f03f7d1bb Demo project only:
Add the new IntSem test/demo code into the MSVC demo project.
2014-09-12 11:32:47 +00:00
Richard Barry
b6e4854f26 Demo tasks only, with the aim of improving test coverage:
+ Split out the code that uses a mutex from an interrupt from GenQTest.c and add to new common demo task IntSemTest.c.
2014-09-11 12:06:27 +00:00
Richard Barry
d55e7e77a2 Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition. 2014-09-02 22:39:54 +00:00
Richard Barry
33cc3a292b Demo code only:
Add the IntQ standard test to the SAM4S project.
2014-09-02 16:06:57 +00:00
Richard Barry
99229b597b Correct potential compiler warning when configUSE_MUTEXES is set to 0.
Add comments.
2014-08-30 20:18:18 +00:00
Richard Barry
a60ce58731 Update version number to 8.1.1 for patch release that re-enables mutexes to be given from an interrupt. 2014-08-29 19:14:23 +00:00
Richard Barry
ff5d3512b3 Core kernel code:
- Re-introduce the ability to give a mutex from an ISR.

Common demo code:
- Add additional tests into the GenQTest files for priority inheritance and using a mutex from an ISR.
2014-08-29 13:53:58 +00:00
Richard Barry
6507701fdf Lower the minimum stack size used by the ATSAMA5 demo. 2014-08-26 16:53:40 +00:00
Richard Barry
7d49c2190c Minor edits prior to tagging V8.1.0. 2014-08-26 16:23:09 +00:00
Richard Barry
d33a14b5fb ***IMMINENT RELEASE NOTICE***
Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days.
2014-08-16 20:19:40 +00:00
Richard Barry
e491610725 Remove some irrelevant CyaSSL files. 2014-08-16 15:43:43 +00:00
Richard Barry
52e687086c Demo application related:
+ Update the RZ IAR project so it targets the RZ RSK rather than custom hardware.
+ Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware.
+ Updated RX64M demos to use the new iodefine.h naming.

Cortex-A9 port related:
+ Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function.
+ Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task.

Core kernel files related:
+ Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
2014-08-16 14:29:39 +00:00
Richard Barry
162448f06b General maintenance - changing comments and correcting spellings only. 2014-08-04 07:57:18 +00:00
Richard Barry
60538c7480 Common demo tasks:
- Add additional tests to GenQTest.c to test the updated priority inheritance mechanism.
- Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases.

SAMA5D3 Xplained IAR demo:
- Remove space being allocated for stacks that are not used.
- Remove explicit enabling of interrupts in ISR handers as this is now done from the central ISR callback before the individual handers are invoked.
- Reduce both the allocated heap size and the stack allocated to each task.
- Enable I cache.
2014-08-04 07:53:20 +00:00
Richard Barry
47f895cb34 Cortex-A5 IAR port:
- Removed SAMA5 specifics from the port layer, and instead call a generic ISR callback as per Cortex-A9 ports.
2014-08-03 19:15:30 +00:00
Richard Barry
b2e739495a Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.:
- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.
2014-08-03 18:37:58 +00:00
Richard Barry
3a3d061cc5 Continue working on the GIC-less Cortex-A5 port for IAR:
- Add in the assert when a task attempts to exit its implementing function without deleting itself.
- Remove obsolete code from the context switch asm code (obsoleted by the fact that there is no mask register).
- Attempt to make code more generic by using definitions for additional register addresses.
2014-07-29 21:31:04 +00:00
Richard Barry
e9b5deb34a Carry on working on SAMA5D3 demo:
- Add full interrupt nesting tests.
- Add additional critical section/context switching tests.
- Set interrupt priorities so everything can run at once without any software watchdog errors.
- Re-enable interrupts in each IRQ handler.
- Add in run-time stats.
2014-07-29 21:28:22 +00:00
Richard Barry
146b46df87 SAMA5D3 demo: Add CDC driver code and use CDC to create a simple command console. 2014-07-23 21:07:03 +00:00
Richard Barry
3d007d0b4b Update CyaSSL to latest version. 2014-07-18 18:54:25 +00:00
Richard Barry
5fcd270398 Re-test Zynq demo now it is using the latest tools. 2014-07-14 14:01:07 +00:00
Richard Barry
bd9d37924d Add back Zynq demo - this time using SDK V14.2. 2014-07-14 13:00:18 +00:00
Richard Barry
96ceb9f537 Remove Zynq demo project ready to recreate the project using the 14.2 version of Xilinx's SDK. 2014-07-14 11:46:34 +00:00
Richard Barry
5b96cf6eea Add 'full' demo to the SAMA5 Xplained demo - but so far without interrupt nesting tests or CLI. 2014-07-12 20:40:33 +00:00
Richard Barry
8ad9b75810 Rename ARM_CAx_No_GIC ARM_CA5_No_GIC and add FreeRTOSConfig setting to specify the number of registers in the FPU unit. 2014-07-12 20:39:22 +00:00
Richard Barry
29336e35b5 SAMA5D3 Xplained demo blinky running. 2014-07-12 19:25:18 +00:00
Richard Barry
f4a1a7d577 Add new port layer for Cortex-A devices without the means to mask interrupt priorities. 2014-07-12 19:21:04 +00:00
Richard Barry
5b96c12e92 Start of SAMA5D3 XPlained demo. 2014-07-09 21:19:01 +00:00
Richard Barry
8aa5fa3459 Make the parameters to vPortDefineHeapRegions() const.
Add additional asserts to the Keil CM3 and CM4F ports (other CM3/4 ports already updated).
Add the additional yield necessitated by the mutex held count to the case when configUSE_QUEUE_SETS is 0.
2014-07-04 13:17:21 +00:00
Richard Barry
4fe2abc792 Update the MSVC simulator demo to demonstrate heap_5 allocator and pdTICKS_TO_MS macro being used. 2014-07-03 16:49:29 +00:00
Richard Barry
d96dc2adb0 Simply some of the alignment calculations in heap_4.c to match those used in heap_5.c.
Remove some apparently obsolete code from xTaskPriorityDisinherit() (a task cannot be both blocked and giving bac a mutex at the same time].
Update the new "mutex held count" increment and decrement functions to allow mutexes to be created before the scheduler is started.
2014-07-03 14:44:37 +00:00
Richard Barry
b0ba273489 Check in the portable.h version required to use heap_5.c. 2014-07-02 10:20:35 +00:00
Richard Barry
4b26dc0614 Check in the new memory allocator that allows the heap to span multiple blocks. 2014-07-02 10:19:49 +00:00
Richard Barry
5e47df8c01 Update FreeRTOS+ components and demos to use typedef names introduced in FreeRTOS V8. 2014-06-20 20:15:20 +00:00
Richard Barry
4ce4de750a Update timer demo in PIC32MZ demo to remove multiple extern definition created by adding in the macro that checks non ISR safe functions are not called from ISRs. 2014-06-16 13:07:01 +00:00
Richard Barry
42b1688a30 Implementation of mutex held counting in tasks.c - needs optimisation before release. 2014-06-16 12:55:50 +00:00
Richard Barry
583b144bc3 Default the definition of portASSERT_IF_IN_ISR() to nothing if it is not defined.
Helper updates to allow a count of the number of mutexes held to be added.
Updates to the CCS Cortex-R4 implementation necessitated by a change in compiler semantics.
Update PIC32MX and MZ ports to assert if a non ISR safe function is called from an ISR.
2014-06-16 12:51:35 +00:00
Richard Barry
b4659d8872 Add code to assert() if non ISR safe API function is called from ISR in Tasking CM4F ports - plus fix bug where the max syscall interrupt priority was used incorrectly in the Tasking CM4F port. 2014-06-15 09:24:08 +00:00
Richard Barry
113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. 2014-06-14 13:56:25 +00:00
Richard Barry
4723209074 Simplify the assert that checks if a non-ISR safe function is called from an ISR in the GCC Cortex-A9 port. 2014-06-13 14:08:28 +00:00
Richard Barry
d45f18cc8d Add additional comments to the Zynq lwIP demo. 2014-06-13 14:06:43 +00:00
Richard Barry
8426eba8e7 Added portASSERT_IF_IN_INTERRUPT() macro to the GCC Cortex A9 port layer. 2014-06-12 16:28:56 +00:00
Richard Barry
de7df3cfda Zynq demo: Fix Xilinx network driver by deferring the function that allocated memory from the interrupt into a task. Add DHCP option. 2014-06-12 16:27:35 +00:00
Richard Barry
f1a0534a56 Remove some of the lwip asserts to allow use with 64-bit alignment. 2014-06-10 16:29:32 +00:00
Richard Barry
7fa64efeeb Switch to using the private watchdog as the run time stats timer in the Zynq demo. 2014-06-10 16:25:46 +00:00
Richard Barry
2f6cb8a86c Reorganise Zynq project after spitting lwIP example into a separate configuration. 2014-06-09 20:20:23 +00:00
Richard Barry
e92795bcc8 Move the Zynq's lwIP example from the Full demo into its own configuration as having the lwIP tasks at a high priority made the self checking test tasks report failures, while having the lwIP tasks at a low priority slugged the throughput. 2014-06-09 19:35:08 +00:00
Richard Barry
be8b0ed21d Update lwIP byte alignment to make Zynq pings more reliable. 2014-06-09 12:43:18 +00:00
Richard Barry
16ff69e873 Update RL78 GCC demo application after testing with fixed compiler. 2014-06-05 12:44:38 +00:00
Richard Barry
9efb5c8b2f Check in RL78 GCC port layer now it has been verified with the fixed compiler. 2014-06-05 12:42:49 +00:00
Richard Barry
5cbab67186 Complete RX64M GCC demo. 2014-06-04 09:19:16 +00:00
Richard Barry
1130a53ec8 Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro.
Update RXv2 GCC port to match RXv2 Renesas port.
2014-06-04 09:17:14 +00:00
Richard Barry
5cd0b1e5ef Add -nomessage command line option to RX64M demo to suppress warning about the yield function being defined when it is not called directly. 2014-05-29 13:56:16 +00:00
Richard Barry
f46070dc79 Ensure demo app files are using FreeRTOS V8 names - a few were missed previously. 2014-05-29 13:54:15 +00:00
Richard Barry
ef254df85f A few additional casts to keep the Renesas RX compiler happy. 2014-05-29 13:39:48 +00:00
Richard Barry
74ffdb0b89 Add lwIP driver into Zynq demo - not yet fully functional. 2014-05-23 16:38:18 +00:00
Richard Barry
09a89763ee Add brackets in lwIP assert statement to prevent compiler warnings. 2014-05-23 16:36:49 +00:00
Richard Barry
b215310e63 Add some missing volatiles to __asm statements in the CA9 GCC port. 2014-05-19 13:14:02 +00:00
Richard Barry
0bb794301a Update version number ready for release. 2014-04-24 14:26:36 +00:00
Richard Barry
911e82a909 Add xQueueGetMutexHolder() to MPU functions. 2014-04-24 12:29:40 +00:00
Richard Barry
f25503977e Event Groups: Convert the 'clear bits from ISR' function into a pended function to fix reentrancy issue.
Event Groups: Ensure the 'wait bits' and 'sync' functions don't return values that still contain some internal control bits.
2014-04-23 15:23:54 +00:00
Richard Barry
fa7222ab4a Update demos that use FreeRTOS+FAT SL to have correct version numbers after the update of FreeRTOS+FAT SL itself. 2014-04-23 14:34:49 +00:00
Richard Barry
03c95b5950 Update IAR XMC4200 project to fix link error that resulted from updating the IAR version to 7.x. 2014-04-23 13:59:56 +00:00
Richard Barry
a46f251d11 Update FreeRTOS+FAT SL to version 1.0.1. 2014-04-23 13:28:21 +00:00
Richard Barry
6af9b013eb Ensure xNewLib_reent is reclaimed when a task is deleted. 2014-04-09 09:07:19 +00:00
Richard Barry
82207ebffa Add test and correct code for the unusual case of a task using an event group to synchronise only with itself.
Add critical sections around call to prvResetNextTaskUnblockTime() that can occur from within a task.
2014-03-31 02:12:17 +00:00
Richard Barry
ef7f3c5320 Add the pcTimerGetTimerName() API function. 2014-03-28 14:41:15 +00:00
Richard Barry
887fcd04f4 Add interrupt nesting test code into RX64M demo. 2014-03-28 13:05:29 +00:00
Richard Barry
42cbd6a778 Add RSK definition and LED flash tasks into RX64M demo. 2014-03-28 11:47:40 +00:00
Richard Barry
29a08b5e24 Update Cortex-A port layers to ensure the ICCRPR and ICCPMR registers are always accessed as 32-bit values. 2014-03-25 17:12:31 +00:00
Richard Barry
d59bf60ff9 Started to create RX64M GCC project - building but not yet converted to new core. 2014-03-20 12:04:49 +00:00
Richard Barry
6fe7e7ef67 Delete old RL78 launch configurations. 2014-03-19 16:45:53 +00:00
Richard Barry
7f7ad3d081 Add RL78/L1C configuration into e2studio demo. 2014-03-19 16:44:58 +00:00
Richard Barry
2283bfb0ae RL78/L1C configuration added to the IAR RL78 demo projects. 2014-03-19 13:29:11 +00:00
Richard Barry
a5f00caf16 Working but incomplete RXv2 demo. 2014-03-07 17:13:05 +00:00
Richard Barry
05a0e4379e First pass at RXv2 port layer. 2014-03-07 17:12:06 +00:00
Richard Barry
3788026636 RXv1 tests running before updating to RXv2. 2014-03-06 12:46:16 +00:00
Richard Barry
b17ab311af Start to create an RX64M demo. 2014-03-03 16:39:41 +00:00
Richard Barry
9bd5e5cf03 Cast away a few unused return types to ensure lint/compilers don't generate warnings when the warning level is high. 2014-02-23 20:01:07 +00:00
Richard Barry
c8953a68cd Add extra #error message as a configuration sanity check. 2014-02-19 13:08:34 +00:00
Richard Barry
ba6d285ea8 Minor updates to ensure all kernel aware debuggers are happy with V8. 2014-02-19 11:58:52 +00:00
Richard Barry
e101e7e437 Update version number to V8.0.0 (without the release candidate number). 2014-02-18 14:01:57 +00:00
Richard Barry
38ae9b76bc Add logic to determine the tick timer source and vector installation into the PIC32MZ port assembly file to allow more efficient interrupt entry. 2014-02-18 10:10:32 +00:00
Richard Barry
c3dd6f6593 Add event group code to the PIC32MZ demo. 2014-02-18 10:08:33 +00:00
Richard Barry
0f6b699eef Linting. 2014-02-17 19:41:29 +00:00
Richard Barry
a2089bbcf6 Add #define INCLUDE_eTaskGetState 1 to the demos that use the int queue test. 2014-02-17 19:32:20 +00:00
Richard Barry
2346014918 Update final demos that use the trace recorder code to use the new version. 2014-02-17 15:11:16 +00:00
Richard Barry
33e11c72c3 Update LPC1830 example to use the latest trace recorder code. 2014-02-17 14:18:00 +00:00
Richard Barry
d6da7b1231 Remove test of trace functions from the Win32/GCC build as it messes up the trace recorder. 2014-02-17 12:56:05 +00:00
Richard Barry
0ccfdd1021 Remove test of trace functions from the Win32 build as it messes up the trace recorder. 2014-02-17 12:48:18 +00:00
Richard Barry
04ae37ef12 Update trace recorder to include heap tracing and new v8 features. 2014-02-17 12:45:56 +00:00
Richard Barry
853696a991 Add event groups demo to SAM4E demo. 2014-02-16 22:03:39 +00:00
Richard Barry
b7eb76904a Add event group tests to IAR LM3S demo. 2014-02-16 21:47:07 +00:00
Richard Barry
e4dbc6b770 Make xEventGroupSetBitsFromISR() a function when configUSE_TRACE_FACILITY is enabled to allow the inclusion of a trace macro. 2014-02-14 11:07:25 +00:00
Richard Barry
b96016e234 Follow instructions on http://blogs.msdn.com/b/vsproject/archive/2009/07/21/enable-c-project-system-logging.aspx to manually prevent MSVC from incorrectly reporting the MSVC demo project as being out of date. 2014-02-11 15:15:36 +00:00
Richard Barry
5a2a8fc319 Update the demo directory to use the version 8 type naming conventions. 2014-02-11 12:04:59 +00:00
Richard Barry
c6d8892b0d Replace xTaskIsTaskSuspended() call with eTaskGetState() call in IntQueue.c as the former is now a private function. 2014-02-11 11:38:33 +00:00
Richard Barry
4f01401c00 Add a small amount of randomisation into the Zynq demo. 2014-02-11 11:37:42 +00:00
Richard Barry
0cc51d99a7 Add event groups demo to Zynq demo.
Add C implementations of some standard library functions to the Zynq demo to prevent the GCC libraries (which use floating point registers as scratch registers) being linked in.
2014-02-11 09:24:33 +00:00
Richard Barry
3eb212f454 Update IAR RL78 demo regtest tasks to make use of SKZ instructions as the latest IAR linker didn't seem to like the previous version. 2014-02-10 19:13:49 +00:00
Richard Barry
84f4ae9aa0 Make xTaskIsTaskSuspended() a private function as it should only be called from within critical sections.
Fix issue in and simplify the xTaskRemoveFromUnorderedEventList() function.  The function is new to the V8 release candidates so does not effect official released code.
2014-02-10 17:02:37 +00:00
Richard Barry
eea669240b Remove inclusion of now removed header file from the RZ/IAR LowLevelInitialise.c file. 2014-02-10 14:22:19 +00:00
Richard Barry
d4ca65f22f Third attempt: Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-10 14:21:17 +00:00
Richard Barry
660162a5b8 Update the Win32/MingW demo to match the latest Win32/MSVC demo. 2014-02-10 14:16:39 +00:00
Richard Barry
d12ec14160 Add configCLEAR_TICK_INTERRUPT() to the IAR and RVDS Cortex-A9 ports.
Replace LDMFD with POP instructions in IAR and RVDS Cortex-A9 ports.
Replace branch to address with indirect branch and exchange to address in register in the IAR and RVDS Cortex-A9 ports.
2014-02-04 17:02:52 +00:00
Richard Barry
9a8da3ff38 Second attempt: Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-04 15:51:48 +00:00
Richard Barry
03f9bbda52 Improve how TimerDemo.c manages differences between the tick count and its own internal tick count, which can temporarily differ when the tick hook is called while the scheduler is suspended. 2014-02-04 14:55:53 +00:00
Richard Barry
481db56078 Related to Zynq demo: Remove compiler warnings when configASSERT() is not defined and set the type of the assembly functions to allow them to be called when the C code is compiled to THUMB instructions. 2014-02-04 14:53:17 +00:00
Richard Barry
f843888e60 Complete GCC/Cortex-A9 port. 2014-02-04 14:49:48 +00:00
Richard Barry
c83414ccc4 Finish the Zynq demo. 2014-02-03 17:39:45 +00:00
Richard Barry
2fc4e89b98 Add in interrupt nesting test. 2014-01-30 14:45:48 +00:00
Richard Barry
d898d16c44 Check in working IntQueueTimer.c for Zynq before overhauling to ensure it conforms to the FreeRTOS style and coding standard. 2014-01-30 12:09:32 +00:00
Richard Barry
6c72f470ac Update Zynq serial.c to be interrupt driven. 2014-01-29 15:20:34 +00:00
Richard Barry
d310ac4552 Add very basic serial CLI to the Zynq demo - needs a lot of tidy up yet! 2014-01-28 17:41:28 +00:00
Richard Barry
51ea2639a9 vQueueAddToRegistry() now takes a const char * instead of a char *.
tmrCOMMAND_CHANGE_PERIOD_FROM_ISR constant added for the "FromISR" version of the software timer change period API function.
2014-01-28 12:32:03 +00:00
Richard Barry
0bf2e615b2 Uncheck the "Do not search standard system directories for header files" compiler option in two RX600 project to ensure stdint.h can be found correctly. 2014-01-27 10:33:57 +00:00
Richard Barry
6130fec60e Introduce xTimerPendFunctionCall().
Change INCLUDE_xTimerPendFunctionCallFromISR to INCLUDE_xTimerPendFunctionCall
Update event group trace macros to match the new trace recorder code.
Ensure parameter name consistency by renaming any occurrences of xBlockTime and xBlockTimeTicks to xTicksToWait.
Continue work on GCC/RL78 port - still a work in progress.
Adjust how the critical section was used in xQueueAddToSet.
2014-01-25 17:01:41 +00:00
Richard Barry
e4f495012f Fixes to FreeRTOS+UDP trace macro parameters and placements. 2014-01-25 09:50:28 +00:00
Richard Barry
888733ef79 Add main_full.c to Zynq demo. Still a work in progress. 2014-01-24 17:11:22 +00:00
Richard Barry
b352be2e23 Tidy up GCC Cortex-A port layer - still a work in progress. 2014-01-24 17:09:31 +00:00
Richard Barry
14f895478d Continue work on GCC/Cortex-A port layer. 2014-01-24 13:27:56 +00:00
Richard Barry
4c9b5d88ae Continue Zynq demo - ParTest.c now working (with single LED), but still very much a work in progress. 2014-01-24 13:27:01 +00:00
Richard Barry
1e26b1875f Remove #error that attempted to catch stdint.h not being included.
Split the previously overloaded trmCOMMAND_nnn definitions into individual definitions to enable better logging.
2014-01-23 14:51:53 +00:00
Richard Barry
d0323e67ae Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up. 2014-01-23 11:51:57 +00:00
Richard Barry
8cb6a4f032 Continue working on Zynq demo - tick interrupt now working but needs tidy up. 2014-01-23 11:50:48 +00:00
Richard Barry
371f6f359a Carry on working on the Zynq demo - still a work in progress. 2014-01-22 15:43:27 +00:00
Richard Barry
3e430b3801 Carry on working on the Cortex-A/GCC port layer - still a work in progress. 2014-01-22 15:39:58 +00:00
Richard Barry
33351b02c9 Beginnings of a project to build the GCC Cortex-A port targeting a Zynq. 2014-01-20 17:55:16 +00:00
Richard Barry
86023aa5a6 Beginnings of GCC Cortex-A port - not yet completely converted from IAR version. 2014-01-20 17:53:30 +00:00
Richard Barry
d8c135e2dc Add extern 'C' to FreeRTOS.h.
Remove obsolete extern declaration of vTaskSwitchContext() from the MPX430X IAR portmacro.h (other older portmacro.h header files contain the same declaration).
2014-01-17 09:45:02 +00:00
Richard Barry
a1b8079df1 Introduce configENABLE_BACKWARD_COMPATIBILITY to allow the #defines that provide backward compatibility with FreeRTOS version prior to V8 to be optionally omitted. 2014-01-13 20:26:47 +00:00
Richard Barry
f01bf9fdc3 Add additional NOP after EINT instruction in MSP430 ports. 2014-01-10 10:38:02 +00:00
Richard Barry
a20e75082e Remove obsolete OpenOCD driver. 2014-01-05 20:41:34 +00:00
Richard Barry
1aaa80fba6 Map portTICK_RATE_MS to portTICK_PERIOD_MS. 2014-01-05 20:40:55 +00:00
Richard Barry
a56d4b998c Minor tidy ups that don't effect code generation, plus:
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
2014-01-05 20:12:20 +00:00
Richard Barry
723682f1dd Minor comment corrections prior to tagging. 2013-12-31 21:30:30 +00:00
Richard Barry
a8836b5c43 Change version numbers ready for V8.0.0 release candidate 1 tag. 2013-12-31 20:10:09 +00:00
Richard Barry
a44a6fbaeb Add link to upgrading information. 2013-12-31 19:15:00 +00:00
Richard Barry
3705435417 Add the event group interrupt tests to the Win32 demo projects. 2013-12-31 19:10:11 +00:00
Richard Barry
8ae3d489fe Comment the event groups standard demo files. 2013-12-31 19:07:31 +00:00
Richard Barry
2aa19f1a14 Add xEventGroupClearBitsFromISR() and xEventGroupGetBitsFromISR() functions.
Move some types defines out of generic kernel headers into feature specific headers.
Convert the function prototype dypedefs to the new _t naming.
2013-12-31 16:45:49 +00:00
Richard Barry
38e7554138 Update FreeRTOS+ more demos that use FreeRTOS+CLI to remove casting to int8_t * from strings. 2013-12-30 19:32:29 +00:00
Richard Barry
31609c7c3e Update FreeRTOS+ demos that use FreeRTOS+CLI to remove casting to int8_t * from strings. 2013-12-30 16:07:34 +00:00
Richard Barry
42a2338f1c Update demos that use FreeRTOS+CLI to remove casting to int8_t * from strings. 2013-12-30 14:06:57 +00:00
Richard Barry
e95b482f56 Minor updates to demo projects to ensure correct building with V8 rc1. 2013-12-30 11:24:34 +00:00
Richard Barry
f9072e7bac Remove casting from definition of configMAX_PRIORITIES to allow its use in pre-processor defined conditional compilation. 2013-12-30 08:02:11 +00:00
Richard Barry
e4965ca03c Minor updates to demo projects to ensure correct building with V8 rc1. 2013-12-30 07:54:46 +00:00
Richard Barry
2b6eb1c5ab Revert some library files back to using standard types as they are not FreeRTOS files. 2013-12-29 14:55:55 +00:00
Richard Barry
b54158d1dc Replace use of legacy portTYPE macros from old demos and standard demo files. 2013-12-29 14:49:03 +00:00
Richard Barry
3e20aa7d60 Replace standard types with stdint.h types.
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
2013-12-29 14:06:04 +00:00
Richard Barry
f292243dcf Change 'signed char *pcTaskName) to 'char *pcTaskName' in vApplicationStackOverflowHook(). 2013-12-27 16:30:19 +00:00
Richard Barry
3517bbdcce Remove unnecessary 'signed char *' casts from strings that are now just plain char * types in the FreeRTOS-Plus directory. 2013-12-27 16:23:07 +00:00
Richard Barry
653fdb81d5 Continue to remove unnecessary 'signed char *' casts from strings that are now just plain char * types. 2013-12-27 15:49:59 +00:00
Richard Barry
da93f1fc4b Start to remove unnecessary 'signed char *' casts from strings that are now just plain char * types. 2013-12-27 14:43:48 +00:00
Richard Barry
b4116a7c7d Change the type used for strings and single characters from signed char to just char. 2013-12-27 12:10:23 +00:00
Richard Barry
b3aa1e90ad Add additional const qualifiers. 2013-12-24 11:55:38 +00:00
Richard Barry
6179690dc9 Don't free xQueue->ucHead if it is NULL. 2013-12-24 10:47:52 +00:00
Richard Barry
a3c2f45116 Move the event groups single tasks test out of the common demo file (they are now part of the module tests). 2013-12-23 18:13:29 +00:00
Richard Barry
c861e3883d Add coverage test markers. 2013-12-23 18:11:15 +00:00
Richard Barry
64ad1c00b5 In process of module testing event_groups.c.
Introduce xPortRunning variable into Win32 simulator port layer.
Add port optimised task selection macro for the GCC Win32 port layer (the MSVC version has had one for a while).
Ensure the event list item value does not get modified by code in tasks.c (priority inheritance, or priority change) when it is in use by the event group implementation.
2013-12-23 16:02:03 +00:00
Richard Barry
0147415c40 Change some task priorities in the MingW simulator demo. 2013-12-20 11:35:16 +00:00
Richard Barry
39b2d049a6 Update GCC/Eclipse Win32 simulator port to make better use of Eclipse resource filters and match the functionality of the MSVC equivalent. 2013-12-19 13:40:37 +00:00
Richard Barry
4b2f9dad42 Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock. 2013-12-15 10:27:37 +00:00
Richard Barry
040a7c02df Change the configCPU_CLOCK_HZ setting in the SAM4E demo to use the SystemCoreClock variable. 2013-12-15 10:17:02 +00:00
Richard Barry
a320d6dffd Update the ucQueueNumber member of the queue structure (used with FreeRTOS+Trace to be an unsigned portBASE_TYPE instead of an unsigned char. 2013-12-14 13:16:05 +00:00
Richard Barry
c17c65fc09 Introduce prvResetNextTaskUnblockTime() to encapsulate functionality from various places in the code into a single function. 2013-12-13 10:35:11 +00:00
Richard Barry
acad916453 Change the way one thread deletes another in the Windows simulator port (the way one thread deleted itself was already changed in a previous check-in).
Reset the expected block time variable when a task is suspended or deleted in case the value held in the variables was associated with the task just suspended or deleted.
2013-12-12 16:07:24 +00:00
Richard Barry
0d1e12522b Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
2013-12-12 14:07:20 +00:00
Richard Barry
6b3393b4b6 Add trace macros into the event groups implementation.
Add a task pre-delete hook to allow the insertion of any port specific clean up when a task is deleted.
Increase use of 'const' qualifiers.
Add vPortCloseRunningThread() into the Win32 port layer to attempt to allow Windows threads to be closed more gracefully when a task deletes itself.
2013-12-12 10:19:07 +00:00
Richard Barry
0416289066 Comment typo correction only. 2013-12-11 17:56:07 +00:00
Richard Barry
ed54bc497d Complete STM32L low power demo. 2013-12-11 11:35:03 +00:00
Richard Barry
4b655ac3bb Remove [unused] touch library files from the STM32L discovery demo. 2013-12-11 10:46:17 +00:00
Richard Barry
0028cc48c1 Remove unused files from STM32L discovery board demo directory structure and build. 2013-12-10 17:16:45 +00:00
Richard Barry
751103d848 Tidy up STM32L low power demo and add 'comprehensive demo' option. 2013-12-10 16:20:43 +00:00
Richard Barry
5638fe28a2 Remove duplication of comments at the top of the file. 2013-12-10 11:24:41 +00:00
Richard Barry
3d00d47239 STM32L discovery demo is now demonstrating three low power modes - still needs clean up. 2013-12-10 10:07:53 +00:00
Richard Barry
9001b7b77a Minor change to SAM4L_low_power_tick_management.c to ensure the alarm value cannot be set to zero. 2013-12-08 06:32:38 +00:00
Richard Barry
e682aec507 Spelling corrections in comments only. 2013-11-28 13:24:05 +00:00
Richard Barry
00ad1a0200 Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review. 2013-11-28 10:48:33 +00:00
Richard Barry
2e42d7690a Continue work on new event groups functionality - fixups required by test results. 2013-11-27 20:29:33 +00:00
Richard Barry
d2c2e3ca68 Add additional asserts() to ensure certain operations are not performed when the scheduler is suspended.
Change the xBlockTime variables in event_groups.c/h to xTicksToWait to match the naming in other core FreeRTOS files.
2013-11-24 10:11:16 +00:00
Richard Barry
5037ecdc5c Checked in header file missed form previous checkin. 2013-11-22 11:05:24 +00:00
Richard Barry
9dc39ee2a7 Add additional event group tests - and update implementation as required by test results. 2013-11-22 10:58:25 +00:00
Richard Barry
a22d5ff5a5 Add event groups test/demo tasks. 2013-11-21 22:08:06 +00:00
Richard Barry
f54f21b8f6 Add event_groups.c and associated functions in other core files.
Added xTimerPendCallbackFromISR() to provide a centralised deferred interrupt handling mechanism.
Add xPortGetLowestEverFreeHeapSize() to heap_4.c.
2013-11-21 21:46:08 +00:00
Richard Barry
faed443e82 Continue work on STM32L demo. 2013-11-21 16:08:11 +00:00
Richard Barry
b89fd7c1e3 Add STM32L Discovery board project as a starting point to adapt to an RTOS demo. 2013-11-20 13:33:30 +00:00
Richard Barry
417c3d1054 Change backslashes to forward slashes for all PIC projects. 2013-11-18 16:00:27 +00:00
Richard Barry
ad67be1577 Tidy up SAM4E NetworkInterface.c. 2013-11-17 22:19:54 +00:00
Richard Barry
c6020ae8b4 Change conf_eth.h to provide additional Rx buffers in SAM4E demo. 2013-11-17 22:15:45 +00:00
Richard Barry
fa002f7fdd Final tidy up before V7.6.0 zip file creation. 2013-11-17 15:46:08 +00:00
Richard Barry
8cd71348be Make SAM4E network driver a little more robust. 2013-11-17 15:42:08 +00:00
Richard Barry
c2bfac68b3 Add link to documentation page inside main_full() of the SAM4E demo. 2013-11-17 15:40:56 +00:00
Richard Barry
0cbd5182a3 Add additional comments to SAM4E demo. 2013-11-17 14:14:22 +00:00
Richard Barry
6be1ffccfb Update version numbers in FreeRTOS-Plus demo files. 2013-11-17 14:12:41 +00:00
Richard Barry
cbb14d30c5 Add basic SAM4E driver.
Add ipconfigETHERNET_DRIVER_ADDS_UDP_CHECKSUM, ipconfigETHERNET_DRIVER_ADDS_IP_CHECKSUM, ipconfigETHERNET_DRIVER_CHECKS_IP_CHECKSUM and ipconfigETHERNET_DRIVER_CHECKS_UDP_CHECKSUM definitions.
2013-11-17 14:09:17 +00:00
Richard Barry
0865907f3f Add graphics to the SAM4E demo. 2013-11-16 22:33:51 +00:00
Richard Barry
9e9f9f30b1 Add UDP related commands to SAM4E demo. 2013-11-16 19:19:18 +00:00
Richard Barry
b690b26861 Add standard demo tasks to SAM4E demo. 2013-11-16 18:06:57 +00:00
Richard Barry
dc2e20bb0a Add SAM4E-EK demo with UDP and CLI. Not yet complete. 2013-11-16 13:27:44 +00:00
Richard Barry
a37b947615 Reorder the license text wording so the exception text is at the top rather than the bottom. 2013-11-12 17:26:08 +00:00
Richard Barry
a2cfaa7cd9 Correct build of helper function for ports where the stack grows up. 2013-11-12 13:06:18 +00:00
Richard Barry
8320dfb885 Update the SAM4L low power demo to use the ASF enable/disable interrupts functions rather than manipulating the PIRMASK directly - and in so doing allow other ASF functions to be called with the interrupt enable bit nesting. 2013-11-11 14:49:36 +00:00
Richard Barry
0cd79ad81d Change version numbers in preparation for V7.6.0 release. 2013-11-08 11:47:35 +00:00
Richard Barry
c44d12dadb Ensure the Win32 demo runs in co-operative mode. 2013-11-08 10:11:46 +00:00
Richard Barry
b1b4b15353 Add configASSERT()s to ensure counting semaphores are not created with a max count of zero or an initial count greater than the max count. 2013-11-07 16:45:30 +00:00
Richard Barry
b181a3af99 Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
Remove duplicate save/restore of r14 in Cortex-M4F ports.
2013-11-07 16:43:54 +00:00
Richard Barry
20eb03ed7d Change behaviour when configUSE_PREEMPTION is 0 (preemption is turned off). See the change history in the next release for details.
Remove an erroneous const in the prototype of queue receive/peek functions.
2013-11-07 14:58:14 +00:00
Richard Barry
30bc6c01a9 Add ehb instructions back into PIC32 port layer (upon advice).
Add configCLEAR_TICK_TIMER_INTERRUPT into PIC32 port layer to allow the timer configuration to be changed without any edits to the port layer being required.
Add prvTaskExitError() into the PIC32 port layer to trap tasks that attempt to exit from their implementing function.
Provide the ability to trap interrupt stack overflows in the PIC32 port.
Radically improve the timing in the Win32 simulator port layer.
2013-11-07 14:16:32 +00:00
Richard Barry
40d2e74417 Update some standard demo task implementations so they can be used with the cooperative scheduler. 2013-11-07 14:04:05 +00:00
Richard Barry
5aabe4f8fb Update semtest.c to use xSemaphoreCreateBinary() in place of vSemaphoreCreateBinary. 2013-11-07 11:11:18 +00:00
Richard Barry
dcf261a3e6 Add xSemaphoreCreateBinary() so vSemaphoreCreate() can be deprecated. 2013-11-07 10:53:23 +00:00
Richard Barry
ca2191c6ee Ensure PIC32MX MPLAB 8 project builds with XC. 2013-11-07 10:16:15 +00:00
Richard Barry
9a0f2bda55 Update PIC32 MPLAB8 project so it builds with the new partest file names. 2013-11-07 10:11:06 +00:00
Richard Barry
1b7a2e40a3 Update PIC32MX demo:
Change configCHECK_FOR_STACK_OVERFLOW to 3 to also check the interrupt stack.
Add a build configuration to allow use on the PIC32 USBII starter kit.
Increase some delays when talking to the LCD to ensure it always displays correctly.
Rewrite the register test tasks.
2013-11-07 09:54:13 +00:00
Richard Barry
2ee43fbc64 Set the MSVC Win32 demo back to create the simply blinky demo by default.
Set the MingW Wind32 demo back to include the #error to remind people to run the CreateProjectDirectoryStructure batch file.
2013-10-29 12:40:12 +00:00
Richard Barry
73df0ffdff Update the Eclipse/MingW project to account for the new Win32 simulator port layer (which has better timing). 2013-10-29 12:32:04 +00:00
Richard Barry
6642926d43 Update the FreeRTOS+ Win32 MSVC demos to account for the changes to the Win32 port layer (more accurate timing). 2013-10-29 11:43:41 +00:00
Richard Barry
15d10ce094 Update the main Win32 MSVC demo to account for the changes to the Win32 port layer (more accurate timing). 2013-10-29 11:14:54 +00:00
Richard Barry
aa9ec31ba9 Add missing header file to the UDP BufferAllocation_1.c scheme. 2013-10-26 13:34:50 +00:00
Richard Barry
e46fe7c049 Second attempt - Ensure the private port number wrap check is inside the critical section in prvGetPrivatePortNumber() (UDP). 2013-10-23 13:59:51 +00:00
Richard Barry
818abc468d Ensure the private port number wrap check is inside the critical section in prvGetPrivatePortNumber() (UDP).
Add missing default values for some of the trace macros.
2013-10-23 10:28:17 +00:00
Richard Barry
63bd3ebbef Remove the SVC handler from the XMC1000 demo as it is no longer used by the Cortex-M0 port layer. 2013-10-22 11:27:43 +00:00
Richard Barry
dcd261bb8b Update the Keil and IAR CM0 port layers to match the changes made to the GCC version. 2013-10-22 11:26:16 +00:00
Richard Barry
7bcbef721b Remove the SVC handler from the SAMD20 FreeRTOSConfig.h as the GCC Cortex-M0 port no longer uses it. 2013-10-22 10:58:23 +00:00
Richard Barry
41fe693968 Improve how the scheduler is started in the GCC Cortex-M0 port. 2013-10-22 09:50:20 +00:00
Richard Barry
f64acd6a48 Added an additional configASSERT() to test the new eTaskGetState() behaviour (see previous checking comment). 2013-10-22 09:33:49 +00:00
Richard Barry
25bab250b6 Added a little intelligence to eTaskGetState() so it can distinguish between a suspended task and a task that is indefinitely blocked on an event. 2013-10-22 09:30:58 +00:00
Richard Barry
bafda11518 Remove maths library dependency form SAMD20 project. 2013-10-14 20:12:48 +00:00
Richard Barry
a12ea2d212 Update FreeRTOS version number to V7.5.3
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
2013-10-14 19:56:47 +00:00
Richard Barry
6280324778 Add a configASSERT() that checks the gateway address is on the same subnet as the device in FreeRTOS+UDP. 2013-10-14 14:35:53 +00:00
Richard Barry
94607d83f9 Add workaround to XMC4000 silicon bug to Tasking Cortex-M4F port layer. 2013-10-14 14:03:05 +00:00
Richard Barry
c1353bb12d Complete XMC4000 Tasking project. 2013-10-14 13:46:47 +00:00
Richard Barry
b887737c34 Fix broken link in Atmel Studio SAMD20 project. 2013-10-12 10:09:10 +00:00
Richard Barry
c09f6e6a9b Increase minimal stack size for the SAMD20 demo. 2013-10-09 18:46:08 +00:00
Richard Barry
dcea05a81c Complete tidy up of SAMD20 demo. 2013-10-09 13:26:34 +00:00
Richard Barry
41a1dc62b7 Complete SAMD20 demo - still needs tidy up.
Add comments to the XMC1000 reg test files.
2013-10-08 15:56:06 +00:00
Richard Barry
0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 2013-10-08 12:33:46 +00:00
Richard Barry
aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports.
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
2013-10-08 11:30:40 +00:00
Richard Barry
81e141ad86 Ensure the statically configured gateway address is on the same subnet. 2013-10-08 09:08:29 +00:00
Richard Barry
e2afb24747 Take out nonsensical #if configMAC_INTERRUPT_PRIORITY > configMAC_INTERRUPT_PRIORITY check from the LPC18xx Ethernet driver. 2013-10-07 20:17:28 +00:00
Richard Barry
0c849fa597 Update FreeRTOS_FD_SET() to check there is enough space in the queue before adding the socket to the socket set. 2013-10-07 20:13:02 +00:00
Richard Barry
10fa546e60 Make corrections to the interrupt priority configuration in the LPC1800 UDP demo that resulted from an incorrect NVIC_PRIOR_BITS setting in the LPC18xx.h header file. 2013-10-07 16:49:31 +00:00
Richard Barry
eaacbb099a Clear up a few compiler warnings.
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt.  Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
2013-10-07 12:06:17 +00:00
Richard Barry
be44f8aaa7 Improve DCHP handling by removing the yiaddr field from outgoing DHCP packets and adding the broadcast bit in the flags field.
Correct the check to ensure the application network event hook is not called when the first network down event is sent.
Add in defaults for the Nabto task stack and priority.
2013-10-07 11:49:17 +00:00
Richard Barry
7ec4773131 Add traceMALLOC() and traceFREE() macros. 2013-10-04 20:56:45 +00:00
Richard Barry
23fa077241 Complete CLI demo on SAMD20. 2013-10-03 15:41:33 +00:00
Richard Barry
8ffa1b1736 Get CLI functioning in SAMD20 demo. 2013-10-02 14:24:38 +00:00
Richard Barry
013a3ef944 Starting point for the SAMD20 demo. 2013-10-02 10:41:40 +00:00
Richard Barry
111283a9b2 Finalise XMC4000 GCC demos. 2013-10-01 12:47:27 +00:00
Richard Barry
0185643b39 Finalise XMC4000 IAR demos. 2013-10-01 10:10:15 +00:00
Richard Barry
1e248417bc Finalise XMC4000 Keil demos. 2013-10-01 09:53:12 +00:00
Richard Barry
db1a5f1553 Add the configUSE_STATS_FORMATTING_FUNCTIONS parameter to a couple of FreeRTOSConfig.h header files that got missed out when the parameter was introduced. 2013-09-17 09:48:51 +00:00
Richard Barry
988b0c1678 Remove the math library as a build dependency in the SAM4L demo. 2013-09-17 09:05:31 +00:00
Richard Barry
e3b5f36c3a Move the #error message about running the CreateProjectDirectoryStructure batch file from FreeRTOSConfig.h to main.c so it shows when the batch file has not been executed (XMC4000 Dave and Tasking projects). 2013-09-10 13:58:09 +00:00
Richard Barry
1902d2b64a Add the uxQueueSpacesAvailable() API function.
Move a configASSERT() call in timers.c to prevent a "condition is always true" compiler warning.
2013-09-10 13:19:12 +00:00
Richard Barry
dd3fdfa9ff Make self monitoring in QueueSet.c more robust to prevent false positives. 2013-09-10 13:09:14 +00:00
Richard Barry
c63a81af99 Enable RX62N_RDK project to build with the blink configuration. 2013-09-10 13:05:00 +00:00
Richard Barry
49c602f3df Add #error into Tasking project to remind users that they need to run the CreateProjectDirectoryStructure batch file. 2013-09-10 13:03:35 +00:00
Richard Barry
ae402434f8 Update Keil XMC1000 to later version. 2013-09-10 13:01:48 +00:00
Richard Barry
0e28ee90b6 Finalise XMC1000 GCC demos. 2013-09-10 12:54:15 +00:00
Richard Barry
42c0ae6bc8 Finalise XMC1000 IAR demos. 2013-09-10 12:24:55 +00:00
Richard Barry
a3095b89af Finalise XMC1000 Keil demos. 2013-09-10 11:35:31 +00:00
Richard Barry
8282cc0491 Finalise XMC4000 Dave/GCC demos. 2013-09-09 16:51:19 +00:00
Richard Barry
577ff0741d Finalise XMC4000 Keil demos. 2013-09-09 16:21:46 +00:00
Richard Barry
a0a96e52f2 Finalise XMC4000 IAR demos. 2013-09-09 15:55:14 +00:00
Richard Barry
41f92ced65 Add build configurations for the XMC4400 and XMC4200 to the Tasking demo project. 2013-09-05 12:00:04 +00:00
Richard Barry
77d817ffaa Update XMC4000 tasking project to use latest system files. 2013-09-05 11:37:44 +00:00
Richard Barry
7d92a29d2d Rename directories with XMC4500 in their name that now contain XMC4200 and XMC4000 build configurations to instead say XMC4000. 2013-09-04 16:06:23 +00:00
Richard Barry
117235c08a Rename directories with XMC4500 in their name that now contain XMC4200 and XMC4000 build configurations to instead say XMC4000. 2013-09-04 16:03:31 +00:00
Richard Barry
d8963209c2 Reworked XMC4500 IAR project to use latest system files and include build configurations for the XMC4200 and XMC4400 parts. 2013-09-04 15:44:48 +00:00
Richard Barry
aaf2d32011 Add XMC4200 and XMC4400 build configurations to the XMC4000 Dave project. 2013-09-04 14:22:45 +00:00
Richard Barry
6acac72ff1 Add Dave project for the XMC4500. 2013-09-04 10:43:31 +00:00
Richard Barry
d1d925ab36 Update the Keil XMC4500 demo project to include build configurations for the XMC4200 and XMC4400 application boards. 2013-09-03 15:26:05 +00:00
Richard Barry
18c4f8e622 Make the QueueSet.c standard demo task a little friendlier to lower priority tasks.
Allow the priority of the controlling task in the recmutex.c standard demo tasks to be overridden by a setting in FreeRTOSConfig.h.
2013-09-02 16:37:56 +00:00
Richard Barry
a8c2c6b3b6 Add a build configuration for the XMC1100 boot kit. 2013-09-02 16:35:54 +00:00
Richard Barry
05e0c59da8 Update RX600/Renesas compiler build configurations to use the latest compiler version. 2013-09-02 16:06:07 +00:00
Richard Barry
316b731fe9 Update RX600 blinky build configuration to include missing linker section. 2013-09-02 15:50:44 +00:00
Richard Barry
b79d3de952 Continue work on XMC1000 demos. 2013-09-01 20:06:31 +00:00
Richard Barry
73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
2013-09-01 19:53:24 +00:00
Richard Barry
ed399e801e Add additional configASSERTS() to some standard demo tasks.
Use own rand() function in QueueSet.c to prevent library versions being referenced.
2013-09-01 19:45:06 +00:00
Richard Barry
33bd63e287 Rename CORTEX_M)_Infineion_Boot_Kits_IAR_Keil to CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC as it now contains projects for all three compilers. 2013-08-31 16:03:11 +00:00
Richard Barry
245ff12be8 Add a GCC project to the the XMC1000 demo directory. 2013-08-31 15:57:31 +00:00
Richard Barry
f9e024d7ea Move files common to IAR and Keil projects from compiler specific directories under the XMC demo directory into the XMC demo directory itself. 2013-08-31 14:36:32 +00:00
Richard Barry
9ad0c17281 Continue work on Get clock settings in Keil and IAR XMC1000 demo working. 2013-08-31 12:43:52 +00:00
Richard Barry
710a652daf Continue work on XCM1200 Keil demo. 2013-08-30 18:05:16 +00:00
Richard Barry
f0a2688200 Create full Keil project for XMC boot kit (not yet tested). 2013-08-25 17:07:56 +00:00
Richard Barry
3fe6974bf9 Starting point for XMC1000 Keil demo. 2013-08-25 01:03:56 +00:00
Richard Barry
574f5044a6 Starting point for Keil Cortex-M0 port. 2013-08-25 01:01:18 +00:00
Richard Barry
747a0e15fa Convert double quotes in a command help string to single quotes to allow the string to be processed by Javascript. 2013-08-16 13:34:28 +00:00
Richard Barry
c40370e96a Fix a few typos and remove the "register" keyword. 2013-08-16 13:31:54 +00:00
Richard Barry
63e8044d33 Allow compilation when portALT_GET_RUN_TIME_COUNTER_VALUE() is defined. 2013-08-14 08:35:40 +00:00
Richard Barry
dac40d1677 Update version numbers. 2013-07-24 10:02:19 +00:00
Richard Barry
2f754d9b0c Add additional critical section to the default tickless implementations.
Update version number for maintenance release.
2013-07-24 09:45:17 +00:00
Richard Barry
3cbe0a724d Update version number. 2013-07-23 10:51:45 +00:00
Richard Barry
8ceb665994 Void a few unused return values and make casting more C++ friendly. 2013-07-23 09:53:24 +00:00
Richard Barry
bb2093cf5d Update the header file included in the PIC32 port_asm.S file to use the header for the latest compiler version. 2013-07-23 09:50:06 +00:00
Richard Barry
679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 2013-07-23 09:44:00 +00:00
Richard Barry
f522d6a2da Remove duplicate definition from FreeRTOSConfig.h. 2013-07-23 09:36:30 +00:00
Richard Barry
9054485f1a Tidy up pre-processor as final act before tagging as V7.5.0 2013-07-19 10:22:47 +00:00
Richard Barry
08057fa77f Changes to comments only. 2013-07-19 09:16:36 +00:00
Richard Barry
203ae64600 Rename xTaskGetSystemState() uxTaskGetSystemState(). 2013-07-18 14:41:15 +00:00
Richard Barry
92fae7d262 For consistency change the name of configINCLUDE_STATS_FORMATTING_FUNCTIONS to configUSE_STATS_FORMATTING_FUNCTIONS. 2013-07-18 11:40:32 +00:00
Richard Barry
7d6758ee1a Minor updates and change version number for V7.5.0 release. 2013-07-17 18:32:57 +00:00
Richard Barry
d04c2fa753 Correct compiler warnings in trace recorder code. 2013-07-16 12:23:25 +00:00
Richard Barry
4578154959 Remove large and unnecessary .docx files. 2013-07-16 12:01:11 +00:00
Richard Barry
0fd81d6d8e Update FreeRTOS+Trace recorder code. 2013-07-16 11:55:14 +00:00
Richard Barry
7d1292ced2 Linting and MISRA checking 2013-07-15 14:27:15 +00:00
Richard Barry
e83b93f5fc Tidy up comments only. 2013-07-14 13:09:18 +00:00
Richard Barry
ce9c3b7413 Variable name change in the PIC32 port layer only. 2013-07-14 13:06:17 +00:00
Richard Barry
14a190e79e Update PIC32 serial.c slightly to add volatile qualifier and update to coding standard. 2013-07-14 08:46:15 +00:00
Richard Barry
1e17924fa8 Update doxygen comments. 2013-07-13 19:58:42 +00:00
Richard Barry
a6db135add Fix compiler warning. 2013-07-13 19:39:07 +00:00
Richard Barry
da0fff63c9 Update Cortex-M MPU version to include new API functions. 2013-07-13 19:37:35 +00:00
Richard Barry
e5d9640863 Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined. 2013-07-13 11:31:35 +00:00
Richard Barry
4b964814de Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32. 2013-07-12 19:25:21 +00:00
Richard Barry
25310a6796 Update compiler version and add configASSERT() to PIC32 MPLAB X project. 2013-07-12 19:21:10 +00:00
Richard Barry
ad8fa53043 Kernel optimisations. 2013-07-12 11:11:19 +00:00
Richard Barry
c9d9bddc3c Add comments to the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() calls in the core queue.c and tasks.c files. 2013-07-11 10:52:43 +00:00
Richard Barry
5d902f2b9c Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports. 2013-07-11 10:05:06 +00:00
Richard Barry
18caebf1d1 Remove commented out code. 2013-07-10 13:26:00 +00:00
Richard Barry
65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
2013-07-09 17:57:59 +00:00
Richard Barry
0f6b0d3a59 Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
2013-07-09 12:49:49 +00:00
Richard Barry
4894955a08 Correct comment only. 2013-07-04 16:05:27 +00:00
Richard Barry
c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 2013-07-04 11:20:28 +00:00
Richard Barry
b521d70e7e Remove compiler warnings. 2013-07-02 12:39:16 +00:00
Richard Barry
019c6417d7 Remove compiler warnings. 2013-07-02 12:36:24 +00:00
Richard Barry
5ad3b59783 Add the new configINCLUDE_STATS_FORMATTING_FUNCTIONS configuration parameter to FreeRTOS+ demo applications that make use of vTaskStats() or vTaskGetRunTimeStats(). 2013-07-02 12:17:26 +00:00
Richard Barry
2c242cdf78 Add the new configINCLUDE_STATS_FORMATTING_FUNCTIONS configuration parameter to FreeRTOS demo application that make use of vTaskStats() or vTaskGetRunTimeStats(). 2013-07-02 12:14:49 +00:00
Richard Barry
c1b4fc58d2 Add new xTaskGetSystemState() API function to return raw data on each task in the system.
Relegate the vTaskList() and vTaskGetRunTimeStats() functions to "sample" functions demonstrating how to use xTaskGetSystemState() to generate human readable status information.
Introduce and default configINCLUDE_STATS_FORMATTING_FUNCTIONS which must now be defined to use vTaskList() and vTaskGetRunTimeStats().
2013-07-02 12:10:16 +00:00
Richard Barry
877ce218a4 Add additional comment only. 2013-07-01 09:05:15 +00:00
Richard Barry
625b1a7159 Add the queue overwrite demo to the RZ demo. 2013-07-01 08:49:20 +00:00
Richard Barry
0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 2013-06-30 10:38:31 +00:00
Richard Barry
08ca5dead5 Update Win32 MSVC demo to include a simple blinky build option. The demo as it was is now the "full/comprehensive" build option. 2013-06-28 10:46:29 +00:00
Richard Barry
b8a219b30c Update QueueOverwrite.c to include a call to xQueuePeekFromISR().
Default new QueuePeekFromISR() trace macros.
2013-06-28 09:21:39 +00:00
Richard Barry
3b02b4c8f8 Add xQueueOverwriteFromISR() and update the QueueOverwrite.c to demonstrate its use. 2013-06-27 14:25:17 +00:00
Richard Barry
671949ad78 Add xQueueOverwrite() and a common demo task to demonstrate its use.
Update MSVC Win32 demo to include the xQueueOverwrite() common demo tasks.
2013-06-27 09:21:43 +00:00
Richard Barry
59f75a12f6 Add Newlib reent support. 2013-06-26 11:37:08 +00:00
Richard Barry
4444b4ee68 Improve efficiency and behaviour of vListInsertEnd(). 2013-06-26 08:58:01 +00:00
Richard Barry
f11635ed91 Remove reliance on strncpy() function. 2013-06-25 14:03:02 +00:00
Richard Barry
a7c47131fa Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose. 2013-06-25 13:39:50 +00:00
Richard Barry
6cbbfd2eb5 Slight correction to coding standard in heap_2.c and heap_4.c. 2013-06-25 13:25:08 +00:00
Richard Barry
fb47260e80 Improve efficiency of memory allocation when the memory block is already aligned correctly. 2013-06-25 12:20:29 +00:00
Richard Barry
87049ac37c Re-implement the LPC18xx and SmartFusion2 run time stats implementation to use the free running Cortex-M cycle counter in place of the systick.
Correct the run-time stats counter implementation in the RZ demo.
Guard against run time counters going backwards in tasks.c.
2013-06-25 10:44:44 +00:00
Richard Barry
cdae14a8cb Replace the #define that maps the uxRecursiveCallCount to the pcReadFrom pointer with a union - although this is against the coding standard it seemed the best way of ensuring complete adherence to the C standard and allow correct builds with LLVM when the optimiser is on. 2013-06-24 12:20:00 +00:00
Richard Barry
00136d4b51 Update trace recorder code in the LPC18xx project. 2013-06-23 21:11:37 +00:00
Richard Barry
d8248c49fc Remove old trace recorder source from LPC18xx project. 2013-06-23 20:38:17 +00:00
Richard Barry
0ca2110982 Split the LPC18xx FreeRTOS+UDP drivers between those that use the LPCOpen library and those that use the older CMSIS library. 2013-06-23 20:33:43 +00:00
Richard Barry
a1145a1b78 Remove DemoIPTrace.h from LPC18xx demo as it should be copied from is standard location. 2013-06-23 19:00:14 +00:00
Richard Barry
34e7cfc2a2 Back out changes to LPC18xx UDP demo. 2013-06-23 08:00:39 +00:00
Richard Barry
e6903dac61 Add extra debug comment into list.c. 2013-06-23 07:27:46 +00:00
Richard Barry
1cfb7b77e5 Add retarget.c to RVDS project to ensure semihosting is not used. 2013-06-20 14:59:11 +00:00
Richard Barry
3a507bdc0c Add missing function prototype. 2013-06-20 14:57:44 +00:00
Richard Barry
c3f9e3c5ff Update RVDS port layer to match IAR port layer. 2013-06-20 14:56:40 +00:00
Richard Barry
018f0f602a RZ RVDS and IAR projects. 2013-06-20 12:49:53 +00:00
Richard Barry
5013baa2cd RVDS ARM Cortex-A port layer. 2013-06-20 12:47:21 +00:00
Richard Barry
04dafed839 IAR ARM Cortex-A port layer. 2013-06-20 12:20:40 +00:00
Richard Barry
2fd431e971 Modify the GCC/AVR port to make use of the xTaskIncrementTick return value.
Add pre-processor directives in the dsPIC and PIC24 port layers that allows both port files to be included in the same project.
2013-06-11 20:15:15 +00:00
Richard Barry
3aad6381e1 Update RX100 project to e2studio V2 format. 2013-06-11 20:11:29 +00:00
Richard Barry
f038fd6a86 Improve the error detection in some of the standard demo tasks. 2013-06-11 18:46:00 +00:00
Richard Barry
3b004f9900 Add the APPLICATION_DEFINED port type to the trcHardwarePort.h template. 2013-06-11 16:11:21 +00:00
Richard Barry
62c0ae0926 Update port layers to make better use of the xTaskIncrementTick() return value. 2013-06-08 18:36:25 +00:00
Richard Barry
c75c01ffdf Check in implementation of xTaskIncrementTick (replaced vTaskIncrementTick()). 2013-06-08 18:30:52 +00:00
Richard Barry
c9b30b9fe7 Add MPLAB X project for PIC24.
Remove PIC24 demo warnings when XC16 is used as the compiler.
2013-06-08 18:19:50 +00:00
Richard Barry
2089f31f18 Update include paths in Rowley MSP430 project file. 2013-06-07 19:24:10 +00:00
Richard Barry
a1ef5d6fa9 Add UV4 project to old RVDS LPC2129 UV2 directory. 2013-06-07 15:23:34 +00:00
Richard Barry
59a834eb86 Update ports that have their tick configuration in an application callback to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-07 12:39:56 +00:00
Richard Barry
c04b074707 Convert the remaining ports to use xTaskIncrementTick() in place of vTaskIncremenTick(). 2013-06-07 12:16:58 +00:00
Richard Barry
2fc9d033c6 Update the PIC32 port to use xTaskIncrementTick() and change the macro used to detect if XC is being used. 2013-06-07 11:15:43 +00:00
Richard Barry
51d9ee0c1c Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to the relevant port.c file to allow the user to define functions that will execute in privileged mode. 2013-06-07 09:45:34 +00:00
Richard Barry
29ca4f1b36 Ensure queue functions go into the privileged code section when the MPU version is in use.
Provide a default value for configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS.
Revert prvQueueUnregisterQueue() back to a public function.
2013-06-07 09:41:15 +00:00
Richard Barry
0f3ae55e5d Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to allow the user to define functions that will execute in privileged mode.
Update the Rowley MPU demo to use a version of debug_printf that runs in privileged mode to get around the problem of the RAM it uses not being under the control of the kernel.
2013-06-07 09:37:18 +00:00
Richard Barry
f904d26957 Convert more ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:31:15 +00:00
Richard Barry
15ec6c87f7 Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:06:48 +00:00
Richard Barry
686d190798 Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
Move DSB instructions to before WFI instructions in line with ARM recommendations.
2013-06-06 15:46:40 +00:00
Richard Barry
4e9374ad90 Add default value for configUSE_TIME_SLICING 2013-06-06 14:56:47 +00:00
Richard Barry
06953169ba Update RM48/TMS570 port to use xTaskIncrementTick in place of vTaskIncrementTick. 2013-06-06 13:06:24 +00:00
Richard Barry
0673f63e8d Ensure RM48 demo compiles in co-operative mode. 2013-06-06 12:54:00 +00:00
Richard Barry
66734268f5 Update SAM4L_low_power_tick_management.c to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 11:26:15 +00:00
Richard Barry
2e5d812022 Tidy up the comments and use of static function prototypes in the SAM4L_low_power_tick_management.c implementation. 2013-06-06 11:19:32 +00:00
Richard Barry
3fbee4f0a8 Place DSB instruction before WFI instruction in EFMG890F128 demo. 2013-06-06 11:15:08 +00:00
Richard Barry
64bd0689c7 Update the standard Win32 demo to use the latest version of the trace recorder code. 2013-06-05 16:26:04 +00:00
Richard Barry
6330e06975 Remove compiler warnings from the trace recorder code. 2013-06-05 15:25:26 +00:00
Richard Barry
6438027bb9 Update the FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator demo to use the latest version of the trace recorder code. 2013-06-05 15:24:12 +00:00
Richard Barry
f928b0e296 Update to latest FreeRTOS+Trace recorder code. 2013-06-05 13:38:56 +00:00
Richard Barry
f9d0a153b4 Update the FreeRTOS+UDP LPC18xx MAC driver to use the LPCOpen drivers. 2013-06-03 20:27:46 +00:00
Richard Barry
54c62d429f Update LPC18xx FreeRTOS+UDP demo to use LPCOpen USB and Ethernet drivers.
Update LPC18xx FreeRTOS+UDP eclipse project to use linked resources rather than a CreateProjectDirectoryStructure.bat batch file.
2013-06-03 20:21:38 +00:00
Richard Barry
0158039f99 Slight modification to license blub text in header comments. 2013-05-21 14:14:03 +00:00
Richard Barry
fda145278e Remove the Chan FATfs code as FreeRTOS now ships with a proprietary file system. 2013-05-19 10:36:04 +00:00
Richard Barry
2c562bd3d7 Ensure a queue or semaphore that is not empty cannot be added to a queue set. 2013-05-19 10:11:10 +00:00
Richard Barry
bb7b711ca9 Update the code that generates the run time stats strings so the pcStatsString[] array is not required. 2013-05-19 09:56:47 +00:00
Richard Barry
a03b171992 Fix compiler warning in psp_test.c when compiled with ARM compiler.
Add portYIELD_FROM_ISR() macros to Cortex-M ports.  The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
2013-05-19 09:43:00 +00:00
Richard Barry
9b153b3e06 Ensure the SmartFusion2 interrupt driven UART drivers are not passed a zero length buffer. 2013-05-14 13:22:37 +00:00
Richard Barry
94f178c8d1 Move SmartFusion configuration options into FreeRTOSConfig.h. 2013-05-13 10:51:31 +00:00
Richard Barry
5c5c1c406d Rename the SmartFusion2 demo directory. 2013-05-13 09:26:39 +00:00
Richard Barry
961928b0f9 Combine the SmartFusion2 starter kit and development kits demos into a single directory. 2013-05-13 09:06:50 +00:00
Richard Barry
82995fd4fd Update SmartFustion2 starter kit partest.c. 2013-05-12 20:24:42 +00:00
Richard Barry
4d966adc8b Add SmartFusion2 demo for the SmartFustion2 development kit. 2013-05-12 20:07:49 +00:00
Richard Barry
063c05ccad Convert SmartFusion2 CLI to use the interrupt UART driver functions instead of the polled UART driver functions. 2013-05-12 13:02:16 +00:00
Richard Barry
5ff880fee8 SmartFusion2 CLI working with polled UART, about to convert to interrupt driven UART. 2013-05-10 18:47:43 +00:00
Richard Barry
8732e8efc5 Minor cosmetics to comments. 2013-05-09 10:15:52 +00:00
Richard Barry
fb9662009a Update comments in Atmel Studio CreateProjectDirectoryStructure.bat files to remove references to replace references to Eclipse with references to Atmel Studio.
Update the tickless idle implementations that use up counters for tick interrupt generate to ensure they remain in low power mode for the desired time instead of one tick less than the desired time.
2013-05-09 09:56:04 +00:00
Richard Barry
e08966c7e8 Update flop.c and FreeRTOS.h to include a macro (and a default null implementation of the macro) that enables the flop tasks to register their need for a floating point context with the kernel. 2013-05-09 09:52:34 +00:00
Richard Barry
b4efc0439f Update Win32 simulator so it references the FreeRTOS+Trace code from the updated FreeRTOS+ directory structure. 2013-05-09 09:50:40 +00:00
Richard Barry
410f5d45eb SmartFusion2: Change linker file to run from NVM. Add in FreeRTOS+CLI and FreeRTOS+FAT SL demo. 2013-05-07 08:46:24 +00:00
Richard Barry
e3a868ca58 Blinky and full demos working on SmartFusion2. 2013-05-06 09:18:00 +00:00
Richard Barry
b8d265f57f Starting point for SmartFustion2 starter kit demo. 2013-05-05 13:33:55 +00:00
Richard Barry
39147e83a0 Update version numbers in a couple of files that got left behind. 2013-05-01 09:19:09 +00:00
Richard Barry
96ceae8edd Update version number ready to release the FAT file system demo. 2013-04-30 21:42:41 +00:00
Richard Barry
a4a830c44d Add FAT SL code and demo project. 2013-04-30 20:37:52 +00:00
Richard Barry
bbe48d31a4 Clarify license blurb at the top of the FreeRTOS+UDP and FreeRTOS+CLI source files. 2013-04-30 20:23:06 +00:00
Richard Barry
fbadf8bee7 Add quick start guide. 2013-04-30 19:37:00 +00:00
Richard Barry
f9918345e1 Update version numbers to V7.4.1. 2013-04-18 12:58:17 +00:00
Richard Barry
c60973c34a Change version number in common files within the FreeRTOS-plus directory and check all demos still execute. 2013-04-18 10:08:04 +00:00
Richard Barry
64a3ab321a Add FreeRTOS-Plus directory with new directory structure so it matches the FreeRTOS directory. 2013-04-18 09:17:05 +00:00
Richard Barry
80f7e8cdd4 Remove subdirectories of FreeRTOS-Plus in preparation for changing the directory structure to match the FreeRTOS directory. 2013-04-18 08:39:10 +00:00
Richard Barry
2bd7d0c1f5 Commit 3 RX100 low power demos. 2013-04-17 10:04:38 +00:00
Richard Barry
2b41be4cb9 Update yield code in RX200/Renesas compiler port. 2013-04-17 08:55:16 +00:00
Richard Barry
352949af42 Update RX600 IAR RX62N demo to use latest IAR tools. 2013-04-17 08:47:27 +00:00
Richard Barry
0013028c7a Update yield code in RX600/IAR compiler port. 2013-04-17 08:46:10 +00:00
Richard Barry
4f5f527c73 Update yield code in RX600/Renesas compiler port. 2013-04-17 08:35:20 +00:00
Richard Barry
b7487b8dc2 Update yield code in RX600/GCC port. 2013-04-17 08:23:02 +00:00
Richard Barry
a69933782d Add RX100 Renesas compiler port layer. 2013-04-16 15:59:21 +00:00
Richard Barry
74290b4425 Add RX100 IAR port layer. 2013-04-16 15:58:46 +00:00
Richard Barry
a0056e8fd3 Add RX100 GCC port layer. 2013-04-16 15:58:14 +00:00
Richard Barry
9a15f50b00 Add memory barrier instructions to Tasking CM4F port. 2013-04-16 15:50:17 +00:00
Richard Barry
7132e88685 Add memory barrier instructions to the RVDS CM3 ports. 2013-04-16 15:30:43 +00:00
Richard Barry
895ee2bb3e Add barrier instructions to IAR CM3 ports. 2013-04-16 14:56:49 +00:00
Richard Barry
be7cae575d Ensure XMC demo builds with the latest IAR version. 2013-04-16 14:51:33 +00:00
Richard Barry
d135e45676 Replace the read back of the software interrupt register with barrier instructions (CCS/RM48/TMS570). 2013-04-16 14:17:35 +00:00
Richard Barry
0527099b51 Add barrier instructions to the GCC CM3 ports. 2013-04-16 14:16:30 +00:00
Richard Barry
67cc013ac3 Remove duplicate #error informing people to run the CreateProjectDirectoryStructure.bat. 2013-04-16 12:49:23 +00:00
Richard Barry
af023e8bf1 Remove infinite loop from task delete function. 2013-04-16 10:25:33 +00:00
Richard Barry
01202246da Add volatile keyword to GenQTest loop counter for consistency.
Remove obsolete definition from SAM4L demo.
2013-04-14 19:07:32 +00:00
Richard Barry
6d20e2b5cd Add barrier instructions to GCC CM3/4 code. 2013-04-07 19:43:52 +00:00
Richard Barry
a7fb62cb9c Prepare to package up SAM4L demo. 2013-04-07 19:41:45 +00:00
Richard Barry
af623460a6 Updated the sleep function to ensure it left interrupts disabled when returning. 2013-04-07 19:30:25 +00:00
Richard Barry
2cf9f1ac8c Add SAM4L demo. 2013-04-07 18:49:53 +00:00
Richard Barry
3762630f27 RL78/IAR port - Allow the end user to define their own tick interrupt configuration by defining configSETUP_TIMER_INTERRUPT(). 2013-03-25 17:00:13 +00:00
Richard Barry
a9b8f0ca69 Minor mods common files to fix warnings generated by Renesas compiler.
Correct the header comments in het.c and het.h (RM48/TMS570 demo) which were corrupt.
Correct version numbers in RX63N Renesas compiler demo.
Ensure stacks set up for tasks in the RX200 port layer end on 8 byte boundaries (was 4, which didn't matter but didn't match the definition).
Replaced unqualified (unsigned) in calls to standard functions with (size_t).
2013-03-25 16:30:42 +00:00
Richard Barry
236683d74d Update the GCC RL78 demo to include four separate build configurations, each of which targets different hardware. 2013-03-19 12:24:05 +00:00
Richard Barry
3a1a500950 Rename the Demo/RL78_RL78G13_Promot_Board_IAR directory to RL78_Multiple_IAR as it now targets several different devices. 2013-03-18 16:51:43 +00:00
Richard Barry
c08a0558c8 Add two additional targets to the RL78 IAR project. 2013-03-18 16:43:21 +00:00
Richard Barry
caf1fbc899 Ensure IAR RL port layer works on devices using two different naming conventions for the interval timer registers. 2013-03-18 16:40:47 +00:00
Richard Barry
8c66fdbb8c Updated IAR RL78 port layer. 2013-03-17 16:54:17 +00:00
Richard Barry
b78fa80fbe Update the IAR RL78 demo to include main_blinky.c and main_full.c. 2013-03-17 16:52:39 +00:00
Richard Barry
7fb22e27da Add an example ISR implementation into the RL78 GCC demo. 2013-03-17 15:38:23 +00:00
Richard Barry
c79a5fe50c Complete RL78/G14 demo. 2013-03-17 12:12:20 +00:00
Richard Barry
3b1ff85222 RL78 GCC: Save and restore all register banks. 2013-03-17 09:27:18 +00:00
Richard Barry
3b9d0819c9 RL78/GCC related:
+ Add RL78G14 specific linker script.
+ Move the call to the function that sets up the clocks to before the code that sets up the .data and .bss sections.
2013-03-06 10:56:03 +00:00
Richard Barry
08b959f143 For RL78GCC port/demo:
- Added YRDKRL78G14 build configuration.
- Runs provided the dynamic priority tasks are not started.
- Does not run with the debugger connected.
2013-03-04 20:04:02 +00:00
Richard Barry
fba04057ec All related to RL78 GCC demos (which are still a work in progress):
- Abstract out the IO port handling for the LED output so the same code can be used on multiple eval boards.
- Add in the RESTORE_CONTEXT macros.
- Swap to use heap_1.c instead of heap_4.c.
- Add data model macros to FreeRTOSConfig.h (may be removed if only one data model is supported by the compiler).
- Install interrupt handlers.
2013-03-04 13:23:48 +00:00
Richard Barry
37d302b8ee Abstract the IO port handling to toggle the LED into LED.h so the same code can work with multiple eval boards. 2013-03-04 13:18:19 +00:00
Richard Barry
83fa827935 Add RL78 E2Studio project. Code is building, but has not yet been executed. 2013-03-02 15:50:02 +00:00
Richard Barry
17bba16fa6 Added YRDKRL78G14 build configuration to the IAR RL78 demo. 2013-02-24 19:48:26 +00:00
Richard Barry
a5d0e3f0c1 Prepare for V7.4.0 release. 2013-02-19 18:36:58 +00:00
Richard Barry
902f9e1a58 Update PIC32 demo application to remove reliance on PLIB functions.
Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
2013-02-18 16:41:11 +00:00
Richard Barry
c519ba094d Correct spelling of xSuspendedTaskList in eTaskConfirmSleepModeStatus(). 2013-02-18 11:28:56 +00:00
Richard Barry
dcc90bb6d9 Add default definition for configUSE_QUEUE_SETS.
Add eTaskConfirmSleepModeStatus() (not yet tested).
Only call prvQueueUnregisterQueue() when a queue or semaphore is deleted if configQUEUE_REGISTRY_SIZE > 0.
Back out change that checks the configUSE_PORT_OPTMISED_TASK_SELECTION value before uxPriorityUsedOnEntry is set in vTaskPrioritySet as it generated more warnings (with other compilers) than it fixed.
2013-02-18 11:20:29 +00:00
Richard Barry
2b835ccb48 Commit demos that have been updated for testing purposes before they are updated once more to test new low power features. 2013-02-18 11:15:35 +00:00
Richard Barry
b85c071a79 Update the LPC1768 project to only copy across one heap_x.c file as the addition of heap_4.c without it being excluded from the project was breaking the build. 2013-02-13 12:03:13 +00:00
Richard Barry
a7eae6bed3 Added more files to the Rowley and IAR LM3S demos to test building the newer files and queue sets.
Made queue function prototypes consistent so xQueueHandle parameters are always xQueue, and xQUEUE * parameters pxQueue.
Likewise make the task API using px for pointers to TCBs, and just x for task handles.
Heap_x functions now automatically align the start of the heap without using the portDOUBLE union member.
Queue.c now includes queue.h.
2013-02-12 17:35:43 +00:00
Richard Barry
9b26071eb8 Adjusted the wrap checks in the QueueSet test task.
Added the QueueSet test to the Rowlay Stellaris and SAM4S-EK Studio demos.
Updated the MSVC demo to use heap_4.c.
2013-02-12 14:30:12 +00:00
Richard Barry
0262f4a6cd Reduce RAM used by trace by updating trcConfig.h. 2013-02-12 10:59:58 +00:00
Richard Barry
b671bf368a Improve QueueSet.c test coverage by reading the queue set from an ISR to force paths through the queue locking and unlocking.
Add the FreeRTOS+Trace recorder into the Win32 MSVC demo.
Added more functions, including the queue set functions, to the MPU port.
2013-02-12 10:09:36 +00:00
Richard Barry
26152204a4 Update the FreeRTOS+Trace recorder and Win32 demo app. 2013-02-10 19:33:28 +00:00
Richard Barry
96218c34a1 Fix a few compiler warnings when compiling the QueueSet.c test code with GCC. 2013-02-08 17:05:42 +00:00
Richard Barry
d328ae3bfc Add the queue set test to the SAM4S-EK Atmel Studio code. 2013-02-08 16:10:13 +00:00
Richard Barry
232a5b3433 Continue working on queue set implementation and testing. 2013-02-08 15:50:14 +00:00
Richard Barry
4e5090e061 Next revision of queue set implementation.
Make conditional compilation syntax and commenting consistent.
Add common demo tasks to demonstrate queue sets.
2013-02-07 15:10:25 +00:00
Richard Barry
b5b518571e remove the additional line added to the MPU port.c as the original code was correct. Instead remove the alignment assert by adding #define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
to the portmacor.h file.
2013-01-31 15:27:00 +00:00
Richard Barry
ac78adae4b Added INCLUDE_xSemaphoreGetMutexHolder() default.
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
2013-01-31 14:18:03 +00:00
Richard Barry
4e7b460eaf Replace the CLZ function with a CLZ intrinsic in the Cortex-R4 port layer.
Add EDS support in the PIC24 port layer.
Remove unnecessary EHB instructions from PIC32 port.
In the PIC32 port assembly code, replace the &= code with a single ins instruction.
2013-01-23 16:06:45 +00:00
Richard Barry
b5cf299df1 Make changes necessary to allow the latest StateViewer Eclipse plug-in obtain the run time stats information. 2012-12-31 11:09:14 +00:00
Richard Barry
2e24f1b789 Move the call that sets xTimeNow inside the loop that drains the timer queue to ensure higher priority tasks that pre-empt the timer daemon cannot post messages that appear to be in the future to the daemon task. 2012-11-18 09:13:39 +00:00
Richard Barry
0d421482d8 Default configUSE_TICKLESS_IDLE to 0 when it is not defined.
Move location of traceTASK_CREATE() macro call.
Remove obsolete handling of trmCOMMAND_PROCESS_TIMER_OVERFLOW as the command was never used in release versions.
2012-11-17 19:23:30 +00:00
Richard Barry
c4d078c29a Ensure #error messages in FreeRTOSConfig.h files are not commented out. 2012-10-31 13:46:17 +00:00
Richard Barry
96f93690ce Add warning suppression to IAR header. 2012-10-31 13:30:44 +00:00
Richard Barry
5512102f92 Slow configured clock in the RM48 and TMS570 demos to 50MHz. 2012-10-31 10:31:33 +00:00
Richard Barry
0023cb1f8e Make loop counters in flop_hercules.c 32-bit instead of 16-bit. 2012-10-30 14:56:21 +00:00
Richard Barry
01bca41038 Rename CORTEX_R4_RM48_CCS5 directory as it also includes the TMS570 code. 2012-10-29 16:18:20 +00:00
Richard Barry
2a47ddd1f5 Correct cut and paste error in partest.c file. 2012-10-29 16:17:05 +00:00
Richard Barry
ba686260ca Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source. 2012-10-29 15:56:26 +00:00
Richard Barry
5e7c99d2aa Allow IAR language extensions so __weak attribute can be used. 2012-10-29 13:57:07 +00:00
Richard Barry
9fe5156b53 Work around compiler bug in CCS5 by replacing the _call_swi() function with a #pragma SWI_ALIAS. 2012-10-29 11:38:19 +00:00
Richard Barry
7fa0d887e8 Complete RM4x and TMS570 demo. 2012-10-29 11:34:41 +00:00
Richard Barry
f5c52bdb1d Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used. 2012-10-22 16:40:45 +00:00
Richard Barry
f06a945444 Prepare for V7.3.0 release. 2012-10-16 12:17:47 +00:00
Richard Barry
f446f77fd4 Make the timer used for the PIC32 port layer user configurable. 2012-10-16 09:48:45 +00:00
Richard Barry
dbe0ae2bff Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
2012-10-16 07:56:55 +00:00
Richard Barry
e03ab659f3 Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
2012-10-16 07:55:40 +00:00
Richard Barry
6ec4c7cecb Set the RM48 directory structure to match the FreeRTOS convention. 2012-10-14 21:33:53 +00:00
Richard Barry
4410dd363e Update FreeRTOS version used in RM48 demo. 2012-10-14 21:11:01 +00:00
Richard Barry
9ff79da901 First pass at adding R4F floating point support. 2012-10-13 16:21:40 +00:00
Richard Barry
fe2163ede4 RM48 port layer without FPU saving completed. 2012-10-11 13:41:07 +00:00
Richard Barry
1112439c58 Get main_full.c working in the RM48 demo. 2012-10-10 13:40:36 +00:00
Richard Barry
05c17e7e6d Remove whitespace only. 2012-10-10 09:53:44 +00:00
Richard Barry
ecdca1311b RM48 simply blinky demo working. 2012-10-09 13:04:17 +00:00
Richard Barry
57fab18305 Added initial RM48 project files. These are not in the correct directory structure yet. 2012-10-04 19:47:41 +00:00
Richard Barry
c403e974ee Update PIC32 port to make use of configUSE_PORT_OPTIMISED_TASK_SELECTION.
Make small modification in GCC CM3 port when configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 to remove compiler warning.
2012-09-25 18:18:37 +00:00
Richard Barry
87f663a461 Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ). 2012-09-24 12:10:08 +00:00
Richard Barry
42a11edef8 Replace the need for taskCHECK_READY_LIST() by instead making vListRemove() return the number of items that remain in the list once the list item has been removed. 2012-09-24 12:05:35 +00:00
Richard Barry
18a4b00a18 Rename listLIST_ITEM_CONTAINED to listLIST_ITEM_CONTAINER. 2012-09-24 11:23:14 +00:00
Richard Barry
92f1699055 Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.
Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
2012-09-24 11:01:17 +00:00
Richard Barry
670d172cfc Introduced configUSE_PORT_OPTIMISED_TASK_SELECTION, and updated the MSVC simulator port as the first implementation. 2012-09-23 14:35:12 +00:00
Richard Barry
8ef7f03536 Add eTaskStateGet() to FreeRTOS-MPU. 2012-09-23 09:35:53 +00:00
Richard Barry
eb1f7bc166 Added eTaskStateGet().
Added default value for INCLUDE_eTaskStateGet.
2012-09-22 20:59:27 +00:00
Richard Barry
48a307ff5f Allow mutex type semaphores to be given from an interrupt (not a normal thing to do - use a binary semaphore!).
Allow FreeRTOS+CLI commands to have spaces at the end without it being taken as a parameter.
2012-09-05 14:02:16 +00:00
Richard Barry
c0de8c984c Improve command input string handling in FreeRTOS+CLI to allow allow commands to be sub-strings of each other, and not to count trailing white space as a parameter. 2012-08-31 13:10:20 +00:00
Richard Barry
bf12aba59d Add demo for SAM3S-EK2. 2012-08-29 15:02:56 +00:00
Richard Barry
340b2d7872 Save the SAM4S FreeRTOSConfig.h with the #error about running the CreateProjectDirectoryStructure.bat batch file in the correct state (uncommented). 2012-08-29 09:57:25 +00:00
Richard Barry
6396f6fe9f Add SAM3X-EK demo. 2012-08-15 20:38:50 +00:00
Richard Barry
0c7af1c2d3 Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR. 2012-08-14 13:04:22 +00:00
Richard Barry
e0bab5981a Prepare for V7.2.0 release. 2012-08-14 12:14:48 +00:00
Richard Barry
73ad4387e2 Remove the remnants of the legacy trace functionality (since replaced with FreeRTOS+Trace).
Replaced the #error that traps configMAX_SYSCALL_INTERRUPT_PRIORITY being set to 0 with a configASSERT() for GCC Cortex-M3/4 ports as the #error does not work if configMAX_SYSCALL_INTERRUPT_PRIORITY includes any casting.  Not a problem for other compilers as they cannot have casting anyway as that would break the assembly code.
2012-08-12 17:05:23 +00:00
Richard Barry
02acfd2723 Add warning in Cortex-M3 and Cortex-M4 FreeRTOSConfig.h header files that configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. 2012-08-12 16:49:43 +00:00
Richard Barry
7d937f04d7 Add CreateProjectDirectoryStructure.bat to the SAM4 demo. 2012-08-12 04:25:38 +00:00
Richard Barry
99a4783b55 Remove the files from the SAM4S demo that are copied using the CreateProjectDirectoryStructure.bat batch file. 2012-08-12 04:14:58 +00:00
Richard Barry
4dbef6afe9 Add readme files to the various FreeRTOS+ directories. 2012-08-11 22:57:53 +00:00
Richard Barry
f508a5f653 Add FreeRTOS-Plus directory. 2012-08-11 21:34:11 +00:00
Richard Barry
7bd5f21ad5 Start to re-arrange files to include FreeRTOS+ in main download. 2012-08-11 21:06:27 +00:00
Richard Barry
95db6bdce7 Remove test code from heap_4.c. 2012-08-11 20:59:14 +00:00
Richard Barry
054b018d0e Update MPS430X ports so the sleep mode bits are cleared on exit from the tick interrupt.
Update heap_4.c.
2012-08-11 20:57:11 +00:00
Richard Barry
59c9044de1 Add heap_4.c. 2012-08-10 18:45:45 +00:00
Richard Barry
2967657a85 Add vQueueDelete() to the MPU port.
Added volatile key word to the queue xRxLock and xTxLock members.
Ensure the portPRIVILEGED_BIT bit is set when the timer task is being created by the kernel - as it was for the idle task.  Necessary for MPU port.
2012-08-03 15:21:21 +00:00
Richard Barry
e1a83402d6 Renamed the CORTEX_M4_ATSAM4S_AVR_Studio directory to the correct CORTEX_M4_ATSAM4S_Atmel_Studio. 2012-07-08 15:58:54 +00:00
Richard Barry
271b22eccc Remove the unused linker reference to the maths library. 2012-07-08 15:52:01 +00:00
Richard Barry
02c347d45d Complete first release candidate for the SAM4S-EK demo. 2012-07-08 14:11:37 +00:00
Richard Barry
c8c7c80116 In the SAM4S demo, moved FreeRTOS into the ASF/thirdparty directory.
Changed some of the compiler warning configuration.
2012-07-05 09:41:37 +00:00
Richard Barry
d67b0311cb Change the name of the SAM4 FreeRTOS-Source directory to just FreeRTOS in preparation of moving it to the ASF/Thirdparty directory. 2012-07-05 08:35:36 +00:00
Richard Barry
932d8b318e Create project for SAM4S. This is building but has not yet been tested on hardware. 2012-07-03 13:49:34 +00:00
Richard Barry
db44ca0c56 Add in a couple of extra list macros for use with FreeRTOS+UDP.
Allow the ISR safe queue send and receive functions to set the higher priority task woken pointer to NULL.
2012-07-03 11:16:52 +00:00
Richard Barry
c8c4ab298c Add the macro xSemaphoreTakeFromISR().
Add #error strings if configMAX_SYSCALL_INTERRUPT_PRIORITY is set to 0.
Corrected the prototype of vApplicationStackOverflowHook().
Changed the dimensioning of the buffer declared in prvListTaskWithinSingleList() to make use of the configMAX_TASK_NAME_LEN setting.
2012-07-03 09:38:09 +00:00
Richard Barry
26dbc85c7c Added INCLUDE_xQueueGetMutexHolder macro.
Removed the "-rc1" that was accidentally left on the version number of some Win32 port files.
Changed the behaviour of xQueueGenericReset() so queues can be reset when tasks are blocked on them.
2012-05-17 08:22:27 +00:00
Richard Barry
38d09c99eb Prepare for FreeRTOS V7.1.1 tag. 2012-05-08 17:35:44 +00:00
Richard Barry
ac66c45eb4 Prepare for FreeRTOS V7.1.1 tag. 2012-05-08 16:50:26 +00:00
Richard Barry
9f0069690c Prepare for FreeRTOS V7.1.1 tag. 2012-05-08 16:36:52 +00:00
Richard Barry
c5c064b74e Update the RX63N RDK project to use the correct PHY ID. 2012-05-01 12:28:06 +00:00
Richard Barry
bbbdd9c393 Change the Win32 port layer so it doesn't use the traceTASK_DELETE macro, but instead the new portCLEAN_UP_TCB macro. 2012-04-24 13:09:22 +00:00
Richard Barry
8baa0ac171 Update the RX63N RDK demo to use the latest (at the time of writing) Renesas RDK BSP.
Ethernet is still not included.
The configuration is still set for the ES chip.
2012-04-24 12:45:01 +00:00
Richard Barry
84ddb2abd6 Update the RX63N RSK demo to use the latest (at the time of writing) Renesas RSK BSP.
Ethernet is still not included.
The configuration is still set for the ES chip.
2012-04-24 10:00:06 +00:00
Richard Barry
1bd702777d Remove older Renesas BSP files from the RX63N RSK demo in preparation to add in the latest BSP files. 2012-04-23 13:39:14 +00:00
Richard Barry
88bff5d198 RX63N RDK Debug build configuration now building, but not yet tested. 2012-04-18 10:34:05 +00:00
Richard Barry
2f199771d5 Backup point only. YRDK RX63N building but not linking. 2012-04-18 09:40:10 +00:00
Richard Barry
aa85a68636 Update the Renesas provided BSP files in the RDK RX63N project. 2012-04-18 09:08:56 +00:00
Richard Barry
3bc093f562 Starting point for YRDK RX63N demo. 2012-04-18 08:40:34 +00:00
Richard Barry
0cf8643863 Update the TCP/IP update period from 500ms to the expected 50ms. 2012-04-18 08:16:15 +00:00
Richard Barry
d8d68e917c Set the last return address at the bottom of the stack to 0 in the RX600 ports to prevent E2Studio from attempting to dereference the 0xdeadbeef pointer. 2012-04-16 18:33:32 +00:00
Richard Barry
63369b2a97 Change the stack alignment when a task first starts in the CM4F GCC, Tasking and Keil ports. 2012-04-16 18:23:32 +00:00
Richard Barry
68289d136f Remove unused .txt file from the XMC4500 uVision project. 2012-04-16 18:21:11 +00:00
Richard Barry
7a0996f246 Removed unused function from IAR CM4F port.c.
Modified the stack alignment when a task first starts in the IAR CM4F port.
2012-04-16 17:04:42 +00:00
Richard Barry
6360632cca Added the FreeRTOS/WorkingCopy/Demo/CORTEX_M4F_Infineon_XMC4500_IAR/settings directory to ensure the files open up in the IDE in the correct place when the project is first opened. 2012-04-16 17:02:21 +00:00
Richard Barry
eff1636a94 Starting point for XMC4500 IAR demo application. 2012-04-15 21:04:53 +00:00
Richard Barry
4793063ee0 Add #error statements in FreeRTOSConfig.h header files where the CreateProjectDirectoryStructure.bat should be executed prior to the first build.
Added the CreateProjectDirectoryStructure.bat file for the XMC4500 Tasking demo.
2012-04-06 20:20:35 +00:00
Richard Barry
dfa0c20530 Copy Tasking CM4F files from the project directory into their correct location in the FreeRTOS/Source directory. 2012-04-06 20:05:43 +00:00
Richard Barry
248abca109 Update include paths to be workspace relative.
Minimise the amount of heap space allocated.
Reduce the main() stack from 4K to 2K.
2012-04-06 20:02:44 +00:00
Richard Barry
a3b4008eae Created and tested optimised build configuration for the XMC4500 demo. 2012-04-06 19:47:30 +00:00
Richard Barry
6aa07ed919 Tasking XMC4500 demo now running. 2012-04-06 18:33:50 +00:00
Richard Barry
f9a9535ee9 Turn on long branch veneer generation in Tasking XMC4500 project - not sure why it is needed. 2012-04-06 17:45:24 +00:00
Richard Barry
1ccb58d56d Starting point for Tasking XMC4500 demo. Compiling only, not executed yet. 2012-04-06 16:36:52 +00:00
Richard Barry
1312fada7c Added traceMOVED_TASK_TO_READY_STATE and portSETUP_TCB macros.
Changed uxTCBNumber back to uxTaskNumber in tasks.c to fix IAR plug-in.
2012-04-02 20:06:52 +00:00
Richard Barry
c0339c2c86 Checking current RX62N Renesas project which now links with the latest Renesas compiler. 2012-04-02 18:40:56 +00:00
Richard Barry
83d5097ed2 Update the CM3 MPU port so it builds with the changes made to enable the FreeRTOS+Trace tool. 2012-04-02 18:33:46 +00:00
Richard Barry
892d28f2c4 Check in current RX63N session file. 2012-04-02 18:31:13 +00:00
Richard Barry
06d47d4012 Checking current RX600 Renesas project which now links with the latest Renesas compiler. 2012-04-02 18:30:26 +00:00
Richard Barry
82fb90c416 Update Rowley LPC2368 project to remove the multiple defined symbol warnings. 2012-04-02 17:38:58 +00:00
Richard Barry
020ddcbd90 Update Rowley STM32F107 project to remove multiple defined symbol warning. 2012-04-02 17:36:42 +00:00
Richard Barry
73287e108b Update MPU projects to build with V7.1.0 - NOTE - these now build but do not necessarily execute correct from the Rowley IDE. 2012-04-02 17:35:03 +00:00
Richard Barry
7b340a1f9c Update Rowley LPC1768 project to remove the multiple defined symbol warning. 2012-04-02 17:33:04 +00:00
Richard Barry
ea5027da67 Rename Demo/MPS430X_MSP430F5438_CCS4 Demo/MPS430X_MSP430F5438_CCS. 2012-04-02 09:40:00 +00:00
Richard Barry
4d1e3042dd Rename the Source/Portable/CCS4 directory to Source/Portable/CCS. 2012-04-02 09:37:17 +00:00
Richard Barry
2a9b42cbc3 Remove the Demo/Common/Utils directory as the CLI code is currently provided separately. 2012-04-02 09:24:11 +00:00
Richard Barry
bb708957a9 Test the CCS4 demo project to CCS5 and make a minor change to ensure the power supplied is adequate for the CPU speed. 2012-04-02 09:20:45 +00:00
Richard Barry
ab1aa67b08 Remove compiler warning in CCS MSP430X port. 2012-04-01 18:24:08 +00:00
Richard Barry
3b4771e1a9 Update MSP430X IAR port to ensure the power settings are correct for the clock speed. 2012-04-01 17:54:07 +00:00
Richard Barry
f16af5d27e Correct #endif statement in new flash_tiemr.h header file. 2012-03-17 17:22:52 +00:00
Richard Barry
c80818c7d8 Update version number in a couple of files in the RX63N/Renesas demo. 2012-03-17 17:21:49 +00:00
Richard Barry
3fa8beb176 Baseline the RX63N/Renesas demo - the Ethernet part of the demo is currently commented out as the Ethernet port is not configured using the RX63N register set. 2012-03-17 17:18:27 +00:00
Richard Barry
e69bce06de Add the sp_flop standard demo tasks to the RX63N RSK demo. 2012-03-17 15:11:13 +00:00
Richard Barry
eb38217496 Update demos to use timers for the check functionality, and the flash timers. Floating point and Ethernet is not yet included. 2012-03-17 15:02:32 +00:00
Richard Barry
785621ff22 Add the flash_timer standard demo timers (rather than tasks). These behave as the flash tasks, but use timers in place of tasks. 2012-03-17 14:59:46 +00:00
Richard Barry
05bc21e115 Update RX63N start-up to configure the high speed clock prior to initialising the C run time library. 2012-03-15 16:58:31 +00:00
Richard Barry
a3c45eb1da Starting point for RX63N demo added. 2012-03-15 15:56:05 +00:00
Richard Barry
9e926a4459 Update the Rx/Renesas projects to include an extra linker section "L" required by the latest compilers. 2012-03-12 15:29:56 +00:00
Richard Barry
5267ac07a4 Modified header comments only. 2012-03-12 14:37:27 +00:00
Richard Barry
14f2b70797 Convert mov instructions to movs instructions in the GCC Cortex-M0 demo.
Update GCC Cortex-M0 CMSISv2p00_LPC11xx/inc/LPC11xx.h.
2012-03-11 21:31:23 +00:00
Richard Barry
b86d821bc1 Convert mov instructions to movs instructions in the GCC Cortex-M0 port. 2012-03-11 21:28:06 +00:00
Richard Barry
7fa9bf25dc Fix issue in linker script generated by TrueStudio for STM32F0. 2012-03-11 20:22:18 +00:00
Richard Barry
b8be5d1db2 Arrange windows in the XMC4000/Keil demo so they appear neatly when the project is first opened. 2012-03-11 20:21:22 +00:00
Richard Barry
2c7ec3957d Correct linker script for ARM7_AT91SAM7X256_Eclipse demo. 2012-03-11 20:18:07 +00:00
Richard Barry
4c8e9edc8d Add static qualifier to the function that starts the first task in GCC/ARM_CM3/port.c.
Added a _nop() after the _disable_interrupt() in CCS4/MSP430X/portmacro.h.
Added a NOP() after the disabling of interrupts in IAR/MSP430X/portmacro.h.
2012-03-11 20:14:50 +00:00
Richard Barry
1478402899 Update IAR MSP430X project to latest IAR version. 2012-03-11 15:50:19 +00:00
Richard Barry
2658a3b6ef Added xSemaphoreGetMutexHolder() macro and equivalent function. 2012-03-11 15:23:51 +00:00
Richard Barry
6dc8b56cb6 Add batch file that creates the directory structure required by the XMC4500 GCC port. 2012-03-11 14:26:01 +00:00
Richard Barry
9718fbdcd4 Add GCC Cortex-M4F port layer. 2012-03-11 14:09:22 +00:00
Richard Barry
b22ee3c997 Add GCC project for Infineon XMC4500 Hexagon kit CPU board. 2012-03-11 14:07:48 +00:00
Richard Barry
c86abdb67c Arrange the windows in the Keil XMC4500 demo to be positioned correctly when first opened. 2012-03-05 15:23:43 +00:00
Richard Barry
2e07d3d665 Update comments in STM32F0 demo.
Update the Keil XMC4500 demo so there are simple blinky and comprehensive demo options.
2012-03-05 15:22:00 +00:00
Richard Barry
c77dab2c35 Update a comment only. 2012-03-04 20:59:23 +00:00
Richard Barry
45feba47c9 Add STM32F0 demo. 2012-03-04 15:11:54 +00:00
Richard Barry
a5b65b0066 Added IAR port layer for the Cortex-M0. 2012-02-24 12:05:01 +00:00
Richard Barry
0f7f97f3a3 Change FreeRTOSConfig.h for the LPCXpresso CM0 demo as there seem to be two forms of the CMSIS names. 2012-01-25 09:23:55 +00:00
Richard Barry
b3a894ca72 Revert the CM0 port layer exception handler names to the traditional FreeRTOS names as there seem to be two forms of the CMSIS names. 2012-01-25 09:19:58 +00:00
Richard Barry
ec18d06ab1 Remove the ( void ) prvSetupNestedFPUInterruptsTest; line from the LPC4300 M4 main.c file. It should not have been there. 2012-01-23 17:08:37 +00:00
Richard Barry
c820c390c4 Add XMC4500 project. 2012-01-23 12:02:57 +00:00
Richard Barry
f10b6ffdc5 Update comments in main-full.c of CM0 demo. 2012-01-22 21:26:47 +00:00
Richard Barry
ebc8ddd7da Remove duplicate definition of "#define vPortSVCHandler SVC_Handler" from FreeRTOSConfig.h included in CORTEX_STM32F100_Atollic demo. 2012-01-22 10:01:52 +00:00
Richard Barry
b4b4f306c2 In files added a few moments ago:
+ Correct version number in comments at top of file.
+ Correct path in batch file.
2012-01-21 19:01:04 +00:00
Richard Barry
7427c0eff2 Move the CM0 files to their correct location and remove from their temporary demo project home. 2012-01-21 18:46:08 +00:00
Richard Barry
de570548f0 Added batch file to create LPC11xx demo. Tidied up the M0 port layer files.
This is a baseline taken before moving the M0 port files to their proper location.
2012-01-21 18:38:21 +00:00
Richard Barry
7298ffd3f2 Correct one of the descriptions in the MicroBlaze FreeRTOS BSP mld file. 2012-01-21 16:42:03 +00:00
Richard Barry
71f36b8545 Tighten up IntQueue.c testing to have a count of the number of interrupts that post to the queue included in the error checks. 2012-01-21 16:39:14 +00:00
Richard Barry
f8d15bfaf5 Complete LPC11xx demo functionality. The batch file to copy the code over is not written yet. 2012-01-21 15:23:40 +00:00
Richard Barry
b0a6d939f4 Replace "Infinite loop" comment in main() with something sensible. 2012-01-19 22:17:10 +00:00
Richard Barry
8be818e771 Replace "Infinite loop" comment in main() with something sensible. 2012-01-19 22:16:13 +00:00
Richard Barry
e8c5f36b00 IntQ test in and working. Nesting depth not yet checked. Other tasks commented out of main(). 2012-01-17 10:34:00 +00:00
Richard Barry
29c9a63c41 Add a few lines to the RX ports that allow the vector to be installed when the FreeRTOS code is built as a library. 2012-01-13 16:41:42 +00:00
Richard Barry
3d48d67c14 LPC1114 demo added. Kernel source will be moved. 2012-01-12 15:02:01 +00:00
Richard Barry
637045468b Add xQueueReset() function. 2012-01-12 09:32:35 +00:00
Richard Barry
e3276fc282 Change version numbers to V7.1.0. 2011-12-13 16:24:24 +00:00
Richard Barry
8f3b797d29 Remove the incomplete MicroBlaze with full ethernet and tracecon facility ready for V7.1.0 update. 2011-12-13 15:41:55 +00:00
Richard Barry
1ec172e0e0 Add vQueueSetQueueNumber() and ucQueueGetQueueNumber() API functions. 2011-12-13 11:39:58 +00:00
Richard Barry
07c326fad3 Add a few extra standard demo tasks to the Win32 demo.
Make use of the new trace specific function calls from the Win32 demo - just to check the function as expected.
2011-12-13 11:38:58 +00:00
Richard Barry
cc06119b86 The LPC43xx fast start files are now included. 2011-12-13 11:36:38 +00:00
Richard Barry
a0eb27a69e Added fast book files to project - although fast boot is not integrated yet. 2011-12-13 09:22:57 +00:00
Richard Barry
e0a4cbab6f Changes necessary in the Win32/lwiP project to use the updated command console files. 2011-12-11 10:23:01 +00:00
Richard Barry
000b4ba783 Remove all printf() statements from Kinetis demo as they prevent the code running when the debugger is not attached. 2011-12-08 13:16:34 +00:00
Richard Barry
7db04b1820 Add two Cortex-M4F port layers. 2011-12-08 10:49:21 +00:00
Richard Barry
08ddd1d00d Add two Cortex-M4F demo applications. 2011-12-08 10:48:36 +00:00
Richard Barry
e7a1222c5f Command interpreter code updated to pass the command string into command hander functions. 2011-12-08 10:46:16 +00:00
Richard Barry
255dd683d2 Correct comment about mainCREATE_SIMPLE_LED_FLASHER_DEMO_ONLY setting in TriCore main.c. 2011-12-05 17:00:14 +00:00
Richard Barry
93e72e5036 Correct the prototype of the function call vApplicationStackOverflowHook(). 2011-12-02 19:13:33 +00:00
Richard Barry
c92a2fe47e Add proper copyright notice in headers to files where is was mistakenly missing. 2011-12-02 08:05:14 +00:00
Richard Barry
94818b58e4 Add in a separate uxTaskNumber to the TCB structure for use by trace tools, leaving the uxTCBNumber for use by the state viewers. 2011-11-30 09:53:11 +00:00
Richard Barry
4d8e364c62 Add #define constant required to access the queue name get function. 2011-11-29 19:06:39 +00:00
Richard Barry
9b11b0c601 Remove the direct call to xQueueCreateMutex() and replace it with the xSemaphoreCreateMutex() macro. The result is the same, but the xQueue equivalent should not be used directly outside of the core files. 2011-11-29 19:05:21 +00:00
Richard Barry
7daebd9275 Update core files to remove legacy trace and make necessary modifications to facilitate use with other trace tools. 2011-11-29 19:02:58 +00:00
Richard Barry
022bc78961 Remove variable from the UDE perspective expressions window (TriCore demo project). 2011-11-24 11:54:42 +00:00
Richard Barry
7b23ebf63c Update TriCore model files so the .data section is initialised during startup. 2011-11-24 11:27:14 +00:00
Richard Barry
abb476db24 Formatting changes only in TriCore porttrap.c. 2011-11-22 13:35:26 +00:00
Richard Barry
63cab86cc7 Remove debug code from the TriCore port.c file. 2011-11-22 13:27:17 +00:00
Richard Barry
3780e672a8 Commit changes to the TriCore demo UDE project. 2011-11-22 13:25:18 +00:00
Richard Barry
eb8f02358e Fix compiler warning in timers.c/h that are only seen when the file is compiled on 8 bit devices.
Update example source code in timers.h so the parameter names match those in timers.c.
Fix "known issue" bug in xTaskResumeFromISR() (which was missing a critical section).
2011-11-22 13:24:32 +00:00
Richard Barry
562eedc434 All for the TriCore demo:
+ Comment serial.c
+ Improve the interaction between InterruptNetTest.c and main.c so both too short and too long periods are trapped.
+ Remove debug code from FreeRTOSConfig.h.
2011-11-22 13:21:37 +00:00
Richard Barry
5832e409d1 Fix compiler warning in TimerDemo.c that is only seen when the file is compiled on 8 bit devices. 2011-11-22 13:18:54 +00:00
Richard Barry
de4a548c07 Configure release configuration for the Win32 lwIP project. 2011-11-19 22:27:28 +00:00
Richard Barry
9d4616eb55 Wind up the baud rate on the TriCore UART to obtain an extra level of interrupt nesting.
Set the UART into loopback mode so a jumper is not required.
2011-11-18 11:25:19 +00:00
Richard Barry
b89f1a729a Latest TriCore port files - these still contain some debug code, and are not yet fully documented. 2011-11-17 11:16:21 +00:00
Richard Barry
93c4c48f78 Latest TriCore demo files - these still contain some debug code, and are not yet fully documented. 2011-11-17 11:11:15 +00:00
Richard Barry
b8c1195c40 Added: /* This is called from the context switch, so will be called from a
critical section.  xTaskGetTickCountFromISR() contains its own critical
	section, and the ISR safe critical sections are not designed to nest,
	so reset the critical section. */
	portSET_INTERRUPT_MASK_FROM_ISR();

in main.c.
2011-11-13 21:13:26 +00:00
Richard Barry
188128f788 Added the portALIGNMENT_ASSERT_pxCurrentTCB macro.
Updated the TriCore port layer so its compare match setup does not effect any other compare match bits.
2011-10-28 11:50:00 +00:00
Richard Barry
f354d6599e Add in interrupt nesting test - not yet complete. 2011-10-28 11:46:15 +00:00
Richard Barry
8d748af95c Updated TriCore demo application. 2011-10-27 10:45:27 +00:00
Richard Barry
41ef155824 Update TriCore GCC port layer. 2011-10-27 10:44:31 +00:00
Richard Barry
7f8a5ae148 Add timer demo to TriCore port. Add mainCREATE_SIMPLE_LED_FLASHER_DEMO_ONLY into main.c. Finish commenting main.c. 2011-10-25 11:16:59 +00:00
Richard Barry
0997b286bc Add the death.c standard demo files to the TriCode demo. 2011-10-24 12:32:00 +00:00
Richard Barry
70cfbda2e8 Minor changes to the TriCore port made during test/validation. 2011-10-24 12:30:35 +00:00
Richard Barry
dd10b91fc4 TriCore demo: Add comments and modify the reg test tasks to give a better change of error detection. 2011-10-20 10:08:19 +00:00
Richard Barry
45fe448d73 First commit with TriCore port and demo - still a work in progress. 2011-10-17 13:17:58 +00:00
Richard Barry
75dc89826f First commit with TriCore port and demo - still a work in progress. 2011-10-17 13:17:14 +00:00
Richard Barry
0025e1ed9d Remove needs-lock SVN parameter from files in the CORTEX-LM3Sxxxx_IAR_KEIL directory. 2011-10-10 12:10:33 +00:00
Richard Barry
3f3e6ba246 Update RX630 to add in some timer demo code, and remove all mention of Ethernet.
Minor comment corrections in the RX200 demo.
2011-10-07 09:58:16 +00:00
Richard Barry
56eb9ebec3 Create RX630/Renesas project. 2011-10-07 08:30:23 +00:00
Richard Barry
317dc7ffd4 Change version numbers of files that are in SVN, but not included in the release yet. 2011-09-30 10:52:03 +00:00
Richard Barry
3eb4966af3 Add missing header file to the Windows lwIP demo project. 2011-09-30 10:32:50 +00:00
Richard Barry
9c25614cf4 Add an assert in the Win32 lwIP port layer to catch invalid adapter numbers being used. 2011-09-26 14:47:08 +00:00
Richard Barry
0e7c46fbd3 Update the version numbers in the demos that were not released in V7.0.2 to be V7.0.2. 2011-09-26 14:46:18 +00:00
Richard Barry
42fa20daec Add an optional global buffer to the command interpreter that can be used for command interpreter output. This removes the need for multiple output buffers to be allocated when more than one command interpreter is implemented. 2011-09-26 14:27:03 +00:00
Richard Barry
cc61126025 Update headers for the FreeRTOS V7.0.2 release. 2011-09-20 18:22:39 +00:00
Richard Barry
6031a62f72 Second phase of renaming RegisterTestTasks.s to RegisterTestTasks.S. 2011-09-20 16:52:17 +00:00
Richard Barry
d4476b0746 First phase of renaming RegisterTestTasks.s to RegisterTestTasks.S. 2011-09-20 16:51:28 +00:00
Richard Barry
35f7dba909 Update Win32 lwipopts.h for better efficiency. 2011-09-20 13:38:45 +00:00
Richard Barry
2cd1a46001 Minor changes to prepare the RX210 demo for release. 2011-09-20 13:37:35 +00:00
Richard Barry
9f72fe22d5 Remove disabling of nagle algorithm as the updated lwipopts.h in the MicroBlaze port makes it unnecessary. 2011-09-20 13:35:56 +00:00
Richard Barry
d150ed9baf Update Microblaze Ethernet Lite lwipopts.h for better efficiency. 2011-09-20 13:34:49 +00:00
Richard Barry
d28bd0ff46 Complete RX200 demo. 2011-09-18 15:45:52 +00:00
Richard Barry
83f0af8764 Lots of work on the RX200 demo. Blinky and Full/Debug build configurations are now tested, after adding the BussonAndLCD.c/h files. Full/Optimised is yet to be built or tested. 2011-09-17 16:41:46 +00:00
Richard Barry
025abf6f6a Moved some files into the include folder that were previously in the root. 2011-09-16 14:49:18 +00:00
Richard Barry
47455d6d1b Moved some files into the Renesas-Files folder that were previously in the root. 2011-09-16 14:47:36 +00:00
Richard Barry
93940b4717 Continue work on RX200 demo. Still a work in progress. 2011-09-16 14:38:36 +00:00
Richard Barry
5441cb959b Update demo projects for RX210, not yet complete, and not yet actually built. 2011-09-16 08:48:59 +00:00
Richard Barry
4883a72844 Update RL78 EWRL78 project settings so they can be used with the KickStart version of the IAR tools. 2011-09-13 15:12:56 +00:00
Richard Barry
2ae99f32f6 Delete the BasicSocketCommandServer task if the task exits, which can happen if the listening socket cannot be created. 2011-09-12 21:15:09 +00:00
Richard Barry
0d3d91fc51 Update sys_arch.c for Xilinx Ethernet Lite IP. 2011-09-12 21:13:25 +00:00
Richard Barry
03e2338deb Add warnings about mixing untested memory models in the RL78 port. 2011-09-09 20:37:50 +00:00
Richard Barry
d500594b8a Tidy up the RL78 port layer. 2011-09-09 18:52:30 +00:00
Richard Barry
1fe7f40fad Read the RL78 demo for release. 2011-09-09 18:51:09 +00:00
Richard Barry
573497fbe0 Tidy up the RL78 port layer. 2011-09-09 16:18:57 +00:00
Richard Barry
476a87dfdc Ready the RL78 port for release. 2011-09-09 12:37:07 +00:00
Richard Barry
e38ff18256 Read the RL78 demo for release. 2011-09-09 12:36:32 +00:00
Richard Barry
80341af3f5 Complete the RL78 demo. main.c still requires documentation in the comments at the top of the file. 2011-09-09 10:10:01 +00:00
Richard Barry
6ac7b7a9da Complete the RL78 demo. main.c still requires documentation in the comments at the top of the file. 2011-09-09 10:09:10 +00:00
Richard Barry
5e583219d6 Some updates to the fledgling RL78 demo application. Not yet complete. 2011-09-06 16:11:48 +00:00
Richard Barry
9290e3e71f Add use of portPOINTER_SIZE_TYPE to tasks.c to facilitate the removal of warnings when the pointer size is less than 32 bits. 2011-09-06 16:10:30 +00:00
Richard Barry
272cd59c26 Add use of portPOINTER_SIZE_TYPE to tasks.c to facilitate the removal of warnings when the pointer size is less than 32 bits. 2011-09-06 16:09:48 +00:00
Richard Barry
de3807389a Add RL78 port layer. Note yet complete. 2011-09-06 16:08:38 +00:00
Richard Barry
4ec258f31c Add an RX210 demo project. 2011-09-02 19:58:18 +00:00
Richard Barry
5182e65d0d Remove .dep file that should have have been included in the repository. 2011-09-02 18:48:12 +00:00
Richard Barry
11cd605be7 Added RX200 port layer. 2011-09-02 18:31:56 +00:00
Richard Barry
1abff5d5cd Start an RL78 demo project. 2011-09-02 10:49:16 +00:00
Richard Barry
e256bca3f9 MB9A314 Keil projects are now all fully functional. 2011-08-31 13:54:06 +00:00
Richard Barry
99c1322650 Keil MB9A310 project is now building, but not yet tested. 2011-08-31 10:38:44 +00:00
Richard Barry
9bfeb26579 Change Keil startup code to correct FM3 device. 2011-08-31 09:59:25 +00:00
Richard Barry
bcbd6c8a7d Added demo for the MB9A314 - the IAR project is working, the Keil one is not set up for the correct chip yet. 2011-08-30 20:32:41 +00:00
Richard Barry
9c92745440 Hardware and software for the MicroBlaze project that uses the full Ethernet IP is now building - but the MAC driver has not yet been written. 2011-08-28 18:38:32 +00:00
Richard Barry
d14eb96aeb Remove platform studio project as it is about to be replaced. 2011-08-28 16:41:01 +00:00
Richard Barry
1baa62e424 Remove redundant bit being set in the status register of the PIC32. 2011-08-28 13:07:54 +00:00
Richard Barry
3a4d907c64 Modify the stack set up when ARM7/9 tasks are created to ensure the assert() calls in xTaskCreate() don't fail. In this case, the assert that would fail is actually redundant anyway, but should not be removed as it might not be redundant in all ports. 2011-08-28 13:06:11 +00:00
Richard Barry
98860dee6a Remove obsolete comment. 2011-08-27 19:12:45 +00:00
Richard Barry
a7f8a586f4 First version of the MicroBlaze demo with the full Ethernet IP. The Ethernet driver is not yet written. 2011-08-27 14:34:12 +00:00
Richard Barry
3104a7cf38 Remove directory that is not required. 2011-08-27 14:30:48 +00:00
Richard Barry
d6aba020b0 Remove some large files from the repository that don't need to be there. 2011-08-27 14:23:59 +00:00
Richard Barry
731a01f8f4 Remove some large files from the repository that don't need to be there. 2011-08-27 14:22:36 +00:00
Richard Barry
678396f61b 2011-08-27 14:20:58 +00:00
Richard Barry
df4feccb98 Rename the projects used in the Ethernet Lite MicroBlaze demo. 2011-08-27 13:44:31 +00:00
Richard Barry
c87a82bb7b Rename the directories used in the Ethernet Lite MicroBlaze demo. 2011-08-27 13:30:01 +00:00
Richard Barry
a16be7fb4e Update platform studio project for MicroBlaze with full Ethernet. 2011-08-27 11:55:55 +00:00
Richard Barry
dbb0c1d13a First MicroBlaze hardware build with full Ethernet. 2011-08-27 06:45:09 +00:00
Richard Barry
f4ae3c75bb Rename MicroBlaze project that uses the full Ethernet IP. 2011-08-26 17:49:13 +00:00
Richard Barry
ea4f399a88 Remove MicroBlaze with full Ethernet project, so it can be generated again. 2011-08-26 17:42:54 +00:00
Richard Barry
856b801d33 Remove MicroBlaze with full Ethernet project, so it can be generated again. 2011-08-26 17:40:50 +00:00
Richard Barry
940b9ce27e Remove MicroBlaze with full Ethernet project, so it can be generated again. 2011-08-26 17:40:25 +00:00
Richard Barry
471ddd3c39 Mark original MicroBlaze project as deprecated. 2011-08-26 16:46:54 +00:00
Richard Barry
ae4a38f5d8 Remove unused variable warning. 2011-08-26 16:44:02 +00:00
Richard Barry
e1c944ec65 Correct task names in BlockQ.c. 2011-08-26 16:43:16 +00:00
Richard Barry
d681d02acf Update the number of PCB buffers. 2011-08-26 15:40:45 +00:00
Richard Barry
6a561bb2e7 Add queue registry usage to the MicroBlaze demo so it can be used with the state viewer plug in. 2011-08-26 12:37:54 +00:00
Richard Barry
542a01f8bc Minor corrections in the comments punctuation. 2011-08-26 12:36:05 +00:00
Richard Barry
39f8526265 Changed the MicroBlaze demo back to using heap_3.c having updated the linker script generation. 2011-08-24 12:38:38 +00:00
Richard Barry
08d7c89175 Changed the MicroBlaze demo back to using heap_3.c having updated the linker script generation. 2011-08-24 11:59:06 +00:00
Richard Barry
c056029422 Added BSP generation files to MicroBlaze directory. 2011-08-24 11:08:01 +00:00
Richard Barry
0dc4153997 Update the MicroBlaze CreateProjectDirectoryStructure.bat file to also copy files into the BSP directory, and to use path variables for the relative paths. 2011-08-24 10:42:27 +00:00
Richard Barry
667b722bde Update the names of some of the newly introduced API functions so they are more consistent with the names of pre-existing API functions. 2011-08-07 10:37:24 +00:00
Richard Barry
40ce7c8b52 Update the real copy of the Ethernet driver for the MicroBlaze EmacLite IP. 2011-08-07 10:28:13 +00:00
Richard Barry
a6ce07a130 Commit existing xps project for the new MicroBlaze demo. 2011-08-07 10:25:24 +00:00
Richard Barry
3a25b5f33b Update the names of some of the newly introduced API functions so they are more consistent with the names of pre-existing API functions. 2011-08-07 10:22:57 +00:00
Richard Barry
28629a7ea6 Update the names of some of the newly introduced API functions so they are more consistent with the names of pre-existing API functions. 2011-08-07 10:22:20 +00:00
Richard Barry
405a2ca22c Add run time stats gathering to the MicroBlaze demo. 2011-08-07 10:08:04 +00:00
Richard Barry
1b762ec32d Update the pages served by the MicroBlaze web server. 2011-08-07 10:06:34 +00:00
Richard Barry
0d691b2095 Minor tidy up of the lwIP_Apps file and configuration in the new MicroBlaze demo. 2011-08-06 11:11:22 +00:00
Richard Barry
153a9f8ddb Add printf-stdarg.c to the new MicroBlaze demo. 2011-08-06 11:10:17 +00:00
Richard Barry
8c6dba2726 Add in necessary functionality to autonegotiate using the EthernetLite interface to the PHY. 2011-08-06 08:28:25 +00:00
Richard Barry
ff8a7626d0 Change command interpreter semantics. 2011-08-03 09:36:12 +00:00
Richard Barry
49f726cf25 Change command interpreter semantics. 2011-08-03 09:35:21 +00:00
Richard Barry
59fbe1da22 Fix a few compiler warnings in utils when compiled with GCC. 2011-08-02 09:45:12 +00:00
Richard Barry
815bde09b9 Comment the command line interpreter and lwIP sockets based server code. 2011-08-01 16:06:06 +00:00
Richard Barry
5ca1d4194d Comment the command line interpreter and lwIP sockets based server code. 2011-08-01 16:03:49 +00:00
Richard Barry
723bed71bf Move the MSVC/lwIP code into the main line - not yet tested since moved. 2011-08-01 10:58:22 +00:00
Richard Barry
d53ed61cab Move the MSVC/lwIP code into the main line. 2011-08-01 08:57:11 +00:00
Richard Barry
1aa52c2a7a Update a few util functions in the common demo area. 2011-08-01 08:34:05 +00:00
Richard Barry
a548ef34f8 Remove vTaskCleanUpResources() calls. 2011-08-01 08:07:44 +00:00
Richard Barry
31dc786620 A few updates for coding standard reasons. 2011-08-01 08:05:37 +00:00
Richard Barry
254b61871e A few updates for coding standard reasons. 2011-08-01 08:00:17 +00:00
Richard Barry
5063200c86 Remove vTaskCleanUpResources() from core header files. 2011-08-01 07:48:56 +00:00
Richard Barry
6cc59de148 Remove files that are not required from the MicroBlaze demo project directories. 2011-07-27 19:18:45 +00:00
Richard Barry
be7f88c78f Remove files that are not required from the MicroBlaze demo project directories. 2011-07-27 19:17:37 +00:00
Richard Barry
0d56e9a4a5 Delete directories that were added to the repository by mistake (those containing binaries) - woops. 2011-07-27 19:11:29 +00:00
Richard Barry
e9e8365c8f Create project directory structure for the MicroBlaze demo project that uses the full Ethernet IP (rather than the Ethernet Lite IP). 2011-07-27 19:09:17 +00:00
Richard Barry
74eedea5db Check in the MicroBlaze projects before copying them to create the version that uses the full Ethernet. 2011-07-27 16:54:57 +00:00
Richard Barry
f69b2efa66 Delete unused header file in the MicroBlaze Ethernet Lite port directory. 2011-07-27 16:53:32 +00:00
Richard Barry
2981d9f5c1 2011-07-27 16:52:32 +00:00
Richard Barry
eb69ddce43 Fix compiler warning in sockets.c of lwip-1.4.0. 2011-07-27 16:51:11 +00:00
Richard Barry
6e81135a0d Add comtest_strings.c and comtest_strings.h to the proper Demo/Common/Minimal directory. 2011-07-27 16:39:59 +00:00
Richard Barry
6e2aeed966 Remove all workspace local copies of files that should be copied across using the CreateProejctDirectoryStructure.bat batch file. 2011-07-27 16:19:52 +00:00
Richard Barry
42aed81857 Add test/demonstration calls to xTaskGetIdleTaskHandle(), xTimerGetTimerTaskHandle, pcTaskGetTaskName() and vQueueDelete() functions to the Win32 demo project. 2011-07-27 14:16:24 +00:00
Richard Barry
6fa8cd4302 Add in the vSemaphoreDelete() macro. 2011-07-27 14:12:35 +00:00
Richard Barry
fc99c14905 Add in the pcTaskGetTaskName(), xTaskGetIdleTaskHandle() and xTimerGetTimerTaskHandle() API functions. 2011-07-27 14:02:37 +00:00
Richard Barry
a2a309c263 Update the batch file that copies the MicroBlaze code to use the MicroBlaze8 directory in place of the standard MicroBlaze directory in the FreeRTOS Source directory tree. 2011-07-27 13:05:23 +00:00
Richard Barry
4154b31454 Move new MicroBlaze V8 port from the project directory into its correct location in the directory structure. 2011-07-27 13:03:14 +00:00
Richard Barry
fab6050ab8 Regenerate the EthernetLite hardware (MicroBlaze) in an attempt to get Rx working. 2011-07-27 12:08:38 +00:00
Richard Barry
1019db5850 Regenerate the EthernetLite hardware (MicroBlaze) in an attempt to get Rx working. 2011-07-27 12:06:38 +00:00
Richard Barry
a12c133956 Clear off a few compiler warnings generated when pedantic warnings are switched on. 2011-07-27 12:05:56 +00:00
Richard Barry
ff77d82ceb Update lwIP port layer for the Microblaze Ethernet Lite IP. 2011-07-27 12:04:15 +00:00
Richard Barry
5d3a35a1f3 Clear off a few compiler warnings generated when pedantic warnings are switched on. 2011-07-27 12:02:08 +00:00
Richard Barry
87b97f5510 Update PIC32 asm code ready for MPLAB compiler V2. 2011-07-25 15:38:19 +00:00
Richard Barry
fe6284e807 Update PIC32 asm code ready for MPLAB compiler V2. 2011-07-25 15:35:54 +00:00
Richard Barry
6c0fe51bf2 Update the demo directory (temporary) local copy of the MicroBlaze EthernetLite port layer. 2011-07-24 16:21:23 +00:00
Richard Barry
9d1c23f6da Add in starting point for the MicroBlaze EthernetLite lwIP port layer. 2011-07-24 16:19:52 +00:00
Richard Barry
a176b54de5 MicroBlaze demo now building with lwIP included - but will not link until the Ethernetif file is implemented. 2011-07-24 11:14:40 +00:00
Richard Barry
12a722bf36 Remove unnecessary files from the MicroBlaze http server file system creation directory. 2011-07-24 10:31:22 +00:00
Richard Barry
1052e6585f Update CreateProjectDirectoryStructure.bat to add in the lwIP source files, and add the source files themselves. The source files will be removed before release. 2011-07-24 09:53:54 +00:00
Richard Barry
c39170ef64 Add raw httpd web server to the MicroBlaze demo - not build yet - only a file copy exercise so far. 2011-07-23 21:32:32 +00:00
Richard Barry
98309c3f4d Add lwIP_Apps directory structure to the MicroBlaze demo. 2011-07-23 21:20:57 +00:00
Richard Barry
c023af9c39 Add a separate portMINUS_CONTEXT_SIZE definition, in place of the previously used -portCONTEXT_SIZE usage. 2011-07-23 21:14:43 +00:00
Richard Barry
9beca8b1b1 2011-07-23 21:12:53 +00:00
Richard Barry
ad57e919b5 Minor typo in comment corrected in the Kinetis main-full.c. 2011-07-23 21:11:24 +00:00
Richard Barry
adabfbe8b7 Add lwIP V1.4.0 source files. 2011-07-23 20:22:27 +00:00
Richard Barry
a089537b02 Comment K60 demo code, ready for release. 2011-07-11 12:06:57 +00:00
Richard Barry
dcb8df1fce Get web server and run time stats working in the Kinetis K60 demo. 2011-07-10 21:10:11 +00:00
Richard Barry
326b6a2c95 Ethernet working in the Kinetis K60 demo. 2011-07-10 12:16:13 +00:00
Richard Barry
9d181af847 Add Full build configuration to the Kinetis demo. Still a work in progress. 2011-07-08 21:02:03 +00:00
Richard Barry
862f99832d Start creating the K60 demo directory structure. 2011-07-08 09:55:18 +00:00
Richard Barry
d0e8c36aa2 Start creating the K60 demo directory structure. 2011-07-08 08:57:54 +00:00
Richard Barry
248123342b Prepare files for export (MicroBlaze project). 2011-07-05 13:52:52 +00:00
Richard Barry
6e30a6cb75 Comment the exception handling functions in the MicroBlaze portmacro.h file. 2011-07-04 20:18:29 +00:00
Richard Barry
b59d10c893 Change vTickISR() to vPortTickISR() in the new MicroBlaze demo. 2011-07-04 18:15:22 +00:00
Richard Barry
1f5e2a944c Add vSemaphoreDelete(), xTaskGetIdleTaskHandle(), xTimerGetTimerTaskHandle() API functions. Change vTickISR() to vPortTickISR(). Partially comment portmacro.h. All for the new MicroBlaze port. 2011-07-04 18:13:09 +00:00
Richard Barry
3d5656e37e Clean up some of the exception handling code in the new MicroBlaze port. 2011-07-02 18:51:18 +00:00
Richard Barry
f90794f05a Comment the new MicroBlaze port layer files. 2011-06-30 18:26:32 +00:00
Richard Barry
0e12cd0768 Comment the new standard demo files that were introduced for the new MicroBlaze demo project. 2011-06-30 15:14:46 +00:00
Richard Barry
9d6eabdcfb Comment the new standard demo files that were introduced for the new MicroBlaze demo project. 2011-06-30 15:12:42 +00:00
Richard Barry
77df4daee7 Comment the peripheral helper files for the new MicroBlaze demo application. 2011-06-30 14:42:07 +00:00
Richard Barry
07e3174ad7 Complete first pass commenting of the new MicroBlaze demo main-blinky.c and main-full.c files. 2011-06-30 09:30:14 +00:00
Richard Barry
e46b2a304f Continue commenting the new MicroBlaze demo. 2011-06-29 19:03:59 +00:00
Richard Barry
0e02cc56b1 Add the standard demo/test timers task to the MicroBlaze demo. 2011-06-29 19:02:33 +00:00
Richard Barry
5fdee187d4 Comment the new MicroBlaze blinky demo ready for release. The full demo still requires work. 2011-06-29 15:02:10 +00:00
Richard Barry
832bbd38e1 Extend the exception handling functionality in the new MicroBlaze port. 2011-06-29 08:50:13 +00:00
Richard Barry
71b359154b Implementing exception handling in the new MicroBlaze port - still a work in progress. 2011-06-26 20:56:49 +00:00
Richard Barry
8b0ccf1444 New MicroBlaze port: Added a FreeRTOS exception handler, and installed it in each position in the exception table. The handler itself does not do much yet. 2011-06-24 18:50:45 +00:00
Richard Barry
4108061316 Complete the new comtest_strings.c file.
Somewhat optimise the calling of vTaskSwitchContext() from interrupts in the new MicroBlaze port to ensure it does not get called multiple times when more than one peripheral is called from the same interrupt.
2011-06-20 19:40:50 +00:00
Richard Barry
a4de9fa8f6 Add in the comtest test tasks to the MicroBlaze demo. 2011-06-19 21:19:33 +00:00
Richard Barry
7b24b4c30c Add the comtest_strings.c and serial.c files - Tx is workings, but both files are still a work in progress. 2011-06-19 13:15:47 +00:00
Richard Barry
2874006c7b Rebuild MicroBlaze hardware to experiment with UART - then put hardware back to how it was originally. 2011-06-19 13:00:59 +00:00
Richard Barry
56875b34d6 Rebuild MicroBlaze hardware to experiment with UART - then put hardware back to how it was originally. 2011-06-17 21:31:39 +00:00
Richard Barry
0512d10a02 Re-arrange the temporary MicroBlaze directory structure slightly. 2011-06-16 20:05:19 +00:00
Richard Barry
be9b7e82c8 Add the common demo files to the MicroBlaze project - this directory will be removed prior to release. 2011-06-16 19:47:49 +00:00
Richard Barry
53d52c0cd3 Remove the needs-lock SVN attribute. 2011-06-16 14:59:47 +00:00
Richard Barry
5ddcf3d36a Update the Cortex-M3 IAR projects to compile with EWARM 6.20 where necessary. 2011-06-16 14:35:57 +00:00
Richard Barry
d873c2705d Introduce sp_flop.c. This is the same as the flop.c common demo file, but uses single precision numbers and variables in place of the double precision numbers and variables. 2011-06-15 16:44:08 +00:00
Richard Barry
c9b5f43d11 Add optional FPU support to the MicroBlaze code.
Rearrange the order in which registers are saved to the stack in an interrupt to make it more logical, and introduce #defines for the offset from the stack pointer for each variable.
2011-06-15 16:42:04 +00:00
Richard Barry
4d287dd1bf Small tidy up of the new MicroBlaze port layer. 2011-06-15 08:39:45 +00:00
Richard Barry
00bfe2f025 Small tidy up of the main-full.c file for the new MicroBlaze demo. 2011-06-15 08:38:01 +00:00
Richard Barry
587e7f0682 Update register test tasks to include a manual yield. Include the death tasks in main-full.c. Decrease the RAM allocated to the heap in FreeRTOSConfig.h. 2011-06-13 14:41:18 +00:00
Richard Barry
1cb4a1494f Remove the heap used with the new MicroBlaze demo. As heap_2.c is being used, the heap area set up in the linker script is not required. 2011-06-13 14:39:22 +00:00
Richard Barry
8d23799758 First pass changes to new MicroBlaze port layer done. No new functionality has yet been added. 2011-06-13 14:37:32 +00:00
Richard Barry
cdac2c4f82 MicroBlaze demo nearly working - death tasks not yet integrated - still a work in progress. 2011-06-12 15:55:45 +00:00
Richard Barry
57653ee0ea Work on the Full build configuration for the MicroBlaze. Still a work in progress - not all tasks are running yet. 2011-06-11 21:04:17 +00:00
Richard Barry
78953066af Delete again. 2011-06-11 19:26:03 +00:00
Richard Barry
7a6dacf296 2011-06-11 19:12:26 +00:00
Richard Barry
d487077d6e First phase of renaming portasm.s in the MicroBlaze port. 2011-06-11 18:31:04 +00:00
Richard Barry
4c80a9948e Tidy up the MicoBlaze port layer - still a work in progress. 2011-06-11 12:00:52 +00:00
Richard Barry
3e07dd4a03 Add a register test to the new MicroBlaze demo - still a work in progress. 2011-06-10 09:43:12 +00:00
Richard Barry
4cda2df265 MicroBlaze projects: Split build configurations into blinky and full. Implement partest.c. Everything still a work in progress. 2011-06-06 21:01:42 +00:00
Richard Barry
9f0bf057e6 Add LED output to the new MicroBlaze blinky demo - still a work in progress. 2011-06-05 16:39:49 +00:00
Richard Barry
ea5ec656f4 Continue work on MicroBlaze port - still very much a work in progress. 2011-06-03 19:22:17 +00:00
Richard Barry
1e5830a157 Continue work on MicroBlaze port - still very much a work in progress. 2011-06-03 09:01:21 +00:00
Richard Barry
67039f6065 Updating MicroBlaze port - work in progress. 2011-06-01 15:01:08 +00:00
Richard Barry
328a8b586f Updating MicroBlaze port - work in progress. 2011-06-01 11:01:58 +00:00
Richard Barry
f5b2c790a0 Add framework for new MicrobBlaze blinky project. 2011-05-31 20:38:48 +00:00
Richard Barry
ee4659b678 Add autogenerated test source code to the new MicroBlaze project. 2011-05-31 18:14:58 +00:00
Richard Barry
d4670870fb Restart the Microblaze project (again). 2011-05-31 09:08:05 +00:00
Richard Barry
3c5b78631b Remove MicroBlaze directory. 2011-05-31 08:37:52 +00:00
Richard Barry
dbe65c9aaf Remove MicroBlaze directory. 2011-05-31 08:35:12 +00:00
Richard Barry
1438e844d9 Remove MicroBlaze directory. 2011-05-31 08:34:25 +00:00
Richard Barry
659be53a3e Remove MicroBlaze directory. 2011-05-31 08:33:47 +00:00
Richard Barry
52a9e4ecd8 Renamed MicroBlaze directory to MicroBlaze_Spartan-6_EthernetLite. 2011-05-31 08:27:43 +00:00
Richard Barry
04f17c5cee Renamed MicroBlaze directory to MicroBlaze_Spartan-6_EthernetLite. 2011-05-31 08:25:12 +00:00
Richard Barry
f4009da657 Create MicroBlaze hardware - work in progress. 2011-05-31 07:55:45 +00:00
Richard Barry
61f15c5c17 Create MicroBlaze hardware - work in progress. 2011-05-30 20:57:52 +00:00
Richard Barry
3d5b5ce834 Restart the new MicroBlaze hardware project. 2011-05-30 20:37:24 +00:00
Richard Barry
29f7b76be0 Create MicroBlaze hardware - work in progress. 2011-05-30 20:07:13 +00:00
Richard Barry
2aa3a13d32 Start MicroBlaze project for the Spartan-6. 2011-05-30 15:56:32 +00:00
Richard Barry
dedc9d8c46 Change some (xTIMER *) references in the documentation for the timer module to be instead xTimerHandle references (the two are in effect equivalent, but xTIMER is private to the timers source file). 2011-05-15 17:31:53 +00:00
5909 changed files with 145863 additions and 1686256 deletions

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// ----------------------------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ----------------------------------------------------------------------------
// The software is delivered "AS IS" without warranty or condition of any
// kind, either express, implied or statutory. This includes without
// limitation any warranty or condition with respect to merchantability or
// fitness for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ----------------------------------------------------------------------------
// File Name : AT91R40008.h
// Object : AT91R40008 definitions
// Generated : AT91 SW Application Group 02/19/2003 (11:13:31)
//
// CVS Reference : /AT91R40008.pl/1.3/Tue Nov 12 16:01:52 2002//
// CVS Reference : /AIC_1246F.pl/1.4/Mon Nov 04 17:51:00 2002//
// CVS Reference : /WD_1241B.pl/1.1/Mon Nov 04 17:51:00 2002//
// CVS Reference : /PS_x40.pl/1.2/Tue Nov 12 16:01:52 2002//
// CVS Reference : /PIO_1321C.pl/1.5/Tue Oct 29 15:50:24 2002//
// CVS Reference : /TC_1243B.pl/1.4/Tue Nov 05 12:43:10 2002//
// CVS Reference : /PDC_1363D.pl/1.3/Wed Oct 23 14:49:48 2002//
// CVS Reference : /US_1242E.pl/1.5/Thu Nov 21 13:37:56 2002//
// CVS Reference : /SF_x40.pl/1.1/Tue Nov 12 13:27:20 2002//
// CVS Reference : /EBI_x40.pl/1.5/Wed Feb 19 09:25:22 2003//
// ----------------------------------------------------------------------------
#ifndef AT91R40008_H
#define AT91R40008_H
/* AT91 Register type */
typedef volatile unsigned int AT91_REG; // Hardware register definition
typedef volatile unsigned int at91_reg;
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Advanced Interrupt Controller
// *****************************************************************************
typedef struct _AT91S_AIC {
AT91_REG AIC_SMR[32]; // Source Mode egister
AT91_REG AIC_SVR[32]; // Source Vector egister
AT91_REG AIC_IVR; // IRQ Vector Register
AT91_REG AIC_FVR; // FIQ Vector Register
AT91_REG AIC_ISR; // Interrupt Status Register
AT91_REG AIC_IPR; // Interrupt Pending Register
AT91_REG AIC_IMR; // Interrupt Mask Register
AT91_REG AIC_CISR; // Core Interrupt Status Register
AT91_REG Reserved0[2]; //
AT91_REG AIC_IECR; // Interrupt Enable Command Register
AT91_REG AIC_IDCR; // Interrupt Disable Command egister
AT91_REG AIC_ICCR; // Interrupt Clear Command Register
AT91_REG AIC_ISCR; // Interrupt Set Command Register
AT91_REG AIC_EOICR; // End of Interrupt Command Register
AT91_REG AIC_SPU; // Spurious Vector Register
} AT91S_AIC, *AT91PS_AIC;
// -------- AIC_SMR : (AIC Offset: 0x0) Control Register --------
#define AT91C_AIC_PRIOR ((unsigned int) 0x7 << 0) // (AIC) Priority Level
#define AT91C_AIC_PRIOR_LOWEST ((unsigned int) 0x0) // (AIC) Lowest priority level
#define AT91C_AIC_PRIOR_HIGHEST ((unsigned int) 0x7) // (AIC) Highest priority level
#define AT91C_AIC_SRCTYPE ((unsigned int) 0x3 << 5) // (AIC) Interrupt Source Type
#define AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE ((unsigned int) 0x0 << 5) // (AIC) Internal Sources Code Label Level Sensitive
#define AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED ((unsigned int) 0x1 << 5) // (AIC) Internal Sources Code Label Edge triggered
#define AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL ((unsigned int) 0x2 << 5) // (AIC) External Sources Code Label High-level Sensitive
#define AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE ((unsigned int) 0x3 << 5) // (AIC) External Sources Code Label Positive Edge triggered
// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register --------
#define AT91C_AIC_NFIQ ((unsigned int) 0x1 << 0) // (AIC) NFIQ Status
#define AT91C_AIC_NIRQ ((unsigned int) 0x1 << 1) // (AIC) NIRQ Status
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Watchdog Timer Interface
// *****************************************************************************
typedef struct _AT91S_WD {
AT91_REG WD_OMR; // Overflow Mode Register
AT91_REG WD_CMR; // Clock Mode Register
AT91_REG WD_CR; // Control Register
AT91_REG WD_SR; // Status Register
} AT91S_WD, *AT91PS_WD;
// -------- WD_OMR : (WD Offset: 0x0) Overflow Mode Register --------
#define AT91C_WD_WDEN ((unsigned int) 0x1 << 0) // (WD) Watchdog Enable
#define AT91C_WD_RSTEN ((unsigned int) 0x1 << 1) // (WD) Reset Enable
#define AT91C_WD_IRQEN ((unsigned int) 0x1 << 2) // (WD) Interrupt Enable
#define AT91C_WD_EXTEN ((unsigned int) 0x1 << 3) // (WD) External Signal Enable
#define AT91C_WD_OKEY ((unsigned int) 0xFFF << 4) // (WD) Watchdog Enable
// -------- WD_CMR : (WD Offset: 0x4) Clock Mode Register --------
#define AT91C_WD_WDCLKS ((unsigned int) 0x3 << 0) // (WD) Clock Selection
#define AT91C_WD_WDCLKS_MCK32 ((unsigned int) 0x0) // (WD) Master Clock divided by 32
#define AT91C_WD_WDCLKS_MCK128 ((unsigned int) 0x1) // (WD) Master Clock divided by 128
#define AT91C_WD_WDCLKS_MCK1024 ((unsigned int) 0x2) // (WD) Master Clock divided by 1024
#define AT91C_WD_WDCLKS_MCK4096 ((unsigned int) 0x3) // (WD) Master Clock divided by 4096
#define AT91C_WD_HPCV ((unsigned int) 0xF << 2) // (WD) High Pre-load Counter Value
#define AT91C_WD_CKEY ((unsigned int) 0x1FF << 7) // (WD) Clock Access Key
// -------- WD_CR : (WD Offset: 0x8) Control Register --------
#define AT91C_WD_RSTKEY ((unsigned int) 0xFFFF << 0) // (WD) Restart Key
// -------- WD_SR : (WD Offset: 0xc) Status Register --------
#define AT91C_WD_WDOVF ((unsigned int) 0x1 << 0) // (WD) Watchdog Overflow
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Power Saving Controler
// *****************************************************************************
typedef struct _AT91S_PS {
AT91_REG PS_CR; // Control Register
AT91_REG PS_PCER; // Peripheral Clock Enable Register
AT91_REG PS_PCDR; // Peripheral Clock Disable Register
AT91_REG PS_PCSR; // Peripheral Clock Status Register
} AT91S_PS, *AT91PS_PS;
// -------- PS_PCER : (PS Offset: 0x4) Peripheral Clock Enable Register --------
#define AT91C_PS_US0 ((unsigned int) 0x1 << 2) // (PS) Usart 0 Clock
#define AT91C_PS_US1 ((unsigned int) 0x1 << 3) // (PS) Usart 1 Clock
#define AT91C_PS_TC0 ((unsigned int) 0x1 << 4) // (PS) Timer Counter 0 Clock
#define AT91C_PS_TC1 ((unsigned int) 0x1 << 5) // (PS) Timer Counter 1 Clock
#define AT91C_PS_TC2 ((unsigned int) 0x1 << 6) // (PS) Timer Counter 2 Clock
#define AT91C_PS_PIO ((unsigned int) 0x1 << 8) // (PS) PIO Clock
// -------- PS_PCDR : (PS Offset: 0x8) Peripheral Clock Disable Register --------
// -------- PS_PCSR : (PS Offset: 0xc) Peripheral Clock Satus Register --------
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Parallel Input Output Controler
// *****************************************************************************
typedef struct _AT91S_PIO {
AT91_REG PIO_PER; // PIO Enable Register
AT91_REG PIO_PDR; // PIO Disable Register
AT91_REG PIO_PSR; // PIO Status Register
AT91_REG Reserved0[1]; //
AT91_REG PIO_OER; // Output Enable Register
AT91_REG PIO_ODR; // Output Disable Registerr
AT91_REG PIO_OSR; // Output Status Register
AT91_REG Reserved1[1]; //
AT91_REG PIO_IFER; // Input Filter Enable Register
AT91_REG PIO_IFDR; // Input Filter Disable Register
AT91_REG PIO_IFSR; // Input Filter Status Register
AT91_REG Reserved2[1]; //
AT91_REG PIO_SODR; // Set Output Data Register
AT91_REG PIO_CODR; // Clear Output Data Register
AT91_REG PIO_ODSR; // Output Data Status Register
AT91_REG PIO_PDSR; // Pin Data Status Register
AT91_REG PIO_IER; // Interrupt Enable Register
AT91_REG PIO_IDR; // Interrupt Disable Register
AT91_REG PIO_IMR; // Interrupt Mask Register
AT91_REG PIO_ISR; // Interrupt Status Register
AT91_REG PIO_MDER; // Multi-driver Enable Register
AT91_REG PIO_MDDR; // Multi-driver Disable Register
AT91_REG PIO_MDSR; // Multi-driver Status Register
} AT91S_PIO, *AT91PS_PIO;
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Timer Counter Channel Interface
// *****************************************************************************
typedef struct _AT91S_TC {
AT91_REG TC_CCR; // Channel Control Register
AT91_REG TC_CMR; // Channel Mode Register
AT91_REG Reserved0[2]; //
AT91_REG TC_CV; // Counter Value
AT91_REG TC_RA; // Register A
AT91_REG TC_RB; // Register B
AT91_REG TC_RC; // Register C
AT91_REG TC_SR; // Status Register
AT91_REG TC_IER; // Interrupt Enable Register
AT91_REG TC_IDR; // Interrupt Disable Register
AT91_REG TC_IMR; // Interrupt Mask Register
} AT91S_TC, *AT91PS_TC;
// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register --------
#define AT91C_TC_CLKEN ((unsigned int) 0x1 << 0) // (TC) Counter Clock Enable Command
#define AT91C_TC_CLKDIS ((unsigned int) 0x1 << 1) // (TC) Counter Clock Disable Command
#define AT91C_TC_SWTRG ((unsigned int) 0x1 << 2) // (TC) Software Trigger Command
// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode --------
#define AT91C_TC_CPCSTOP ((unsigned int) 0x1 << 6) // (TC) Counter Clock Stopped with RC Compare
#define AT91C_TC_CPCDIS ((unsigned int) 0x1 << 7) // (TC) Counter Clock Disable with RC Compare
#define AT91C_TC_EEVTEDG ((unsigned int) 0x3 << 8) // (TC) External Event Edge Selection
#define AT91C_TC_EEVTEDG_NONE ((unsigned int) 0x0 << 8) // (TC) Edge: None
#define AT91C_TC_EEVTEDG_RISING ((unsigned int) 0x1 << 8) // (TC) Edge: rising edge
#define AT91C_TC_EEVTEDG_FALLING ((unsigned int) 0x2 << 8) // (TC) Edge: falling edge
#define AT91C_TC_EEVTEDG_BOTH ((unsigned int) 0x3 << 8) // (TC) Edge: each edge
#define AT91C_TC_EEVT ((unsigned int) 0x3 << 10) // (TC) External Event Selection
#define AT91C_TC_EEVT_NONE ((unsigned int) 0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
#define AT91C_TC_EEVT_RISING ((unsigned int) 0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
#define AT91C_TC_EEVT_FALLING ((unsigned int) 0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
#define AT91C_TC_EEVT_BOTH ((unsigned int) 0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
#define AT91C_TC_ENETRG ((unsigned int) 0x1 << 12) // (TC) External Event Trigger enable
#define AT91C_TC_WAVESEL ((unsigned int) 0x3 << 13) // (TC) Waveform Selection
#define AT91C_TC_WAVESEL_UP ((unsigned int) 0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
#define AT91C_TC_WAVESEL_UP_AUTO ((unsigned int) 0x1 << 13) // (TC) UP mode with automatic trigger on RC Compare
#define AT91C_TC_WAVESEL_UPDOWN ((unsigned int) 0x2 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
#define AT91C_TC_WAVESEL_UPDOWN_AUTO ((unsigned int) 0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
#define AT91C_TC_CPCTRG ((unsigned int) 0x1 << 14) // (TC) RC Compare Trigger Enable
#define AT91C_TC_WAVE ((unsigned int) 0x1 << 15) // (TC)
#define AT91C_TC_ACPA ((unsigned int) 0x3 << 16) // (TC) RA Compare Effect on TIOA
#define AT91C_TC_ACPA_NONE ((unsigned int) 0x0 << 16) // (TC) Effect: none
#define AT91C_TC_ACPA_SET ((unsigned int) 0x1 << 16) // (TC) Effect: set
#define AT91C_TC_ACPA_CLEAR ((unsigned int) 0x2 << 16) // (TC) Effect: clear
#define AT91C_TC_ACPA_TOGGLE ((unsigned int) 0x3 << 16) // (TC) Effect: toggle
#define AT91C_TC_ACPC ((unsigned int) 0x3 << 18) // (TC) RC Compare Effect on TIOA
#define AT91C_TC_ACPC_NONE ((unsigned int) 0x0 << 18) // (TC) Effect: none
#define AT91C_TC_ACPC_SET ((unsigned int) 0x1 << 18) // (TC) Effect: set
#define AT91C_TC_ACPC_CLEAR ((unsigned int) 0x2 << 18) // (TC) Effect: clear
#define AT91C_TC_ACPC_TOGGLE ((unsigned int) 0x3 << 18) // (TC) Effect: toggle
#define AT91C_TC_AEEVT ((unsigned int) 0x3 << 20) // (TC) External Event Effect on TIOA
#define AT91C_TC_AEEVT_NONE ((unsigned int) 0x0 << 20) // (TC) Effect: none
#define AT91C_TC_AEEVT_SET ((unsigned int) 0x1 << 20) // (TC) Effect: set
#define AT91C_TC_AEEVT_CLEAR ((unsigned int) 0x2 << 20) // (TC) Effect: clear
#define AT91C_TC_AEEVT_TOGGLE ((unsigned int) 0x3 << 20) // (TC) Effect: toggle
#define AT91C_TC_ASWTRG ((unsigned int) 0x3 << 22) // (TC) Software Trigger Effect on TIOA
#define AT91C_TC_ASWTRG_NONE ((unsigned int) 0x0 << 22) // (TC) Effect: none
#define AT91C_TC_ASWTRG_SET ((unsigned int) 0x1 << 22) // (TC) Effect: set
#define AT91C_TC_ASWTRG_CLEAR ((unsigned int) 0x2 << 22) // (TC) Effect: clear
#define AT91C_TC_ASWTRG_TOGGLE ((unsigned int) 0x3 << 22) // (TC) Effect: toggle
#define AT91C_TC_BCPB ((unsigned int) 0x3 << 24) // (TC) RB Compare Effect on TIOB
#define AT91C_TC_BCPB_NONE ((unsigned int) 0x0 << 24) // (TC) Effect: none
#define AT91C_TC_BCPB_SET ((unsigned int) 0x1 << 24) // (TC) Effect: set
#define AT91C_TC_BCPB_CLEAR ((unsigned int) 0x2 << 24) // (TC) Effect: clear
#define AT91C_TC_BCPB_TOGGLE ((unsigned int) 0x3 << 24) // (TC) Effect: toggle
#define AT91C_TC_BCPC ((unsigned int) 0x3 << 26) // (TC) RC Compare Effect on TIOB
#define AT91C_TC_BCPC_NONE ((unsigned int) 0x0 << 26) // (TC) Effect: none
#define AT91C_TC_BCPC_SET ((unsigned int) 0x1 << 26) // (TC) Effect: set
#define AT91C_TC_BCPC_CLEAR ((unsigned int) 0x2 << 26) // (TC) Effect: clear
#define AT91C_TC_BCPC_TOGGLE ((unsigned int) 0x3 << 26) // (TC) Effect: toggle
#define AT91C_TC_BEEVT ((unsigned int) 0x3 << 28) // (TC) External Event Effect on TIOB
#define AT91C_TC_BEEVT_NONE ((unsigned int) 0x0 << 28) // (TC) Effect: none
#define AT91C_TC_BEEVT_SET ((unsigned int) 0x1 << 28) // (TC) Effect: set
#define AT91C_TC_BEEVT_CLEAR ((unsigned int) 0x2 << 28) // (TC) Effect: clear
#define AT91C_TC_BEEVT_TOGGLE ((unsigned int) 0x3 << 28) // (TC) Effect: toggle
#define AT91C_TC_BSWTRG ((unsigned int) 0x3 << 30) // (TC) Software Trigger Effect on TIOB
#define AT91C_TC_BSWTRG_NONE ((unsigned int) 0x0 << 30) // (TC) Effect: none
#define AT91C_TC_BSWTRG_SET ((unsigned int) 0x1 << 30) // (TC) Effect: set
#define AT91C_TC_BSWTRG_CLEAR ((unsigned int) 0x2 << 30) // (TC) Effect: clear
#define AT91C_TC_BSWTRG_TOGGLE ((unsigned int) 0x3 << 30) // (TC) Effect: toggle
// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register --------
#define AT91C_TC_COVFS ((unsigned int) 0x1 << 0) // (TC) Counter Overflow
#define AT91C_TC_LOVRS ((unsigned int) 0x1 << 1) // (TC) Load Overrun
#define AT91C_TC_CPAS ((unsigned int) 0x1 << 2) // (TC) RA Compare
#define AT91C_TC_CPBS ((unsigned int) 0x1 << 3) // (TC) RB Compare
#define AT91C_TC_CPCS ((unsigned int) 0x1 << 4) // (TC) RC Compare
#define AT91C_TC_LDRAS ((unsigned int) 0x1 << 5) // (TC) RA Loading
#define AT91C_TC_LDRBS ((unsigned int) 0x1 << 6) // (TC) RB Loading
#define AT91C_TC_ETRCS ((unsigned int) 0x1 << 7) // (TC) External Trigger
#define AT91C_TC_ETRGS ((unsigned int) 0x1 << 16) // (TC) Clock Enabling
#define AT91C_TC_MTIOA ((unsigned int) 0x1 << 17) // (TC) TIOA Mirror
#define AT91C_TC_MTIOB ((unsigned int) 0x1 << 18) // (TC) TIOA Mirror
// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register --------
// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register --------
// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register --------
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Timer Counter Interface
// *****************************************************************************
typedef struct _AT91S_TCB {
AT91S_TC TCB_TC0; // TC Channel 0
AT91_REG Reserved0[4]; //
AT91S_TC TCB_TC1; // TC Channel 1
AT91_REG Reserved1[4]; //
AT91S_TC TCB_TC2; // TC Channel 2
AT91_REG Reserved2[4]; //
AT91_REG TCB_BCR; // TC Block Control Register
AT91_REG TCB_BMR; // TC Block Mode Register
} AT91S_TCB, *AT91PS_TCB;
// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register --------
#define AT91C_TCB_SYNC ((unsigned int) 0x1 << 0) // (TCB) Synchro Command
// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register --------
#define AT91C_TCB_TC0XC0S ((unsigned int) 0x1 << 0) // (TCB) External Clock Signal 0 Selection
#define AT91C_TCB_TC0XC0S_TCLK0 ((unsigned int) 0x0) // (TCB) TCLK0 connected to XC0
#define AT91C_TCB_TC0XC0S_NONE ((unsigned int) 0x1) // (TCB) None signal connected to XC0
#define AT91C_TCB_TC0XC0S_TIOA1 ((unsigned int) 0x2) // (TCB) TIOA1 connected to XC0
#define AT91C_TCB_TC0XC0S_TIOA2 ((unsigned int) 0x3) // (TCB) TIOA2 connected to XC0
#define AT91C_TCB_TC1XC1S ((unsigned int) 0x1 << 2) // (TCB) External Clock Signal 1 Selection
#define AT91C_TCB_TC1XC1S_TCLK1 ((unsigned int) 0x0 << 2) // (TCB) TCLK1 connected to XC1
#define AT91C_TCB_TC1XC1S_NONE ((unsigned int) 0x1 << 2) // (TCB) None signal connected to XC1
#define AT91C_TCB_TC1XC1S_TIOA0 ((unsigned int) 0x2 << 2) // (TCB) TIOA0 connected to XC1
#define AT91C_TCB_TC1XC1S_TIOA2 ((unsigned int) 0x3 << 2) // (TCB) TIOA2 connected to XC1
#define AT91C_TCB_TC2XC2S ((unsigned int) 0x1 << 4) // (TCB) External Clock Signal 2 Selection
#define AT91C_TCB_TC2XC2S_TCLK2 ((unsigned int) 0x0 << 4) // (TCB) TCLK2 connected to XC2
#define AT91C_TCB_TC2XC2S_NONE ((unsigned int) 0x1 << 4) // (TCB) None signal connected to XC2
#define AT91C_TCB_TC2XC2S_TIOA0 ((unsigned int) 0x2 << 4) // (TCB) TIOA0 connected to XC2
#define AT91C_TCB_TC2XC2S_TIOA2 ((unsigned int) 0x3 << 4) // (TCB) TIOA2 connected to XC2
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Peripheral Data Controller
// *****************************************************************************
typedef struct _AT91S_PDC {
AT91_REG PDC_RPR; // Receive Pointer Register
AT91_REG PDC_RCR; // Receive Counter Register
AT91_REG PDC_TPR; // Transmit Pointer Register
AT91_REG PDC_TCR; // Transmit Counter Register
} AT91S_PDC, *AT91PS_PDC;
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Usart
// *****************************************************************************
typedef struct _AT91S_USART {
AT91_REG US_CR; // Control Register
AT91_REG US_MR; // Mode Register
AT91_REG US_IER; // Interrupt Enable Register
AT91_REG US_IDR; // Interrupt Disable Register
AT91_REG US_IMR; // Interrupt Mask Register
AT91_REG US_CSR; // Channel Status Register
AT91_REG US_RHR; // Receiver Holding Register
AT91_REG US_THR; // Transmitter Holding Register
AT91_REG US_BRGR; // Baud Rate Generator Register
AT91_REG US_RTOR; // Receiver Time-out Register
AT91_REG US_TTGR; // Transmitter Time-guard Register
AT91_REG Reserved0[1]; //
AT91_REG US_RPR; // Receive Pointer Register
AT91_REG US_RCR; // Receive Counter Register
AT91_REG US_TPR; // Transmit Pointer Register
AT91_REG US_TCR; // Transmit Counter Register
} AT91S_USART, *AT91PS_USART;
// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register --------
#define AT91C_US_RSTRX ((unsigned int) 0x1 << 2) // (USART) Reset Receiver
#define AT91C_US_RSTTX ((unsigned int) 0x1 << 3) // (USART) Reset Transmitter
#define AT91C_US_RXEN ((unsigned int) 0x1 << 4) // (USART) Receiver Enable
#define AT91C_US_RXDIS ((unsigned int) 0x1 << 5) // (USART) Receiver Disable
#define AT91C_US_TXEN ((unsigned int) 0x1 << 6) // (USART) Transmitter Enable
#define AT91C_US_TXDIS ((unsigned int) 0x1 << 7) // (USART) Transmitter Disable
#define AT91C_US_RSTSTA ((unsigned int) 0x1 << 8) // (USART) Reset Status Bits
#define AT91C_US_STTBRK ((unsigned int) 0x1 << 9) // (USART) Start Break
#define AT91C_US_STPBRK ((unsigned int) 0x1 << 10) // (USART) Stop Break
#define AT91C_US_STTTO ((unsigned int) 0x1 << 11) // (USART) Start Time-out
#define AT91C_US_SENDA ((unsigned int) 0x1 << 12) // (USART) Send Address
// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register --------
#define AT91C_US_CLKS ((unsigned int) 0x3 << 4) // (USART) Clock Selection (Baud Rate generator Input Clock
#define AT91C_US_CLKS_CLOCK ((unsigned int) 0x0 << 4) // (USART) Clock
#define AT91C_US_CLKS_FDIV1 ((unsigned int) 0x1 << 4) // (USART) fdiv1
#define AT91C_US_CLKS_SLOW ((unsigned int) 0x2 << 4) // (USART) slow_clock (ARM)
#define AT91C_US_CLKS_EXT ((unsigned int) 0x3 << 4) // (USART) External (SCK)
#define AT91C_US_CHRL ((unsigned int) 0x3 << 6) // (USART) Clock Selection (Baud Rate generator Input Clock
#define AT91C_US_CHRL_5_BITS ((unsigned int) 0x0 << 6) // (USART) Character Length: 5 bits
#define AT91C_US_CHRL_6_BITS ((unsigned int) 0x1 << 6) // (USART) Character Length: 6 bits
#define AT91C_US_CHRL_7_BITS ((unsigned int) 0x2 << 6) // (USART) Character Length: 7 bits
#define AT91C_US_CHRL_8_BITS ((unsigned int) 0x3 << 6) // (USART) Character Length: 8 bits
#define AT91C_US_SYNC ((unsigned int) 0x1 << 8) // (USART) Synchronous Mode Select
#define AT91C_US_PAR ((unsigned int) 0x7 << 9) // (USART) Parity type
#define AT91C_US_PAR_EVEN ((unsigned int) 0x0 << 9) // (USART) Even Parity
#define AT91C_US_PAR_ODD ((unsigned int) 0x1 << 9) // (USART) Odd Parity
#define AT91C_US_PAR_SPACE ((unsigned int) 0x2 << 9) // (USART) Parity forced to 0 (Space)
#define AT91C_US_PAR_MARK ((unsigned int) 0x3 << 9) // (USART) Parity forced to 1 (Mark)
#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) // (USART) No Parity
#define AT91C_US_PAR_MULTI_DROP ((unsigned int) 0x6 << 9) // (USART) Multi-drop mode
#define AT91C_US_NBSTOP ((unsigned int) 0x3 << 12) // (USART) Number of Stop bits
#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) // (USART) 1 stop bit
#define AT91C_US_NBSTOP_15_BIT ((unsigned int) 0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
#define AT91C_US_NBSTOP_2_BIT ((unsigned int) 0x2 << 12) // (USART) 2 stop bits
#define AT91C_US_CHMODE ((unsigned int) 0x3 << 14) // (USART) Channel Mode
#define AT91C_US_CHMODE_NORMAL ((unsigned int) 0x0 << 14) // (USART) Normal Mode: The USART channel operates as an RX/TX USART.
#define AT91C_US_CHMODE_AUTO ((unsigned int) 0x1 << 14) // (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin.
#define AT91C_US_CHMODE_LOCAL ((unsigned int) 0x2 << 14) // (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
#define AT91C_US_CHMODE_REMOTE ((unsigned int) 0x3 << 14) // (USART) Remote Loopback: RXD pin is internally connected to TXD pin.
#define AT91C_US_MODE9 ((unsigned int) 0x1 << 17) // (USART) 9-bit Character length
#define AT91C_US_CKLO ((unsigned int) 0x1 << 18) // (USART) Clock Output Select
// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register --------
#define AT91C_US_RXRDY ((unsigned int) 0x1 << 0) // (USART) RXRDY Interrupt
#define AT91C_US_TXRDY ((unsigned int) 0x1 << 1) // (USART) TXRDY Interrupt
#define AT91C_US_RXBRK ((unsigned int) 0x1 << 2) // (USART) Break Received/End of Break
#define AT91C_US_ENDRX ((unsigned int) 0x1 << 3) // (USART) End of Receive Transfer Interrupt
#define AT91C_US_ENDTX ((unsigned int) 0x1 << 4) // (USART) End of Transmit Interrupt
#define AT91C_US_OVRE ((unsigned int) 0x1 << 5) // (USART) Overrun Interrupt
#define AT91C_US_FRAME ((unsigned int) 0x1 << 6) // (USART) Framing Error Interrupt
#define AT91C_US_PARE ((unsigned int) 0x1 << 7) // (USART) Parity Error Interrupt
#define AT91C_US_TIMEOUT ((unsigned int) 0x1 << 8) // (USART) Receiver Time-out
#define AT91C_US_TXEMPTY ((unsigned int) 0x1 << 9) // (USART) TXEMPTY Interrupt
// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register --------
// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register --------
// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register --------
// *****************************************************************************
// SOFTWARE API DEFINITION FOR Special Function Interface
// *****************************************************************************
typedef struct _AT91S_SF {
AT91_REG SF_CIDR; // Chip ID Register
AT91_REG SF_EXID; // Chip ID Extension Register
AT91_REG SF_RSR; // Reset Status Register
AT91_REG SF_MMR; // Memory Mode Register
AT91_REG Reserved0[2]; //
AT91_REG SF_PMR; // Protect Mode Register
} AT91S_SF, *AT91PS_SF;
// -------- SF_CIDR : (SF Offset: 0x0) Chip ID Register --------
#define AT91C_SF_VERSION ((unsigned int) 0x1F << 0) // (SF) Version of the chip
#define AT91C_SF_BIT5 ((unsigned int) 0x1 << 5) // (SF) Hardwired at 0
#define AT91C_SF_BIT6 ((unsigned int) 0x1 << 6) // (SF) Hardwired at 1
#define AT91C_SF_BIT7 ((unsigned int) 0x1 << 7) // (SF) Hardwired at 0
#define AT91C_SF_NVPSIZ ((unsigned int) 0xF << 8) // (SF) Nonvolatile Program Memory Size
#define AT91C_SF_NVPSIZ_NONE ((unsigned int) 0x0 << 8) // (SF) None
#define AT91C_SF_NVPSIZ_32K ((unsigned int) 0x3 << 8) // (SF) 32K Bytes
#define AT91C_SF_NVPSIZ_64K ((unsigned int) 0x5 << 8) // (SF) 64K Bytes
#define AT91C_SF_NVPSIZ_128K ((unsigned int) 0x7 << 8) // (SF) 128K Bytes
#define AT91C_SF_NVPSIZ_256K ((unsigned int) 0x11 << 8) // (SF) 256K Bytes
#define AT91C_SF_NVDSIZ ((unsigned int) 0xF << 12) // (SF) Nonvolatile Data Memory Size
#define AT91C_SF_NVDSIZ_NONE ((unsigned int) 0x0 << 12) // (SF) None
#define AT91C_SF_VDSIZ ((unsigned int) 0xF << 16) // (SF) Volatile Data Memory Size
#define AT91C_SF_VDSIZ_NONE ((unsigned int) 0x0 << 16) // (SF) None
#define AT91C_SF_VDSIZ_1K ((unsigned int) 0x3 << 16) // (SF) 1K Bytes
#define AT91C_SF_VDSIZ_2K ((unsigned int) 0x5 << 16) // (SF) 2K Bytes
#define AT91C_SF_VDSIZ_4K ((unsigned int) 0x7 << 16) // (SF) 4K Bytes
#define AT91C_SF_VDSIZ_8K ((unsigned int) 0x11 << 16) // (SF) 8K Bytes
#define AT91C_SF_ARCH ((unsigned int) 0xFF << 20) // (SF) Chip Architecture
#define AT91C_SF_ARCH_AT91x40 ((unsigned int) 0x28 << 20) // (SF) AT91x40yyy
#define AT91C_SF_ARCH_AT91x55 ((unsigned int) 0x37 << 20) // (SF) AT91x55yyy
#define AT91C_SF_ARCH_AT91x63 ((unsigned int) 0x3F << 20) // (SF) AT91x63yyy
#define AT91C_SF_NVPTYP ((unsigned int) 0x7 << 28) // (SF) Nonvolatile Program Memory Type
#define AT91C_SF_NVPTYP_NVPTYP_M ((unsigned int) 0x1 << 28) // (SF) 'M' Series or 'F' Series
#define AT91C_SF_NVPTYP_NVPTYP_R ((unsigned int) 0x4 << 28) // (SF) 'R' Series
#define AT91C_SF_EXT ((unsigned int) 0x1 << 31) // (SF) Extension Flag
// -------- SF_RSR : (SF Offset: 0x8) Reset Status Information --------
#define AT91C_SF_RESET ((unsigned int) 0xFF << 0) // (SF) Cause of Reset
#define AT91C_SF_RESET_WD ((unsigned int) 0x35) // (SF) Internal Watchdog
#define AT91C_SF_RESET_EXT ((unsigned int) 0x6C) // (SF) External Pin
// -------- SF_MMR : (SF Offset: 0xc) Memory Mode Register --------
#define AT91C_SF_RAMWU ((unsigned int) 0x1 << 0) // (SF) Internal Extended RAM Write Detection
// -------- SF_PMR : (SF Offset: 0x18) Protection Mode Register --------
#define AT91C_SF_AIC ((unsigned int) 0x1 << 5) // (SF) AIC Protect Mode Enable
#define AT91C_SF_PMRKEY ((unsigned int) 0xFFFF << 16) // (SF) Protect Mode Register Key
// *****************************************************************************
// SOFTWARE API DEFINITION FOR External Bus Interface
// *****************************************************************************
typedef struct _AT91S_EBI {
AT91_REG EBI_CSR[8]; // Chip-select Register
AT91_REG EBI_RCR; // Remap Control Register
AT91_REG EBI_MCR; // Memory Control Register
} AT91S_EBI, *AT91PS_EBI;
// -------- EBI_CSR : (EBI Offset: 0x0) Chip Select Register --------
#define AT91C_EBI_DBW ((unsigned int) 0x3 << 0) // (EBI) Data Bus Width
#define AT91C_EBI_DBW_16 ((unsigned int) 0x1) // (EBI) 16-bit data bus width
#define AT91C_EBI_DBW_8 ((unsigned int) 0x2) // (EBI) 8-bit data bus width
#define AT91C_EBI_NWS ((unsigned int) 0x7 << 2) // (EBI) Number of wait states
#define AT91C_EBI_NWS_1 ((unsigned int) 0x0 << 2) // (EBI) 1 wait state
#define AT91C_EBI_NWS_2 ((unsigned int) 0x1 << 2) // (EBI) 2 wait state
#define AT91C_EBI_NWS_3 ((unsigned int) 0x2 << 2) // (EBI) 3 wait state
#define AT91C_EBI_NWS_4 ((unsigned int) 0x3 << 2) // (EBI) 4 wait state
#define AT91C_EBI_NWS_5 ((unsigned int) 0x4 << 2) // (EBI) 5 wait state
#define AT91C_EBI_NWS_6 ((unsigned int) 0x5 << 2) // (EBI) 6 wait state
#define AT91C_EBI_NWS_7 ((unsigned int) 0x6 << 2) // (EBI) 7 wait state
#define AT91C_EBI_NWS_8 ((unsigned int) 0x7 << 2) // (EBI) 8 wait state
#define AT91C_EBI_WSE ((unsigned int) 0x1 << 5) // (EBI) Wait State Enable
#define AT91C_EBI_PAGES ((unsigned int) 0x3 << 7) // (EBI) Pages Size
#define AT91C_EBI_PAGES_1M ((unsigned int) 0x0 << 7) // (EBI) 1M Byte
#define AT91C_EBI_PAGES_4M ((unsigned int) 0x1 << 7) // (EBI) 4M Byte
#define AT91C_EBI_PAGES_16M ((unsigned int) 0x2 << 7) // (EBI) 16M Byte
#define AT91C_EBI_PAGES_64M ((unsigned int) 0x3 << 7) // (EBI) 64M Byte
#define AT91C_EBI_TDF ((unsigned int) 0x7 << 9) // (EBI) Data Float Output Time
#define AT91C_EBI_TDF_0 ((unsigned int) 0x0 << 9) // (EBI) 1 TDF
#define AT91C_EBI_TDF_1 ((unsigned int) 0x1 << 9) // (EBI) 2 TDF
#define AT91C_EBI_TDF_2 ((unsigned int) 0x2 << 9) // (EBI) 3 TDF
#define AT91C_EBI_TDF_3 ((unsigned int) 0x3 << 9) // (EBI) 4 TDF
#define AT91C_EBI_TDF_4 ((unsigned int) 0x4 << 9) // (EBI) 5 TDF
#define AT91C_EBI_TDF_5 ((unsigned int) 0x5 << 9) // (EBI) 6 TDF
#define AT91C_EBI_TDF_6 ((unsigned int) 0x6 << 9) // (EBI) 7 TDF
#define AT91C_EBI_TDF_7 ((unsigned int) 0x7 << 9) // (EBI) 8 TDF
#define AT91C_EBI_BAT ((unsigned int) 0x1 << 12) // (EBI) Byte Access Type
#define AT91C_EBI_CSEN ((unsigned int) 0x1 << 13) // (EBI) Chip Select Enable
#define AT91C_EBI_BA ((unsigned int) 0xFFF << 20) // (EBI) Base Address
// -------- EBI_RCR : (EBI Offset: 0x20) Remap Control Register --------
#define AT91C_EBI_RCB ((unsigned int) 0x1 << 0) // (EBI) 0 = No effect. 1 = Cancels the remapping (performed at reset) of the page zero memory devices.
// -------- EBI_MCR : (EBI Offset: 0x24) Memory Control Register --------
#define AT91C_EBI_ALE ((unsigned int) 0x7 << 0) // (EBI) Address Line Enable
#define AT91C_EBI_ALE_16M ((unsigned int) 0x0) // (EBI) Valid Address Bits = A20, A21, A22, A23 Max Addressable Space = 16M Bytes Valid Chip Select=None
#define AT91C_EBI_ALE_8M ((unsigned int) 0x4) // (EBI) Valid Address Bits = A20, A21, A22 Max Addressable Space = 8M Bytes Valid Chip Select = CS4
#define AT91C_EBI_ALE_4M ((unsigned int) 0x5) // (EBI) Valid Address Bits = A20, A21 Max Addressable Space = 4M Bytes Valid Chip Select = CS4, CS5
#define AT91C_EBI_ALE_2M ((unsigned int) 0x6) // (EBI) Valid Address Bits = A20 Max Addressable Space = 2M Bytes Valid Chip Select = CS4, CS5, CS6
#define AT91C_EBI_ALE_1M ((unsigned int) 0x7) // (EBI) Valid Address Bits = None Max Addressable Space = 1M Byte Valid Chip Select = CS4, CS5, CS6, CS7
#define AT91C_EBI_DRP ((unsigned int) 0x1 << 4) // (EBI)
// *****************************************************************************
// REGISTER ADDRESS DEFINITION FOR AT91R40008
// *****************************************************************************
// ========== Register definition for AIC peripheral ==========
#define AT91C_AIC_EOICR ((AT91_REG *) 0xFFFFF130) // (AIC) End of Interrupt Command Register
#define AT91C_AIC_ICCR ((AT91_REG *) 0xFFFFF128) // (AIC) Interrupt Clear Command Register
#define AT91C_AIC_IECR ((AT91_REG *) 0xFFFFF120) // (AIC) Interrupt Enable Command Register
#define AT91C_AIC_SVR ((AT91_REG *) 0xFFFFF080) // (AIC) Source Vector egister
#define AT91C_AIC_SMR ((AT91_REG *) 0xFFFFF000) // (AIC) Source Mode egister
#define AT91C_AIC_SPU ((AT91_REG *) 0xFFFFF134) // (AIC) Spurious Vector Register
#define AT91C_AIC_FVR ((AT91_REG *) 0xFFFFF104) // (AIC) FIQ Vector Register
#define AT91C_AIC_IVR ((AT91_REG *) 0xFFFFF100) // (AIC) IRQ Vector Register
#define AT91C_AIC_ISR ((AT91_REG *) 0xFFFFF108) // (AIC) Interrupt Status Register
#define AT91C_AIC_IMR ((AT91_REG *) 0xFFFFF110) // (AIC) Interrupt Mask Register
#define AT91C_AIC_ISCR ((AT91_REG *) 0xFFFFF12C) // (AIC) Interrupt Set Command Register
#define AT91C_AIC_IPR ((AT91_REG *) 0xFFFFF10C) // (AIC) Interrupt Pending Register
#define AT91C_AIC_CISR ((AT91_REG *) 0xFFFFF114) // (AIC) Core Interrupt Status Register
#define AT91C_AIC_IDCR ((AT91_REG *) 0xFFFFF124) // (AIC) Interrupt Disable Command egister
// ========== Register definition for WD peripheral ==========
#define AT91C_WD_SR ((AT91_REG *) 0xFFFF800C) // (WD) Status Register
#define AT91C_WD_CMR ((AT91_REG *) 0xFFFF8004) // (WD) Clock Mode Register
#define AT91C_WD_CR ((AT91_REG *) 0xFFFF8008) // (WD) Control Register
#define AT91C_WD_OMR ((AT91_REG *) 0xFFFF8000) // (WD) Overflow Mode Register
// ========== Register definition for PS peripheral ==========
#define AT91C_PS_PCDR ((AT91_REG *) 0xFFFF4008) // (PS) Peripheral Clock Disable Register
#define AT91C_PS_CR ((AT91_REG *) 0xFFFF4000) // (PS) Control Register
#define AT91C_PS_PCSR ((AT91_REG *) 0xFFFF400C) // (PS) Peripheral Clock Status Register
#define AT91C_PS_PCER ((AT91_REG *) 0xFFFF4004) // (PS) Peripheral Clock Enable Register
// ========== Register definition for PIO peripheral ==========
#define AT91C_PIO_MDSR ((AT91_REG *) 0xFFFF0058) // (PIO) Multi-driver Status Register
#define AT91C_PIO_IFSR ((AT91_REG *) 0xFFFF0028) // (PIO) Input Filter Status Register
#define AT91C_PIO_IFER ((AT91_REG *) 0xFFFF0020) // (PIO) Input Filter Enable Register
#define AT91C_PIO_OSR ((AT91_REG *) 0xFFFF0018) // (PIO) Output Status Register
#define AT91C_PIO_OER ((AT91_REG *) 0xFFFF0010) // (PIO) Output Enable Register
#define AT91C_PIO_PSR ((AT91_REG *) 0xFFFF0008) // (PIO) PIO Status Register
#define AT91C_PIO_PDSR ((AT91_REG *) 0xFFFF003C) // (PIO) Pin Data Status Register
#define AT91C_PIO_CODR ((AT91_REG *) 0xFFFF0034) // (PIO) Clear Output Data Register
#define AT91C_PIO_IFDR ((AT91_REG *) 0xFFFF0024) // (PIO) Input Filter Disable Register
#define AT91C_PIO_MDER ((AT91_REG *) 0xFFFF0050) // (PIO) Multi-driver Enable Register
#define AT91C_PIO_IMR ((AT91_REG *) 0xFFFF0048) // (PIO) Interrupt Mask Register
#define AT91C_PIO_IER ((AT91_REG *) 0xFFFF0040) // (PIO) Interrupt Enable Register
#define AT91C_PIO_ODSR ((AT91_REG *) 0xFFFF0038) // (PIO) Output Data Status Register
#define AT91C_PIO_SODR ((AT91_REG *) 0xFFFF0030) // (PIO) Set Output Data Register
#define AT91C_PIO_PER ((AT91_REG *) 0xFFFF0000) // (PIO) PIO Enable Register
#define AT91C_PIO_MDDR ((AT91_REG *) 0xFFFF0054) // (PIO) Multi-driver Disable Register
#define AT91C_PIO_ISR ((AT91_REG *) 0xFFFF004C) // (PIO) Interrupt Status Register
#define AT91C_PIO_IDR ((AT91_REG *) 0xFFFF0044) // (PIO) Interrupt Disable Register
#define AT91C_PIO_PDR ((AT91_REG *) 0xFFFF0004) // (PIO) PIO Disable Register
#define AT91C_PIO_ODR ((AT91_REG *) 0xFFFF0014) // (PIO) Output Disable Registerr
// ========== Register definition for TC2 peripheral ==========
#define AT91C_TC2_IDR ((AT91_REG *) 0xFFFE00A8) // (TC2) Interrupt Disable Register
#define AT91C_TC2_SR ((AT91_REG *) 0xFFFE00A0) // (TC2) Status Register
#define AT91C_TC2_RB ((AT91_REG *) 0xFFFE0098) // (TC2) Register B
#define AT91C_TC2_CV ((AT91_REG *) 0xFFFE0090) // (TC2) Counter Value
#define AT91C_TC2_CCR ((AT91_REG *) 0xFFFE0080) // (TC2) Channel Control Register
#define AT91C_TC2_IMR ((AT91_REG *) 0xFFFE00AC) // (TC2) Interrupt Mask Register
#define AT91C_TC2_IER ((AT91_REG *) 0xFFFE00A4) // (TC2) Interrupt Enable Register
#define AT91C_TC2_RC ((AT91_REG *) 0xFFFE009C) // (TC2) Register C
#define AT91C_TC2_RA ((AT91_REG *) 0xFFFE0094) // (TC2) Register A
#define AT91C_TC2_CMR ((AT91_REG *) 0xFFFE0084) // (TC2) Channel Mode Register
// ========== Register definition for TC1 peripheral ==========
#define AT91C_TC1_IDR ((AT91_REG *) 0xFFFE0068) // (TC1) Interrupt Disable Register
#define AT91C_TC1_SR ((AT91_REG *) 0xFFFE0060) // (TC1) Status Register
#define AT91C_TC1_RB ((AT91_REG *) 0xFFFE0058) // (TC1) Register B
#define AT91C_TC1_CV ((AT91_REG *) 0xFFFE0050) // (TC1) Counter Value
#define AT91C_TC1_CCR ((AT91_REG *) 0xFFFE0040) // (TC1) Channel Control Register
#define AT91C_TC1_IMR ((AT91_REG *) 0xFFFE006C) // (TC1) Interrupt Mask Register
#define AT91C_TC1_IER ((AT91_REG *) 0xFFFE0064) // (TC1) Interrupt Enable Register
#define AT91C_TC1_RC ((AT91_REG *) 0xFFFE005C) // (TC1) Register C
#define AT91C_TC1_RA ((AT91_REG *) 0xFFFE0054) // (TC1) Register A
#define AT91C_TC1_CMR ((AT91_REG *) 0xFFFE0044) // (TC1) Channel Mode Register
// ========== Register definition for TC0 peripheral ==========
#define AT91C_TC0_IDR ((AT91_REG *) 0xFFFE0028) // (TC0) Interrupt Disable Register
#define AT91C_TC0_SR ((AT91_REG *) 0xFFFE0020) // (TC0) Status Register
#define AT91C_TC0_RB ((AT91_REG *) 0xFFFE0018) // (TC0) Register B
#define AT91C_TC0_CV ((AT91_REG *) 0xFFFE0010) // (TC0) Counter Value
#define AT91C_TC0_CCR ((AT91_REG *) 0xFFFE0000) // (TC0) Channel Control Register
#define AT91C_TC0_IMR ((AT91_REG *) 0xFFFE002C) // (TC0) Interrupt Mask Register
#define AT91C_TC0_IER ((AT91_REG *) 0xFFFE0024) // (TC0) Interrupt Enable Register
#define AT91C_TC0_RC ((AT91_REG *) 0xFFFE001C) // (TC0) Register C
#define AT91C_TC0_RA ((AT91_REG *) 0xFFFE0014) // (TC0) Register A
#define AT91C_TC0_CMR ((AT91_REG *) 0xFFFE0004) // (TC0) Channel Mode Register
// ========== Register definition for TCB0 peripheral ==========
#define AT91C_TCB0_BCR ((AT91_REG *) 0xFFFE00C0) // (TCB0) TC Block Control Register
#define AT91C_TCB0_BMR ((AT91_REG *) 0xFFFE00C4) // (TCB0) TC Block Mode Register
// ========== Register definition for PDC_US1 peripheral ==========
#define AT91C_US1_TPR ((AT91_REG *) 0xFFFC4038) // (PDC_US1) Transmit Pointer Register
#define AT91C_US1_RPR ((AT91_REG *) 0xFFFC4030) // (PDC_US1) Receive Pointer Register
#define AT91C_US1_TCR ((AT91_REG *) 0xFFFC403C) // (PDC_US1) Transmit Counter Register
#define AT91C_US1_RCR ((AT91_REG *) 0xFFFC4034) // (PDC_US1) Receive Counter Register
// ========== Register definition for US1 peripheral ==========
#define AT91C_US1_RTOR ((AT91_REG *) 0xFFFCC024) // (US1) Receiver Time-out Register
#define AT91C_US1_THR ((AT91_REG *) 0xFFFCC01C) // (US1) Transmitter Holding Register
#define AT91C_US1_CSR ((AT91_REG *) 0xFFFCC014) // (US1) Channel Status Register
#define AT91C_US1_IDR ((AT91_REG *) 0xFFFCC00C) // (US1) Interrupt Disable Register
#define AT91C_US1_MR ((AT91_REG *) 0xFFFCC004) // (US1) Mode Register
#define AT91C_US1_TTGR ((AT91_REG *) 0xFFFCC028) // (US1) Transmitter Time-guard Register
#define AT91C_US1_BRGR ((AT91_REG *) 0xFFFCC020) // (US1) Baud Rate Generator Register
#define AT91C_US1_RHR ((AT91_REG *) 0xFFFCC018) // (US1) Receiver Holding Register
#define AT91C_US1_IMR ((AT91_REG *) 0xFFFCC010) // (US1) Interrupt Mask Register
#define AT91C_US1_IER ((AT91_REG *) 0xFFFCC008) // (US1) Interrupt Enable Register
#define AT91C_US1_CR ((AT91_REG *) 0xFFFCC000) // (US1) Control Register
// ========== Register definition for PDC_US0 peripheral ==========
#define AT91C_US0_TPR ((AT91_REG *) 0xFFFC0038) // (PDC_US0) Transmit Pointer Register
#define AT91C_US0_RPR ((AT91_REG *) 0xFFFC0030) // (PDC_US0) Receive Pointer Register
#define AT91C_US0_TCR ((AT91_REG *) 0xFFFC003C) // (PDC_US0) Transmit Counter Register
#define AT91C_US0_RCR ((AT91_REG *) 0xFFFC0034) // (PDC_US0) Receive Counter Register
// ========== Register definition for US0 peripheral ==========
#define AT91C_US0_RTOR ((AT91_REG *) 0xFFFD0024) // (US0) Receiver Time-out Register
#define AT91C_US0_THR ((AT91_REG *) 0xFFFD001C) // (US0) Transmitter Holding Register
#define AT91C_US0_CSR ((AT91_REG *) 0xFFFD0014) // (US0) Channel Status Register
#define AT91C_US0_IDR ((AT91_REG *) 0xFFFD000C) // (US0) Interrupt Disable Register
#define AT91C_US0_MR ((AT91_REG *) 0xFFFD0004) // (US0) Mode Register
#define AT91C_US0_TTGR ((AT91_REG *) 0xFFFD0028) // (US0) Transmitter Time-guard Register
#define AT91C_US0_BRGR ((AT91_REG *) 0xFFFD0020) // (US0) Baud Rate Generator Register
#define AT91C_US0_RHR ((AT91_REG *) 0xFFFD0018) // (US0) Receiver Holding Register
#define AT91C_US0_IMR ((AT91_REG *) 0xFFFD0010) // (US0) Interrupt Mask Register
#define AT91C_US0_IER ((AT91_REG *) 0xFFFD0008) // (US0) Interrupt Enable Register
#define AT91C_US0_CR ((AT91_REG *) 0xFFFD0000) // (US0) Control Register
// ========== Register definition for SF peripheral ==========
#define AT91C_SF_PMR ((AT91_REG *) 0xFFF00018) // (SF) Protect Mode Register
#define AT91C_SF_RSR ((AT91_REG *) 0xFFF00008) // (SF) Reset Status Register
#define AT91C_SF_CIDR ((AT91_REG *) 0xFFF00000) // (SF) Chip ID Register
#define AT91C_SF_MMR ((AT91_REG *) 0xFFF0000C) // (SF) Memory Mode Register
#define AT91C_SF_EXID ((AT91_REG *) 0xFFF00004) // (SF) Chip ID Extension Register
// ========== Register definition for EBI peripheral ==========
#define AT91C_EBI_RCR ((AT91_REG *) 0xFFE00020) // (EBI) Remap Control Register
#define AT91C_EBI_CSR ((AT91_REG *) 0xFFE00000) // (EBI) Chip-select Register
#define AT91C_EBI_MCR ((AT91_REG *) 0xFFE00024) // (EBI) Memory Control Register
// *****************************************************************************
// PIO DEFINITIONS FOR AT91R40008
// *****************************************************************************
#define AT91C_PIO_P0 ((unsigned int) 1 << 0) // Pin Controlled by P0
#define AT91C_P0_TCLK0 ((unsigned int) AT91C_PIO_P0) // Timer 0 Clock signal
#define AT91C_PIO_P1 ((unsigned int) 1 << 1) // Pin Controlled by P1
#define AT91C_P1_TIOA0 ((unsigned int) AT91C_PIO_P1) // Timer 0 Signal A
#define AT91C_PIO_P10 ((unsigned int) 1 << 10) // Pin Controlled by P10
#define AT91C_P10_IRQ1 ((unsigned int) AT91C_PIO_P10) // External Interrupt 1
#define AT91C_PIO_P11 ((unsigned int) 1 << 11) // Pin Controlled by P11
#define AT91C_P11_IRQ2 ((unsigned int) AT91C_PIO_P11) // External Interrupt 2
#define AT91C_PIO_P12 ((unsigned int) 1 << 12) // Pin Controlled by P12
#define AT91C_P12_FIQ ((unsigned int) AT91C_PIO_P12) // Fast External Interrupt
#define AT91C_PIO_P13 ((unsigned int) 1 << 13) // Pin Controlled by P13
#define AT91C_P13_SCK0 ((unsigned int) AT91C_PIO_P13) // USART 0 Serial Clock
#define AT91C_PIO_P14 ((unsigned int) 1 << 14) // Pin Controlled by P14
#define AT91C_P14_TXD0 ((unsigned int) AT91C_PIO_P14) // USART 0 Transmit Data
#define AT91C_PIO_P15 ((unsigned int) 1 << 15) // Pin Controlled by P15
#define AT91C_P15_RXD0 ((unsigned int) AT91C_PIO_P15) // USART 0 Receive Data
#define AT91C_PIO_P16 ((unsigned int) 1 << 16) // Pin Controlled by P16
#define AT91C_PIO_P17 ((unsigned int) 1 << 17) // Pin Controlled by P17
#define AT91C_PIO_P18 ((unsigned int) 1 << 18) // Pin Controlled by P18
#define AT91C_PIO_P19 ((unsigned int) 1 << 19) // Pin Controlled by P19
#define AT91C_PIO_P2 ((unsigned int) 1 << 2) // Pin Controlled by P2
#define AT91C_P2_TIOB0 ((unsigned int) AT91C_PIO_P2) // Timer 0 Signal B
#define AT91C_PIO_P20 ((unsigned int) 1 << 20) // Pin Controlled by P20
#define AT91C_P20_SCK1 ((unsigned int) AT91C_PIO_P20) // USART 1 Serial Clock
#define AT91C_PIO_P21 ((unsigned int) 1 << 21) // Pin Controlled by P21
#define AT91C_P21_TXD1 ((unsigned int) AT91C_PIO_P21) // USART 1 Transmit Data
#define AT91C_P21_NTRI ((unsigned int) AT91C_PIO_P21) // Tri-state Mode
#define AT91C_PIO_P22 ((unsigned int) 1 << 22) // Pin Controlled by P22
#define AT91C_P22_RXD1 ((unsigned int) AT91C_PIO_P22) // USART 1 Receive Data
#define AT91C_PIO_P23 ((unsigned int) 1 << 23) // Pin Controlled by P23
#define AT91C_PIO_P24 ((unsigned int) 1 << 24) // Pin Controlled by P24
#define AT91C_P24_BMS ((unsigned int) AT91C_PIO_P24) // Boot Mode Select
#define AT91C_PIO_P25 ((unsigned int) 1 << 25) // Pin Controlled by P25
#define AT91C_P25_MCKO ((unsigned int) AT91C_PIO_P25) // Master Clock Out
#define AT91C_PIO_P26 ((unsigned int) 1 << 26) // Pin Controlled by P26
#define AT91C_P26_NCS2 ((unsigned int) AT91C_PIO_P26) // Chip Select 2
#define AT91C_PIO_P27 ((unsigned int) 1 << 27) // Pin Controlled by P27
#define AT91C_P27_NCS3 ((unsigned int) AT91C_PIO_P27) // Chip Select 3
#define AT91C_PIO_P28 ((unsigned int) 1 << 28) // Pin Controlled by P28
#define AT91C_P28_A20 ((unsigned int) AT91C_PIO_P28) // Address line A20
#define AT91C_P28_NCS7 ((unsigned int) AT91C_PIO_P28) // Chip Select 7
#define AT91C_PIO_P29 ((unsigned int) 1 << 29) // Pin Controlled by P29
#define AT91C_P29_A21 ((unsigned int) AT91C_PIO_P29) // Address line A21
#define AT91C_P29_NCS6 ((unsigned int) AT91C_PIO_P29) // Chip Select 6
#define AT91C_PIO_P3 ((unsigned int) 1 << 3) // Pin Controlled by P3
#define AT91C_P3_TCLK1 ((unsigned int) AT91C_PIO_P3) // Timer 1 Clock signal
#define AT91C_PIO_P30 ((unsigned int) 1 << 30) // Pin Controlled by P30
#define AT91C_P30_A22 ((unsigned int) AT91C_PIO_P30) // Address line A22
#define AT91C_P30_NCS5 ((unsigned int) AT91C_PIO_P30) // Chip Select 5
#define AT91C_PIO_P31 ((unsigned int) 1 << 31) // Pin Controlled by P31
#define AT91C_P31_A23 ((unsigned int) AT91C_PIO_P31) // Address line A23
#define AT91C_P31_NCS4 ((unsigned int) AT91C_PIO_P31) // Chip Select 4
#define AT91C_PIO_P4 ((unsigned int) 1 << 4) // Pin Controlled by P4
#define AT91C_P4_TIOA1 ((unsigned int) AT91C_PIO_P4) // Timer 1 Signal A
#define AT91C_PIO_P5 ((unsigned int) 1 << 5) // Pin Controlled by P5
#define AT91C_P5_TIOB1 ((unsigned int) AT91C_PIO_P5) // Timer 1 Signal B
#define AT91C_PIO_P6 ((unsigned int) 1 << 6) // Pin Controlled by P6
#define AT91C_P6_TCLK2 ((unsigned int) AT91C_PIO_P6) // Timer 2 Clock signal
#define AT91C_PIO_P7 ((unsigned int) 1 << 7) // Pin Controlled by P7
#define AT91C_P7_TIOA2 ((unsigned int) AT91C_PIO_P7) // Timer 2 Signal A
#define AT91C_PIO_P8 ((unsigned int) 1 << 8) // Pin Controlled by P8
#define AT91C_P8_TIOB2 ((unsigned int) AT91C_PIO_P8) // Timer 2 Signal B
#define AT91C_PIO_P9 ((unsigned int) 1 << 9) // Pin Controlled by P9
#define AT91C_P9_IRQ0 ((unsigned int) AT91C_PIO_P9) // External Interrupt 0
// *****************************************************************************
// PERIPHERAL ID DEFINITIONS FOR AT91R40008
// *****************************************************************************
#define AT91C_ID_FIQ ((unsigned int) 0) // Advanced Interrupt Controller (FIQ)
#define AT91C_ID_SYS ((unsigned int) 1) // SWI
#define AT91C_ID_US0 ((unsigned int) 2) // USART 0
#define AT91C_ID_US1 ((unsigned int) 3) // USART 1
#define AT91C_ID_TC0 ((unsigned int) 4) // Timer Counter 0
#define AT91C_ID_TC1 ((unsigned int) 5) // Timer Counter 1
#define AT91C_ID_TC2 ((unsigned int) 6) // Timer Counter 2
#define AT91C_ID_WD ((unsigned int) 7) // Watchdog Timer
#define AT91C_ID_PIO ((unsigned int) 8) // Parallel IO Controller
#define AT91C_ID_IRQ0 ((unsigned int) 16) // Advanced Interrupt Controller (IRQ0)
#define AT91C_ID_IRQ1 ((unsigned int) 17) // Advanced Interrupt Controller (IRQ1)
#define AT91C_ID_IRQ2 ((unsigned int) 18) // Advanced Interrupt Controller (IRQ2)
// *****************************************************************************
// BASE ADDRESS DEFINITIONS FOR AT91R40008
// *****************************************************************************
#define AT91C_BASE_AIC ((AT91PS_AIC) 0xFFFFF000) // (AIC) Base Address
#define AT91C_BASE_WD ((AT91PS_WD) 0xFFFF8000) // (WD) Base Address
#define AT91C_BASE_PS ((AT91PS_PS) 0xFFFF4000) // (PS) Base Address
#define AT91C_BASE_PIO ((AT91PS_PIO) 0xFFFF0000) // (PIO) Base Address
#define AT91C_BASE_TC2 ((AT91PS_TC) 0xFFFE0080) // (TC2) Base Address
#define AT91C_BASE_TC1 ((AT91PS_TC) 0xFFFE0040) // (TC1) Base Address
#define AT91C_BASE_TC0 ((AT91PS_TC) 0xFFFE0000) // (TC0) Base Address
#define AT91C_BASE_TCB0 ((AT91PS_TCB) 0xFFFE0000) // (TCB0) Base Address
#define AT91C_BASE_PDC_US1 ((AT91PS_PDC) 0xFFFC4030) // (PDC_US1) Base Address
#define AT91C_BASE_US1 ((AT91PS_USART) 0xFFFCC000) // (US1) Base Address
#define AT91C_BASE_PDC_US0 ((AT91PS_PDC) 0xFFFC0030) // (PDC_US0) Base Address
#define AT91C_BASE_US0 ((AT91PS_USART) 0xFFFD0000) // (US0) Base Address
#define AT91C_BASE_SF ((AT91PS_SF) 0xFFF00000) // (SF) Base Address
#define AT91C_BASE_EBI ((AT91PS_EBI) 0xFFE00000) // (EBI) Base Address
// *****************************************************************************
// MEMORY MAPPING DEFINITIONS FOR AT91R40008
// *****************************************************************************
#define AT91C_SRAM_BEFORE_REMAP ((char *) 0x00300000) // Internal SRAM before remap base address
#define AT91C_SRAM_BEFORE_REMAP_SIZE ((unsigned int) 0x00040000) // Internal SRAM before remap size in byte (256 Kbyte)
#define AT91C_SRAM_AFTER_REMAP ((char *) 0x00000000) // Internal SRAM after remap base address
#define AT91C_SRAM_AFTER_REMAP_SIZE ((unsigned int) 0x00040000) // Internal SRAM after remap size in byte (256 Kbyte)
#endif

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@@ -1,24 +0,0 @@
[SETUP]
CpuVendor=Atmel
CpuChip=AT91R40807
FlashVendor=Atmel
FlashChip=AT49BV/F1614A
RamAddress=$00000000
RamSupport=1
FlashAddress=$01000000
FlashWidth=16
FlashChipsPerSector=1
LittleEndian=0
SectStart=0
SectEnd=38
AutoErase=0
AutoVerify=1
CpuEndian=LITTLE
SimCount=3
MemoryCount=0
ProgramFile=E:\temp\embesttest\Demo\ARM7_AT91R40008_GCC_Embest\rtosdemo.hex
UploadFile=c:\EB40_Lower.bin
Format=Intel Hex
Sim3=EBI_RCR:$00000001
Sim2=EBI_CSR1:$02002122
Sim1=EBI_CSR0:$01002539

View File

@@ -1,105 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <AT91R40008.h>
#define configFLASH_SPEED_NSEC 100 /* External flash access speed (for ROM builds) */
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*/
/*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned long ) 66000000 ) /* = 66.000MHz clk gen */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 25 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

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@@ -1,125 +0,0 @@
#/*
# FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
#
#
# ***************************************************************************
# * *
# * FreeRTOS tutorial books are available in pdf and paperback. *
# * Complete, revised, and edited pdf reference manuals are also *
# * available. *
# * *
# * Purchasing FreeRTOS documentation will not only help you, by *
# * ensuring you get running as quickly as possible and with an *
# * in-depth knowledge of how to use FreeRTOS, it will also help *
# * the FreeRTOS project to continue with its mission of providing *
# * professional grade, cross platform, de facto standard solutions *
# * for microcontrollers - completely free of charge! *
# * *
# * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
# * *
# * Thank you for using FreeRTOS, and thank you for your support! *
# * *
# ***************************************************************************
#
#
# This file is part of the FreeRTOS distribution.
#
# FreeRTOS is free software; you can redistribute it and/or modify it under
# the terms of the GNU General Public License (version 2) as published by the
# Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
# >>>NOTE<<< The modification to the GPL is included to allow you to
# distribute a combined work that includes FreeRTOS without being obliged to
# provide the source code for proprietary components outside of the FreeRTOS
# kernel. FreeRTOS is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
# more details. You should have received a copy of the GNU General Public
# License and the FreeRTOS license exception along with FreeRTOS; if not it
# can be viewed here: http://www.freertos.org/a00114.html and also obtained
# by writing to Richard Barry, contact details for whom are available on the
# FreeRTOS WEB site.
#
# 1 tab == 4 spaces!
#
# http://www.FreeRTOS.org - Documentation, latest information, license and
# contact details.
#
# http://www.SafeRTOS.com - A version that is certified for use in safety
# critical systems.
#
# http://www.OpenRTOS.com - Commercial support, development, porting,
# licensing and training services.
#*/
CC=arm-elf-gcc
OBJCOPY=arm-elf-objcopy
ARCH=arm-elf-ar
CRT0=boot.s
#
# CFLAGS common to both the THUMB and ARM mode builds
#
CFLAGS=-Wall -Wextra -D $(RUN_MODE) -D GCC_AT91FR40008 -I. -I../../Source/include \
-I../Common/include $(DEBUG) -mcpu=arm7tdmi -T$(LDSCRIPT) \
-Wcast-align $(OPTIM) -fomit-frame-pointer -fno-strict-aliasing \
-fno-dwarf2-cfi-asm
ifeq ($(USE_THUMB_MODE),YES)
CFLAGS += -mthumb-interwork -D THUMB_INTERWORK
THUMB_FLAGS=-mthumb
endif
LINKER_FLAGS=-Xlinker -ortosdemo.elf -Xlinker -M -Xlinker -Map=rtosdemo.map
#
# Source files that can be built to THUMB mode.
#
THUMB_SRC = \
main.c \
serial/serial.c \
ParTest/ParTest.c \
../Common/Minimal/integer.c \
../Common/Minimal/flash.c \
../Common/Minimal/PollQ.c \
../Common/Minimal/comtest.c \
../Common/Minimal/flop.c \
../Common/Minimal/semtest.c \
../Common/Minimal/dynamic.c \
../Common/Minimal/BlockQ.c \
../../Source/tasks.c \
../../Source/queue.c \
../../Source/list.c \
../../Source/portable/MemMang/heap_2.c \
../../Source/portable/GCC/ARM7_AT91FR40008/port.c
#
# Source files that must be built to ARM mode.
#
ARM_SRC = \
../../Source/portable/GCC/ARM7_AT91FR40008/portISR.c \
serial/serialISR.c
#
# Define all object files.
#
ARM_OBJ = $(ARM_SRC:.c=.o)
THUMB_OBJ = $(THUMB_SRC:.c=.o)
rtosdemo.hex : rtosdemo.elf
$(OBJCOPY) rtosdemo.elf -O ihex rtosdemo.hex
rtosdemo.elf : $(ARM_OBJ) $(THUMB_OBJ) $(CRT0) Makefile
$(CC) $(CFLAGS) $(ARM_OBJ) $(THUMB_OBJ) -nostartfiles $(CRT0) $(LINKER_FLAGS)
$(THUMB_OBJ) : %.o : %.c $(LDSCRIPT) Makefile
$(CC) -c $(THUMB_FLAGS) $(CFLAGS) $< -o $@
$(ARM_OBJ) : %.o : %.c $(LDSCRIPT) Makefile
$(CC) -c $(CFLAGS) $< -o $@
clean :
touch Makefile
rm $(ARM_OBJ)
rm $(THUMB_OBJ)

View File

@@ -1,141 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "portable.h"
/* Demo app includes. */
#include "partest.h"
/* Hardware specific definitions. */
#include "AT91R40008.h"
#include "pio.h"
#include "aic.h"
#define partstNUM_LEDS ( 8 )
#define partstALL_OUTPUTS_OFF ( ( unsigned long ) ~(0xFFFFFFFF << partstNUM_LEDS) )
static unsigned long ulLEDReg;
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
static void SetLeds (unsigned int leds)
{
unsigned long ulPIOSetReg, ulPIOClearReg;
/* LEDs are grouped in different port bits: P3-P6 and P16-P19.
A port bit set to '0' turns an LED on, '1' turns it off. */
ulPIOSetReg = ( (leds & 0xF) << 16 ) | ( (leds & 0xF0) >> 1 );
ulPIOClearReg = (~ulPIOSetReg) & 0x000F0078;
AT91C_BASE_PIO->PIO_SODR = ulPIOSetReg;
AT91C_BASE_PIO->PIO_CODR = ulPIOClearReg;
}
/*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* This is performed from main() as the io bits are shared with other setup
functions. Ensure the outputs are off to start. */
ulLEDReg = partstALL_OUTPUTS_OFF;
/* Enable clock to PIO... */
AT91C_BASE_PS->PS_PCER = AT91C_PS_PIO;
/* Enable all 8 LEDs and the four switches to be controlled by PIO... */
AT91C_BASE_PIO->PIO_PER = P3 | P4 | P5 | P6 | P16 | P17 | P18 | P19 | P1 | P2 | P9 | P12;
/* Configure all LED PIO lines for output... */
AT91C_BASE_PIO->PIO_OER = P3 | P4 | P5 | P6 | P16 | P17 | P18 | P19;
/* Configure all switch PIO lines for input... */
AT91C_BASE_PIO->PIO_ODR = P1 | P2 | P9 | P12;
/* Set initial state of LEDs. */
SetLeds( ulLEDReg );
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
/* Switch an LED on or off as requested. */
if (uxLED < partstNUM_LEDS)
{
if( xValue )
{
ulLEDReg &= ~(1 << uxLED);
}
else
{
ulLEDReg |= (1 << uxLED);
}
SetLeds( ulLEDReg );
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
/* Toggle the state of the requested LED. */
if (uxLED < partstNUM_LEDS)
{
ulLEDReg ^= ( 1 << uxLED );
SetLeds( ulLEDReg );
}
}

View File

@@ -1,81 +0,0 @@
//*----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name : aic.h
//* Object : Advanced Interrupt Controller Definition File.
//*
//* 1.0 01/04/00 JCZ : Creation
//*----------------------------------------------------------------------------
#ifndef aic_h
#define aic_h
//#include "periph/stdc/std_c.h"
/*-----------------------------------------*/
/* AIC User Interface Structure Definition */
/*-----------------------------------------*/
typedef struct
{
at91_reg AIC_SMR[32] ; /* Source Mode Register */
at91_reg AIC_SVR[32] ; /* Source Vector Register */
at91_reg AIC_IVR ; /* IRQ Vector Register */
at91_reg AIC_FVR ; /* FIQ Vector Register */
at91_reg AIC_ISR ; /* Interrupt Status Register */
at91_reg AIC_IPR ; /* Interrupt Pending Register */
at91_reg AIC_IMR ; /* Interrupt Mask Register */
at91_reg AIC_CISR ; /* Core Interrupt Status Register */
at91_reg reserved0 ;
at91_reg reserved1 ;
at91_reg AIC_IECR ; /* Interrupt Enable Command Register */
at91_reg AIC_IDCR ; /* Interrupt Disable Command Register */
at91_reg AIC_ICCR ; /* Interrupt Clear Command Register */
at91_reg AIC_ISCR ; /* Interrupt Set Command Register */
at91_reg AIC_EOICR ; /* End of Interrupt Command Register */
at91_reg AIC_SPU ; /* Spurious Vector Register */
} StructAIC ;
/*--------------------------------------------*/
/* AIC_SMR[]: Interrupt Source Mode Registers */
/*--------------------------------------------*/
#define AIC_PRIOR 0x07 /* Priority */
#define AIC_SRCTYPE 0x60 /* Source Type Definition */
/* Internal Interrupts */
#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00 /* Level Sensitive */
#define AIC_SRCTYPE_INT_EDGE_TRIGGERED 0x20 /* Edge Triggered */
/* External Interrupts */
#define AIC_SRCTYPE_EXT_LOW_LEVEL 0x00 /* Low Level */
#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE 0x20 /* Negative Edge */
#define AIC_SRCTYPE_EXT_HIGH_LEVEL 0x40 /* High Level */
#define AIC_SRCTYPE_EXT_POSITIVE_EDGE 0x60 /* Positive Edge */
/*------------------------------------*/
/* AIC_ISR: Interrupt Status Register */
/*------------------------------------*/
#define AIC_IRQID 0x1F /* Current source interrupt */
/*------------------------------------------*/
/* AIC_CISR: Interrupt Core Status Register */
/*------------------------------------------*/
#define AIC_NFIQ 0x01 /* Core FIQ Status */
#define AIC_NIRQ 0x02 /* Core IRQ Status */
/*-------------------------------*/
/* Advanced Interrupt Controller */
/*-------------------------------*/
#define AIC_BASE ((StructAIC *)0xFFFFF000)
#endif /* aic_h */

View File

@@ -1,54 +0,0 @@
MEMORY
{
ram : ORIGIN = 0x00000000, LENGTH = 256K
}
__stack_end__ = 0x00000000 + 256K - 4;
SECTIONS
{
. = 0;
startup : { *(.startup)} >ram
prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >ram
__end_of_text__ = .;
.data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram
.bss :
{
__bss_beg__ = .;
*(.bss)
} >ram
. = ALIGN(4);
.eh_frame :
{
KEEP (*(.eh_frame))
} > ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);

View File

@@ -1,55 +0,0 @@
MEMORY
{
flash : ORIGIN = 0x00000000, LENGTH = 2048K
ram : ORIGIN = 0x00300000, LENGTH = 256K
}
__stack_end__ = 0x00300000 + 256K - 4;
SECTIONS
{
. = 0;
startup : { *(.startup)} >flash
prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >flash
__end_of_text__ = .;
.data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram AT>flash
.bss :
{
__bss_beg__ = .;
*(.bss)
} >ram
. = ALIGN(4);
.eh_frame :
{
KEEP (*(.eh_frame))
} > ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);

View File

@@ -1,157 +0,0 @@
/* Sample initialization file */
.extern main
.extern exit
.text
.code 32
.align 0
.extern __bss_beg__
.extern __bss_end__
.extern __stack_end__
.extern __data_beg__
.extern __data_end__
.extern __data+beg_src__
.global start
.global endless_loop
/* Stack Sizes */
.set UND_STACK_SIZE, 0x00000004
.set ABT_STACK_SIZE, 0x00000004
.set FIQ_STACK_SIZE, 0x00000004
.set IRQ_STACK_SIZE, 0X00000400
.set SVC_STACK_SIZE, 0x00000400
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.set MODE_USR, 0x10 /* User Mode */
.set MODE_FIQ, 0x11 /* FIQ Mode */
.set MODE_IRQ, 0x12 /* IRQ Mode */
.set MODE_SVC, 0x13 /* Supervisor Mode */
.set MODE_ABT, 0x17 /* Abort Mode */
.set MODE_UND, 0x1B /* Undefined Mode */
.set MODE_SYS, 0x1F /* System Mode */
.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
start:
_start:
_mainCRTStartup:
/* Setup a stack for each mode - note that this only sets up a usable stack
for system/user, SWI and IRQ modes. Also each mode is setup with
interrupts initially disabled. */
ldr r0, .LC6
msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
mov sp, r0
sub r0, r0, #UND_STACK_SIZE
msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
mov sp, r0
sub r0, r0, #ABT_STACK_SIZE
msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
mov sp, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
mov sp, r0
sub r0, r0, #IRQ_STACK_SIZE
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
mov sp, r0
sub r0, r0, #SVC_STACK_SIZE
msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */
mov sp, r0
/* We want to start in supervisor mode. Operation will switch to system
mode when the first task starts. */
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT
/* Clear BSS. */
mov a2, #0 /* Fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for Thumb */
ldr r1, .LC1 /* Start of memory block */
ldr r3, .LC2 /* End of memory block */
subs r3, r3, r1 /* Length of block */
beq .end_clear_loop
mov r2, #0
.clear_loop:
strb r2, [r1], #1
subs r3, r3, #1
bgt .clear_loop
.end_clear_loop:
/* Initialise data. */
ldr r1, .LC3 /* Start of memory block */
ldr r2, .LC4 /* End of memory block */
ldr r3, .LC5
subs r3, r3, r1 /* Length of block */
beq .end_set_loop
.set_loop:
ldrb r4, [r2], #1
strb r4, [r1], #1
subs r3, r3, #1
bgt .set_loop
.end_set_loop:
mov r0, #0 /* no arguments */
mov r1, #0 /* no argv either */
bl main
endless_loop:
b endless_loop
.align 0
.LC1:
.word __bss_beg__
.LC2:
.word __bss_end__
.LC3:
.word __data_beg__
.LC4:
.word __data_beg_src__
.LC5:
.word __data_end__
.LC6:
.word __stack_end__
/* Setup vector table. Note that undf, pabt, dabt, fiq just execute
a null loop. */
.section .startup,"ax"
.code 32
.align 0
b _start /* reset - _start */
ldr pc, _undf /* undefined - _undf */
ldr pc, _swi /* SWI - _swi */
ldr pc, _pabt /* program abort - _pabt */
ldr pc, _dabt /* data abort - _dabt */
nop /* reserved */
ldr pc, [pc,#-0xF20] /* IRQ - read the AIC */
ldr pc, _fiq /* FIQ - _fiq */
_undf: .word __undf /* undefined */
_swi: .word vPortYieldProcessor /* SWI */
_pabt: .word __pabt /* program abort */
_dabt: .word __dabt /* data abort */
_fiq: .word __fiq /* FIQ */
__undf: b . /* undefined */
__pabt: b . /* program abort */
__dabt: b . /* data abort */
__fiq: b . /* FIQ */

View File

@@ -1,121 +0,0 @@
//*-----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*-----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name : ebi.h
//* Object : External Bus Interface Definition File
//* Translator : ARM Software Development Toolkit V2.11a
//*
//* 1.0 03/11/97 JCZ : Creation
//* 2.0 21/10/98 JCZ : Clean up
//*-----------------------------------------------------------------------------
#ifndef ebi_h
#define ebi_h
/*----------------------------------------*/
/* Memory Controller Interface Definition */
/*----------------------------------------*/
typedef struct
{
at91_reg EBI_CSR[8] ; /* Chip Select Register */
at91_reg EBI_RCR ; /* Remap Control Register */
at91_reg EBI_MCR ; /* Memory Control Register */
} StructEBI ;
/*-----------------------*/
/* Chip Select Registers */
/*-----------------------*/
/* Data Bus Width */
#define DataBus16 (1<<0)
#define DataBus8 (2<<0)
#define DBW (3<<0)
/* Number of Wait States */
#define B_NWS 2
#define WaitState1 (0<<B_NWS)
#define WaitState2 (1<<B_NWS)
#define WaitState3 (2<<B_NWS)
#define WaitState4 (3<<B_NWS)
#define WaitState5 (4<<B_NWS)
#define WaitState6 (5<<B_NWS)
#define WaitState7 (6<<B_NWS)
#define WaitState8 (7<<B_NWS)
#define NWS (7<<B_NWS)
/* Wait State Enable */
#define WaitStateDisable (0<<5)
#define WaitStateEnable (1<<5)
#define WSE (1<<5)
/* Page size */
#define PageSize1M (0<<7)
#define PageSize4M (1<<7)
#define PageSize16M (2<<7)
#define PageSize64M (3<<7)
#define PAGES (3<<7)
/* Number of Data Float Output Time Clock Cycle */
#define B_TDF 9
#define tDF_0cycle (0<<B_TDF)
#define tDF_1cycle (1<<B_TDF)
#define tDF_2cycle (2<<B_TDF)
#define tDF_3cycle (3<<B_TDF)
#define tDF_4cycle (4<<B_TDF)
#define tDF_5cycle (5<<B_TDF)
#define tDF_6cycle (6<<B_TDF)
#define tDF_7cycle (7<<B_TDF)
#define TDF (7<<B_TDF)
/* Byte Access Type */
#define ByteWriteAccessType (0<<12)
#define ByteSelectAccessType (1<<12)
#define BAT 1<<12)
/* Chip Select Enable */
#define CSEnable (1<<13)
#define CSDisable (0<<13)
#define CSE (1<<13)
#define BA ((u_int)(0xFFF)<<20)
/*-------------------------*/
/* Memory Control Register */
/*-------------------------*/
/* Address Line Enable */
#define ALE (7<<0)
#define BankSize16M (0<<0)
#define BankSize8M (4<<0)
#define BankSize4M (5<<0)
#define BankSize2M (6<<0)
#define BankSize1M (7<<0)
/* Data Read Protocol */
#define StandardReadProtocol (0<<4)
#define EarlyReadProtocol (1<<4)
#define DRP (1<<4)
/*------------------------*/
/* Remap Control Register */
/*------------------------*/
#define RCB (1<<0)
/*--------------------------------*/
/* Device Dependancies Definition */
/*--------------------------------*/
#ifdef AT91M40400
/* External Bus Interface User Interface BAse Address */
#define EBI_BASE ((StructEBI *) 0xFFE00000)
#endif
#endif /* ebi_h */

View File

@@ -1,493 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
* To check the operation of the memory allocator the check task also
* dynamically creates a task before delaying, and deletes it again when it
* wakes. If memory cannot be allocated for the new task the call to xTaskCreate
* will fail and an error is signalled. The dynamically created task itself
* allocates and frees memory just to give the allocator a bit more exercise.
*
*/
/* Standard includes. */
#include <stdlib.h>
#include <string.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo application includes. */
#include "partest.h"
#include "flash.h"
#include "integer.h"
#include "PollQ.h"
#include "comtest2.h"
#include "semtest.h"
#include "flop.h"
#include "dynamic.h"
#include "BlockQ.h"
#include "serial.h"
/* Hardware specific definitions. */
#include "aic.h"
#include "ebi.h"
/*-----------------------------------------------------------*/
/* Constants for the ComTest tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 115200 )
#define mainCOM_TEST_LED ( 5 )
/* Priorities for the demo application tasks. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* The rate at which the on board LED will toggle when there is/is not an
error. */
#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
#define mainON_BOARD_LED_BIT ( ( unsigned long ) 7 )
/* Constants used by the vMemCheckTask() task. */
#define mainCOUNT_INITIAL_VALUE ( ( unsigned long ) 0 )
#define mainNO_TASK ( 0 )
/* The size of the memory blocks allocated by the vMemCheckTask() task. */
#define mainMEM_CHECK_SIZE_1 ( ( size_t ) 51 )
#define mainMEM_CHECK_SIZE_2 ( ( size_t ) 52 )
#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 151 )
#define MAX_WAIT_STATES 8
static const unsigned long ululCSRWaitValues[ MAX_WAIT_STATES + 1 ] =
{
WaitState1,/* There is no "zero wait state" value, so use one wait state */
WaitState1,
WaitState2,
WaitState3,
WaitState4,
WaitState5,
WaitState6,
WaitState7,
WaitState8
};
/*-----------------------------------------------------------*/
/*
* Checks that all the demo application tasks are still executing without error
* - as described at the top of the file.
*/
static long prvCheckOtherTasksAreStillRunning( unsigned long ulMemCheckTaskCount );
/*
* The task that executes at the highest priority and calls
* prvCheckOtherTasksAreStillRunning(). See the description at the top
* of the file.
*/
static void vErrorChecks( void *pvParameters );
/*
* Dynamically created and deleted during each cycle of the vErrorChecks()
* task. This is done to check the operation of the memory allocator.
* See the top of vErrorChecks for more details.
*/
static void vMemCheckTask( void *pvParameters );
/*
* Configure the processor for use with the Olimex demo board. This includes
* setup for the I/O, system clock, and access timings.
*/
static void prvSetupHardware( void );
/*-----------------------------------------------------------*/
/*
* Starts all the other tasks, then starts the scheduler.
*/
int main( void )
{
/* Setup the hardware for use with the Olimex demo board. */
prvSetupHardware();
/* Start the demo/test application tasks. */
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartMathTasks( tskIDLE_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartDynamicPriorityTasks();
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
/* Start the check task - which is defined in this file. */
xTaskCreate( vErrorChecks, ( signed char * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Now all the tasks have been started - start the scheduler.
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used here. */
vTaskStartScheduler();
/* Should never reach here! */
return 0;
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;
unsigned long ulMemCheckTaskRunningCount;
xTaskHandle xCreatedTask;
/* Just to stop compiler warnings. */
( void ) pvParameters;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. If an error is detected then the delay period
is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so
the on board LED flash rate will increase.
In addition to the standard tests the memory allocator is tested through
the dynamic creation and deletion of a task each cycle. Each time the
task is created memory must be allocated for its stack. When the task is
deleted this memory is returned to the heap. If the task cannot be created
then it is likely that the memory allocation failed. */
for( ;; )
{
/* Reset xCreatedTask. This is modified by the task about to be
created so we can tell if it is executing correctly or not. */
xCreatedTask = mainNO_TASK;
/* Dynamically create a task - passing ulMemCheckTaskRunningCount as a
parameter. */
ulMemCheckTaskRunningCount = mainCOUNT_INITIAL_VALUE;
if( xTaskCreate( vMemCheckTask, ( signed char * ) "MEM_CHECK", configMINIMAL_STACK_SIZE, ( void * ) &ulMemCheckTaskRunningCount, tskIDLE_PRIORITY, &xCreatedTask ) != pdPASS )
{
/* Could not create the task - we have probably run out of heap. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
/* Delay until it is time to execute again. */
vTaskDelay( xDelayPeriod );
/* Delete the dynamically created task. */
if( xCreatedTask != mainNO_TASK )
{
vTaskDelete( xCreatedTask );
}
/* Check all the standard demo application tasks are executing without
error. ulMemCheckTaskRunningCount is checked to ensure it was
modified by the task just deleted. */
if( prvCheckOtherTasksAreStillRunning( ulMemCheckTaskRunningCount ) != pdPASS )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
/* The toggle rate of the LED depends on how long this task delays for.
An error reduces the delay period and so increases the toggle rate. */
vParTestToggleLED( mainON_BOARD_LED_BIT );
}
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
long lCount;
#ifdef RUN_FROM_ROM
{
portFLOAT nsecsPerClockTick;
long lNumWaitStates;
unsigned long ulCSRWaitValue;
/* We are compiling to run from ROM (either on-chip or off-chip flash).
Leave the RAM/flash mapped the way they are on reset
(flash @ 0x00000000, RAM @ 0x00300000), and set up the
proper flash wait states (starts out at the maximum number
of wait states on reset, so we should be able to reduce it).
Most of this code will probably get removed by the compiler
if optimization is enabled, since these calculations are
based on constants. But the compiler should still produce
a correct wait state register value. */
nsecsPerClockTick = ( portFLOAT ) 1000000000 / configCPU_CLOCK_HZ;
lNumWaitStates = ( long )( ( configFLASH_SPEED_NSEC / nsecsPerClockTick ) + 0.5 ) - 1;
if( lNumWaitStates < 0 )
{
lNumWaitStates = 0;
}
if( lNumWaitStates > MAX_WAIT_STATES )
{
lNumWaitStates = MAX_WAIT_STATES;
}
ulCSRWaitValue = ululCSRWaitValues[ lNumWaitStates ];
ulCSRWaitValue = WaitState5;
AT91C_BASE_EBI->EBI_CSR[ 0 ] = ulCSRWaitValue | DataBus16 | WaitStateEnable
| PageSize1M | tDF_0cycle
| ByteWriteAccessType | CSEnable
| 0x00000000 /* Base Address */;
}
#else /* else we are compiling to run from on-chip RAM */
{
/* If compiling to run from RAM, we expect the on-chip RAM to already
be mapped at 0x00000000. This is typically done with an initialization
script for the JTAG emulator you are using to download and run the
demo application. So there is nothing to do here in this case. */
}
#endif
/* Disable all interrupts at the AIC level initially... */
AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
/* Set all SVR and SMR entries to default values (start with a clean slate)... */
for( lCount = 0; lCount < 32; lCount++ )
{
AT91C_BASE_AIC->AIC_SVR[ lCount ] = (unsigned long) 0;
AT91C_BASE_AIC->AIC_SMR[ lCount ] = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
}
/* Disable clocks to all peripherals initially... */
AT91C_BASE_PS->PS_PCDR = 0xFFFFFFFF;
/* Clear all interrupts at the AIC level initially... */
AT91C_BASE_AIC->AIC_ICCR = 0xFFFFFFFF;
/* Perform 8 "End Of Interrupt" cmds to make sure AIC will not Lock out
nIRQ */
for( lCount = 0; lCount < 8; lCount++ )
{
AT91C_BASE_AIC->AIC_EOICR = 0;
}
/* Initialise LED outputs. */
vParTestInitialise();
}
/*-----------------------------------------------------------*/
static long prvCheckOtherTasksAreStillRunning( unsigned long ulMemCheckTaskCount )
{
long lReturn = ( long ) pdPASS;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none of them have detected
an error. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xArePollingQueuesStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( ulMemCheckTaskCount == mainCOUNT_INITIAL_VALUE )
{
/* The vMemCheckTask did not increment the counter - it must
have failed. */
lReturn = ( long ) pdFAIL;
}
return lReturn;
}
/*-----------------------------------------------------------*/
static void vMemCheckTask( void *pvParameters )
{
unsigned long *pulMemCheckTaskRunningCounter;
void *pvMem1, *pvMem2, *pvMem3;
static long lErrorOccurred = pdFALSE;
/* This task is dynamically created then deleted during each cycle of the
vErrorChecks task to check the operation of the memory allocator. Each time
the task is created memory is allocated for the stack and TCB. Each time
the task is deleted this memory is returned to the heap. This task itself
exercises the allocator by allocating and freeing blocks.
The task executes at the idle priority so does not require a delay.
pulMemCheckTaskRunningCounter is incremented each cycle to indicate to the
vErrorChecks() task that this task is still executing without error. */
pulMemCheckTaskRunningCounter = ( unsigned long * ) pvParameters;
for( ;; )
{
if( lErrorOccurred == pdFALSE )
{
/* We have never seen an error so increment the counter. */
( *pulMemCheckTaskRunningCounter )++;
}
else
{
/* There has been an error so reset the counter so the check task
can tell that an error occurred. */
*pulMemCheckTaskRunningCounter = mainCOUNT_INITIAL_VALUE;
}
/* Allocate some memory - just to give the allocator some extra
exercise. This has to be in a critical section to ensure the
task does not get deleted while it has memory allocated. */
vTaskSuspendAll();
{
pvMem1 = pvPortMalloc( mainMEM_CHECK_SIZE_1 );
if( pvMem1 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem1, 0xaa, mainMEM_CHECK_SIZE_1 );
vPortFree( pvMem1 );
}
}
xTaskResumeAll();
/* Again - with a different size block. */
vTaskSuspendAll();
{
pvMem2 = pvPortMalloc( mainMEM_CHECK_SIZE_2 );
if( pvMem2 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem2, 0xaa, mainMEM_CHECK_SIZE_2 );
vPortFree( pvMem2 );
}
}
xTaskResumeAll();
/* Again - with a different size block. */
vTaskSuspendAll();
{
pvMem3 = pvPortMalloc( mainMEM_CHECK_SIZE_3 );
if( pvMem3 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem3, 0xaa, mainMEM_CHECK_SIZE_3 );
vPortFree( pvMem3 );
}
}
xTaskResumeAll();
}
}

View File

@@ -1,149 +0,0 @@
//*---------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*---------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name : pio.h
//* Object : Parallel I/O Definition File
//* Translator : ARM Software Development Toolkit V2.11a
//*
//* 1.0 20/10/97 JCZ : Creation
//* 2.0 21/10/98 JCZ : Clean up
//*---------------------------------------------------------------------------
#ifndef pio_h
#define pio_h
/*---------------------------------------------*/
/* Parallel I/O Interface Structure Definition */
/*---------------------------------------------*/
typedef struct
{
at91_reg PIO_PER ; /* PIO Enable Register */
at91_reg PIO_PDR ; /* PIO Disable Register */
at91_reg PIO_PSR ; /* PIO Status Register */
at91_reg Reserved0 ;
at91_reg PIO_OER ; /* Output Enable Register */
at91_reg PIO_ODR ; /* Output Disable Register */
at91_reg PIO_OSR ; /* Output Status Register */
at91_reg Reserved1 ;
at91_reg PIO_IFER ; /* Input Filter Enable Register */
at91_reg PIO_IFDR ; /* Input Filter Disable Register */
at91_reg PIO_IFSR ; /* Input Filter Status Register */
at91_reg Reserved2 ;
at91_reg PIO_SODR ; /* Set Output Data Register */
at91_reg PIO_CODR ; /* Clear Output Data Register */
at91_reg PIO_ODSR ; /* Output Data Status Register */
at91_reg PIO_PDSR ; /* Pin Data Status Register */
at91_reg PIO_IER ; /* Interrupt Enable Register */
at91_reg PIO_IDR ; /* Interrupt Disable Register */
at91_reg PIO_IMR ; /* Interrupt Mask Register */
at91_reg PIO_ISR ; /* Interrupt Status Register */
} StructPIO ;
/*-----------------------------*/
/* PIO Handler type definition */
/*-----------------------------*/
//typedef void (*TypePIOHandler) ( StructPIO *pio_pt, u_int pio_mask ) ;
/*--------------------------------*/
/* Device Dependancies Definition */
/*--------------------------------*/
/* Number of PIO Controller */
#define NB_PIO_CTRL 1
/* Base Address */
#define PIO_BASE ((StructPIO *) 0xFFFF0000 )
/* Number of PIO Lines */
#define NB_PIO 32
/* Parallel I/O Bits Definition */
#define P0 (1<<0)
#define P1 (1<<1)
#define P2 (1<<2)
#define P3 (1<<3)
#define P4 (1<<4)
#define P5 (1<<5)
#define P6 (1<<6)
#define P7 (1<<7)
#define P8 (1<<8)
#define P9 (1<<9)
#define P10 (1<<10)
#define P11 (1<<11)
#define P12 (1<<12)
#define P13 (1<<13)
#define P14 (1<<14)
#define P15 (1<<15)
#define P16 (1<<16)
#define P17 (1<<17)
#define P18 (1<<18)
#define P19 (1<<19)
#define P20 (1<<20)
#define P21 (1<<21)
#define P22 (1<<22)
#define P23 (1<<23)
#define P24 (1<<24)
#define P25 (1<<25)
#define P26 (1<<26)
#define P27 (1<<27)
#define P28 (1<<28)
#define P29 (1<<29)
#define P30 (1<<30)
#define P31 (1<<31)
/* PIO Multiplexing Definition */
/* There is only one PIO Controller */
#define PIO_CTRL 0
#define PIO_TC0 PIO_CTRL
#define TCLK0 P0
#define TIOA0 P1
#define TIOB0 P2
#define PIN_TC0 (TIOA0|TIOB0|TCLK0)
#define PIO_TC1 PIO_CTRL
#define TCLK1 P3
#define TIOA1 P4
#define TIOB1 P5
#define PIN_TC1 (TIOA1|TIOB1|TCLK1)
#define PIO_TC2 PIO_CTRL
#define TCLK2 P6
#define TIOA2 P7
#define TIOB2 P8
#define PIN_TC2 (TIOA2|TIOB2|TCLK2)
#define PIO_EXT_IRQ PIO_CTRL
#define PIN_IRQ0 P9
#define PIN_IRQ1 P10
#define PIN_IRQ2 P11
#define PIN_FIQ P12
#define PIO_USART0 PIO_CTRL
#define SCK0 P13
#define TXD0 P14
#define RXD0 P15
#define PIN_USART0 (SCK0|TXD0|RXD0)
#define PIO_USART1 PIO_CTRL
#define SCK1 P20
#define TXD1 P21
#define RXD1 P22
#define PIN_USART1 (SCK1|TXD1|RXD1)
#define MCKO P25
#define CS2 P26
#define CS3 P27
#define CS4 P31
#define CS5 P30
#define CS6 P29
#define CS7 P28
#endif /* pio_h */

View File

@@ -1,6 +0,0 @@
set USE_THUMB_MODE=NO
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=atmel-ram.ld
make

View File

@@ -1,6 +0,0 @@
set USE_THUMB_MODE=YES
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=atmel-ram.ld
make

View File

@@ -1,6 +0,0 @@
set USE_THUMB_MODE=NO
set DEBUG=-g
set OPTIM=-O2
set RUN_MODE=RUN_FROM_ROM
set LDSCRIPT=atmel-rom.ld
make

View File

@@ -1,6 +0,0 @@
set USE_THUMB_MODE=YES
set DEBUG=-g
set OPTIM=-O2
set RUN_MODE=RUN_FROM_ROM
set LDSCRIPT=atmel-rom.ld
make

View File

@@ -1,253 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
This file contains all the serial port components that can be compiled to
either ARM or THUMB mode. Components that must be compiled to ARM mode are
contained in serialISR.c.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
#include "AT91R40008.h"
#include "usart.h"
#include "pio.h"
#include "aic.h"
/*-----------------------------------------------------------*/
/* Constants to setup and access the UART. */
#define portUSART0_AIC_CHANNEL ( ( unsigned long ) 2 )
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
/*-----------------------------------------------------------*/
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/*
* The queues are created in serialISR.c as they are used from the ISR.
* Obtain references to the queues and THRE Empty flag.
*/
extern void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx );
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned long ulSpeed;
unsigned long ulCD;
xComPortHandle xReturn = serHANDLE;
extern void ( vUART_ISR_Wrapper )( void );
/* The queues are used in the serial ISR routine, so are created from
serialISR.c (which is always compiled to ARM mode. */
vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
if(
( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned long ) 0 )
)
{
portENTER_CRITICAL();
{
/* Enable clock to USART0... */
AT91C_BASE_PS->PS_PCER = AT91C_PS_US0;
/* Disable all USART0 interrupt sources to begin... */
AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;
/* Reset various status bits (just in case)... */
AT91C_BASE_US0->US_CR = US_RSTSTA;
AT91C_BASE_PIO->PIO_PDR = TXD0 | RXD0; /* Enable RXD and TXD pins */
AT91C_BASE_US0->US_CR = US_RSTRX | US_RSTTX | US_RXDIS | US_TXDIS;
/* Clear Transmit and Receive Counters */
AT91C_BASE_US0->US_RCR = 0;
AT91C_BASE_US0->US_TCR = 0;
/* Input clock to baud rate generator is MCK */
ulSpeed = configCPU_CLOCK_HZ * 10;
ulSpeed = ulSpeed / 16;
ulSpeed = ulSpeed / ulWantedBaud;
/* compute the error */
ulCD = ulSpeed / 10;
if ((ulSpeed - (ulCD * 10)) >= 5)
ulCD++;
/* Define the baud rate divisor register */
AT91C_BASE_US0->US_BRGR = ulCD;
/* Define the USART mode */
AT91C_BASE_US0->US_MR = US_CLKS_MCK | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1 | US_CHMODE_NORMAL;
/* Write the Timeguard Register */
AT91C_BASE_US0->US_TTGR = 0;
/* Setup the interrupt for USART0.
Store interrupt handler function address in USART0 vector register... */
AT91C_BASE_AIC->AIC_SVR[ portUSART0_AIC_CHANNEL ] = (unsigned long)vUART_ISR_Wrapper;
/* USART0 interrupt level-sensitive, priority 1... */
AT91C_BASE_AIC->AIC_SMR[ portUSART0_AIC_CHANNEL ] = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | 1;
/* Clear some pending USART0 interrupts (just in case)... */
AT91C_BASE_US0->US_CR = US_RSTSTA;
/* Enable USART0 interrupt sources (but not Tx for now)... */
AT91C_BASE_US0->US_IER = US_RXRDY;
/* Enable USART0 interrupts in the AIC... */
AT91C_BASE_AIC->AIC_IECR = ( 1 << portUSART0_AIC_CHANNEL );
/* Enable receiver and transmitter... */
AT91C_BASE_US0->US_CR = US_RXEN | US_TXEN;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
{
signed char *pxNext;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
( void ) usStringLength;
/* Send each character in the string, one at a time. */
pxNext = ( signed char * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
{
( void ) pxPort;
/* Place the character in the queue of characters to be transmitted. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
return pdFAIL;
}
/* Turn on the Tx interrupt so the ISR will remove the character from the
queue and send it. This does not need to be in a critical section as
if the interrupt has already removed the character the next interrupt
will simply turn off the Tx interrupt again. */
AT91C_BASE_US0->US_IER = US_TXRDY;
return pdPASS;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported as not required by the demo application. */
( void ) xPort;
}
/*-----------------------------------------------------------*/

View File

@@ -1,180 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART0.
This file contains all the serial port components that must be compiled
to ARM mode. The components that can be compiled to either ARM or THUMB
mode are contained in serial.c.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
#include "AT91R40008.h"
#include "usart.h"
/*-----------------------------------------------------------*/
/* Constant to access the AIC. */
#define serCLEAR_AIC_INTERRUPT ( ( unsigned long ) 0 )
/* Constants to determine the ISR source. */
#define serSOURCE_THRE ( ( unsigned char ) 0x02 )
#define serSOURCE_RX_TIMEOUT ( ( unsigned char ) 0x0c )
#define serSOURCE_ERROR ( ( unsigned char ) 0x06 )
#define serSOURCE_RX ( ( unsigned char ) 0x04 )
#define serINTERRUPT_SOURCE_MASK ( ( unsigned long ) (US_RXRDY | US_TXRDY | US_RXBRK | US_OVRE | US_FRAME | US_PARE) )
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/* UART0 interrupt service routine. This can cause a context switch so MUST
be declared "naked". */
void vUART_ISR_Wrapper( void ) __attribute__ ((naked));
/* The ISR function that actually performs the work. This must be separate
from the wrapper to ensure the correct stack frame is set up. */
void vUART_ISR_Handler( void ) __attribute__ ((noinline));
/*-----------------------------------------------------------*/
void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx )
{
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* Pass back a reference to the queues so the serial API file can
post/receive characters. */
*pxRxedChars = xRxedChars;
*pxCharsForTx = xCharsForTx;
}
/*-----------------------------------------------------------*/
void vUART_ISR_Wrapper( void )
{
/* Save the context of the interrupted task. */
portSAVE_CONTEXT();
/* Call the handler. This must be a separate function to ensure the
stack frame is correctly set up. */
__asm volatile( "bl vUART_ISR_Handler" );
/* Restore the context of whichever task will run next. */
portRESTORE_CONTEXT();
}
/*-----------------------------------------------------------*/
void vUART_ISR_Handler( void )
{
/* Now we can declare the local variables. These must be static. */
signed char cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
unsigned long ulStatus;
/* What caused the interrupt? */
ulStatus = AT91C_BASE_US0->US_CSR & AT91C_BASE_US0->US_IMR;
if (ulStatus & US_TXRDY)
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
AT91C_BASE_US0->US_THR = cChar;
}
else
{
/* Queue empty, nothing to send so turn off the Tx interrupt. */
AT91C_BASE_US0->US_IDR = US_TXRDY;
}
}
if (ulStatus & US_RXRDY)
{
/* The interrupt was caused by the receiver getting data. */
cChar = AT91C_BASE_US0->US_RHR;
xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
}
/* Acknowledge the interrupt at AIC level... */
AT91C_BASE_AIC->AIC_EOICR = serCLEAR_AIC_INTERRUPT;
/* If an event caused a task to unblock then we call "Yield from ISR" to
ensure that the unblocked task is the task that executes when the interrupt
completes if the unblocked task has a priority higher than the interrupted
task. */
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}
}
/*-----------------------------------------------------------*/

View File

@@ -1,301 +0,0 @@
//*----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name : tc.h
//* Object : Timer Counter Header File
//*
//* 1.0 01/04/00 JCZ : Creation
//* 1.0 01/09/00 JPP : modification TC_BEEVT, TC_BEEVT_SET_OUTPUT,
//* TC_BEEVT_CLEAR_OUTPUT, TC_BEEVT_TOGGLE_OUTPUT
//*-----------------------------------------------------------------------------
#ifndef tc_h
#define tc_h
//#include "periph/stdc/std_c.h"
//#include "periph/pio/lib_pio.h"
/*-------------------------------------------*/
/* Timer User Interface Structure Definition */
/*-------------------------------------------*/
typedef struct
{
at91_reg TC_CCR ; /* Control Register */
at91_reg TC_CMR ; /* Mode Register */
at91_reg Reserved0 ;
at91_reg Reserved1 ;
at91_reg TC_CV ; /* Counter value */
at91_reg TC_RA ; /* Register A */
at91_reg TC_RB ; /* Register B */
at91_reg TC_RC ; /* Register C */
at91_reg TC_SR ; /* Status Register */
at91_reg TC_IER ; /* Interrupt Enable Register */
at91_reg TC_IDR ; /* Interrupt Disable Register */
at91_reg TC_IMR ; /* Interrupt Mask Register */
at91_reg Reserved2 ;
at91_reg Reserved3 ;
at91_reg Reserved4 ;
at91_reg Reserved5 ;
} StructTC ;
#define NB_TC_CHANNEL 3
typedef struct
{
StructTC TC[NB_TC_CHANNEL] ;
at91_reg TC_BCR ; /* Block Control Register */
at91_reg TC_BMR ; /* Block Mode Register */
} StructTCBlock ;
/*--------------------------------------------------------*/
/* TC_CCR: Timer Counter Control Register Bits Definition */
/*--------------------------------------------------------*/
#define TC_CLKEN 0x1
#define TC_CLKDIS 0x2
#define TC_SWTRG 0x4
/*---------------------------------------------------------------*/
/* TC_CMR: Timer Counter Channel Mode Register Bits Definition */
/*---------------------------------------------------------------*/
/*-----------------*/
/* Clock Selection */
/*-----------------*/
#define TC_CLKS 0x7
#define TC_CLKS_MCK2 0x0
#define TC_CLKS_MCK8 0x1
#define TC_CLKS_MCK32 0x2
#define TC_CLKS_MCK128 0x3
#define TC_CLKS_MCK1024 0x4
#define TC_CLKS_SLCK 0x4
#define TC_CLKS_XC0 0x5
#define TC_CLKS_XC1 0x6
#define TC_CLKS_XC2 0x7
/*-----------------*/
/* Clock Inversion */
/*-----------------*/
#define TC_CLKI 0x8
/*------------------------*/
/* Burst Signal Selection */
/*------------------------*/
#define TC_BURST 0x30
#define TC_BURST_NONE 0x0
#define TC_BUSRT_XC0 0x10
#define TC_BURST_XC1 0x20
#define TC_BURST_XC2 0x30
/*------------------------------------------------------*/
/* Capture Mode : Counter Clock Stopped with RB Loading */
/*------------------------------------------------------*/
#define TC_LDBSTOP 0x40
/*-------------------------------------------------------*/
/* Waveform Mode : Counter Clock Stopped with RC Compare */
/*-------------------------------------------------------*/
#define TC_CPCSTOP 0x40
/*-------------------------------------------------------*/
/* Capture Mode : Counter Clock Disabled with RB Loading */
/*--------------------------------------------------------*/
#define TC_LDBDIS 0x80
/*--------------------------------------------------------*/
/* Waveform Mode : Counter Clock Disabled with RC Compare */
/*--------------------------------------------------------*/
#define TC_CPCDIS 0x80
/*------------------------------------------------*/
/* Capture Mode : External Trigger Edge Selection */
/*------------------------------------------------*/
#define TC_ETRGEDG 0x300
#define TC_ETRGEDG_EDGE_NONE 0x0
#define TC_ETRGEDG_RISING_EDGE 0x100
#define TC_ETRGEDG_FALLING_EDGE 0x200
#define TC_ETRGEDG_BOTH_EDGE 0x300
/*-----------------------------------------------*/
/* Waveform Mode : External Event Edge Selection */
/*-----------------------------------------------*/
#define TC_EEVTEDG 0x300
#define TC_EEVTEDG_EDGE_NONE 0x0
#define TC_EEVTEDG_RISING_EDGE 0x100
#define TC_EEVTEDG_FALLING_EDGE 0x200
#define TC_EEVTEDG_BOTH_EDGE 0x300
/*--------------------------------------------------------*/
/* Capture Mode : TIOA or TIOB External Trigger Selection */
/*--------------------------------------------------------*/
#define TC_ABETRG 0x400
#define TC_ABETRG_TIOB 0x0
#define TC_ABETRG_TIOA 0x400
/*------------------------------------------*/
/* Waveform Mode : External Event Selection */
/*------------------------------------------*/
#define TC_EEVT 0xC00
#define TC_EEVT_TIOB 0x0
#define TC_EEVT_XC0 0x400
#define TC_EEVT_XC1 0x800
#define TC_EEVT_XC2 0xC00
/*--------------------------------------------------*/
/* Waveform Mode : Enable Trigger on External Event */
/*--------------------------------------------------*/
#define TC_ENETRG 0x1000
/*----------------------------------*/
/* RC Compare Enable Trigger Enable */
/*----------------------------------*/
#define TC_CPCTRG 0x4000
/*----------------*/
/* Mode Selection */
/*----------------*/
#define TC_WAVE 0x8000
#define TC_CAPT 0x0
/*-------------------------------------*/
/* Capture Mode : RA Loading Selection */
/*-------------------------------------*/
#define TC_LDRA 0x30000
#define TC_LDRA_EDGE_NONE 0x0
#define TC_LDRA_RISING_EDGE 0x10000
#define TC_LDRA_FALLING_EDGE 0x20000
#define TC_LDRA_BOTH_EDGE 0x30000
/*-------------------------------------------*/
/* Waveform Mode : RA Compare Effect on TIOA */
/*-------------------------------------------*/
#define TC_ACPA 0x30000
#define TC_ACPA_OUTPUT_NONE 0x0
#define TC_ACPA_SET_OUTPUT 0x10000
#define TC_ACPA_CLEAR_OUTPUT 0x20000
#define TC_ACPA_TOGGLE_OUTPUT 0x30000
/*-------------------------------------*/
/* Capture Mode : RB Loading Selection */
/*-------------------------------------*/
#define TC_LDRB 0xC0000
#define TC_LDRB_EDGE_NONE 0x0
#define TC_LDRB_RISING_EDGE 0x40000
#define TC_LDRB_FALLING_EDGE 0x80000
#define TC_LDRB_BOTH_EDGE 0xC0000
/*-------------------------------------------*/
/* Waveform Mode : RC Compare Effect on TIOA */
/*-------------------------------------------*/
#define TC_ACPC 0xC0000
#define TC_ACPC_OUTPUT_NONE 0x0
#define TC_ACPC_SET_OUTPUT 0x40000
#define TC_ACPC_CLEAR_OUTPUT 0x80000
#define TC_ACPC_TOGGLE_OUTPUT 0xC0000
/*-----------------------------------------------*/
/* Waveform Mode : External Event Effect on TIOA */
/*-----------------------------------------------*/
#define TC_AEEVT 0x300000
#define TC_AEEVT_OUTPUT_NONE 0x0
#define TC_AEEVT_SET_OUTPUT 0x100000
#define TC_AEEVT_CLEAR_OUTPUT 0x200000
#define TC_AEEVT_TOGGLE_OUTPUT 0x300000
/*-------------------------------------------------*/
/* Waveform Mode : Software Trigger Effect on TIOA */
/*-------------------------------------------------*/
#define TC_ASWTRG 0xC00000
#define TC_ASWTRG_OUTPUT_NONE 0x0
#define TC_ASWTRG_SET_OUTPUT 0x400000
#define TC_ASWTRG_CLEAR_OUTPUT 0x800000
#define TC_ASWTRG_TOGGLE_OUTPUT 0xC00000
/*-------------------------------------------*/
/* Waveform Mode : RB Compare Effect on TIOB */
/*-------------------------------------------*/
#define TC_BCPB 0x1000000
#define TC_BCPB_OUTPUT_NONE 0x0
#define TC_BCPB_SET_OUTPUT 0x1000000
#define TC_BCPB_CLEAR_OUTPUT 0x2000000
#define TC_BCPB_TOGGLE_OUTPUT 0x3000000
/*-------------------------------------------*/
/* Waveform Mode : RC Compare Effect on TIOB */
/*-------------------------------------------*/
#define TC_BCPC 0xC000000
#define TC_BCPC_OUTPUT_NONE 0x0
#define TC_BCPC_SET_OUTPUT 0x4000000
#define TC_BCPC_CLEAR_OUTPUT 0x8000000
#define TC_BCPC_TOGGLE_OUTPUT 0xC000000
/*-----------------------------------------------*/
/* Waveform Mode : External Event Effect on TIOB */
/*-----------------------------------------------*/
#define TC_BEEVT 0x30000000 //* bit 29-28
#define TC_BEEVT_OUTPUT_NONE 0x0
#define TC_BEEVT_SET_OUTPUT 0x10000000 //* bit 29-28 01
#define TC_BEEVT_CLEAR_OUTPUT 0x20000000 //* bit 29-28 10
#define TC_BEEVT_TOGGLE_OUTPUT 0x30000000 //* bit 29-28 11
/*- -----------------------------------------------*/
/* Waveform Mode : Software Trigger Effect on TIOB */
/*-------------------------------------------------*/
#define TC_BSWTRG 0xC0000000
#define TC_BSWTRG_OUTPUT_NONE 0x0
#define TC_BSWTRG_SET_OUTPUT 0x40000000
#define TC_BSWTRG_CLEAR_OUTPUT 0x80000000
#define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000
/*------------------------------------------------------*/
/* TC_SR: Timer Counter Status Register Bits Definition */
/*------------------------------------------------------*/
#define TC_COVFS 0x1 /* Counter Overflow Status */
#define TC_LOVRS 0x2 /* Load Overrun Status */
#define TC_CPAS 0x4 /* RA Compare Status */
#define TC_CPBS 0x8 /* RB Compare Status */
#define TC_CPCS 0x10 /* RC Compare Status */
#define TC_LDRAS 0x20 /* RA Loading Status */
#define TC_LDRBS 0x40 /* RB Loading Status */
#define TC_ETRGS 0x80 /* External Trigger Status */
#define TC_CLKSTA 0x10000 /* Clock Status */
#define TC_MTIOA 0x20000 /* TIOA Mirror */
#define TC_MTIOB 0x40000 /* TIOB Status */
/*--------------------------------------------------------------*/
/* TC_BCR: Timer Counter Block Control Register Bits Definition */
/*--------------------------------------------------------------*/
#define TC_SYNC 0x1 /* Synchronisation Trigger */
/*------------------------------------------------------------*/
/* TC_BMR: Timer Counter Block Mode Register Bits Definition */
/*------------------------------------------------------------*/
#define TC_TC0XC0S 0x3 /* External Clock Signal 0 Selection */
#define TC_TCLK0XC0 0x0
#define TC_NONEXC0 0x1
#define TC_TIOA1XC0 0x2
#define TC_TIOA2XC0 0x3
#define TC_TC1XC1S 0xC /* External Clock Signal 1 Selection */
#define TC_TCLK1XC1 0x0
#define TC_NONEXC1 0x4
#define TC_TIOA0XC1 0x8
#define TC_TIOA2XC1 0xC
#define TC_TC2XC2S 0x30 /* External Clock Signal 2 Selection */
#define TC_TCLK2XC2 0x0
#define TC_NONEXC2 0x10
#define TC_TIOA0XC2 0x20
#define TC_TIOA1XC2 0x30
#endif /* tc_h */

View File

@@ -1,151 +0,0 @@
//*----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name : usart.h
//* Object : USART Header File.
//*
//* 1.0 01/04/00 JCZ : Creation
//*----------------------------------------------------------------------------
#ifndef usart_h
#define usart_h
//#include "periph/stdc/std_c.h"
//#include "periph/pio/lib_pio.h"
/*-------------------------------------------*/
/* USART User Interface Structure Definition */
/*-------------------------------------------*/
typedef struct
{
at91_reg US_CR ; /* Control Register */
at91_reg US_MR ; /* Mode Register */
at91_reg US_IER ; /* Interrupt Enable Register */
at91_reg US_IDR ; /* Interrupt Disable Register */
at91_reg US_IMR ; /* Interrupt Mask Register */
at91_reg US_CSR ; /* Channel Status Register */
at91_reg US_RHR ; /* Receive Holding Register */
at91_reg US_THR ; /* Transmit Holding Register */
at91_reg US_BRGR ; /* Baud Rate Generator Register */
at91_reg US_RTOR ; /* Receiver Timeout Register */
at91_reg US_TTGR ; /* Transmitter Time-guard Register */
at91_reg Reserved ;
at91_reg US_RPR ; /* Receiver Pointer Register */
at91_reg US_RCR ; /* Receiver Counter Register */
at91_reg US_TPR ; /* Transmitter Pointer Register */
at91_reg US_TCR ; /* Transmitter Counter Register */
} StructUSART ;
/*--------------------------*/
/* US_CR : Control Register */
/*--------------------------*/
#define US_RSTRX 0x0004 /* Reset Receiver */
#define US_RSTTX 0x0008 /* Reset Transmitter */
#define US_RXEN 0x0010 /* Receiver Enable */
#define US_RXDIS 0x0020 /* Receiver Disable */
#define US_TXEN 0x0040 /* Transmitter Enable */
#define US_TXDIS 0x0080 /* Transmitter Disable */
#define US_RSTSTA 0x0100 /* Reset Status Bits */
#define US_STTBRK 0x0200 /* Start Break */
#define US_STPBRK 0x0400 /* Stop Break */
#define US_STTTO 0x0800 /* Start Time-out */
#define US_SENDA 0x1000 /* Send Address */
/*-----------------------*/
/* US_MR : Mode Register */
/*-----------------------*/
#define US_CLKS 0x0030 /* Clock Selection */
#define US_CLKS_MCK 0x00 /* Master Clock */
#define US_CLKS_MCK8 0x10 /* Master Clock divided by 8 */
#define US_CLKS_SCK 0x20 /* External Clock */
#define US_CLKS_SLCK 0x30 /* Slow Clock */
#define US_CHRL 0x00C0 /* Byte Length */
#define US_CHRL_5 0x00 /* 5 bits */
#define US_CHRL_6 0x40 /* 6 bits */
#define US_CHRL_7 0x80 /* 7 bits */
#define US_CHRL_8 0xC0 /* 8 bits */
#define US_SYNC 0x0100 /* Synchronous Mode Enable */
#define US_PAR 0x0E00 /* Parity Mode */
#define US_PAR_EVEN 0x00 /* Even Parity */
#define US_PAR_ODD 0x200 /* Odd Parity */
#define US_PAR_SPACE 0x400 /* Space Parity to 0 */
#define US_PAR_MARK 0x600 /* Marked Parity to 1 */
#define US_PAR_NO 0x800 /* No Parity */
#define US_PAR_MULTIDROP 0xC00 /* Multi-drop Mode */
#define US_NBSTOP 0x3000 /* Stop Bit Number */
#define US_NBSTOP_1 0x0000 /* 1 Stop Bit */
#define US_NBSTOP_1_5 0x1000 /* 1.5 Stop Bits */
#define US_NBSTOP_2 0x2000 /* 2 Stop Bits */
#define US_CHMODE 0xC000 /* Channel Mode */
#define US_CHMODE_NORMAL 0x0000 /* Normal Mode */
#define US_CHMODE_AUTOMATIC_ECHO 0x4000 /* Automatic Echo */
#define US_CHMODE_LOCAL_LOOPBACK 0x8000 /* Local Loopback */
#define US_CHMODE_REMOTE_LOOPBACK 0xC000 /* Remote Loopback */
#define US_MODE9 0x20000 /* 9 Bit Mode */
#define US_CLKO 0x40000 /* Baud Rate Output Enable */
/* Mode Register model */
/* Standard Asynchronous Mode : 8 bits , 1 stop , no parity */
#define US_ASYNC_MODE ( US_CHMODE_NORMAL + \
US_NBSTOP_1 + \
US_PAR_NO + \
US_CHRL_8 + \
US_CLKS_MCK )
/* Standard External Asynchronous Mode : 8 bits , 1 stop , no parity */
#define US_ASYNC_SCK_MODE ( US_CHMODE_NORMAL + \
US_NBSTOP_1 + \
US_PAR_NO + \
US_CHRL_8 + \
US_CLKS_SCK )
/* Standard Synchronous Mode : 8 bits , 1 stop , no parity */
#define US_SYNC_MODE ( US_SYNC + \
US_CHMODE_NORMAL + \
US_NBSTOP_1 + \
US_PAR_NO + \
US_CHRL_8 + \
US_CLKS_MCK )
/* SCK used Label */
#define SCK_USED (US_CLKO | US_CLKS_SCK)
/*---------------------------------------------------------------*/
/* US_IER, US_IDR, US_IMR, US_IMR: Status and Interrupt Register */
/*---------------------------------------------------------------*/
#define US_RXRDY 0x1 /* Receiver Ready */
#define US_TXRDY 0x2 /* Transmitter Ready */
#define US_RXBRK 0x4 /* Receiver Break */
#define US_ENDRX 0x8 /* End of Receiver PDC Transfer */
#define US_ENDTX 0x10 /* End of Transmitter PDC Transfer */
#define US_OVRE 0x20 /* Overrun Error */
#define US_FRAME 0x40 /* Framing Error */
#define US_PARE 0x80 /* Parity Error */
#define US_TIMEOUT 0x100 /* Receiver Timeout */
#define US_TXEMPTY 0x200 /* Transmitter Empty */
#define US_MASK_IRQ_TX (US_TXRDY | US_ENDTX | US_TXEMPTY)
#define US_MASK_IRQ_RX (US_RXRDY | US_ENDRX | US_TIMEOUT)
#define US_MASK_IRQ_ERROR (US_PARE | US_FRAME | US_OVRE | US_RXBRK)
#endif /* usart_h */

View File

@@ -1,101 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <intrinsics.h>
#include "Board.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
-----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned long ) 47923200 )
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 100 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) 14200 )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

View File

@@ -1,102 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#include "FreeRTOS.h"
#include "partest.h"
#include "board.h"
/*-----------------------------------------------------------
* Simple parallel port IO routines for the LED's.
*-----------------------------------------------------------*/
const unsigned long led_mask[ NB_LED ]= { LED1, LED2, LED3, LED4 };
void vParTestInitialise( void )
{
/* Start with all LED's off. */
AT91F_PIO_SetOutput( AT91C_BASE_PIOA, LED_MASK );
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
if( uxLED < ( portBASE_TYPE ) NB_LED )
{
if( xValue )
{
AT91F_PIO_SetOutput( AT91C_BASE_PIOA, led_mask[ uxLED ] );
}
else
{
AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, led_mask[ uxLED ]);
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
if( uxLED < ( portBASE_TYPE ) NB_LED )
{
if( AT91F_PIO_GetInput( AT91C_BASE_PIOA ) & led_mask[ uxLED ] )
{
AT91F_PIO_ClearOutput( AT91C_BASE_PIOA, led_mask[ uxLED ]);
}
else
{
AT91F_PIO_SetOutput( AT91C_BASE_PIOA, led_mask[ uxLED ] );
}
}
}

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@@ -1,89 +0,0 @@
/*----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support - ROUSSET -
*----------------------------------------------------------------------------
* The software is delivered "AS IS" without warranty or condition of any
* kind, either express, implied or statutory. This includes without
* limitation any warranty or condition with respect to merchantability or
* fitness for any particular purpose, or against the infringements of
* intellectual property rights of others.
*----------------------------------------------------------------------------
* File Name : Board.h
* Object : AT91SAM7S Evaluation Board Features Definition File.
*
* Creation : JPP 16/Jun/2004
*----------------------------------------------------------------------------
*/
#ifndef Board_h
#define Board_h
#include "AT91SAM7S64.h"
#define __inline static inline
#include "lib_AT91SAM7S64.h"
#define true -1
#define false 0
/*-------------------------------*/
/* SAM7Board Memories Definition */
/*-------------------------------*/
// The AT91SAM7S64 embeds a 16-Kbyte SRAM bank, and 64 K-Byte Flash
#define INT_SARM 0x00200000
#define INT_SARM_REMAP 0x00000000
#define INT_FLASH 0x00000000
#define INT_FLASH_REMAP 0x01000000
#define FLASH_PAGE_NB 512
#define FLASH_PAGE_SIZE 128
/*-----------------*/
/* Leds Definition */
/*-----------------*/
/* PIO Flash PA PB PIN */
#define LED1 (1<<0) /* PA0 / PGMEN0 & PWM0 TIOA0 48 */
#define LED2 (1<<1) /* PA1 / PGMEN1 & PWM1 TIOB0 47 */
#define LED3 (1<<2) /* PA2 & PWM2 SCK0 44 */
#define LED4 (1<<3) /* PA3 & TWD NPCS3 43 */
#define NB_LED 4
#define LED_MASK (LED1|LED2|LED3|LED4)
/*-------------------------*/
/* Push Buttons Definition */
/*-------------------------*/
/* PIO Flash PA PB PIN */
#define SW1_MASK (1<<19) /* PA19 / PGMD7 & RK FIQ 13 */
#define SW2_MASK (1<<20) /* PA20 / PGMD8 & RF IRQ0 16 */
#define SW3_MASK (1<<15) /* PA15 / PGM3 & TF TIOA1 20 */
#define SW4_MASK (1<<14) /* PA14 / PGMD2 & SPCK PWM3 21 */
#define SW_MASK (SW1_MASK|SW2_MASK|SW3_MASK|SW4_MASK)
#define SW1 (1<<19) // PA19
#define SW2 (1<<20) // PA20
#define SW3 (1<<15) // PA15
#define SW4 (1<<14) // PA14
/*------------------*/
/* USART Definition */
/*------------------*/
/* SUB-D 9 points J3 DBGU*/
#define DBGU_RXD AT91C_PA9_DRXD /* JP11 must be close */
#define DBGU_TXD AT91C_PA10_DTXD /* JP12 must be close */
#define AT91C_DBGU_BAUD 115200 // Baud rate
#define US_RXD_PIN AT91C_PA5_RXD0 /* JP9 must be close */
#define US_TXD_PIN AT91C_PA6_TXD0 /* JP7 must be close */
#define US_RTS_PIN AT91C_PA7_RTS0 /* JP8 must be close */
#define US_CTS_PIN AT91C_PA8_CTS0 /* JP6 must be close */
/*--------------*/
/* Master Clock */
/*--------------*/
#define EXT_OC 18432000 // Exetrnal ocilator MAINCK
#define MCK 47923200 // MCK (PLLRC div by 2)
#define MCKKHz (MCK/1000) //
#endif /* Board_h */

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@@ -1,302 +0,0 @@
;* ----------------------------------------------------------------------------
;* ATMEL Microcontroller Software Support - ROUSSET -
;* ----------------------------------------------------------------------------
;* Copyright (c) 2006, Atmel Corporation
;
;* All rights reserved.
;*
;* Redistribution and use in source and binary forms, with or without
;* modification, are permitted provided that the following conditions are met:
;*
;* - Redistributions of source code must retain the above copyright notice,
;* this list of conditions and the disclaimer below.
;*
;* - Redistributions in binary form must reproduce the above copyright notice,
;* this list of conditions and the disclaimer below in the documentation and/or
;* other materials provided with the distribution.
;*
;* Atmel's name may not be used to endorse or promote products derived from
;* this software without specific prior written permission.
;*
;* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
;* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
;* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
;* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
;* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
;* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
;* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
;* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
;* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
;* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;* ----------------------------------------------------------------------------
;------------------------------------------------------------------------------
; Include your AT91 Library files
;------------------------------------------------------------------------------
#include "AT91SAM7X256_inc.h"
;------------------------------------------------------------------------------
#define TOP_OF_MEMORY (AT91C_ISRAM + AT91C_ISRAM_SIZE)
#define IRQ_STACK_SIZE 200
; 3 words to be saved per interrupt priority level
; Mode, correspords to bits 0-5 in CPSR
MODE_BITS DEFINE 0x1F ; Bit mask for mode bits in CPSR
USR_MODE DEFINE 0x10 ; User mode
FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
SVC_MODE DEFINE 0x13 ; Supervisor mode
ABT_MODE DEFINE 0x17 ; Abort mode
UND_MODE DEFINE 0x1B ; Undefined Instruction mode
SYS_MODE DEFINE 0x1F ; System mode
I_BIT DEFINE 0x80
F_BIT DEFINE 0x40
;------------------------------------------------------------------------------
; ?RESET
; Reset Vector.
; Normally, segment INTVEC is linked at address 0.
; For debugging purposes, INTVEC may be placed at other addresses.
; A debugger that honors the entry point will start the
; program in a normal way even if INTVEC is not at address 0.
;------------------------------------------------------------------------------
SECTION .intvec:CODE:NOROOT(2)
PUBLIC __vector
PUBLIC __iar_program_start
EXTERN vPortYieldProcessor
ARM
__vector:
ldr pc,[pc,#+24] ;; Reset
__und_handler:
ldr pc,[pc,#+24] ;; Undefined instructions
__swi_handler:
ldr pc,[pc,#+24] ;; Software interrupt (SWI/SVC)
__prefetch_handler:
ldr pc,[pc,#+24] ;; Prefetch abort
__data_handler:
ldr pc,[pc,#+24] ;; Data abort
DC32 0xFFFFFFFF ;; RESERVED
__irq_handler:
LDR PC, [PC, #-0xF20]
__fiq_handler:
ldr pc,[pc,#+24] ;; FIQ
DC32 __iar_program_start
DC32 __und_handler
DC32 vPortYieldProcessor
DC32 __prefetch_handler
DC32 __data_handler
B .
DC32 IRQ_Handler_Entry
DC32 FIQ_Handler_Entry
;------------------------------------------------------------------------------
;- Manage exception: The exception must be ensure in ARM mode
;------------------------------------------------------------------------------
SECTION text:CODE:NOROOT(2)
ARM
;------------------------------------------------------------------------------
;- Function : FIQ_Handler_Entry
;- Treatments : FIQ Controller Interrupt Handler.
;- R8 is initialize in Cstartup
;- Called Functions : None only by FIQ
;------------------------------------------------------------------------------
FIQ_Handler_Entry:
;- Switch in SVC/User Mode to allow User Stack access for C code
; because the FIQ is not yet acknowledged
;- Save and r0 in FIQ_Register
mov r9,r0
ldr r0 , [r8, #AIC_FVR]
msr CPSR_c,#I_BIT | F_BIT | SVC_MODE
;- Save scratch/used registers and LR in User Stack
stmfd sp!, { r1-r3, r12, lr}
;- Branch to the routine pointed by the AIC_FVR
mov r14, pc
bx r0
;- Restore scratch/used registers and LR from User Stack
ldmia sp!, { r1-r3, r12, lr}
;- Leave Interrupts disabled and switch back in FIQ mode
msr CPSR_c, #I_BIT | F_BIT | FIQ_MODE
;- Restore the R0 ARM_MODE_SVC register
mov r0,r9
;- Restore the Program Counter using the LR_fiq directly in the PC
subs pc,lr,#4
;------------------------------------------------------------------------------
;- Function : IRQ_Handler_Entry
;- Treatments : IRQ Controller Interrupt Handler.
;- Called Functions : AIC_IVR[interrupt]
;------------------------------------------------------------------------------
IRQ_Handler_Entry:
;-------------------------
;- Manage Exception Entry
;-------------------------
;- Adjust and save LR_irq in IRQ stack
sub lr, lr, #4
stmfd sp!, {lr}
;- Save r0 and SPSR (need to be saved for nested interrupt)
mrs r14, SPSR
stmfd sp!, {r0,r14}
;- Write in the IVR to support Protect Mode
;- No effect in Normal Mode
;- De-assert the NIRQ and clear the source in Protect Mode
ldr r14, =AT91C_BASE_AIC
ldr r0 , [r14, #AIC_IVR]
str r14, [r14, #AIC_IVR]
;- Enable Interrupt and Switch in Supervisor Mode
msr CPSR_c, #SVC_MODE
;- Save scratch/used registers and LR in User Stack
stmfd sp!, { r1-r3, r12, r14}
;----------------------------------------------
;- Branch to the routine pointed by the AIC_IVR
;----------------------------------------------
mov r14, pc
bx r0
;----------------------------------------------
;- Manage Exception Exit
;----------------------------------------------
;- Restore scratch/used registers and LR from User Stack
ldmia sp!, { r1-r3, r12, r14}
;- Disable Interrupt and switch back in IRQ mode
msr CPSR_c, #I_BIT | IRQ_MODE
;- Mark the End of Interrupt on the AIC
ldr r14, =AT91C_BASE_AIC
str r14, [r14, #AIC_EOICR]
;- Restore SPSR_irq and r0 from IRQ stack
ldmia sp!, {r0,r14}
msr SPSR_cxsf, r14
;- Restore adjusted LR_irq from IRQ stack directly in the PC
ldmia sp!, {pc}^
;------------------------------------------------------------------------------
;- Exception Vectors
;------------------------------------------------------------------------------
PUBLIC AT91F_Default_FIQ_handler
PUBLIC AT91F_Default_IRQ_handler
PUBLIC AT91F_Spurious_handler
ARM ; Always ARM mode after exeption
AT91F_Default_FIQ_handler
b AT91F_Default_FIQ_handler
AT91F_Default_IRQ_handler
b AT91F_Default_IRQ_handler
AT91F_Spurious_handler
b AT91F_Spurious_handler
;------------------------------------------------------------------------------
; ?INIT
; Program entry.
;------------------------------------------------------------------------------
SECTION FIQ_STACK:DATA:NOROOT(3)
SECTION IRQ_STACK:DATA:NOROOT(3)
SECTION SVC_STACK:DATA:NOROOT(3)
SECTION ABT_STACK:DATA:NOROOT(3)
SECTION UND_STACK:DATA:NOROOT(3)
SECTION CSTACK:DATA:NOROOT(3)
SECTION text:CODE:NOROOT(2)
REQUIRE __vector
EXTERN ?main
PUBLIC __iar_program_start
EXTERN AT91F_LowLevelInit
__iar_program_start:
;------------------------------------------------------------------------------
;- Low level Init is performed in a C function: AT91F_LowLevelInit
;- Init Stack Pointer to a valid memory area before calling AT91F_LowLevelInit
;------------------------------------------------------------------------------
;- Retrieve end of RAM address
ldr r13,=TOP_OF_MEMORY ;- Temporary stack in internal RAM for Low Level Init execution
ldr r0,=AT91F_LowLevelInit
mov lr, pc
bx r0 ;- Branch on C function (with interworking)
; Initialize the stack pointers.
; The pattern below can be used for any of the exception stacks:
; FIQ, IRQ, SVC, ABT, UND, SYS.
; The USR mode uses the same stack as SYS.
; The stack segments must be defined in the linker command file,
; and be declared above.
mrs r0,cpsr ; Original PSR value
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#SVC_MODE ; Set SVC mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(SVC_STACK) ; End of SVC_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#UND_MODE ; Set UND mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(UND_STACK) ; End of UND_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#ABT_MODE ; Set ABT mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(ABT_STACK) ; End of ABT_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#FIQ_MODE ; Set FIQ mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(FIQ_STACK) ; End of FIQ_STACK
;- Init the FIQ register
ldr r8, =AT91C_BASE_AIC
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#IRQ_MODE ; Set IRQ mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(IRQ_STACK) ; End of IRQ_STACK
bic r0,r0,#MODE_BITS ; Clear the mode bits
orr r0,r0,#SYS_MODE ; Set System mode bits
msr cpsr_c,r0 ; Change the mode
ldr sp,=SFE(CSTACK) ; End of CSTACK
#ifdef __ARMVFP__
; Enable the VFP coprocessor.
mov r0, #0x40000000 ; Set EN bit in VFP
fmxr fpexc, r0 ; FPEXC, clear others.
; Disable underflow exceptions by setting flush to zero mode.
; For full IEEE 754 underflow compliance this code should be removed
; and the appropriate exception handler installed.
mov r0, #0x01000000 ; Set FZ bit in VFP
fmxr fpscr, r0 ; FPSCR, clear others.
#endif
; Add more initialization here
msr CPSR_c,#I_BIT | F_BIT | SVC_MODE
; Continue to ?main for more IAR specific system startup
ldr r0,=?main
bx r0
END ;- Terminates the assembly of the last module in a file

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@@ -1,84 +0,0 @@
//*----------------------------------------------------------------------------
//* ATMEL Microcontroller Software Support - ROUSSET -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name : Cstartup_SAM7.c
//* Object : Low level initializations written in C for IAR
//* tools
//* Creation : 12/Jun/04
//*
//*----------------------------------------------------------------------------
// Include the board file description
#include "Board.h"
// The following functions must be write in ARM mode this function called directly
// by exception vector
extern void AT91F_Spurious_handler(void);
extern void AT91F_Default_IRQ_handler(void);
extern void AT91F_Default_FIQ_handler(void);
//*----------------------------------------------------------------------------
//* \fn AT91F_LowLevelInit
//* \brief This function performs very low level HW initialization
//* this function can be use a Stack, depending the compilation
//* optimization mode
//*----------------------------------------------------------------------------
void AT91F_LowLevelInit( void );
void AT91F_LowLevelInit( void) @ "ICODE"
{
int i;
AT91PS_PMC pPMC = AT91C_BASE_PMC;
//* Set Flash Waite sate
// Single Cycle Access at Up to 30 MHz, or 40
// if MCK = 47923200 I have 50 Cycle for 1 useconde ( flied MC_FMR->FMCN
AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(50 <<16)) | AT91C_MC_FWS_1FWS ;
//* Watchdog Disable
AT91C_BASE_WDTC->WDTC_WDMR= AT91C_SYSC_WDDIS;
//* Set MCK at 47 923 200
// 1 Enabling the Main Oscillator:
// SCK = 1/32768 = 30.51 uSeconde
// Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | AT91C_CKGR_MOSCEN ));
// Wait the startup time
while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
// 2 Checking the Main Oscillator Frequency (Optional)
// 3 Setting PLL and divider:
// - div by 5 Fin = 3,6864 =(18,432 / 5)
// - Mul 25+1: Fout = 95,8464 =(3,6864 *26)
// for 96 MHz the erroe is 0.16%
// Field out NOT USED = 0
// PLLCOUNT pll startup time esrtimate at : 0.844 ms
// PLLCOUNT 28 = 0.000844 /(1/32768)
pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) |
(AT91C_CKGR_PLLCOUNT & (28<<8)) |
(AT91C_CKGR_MUL & (25<<16)));
// Wait the startup time
while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));
// 4. Selection of Master Clock and Processor Clock
// select the PLL clock divided by 2
pPMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2 ;
// Enable User Reset and set its minimal assertion to 960 us
AT91C_BASE_RSTC->RSTC_RMR = AT91C_SYSC_URSTEN | (0x4<<8) | (unsigned int) (0xA5<<24);
// Set up the default interrupts handler vectors
AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
for (i=1;i < 31; i++)
{
AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
}
AT91C_BASE_AIC->AIC_SPU = (int) AT91F_Spurious_handler ;
}

File diff suppressed because it is too large Load Diff

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@@ -1,8 +0,0 @@
#ifndef USB_DEMO_H
#define USB_DEMO_H
void vUSBDemoTask( void *pvParameters );
#endif

View File

@@ -1,24 +0,0 @@
RSEG ICODE:CODE
CODE32
EXTERN vUSB_ISR
PUBLIC vUSBISREntry
; Wrapper for the USB interrupt service routine. This can cause a
; context switch so requires an assembly wrapper.
; Defines the portSAVE_CONTEXT and portRESTORE_CONTEXT macros.
#include "ISR_Support.h"
vUSBISREntry:
portSAVE_CONTEXT ; Save the context of the current task.
bl vUSB_ISR ; Call the ISR routine.
portRESTORE_CONTEXT ; Restore the context of the current task -
; which may be different to the task that
; was interrupted.
END

View File

@@ -1,273 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks. The SAM7
* includes a sample USB that emulates a Joystick input to a USB host.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo application includes. */
#include "flash.h"
#include "integer.h"
#include "PollQ.h"
#include "BlockQ.h"
#include "semtest.h"
#include "dynamic.h"
#include "partest.h"
#include "comtest2.h"
#include "USB/USBSample.h"
/* Priorities for the demo application tasks. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainUSB_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* Constants required by the 'Check' task. */
#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
#define mainCHECK_TASK_LED ( 3 )
/* Constants for the ComTest tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 115200 )
#define mainCOM_TEST_LED ( 4 ) /* Off the board. */
/*
* The task that executes at the highest priority and calls
* prvCheckOtherTasksAreStillRunning(). See the description at the top
* of the file.
*/
static void vErrorChecks( void *pvParameters );
/*
* Configure the processor for use with the Atmel demo board. Setup is minimal
* as the low level init function (called from the startup asm file) takes care
* of most things.
*/
static void prvSetupHardware( void );
/*
* Checks that all the demo application tasks are still executing without error
* - as described at the top of the file.
*/
static long prvCheckOtherTasksAreStillRunning( void );
/*-----------------------------------------------------------*/
/*
* Starts all the other tasks, then starts the scheduler.
*/
void main( void )
{
/* Setup any hardware that has not already been configured by the low
level init routines. */
prvSetupHardware();
/* Initialise the LED outputs for use by the demo application tasks. */
vParTestInitialise();
/* Start all the standard demo application tasks. */
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vStartDynamicPriorityTasks();
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
/* Also start the USB demo which is just for the SAM7. */
xTaskCreate( vUSBDemoTask, "USB", configMINIMAL_STACK_SIZE, NULL, mainUSB_PRIORITY, NULL );
/* Start the check task - which is defined in this file. */
xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Start the scheduler.
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used here. */
vTaskStartScheduler();
/* We should never get here as control is now taken by the scheduler. */
return;
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
/* When using the JTAG debugger the hardware is not always initialised to
the correct default state. This line just ensures that this does not
cause all interrupts to be masked at the start. */
AT91C_BASE_AIC->AIC_EOICR = 0;
/* Most setup is performed by the low level init function called from the
startup asm file. */
/* Configure the PIO Lines corresponding to LED1 to LED4 to be outputs as
well as the UART Tx line. */
AT91F_PIO_CfgOutput( AT91C_BASE_PIOA, LED_MASK );
/* Enable the peripheral clock. */
AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_PIOA );
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;
/* The parameters are not used in this task. */
( void ) pvParameters;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. If an error is detected then the delay period
is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so
the on board LED flash rate will increase. */
for( ;; )
{
/* Delay until it is time to execute again. */
vTaskDelay( xDelayPeriod );
/* Check all the standard demo application tasks are executing without
error. */
if( prvCheckOtherTasksAreStillRunning() != pdPASS )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
vParTestToggleLED( mainCHECK_TASK_LED );
}
}
/*-----------------------------------------------------------*/
static long prvCheckOtherTasksAreStillRunning( void )
{
long lReturn = ( long ) pdPASS;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none of them have detected
an error. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xArePollingQueuesStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
return lReturn;
}
/*-----------------------------------------------------------*/

View File

@@ -1,180 +0,0 @@
// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// File: SAM7.mac
//
// User setup file for CSPY debugger to simulate interrupt
// driven Fibonacchi data input.
// 1.1 16/Jun/04 JPP : Creation
//
// $Revision: 1.3 $
//
// ---------------------------------------------------------
__var i;
__var pt;
execUserPreload()
{
//* Set the RAM memory at 0x0020 0000 for code AT 0 flash area
CheckRemap();
//* Get the Chip ID (AT91C_DBGU_C1R & AT91C_DBGU_C2R
i=__readMemory32(0xFFFFF240,"Memory");
__message " ---------------------------------------- Chip ID 0x",i:%X;
i=__readMemory32(0xFFFFF244,"Memory");
__message " ---------------------------------------- Extention 0x",i:%X;
//* Get the chip status
//* Init AIC
AIC();
//* Watchdog Disable
Watchdog();
}
//-----------------------------------------------------------------------------
// Watchdog
//-------------------------------
// Normally, the Watchdog is enable at the reset for load it's preferable to
// Disable.
//-----------------------------------------------------------------------------
Watchdog()
{
//* Watchdog Disable
// AT91C_BASE_WDTC->WDTC_WDMR= AT91C_SYSC_WDDIS;
__writeMemory32(0x00008000,0xFFFFFD44,"Memory");
__message "------------------------------- Watchdog Disable ----------------------------------------";
}
//-----------------------------------------------------------------------------
// Check Remap
//-------------
//-----------------------------------------------------------------------------
CheckRemap()
{
//* Read the value at 0x0
i=__readMemory32(0x00000000,"Memory");
i=i+1;
__writeMemory32(i,0x00,"Memory");
pt=__readMemory32(0x00000000,"Memory");
if (i == pt)
{
__message "------------------------------- The Remap is done ----------------------------------------";
//* Toggel RESET The remap
__writeMemory32(0x00000001,0xFFFFFF00,"Memory");
} else {
__message "------------------------------- The Remap is NOT -----------------------------------------";
}
}
execUserSetup()
{
ini();
__message "-------------------------------Set PC ----------------------------------------";
__writeMemory32(0x00000000,0xB4,"Register");
}
//-----------------------------------------------------------------------------
// Reset the Interrupt Controller
//-------------------------------
// Normally, the code is executed only if a reset has been actually performed.
// So, the AIC initialization resumes at setting up the default vectors.
//-----------------------------------------------------------------------------
AIC()
{
// Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF;
__writeMemory32(0xFFFFFFFF,0xFFFFF124,"Memory");
for (i=0;i < 8; i++)
{
// AT91C_BASE_AIC->AIC_EOICR
pt = __readMemory32(0xFFFFF130,"Memory");
}
__message "------------------------------- AIC INIT ---------------------------------------------";
}
ini()
{
__writeMemory32(0x0,0x00,"Register");
__writeMemory32(0x0,0x04,"Register");
__writeMemory32(0x0,0x08,"Register");
__writeMemory32(0x0,0x0C,"Register");
__writeMemory32(0x0,0x10,"Register");
__writeMemory32(0x0,0x14,"Register");
__writeMemory32(0x0,0x18,"Register");
__writeMemory32(0x0,0x1C,"Register");
__writeMemory32(0x0,0x20,"Register");
__writeMemory32(0x0,0x24,"Register");
__writeMemory32(0x0,0x28,"Register");
__writeMemory32(0x0,0x2C,"Register");
__writeMemory32(0x0,0x30,"Register");
__writeMemory32(0x0,0x34,"Register");
__writeMemory32(0x0,0x38,"Register");
// Set CPSR
__writeMemory32(0x0D3,0x98,"Register");
}
RG()
{
i=__readMemory32(0x00,"Register"); __message "R00 0x",i:%X;
i=__readMemory32(0x04,"Register"); __message "R01 0x",i:%X;
i=__readMemory32(0x08,"Register"); __message "R02 0x",i:%X;
i=__readMemory32(0x0C,"Register"); __message "R03 0x",i:%X;
i=__readMemory32(0x10,"Register"); __message "R04 0x",i:%X;
i=__readMemory32(0x14,"Register"); __message "R05 0x",i:%X;
i=__readMemory32(0x18,"Register"); __message "R06 0x",i:%X;
i=__readMemory32(0x1C,"Register"); __message "R07 0x",i:%X;
i=__readMemory32(0x20,"Register"); __message "R08 0x",i:%X;
i=__readMemory32(0x24,"Register"); __message "R09 0x",i:%X;
i=__readMemory32(0x28,"Register"); __message "R10 0x",i:%X;
i=__readMemory32(0x2C,"Register"); __message "R11 0x",i:%X;
i=__readMemory32(0x30,"Register"); __message "R12 0x",i:%X;
i=__readMemory32(0x34,"Register"); __message "R13 0x",i:%X;
i=__readMemory32(0x38,"Register"); __message "R14 0x",i:%X;
i=__readMemory32(0x3C,"Register"); __message "R13 SVC 0x",i:%X;
i=__readMemory32(0x40,"Register"); __message "R14 SVC 0x",i:%X;
i=__readMemory32(0x44,"Register"); __message "R13 ABT 0x",i:%X;
i=__readMemory32(0x48,"Register"); __message "R14 ABT 0x",i:%X;
i=__readMemory32(0x4C,"Register"); __message "R13 UND 0x",i:%X;
i=__readMemory32(0x50,"Register"); __message "R14 UND 0x",i:%X;
i=__readMemory32(0x54,"Register"); __message "R13 IRQ 0x",i:%X;
i=__readMemory32(0x58,"Register"); __message "R14 IRQ 0x",i:%X;
i=__readMemory32(0x5C,"Register"); __message "R08 FIQ 0x",i:%X;
i=__readMemory32(0x60,"Register"); __message "R09 FIQ 0x",i:%X;
i=__readMemory32(0x64,"Register"); __message "R10 FIQ 0x",i:%X;
i=__readMemory32(0x68,"Register"); __message "R11 FIQ 0x",i:%X;
i=__readMemory32(0x6C,"Register"); __message "R12 FIQ 0x",i:%X;
i=__readMemory32(0x70,"Register"); __message "R13 FIQ 0x",i:%X;
i=__readMemory32(0x74,"Register"); __message "R14 FIQ0x",i:%X;
i=__readMemory32(0x98,"Register"); __message "CPSR ",i:%X;
i=__readMemory32(0x94,"Register"); __message "SPSR ",i:%X;
i=__readMemory32(0x9C,"Register"); __message "SPSR ABT ",i:%X;
i=__readMemory32(0xA0,"Register"); __message "SPSR ABT ",i:%X;
i=__readMemory32(0xA4,"Register"); __message "SPSR UND ",i:%X;
i=__readMemory32(0xA8,"Register"); __message "SPSR IRQ ",i:%X;
i=__readMemory32(0xAC,"Register"); __message "SPSR FIQ ",i:%X;
i=__readMemory32(0xB4,"Register"); __message "PC 0x",i:%X;
}

View File

@@ -1,211 +0,0 @@
// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// File: SAM7_RAM.mac
//
// User setup file for CSPY debugger to simulate interrupt
// driven Fibonacchi data input.
// 1.1 16/Jun/04 JPP : Creation
// 1.2 27/Aug/04 JPP : PLL setting
//
// $Revision: 1.3 $
//
// ---------------------------------------------------------
__var i;
__var pt;
execUserPreload()
{
//*
PllSetting();
//* Set the RAM memory at 0x0020 0000 for code AT 0 flash area
CheckNoRemap();
//* Get the Chip ID (AT91C_DBGU_C1R & AT91C_DBGU_C2R
i=__readMemory32(0xFFFFF240,"Memory");
__message " ---------------------------------------- Chip ID 0x",i:%X;
i=__readMemory32(0xFFFFF244,"Memory");
__message " ---------------------------------------- Extention 0x",i:%X;
i=__readMemory32(0xFFFFFF6C,"Memory");
__message " ---------------------------------------- Flash Version 0x",i:%X;
//* Get the chip status
//* Init AIC
AIC();
//* Watchdog Disable
Watchdog();
}
//-----------------------------------------------------------------------------
// PllSetting
//-------------------------------
// Set PLL
//-----------------------------------------------------------------------------
PllSetting()
{
// -1- Enabling the Main Oscillator:
//*#define AT91C_PMC_MOR ((AT91_REG *) 0xFFFFFC20) // (PMC) Main Oscillator Register
//*#define AT91C_PMC_PLLR ((AT91_REG *) 0xFFFFFC2C) // (PMC) PLL Register
//*#define AT91C_PMC_MCKR ((AT91_REG *) 0xFFFFFC30) // (PMC) Master Clock Register
//*pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | //0x0000 0600
// AT91C_CKGR_MOSCEN )); //0x0000 0001
__writeMemory32(0x00000601,0xFFFFFC20,"Memory");
// -2- Wait
// -3- Setting PLL and divider:
// - div by 5 Fin = 3,6864 =(18,432 / 5)
// - Mul 25+1: Fout = 95,8464 =(3,6864 *26)
// for 96 MHz the erroe is 0.16%
// Field out NOT USED = 0
// PLLCOUNT pll startup time esrtimate at : 0.844 ms
// PLLCOUNT 28 = 0.000844 /(1/32768)
// pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) | //0x0000 0005
// (AT91C_CKGR_PLLCOUNT & (28<<8)) //0x0000 1C00
// (AT91C_CKGR_MUL & (25<<16))); //0x0019 0000
__writeMemory32(0x00191C05,0xFFFFFC2C,"Memory");
// -2- Wait
// -5- Selection of Master Clock and Processor Clock
// select the PLL clock divided by 2
// pPMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | //0x0000 0003
// AT91C_PMC_PRES_CLK_2 ; //0x0000 0004
__writeMemory32(0x00000007,0xFFFFFC30,"Memory");
__message "------------------------------- PLL Enable ----------------------------------------";
}
//-----------------------------------------------------------------------------
// Watchdog
//-------------------------------
// Normally, the Watchdog is enable at the reset for load it's preferable to
// Disable.
//-----------------------------------------------------------------------------
Watchdog()
{
//* Watchdog Disable
// AT91C_BASE_WDTC->WDTC_WDMR= AT91C_SYSC_WDDIS;
__writeMemory32(0x00008000,0xFFFFFD44,"Memory");
__message "------------------------------- Watchdog Disable ----------------------------------------";
}
CheckNoRemap()
{
//* Read the value at 0x0
i=__readMemory32(0x00000000,"Memory");
i=i+1;
__writeMemory32(i,0x00,"Memory");
pt=__readMemory32(0x00000000,"Memory");
if (i == pt)
{
__message "------------------------------- The Remap is done ----------------------------------------";
} else {
__message "------------------------------- The Remap is NOT -----------------------------------------";
//* Toggel RESET The remap
__writeMemory32(0x00000001,0xFFFFFF00,"Memory");
}
}
execUserSetup()
{
ini();
__message "-------------------------------Set PC ----------------------------------------";
__writeMemory32(0x00000000,0xB4,"Register");
}
//-----------------------------------------------------------------------------
// Reset the Interrupt Controller
//-------------------------------
// Normally, the code is executed only if a reset has been actually performed.
// So, the AIC initialization resumes at setting up the default vectors.
//-----------------------------------------------------------------------------
AIC()
{
// Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF;
__writeMemory32(0xFFFFFFFF,0xFFFFF124,"Memory");
for (i=0;i < 8; i++)
{
// AT91C_BASE_AIC->AIC_EOICR
pt = __readMemory32(0xFFFFF130,"Memory");
}
__message "------------------------------- AIC INIT ---------------------------------------------";
}
ini()
{
__writeMemory32(0x0,0x00,"Register");
__writeMemory32(0x0,0x04,"Register");
__writeMemory32(0x0,0x08,"Register");
__writeMemory32(0x0,0x0C,"Register");
__writeMemory32(0x0,0x10,"Register");
__writeMemory32(0x0,0x14,"Register");
__writeMemory32(0x0,0x18,"Register");
__writeMemory32(0x0,0x1C,"Register");
__writeMemory32(0x0,0x20,"Register");
__writeMemory32(0x0,0x24,"Register");
__writeMemory32(0x0,0x28,"Register");
__writeMemory32(0x0,0x2C,"Register");
__writeMemory32(0x0,0x30,"Register");
__writeMemory32(0x0,0x34,"Register");
__writeMemory32(0x0,0x38,"Register");
// Set CPSR
__writeMemory32(0x0D3,0x98,"Register");
}
RG()
{
i=__readMemory32(0x00,"Register"); __message "R00 0x",i:%X;
i=__readMemory32(0x04,"Register"); __message "R01 0x",i:%X;
i=__readMemory32(0x08,"Register"); __message "R02 0x",i:%X;
i=__readMemory32(0x0C,"Register"); __message "R03 0x",i:%X;
i=__readMemory32(0x10,"Register"); __message "R04 0x",i:%X;
i=__readMemory32(0x14,"Register"); __message "R05 0x",i:%X;
i=__readMemory32(0x18,"Register"); __message "R06 0x",i:%X;
i=__readMemory32(0x1C,"Register"); __message "R07 0x",i:%X;
i=__readMemory32(0x20,"Register"); __message "R08 0x",i:%X;
i=__readMemory32(0x24,"Register"); __message "R09 0x",i:%X;
i=__readMemory32(0x28,"Register"); __message "R10 0x",i:%X;
i=__readMemory32(0x2C,"Register"); __message "R11 0x",i:%X;
i=__readMemory32(0x30,"Register"); __message "R12 0x",i:%X;
i=__readMemory32(0x34,"Register"); __message "R13 0x",i:%X;
i=__readMemory32(0x38,"Register"); __message "R14 0x",i:%X;
i=__readMemory32(0x3C,"Register"); __message "R13 SVC 0x",i:%X;
i=__readMemory32(0x40,"Register"); __message "R14 SVC 0x",i:%X;
i=__readMemory32(0x44,"Register"); __message "R13 ABT 0x",i:%X;
i=__readMemory32(0x48,"Register"); __message "R14 ABT 0x",i:%X;
i=__readMemory32(0x4C,"Register"); __message "R13 UND 0x",i:%X;
i=__readMemory32(0x50,"Register"); __message "R14 UND 0x",i:%X;
i=__readMemory32(0x54,"Register"); __message "R13 IRQ 0x",i:%X;
i=__readMemory32(0x58,"Register"); __message "R14 IRQ 0x",i:%X;
i=__readMemory32(0x5C,"Register"); __message "R08 FIQ 0x",i:%X;
i=__readMemory32(0x60,"Register"); __message "R09 FIQ 0x",i:%X;
i=__readMemory32(0x64,"Register"); __message "R10 FIQ 0x",i:%X;
i=__readMemory32(0x68,"Register"); __message "R11 FIQ 0x",i:%X;
i=__readMemory32(0x6C,"Register"); __message "R12 FIQ 0x",i:%X;
i=__readMemory32(0x70,"Register"); __message "R13 FIQ 0x",i:%X;
i=__readMemory32(0x74,"Register"); __message "R14 FIQ0x",i:%X;
i=__readMemory32(0x98,"Register"); __message "CPSR ",i:%X;
i=__readMemory32(0x94,"Register"); __message "SPSR ",i:%X;
i=__readMemory32(0x9C,"Register"); __message "SPSR ABT ",i:%X;
i=__readMemory32(0xA0,"Register"); __message "SPSR ABT ",i:%X;
i=__readMemory32(0xA4,"Register"); __message "SPSR UND ",i:%X;
i=__readMemory32(0xA8,"Register"); __message "SPSR IRQ ",i:%X;
i=__readMemory32(0xAC,"Register"); __message "SPSR FIQ ",i:%X;
i=__readMemory32(0xB4,"Register"); __message "PC 0x",i:%X;
}

View File

@@ -1,43 +0,0 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00100000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00100040;
define symbol __ICFEDIT_region_ROM_end__ = 0x10FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x200000;
define symbol __ICFEDIT_region_RAM_end__ = 0x203FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_svcstack__ = 0x100;
define symbol __ICFEDIT_size_irqstack__ = 0x100;
define symbol __ICFEDIT_size_fiqstack__ = 0x0;
define symbol __ICFEDIT_size_undstack__ = 0x0;
define symbol __ICFEDIT_size_abtstack__ = 0x0;
define symbol __ICFEDIT_size_heap__ = 0x0;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
block UND_STACK, block ABT_STACK, block HEAP };

View File

@@ -1,73 +0,0 @@
// ----------------------------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ----------------------------------------------------------------------------
// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ----------------------------------------------------------------------------
// File Name : SAM7_FLASH.mac
// Object : Generic Macro File for IAR
// 1.0 17/Aug/05 FBr : Creation
// ----------------------------------------------------------------------------
/*********************************************************************
*
* _InitRSTC()
*
* Function description
* Initializes the RSTC (Reset controller).
* This makes sense since the default is to not allow user resets, which makes it impossible to
* apply a second RESET via J-Link
*/
_InitRSTC() {
__writeMemory32(0xA5000001, 0xFFFFFD08,"Memory"); // Allow user reset
}
/*********************************************************************
*
* _InitPLL()
* Function description
* Initializes the PMC.
* 1. Enable the Main Oscillator
* 2. Configure PLL to 96MHz
* 3. Switch Master Clock (MCK) on PLL/2 = 48MHz
*/
_InitPLL() {
__message "Enable Main Oscillator";
__writeMemory32(0x00000601,0xFFFFFc20,"Memory"); // MOSC
while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1) );
__message "Set PLL to 96MHz";
__writeMemory32(0x10191c05,0xFFFFFc2c,"Memory"); // LOCK
while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4) );
__message "Set Master Clock to 48MHz";
__writeMemory32(0x00000004,0xFFFFFc30,"Memory"); // MCKRDY
while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8) );
__writeMemory32(0x00000007,0xFFFFFc30,"Memory"); // MCKRDY
while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8) );
// Set 1 WS for Flash accesses on each EFC
__writeMemory32(0x00480100,0xFFFFFF60,"Memory");
__writeMemory32(0x00480100,0xFFFFFF70,"Memory");
}
/*********************************************************************
*
* execUserReset() : JTAG set initially to Full Speed
*/
execUserReset() {
__message "execUserReset()";
__hwReset(0); // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)
_InitPLL(); // Allow to debug at JTAG Full Speed
_InitRSTC(); // Enable User Reset to allow execUserReset() execution
}

View File

@@ -1,12 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<loader>$TOOLKIT_DIR$\config\flashloader\Atmel\AT91SAM7S64-EK\flash-at91sam7s64.flash</loader>
<range>CODE 0x100000 0x110000</range>
<rel_offset>0</rel_offset>
<args>--flash
--boot
</args>
</pass>
</flash_board>

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@@ -1,10 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\rtosdemo.ewp</path>
</project>
<batchBuild/>
</workspace>

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@@ -1,267 +0,0 @@
/*
FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
/* Demo application includes. */
#include "serial.h"
/*-----------------------------------------------------------*/
/* Location of the COM0 registers. */
#define serCOM0 ( ( AT91PS_USART ) AT91C_BASE_US0 )
/* Interrupt control macros. */
#define serINTERRUPT_LEVEL ( 5 )
#define vInterruptOn() AT91F_US_EnableIt( serCOM0, AT91C_US_TXRDY | AT91C_US_RXRDY )
#define vInterruptOff() AT91F_US_DisableIt( serCOM0, AT91C_US_TXRDY )
/* Misc constants. */
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
#define serNO_TIMEGUARD ( ( unsigned long ) 0 )
#define serNO_PERIPHERAL_B_SETUP ( ( unsigned long ) 0 )
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/* Interrupt entry point written in the assembler file serialISR.s79. */
extern void vSerialISREntry( void );
/* The interrupt service routine - called from the assembly entry point. */
__arm void vSerialISR( void );
/*-----------------------------------------------------------*/
/*
* See the serial2.h header file.
*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
xComPortHandle xReturn = serHANDLE;
extern void ( vUART_ISR )( void );
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* If the queues were created correctly then setup the serial port
hardware. */
if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
{
portENTER_CRITICAL();
{
/* Enable the USART clock. */
AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, 1 << AT91C_ID_US0 );
AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, ( ( unsigned long ) AT91C_PA5_RXD0 ) | ( ( unsigned long ) AT91C_PA6_TXD0 ), serNO_PERIPHERAL_B_SETUP );
/* Set the required protocol. */
AT91F_US_Configure( serCOM0, configCPU_CLOCK_HZ, AT91C_US_ASYNC_MODE, ulWantedBaud, serNO_TIMEGUARD );
/* Enable Rx and Tx. */
serCOM0->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
/* Enable the Rx interrupts. The Tx interrupts are not enabled
until there are characters to be transmitted. */
AT91F_US_EnableIt( serCOM0, AT91C_US_RXRDY );
/* Enable the interrupts in the AIC. */
AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_US0, serINTERRUPT_LEVEL, AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, ( void (*)( void ) ) vSerialISREntry );
AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_US0 );
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
/* This demo file only supports a single port but we have to return
something to comply with the standard demo header file. */
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports one port. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
{
signed char *pxNext;
/* A couple of parameters that this port does not use. */
( void ) usStringLength;
( void ) pxPort;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Send each character in the string, one at a time. */
pxNext = ( signed char * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
{
/* Place the character in the queue of characters to be transmitted. */
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
return pdFAIL;
}
/* Turn on the Tx interrupt so the ISR will remove the character from the
queue and send it. This does not need to be in a critical section as
if the interrupt has already removed the character the next interrupt
will simply turn off the Tx interrupt again. */
vInterruptOn();
return pdPASS;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported as not required by the demo application. */
}
/*-----------------------------------------------------------*/
/* Serial port ISR. This can cause a context switch so is not defined as a
standard ISR using the __irq keyword. Instead a wrapper function is defined
within serialISR.s79 which in turn calls this function. See the port
documentation on the FreeRTOS.org website for more information. */
__arm void vSerialISR( void )
{
unsigned long ulStatus;
signed char cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
ulStatus = serCOM0->US_CSR &= serCOM0->US_IMR;
if( ulStatus & AT91C_US_TXRDY )
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
serCOM0->US_THR = cChar;
}
else
{
/* Queue empty, nothing to send so turn off the Tx interrupt. */
vInterruptOff();
}
}
if( ulStatus & AT91C_US_RXRDY )
{
/* The interrupt was caused by a character being received. Grab the
character from the RHR and place it in the queue or received
characters. */
cChar = serCOM0->US_RHR;
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
/* If a task was woken by either a character being received or a character
being transmitted then we may need to switch to another task. */
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
/* End the interrupt in the AIC. */
AT91C_BASE_AIC->AIC_EOICR = 0;
}

View File

@@ -1,24 +0,0 @@
RSEG ICODE:CODE
CODE32
EXTERN vSerialISR
PUBLIC vSerialISREntry
; Wrapper for the serial port interrupt service routine. This can cause a
; context switch so requires an assembly wrapper.
; Defines the portSAVE_CONTEXT and portRESTORE_CONTEXT macros.
#include "ISR_Support.h"
vSerialISREntry:
portSAVE_CONTEXT ; Save the context of the current task.
bl vSerialISR ; Call the ISR routine.
portRESTORE_CONTEXT ; Restore the context of the current task -
; which may be different to the task that
; was interrupted.
END

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@@ -1,71 +0,0 @@
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@@ -1,23 +0,0 @@
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mode=0
[Breakpoints]
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[Low Level]
Pipeline mode=0
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@@ -1,80 +0,0 @@
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<TabName>Workspace</TabName>
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</Desktop>
</Project>

View File

@@ -1,47 +0,0 @@
[DisAssemblyWindow]
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State 1=_ 1
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WatchCond=_ 0
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Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
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[InstructionProfiling]
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LogFile=_ ""
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[DriverProfiling]
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[Disassemble mode]
mode=0
[Breakpoints]
Count=0

View File

@@ -1,76 +0,0 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>rtosdemo/Flash Debug</Project></CurrentConfigs></ConfigDictionary>
<Desktop>
<Static>
<Workspace>
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<Column0>236</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
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<Build><ColumnWidth0>18</ColumnWidth0><ColumnWidth1>1155</ColumnWidth1><ColumnWidth2>308</ColumnWidth2><ColumnWidth3>77</ColumnWidth3></Build>
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</Workspace>

View File

@@ -1,17 +0,0 @@
// IAR XLINK Setup
// Autogenerated file - do not edit
%
setrangelist($evec_ADR,[0-3F]);
setrangelist($internal_ROM,[8000-FFFFF]);
setrangelist($external_ROM,[]);
setrangelist($internal_RAM,[100000-7FFFFF]);
setrangelist($external_RAM,[]);
$CSTACK_SIZE=200;
$IRQSTACK_SIZE=100;
$HEAP_SIZE=4;
$COMMANDS="";
$STACK_LOCATION="Internal RAM";
$IRQSTACK_LOCATION="Internal RAM";
$HEAP_LOCATION="Internal RAM";
$iar_saved_xclfilename="E:\Dev\FreeRTOS\Demo\ARM7_AT91SAM7S64_IAR\resource\at91SAM7S64_NoRemap.xcl";
%

View File

@@ -1,17 +0,0 @@
*** SESSION Sep 07, 2007 11:40:29.515 ------------------------------------------
*** SESSION Sep 26, 2007 20:59:04.640 ------------------------------------------
*** SESSION Sep 27, 2007 17:22:58.687 ------------------------------------------
*** SESSION Oct 04, 2007 20:29:08.859 ------------------------------------------
*** SESSION Oct 23, 2007 19:47:01.875 ------------------------------------------
*** SESSION Oct 23, 2007 21:13:26.296 ------------------------------------------
*** SESSION Oct 23, 2007 21:22:16.187 ------------------------------------------
*** SESSION Oct 28, 2007 12:37:13.93 -------------------------------------------
*** SESSION Nov 06, 2007 16:04:46.31 -------------------------------------------
*** SESSION Nov 06, 2007 20:19:12.359 ------------------------------------------
*** SESSION Nov 07, 2007 18:40:55.281 ------------------------------------------
*** SESSION Nov 13, 2007 20:49:09.875 ------------------------------------------
*** SESSION Nov 17, 2007 17:59:26.734 ------------------------------------------
*** SESSION Nov 17, 2007 19:36:59.656 ------------------------------------------
*** SESSION Nov 21, 2007 08:36:47.312 ------------------------------------------
*** SESSION Nov 21, 2007 15:42:29.171 ------------------------------------------
*** SESSION Nov 21, 2007 17:07:49.515 ------------------------------------------

View File

@@ -1 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?><SharedRoot><SharedProperty id="" value=""/></SharedRoot>

View File

@@ -1,161 +0,0 @@
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View File

@@ -1,5 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="org.eclipse.cdt.internal.ui.MakeView">
</section>
</section>

View File

@@ -1,4 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<cHelpSettings>
<project name="RTOSDemo"/>
</cHelpSettings>

View File

@@ -1,12 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<item value="1" key="org.eclipse.cdt.uiformatter_page.line_wrapping_tab_page.last_category_index"/>
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</section>
<section name="PDOMSearchPage">
</section>
</section>

View File

@@ -1,3 +0,0 @@
#Sun Aug 19 15:20:24 BST 2007
eclipse.preferences.version=1
indexer/preferenceScope=0

View File

@@ -1,3 +0,0 @@
#Sun Aug 19 15:19:23 BST 2007
org.eclipse.cdt.debug.core.cDebug.common_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<sourceLookupDirector>\r\n<sourceContainers duplicates\="false"/>\r\n</sourceLookupDirector>\r\n
eclipse.preferences.version=1

View File

@@ -1,5 +0,0 @@
#Tue Oct 23 21:13:09 BST 2007
pref_state_memento.org.eclipse.cdt.debug.ui.ModulesView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<ModulesViewMemento org.eclipse.cdt.debug.ui.SASH_DETAILS_PART\="570" org.eclipse.cdt.debug.ui.SASH_VIEW_PART\="429"/>
eclipse.preferences.version=1
org.eclipse.debug.ui.DebugView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true
org.eclipse.debug.ui.BreakpointView.org.eclipse.cdt.debug.ui.cDebug.show_full_paths=true

View File

@@ -1,3 +0,0 @@
#Wed Nov 21 16:20:43 GMT 2007
eclipse.preferences.version=1
properties/RTOSDemo.null.976634949/0.1109417601=\#\r\n\#Wed Nov 21 16\:20\:43 GMT 2007\r\n0.1109417601\=\\\#\\r\\n\\\#Wed Nov 21 16\\\:20\\\:43 GMT 2007\\r\\nrcState\\\=0\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.1502006385\=\\\#\\r\\n\\\#Wed Nov 21 16\\\:20\\\:43 GMT 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.1021181093\=\\\#\\r\\n\\\#Wed Nov 21 16\\\:20\\\:43 GMT 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.164584712\=\\\#\\r\\n\\\#Wed Nov 21 16\\\:20\\\:43 GMT 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.settings.holder.libs.260784574\=\\\#\\r\\n\\\#Wed Nov 21 16\\\:20\\\:43 GMT 2007\\r\\nrebuildState\\\=false\\r\\n\r\norg.eclipse.cdt.build.core.prefbase.toolchain.1816209921\=\\\#\\r\\n\\\#Wed Nov 21 16\\\:20\\\:43 GMT 2007\\r\\nrebuildState\\\=false\\r\\n\r\n

View File

@@ -1,12 +0,0 @@
#Thu Aug 23 20:22:58 BST 2007
useQuickDiffPrefPage=true
closeBrackets=false
ensureNewlineAtEOF=true
useAnnotationsPrefPage=true
closeAngularBrackets=false
eclipse.preferences.version=1
org.eclipse.cdt.ui.text.templates.custom=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?><templates/>
hoverModifierMasks=org.eclipse.cdt.ui.BestMatchHover;0;org.eclipse.cdt.ui.CSourceHover;131072;org.eclipse.cdt.debug.internal.ui.editors.DebugTextHover;0;org.eclipse.cdt.ui.CDocHover;0;org.eclipse.cdt.ui.AnnotationHover;0;
hoverModifiers=org.eclipse.cdt.ui.BestMatchHover;0;org.eclipse.cdt.ui.CSourceHover;Shift;org.eclipse.cdt.debug.internal.ui.editors.DebugTextHover;\!0;org.eclipse.cdt.ui.CDocHover;\!0;org.eclipse.cdt.ui.AnnotationHover;\!0;
closeBraces=false
closeStrings=false

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@@ -1,5 +0,0 @@
#Fri Aug 31 14:25:00 BST 2007
version=1
eclipse.preferences.version=1
pathvariable.FreeRTOS_ROOT=C\:/E/Dev/FreeRTOS
description.autobuilding=false

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@@ -1,3 +0,0 @@
#Sat Nov 17 13:34:58 GMT 2007
prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<watchExpressions/>\r\n
eclipse.preferences.version=1

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@@ -1,14 +0,0 @@
#Wed Nov 07 18:56:22 GMT 2007
org.eclipse.debug.ui.PREF_FILTER_WORKING_SETS=false
org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<launchPerspectives/>\r\n
org.eclipse.debug.ui.BreakpointView+org.eclipse.debug.ui.ShowSupportedBreakpointsAction=true
pref_state_memento.org.eclipse.debug.ui.VariableView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684"/>
pref_state_memento.org.eclipse.debug.ui.RegisterView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="198" org.eclipse.debug.ui.SASH_VIEW_PART\="801"/>
org.eclipse.debug.ui.memory.columnSize\:org.eclipse.cdt.debug.core=4
pref_state_memento.org.eclipse.debug.ui.ExpressionView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684"/>
org.eclipse.debug.ui.PREF_FILTER_LAUNCH_CLOSED=false
preferredDetailPanes=DefaultDetailPane\:DefaultDetailPane|
org.eclipse.debug.ui.PREF_FILTER_LAUNCH_DELETED=false
eclipse.preferences.version=1
org.eclipse.debug.ui.memory.rowSize\:org.eclipse.cdt.debug.core=16
org.eclipse.debug.ui.user_view_bindings=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<viewBindings>\r\n<view id\="org.eclipse.debug.ui.ExpressionView">\r\n<perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\r\n</view>\r\n</viewBindings>\r\n

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@@ -1,7 +0,0 @@
#Sun Aug 26 17:32:13 BST 2007
browser.x=177
browser.w=1024
eclipse.preferences.version=1
browser.h=768
browser.maximized=false
browser.y=128

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@@ -1,3 +0,0 @@
#Sun Aug 19 19:39:29 BST 2007
org.eclipse.search.defaultPerspective=org.eclipse.search.defaultPerspective.none
eclipse.preferences.version=1

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@@ -1,3 +0,0 @@
#Fri Aug 31 18:19:04 BST 2007
eclipse.preferences.version=1
org.eclipse.team.ui.first_time=false

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@@ -1,3 +0,0 @@
#Sun Aug 19 20:45:57 BST 2007
eclipse.preferences.version=1
overviewRuler_migration=migrated_3.1

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@@ -1,4 +0,0 @@
#Tue Nov 06 22:57:01 GMT 2007
eclipse.preferences.version=1
tipsAndTricks=true
platformState=1187207632259

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@@ -1,3 +0,0 @@
#Sun Aug 19 20:45:58 BST 2007
eclipse.preferences.version=1
showIntro=false

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@@ -1,3 +0,0 @@
#Mon Aug 20 21:59:49 BST 2007
eclipse.preferences.version=1
org.eclipse.ui.commands=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<org.eclipse.ui.commands>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+B"/>\r\n<keyBinding commandId\="org.eclipse.ui.project.buildAll" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F7"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F11"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.StepInto" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F11"/>\r\n<keyBinding contextId\="org.eclipse.debug.ui.debugging" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F6"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.StepOver" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F10"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.DebugLast" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+D"/>\r\n<keyBinding contextId\="org.eclipse.ui.textEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+D"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+F11"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.RunLast" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F5"/>\r\n<keyBinding contextId\="org.eclipse.ui.textEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+K"/>\r\n<keyBinding commandId\="org.eclipse.ui.edit.findNext" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.make.ui.makefileEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cEditorScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n<keyBinding contextId\="org.eclipse.cdt.ui.cViewScope" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="F3"/>\r\n</org.eclipse.ui.commands>

View File

@@ -1,7 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">
<booleanAttribute key="org.eclipse.debug.core.appendEnvironmentVariables" value="true"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${workspace_loc}/../Common/drivers/OpenOCD/openocd-pp.exe"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="--file SAM7_flash.cfg"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc}"/>
</launchConfiguration>

View File

@@ -1,7 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">
<booleanAttribute key="org.eclipse.debug.core.appendEnvironmentVariables" value="true"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${workspace_loc}/../Common/drivers/OpenOCD/openocd-pp.exe"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="--file SAM7_pp.cfg"/>
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc}"/>
</launchConfiguration>

View File

@@ -1,33 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.cdt.launch.localCLaunch">
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.AUTO_SOLIB" value="true"/>
<listAttribute key="org.eclipse.cdt.debug.mi.core.AUTO_SOLIB_LIST"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="gdb"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEV" value="/dev/ttyS0"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEV_SPEED" value="115200"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.GDB_INIT" value=".gdbinit"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.HOST" value="localhost"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.PORT" value="10000"/>
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.REMOTE_TCP" value="false"/>
<listAttribute key="org.eclipse.cdt.debug.mi.core.SOLIB_PATH"/>
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.STOP_ON_SOLIB_EVENTS" value="false"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="org.eclipse.cdt.debug.mi.core.standardCommandFactory"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="org.eclipse.cdt.debug.mi.core.GDBServerCDebugger"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/>
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="RTOSDemo.elf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RTOSDemo"/>
<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/RTOSDemo"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/>
</listAttribute>
<booleanAttribute key="org.eclipse.debug.core.appendEnvironmentVariables" value="true"/>
</launchConfiguration>

View File

@@ -1,26 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.imageFileName" value="C:\E\Dev\FreeRTOS\Demo\CORTEX_LM3S8962_Eclipse\RTOSDemo\RTOSDemo.elf"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.initCommands" value="target remote:3333&#13;&#10;monitor sleep 500&#13;&#10;monitor arm7_9 force_hw_bkpts enable&#13;&#10;monitor sleep 500&#13;&#10;monitor soft_reset_halt&#13;&#10;delete&#13;&#10;monitor sleep 500&#13;&#10;b main&#13;&#10;monitor sleep 500&#13;&#10;c&#13;&#10;monitor sleep 500&#13;&#10;delete&#13;&#10;&#13;&#10;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.ipAddress" value="localhost"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbremote.core.loadImage" value="false"/>
<intAttribute key="org.eclipse.cdt.debug.gdbremote.core.portNumber" value="3333"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbremote.core.runCommands" value=""/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbremote.core.useRemoteTarget" value="false"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-elf-gdb.exe"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.GDB_INIT" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList&gt;&#13;&#10;&lt;memoryBlockExpressionItem&gt;&#13;&#10;&lt;expression text=&quot;2107200&quot;/&gt;&#13;&#10;&lt;/memoryBlockExpressionItem&gt;&#13;&#10;&lt;/memoryBlockExpressionList&gt;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="RTOSDemo.elf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RTOSDemo"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/RTOSDemo"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/>
</listAttribute>
</launchConfiguration>

View File

@@ -1,41 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="org.eclipse.debug.ui.STRING_VARIABLE_SELECTION_DIALOG_SECTION">
<item value="326" key="DIALOG_WIDTH"/>
<item value="-33" key="DIALOG_Y_ORIGIN"/>
<item value="309" key="DIALOG_X_ORIGIN"/>
<item value="530" key="DIALOG_HEIGHT"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
<section name="org.eclipse.debug.ui.LAUNCH_CONFIGURATIONS_DIALOG_SECTION">
<item value="966" key="DIALOG_WIDTH"/>
<item value="154" key="DIALOG_Y_ORIGIN"/>
<item value=", org.eclipse.ui.externaltools.ProgramLaunchConfigurationType, org.eclipse.cdt.debug.gdbjtag.launchConfigurationType, " key="org.eclipse.debug.ui.EXPANDED_NODES"/>
<item value="274" key="DIALOG_X_ORIGIN"/>
<item value="640" key="DIALOG_HEIGHT"/>
<item value="237" key="org.eclipse.debug.ui.DIALOG_SASH_WEIGHTS_1"/>
<item value="762" key="org.eclipse.debug.ui.DIALOG_SASH_WEIGHTS_2"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
<section name="org.eclipse.debug.ui.SELECT_LAUNCH_SHORTCUT_DIALOG">
<item value="450" key="DIALOG_WIDTH"/>
<item value="215" key="DIALOG_Y_ORIGIN"/>
<item value="479" key="DIALOG_X_ORIGIN"/>
<item value="450" key="DIALOG_HEIGHT"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
<section name="org.eclipse.debug.ui.SELECT_CONFIGURATION_TYPE_DIALOG">
<item value="300" key="DIALOG_WIDTH"/>
<item value="46" key="DIALOG_Y_ORIGIN"/>
<item value="301" key="DIALOG_X_ORIGIN"/>
<item value="350" key="DIALOG_HEIGHT"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
<section name="FAVORITES_DIALOG_SECTION">
<item value="227" key="DIALOG_WIDTH"/>
<item value="360" key="DIALOG_Y_ORIGIN"/>
<item value="731" key="DIALOG_X_ORIGIN"/>
<item value="233" key="DIALOG_HEIGHT"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
</section>

View File

@@ -1,27 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchHistory>
<launchGroup id="org.eclipse.ui.externaltools.launchGroup">
<mruHistory>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;OpenOCD Server.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;OpenOCD Programmer.launch&quot;/&gt;&#13;&#10;"/>
</mruHistory>
<favorites/>
</launchGroup>
<launchGroup id="org.eclipse.debug.ui.launchGroup.profile">
<mruHistory/>
<favorites/>
</launchGroup>
<launchGroup id="org.eclipse.debug.ui.launchGroup.debug">
<mruHistory>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;RTOSDemo.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;RTOSDemo.elf.launch&quot;/&gt;&#13;&#10;"/>
</mruHistory>
<favorites/>
</launchGroup>
<launchGroup id="org.eclipse.debug.ui.launchGroup.run">
<mruHistory>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;true&quot; path=&quot;RTOSDemo.elf.launch&quot;/&gt;&#13;&#10;"/>
</mruHistory>
<favorites/>
</launchGroup>
</launchHistory>

View File

@@ -1,3 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
</section>

View File

@@ -1,2 +0,0 @@
#Sun Aug 26 17:54:18 BST 2007
__DEFAULT__=true

View File

@@ -1,4 +0,0 @@
#Sun Aug 26 17:36:29 BST 2007
__DEFAULT__=false
org.eclipse.help.ui.localSearch.master=true
expression=relative path

View File

@@ -1,4 +0,0 @@
#Sun Aug 26 17:29:25 BST 2007
__DEFAULT__=false
org.eclipse.help.ui.localSearch.master=true
expression=working set

View File

@@ -1,4 +0,0 @@
#Sun Aug 26 17:54:21 BST 2007
__DEFAULT__=false
org.eclipse.help.ui.localSearch.master=true
expression=working sets

View File

@@ -1,6 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="RefactoringPropertyPage">
<item value="true" key="org.eclipse.ltk.ui.refactoring.sortRefactorings"/>
</section>
</section>

View File

@@ -1,46 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="">
<item value="1000" key="org.eclipse.search.resultpage.limit"/>
</section>
<section name="DialogBounds_SearchDialog">
<item value="519" key="DIALOG_WIDTH"/>
<item value="259" key="DIALOG_Y_ORIGIN"/>
<item value="385" key="DIALOG_HEIGHT"/>
<item value="445" key="DIALOG_X_ORIGIN"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
<section name="Search">
<list key="Search.processedPageIds">
<item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>
<item value="org.eclipse.cdt.ui.pdomSearchPage"/>
</list>
<list key="Search.enabledPageIds">
<item value="org.eclipse.search.internal.ui.text.TextSearchPage"/>
<item value="org.eclipse.cdt.ui.pdomSearchPage"/>
</list>
</section>
<section name="org.eclipse.search.text.FileSearchResultPage">
<item value="1000" key="org.eclipse.search.resultpage.limit"/>
</section>
<section name="TextSearchPage">
<item value="false" key="CASE_SENSITIVE"/>
<item value="false" key="REG_EX_SEARCH"/>
<item value="false" key="SEARCH_DERIVED"/>
<item value="1" key="HISTORY_SIZE"/>
<section name="HISTORY0">
<item value="false" key="isRegExSearch"/>
<item value="struct timer" key="textPattern"/>
<item value="0" key="scope"/>
<item value="true" key="ignoreCase"/>
<list key="fileNamePatterns">
<item value="*.c *.h"/>
</list>
<list key="workingSets">
</list>
</section>
</section>
<section name="SearchDialog.ScopePart">
<item value="0" key="scope"/>
</section>
</section>

View File

@@ -1,10 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="CheatSheetCategoryBasedSelectionDialog">
<item value="326" key="DIALOG_WIDTH"/>
<item value="154" key="DIALOG_Y_ORIGIN"/>
<item value="542" key="DIALOG_HEIGHT"/>
<item value="541" key="DIALOG_X_ORIGIN"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
</section>

View File

@@ -1,26 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="ResourceNavigator">
<item value="FreeRTOS_LM3S8962_Demo" key="ResourceWorkingSetFilter.STORE_WORKING_SET"/>
<item value="1" key="ResourceViewer.STORE_SORT_TYPE"/>
</section>
<section name="org.eclipse.ui.views.task">
</section>
<section name="org.eclipse.ui.views.problem">
</section>
<section name="SaveAsDialogSettings">
<item value="438" key="DIALOG_WIDTH"/>
<item value="147" key="DIALOG_Y_ORIGIN"/>
<item value="625" key="DIALOG_X_ORIGIN"/>
<item value="553" key="DIALOG_HEIGHT"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
<section name="CleanDialogSettings">
<item value="443" key="DIALOG_WIDTH"/>
<item value="true" key="BUILD_NOW"/>
<item value="251" key="DIALOG_Y_ORIGIN"/>
<item value="391" key="DIALOG_HEIGHT"/>
<item value="479" key="DIALOG_X_ORIGIN"/>
<item value="false" key="TOGGLE_SELECTED"/>
</section>
</section>

View File

@@ -1,4 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<item value="1024" key="introLaunchBar.location"/>
</section>

View File

@@ -1,38 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<section name="Workbench">
<section name="org.eclipse.ui.texteditor.FindReplaceDialog_dialogBounds">
<item value="243" key="DIALOG_WIDTH"/>
<item value="209" key="DIALOG_Y_ORIGIN"/>
<item value="1044" key="DIALOG_X_ORIGIN"/>
<item value="356" key="DIALOG_HEIGHT"/>
<item value="1|Tahoma|8.25|0|WINDOWS|1|-11|0|0|0|400|0|0|0|1|0|0|0|0|Tahoma" key="DIALOG_FONT_NAME"/>
</section>
<section name="org.eclipse.ui.texteditor.FindReplaceDialog">
<item value="false" key="wrap"/>
<item value="false" key="casesensitive"/>
<item value="false" key="isRegEx"/>
<item value="false" key="incremental"/>
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View File

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