Update to V4.3.0 as described in http://www.FreeRTOS.org/History.txt

Thanks Marcel.

Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_AT91FR40008_GCC/Makefile

@@ -1,4 +1,4 @@
-#	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+#	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 #
 #	This file is part of the FreeRTOS.org distribution.
 #
@@ -38,7 +38,7 @@ CRT0=boot.s
 #
 CFLAGS=-Wall -D $(RUN_MODE) -D GCC_AT91FR40008 -I. -I../../Source/include \
 		-I../Common/include $(DEBUG) -mcpu=arm7tdmi -T$(LDSCRIPT) \
-		-Wcast-align $(OPTIM)
+		-Wcast-align $(OPTIM) -fomit-frame-pointer
 
 ifeq ($(USE_THUMB_MODE),YES)
 	CFLAGS += -mthumb-interwork -D THUMB_INTERWORK

Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_AT91FR40008_GCC/ebi.h

@@ -1,121 +1,121 @@
-//*-----------------------------------------------------------------------------
-//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
-//*-----------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*-----------------------------------------------------------------------------
-//* File Name           : ebi.h
-//* Object              : External Bus Interface Definition File
-//* Translator          : ARM Software Development Toolkit V2.11a
-//*
-//* 1.0 03/11/97 JCZ    : Creation
-//* 2.0 21/10/98 JCZ    : Clean up
-//*-----------------------------------------------------------------------------
-
-#ifndef ebi_h
-#define ebi_h
-
-/*----------------------------------------*/
-/* Memory Controller Interface Definition */
-/*----------------------------------------*/
-
-typedef struct
-{
-    at91_reg        EBI_CSR[8] ;        /* Chip Select Register */
-    at91_reg        EBI_RCR ;           /* Remap Control Register */
-    at91_reg        EBI_MCR ;           /* Memory Control Register */
-} StructEBI ;
-
-/*-----------------------*/
-/* Chip Select Registers */
-/*-----------------------*/
-
-/* Data Bus Width */
-#define DataBus16               (1<<0)
-#define DataBus8                (2<<0)
-#define DBW                     (3<<0)
-
-/* Number of Wait States */
-#define B_NWS                   2
-#define WaitState1              (0<<B_NWS)
-#define WaitState2              (1<<B_NWS)
-#define WaitState3              (2<<B_NWS)
-#define WaitState4              (3<<B_NWS)
-#define WaitState5              (4<<B_NWS)
-#define WaitState6              (5<<B_NWS)
-#define WaitState7              (6<<B_NWS)
-#define WaitState8              (7<<B_NWS)
-#define NWS                     (7<<B_NWS)
-
-/* Wait State Enable */
-#define WaitStateDisable        (0<<5)
-#define WaitStateEnable         (1<<5)
-#define WSE                     (1<<5)
-
-/* Page size */
-#define PageSize1M              (0<<7)
-#define PageSize4M              (1<<7)
-#define PageSize16M             (2<<7)
-#define PageSize64M             (3<<7)
-#define PAGES                   (3<<7)
-
-/* Number of Data Float Output Time Clock Cycle */
-#define B_TDF                   9
-#define tDF_0cycle              (0<<B_TDF)
-#define tDF_1cycle              (1<<B_TDF)
-#define tDF_2cycle              (2<<B_TDF)
-#define tDF_3cycle              (3<<B_TDF)
-#define tDF_4cycle              (4<<B_TDF)
-#define tDF_5cycle              (5<<B_TDF)
-#define tDF_6cycle              (6<<B_TDF)
-#define tDF_7cycle              (7<<B_TDF)
-#define TDF                     (7<<B_TDF)
-
-/* Byte Access Type */
-#define ByteWriteAccessType (0<<12)
-#define ByteSelectAccessType    (1<<12)
-#define BAT                     1<<12)
-
-/* Chip Select Enable */
-#define CSEnable                (1<<13)
-#define CSDisable               (0<<13)
-#define CSE                     (1<<13)
-
-#define BA                      ((u_int)(0xFFF)<<20)
-
-/*-------------------------*/
-/* Memory Control Register */
-/*-------------------------*/
-
-/* Address Line Enable */
-#define ALE                     (7<<0)
-#define BankSize16M             (0<<0)
-#define BankSize8M              (4<<0)
-#define BankSize4M              (5<<0)
-#define BankSize2M              (6<<0)
-#define BankSize1M              (7<<0)
-
-/* Data Read Protocol */
-#define StandardReadProtocol    (0<<4)
-#define EarlyReadProtocol       (1<<4)
-#define DRP                     (1<<4)
-
-/*------------------------*/
-/* Remap Control Register */
-/*------------------------*/
-
-#define RCB                     (1<<0)
-
-/*--------------------------------*/
-/* Device Dependancies Definition */
-/*--------------------------------*/
-
-#ifdef AT91M40400
-/* External Bus Interface User Interface BAse Address */
-#define EBI_BASE            ((StructEBI *) 0xFFE00000)
-#endif
-
-#endif /* ebi_h */
+//*-----------------------------------------------------------------------------
+//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
+//*-----------------------------------------------------------------------------
+//* The software is delivered "AS IS" without warranty or condition of any
+//* kind, either express, implied or statutory. This includes without
+//* limitation any warranty or condition with respect to merchantability or
+//* fitness for any particular purpose, or against the infringements of
+//* intellectual property rights of others.
+//*-----------------------------------------------------------------------------
+//* File Name           : ebi.h
+//* Object              : External Bus Interface Definition File
+//* Translator          : ARM Software Development Toolkit V2.11a
+//*
+//* 1.0 03/11/97 JCZ    : Creation
+//* 2.0 21/10/98 JCZ    : Clean up
+//*-----------------------------------------------------------------------------
+
+#ifndef ebi_h
+#define ebi_h
+
+/*----------------------------------------*/
+/* Memory Controller Interface Definition */
+/*----------------------------------------*/
+
+typedef struct
+{
+    at91_reg        EBI_CSR[8] ;        /* Chip Select Register */
+    at91_reg        EBI_RCR ;           /* Remap Control Register */
+    at91_reg        EBI_MCR ;           /* Memory Control Register */
+} StructEBI ;
+
+/*-----------------------*/
+/* Chip Select Registers */
+/*-----------------------*/
+
+/* Data Bus Width */
+#define DataBus16               (1<<0)
+#define DataBus8                (2<<0)
+#define DBW                     (3<<0)
+
+/* Number of Wait States */
+#define B_NWS                   2
+#define WaitState1              (0<<B_NWS)
+#define WaitState2              (1<<B_NWS)
+#define WaitState3              (2<<B_NWS)
+#define WaitState4              (3<<B_NWS)
+#define WaitState5              (4<<B_NWS)
+#define WaitState6              (5<<B_NWS)
+#define WaitState7              (6<<B_NWS)
+#define WaitState8              (7<<B_NWS)
+#define NWS                     (7<<B_NWS)
+
+/* Wait State Enable */
+#define WaitStateDisable        (0<<5)
+#define WaitStateEnable         (1<<5)
+#define WSE                     (1<<5)
+
+/* Page size */
+#define PageSize1M              (0<<7)
+#define PageSize4M              (1<<7)
+#define PageSize16M             (2<<7)
+#define PageSize64M             (3<<7)
+#define PAGES                   (3<<7)
+
+/* Number of Data Float Output Time Clock Cycle */
+#define B_TDF                   9
+#define tDF_0cycle              (0<<B_TDF)
+#define tDF_1cycle              (1<<B_TDF)
+#define tDF_2cycle              (2<<B_TDF)
+#define tDF_3cycle              (3<<B_TDF)
+#define tDF_4cycle              (4<<B_TDF)
+#define tDF_5cycle              (5<<B_TDF)
+#define tDF_6cycle              (6<<B_TDF)
+#define tDF_7cycle              (7<<B_TDF)
+#define TDF                     (7<<B_TDF)
+
+/* Byte Access Type */
+#define ByteWriteAccessType (0<<12)
+#define ByteSelectAccessType    (1<<12)
+#define BAT                     1<<12)
+
+/* Chip Select Enable */
+#define CSEnable                (1<<13)
+#define CSDisable               (0<<13)
+#define CSE                     (1<<13)
+
+#define BA                      ((u_int)(0xFFF)<<20)
+
+/*-------------------------*/
+/* Memory Control Register */
+/*-------------------------*/
+
+/* Address Line Enable */
+#define ALE                     (7<<0)
+#define BankSize16M             (0<<0)
+#define BankSize8M              (4<<0)
+#define BankSize4M              (5<<0)
+#define BankSize2M              (6<<0)
+#define BankSize1M              (7<<0)
+
+/* Data Read Protocol */
+#define StandardReadProtocol    (0<<4)
+#define EarlyReadProtocol       (1<<4)
+#define DRP                     (1<<4)
+
+/*------------------------*/
+/* Remap Control Register */
+/*------------------------*/
+
+#define RCB                     (1<<0)
+
+/*--------------------------------*/
+/* Device Dependancies Definition */
+/*--------------------------------*/
+
+#ifdef AT91M40400
+/* External Bus Interface User Interface BAse Address */
+#define EBI_BASE            ((StructEBI *) 0xFFE00000)
+#endif
+
+#endif /* ebi_h */

Demo/ARM7_AT91FR40008_GCC/main.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_AT91FR40008_GCC/pio.h

@@ -1,149 +1,149 @@
-//*---------------------------------------------------------------------------
-//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
-//*---------------------------------------------------------------------------
-//* The software is delivered "AS IS" without warranty or condition of any
-//* kind, either express, implied or statutory. This includes without
-//* limitation any warranty or condition with respect to merchantability or
-//* fitness for any particular purpose, or against the infringements of
-//* intellectual property rights of others.
-//*-----------------------------------------------------------------------------
-//* File Name           : pio.h
-//* Object              : Parallel I/O Definition File
-//* Translator          : ARM Software Development Toolkit V2.11a
-//*
-//* 1.0 20/10/97 JCZ    : Creation
-//* 2.0 21/10/98 JCZ    : Clean up
-//*---------------------------------------------------------------------------
-
-#ifndef pio_h
-#define pio_h
-
-/*---------------------------------------------*/
-/* Parallel I/O Interface Structure Definition */
-/*---------------------------------------------*/
-
-typedef struct
-{
-    at91_reg        PIO_PER ;           /* PIO Enable Register */
-    at91_reg        PIO_PDR ;           /* PIO Disable Register */
-    at91_reg        PIO_PSR ;           /* PIO Status Register */
-    at91_reg        Reserved0 ;
-    at91_reg        PIO_OER ;           /* Output Enable Register */
-    at91_reg        PIO_ODR ;           /* Output Disable Register */
-    at91_reg        PIO_OSR ;           /* Output Status Register */
-    at91_reg        Reserved1 ;
-    at91_reg        PIO_IFER ;          /* Input Filter Enable Register */
-    at91_reg        PIO_IFDR ;          /* Input Filter Disable Register */
-    at91_reg        PIO_IFSR ;          /* Input Filter Status Register */
-    at91_reg        Reserved2 ;
-    at91_reg        PIO_SODR ;          /* Set Output Data Register */
-    at91_reg        PIO_CODR ;          /* Clear Output Data Register */
-    at91_reg        PIO_ODSR ;          /* Output Data Status Register */
-    at91_reg        PIO_PDSR ;          /* Pin Data Status Register */
-    at91_reg        PIO_IER ;           /* Interrupt Enable Register */
-    at91_reg        PIO_IDR ;           /* Interrupt Disable Register */
-    at91_reg        PIO_IMR ;           /* Interrupt Mask Register */
-    at91_reg        PIO_ISR ;           /* Interrupt Status Register */
-} StructPIO ;
-
-/*-----------------------------*/
-/* PIO Handler type definition */
-/*-----------------------------*/
-
-//typedef void (*TypePIOHandler) ( StructPIO *pio_pt, u_int pio_mask ) ;
-
-/*--------------------------------*/
-/* Device Dependancies Definition */
-/*--------------------------------*/
-
-/* Number of PIO Controller */
-#define NB_PIO_CTRL     1
-/* Base Address */
-#define PIO_BASE        ((StructPIO *) 0xFFFF0000 )
-/* Number of PIO Lines */
-#define NB_PIO          32
-
-/* Parallel I/O Bits Definition */
-#define P0              (1<<0)
-#define P1              (1<<1)
-#define P2              (1<<2)
-#define P3              (1<<3)
-#define P4              (1<<4)
-#define P5              (1<<5)
-#define P6              (1<<6)
-#define P7              (1<<7)
-#define P8              (1<<8)
-#define P9              (1<<9)
-#define P10             (1<<10)
-#define P11             (1<<11)
-#define P12             (1<<12)
-#define P13             (1<<13)
-#define P14             (1<<14)
-#define P15             (1<<15)
-#define P16             (1<<16)
-#define P17             (1<<17)
-#define P18             (1<<18)
-#define P19             (1<<19)
-#define P20             (1<<20)
-#define P21             (1<<21)
-#define P22             (1<<22)
-#define P23             (1<<23)
-#define P24             (1<<24)
-#define P25             (1<<25)
-#define P26             (1<<26)
-#define P27             (1<<27)
-#define P28             (1<<28)
-#define P29             (1<<29)
-#define P30             (1<<30)
-#define P31             (1<<31)
-
-/* PIO Multiplexing Definition */
-
-/* There is only one PIO Controller */
-#define PIO_CTRL        0
-
-#define PIO_TC0         PIO_CTRL
-#define TCLK0           P0
-#define TIOA0           P1
-#define TIOB0           P2
-#define PIN_TC0         (TIOA0|TIOB0|TCLK0)
-
-#define PIO_TC1         PIO_CTRL
-#define TCLK1           P3
-#define TIOA1           P4
-#define TIOB1           P5
-#define PIN_TC1         (TIOA1|TIOB1|TCLK1)
-
-#define PIO_TC2         PIO_CTRL
-#define TCLK2           P6
-#define TIOA2           P7
-#define TIOB2           P8
-#define PIN_TC2         (TIOA2|TIOB2|TCLK2)
-
-#define PIO_EXT_IRQ     PIO_CTRL
-#define PIN_IRQ0        P9
-#define PIN_IRQ1        P10
-#define PIN_IRQ2        P11
-#define PIN_FIQ         P12
-
-#define PIO_USART0      PIO_CTRL
-#define SCK0            P13
-#define TXD0            P14
-#define RXD0            P15
-#define PIN_USART0      (SCK0|TXD0|RXD0)
-
-#define PIO_USART1      PIO_CTRL
-#define SCK1            P20
-#define TXD1            P21
-#define RXD1            P22
-#define PIN_USART1      (SCK1|TXD1|RXD1)
-
-#define MCKO            P25
-#define CS2             P26
-#define CS3             P27
-#define CS4             P31
-#define CS5             P30
-#define CS6             P29
-#define CS7             P28
-
-#endif /* pio_h */
+//*---------------------------------------------------------------------------
+//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
+//*---------------------------------------------------------------------------
+//* The software is delivered "AS IS" without warranty or condition of any
+//* kind, either express, implied or statutory. This includes without
+//* limitation any warranty or condition with respect to merchantability or
+//* fitness for any particular purpose, or against the infringements of
+//* intellectual property rights of others.
+//*-----------------------------------------------------------------------------
+//* File Name           : pio.h
+//* Object              : Parallel I/O Definition File
+//* Translator          : ARM Software Development Toolkit V2.11a
+//*
+//* 1.0 20/10/97 JCZ    : Creation
+//* 2.0 21/10/98 JCZ    : Clean up
+//*---------------------------------------------------------------------------
+
+#ifndef pio_h
+#define pio_h
+
+/*---------------------------------------------*/
+/* Parallel I/O Interface Structure Definition */
+/*---------------------------------------------*/
+
+typedef struct
+{
+    at91_reg        PIO_PER ;           /* PIO Enable Register */
+    at91_reg        PIO_PDR ;           /* PIO Disable Register */
+    at91_reg        PIO_PSR ;           /* PIO Status Register */
+    at91_reg        Reserved0 ;
+    at91_reg        PIO_OER ;           /* Output Enable Register */
+    at91_reg        PIO_ODR ;           /* Output Disable Register */
+    at91_reg        PIO_OSR ;           /* Output Status Register */
+    at91_reg        Reserved1 ;
+    at91_reg        PIO_IFER ;          /* Input Filter Enable Register */
+    at91_reg        PIO_IFDR ;          /* Input Filter Disable Register */
+    at91_reg        PIO_IFSR ;          /* Input Filter Status Register */
+    at91_reg        Reserved2 ;
+    at91_reg        PIO_SODR ;          /* Set Output Data Register */
+    at91_reg        PIO_CODR ;          /* Clear Output Data Register */
+    at91_reg        PIO_ODSR ;          /* Output Data Status Register */
+    at91_reg        PIO_PDSR ;          /* Pin Data Status Register */
+    at91_reg        PIO_IER ;           /* Interrupt Enable Register */
+    at91_reg        PIO_IDR ;           /* Interrupt Disable Register */
+    at91_reg        PIO_IMR ;           /* Interrupt Mask Register */
+    at91_reg        PIO_ISR ;           /* Interrupt Status Register */
+} StructPIO ;
+
+/*-----------------------------*/
+/* PIO Handler type definition */
+/*-----------------------------*/
+
+//typedef void (*TypePIOHandler) ( StructPIO *pio_pt, u_int pio_mask ) ;
+
+/*--------------------------------*/
+/* Device Dependancies Definition */
+/*--------------------------------*/
+
+/* Number of PIO Controller */
+#define NB_PIO_CTRL     1
+/* Base Address */
+#define PIO_BASE        ((StructPIO *) 0xFFFF0000 )
+/* Number of PIO Lines */
+#define NB_PIO          32
+
+/* Parallel I/O Bits Definition */
+#define P0              (1<<0)
+#define P1              (1<<1)
+#define P2              (1<<2)
+#define P3              (1<<3)
+#define P4              (1<<4)
+#define P5              (1<<5)
+#define P6              (1<<6)
+#define P7              (1<<7)
+#define P8              (1<<8)
+#define P9              (1<<9)
+#define P10             (1<<10)
+#define P11             (1<<11)
+#define P12             (1<<12)
+#define P13             (1<<13)
+#define P14             (1<<14)
+#define P15             (1<<15)
+#define P16             (1<<16)
+#define P17             (1<<17)
+#define P18             (1<<18)
+#define P19             (1<<19)
+#define P20             (1<<20)
+#define P21             (1<<21)
+#define P22             (1<<22)
+#define P23             (1<<23)
+#define P24             (1<<24)
+#define P25             (1<<25)
+#define P26             (1<<26)
+#define P27             (1<<27)
+#define P28             (1<<28)
+#define P29             (1<<29)
+#define P30             (1<<30)
+#define P31             (1<<31)
+
+/* PIO Multiplexing Definition */
+
+/* There is only one PIO Controller */
+#define PIO_CTRL        0
+
+#define PIO_TC0         PIO_CTRL
+#define TCLK0           P0
+#define TIOA0           P1
+#define TIOB0           P2
+#define PIN_TC0         (TIOA0|TIOB0|TCLK0)
+
+#define PIO_TC1         PIO_CTRL
+#define TCLK1           P3
+#define TIOA1           P4
+#define TIOB1           P5
+#define PIN_TC1         (TIOA1|TIOB1|TCLK1)
+
+#define PIO_TC2         PIO_CTRL
+#define TCLK2           P6
+#define TIOA2           P7
+#define TIOB2           P8
+#define PIN_TC2         (TIOA2|TIOB2|TCLK2)
+
+#define PIO_EXT_IRQ     PIO_CTRL
+#define PIN_IRQ0        P9
+#define PIN_IRQ1        P10
+#define PIN_IRQ2        P11
+#define PIN_FIQ         P12
+
+#define PIO_USART0      PIO_CTRL
+#define SCK0            P13
+#define TXD0            P14
+#define RXD0            P15
+#define PIN_USART0      (SCK0|TXD0|RXD0)
+
+#define PIO_USART1      PIO_CTRL
+#define SCK1            P20
+#define TXD1            P21
+#define RXD1            P22
+#define PIN_USART1      (SCK1|TXD1|RXD1)
+
+#define MCKO            P25
+#define CS2             P26
+#define CS3             P27
+#define CS4             P31
+#define CS5             P30
+#define CS6             P29
+#define CS7             P28
+
+#endif /* pio_h */

Demo/ARM7_AT91FR40008_GCC/serial/serial.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c

@@ -1,5 +1,5 @@
 /*
-  FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+  FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
   This file is part of the FreeRTOS.org distribution.
 

Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_AT91SAM7S64_IAR/main.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2106_GCC/Makefile

@@ -1,4 +1,4 @@
-#	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+#	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 #
 #	This file is part of the FreeRTOS.org distribution.
 #
@@ -44,7 +44,7 @@ WARNINGS=-Wall -Wextra -Wshadow -Wpointer-arith -Wbad-function-cast -Wcast-align
 #
 CFLAGS=$(WARNINGS) -D $(RUN_MODE) -D GCC_ARM7 -I. -I../../Source/include \
 		-I../Common/include $(DEBUG) -mcpu=arm7tdmi -T$(LDSCRIPT) \
-		 $(OPTIM)
+		 $(OPTIM) -fomit-frame-pointer
 
 ifeq ($(USE_THUMB_MODE),YES)
 	CFLAGS += -mthumb-interwork -D THUMB_INTERWORK

Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2106_GCC/main.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2106_GCC/serial/serial.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2106_GCC/serial/serialISR.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_IAR/main.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_IAR/serial/serial.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_Keil/FreeRTOSConfig.h

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_Keil/ParTest/ParTest.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_Keil/main.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_Keil/serial/serial.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2129_Keil/serial/serialISR.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license 
 	and contact details.  Please ensure to read the configuration and relevant 
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h

@@ -0,0 +1,91 @@
+/*
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section 
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license 
+	and contact details.  Please ensure to read the configuration and relevant 
+	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
+	***************************************************************************
+*/
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+#include <LPC21xx.h>
+#define vPortYieldProcessor swi_handler
+
+/* For compatability with the LPC2106 header. */
+#define T0_IR T0IR
+#define T0_PR T0PR
+#define T0_MR0 T0MR0
+#define T0_MCR T0MCR
+#define T0_TCR T0TCR
+
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. 
+ *----------------------------------------------------------*/
+
+#define configUSE_PREEMPTION		1
+#define configUSE_IDLE_HOOK			0
+#define configUSE_TICK_HOOK			0
+/* In this case configCPU_CLOCK_HZ is actually set to the pclk frequency, not
+the CPU frequency. */
+#define configCPU_CLOCK_HZ			( 58982400UL )	/* =14.7456MHz xtal multiplied by 4 using the PLL. */
+#define configTICK_RATE_HZ			( ( portTickType ) 1000 )
+#define configMAX_PRIORITIES		( ( unsigned portBASE_TYPE ) 6 )
+#define configMINIMAL_STACK_SIZE	( ( unsigned portSHORT ) 128 )
+#define configTOTAL_HEAP_SIZE		( ( size_t ) ( 18 * 1024 ) )
+#define configMAX_TASK_NAME_LEN		( 15 )
+#define configUSE_TRACE_FACILITY	1
+#define configUSE_16_BIT_TICKS		0
+#define configIDLE_SHOULD_YIELD		1
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 		0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+
+#define INCLUDE_vTaskPrioritySet		1
+#define INCLUDE_uxTaskPriorityGet		1
+#define INCLUDE_vTaskDelete				1
+#define INCLUDE_vTaskCleanUpResources	0
+#define INCLUDE_vTaskSuspend			1
+#define INCLUDE_vTaskDelayUntil			1
+#define INCLUDE_vTaskDelay				1
+
+
+#endif /* FREERTOS_CONFIG_H */

Demo/ARM7_LPC2138_Rowley/RTOSDemo.hzp

@@ -0,0 +1,55 @@
+<!DOCTYPE CrossStudio_Project_File>
+<solution version="1" Name="RTOSDemo" >
+  <project Name="RTOSDemo" >
+    <configuration arm_target_loader_parameter="14745600" Target="LPC2138" arm_simulator_memory_simulation_parameter="LPC21;0x80000;0x10000" property_groups_file_path="$(StudioDir)/targets/Philips_LPC210X/propertyGroups.xml" oscillator_frequency="14.7456MHz" linker_memory_map_file="$(StudioDir)/targets/Philips_LPC210X/Philips_LPC2138_MemoryMap.xml" gcc_entry_point="reset_handler" arm_architecture="v4T" linker_additional_files="$(StudioDir)/lib/liblpc2000$(LibExt)$(LIB)" project_directory="" link_include_startup_code="No" project_type="Executable" Name="Common" arm_target_debug_interface_type="ARM7TDI" arm_core_type="ARM7TDMI-S" arm_simulator_memory_simulation_filename="$(StudioDir)/targets/Philips_LPC210X/LPC2000SimulatorMemory.dll" />
+    <configuration linker_section_placement_file="$(StudioDir)/targets/sram_placement.xml" target_reset_script="SRAMReset()" Name="RAM" Placement="RAM" />
+    <configuration arm_target_flash_loader_file_path="$(StudioDir)/targets/Philips_LPC210X/Release/Loader.elf" linker_section_placement_file="$(StudioDir)/targets/flash_placement.xml" target_reset_script="FLASHReset()" arm_target_flash_loader_type="Comms Channel Loader" Name="Flash" Placement="Flash" />
+    <folder Name="Source Files" >
+      <configuration filter="c;cpp;cxx;cc;h;s;asm;inc" Name="Common" />
+      <folder Name="RTOS Source" >
+        <file file_name="../../Source/tasks.c" Name="tasks.c" >
+          <configuration build_exclude_from_build="No" Name="THUMB Flash Debug" />
+        </file>
+        <file file_name="../../Source/list.c" Name="list.c" />
+        <file file_name="../../Source/queue.c" Name="queue.c" />
+        <file file_name="../../Source/portable/MemMang/heap_1.c" Name="heap_1.c" />
+        <file file_name="../../Source/portable/GCC/ARM7_LPC2000/portISR.c" Name="portISR.c" >
+          <configuration arm_instruction_set="ARM" Name="THUMB" />
+        </file>
+        <file file_name="../../Source/portable/GCC/ARM7_LPC2000/port.c" Name="port.c" />
+      </folder>
+      <folder Name="Demo Source" >
+        <file file_name="main.c" Name="main.c" />
+        <file file_name="../Common/Minimal/PollQ.c" Name="PollQ.c" />
+        <file file_name="../Common/Minimal/BlockQ.c" Name="BlockQ.c" />
+        <file file_name="../Common/Minimal/death.c" Name="death.c" />
+        <file file_name="../Common/Minimal/dynamic.c" Name="dynamic.c" />
+        <file file_name="../Common/Minimal/integer.c" Name="integer.c" />
+        <file file_name="../Common/Minimal/semtest.c" Name="semtest.c" />
+        <file file_name="mainISR.c" Name="mainISR.c" >
+          <configuration arm_instruction_set="ARM" Name="THUMB" />
+        </file>
+        <file file_name="../Common/Minimal/blocktim.c" Name="blocktim.c" />
+      </folder>
+    </folder>
+    <folder Name="System Files" >
+      <file file_name="$(StudioDir)/source/crt0.s" Name="crt0.s" />
+      <file file_name="$(StudioDir)/targets/Philips_LPC210X/Philips_LPC210X_Startup.s" Name="Philips_LPC210X_Startup.s" />
+      <file file_name="$(StudioDir)/targets/Philips_LPC210X/Philips_LPC210X_Target.js" Name="Philips_LPC210X_Target.js" >
+        <configuration Name="Common" file_type="Reset Script" />
+      </file>
+    </folder>
+    <file file_name="threads.js" Name="threads.js" />
+    <configuration build_quietly="No" Name="THUMB Flash Debug" />
+  </project>
+  <configuration inherited_configurations="ARM;Flash;Debug" Name="ARM Flash Debug" />
+  <configuration arm_library_instruction_set="ARM" c_preprocessor_definitions="__ARM" arm_instruction_set="ARM" hidden="Yes" Name="ARM" />
+  <configuration c_preprocessor_definitions="__FLASH_BUILD" hidden="Yes" Name="Flash" />
+  <configuration c_preprocessor_definitions="DEBUG" link_include_startup_code="No" gcc_optimization_level="None" build_debug_information="Yes" hidden="Yes" Name="Debug" />
+  <configuration inherited_configurations="ARM;Flash;Release" Name="ARM Flash Release" />
+  <configuration c_preprocessor_definitions="NDEBUG;STARTUP_FROM_RESET" link_include_startup_code="No" gcc_optimization_level="Level 1" build_debug_information="No" hidden="Yes" Name="Release" />
+  <configuration inherited_configurations="THUMB;Flash;Debug" Name="THUMB Flash Debug" />
+  <configuration arm_library_instruction_set="THUMB" c_preprocessor_definitions="__THUMB;THUMB_INTERWORK" arm_instruction_set="THUMB" hidden="Yes" Name="THUMB" />
+  <configuration inherited_configurations="THUMB;Flash;Release" Name="THUMB Flash Release" />
+  <configuration c_preprocessor_definitions="GCC_ARM7;SUPERVISOR_START;VECTORED_IRQ_INTERRUPTS" c_user_include_directories=".;..\\..\\Source\\include;..\\..\\Source\\GCC\\ARM7_LPC2000;..\\Common\\Include" c_additional_options="-fomit-frame-pointer" Name="Common" c_system_include_directories="$(StudioDir)/include;$(StudioDir)/include/targets" />
+</solution>

Demo/ARM7_LPC2138_Rowley/RTOSDemo.hzs

@@ -0,0 +1,74 @@
+<!DOCTYPE CrossStudio_for_ARM_Session_File>
+<session>
+ <Autos>
+  <Watches active="0" />
+ </Autos>
+ <Bookmarks/>
+ <Breakpoints>
+  <BreakpointListItem actiontype="0" chainFrom="" line="144" length="0" triggertype="0" useHWbreakpoint="false" group="Breakpoints" breakdatatype="0" value="0" name="unnamed" counter="0" state="4" mask="0" comparison="0" expression="" filename="C:\E\Dev\_FreeRTOS\Demo\ARM7_LPC2138_Rowley\main.c" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="D_Abort" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="FIQ" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="IRQ" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="P_Abort" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="Reset" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="SWI" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="Undef" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="BusFault" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="ExceptionEntryReturnFault" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="HardFault" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="MemManage" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="Reset" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="UsageFault_CheckingError" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="UsageFault_Coprocessor" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="UsageFault_StateError" filename="" />
+ </Breakpoints>
+ <ExecutionCountWindow/>
+ <Memory1>
+  <MemoryWindow autoEvaluate="0" addressText="0x102248" numColumns="8" sizeText="128" dataSize="1" radix="16" addressSpace="" />
+ </Memory1>
+ <Memory2>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory2>
+ <Memory3>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory3>
+ <Memory4>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory4>
+ <Project>
+  <ProjectSessionItem path="RTOSDemo" name="unnamed" />
+  <ProjectSessionItem path="RTOSDemo;RTOSDemo" name="unnamed" />
+ </Project>
+ <Register1>
+  <RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="CPU - Current Mode" visibleGroups="CPU - Current Mode" decimalDisplays="" binaryDisplays="" />
+ </Register1>
+ <Register2>
+  <RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="" visibleGroups="" decimalDisplays="" binaryDisplays="" />
+ </Register2>
+ <Register3>
+  <RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="" visibleGroups="" decimalDisplays="" binaryDisplays="" />
+ </Register3>
+ <Register4>
+  <RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="" visibleGroups="" decimalDisplays="" binaryDisplays="" />
+ </Register4>
+ <SourceNavigatorWindow/>
+ <TraceWindow>
+  <Trace wrap="Yes" type="1" enabled="Yes" />
+ </TraceWindow>
+ <Watch1>
+  <Watches active="1" >
+   <Watchpoint evalMode="1" linenumber="0" evalType="1" radix="-1" name="pxCurrentTCB" expression="pxCurrentTCB" filename="" />
+  </Watches>
+ </Watch1>
+ <Watch2>
+  <Watches active="0" />
+ </Watch2>
+ <Watch3>
+  <Watches active="0" />
+ </Watch3>
+ <Watch4>
+  <Watches active="0" />
+ </Watch4>
+ <Files/>
+ <ARMCrossStudioWindow activeProject="RTOSDemo" autoConnectTarget="/USB CrossConnect for ARM" debugSearchFileMap="" fileDialogInitialDirectory="C:\E\Dev\FreeRTOS\Demo\ARM7_LPC2138_Rowley" fileDialogDefaultFilter="*.js" autoConnectCapabilities="1407" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
+</session>

Demo/ARM7_LPC2138_Rowley/main.c

@@ -0,0 +1,333 @@
+/*
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section 
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license 
+	and contact details.  Please ensure to read the configuration and relevant 
+	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
+	***************************************************************************
+*/
+
+/*
+ * This file contains a demo created to execute on the Rowley Associates
+ * LPC2138 CrossFire development board.
+ *
+ * main() creates all the demo application tasks, then starts the scheduler.  
+ * The WEB documentation provides more details of the standard demo application 
+ * tasks.
+ * 
+ * Main.c also creates a task called "Check".  This only executes every few 
+ * seconds but has a high priority so is guaranteed to get processor time.  
+ * Its function is to check that all the other tasks are still operational.
+ * Each standard demo task maintains a unique count that is incremented each 
+ * time the task successfully completes its function.  Should any error occur 
+ * within such a task the count is permanently halted.  The check task inspects 
+ * the count of each task to ensure it has changed since the last time the 
+ * check task executed.  If all the count variables have changed all the tasks 
+ * are still executing error free, and the check task writes "PASS" to the
+ * CrossStudio terminal IO window.  Should any task contain an error at any time 
+ * the error is latched and "FAIL" written to the terminal IO window.
+ *
+ * Finally, main() sets up an interrupt service routine and task to handle
+ * pushes of the button that is built into the CrossFire board.  When the button
+ * is pushed the ISR wakes the button task - which generates a table of task
+ * status information which is also displayed on the terminal IO window. 
+ *
+ * A print task is defined to ensure exclusive and consistent access to the 
+ * terminal IO.  This is the only task that is allowed to access the terminal.
+ * The check and button task therefore do not access the terminal directly but 
+ * instead pass a pointer to the message they wish to display to the print task.
+ */
+
+/* Standard includes. */
+#include <__cross_studio_io.h>
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "Task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* Demo app includes. */
+#include "BlockQ.h"
+#include "death.h"
+#include "dynamic.h"
+#include "integer.h"
+#include "PollQ.h"
+#include "blocktim.h"
+
+/* Hardware configuration definitions. */
+#define mainBUS_CLK_FULL					( ( unsigned portCHAR ) 0x01 )
+#define mainLED_BIT							0x80000000
+#define mainP0_14__EINT_1					( 2 << 28 )
+#define mainEINT_1_EDGE_SENSITIVE			2
+#define mainEINT_1_FALLING_EDGE_SENSITIVE	0
+#define mainEINT_1_CHANNEL					15
+#define mainEINT_1_VIC_CHANNEL_BIT			( 1 << mainEINT_1_CHANNEL )
+#define mainEINT_1_ENABLE_BIT				( 1 << 5 )
+
+/* Demo application definitions. */
+#define mainQUEUE_SIZE						( 3 )
+#define mainLED_DELAY						( ( portTickType ) 500 / portTICK_RATE_MS )
+#define mainCHECK_DELAY						( ( portTickType ) 5000 / portTICK_RATE_MS )
+#define mainLIST_BUFFER_SIZE				2048
+
+/* Task priorities. */
+#define mainLED_TASK_PRIORITY				( tskIDLE_PRIORITY + 2 )
+#define mainQUEUE_POLL_PRIORITY				( tskIDLE_PRIORITY + 2 )
+#define mainCHECK_TASK_PRIORITY				( tskIDLE_PRIORITY + 3 )
+#define mainSEM_TEST_PRIORITY				( tskIDLE_PRIORITY + 1 )
+#define mainBLOCK_Q_PRIORITY				( tskIDLE_PRIORITY + 2 )
+#define mainPRINT_TASK_PRIORITY				( tskIDLE_PRIORITY + 0 )
+
+/*-----------------------------------------------------------*/
+
+/* The semaphore used to wake the button task from within the external interrupt
+handler. */
+xSemaphoreHandle xButtonSemaphore;
+
+/* The queue that is used to send message to vPrintTask for display in the 
+terminal output window. */
+xQueueHandle xPrintQueue;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Simply flashes the on board LED every mainLED_DELAY milliseconds.
+ */
+static void vLEDTask( void *pvParameters );
+
+/*
+ * Checks the status of all the demo tasks then prints a message to the
+ * CrossStudio terminal IO windows.  The message will be either PASS or FAIL
+ * depending on the status of the demo applications tasks.  A FAIL status will
+ * be latched.
+ *
+ * Messages are not written directly to the terminal, but passed to vPrintTask
+ * via a queue.
+ */
+static void vCheckTask( void *pvParameters );
+
+/*
+ * Controls all terminal output.  If a task wants to send a message to the
+ * terminal IO it posts a pointer to the text to vPrintTask via a queue.  This
+ * ensures serial access to the terminal IO.
+ */
+static void vPrintTask( void *pvParameter );
+
+/*
+ * Simply waits for an interrupt to be generated from the built in button, then
+ * generates a table of tasks states that is then written by vPrintTask to the
+ * terminal output window within CrossStudio.
+ */
+static void vButtonHandlerTask( void *pvParameters );
+
+/*-----------------------------------------------------------*/
+
+int main( void )
+{
+	/* Setup the peripheral bus to be the same as the PLL output. */
+	VPBDIV = mainBUS_CLK_FULL;
+
+	/* Create the queue used to pass message to vPrintTask. */
+	xPrintQueue = xQueueCreate( mainQUEUE_SIZE, sizeof( portCHAR * ) );
+
+	/* Create the semaphore used to wake vButtonHandlerTask(). */
+	vSemaphoreCreateBinary( xButtonSemaphore );
+	xSemaphoreTake( xButtonSemaphore, 0 );
+
+	/* Start the standard demo tasks. */
+	vStartIntegerMathTasks( tskIDLE_PRIORITY );
+	vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
+	vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
+	vStartDynamicPriorityTasks();
+	vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
+    vCreateBlockTimeTasks();
+
+	/* Start the tasks defined within this file. */
+	xTaskCreate( vLEDTask, "LED", configMINIMAL_STACK_SIZE, NULL, mainLED_TASK_PRIORITY, NULL );
+    xTaskCreate( vCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
+    xTaskCreate( vPrintTask, "Print", configMINIMAL_STACK_SIZE, NULL, mainPRINT_TASK_PRIORITY, NULL );
+    xTaskCreate( vButtonHandlerTask, "Button", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
+
+	/* Start the scheduler. */
+	vTaskStartScheduler();
+
+	/* The scheduler should now running, so we will only ever reach here if we
+	ran out of heap space. */
+
+	return 0;
+}
+/*-----------------------------------------------------------*/
+
+static void vLEDTask( void *pvParameters )
+{
+	/* Configure IO. */
+	IO0DIR |= mainLED_BIT;
+	IO0SET = mainLED_BIT;
+
+	for( ;; )
+	{
+		/* Not very exiting - just delay... */
+		vTaskDelay( mainLED_DELAY );
+
+		/* ...set the IO ... */
+        IO0CLR = mainLED_BIT;
+
+		/* ...delay again... */
+		vTaskDelay( mainLED_DELAY );
+
+		/* ...then clear the IO. */
+		IO0SET = mainLED_BIT;
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void vCheckTask( void *pvParameters )
+{
+portBASE_TYPE xErrorOccurred = pdFALSE;
+portTickType xLastExecutionTime;
+const portCHAR * const pcPassMessage = "PASS\n";
+const portCHAR * const pcFailMessage = "FAIL\n";
+
+	/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
+	works correctly. */
+	xLastExecutionTime = xTaskGetTickCount();
+
+	for( ;; )
+	{
+		/* Perform this check every mainCHECK_DELAY milliseconds. */
+		vTaskDelayUntil( &xLastExecutionTime, mainCHECK_DELAY );
+
+		/* Has an error been found in any task? */
+
+		if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
+		{
+			xErrorOccurred = pdTRUE;
+		}
+	
+		if( xArePollingQueuesStillRunning() != pdTRUE )
+		{
+			xErrorOccurred = pdTRUE;
+		}
+	
+		if( xAreSemaphoreTasksStillRunning() != pdTRUE )
+		{
+			xErrorOccurred = pdTRUE;
+		}
+	
+		if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
+		{
+			xErrorOccurred = pdTRUE;
+		}
+	
+		if( xAreBlockingQueuesStillRunning() != pdTRUE )
+		{
+			xErrorOccurred = pdTRUE;
+		}
+
+		if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
+		{
+			xErrorOccurred = pdTRUE;
+		}
+
+		/* Send either a pass or fail message.  If an error is found it is
+		never cleared again. */
+		if( xErrorOccurred == pdTRUE )
+		{
+			xQueueSend( xPrintQueue, &pcFailMessage, portMAX_DELAY );
+		}
+		else
+		{
+			xQueueSend( xPrintQueue, &pcPassMessage, portMAX_DELAY );
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void vPrintTask( void *pvParameters )
+{
+portCHAR *pcMessage;
+
+	for( ;; )
+	{
+		/* Wait for a message to arrive. */
+		while( xQueueReceive( xPrintQueue, &pcMessage, portMAX_DELAY ) != pdPASS );
+
+		/* Write the message to the terminal IO. */
+		debug_printf( "%s", pcMessage );
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void vButtonHandlerTask( void *pvParameters )
+{
+static portCHAR cListBuffer[ mainLIST_BUFFER_SIZE ];
+const portCHAR *pcList = &( cListBuffer[ 0 ] );
+const portCHAR * const pcHeader = "\nTask          State  Priority  Stack	#\n************************************************";
+extern void (vButtonISR) ( void );
+
+	/* Configure the interrupt. */
+	portENTER_CRITICAL();	
+	{
+		/* Configure P0.14 to generate interrupts. */
+		PINSEL0 |= mainP0_14__EINT_1; 
+		EXTMODE = mainEINT_1_EDGE_SENSITIVE;
+		EXTPOLAR = mainEINT_1_FALLING_EDGE_SENSITIVE;
+
+		/* Setup the VIC for EINT 1. */
+		VICIntSelect &= ~mainEINT_1_VIC_CHANNEL_BIT;
+		VICIntEnable |= mainEINT_1_VIC_CHANNEL_BIT;
+		VICVectAddr1 = ( portLONG ) vButtonISR;
+		VICVectCntl1 = mainEINT_1_ENABLE_BIT | mainEINT_1_CHANNEL;
+	}
+	portEXIT_CRITICAL();
+
+	for( ;; )
+	{
+		/* Wait for an interrupt. */
+		while( xSemaphoreTake( xButtonSemaphore, portMAX_DELAY ) != pdPASS );
+
+		/* Send the column headers to the print task for display. */
+		xQueueSend( xPrintQueue, &pcHeader, portMAX_DELAY );
+
+		/* Create the list of task states. */
+		vTaskList( cListBuffer );
+
+		/* Send the task status information to the print task for display. */
+		xQueueSend( xPrintQueue, &pcList, portMAX_DELAY );
+	}
+}
+/*-----------------------------------------------------------*/
+
+
+
+
+
+
+

Demo/ARM7_LPC2138_Rowley/mainISR.c

@@ -0,0 +1,57 @@
+/*
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section 
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license 
+	and contact details.  Please ensure to read the configuration and relevant 
+	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
+	***************************************************************************
+*/
+#include "FreeRTOS.h"
+#include "semphr.h"
+
+#define isrCLEAR_EINT_1 2
+
+/*
+ * Interrupt routine that simply wakes vButtonHandlerTask on each interrupt 
+ * generated by a push of the built in button.
+ */
+void vButtonISR( void ) __attribute__ ((naked));
+extern xSemaphoreHandle xButtonSemaphore;
+
+void vButtonISR( void )
+{
+	portENTER_SWITCHING_ISR();
+		xSemaphoreGiveFromISR( xButtonSemaphore, pdFALSE );
+        EXTINT = isrCLEAR_EINT_1;
+        VICVectAddr = 0;
+	portEXIT_SWITCHING_ISR( pdTRUE );
+}
+
+
+

Demo/ARM7_LPC2138_Rowley/threads.js

@@ -0,0 +1,118 @@
+function decode_stack(sp)
+{
+  var i;
+  var a = new Array();
+
+  var current_task;
+
+  current_task = Debug.evaluate("pxCurrentTCB");
+
+  if( current_task == 0 )
+    return;
+
+  sp += 4; /* skip stored ulCriticalNesting */
+  a[16] = Debug.evaluate("*(unsigned long*)" + sp); 
+
+  for (i = 0; i <= 15; i++)
+  {
+    sp += 4;
+    a[i] = Debug.evaluate("*(unsigned long*)" + sp); 
+  }
+
+  return a;
+}
+
+function add_task(task, state)
+{
+  var tcb, task_name;
+
+  var current_task;
+
+  current_task = Debug.evaluate("pxCurrentTCB");
+
+  if( current_task == 0 )
+    return;
+
+  tcb = Debug.evaluate("*(tskTCB *)" + task);
+  task_name = Debug.evaluate("(char*)&(*(tskTCB *)" + task + ").pcTaskName[0]");
+  Threads.add("#" + tcb.uxTCBNumber + " \"" + task_name + "\"", tcb.uxPriority, state, decode_stack(tcb.pxTopOfStack));
+}
+
+function add_list(list, state, current_task)
+{
+  var i, index, item, end;
+  var current_task;
+
+  current_task = Debug.evaluate("pxCurrentTCB");
+
+  if( current_task == 0 )
+    return;
+
+  if (list.uxNumberOfItems)
+  {
+    index = list.pxIndex;
+    end = list.xListEnd;
+    for (i = 0; i < list.uxNumberOfItems + 1; i++)
+    {
+      item = Debug.evaluate("*(xListItem *)" + index);
+      if (index != end)
+      {
+        task = item.pvOwner;
+        if (task) add_task(task, (task == current_task) ? "executing" : state);
+      }
+      index = item.pxNext;
+    }
+  }
+}
+
+function update() 
+{
+  var i, current_task, list, lists, max_priority;
+
+  Threads.clear();
+
+  current_task = Debug.evaluate("pxCurrentTCB");
+
+  if( current_task == 0 )
+    return;
+
+  Threads.newqueue("Ready");
+  lists = Debug.evaluate("pxReadyTasksLists");
+  if (lists)
+  { 
+    max_priority = Debug.evaluate("uxTopUsedPriority");
+    max_priority = Debug.evaluate("*(long *)" + max_priority);
+
+    for (i = 0; i <= max_priority; i++)
+    {
+      list = Debug.evaluate("((xList*)" + lists + ")[" + (max_priority - i) + "]");
+      add_list(list, "ready", current_task);
+    }
+  }
+
+  Threads.newqueue("Blocked");
+
+  list = Debug.evaluate("pxDelayedTaskList");
+  if (list)
+  {
+    list = Debug.evaluate("**(xList **)" + list);
+    add_list(list, "blocked");
+  }
+
+  list = Debug.evaluate("pxOverflowDelayedTaskList");
+  if (list)
+  {
+    list = Debug.evaluate("**(xList **)" + list);
+    add_list(list, "blocked");
+  }
+
+  Threads.newqueue("Suspended");
+
+  list = Debug.evaluate("xSuspendedTaskList");
+  if (list)
+  {
+    list = Debug.evaluate("*(xList *)" + list);
+    add_list(list, "suspended");
+  }
+}
+

Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h

@@ -0,0 +1,111 @@
+/*
+	FreeRTOS V3.2.3 - Copyright (C) 2003-2005 Richard Barry.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section 
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license 
+	and contact details.  Please ensure to read the configuration and relevant 
+	port sections of the online documentation.
+	***************************************************************************
+*/
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+#include <stdio.h>
+#include <targets/LPC2368.h>
+#define vPortYieldProcessor swi_handler
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. 
+ *----------------------------------------------------------*/
+
+#define configUSE_PREEMPTION		1
+#define configUSE_IDLE_HOOK         0
+#define configUSE_TICK_HOOK         0
+#define configCPU_CLOCK_HZ          ( ( unsigned portLONG ) 57600000 )	/* =12Mhz xtal multiplied by 5 using the PLL. */
+#define configTICK_RATE_HZ          ( ( portTickType ) 1000 )
+#define configMAX_PRIORITIES		( ( unsigned portBASE_TYPE ) 4 )
+#define configMINIMAL_STACK_SIZE	( ( unsigned portSHORT ) 120 )
+#define configTOTAL_HEAP_SIZE		( ( size_t ) ( 18 * 1024 ) )
+#define configMAX_TASK_NAME_LEN		( 16 )
+#define configUSE_TRACE_FACILITY	1
+#define configUSE_16_BIT_TICKS		0
+#define configIDLE_SHOULD_YIELD		1
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 		0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+
+#define INCLUDE_vTaskPrioritySet            1
+#define INCLUDE_uxTaskPriorityGet           1
+#define INCLUDE_vTaskDelete                 1
+#define INCLUDE_vTaskCleanUpResources       0
+#define INCLUDE_vTaskSuspend                1
+#define INCLUDE_vTaskDelayUntil             1
+#define INCLUDE_vTaskDelay                  1
+#define INCLUDE_xTaskGetCurrentTaskHandle	1
+
+
+#endif /* FREERTOS_CONFIG_H */
+
+
+#ifndef sbi
+#define sbi(x,y)	x|=(1 << (y))
+#endif
+
+#ifndef cbi 
+#define cbi(x,y)	x&=~(1 << (y))
+#endif
+
+#ifndef tstb
+#define tstb(x,y)	(x & (1 << (y)) ? 1 : 0)
+#endif
+
+#ifndef toggle 
+#define toggle(x,y)	x^=(1 << (y))
+#endif
+
+#ifndef BIT
+#define BIT(x)	(1 << (x))
+
+
+#define VICVectAddr    VICAddress
+
+typedef struct
+{
+	long xColumn;
+	signed char *pcMessage;
+} xLCDMessage;
+
+#endif

Demo/ARM7_LPC2368_Rowley/LCD/portlcd.c

@@ -0,0 +1,392 @@
+/*****************************************************************************
+ *
+ * Project          : lwIP Web
+ * Subproject       : 
+ * Name             : portlcd.c
+ * Function         : Routines for LCD
+ * Designer         : K. Sterckx
+ * Creation date    : 22/01/2007
+ * Compiler         : GNU ARM
+ * Processor        : LPC2368
+ * Last update      :
+ * Last updated by  :
+ * History          : 
+ *  based on example code from NXP
+ *
+ ************************************************************************
+ *
+ *  This code is used to place text on the LCD.
+ *
+ ************************************************************************/
+
+#include <targets/LPC2368.h>
+#include "portlcd.h"
+#include "FreeRTOS.h"
+#include "Task.h"
+
+/* Please note, on old MCB2300 board, the LCD_E bit is p1.30, on the new board
+it's p1.31, please check the schematic carefully, and change LCD_CTRL and LCD_E 
+accordingly if you have a different board. */
+
+/* LCD IO definitions */
+#define LCD_E     0x80000000            /* Enable control pin                */
+#define LCD_RW    0x20000000            /* Read/Write control pin            */
+#define LCD_RS    0x10000000            /* Data/Instruction control          */
+#define LCD_CTRL  0xB0000000            /* Control lines mask                */
+#define LCD_DATA  0x0F000000            /* Data lines mask                   */
+
+/* Local variables */
+static unsigned int lcd_ptr;
+
+/* 8 user defined characters to be loaded into CGRAM (used for bargraph) */
+static const unsigned char UserFont[8][8] = {
+	{ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 },
+	{ 0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10 },
+	{ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18 },
+	{ 0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C },
+	{ 0x1E,0x1E,0x1E,0x1E,0x1E,0x1E,0x1E,0x1E },
+	{ 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F },
+	{ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 },
+	{ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }
+};
+
+/* Local Function Prototypes */
+static void     lcd_write( unsigned int c );
+static void     lcd_write_4bit( unsigned int c );
+static unsigned int lcd_read_stat( void );
+static void     lcd_write_cmd( unsigned int c );
+static void     lcd_write_data( unsigned int d );
+static void     lcd_wait_busy( void );
+
+
+/******************************************************************************
+** Function name:  lcd_write_4bit
+**
+** Descriptions:
+**
+** parameters:     four bits to write
+** Returned value: None
+** 
+******************************************************************************/
+static void lcd_write_4bit(unsigned int c)
+{
+	/* Write a 4-bit command to LCD controller. */
+	FIO1DIR |= LCD_DATA | LCD_CTRL;
+	FIO1CLR  = LCD_RW   | LCD_DATA;
+	FIO1SET  = (c & 0xF) << 24;
+	FIO1SET  = LCD_E;
+	vTaskDelay(0);
+	FIO1CLR  = LCD_E;
+	vTaskDelay(0);
+	return;
+}
+
+/******************************************************************************
+** Function name: lcd_write
+**
+** Descriptions:
+**
+** parameters:     word to write
+** Returned value: None
+** 
+******************************************************************************/
+static void lcd_write(unsigned int c)
+{
+	/* Write data/command to LCD controller. */
+	lcd_write_4bit (c >> 4);
+	lcd_write_4bit (c);
+	return;
+}
+
+/******************************************************************************
+** Function name: lcd_read_stat
+**
+** Descriptions:
+**
+** parameters:     None
+** Returned value: status
+** 
+******************************************************************************/
+static unsigned int lcd_read_stat(void)
+{
+	/* Read status of LCD controller (ST7066) */
+	unsigned int stat;
+
+	FIO1DIR &= ~LCD_DATA;
+	FIO1CLR  = LCD_RS;
+	FIO1SET  = LCD_RW;
+	vTaskDelay( 0 );
+	FIO1SET  = LCD_E;
+	vTaskDelay( 0 );
+	stat    = (FIO1PIN >> 20) & 0xF0;
+	FIO1CLR  = LCD_E;
+	vTaskDelay( 0 );
+	FIO1SET  = LCD_E;
+	vTaskDelay( 0 );
+	stat   |= (FIO1PIN >> 24) & 0xF;
+	FIO1CLR  = LCD_E;
+	return (stat);
+}
+
+/******************************************************************************
+** Function name: lcd_wait_busy
+**
+** Descriptions:
+**
+** parameters:     None
+** Returned value: None
+** 
+******************************************************************************/
+static void lcd_wait_busy(void)
+{
+	/* Wait until LCD controller (ST7066) is busy. */
+	unsigned int stat;
+
+	do
+	{
+		stat = lcd_read_stat();
+	}
+	while (stat & 0x80); /* Wait for busy flag */
+
+	return;
+}
+
+/******************************************************************************
+** Function name: lcd_write_cmd
+**
+** Descriptions:
+**
+** parameters:     command word
+** Returned value: None
+** 
+******************************************************************************/
+static void lcd_write_cmd(unsigned int c)
+{
+	/* Write command to LCD controller. */
+	lcd_wait_busy();
+	FIO1CLR = LCD_RS;
+	lcd_write(c);
+	return;
+}
+
+/******************************************************************************
+** Function name: lcd_write_data
+**
+** Descriptions:
+**
+** parameters:     data word
+** Returned value: None
+** 
+******************************************************************************/
+static void lcd_write_data(unsigned int d)
+{
+	/* Write data to LCD controller. */
+	lcd_wait_busy();
+	FIO1SET = LCD_RS;
+	lcd_write(d);
+	return;
+}
+
+/******************************************************************************
+** Function name: LCD_init
+**
+** Descriptions:
+**
+** parameters:     None
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_init(void)
+{
+	/* Initialize the ST7066 LCD controller to 4-bit mode. */
+	PINSEL3 = 0x00000000;
+#if USE_FIO
+	SCS |= 0x00000001;/* set GPIOx to use Fast I/O */
+#endif
+	FIO1DIR |= LCD_CTRL | LCD_DATA;
+	FIO1CLR  = LCD_RW   | LCD_RS   | LCD_DATA;
+
+	lcd_write_4bit(0x3);                /* Select 4-bit interface            */
+	vTaskDelay(100);
+	lcd_write_4bit(0x3);
+	vTaskDelay(100);
+	lcd_write_4bit(0x3);
+	lcd_write_4bit(0x2);
+
+	lcd_write_cmd(0x28);                /* 2 lines, 5x8 character matrix     */
+	lcd_write_cmd(0x0e);                /* Display ctrl:Disp/Curs/Blnk=ON    */
+	lcd_write_cmd(0x06);                /* Entry mode: Move right, no shift  */
+
+	LCD_load( (unsigned char *)&UserFont, sizeof (UserFont) );
+	LCD_cls();
+	return;
+}
+
+/******************************************************************************
+** Function name: LCD_load
+**
+** Descriptions:
+**
+** parameters:     pointer to the buffer and counter
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_load(unsigned char *fp, unsigned int cnt)
+{
+	/* Load user-specific characters into CGRAM */
+	unsigned int i;
+
+	lcd_write_cmd( 0x40 );                /* Set CGRAM address counter to 0    */
+	for (i = 0; i < cnt; i++, fp++)  
+	{
+		lcd_write_data( *fp );
+	}
+	return;
+}
+
+/******************************************************************************
+** Function name: LCD_gotoxy
+**
+** Descriptions:
+**
+** parameters:     pixel X and Y
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_gotoxy(unsigned int x, unsigned int y)
+{
+	/* Set cursor position on LCD display. Left corner: 1,1, right: 16,2 */
+	unsigned int c;
+
+	c = --x;
+	if (--y) 
+	{
+		c |= 0x40;
+	}
+	lcd_write_cmd (c | 0x80);
+	lcd_ptr = y*16 + x;
+	return;
+}
+
+/******************************************************************************
+** Function name: LCD_cls
+**
+** Descriptions:
+**
+** parameters:     None
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_cls(void)
+{
+	/* Clear LCD display, move cursor to home position. */
+	lcd_write_cmd (0x01);
+	LCD_gotoxy (1,1);
+	return;
+}
+
+/******************************************************************************
+** Function name: LCD_cur_off
+**
+** Descriptions:
+**
+** parameters:     None
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_cur_off(void)
+{
+	/* Switch off LCD cursor. */
+	lcd_write_cmd(0x0c);
+	return;
+}
+
+
+/******************************************************************************
+** Function name: LCD_on
+**
+** Descriptions:
+**
+** parameters:     None
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_on(void)
+{
+	/* Switch on LCD and enable cursor. */
+	lcd_write_cmd (0x0e);
+	return;
+}
+
+/******************************************************************************
+** Function name: LCD_putc
+**
+** Descriptions:
+**
+** parameters:     unsigned char character
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_putc(unsigned char c)
+{ 
+	/* Print a character to LCD at current cursor position. */
+	if (lcd_ptr == 16) 
+	{
+		lcd_write_cmd (0xc0);
+	}
+	lcd_write_data(c);
+	lcd_ptr++;
+	return;
+}
+
+/******************************************************************************
+** Function name: LCD_puts
+**
+** Descriptions:
+**
+** parameters:     pointer to the buffer
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_puts(unsigned char *sp)
+{
+	/* Print a string to LCD display. */
+	while (*sp) 
+	{
+		LCD_putc (*sp++);
+	}
+	return;
+}
+
+/******************************************************************************
+** Function name: LCD_bargraph
+**
+** Descriptions:
+**
+** parameters:     value and size
+** Returned value: None
+** 
+******************************************************************************/
+void LCD_bargraph(unsigned int val, unsigned int size)
+{
+	/* Print a bargraph to LCD display.  */
+	/* - val:  value 0..100 %            */
+	/* - size: size of bargraph 1..16    */
+	unsigned int i;
+
+	val = val * size / 20;               /* Display matrix 5 x 8 pixels       */
+	for (i = 0; i < size; i++) 
+	{
+		if (val > 5) 
+		{
+			LCD_putc(5);
+			val -= 5;
+		}
+		else
+		{
+			LCD_putc(val);
+			break;
+		}
+	}
+	return;
+}

Demo/ARM7_LPC2368_Rowley/LCD/portlcd.h

@@ -0,0 +1,31 @@
+/*****************************************************************************
+ *   rtc.h:  Header file for NXP LPC23xx/24xx Family Microprocessors
+ *
+ *   Copyright(C) 2006, NXP Semiconductor
+ *   All rights reserved.
+ *
+ *   History
+ *   2006.07.13  ver 1.00    Prelimnary version, first Release
+ *
+******************************************************************************/
+#ifndef __PORTLCD_H 
+#define __PORTLCD_H
+
+extern void LCD_init(void);
+extern void LCD_load(unsigned char *fp, unsigned int cnt);
+extern void LCD_gotoxy(unsigned int x, unsigned int y);
+extern void LCD_cls(void);
+extern void LCD_cur_off(void);
+extern void LCD_on(void);
+extern void LCD_putc(unsigned char c);
+extern void LCD_puts(unsigned char *sp);
+extern void LCD_bargraph(unsigned int val, unsigned int size);
+
+extern void LCD_putnibble(unsigned char nibble);
+extern void LCD_puthexbyte(unsigned char abyte);
+
+
+#endif /* end __PORTLCD_H */
+/*****************************************************************************
+**                            End Of File
+******************************************************************************/

Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c

@@ -0,0 +1,114 @@
+/*
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section 
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license 
+	and contact details.  Please ensure to read the configuration and relevant 
+	port sections of the online documentation.
+	***************************************************************************
+*/
+
+/* FreeRTOS.org includes. */
+#include "FreeRTOS.h"
+
+/* Demo application includes. */
+#include "partest.h"
+
+#define partstFIRST_IO			( ( unsigned portLONG ) 0x01 )
+#define partstNUM_LEDS			( 8 )
+#define partstALL_OUTPUTS_OFF	( ( unsigned portLONG ) 0xff )
+
+/*-----------------------------------------------------------
+ * Simple parallel port IO routines.
+ *-----------------------------------------------------------*/
+
+void vParTestInitialise( void )
+{
+	PINSEL10 = 0;
+	FIO2DIR  = 0x000000FF;
+	FIO2MASK = 0x00000000;
+	FIO2CLR  = 0xFF;
+	SCS |= (1<<0); //fast mode for port 0 and 1
+
+    FIO2CLR = partstALL_OUTPUTS_OFF;
+}
+/*-----------------------------------------------------------*/
+
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
+{
+unsigned portLONG ulLED = partstFIRST_IO;
+
+	if( uxLED < partstNUM_LEDS )
+	{
+		/* Rotate to the wanted bit of port */
+		ulLED <<= ( unsigned portLONG ) uxLED;
+
+		/* Set of clear the output. */
+		if( xValue )
+		{
+			FIO2CLR = ulLED;
+		}
+		else
+		{
+			FIO2SET = ulLED;
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
+{
+unsigned portLONG ulLED = partstFIRST_IO, ulCurrentState;
+
+	if( uxLED < partstNUM_LEDS )
+	{
+		/* Rotate to the wanted bit of port 0.  Only P10 to P13 have an LED
+		attached. */
+		ulLED <<= ( unsigned portLONG ) uxLED;
+
+		/* If this bit is already set, clear it, and visa versa. */
+		ulCurrentState = FIO2PIN;
+		if( ulCurrentState & ulLED )
+		{
+			FIO2CLR = ulLED;
+		}
+		else
+		{
+			FIO2SET = ulLED;			
+		}
+	}	
+}
+
+/*-----------------------------------------------------------*/
+unsigned portBASE_TYPE uxParTextGetLED( unsigned portBASE_TYPE uxLED )
+{
+unsigned portLONG ulLED = partstFIRST_IO;
+    
+    ulLED <<= ( unsigned portLONG ) uxLED;
+
+    return ( FIO2PIN & ulLED );
+}
+
+

Demo/ARM7_LPC2368_Rowley/RTOSDemo.hzp

@@ -0,0 +1,103 @@
+<!DOCTYPE CrossStudio_Project_File>
+<solution version="1" Name="RTOSDemo" >
+  <project Name="RTOSDemo" >
+    <configuration arm_target_loader_parameter="12000000" Target="LPC2368" arm_target_flash_loader_file_path="$(StudioDir)/targets/Philips_LPC210X/Release/Loader_lpc2300.elf" arm_simulator_memory_simulation_parameter="LPC23;0x80000;0x8000;0x10000;0x10000" property_groups_file_path="$(StudioDir)/targets/Philips_LPC210X/propertyGroups23xx.xml" oscillator_frequency="12MHz" linker_memory_map_file="$(StudioDir)/targets/Philips_LPC210X/Philips_LPC2368_MemoryMap.xml" gcc_entry_point="reset_handler" build_remove_unused_symbols="No" c_preprocessor_definitions="GCC_ARM7;SUPERVISOR_START;VECTORED_IRQ_INTERRUPTS;PACK_STRUCT_END=__attribute__((packed));ALIGN_STRUCT_END=__attribute__((aligned(4)))" arm_architecture="v4T" linker_additional_files="$(StudioDir)/lib/liblpc2000$(LibExt)$(LIB)" c_user_include_directories=".;$(ProjectDir)\\..\\..\\Source\\include;$(ProjectDir)\\..\\..\\Source\\GCC\\ARM7_LPC2000;$(ProjectDir)\\..\\Common\\Include;$(ProjectDir)\\LCD;$(ProjectDir)\\webserver;$(ProjectDir)\\..\\Common\\ethernet\\uIP\\uip-1.0\\uip" project_directory="" link_include_startup_code="No" gcc_optimization_level="Level 1" arm_target_flash_loader_type="LIBMEM RPC Loader" project_type="Executable" c_additional_options="" linker_printf_fmt_level="long" arm_linker_stack_size="10" Name="Common" c_system_include_directories="$(StudioDir)\include" arm_target_debug_interface_type="ARM7TDI" arm_core_type="ARM7TDMI-S" arm_simulator_memory_simulation_filename="$(StudioDir)/targets/Philips_LPC210X/LPC2000SimulatorMemory.dll" arm_linker_svc_stack_size="1024" />
+    <configuration linker_section_placement_file="$(StudioDir)/targets/sram_placement.xml" target_reset_script="SRAMReset()" Name="RAM" Placement="RAM" />
+    <configuration arm_target_flash_loader_file_path="$(StudioDir)/targets/Philips_LPC210X/Release/Loader_lpc2300.elf" linker_section_placement_file="$(StudioDir)/targets/flash_placement.xml" target_reset_script="FLASHReset()" arm_target_flash_loader_type="LIBMEM RPC Loader" Name="Flash" Placement="Flash" />
+    <folder Name="Demo Source" >
+      <configuration filter="c;cpp;cxx;cc;h;s;asm;inc" Name="Common" />
+      <file file_name="main.c" Name="main.c" />
+      <file file_name="LCD/portlcd.c" Name="portlcd.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="../Common/Minimal/blocktim.c" Name="blocktim.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="../Common/Minimal/integer.c" Name="integer.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="../Common/Minimal/BlockQ.c" Name="BlockQ.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="ParTest/ParTest.c" Name="ParTest.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="../Common/Minimal/flash.c" Name="flash.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="webserver/EMAC_ISR.c" Name="EMAC_ISR.c" >
+        <configuration arm_instruction_set="ARM" Name="THUMB" />
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="webserver/emac.c" Name="emac.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+        <configuration asm_additional_options="" Name="Common" />
+      </file>
+      <file file_name="../Common/Minimal/death.c" Name="death.c" />
+      <file file_name="../Common/Minimal/PollQ.c" Name="PollQ.c" />
+      <file file_name="../Common/Minimal/semtest.c" Name="semtest.c" />
+    </folder>
+    <folder Name="System Files" >
+      <file file_name="$(StudioDir)/source/crt0.s" Name="crt0.s" />
+      <file file_name="$(StudioDir)/targets/Philips_LPC210X/Philips_LPC230X_Startup.s" Name="Philips_LPC230X_Startup.s" />
+      <file file_name="$(StudioDir)/targets/Philips_LPC210X/LPC230x.c" Name="LPC230x.c" />
+      <file file_name="$(StudioDir)/targets/Philips_LPC210X/Philips_LPC210X_Target.js" Name="Philips_LPC210X_Target.js" >
+        <configuration Name="Common" file_type="Reset Script" />
+      </file>
+      <file file_name="$(StudioDir)/targets/Philips_LPC210X/VIC_PL192.c" Name="VIC_PL192.c" />
+      <file file_name="$(StudioDir)/targets/Philips_LPC210X/VIC_PL192_irq_handler.s" Name="VIC_PL192_irq_handler.s" />
+    </folder>
+    <folder Name="FreeRTOS.org Source" >
+      <file file_name="../../Source/tasks.c" Name="tasks.c" />
+      <file file_name="../../Source/list.c" Name="list.c" />
+      <file file_name="../../Source/queue.c" Name="queue.c" />
+      <file file_name="../../Source/portable/GCC/ARM7_LPC23xx/port.c" Name="port.c" />
+      <file file_name="../../Source/portable/GCC/ARM7_LPC23xx/portISR.c" Name="portISR.c" >
+        <configuration arm_instruction_set="ARM" Name="Common" />
+      </file>
+      <file file_name="../../Source/portable/MemMang/heap_2.c" Name="heap_2.c" />
+    </folder>
+    <configuration linker_scanf_fmt_level="int" linker_keep_symbols="_vectors" c_preprocessor_definitions="" gcc_optimization_level="Level 1" arm_target_flash_loader_type="LIBMEM RPC Loader" linker_scanf_character_group_matching_enabled="No" linker_printf_fmt_level="int" Name="ARM Flash Debug" />
+    <folder Name="uIP Source" >
+      <file file_name="webserver/uIP_Task.c" Name="uIP_Task.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="webserver/httpd.c" Name="httpd.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="webserver/httpd-cgi.c" Name="httpd-cgi.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="webserver/httpd-fs.c" Name="httpd-fs.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="webserver/http-strings.c" Name="http-strings.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip_arp.c" Name="uip_arp.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="../Common/ethernet/uIP/uip-1.0/uip/psock.c" Name="psock.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="../Common/ethernet/uIP/uip-1.0/uip/timer.c" Name="timer.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+      <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip.c" Name="uip.c" >
+        <configuration build_exclude_from_build="No" Name="ARM Flash Debug" />
+      </file>
+    </folder>
+    <configuration c_preprocessor_definitions="THUMB_INTERWORK" Name="THUMB" />
+    <configuration c_preprocessor_definitions="STARTUP_FROM_RESET" gcc_optimization_level="Optimize For Size" Name="ARM Flash Release" />
+    <configuration arm_linker_fiq_stack_size="0" arm_linker_stack_size="0" Name="THUMB Flash Debug" arm_linker_svc_stack_size="512" arm_linker_heap_size="0" />
+  </project>
+  <configuration inherited_configurations="ARM;Flash;Debug" Name="ARM Flash Debug" />
+  <configuration arm_library_instruction_set="ARM" c_preprocessor_definitions="__ARM" arm_instruction_set="ARM" hidden="Yes" Name="ARM" />
+  <configuration c_preprocessor_definitions="__FLASH_BUILD" hidden="Yes" Name="Flash" />
+  <configuration c_preprocessor_definitions="DEBUG" link_include_startup_code="No" gcc_optimization_level="None" build_debug_information="Yes" hidden="Yes" Name="Debug" />
+  <configuration inherited_configurations="ARM;Flash;Release" Name="ARM Flash Release" />
+  <configuration c_preprocessor_definitions="NDEBUG" link_include_startup_code="No" gcc_optimization_level="Level 1" build_debug_information="No" hidden="Yes" Name="Release" />
+  <configuration inherited_configurations="THUMB;Flash;Debug" Name="THUMB Flash Debug" />
+  <configuration arm_library_instruction_set="THUMB" c_preprocessor_definitions="__THUMB" arm_instruction_set="THUMB" hidden="Yes" Name="THUMB" />
+  <configuration arm_linker_stack_size="256" Name="Common" />
+</solution>

Demo/ARM7_LPC2368_Rowley/RTOSDemo.hzs

@@ -0,0 +1,74 @@
+<!DOCTYPE CrossStudio_for_ARM_Session_File>
+<session>
+ <Autos>
+  <Watches active="0" />
+ </Autos>
+ <Bookmarks/>
+ <Breakpoints>
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="D_Abort" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="FIQ" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="IRQ" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="P_Abort" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="Reset" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="SWI" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="ARM Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="Undef" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="BusFault" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="ExceptionEntryReturnFault" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="HardFault" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="MemManage" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="3" mask="0" comparison="0" expression="Reset" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="UsageFault_CheckingError" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="UsageFault_Coprocessor" filename="" />
+  <BreakpointListItem actiontype="0" chainFrom="" line="-1" length="0" triggertype="0" useHWbreakpoint="false" group="Cortex-M3 Exceptions" breakdatatype="5" value="0" name="unnamed" counter="0" state="2" mask="0" comparison="0" expression="UsageFault_StateError" filename="" />
+ </Breakpoints>
+ <ExecutionCountWindow/>
+ <Memory1>
+  <MemoryWindow autoEvaluate="0" addressText="0x4000592c" numColumns="8" sizeText="2000" dataSize="1" radix="16" addressSpace="" />
+ </Memory1>
+ <Memory2>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory2>
+ <Memory3>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory3>
+ <Memory4>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory4>
+ <Project>
+  <ProjectSessionItem path="RTOSDemo" name="unnamed" />
+  <ProjectSessionItem path="RTOSDemo;RTOSDemo" name="unnamed" />
+  <ProjectSessionItem path="RTOSDemo;RTOSDemo;Demo Source" name="unnamed" />
+ </Project>
+ <Register1>
+  <RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="CPU - Current Mode" visibleGroups="CPU - Current Mode" decimalDisplays="" binaryDisplays="" />
+ </Register1>
+ <Register2>
+  <RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="CPU - Current Mode" visibleGroups="CPU - Current Mode" decimalDisplays="" binaryDisplays="" />
+ </Register2>
+ <Register3>
+  <RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="" visibleGroups="" decimalDisplays="" binaryDisplays="" />
+ </Register3>
+ <Register4>
+  <RegisterWindow unsignedDisplays="" asciiDisplays="" octalDisplays="" openGroups="" visibleGroups="" decimalDisplays="" binaryDisplays="" />
+ </Register4>
+ <SourceNavigatorWindow/>
+ <TraceWindow>
+  <Trace wrap="Yes" type="1" enabled="Yes" />
+ </TraceWindow>
+ <Watch1>
+  <Watches active="0" />
+ </Watch1>
+ <Watch2>
+  <Watches active="0" />
+ </Watch2>
+ <Watch3>
+  <Watches active="0" />
+ </Watch3>
+ <Watch4>
+  <Watches active="1" >
+   <Watchpoint linenumber="0" radix="-1" name="xStart" expression="xStart" filename="" />
+  </Watches>
+ </Watch4>
+ <Files/>
+ <ARMCrossStudioWindow activeProject="RTOSDemo" autoConnectTarget="/USB CrossConnect for ARM" debugSearchFileMap="" fileDialogInitialDirectory="C:\E\Dev\FreeRTOS\Demo\ARM7_LPC2368_Rowley\webserver" fileDialogDefaultFilter="*.cpp;*.cxx;*.cc;*.c;*.h" autoConnectCapabilities="1407" debugSearchPath="" buildConfiguration="ARM Flash Debug" />
+</session>

Demo/ARM7_LPC2368_Rowley/main.c

@@ -0,0 +1,235 @@
+/*
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section 
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license 
+	and contact details.  Please ensure to read the configuration and relevant 
+	port sections of the online documentation.
+	***************************************************************************
+*/
+
+/* Environment includes. */
+#include <targets/LPC2368.h>
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "Task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* Demo app includes. */
+#include "BlockQ.h"
+#include "death.h"
+#include "integer.h"
+#include "blocktim.h"
+#include "portlcd.h"
+#include "flash.h"
+#include "partest.h"
+#include "semtest.h"
+#include "pollq.h"
+
+/* Demo application definitions. */
+#define mainQUEUE_SIZE						( 3 )
+#define mainCHECK_DELAY						( ( portTickType ) 5000 / portTICK_RATE_MS )
+#define mainBASIC_WEB_STACK_SIZE            ( configMINIMAL_STACK_SIZE * 2 )
+
+/* Task priorities. */
+#define mainQUEUE_POLL_PRIORITY				( tskIDLE_PRIORITY + 2 )
+#define mainCHECK_TASK_PRIORITY				( tskIDLE_PRIORITY + 3 )
+#define mainSEM_TEST_PRIORITY				( tskIDLE_PRIORITY + 1 )
+#define mainBLOCK_Q_PRIORITY				( tskIDLE_PRIORITY + 2 )
+#define mainFLASH_PRIORITY                  ( tskIDLE_PRIORITY + 2 )
+#define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 3 )
+#define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )
+
+
+/*
+ * Checks the status of all the demo tasks then prints a message to the
+ * CrossStudio terminal IO windows.  The message will be either PASS or FAIL
+ * depending on the status of the demo applications tasks.  A FAIL status will
+ * be latched.
+ *
+ * Messages are not written directly to the terminal, but passed to vPrintTask
+ * via a queue.
+ */
+static void vCheckTask( void *pvParameters );
+
+/* 
+ * The task that handles the uIP stack.  All TCP/IP processing is performed in
+ * this task.
+ */
+extern void vuIP_Task( void *pvParameters );
+
+/*
+ * The LCD is written two by more than one task so is controlled by a 
+ * 'gatekeeper' task.  This is the only task that is actually permitted to 
+ * access the LCD directly.  Other tasks wanting to display a message send
+ * the message to the gatekeeper.
+ */
+static void vLCDTask( void *pvParameters );
+
+/* The queue used to send messages to the LCD task. */
+xQueueHandle xLCDQueue;
+
+/*-----------------------------------------------------------*/
+
+int main (void)
+{
+	/* Setup the led's on the MCB2300 board */
+	vParTestInitialise();
+
+	/* Create the queue used by the LCD task.  Messages for display on the LCD
+	are received via this queue. */
+	xLCDQueue = xQueueCreate( mainQUEUE_SIZE, sizeof( xLCDMessage ) );
+
+	/* Create the lwIP task.  This uses the lwIP RTOS abstraction layer.*/
+    xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );
+
+	/* Start the standard demo tasks. */
+	vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
+    vCreateBlockTimeTasks();
+    vStartLEDFlashTasks( mainFLASH_PRIORITY );
+    vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
+    vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
+    vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );
+
+	/* Start the tasks defined within this file/specific to this demo. */
+    xTaskCreate( vCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
+	xTaskCreate( vLCDTask, ( signed portCHAR * ) "LCD", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );
+
+	/* The suicide tasks must be created last as they need to know how many
+	tasks were running prior to their creation in order to ascertain whether
+	or not the correct/expected number of tasks are running at any given time. */
+    vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
+
+	/* Start the scheduler. */
+	vTaskStartScheduler();
+
+    /* Will only get here if there was insufficient memory to create the idle
+    task. */
+	return 0; 
+}
+/*-----------------------------------------------------------*/
+
+static void vCheckTask( void *pvParameters )
+{
+portBASE_TYPE xErrorOccurred = pdFALSE;
+portTickType xLastExecutionTime;
+unsigned portBASE_TYPE uxColumn = 0;
+xLCDMessage xMessage;
+
+	xLastExecutionTime = xTaskGetTickCount();
+
+	xMessage.xColumn = 0;
+	xMessage.pcMessage = "PASS";
+
+    for( ;; )
+	{
+		/* Perform this check every mainCHECK_DELAY milliseconds. */
+		vTaskDelayUntil( &xLastExecutionTime, mainCHECK_DELAY );
+
+		/* Has an error been found in any task? */
+
+        if( xAreBlockingQueuesStillRunning() != pdTRUE )
+		{
+			xErrorOccurred = pdTRUE;
+		}
+
+		if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
+		{
+			xErrorOccurred = pdTRUE;
+		}
+
+        if( xAreSemaphoreTasksStillRunning() != pdTRUE )
+        {
+            xErrorOccurred = pdTRUE;
+        }
+
+        if( xArePollingQueuesStillRunning() != pdTRUE )
+        {
+            xErrorOccurred = pdTRUE;
+        }
+
+        if( xIsCreateTaskStillRunning() != pdTRUE )
+        {
+            xErrorOccurred = pdTRUE;
+        }
+
+        if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
+        {
+            xErrorOccurred = pdTRUE;
+        }
+
+        LCD_cls();
+        xMessage.xColumn++;
+        LCD_gotoxy( ( uxColumn & 0x07 ) + 1, ( uxColumn & 0x01 ) + 1 );
+
+        if( xErrorOccurred == pdTRUE )
+        {
+            xMessage.pcMessage = "FAIL";
+        }
+
+		/* Send the message to the LCD gatekeeper for display. */
+		xQueueSend( xLCDQueue, &xMessage, portMAX_DELAY );
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vLCDTask( void *pvParameters )
+{
+xLCDMessage xMessage;
+
+	/* Initialise the LCD and display a startup message. */
+	LCD_init();
+	LCD_cur_off();
+    LCD_cls();    
+    LCD_gotoxy( 1, 1 );
+    LCD_puts( ( signed portCHAR * ) "www.FreeRTOS.org" );
+
+	for( ;; )
+	{
+		/* Wait for a message to arrive that requires displaying. */
+		while( xQueueReceive( xLCDQueue, &xMessage, portMAX_DELAY ) != pdPASS );
+		
+		/* Display the message.  Print each message to a different position. */
+		LCD_cls();
+		LCD_gotoxy( ( xMessage.xColumn & 0x07 ) + 1, ( xMessage.xColumn & 0x01 ) + 1 );
+		LCD_puts( xMessage.pcMessage );
+	}
+
+}
+/*-----------------------------------------------------------*/
+
+/* Keep the compiler quiet. */
+#include <stdio.h>
+int __putchar( int c )
+{
+    return EOF;
+}
+
+
+
+
+

Demo/ARM7_LPC2368_Rowley/webserver/EMAC_ISR.c

@@ -0,0 +1,29 @@
+#include "FreeRTOS.h"
+#include "Semphr.h"
+#include "Task.h"
+
+void vEMAC_ISR( void ) __attribute__((naked));
+
+extern xSemaphoreHandle xEMACSemaphore;
+
+void vEMAC_ISR( void )
+{
+    portENTER_SWITCHING_ISR();
+
+    portBASE_TYPE xSwitchRequired = pdFALSE;
+
+    /* Clear the interrupt. */
+    IntClear = 0xffff;
+    VICVectAddr = 0;
+
+    /* Ensure the uIP task is not blocked as data has arrived. */
+    if( xSemaphoreGiveFromISR( xEMACSemaphore, pdFALSE ) )
+    {
+        xSwitchRequired = pdTRUE;
+    }
+
+    /* Switch to the uIP task. */
+    portEXIT_SWITCHING_ISR( xSwitchRequired );
+}
+
+

Demo/ARM7_LPC2368_Rowley/webserver/clock-arch.h

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2006, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack
+ *
+ * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $
+ */
+
+#ifndef __CLOCK_ARCH_H__
+#define __CLOCK_ARCH_H__
+
+#include "FreeRTOS.h"
+
+typedef unsigned long clock_time_t;
+#define CLOCK_CONF_SECOND configTICK_RATE_HZ
+
+#endif /* __CLOCK_ARCH_H__ */

Demo/ARM7_LPC2368_Rowley/webserver/emac.c

@@ -0,0 +1,412 @@
+/******************************************************************
+ *****                                                        *****
+ *****  Name: cs8900.c                                        *****
+ *****  Ver.: 1.0                                             *****
+ *****  Date: 07/05/2001                                      *****
+ *****  Auth: Andreas Dannenberg                              *****
+ *****        HTWK Leipzig                                    *****
+ *****        university of applied sciences                  *****
+ *****        Germany                                         *****
+ *****  Func: ethernet packet-driver for use with LAN-        *****
+ *****        controller CS8900 from Crystal/Cirrus Logic     *****
+ *****                                                        *****
+ *****  Keil: Module modified for use with Philips            *****
+ *****        LPC2378 EMAC Ethernet controller                *****
+ *****                                                        *****
+ ******************************************************************/
+
+/* Adapted from file originally written by Andreas Dannenberg.  Supplied with permission. */
+
+#include "FreeRTOS.h"
+#include "Semphr.h" 
+#include "task.h"
+#include "EMAC.h"
+
+/* The semaphore used to wake the uIP task when data arives. */
+xSemaphoreHandle xEMACSemaphore = NULL;
+
+static unsigned short *rptr;
+static unsigned short *tptr;
+
+// easyWEB internal function
+// help function to swap the byte order of a WORD
+
+static unsigned short SwapBytes(unsigned short Data)
+{
+  return (Data >> 8) | (Data << 8);
+}
+
+// Keil: function added to write PHY
+void write_PHY (int PhyReg, int Value)
+{
+  unsigned int tout;
+
+  MADR = DP83848C_DEF_ADR | PhyReg;
+  MWTD = Value;
+
+  /* Wait utill operation completed */
+  tout = 0;
+  for (tout = 0; tout < MII_WR_TOUT; tout++) {
+    if ((MIND & MIND_BUSY) == 0) {
+      break;
+    }
+  }
+}
+
+
+// Keil: function added to read PHY
+unsigned short read_PHY (unsigned char PhyReg) 
+{
+  unsigned int tout;
+
+  MADR = DP83848C_DEF_ADR | PhyReg;
+  MCMD = MCMD_READ;
+
+  /* Wait until operation completed */
+  tout = 0;
+  for (tout = 0; tout < MII_RD_TOUT; tout++) {
+    if ((MIND & MIND_BUSY) == 0) {
+      break;
+    }
+  }
+  MCMD = 0;
+  return (MRDD);
+}
+
+
+// Keil: function added to initialize Rx Descriptors
+void rx_descr_init (void)
+{
+  unsigned int i;
+
+  for (i = 0; i < NUM_RX_FRAG; i++) {
+    RX_DESC_PACKET(i)  = RX_BUF(i);
+    RX_DESC_CTRL(i)    = RCTRL_INT | (ETH_FRAG_SIZE-1);
+    RX_STAT_INFO(i)    = 0;
+    RX_STAT_HASHCRC(i) = 0;
+  }
+
+  /* Set EMAC Receive Descriptor Registers. */
+  RxDescriptor    = RX_DESC_BASE;
+  RxStatus        = RX_STAT_BASE;
+  RxDescriptorNumber = NUM_RX_FRAG-1;
+
+  /* Rx Descriptors Point to 0 */
+  RxConsumeIndex  = 0;
+}
+
+
+// Keil: function added to initialize Tx Descriptors
+void tx_descr_init (void) {
+  unsigned int i;
+
+  for (i = 0; i < NUM_TX_FRAG; i++) {
+    TX_DESC_PACKET(i) = TX_BUF(i);
+    TX_DESC_CTRL(i)   = 0;
+    TX_STAT_INFO(i)   = 0;
+  }
+
+  /* Set EMAC Transmit Descriptor Registers. */
+  TxDescriptor    = TX_DESC_BASE;
+  TxStatus        = TX_STAT_BASE;
+  TxDescriptorNumber = NUM_TX_FRAG-1;
+
+  /* Tx Descriptors Point to 0 */
+  TxProduceIndex  = 0;
+}
+
+
+// configure port-pins for use with LAN-controller,
+// reset it and send the configuration-sequence
+
+portBASE_TYPE Init_EMAC(void)
+{
+portBASE_TYPE xReturn = pdPASS;
+static portBASE_TYPE xAttempt = 0;
+// Keil: function modified to access the EMAC
+// Initializes the EMAC ethernet controller
+  volatile unsigned int regv,tout,id1,id2;
+
+  /* Enable P1 Ethernet Pins. */
+  PINSEL2 = 0x55555555;
+  PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;
+
+  /* Power Up the EMAC controller. */
+  PCONP |= 0x40000000;
+  vTaskDelay( 1 );
+
+  /* Reset all EMAC internal modules. */
+  MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
+             MAC1_SIM_RES | MAC1_SOFT_RES;
+  Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
+
+  /* A short delay after reset. */
+  vTaskDelay( 1 );
+
+  /* Initialize MAC control registers. */
+  MAC1 = MAC1_PASS_ALL;
+  MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
+  MAXF = ETH_MAX_FLEN;
+  CLRT = CLRT_DEF;
+  IPGR = IPGR_DEF;
+
+  /* Enable Reduced MII interface. */
+  Command = CR_RMII | CR_PASS_RUNT_FRM;
+
+  /* Reset Reduced MII Logic. */
+  SUPP = SUPP_RES_RMII;
+  SUPP = 0;
+
+  /* Put the DP83848C in reset mode */
+  write_PHY (PHY_REG_BMCR, 0x8000);
+  write_PHY (PHY_REG_BMCR, 0x8000);
+
+  /* Wait for hardware reset to end. */
+  for (tout = 0; tout < 100; tout++) {
+    vTaskDelay( 10 );
+    regv = read_PHY (PHY_REG_BMCR);
+    if (!(regv & 0x8000)) {
+      /* Reset complete */
+      break;
+    }
+  }
+
+  /* Check if this is a DP83848C PHY. */
+  id1 = read_PHY (PHY_REG_IDR1);
+  id2 = read_PHY (PHY_REG_IDR2);
+  if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {
+    /* Configure the PHY device */
+
+    /* Use autonegotiation about the link speed. */
+    write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
+    /* Wait to complete Auto_Negotiation. */
+    for (tout = 0; tout < 10; tout++) {
+      vTaskDelay( 100 );
+      regv = read_PHY (PHY_REG_BMSR);
+      if (regv & 0x0020) {
+        /* Autonegotiation Complete. */
+        break;
+      }
+    }
+  }
+  else
+  {
+    xReturn = pdFAIL;
+  }
+
+  /* Check the link status. */
+  if( xReturn == pdPASS )
+  {
+    xReturn = pdFAIL;
+    for (tout = 0; tout < 10; tout++) {
+      vTaskDelay( 100 );
+      regv = read_PHY (PHY_REG_STS);
+      if (regv & 0x0001) {
+        /* Link is on. */
+        xReturn = pdPASS;
+        break;
+      }
+    }
+  }
+
+  if( xReturn == pdPASS )
+  {
+    /* Configure Full/Half Duplex mode. */
+    if (regv & 0x0004) {
+      /* Full duplex is enabled. */
+      MAC2    |= MAC2_FULL_DUP;
+      Command |= CR_FULL_DUP;
+      IPGT     = IPGT_FULL_DUP;
+    }
+    else {
+      /* Half duplex mode. */
+      IPGT = IPGT_HALF_DUP;
+    }
+
+    /* Configure 100MBit/10MBit mode. */
+    if (regv & 0x0002) {
+      /* 10MBit mode. */
+      SUPP = 0;
+    }
+    else {
+      /* 100MBit mode. */
+      SUPP = SUPP_SPEED;
+    }
+
+    /* Set the Ethernet MAC Address registers */
+    SA0 = (emacETHADDR0 << 8) | emacETHADDR1;
+    SA1 = (emacETHADDR2 << 8) | emacETHADDR3;
+    SA2 = (emacETHADDR4 << 8) | emacETHADDR5;
+
+    /* Initialize Tx and Rx DMA Descriptors */
+    rx_descr_init ();
+    tx_descr_init ();
+
+    /* Receive Broadcast and Perfect Match Packets */
+    RxFilterCtrl = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN;
+
+    /* Create the semaphore used ot wake the uIP task. */
+    vSemaphoreCreateBinary( xEMACSemaphore );
+
+    /* Reset all interrupts */
+    IntClear  = 0xFFFF;
+
+    /* Enable receive and transmit mode of MAC Ethernet core */
+    Command  |= (CR_RX_EN | CR_TX_EN);
+    MAC1     |= MAC1_REC_EN;
+  }
+
+  return xReturn;
+}
+
+
+// reads a word in little-endian byte order from RX_BUFFER
+
+unsigned short ReadFrame_EMAC(void)
+{
+  return (*rptr++);
+}
+
+// reads a word in big-endian byte order from RX_FRAME_PORT
+// (useful to avoid permanent byte-swapping while reading
+// TCP/IP-data)
+
+unsigned short ReadFrameBE_EMAC(void)
+{
+  unsigned short ReturnValue;
+
+  ReturnValue = SwapBytes (*rptr++);
+  return (ReturnValue);
+}
+
+
+// copies bytes from frame port to MCU-memory
+// NOTES: * an odd number of byte may only be transfered
+//          if the frame is read to the end!
+//        * MCU-memory MUST start at word-boundary
+
+void CopyFromFrame_EMAC(void *Dest, unsigned short Size)
+{
+  unsigned short * piDest;                       // Keil: Pointer added to correct expression
+
+  piDest = Dest;                                 // Keil: Line added
+  while (Size > 1) {
+    *piDest++ = ReadFrame_EMAC();
+    Size -= 2;
+  }
+  
+  if (Size) {                                         // check for leftover byte...
+    *(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0
+  }                                                   // for the highbyte
+}
+
+// does a dummy read on frame-I/O-port
+// NOTE: only an even number of bytes is read!
+
+void DummyReadFrame_EMAC(unsigned short Size)    // discards an EVEN number of bytes
+{                                                // from RX-fifo
+  while (Size > 1) {
+    ReadFrame_EMAC();
+    Size -= 2;
+  }
+}
+
+// Reads the length of the received ethernet frame and checks if the 
+// destination address is a broadcast message or not
+// returns the frame length
+unsigned short StartReadFrame(void) {
+  unsigned short RxLen;
+  unsigned int idx;
+
+  idx = RxConsumeIndex;
+  RxLen = (RX_STAT_INFO(idx) & RINFO_SIZE) - 3;
+  rptr = (unsigned short *)RX_DESC_PACKET(idx);
+  return(RxLen);
+}
+
+void EndReadFrame(void) {
+  unsigned int idx;
+
+  /* DMA free packet. */
+  idx = RxConsumeIndex;
+
+  if (++idx == NUM_RX_FRAG)
+    idx = 0;
+
+  RxConsumeIndex = idx;
+}
+
+unsigned int CheckFrameReceived(void) {             // Packet received ?
+
+  if (RxProduceIndex != RxConsumeIndex)     // more packets received ?
+    return(1);
+  else 
+    return(0);
+}
+
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
+{
+unsigned int uiLen = 0;
+
+    if( RxProduceIndex != RxConsumeIndex )
+    {
+        uiLen = StartReadFrame();
+        CopyFromFrame_EMAC( ucBuffer, uiLen );
+        EndReadFrame();
+    }
+
+    return uiLen;
+}
+
+// requests space in EMAC memory for storing an outgoing frame
+
+void RequestSend(void)
+{
+  unsigned int idx;
+
+  idx  = TxProduceIndex;
+  tptr = (unsigned short *)TX_DESC_PACKET(idx);
+}
+
+// check if ethernet controller is ready to accept the
+// frame we want to send
+
+unsigned int Rdy4Tx(void)
+{
+  return (1);   // the ethernet controller transmits much faster
+}               // than the CPU can load its buffers
+
+
+// writes a word in little-endian byte order to TX_BUFFER
+void WriteFrame_EMAC(unsigned short Data)
+{
+  *tptr++ = Data;
+}
+
+// copies bytes from MCU-memory to frame port
+// NOTES: * an odd number of byte may only be transfered
+//          if the frame is written to the end!
+//        * MCU-memory MUST start at word-boundary
+
+void CopyToFrame_EMAC(void *Source, unsigned int Size)
+{
+  unsigned short * piSource;
+
+  piSource = Source;
+  Size = (Size + 1) & 0xFFFE;    // round Size up to next even number
+  while (Size > 0) {
+    WriteFrame_EMAC(*piSource++);
+    Size -= 2;
+  }
+}
+
+void DoSend_EMAC(unsigned short FrameSize)
+{
+  unsigned int idx;
+
+  idx = TxProduceIndex;
+  TX_DESC_CTRL(idx) = FrameSize | TCTRL_LAST;
+  if (++idx == NUM_TX_FRAG) idx = 0;
+  TxProduceIndex = idx;
+}
+

Demo/ARM7_LPC2368_Rowley/webserver/emac.h

@@ -0,0 +1,322 @@
+/*----------------------------------------------------------------------------
+ *      LPC2378 Ethernet Definitions
+ *----------------------------------------------------------------------------
+ *      Name:    EMAC.H
+ *      Purpose: Philips LPC2378 EMAC hardware definitions
+ *----------------------------------------------------------------------------
+ *      Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.
+ *---------------------------------------------------------------------------*/
+#ifndef __EMAC_H
+#define __EMAC_H
+
+/* MAC address definition.  The MAC address must be unique on the network. */
+#define emacETHADDR0 0
+#define emacETHADDR1 0xbd
+#define emacETHADDR2 0x33
+#define emacETHADDR3 0x02
+#define emacETHADDR4 0x64
+#define emacETHADDR5 0x24
+
+
+/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */
+#define NUM_RX_FRAG         4           /* Num.of RX Fragments 4*1536= 6.0kB */
+#define NUM_TX_FRAG         2           /* Num.of TX Fragments 2*1536= 3.0kB */
+#define ETH_FRAG_SIZE       1536        /* Packet Fragment size 1536 Bytes   */
+
+#define ETH_MAX_FLEN        1536        /* Max. Ethernet Frame Size          */
+
+/* EMAC variables located in 16K Ethernet SRAM */
+#define RX_DESC_BASE        0x7FE00000
+#define RX_STAT_BASE        (RX_DESC_BASE + NUM_RX_FRAG*8)
+#define TX_DESC_BASE        (RX_STAT_BASE + NUM_RX_FRAG*8)
+#define TX_STAT_BASE        (TX_DESC_BASE + NUM_TX_FRAG*8)
+#define RX_BUF_BASE         (TX_STAT_BASE + NUM_TX_FRAG*4)
+#define TX_BUF_BASE         (RX_BUF_BASE  + NUM_RX_FRAG*ETH_FRAG_SIZE)
+
+/* RX and TX descriptor and status definitions. */
+#define RX_DESC_PACKET(i)   (*(unsigned int *)(RX_DESC_BASE   + 8*i))
+#define RX_DESC_CTRL(i)     (*(unsigned int *)(RX_DESC_BASE+4 + 8*i))
+#define RX_STAT_INFO(i)     (*(unsigned int *)(RX_STAT_BASE   + 8*i))
+#define RX_STAT_HASHCRC(i)  (*(unsigned int *)(RX_STAT_BASE+4 + 8*i))
+#define TX_DESC_PACKET(i)   (*(unsigned int *)(TX_DESC_BASE   + 8*i))
+#define TX_DESC_CTRL(i)     (*(unsigned int *)(TX_DESC_BASE+4 + 8*i))
+#define TX_STAT_INFO(i)     (*(unsigned int *)(TX_STAT_BASE   + 4*i))
+#define RX_BUF(i)           (RX_BUF_BASE + ETH_FRAG_SIZE*i)
+#define TX_BUF(i)           (TX_BUF_BASE + ETH_FRAG_SIZE*i)
+
+/* MAC Configuration Register 1 */
+#define MAC1_REC_EN         0x00000001  /* Receive Enable                    */
+#define MAC1_PASS_ALL       0x00000002  /* Pass All Receive Frames           */
+#define MAC1_RX_FLOWC       0x00000004  /* RX Flow Control                   */
+#define MAC1_TX_FLOWC       0x00000008  /* TX Flow Control                   */
+#define MAC1_LOOPB          0x00000010  /* Loop Back Mode                    */
+#define MAC1_RES_TX         0x00000100  /* Reset TX Logic                    */
+#define MAC1_RES_MCS_TX     0x00000200  /* Reset MAC TX Control Sublayer     */
+#define MAC1_RES_RX         0x00000400  /* Reset RX Logic                    */
+#define MAC1_RES_MCS_RX     0x00000800  /* Reset MAC RX Control Sublayer     */
+#define MAC1_SIM_RES        0x00004000  /* Simulation Reset                  */
+#define MAC1_SOFT_RES       0x00008000  /* Soft Reset MAC                    */
+
+/* MAC Configuration Register 2 */
+#define MAC2_FULL_DUP       0x00000001  /* Full Duplex Mode                  */
+#define MAC2_FRM_LEN_CHK    0x00000002  /* Frame Length Checking             */
+#define MAC2_HUGE_FRM_EN    0x00000004  /* Huge Frame Enable                 */
+#define MAC2_DLY_CRC        0x00000008  /* Delayed CRC Mode                  */
+#define MAC2_CRC_EN         0x00000010  /* Append CRC to every Frame         */
+#define MAC2_PAD_EN         0x00000020  /* Pad all Short Frames              */
+#define MAC2_VLAN_PAD_EN    0x00000040  /* VLAN Pad Enable                   */
+#define MAC2_ADET_PAD_EN    0x00000080  /* Auto Detect Pad Enable            */
+#define MAC2_PPREAM_ENF     0x00000100  /* Pure Preamble Enforcement         */
+#define MAC2_LPREAM_ENF     0x00000200  /* Long Preamble Enforcement         */
+#undef  MAC2_NO_BACKOFF /* Remove compiler warning. */
+#define MAC2_NO_BACKOFF     0x00001000  /* No Backoff Algorithm              */
+#define MAC2_BACK_PRESSURE  0x00002000  /* Backoff Presurre / No Backoff     */
+#define MAC2_EXCESS_DEF     0x00004000  /* Excess Defer                      */
+
+/* Back-to-Back Inter-Packet-Gap Register */
+#define IPGT_FULL_DUP       0x00000015  /* Recommended value for Full Duplex */
+#define IPGT_HALF_DUP       0x00000012  /* Recommended value for Half Duplex */
+
+/* Non Back-to-Back Inter-Packet-Gap Register */
+#define IPGR_DEF            0x00000012  /* Recommended value                 */
+
+/* Collision Window/Retry Register */
+#define CLRT_DEF            0x0000370F  /* Default value                     */
+
+/* PHY Support Register */
+#undef SUPP_SPEED   /* Remove compiler warning. */
+#define SUPP_SPEED          0x00000100  /* Reduced MII Logic Current Speed   */
+#define SUPP_RES_RMII       0x00000800  /* Reset Reduced MII Logic           */
+
+/* Test Register */
+#define TEST_SHCUT_PQUANTA  0x00000001  /* Shortcut Pause Quanta             */
+#define TEST_TST_PAUSE      0x00000002  /* Test Pause                        */
+#define TEST_TST_BACKP      0x00000004  /* Test Back Pressure                */
+
+/* MII Management Configuration Register */
+#define MCFG_SCAN_INC       0x00000001  /* Scan Increment PHY Address        */
+#define MCFG_SUPP_PREAM     0x00000002  /* Suppress Preamble                 */
+#define MCFG_CLK_SEL        0x0000001C  /* Clock Select Mask                 */
+#define MCFG_RES_MII        0x00008000  /* Reset MII Management Hardware     */
+
+/* MII Management Command Register */
+#undef MCMD_READ   /* Remove compiler warning. */
+#define MCMD_READ           0x00000001  /* MII Read                          */
+#undef MCMD_SCAN /* Remove compiler warning. */
+#define MCMD_SCAN           0x00000002  /* MII Scan continuously             */
+
+#define MII_WR_TOUT         0x00050000  /* MII Write timeout count           */
+#define MII_RD_TOUT         0x00050000  /* MII Read timeout count            */
+
+/* MII Management Address Register */
+#define MADR_REG_ADR        0x0000001F  /* MII Register Address Mask         */
+#define MADR_PHY_ADR        0x00001F00  /* PHY Address Mask                  */
+
+/* MII Management Indicators Register */
+#undef MIND_BUSY   /* Remove compiler warning. */
+#define MIND_BUSY           0x00000001  /* MII is Busy                       */
+#define MIND_SCAN           0x00000002  /* MII Scanning in Progress          */
+#define MIND_NOT_VAL        0x00000004  /* MII Read Data not valid           */
+#define MIND_MII_LINK_FAIL  0x00000008  /* MII Link Failed                   */
+
+/* Command Register */
+#define CR_RX_EN            0x00000001  /* Enable Receive                    */
+#define CR_TX_EN            0x00000002  /* Enable Transmit                   */
+#define CR_REG_RES          0x00000008  /* Reset Host Registers              */
+#define CR_TX_RES           0x00000010  /* Reset Transmit Datapath           */
+#define CR_RX_RES           0x00000020  /* Reset Receive Datapath            */
+#define CR_PASS_RUNT_FRM    0x00000040  /* Pass Runt Frames                  */
+#define CR_PASS_RX_FILT     0x00000080  /* Pass RX Filter                    */
+#define CR_TX_FLOW_CTRL     0x00000100  /* TX Flow Control                   */
+#define CR_RMII             0x00000200  /* Reduced MII Interface             */
+#define CR_FULL_DUP         0x00000400  /* Full Duplex                       */
+
+/* Status Register */
+#define SR_RX_EN            0x00000001  /* Enable Receive                    */
+#define SR_TX_EN            0x00000002  /* Enable Transmit                   */
+
+/* Transmit Status Vector 0 Register */
+#define TSV0_CRC_ERR        0x00000001  /* CRC error                         */
+#define TSV0_LEN_CHKERR     0x00000002  /* Length Check Error                */
+#define TSV0_LEN_OUTRNG     0x00000004  /* Length Out of Range               */
+#define TSV0_DONE           0x00000008  /* Tramsmission Completed            */
+#define TSV0_MCAST          0x00000010  /* Multicast Destination             */
+#define TSV0_BCAST          0x00000020  /* Broadcast Destination             */
+#define TSV0_PKT_DEFER      0x00000040  /* Packet Deferred                   */
+#define TSV0_EXC_DEFER      0x00000080  /* Excessive Packet Deferral         */
+#define TSV0_EXC_COLL       0x00000100  /* Excessive Collision               */
+#define TSV0_LATE_COLL      0x00000200  /* Late Collision Occured            */
+#define TSV0_GIANT          0x00000400  /* Giant Frame                       */
+#define TSV0_UNDERRUN       0x00000800  /* Buffer Underrun                   */
+#define TSV0_BYTES          0x0FFFF000  /* Total Bytes Transferred           */
+#define TSV0_CTRL_FRAME     0x10000000  /* Control Frame                     */
+#define TSV0_PAUSE          0x20000000  /* Pause Frame                       */
+#define TSV0_BACK_PRESS     0x40000000  /* Backpressure Method Applied       */
+#define TSV0_VLAN           0x80000000  /* VLAN Frame                        */
+
+/* Transmit Status Vector 1 Register */
+#define TSV1_BYTE_CNT       0x0000FFFF  /* Transmit Byte Count               */
+#define TSV1_COLL_CNT       0x000F0000  /* Transmit Collision Count          */
+
+/* Receive Status Vector Register */
+#define RSV_BYTE_CNT        0x0000FFFF  /* Receive Byte Count                */
+#define RSV_PKT_IGNORED     0x00010000  /* Packet Previously Ignored         */
+#define RSV_RXDV_SEEN       0x00020000  /* RXDV Event Previously Seen        */
+#define RSV_CARR_SEEN       0x00040000  /* Carrier Event Previously Seen     */
+#define RSV_REC_CODEV       0x00080000  /* Receive Code Violation            */
+#define RSV_CRC_ERR         0x00100000  /* CRC Error                         */
+#define RSV_LEN_CHKERR      0x00200000  /* Length Check Error                */
+#define RSV_LEN_OUTRNG      0x00400000  /* Length Out of Range               */
+#define RSV_REC_OK          0x00800000  /* Frame Received OK                 */
+#define RSV_MCAST           0x01000000  /* Multicast Frame                   */
+#define RSV_BCAST           0x02000000  /* Broadcast Frame                   */
+#define RSV_DRIB_NIBB       0x04000000  /* Dribble Nibble                    */
+#define RSV_CTRL_FRAME      0x08000000  /* Control Frame                     */
+#define RSV_PAUSE           0x10000000  /* Pause Frame                       */
+#define RSV_UNSUPP_OPC      0x20000000  /* Unsupported Opcode                */
+#define RSV_VLAN            0x40000000  /* VLAN Frame                        */
+
+/* Flow Control Counter Register */
+#define FCC_MIRR_CNT        0x0000FFFF  /* Mirror Counter                    */
+#define FCC_PAUSE_TIM       0xFFFF0000  /* Pause Timer                       */
+
+/* Flow Control Status Register */
+#define FCS_MIRR_CNT        0x0000FFFF  /* Mirror Counter Current            */
+
+/* Receive Filter Control Register */
+#define RFC_UCAST_EN        0x00000001  /* Accept Unicast Frames Enable      */
+#define RFC_BCAST_EN        0x00000002  /* Accept Broadcast Frames Enable    */
+#define RFC_MCAST_EN        0x00000004  /* Accept Multicast Frames Enable    */
+#define RFC_UCAST_HASH_EN   0x00000008  /* Accept Unicast Hash Filter Frames */
+#define RFC_MCAST_HASH_EN   0x00000010  /* Accept Multicast Hash Filter Fram.*/
+#define RFC_PERFECT_EN      0x00000020  /* Accept Perfect Match Enable       */
+#define RFC_MAGP_WOL_EN     0x00001000  /* Magic Packet Filter WoL Enable    */
+#define RFC_PFILT_WOL_EN    0x00002000  /* Perfect Filter WoL Enable         */
+
+/* Receive Filter WoL Status/Clear Registers */
+#define WOL_UCAST           0x00000001  /* Unicast Frame caused WoL          */
+#define WOL_BCAST           0x00000002  /* Broadcast Frame caused WoL        */
+#define WOL_MCAST           0x00000004  /* Multicast Frame caused WoL        */
+#define WOL_UCAST_HASH      0x00000008  /* Unicast Hash Filter Frame WoL     */
+#define WOL_MCAST_HASH      0x00000010  /* Multicast Hash Filter Frame WoL   */
+#define WOL_PERFECT         0x00000020  /* Perfect Filter WoL                */
+#define WOL_RX_FILTER       0x00000080  /* RX Filter caused WoL              */
+#define WOL_MAG_PACKET      0x00000100  /* Magic Packet Filter caused WoL    */
+
+/* Interrupt Status/Enable/Clear/Set Registers */
+#define INT_RX_OVERRUN      0x00000001  /* Overrun Error in RX Queue         */
+#define INT_RX_ERR          0x00000002  /* Receive Error                     */
+#define INT_RX_FIN          0x00000004  /* RX Finished Process Descriptors   */
+#define INT_RX_DONE         0x00000008  /* Receive Done                      */
+#define INT_TX_UNDERRUN     0x00000010  /* Transmit Underrun                 */
+#define INT_TX_ERR          0x00000020  /* Transmit Error                    */
+#define INT_TX_FIN          0x00000040  /* TX Finished Process Descriptors   */
+#define INT_TX_DONE         0x00000080  /* Transmit Done                     */
+#define INT_SOFT_INT        0x00001000  /* Software Triggered Interrupt      */
+#define INT_WAKEUP          0x00002000  /* Wakeup Event Interrupt            */
+
+/* Power Down Register */
+#define PD_POWER_DOWN       0x80000000  /* Power Down MAC                    */
+
+/* RX Descriptor Control Word */
+#define RCTRL_SIZE          0x000007FF  /* Buffer size mask                  */
+#define RCTRL_INT           0x80000000  /* Generate RxDone Interrupt         */
+
+/* RX Status Hash CRC Word */
+#define RHASH_SA            0x000001FF  /* Hash CRC for Source Address       */
+#define RHASH_DA            0x001FF000  /* Hash CRC for Destination Address  */
+
+/* RX Status Information Word */
+#define RINFO_SIZE          0x000007FF  /* Data size in bytes                */
+#define RINFO_CTRL_FRAME    0x00040000  /* Control Frame                     */
+#define RINFO_VLAN          0x00080000  /* VLAN Frame                        */
+#define RINFO_FAIL_FILT     0x00100000  /* RX Filter Failed                  */
+#define RINFO_MCAST         0x00200000  /* Multicast Frame                   */
+#define RINFO_BCAST         0x00400000  /* Broadcast Frame                   */
+#define RINFO_CRC_ERR       0x00800000  /* CRC Error in Frame                */
+#define RINFO_SYM_ERR       0x01000000  /* Symbol Error from PHY             */
+#define RINFO_LEN_ERR       0x02000000  /* Length Error                      */
+#define RINFO_RANGE_ERR     0x04000000  /* Range Error (exceeded max. size)  */
+#define RINFO_ALIGN_ERR     0x08000000  /* Alignment Error                   */
+#define RINFO_OVERRUN       0x10000000  /* Receive overrun                   */
+#define RINFO_NO_DESCR      0x20000000  /* No new Descriptor available       */
+#define RINFO_LAST_FLAG     0x40000000  /* Last Fragment in Frame            */
+#define RINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */
+
+#define RINFO_ERR_MASK     (RINFO_FAIL_FILT | RINFO_CRC_ERR   | RINFO_SYM_ERR | \
+                            RINFO_LEN_ERR   | RINFO_ALIGN_ERR | RINFO_OVERRUN)
+
+/* TX Descriptor Control Word */
+#define TCTRL_SIZE          0x000007FF  /* Size of data buffer in bytes      */
+#define TCTRL_OVERRIDE      0x04000000  /* Override Default MAC Registers    */
+#define TCTRL_HUGE          0x08000000  /* Enable Huge Frame                 */
+#define TCTRL_PAD           0x10000000  /* Pad short Frames to 64 bytes      */
+#define TCTRL_CRC           0x20000000  /* Append a hardware CRC to Frame    */
+#define TCTRL_LAST          0x40000000  /* Last Descriptor for TX Frame      */
+#define TCTRL_INT           0x80000000  /* Generate TxDone Interrupt         */
+
+/* TX Status Information Word */
+#define TINFO_COL_CNT       0x01E00000  /* Collision Count                   */
+#define TINFO_DEFER         0x02000000  /* Packet Deferred (not an error)    */
+#define TINFO_EXCESS_DEF    0x04000000  /* Excessive Deferral                */
+#define TINFO_EXCESS_COL    0x08000000  /* Excessive Collision               */
+#define TINFO_LATE_COL      0x10000000  /* Late Collision Occured            */
+#define TINFO_UNDERRUN      0x20000000  /* Transmit Underrun                 */
+#define TINFO_NO_DESCR      0x40000000  /* No new Descriptor available       */
+#define TINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */
+
+/* DP83848C PHY Registers */
+#define PHY_REG_BMCR        0x00        /* Basic Mode Control Register       */
+#define PHY_REG_BMSR        0x01        /* Basic Mode Status Register        */
+#define PHY_REG_IDR1        0x02        /* PHY Identifier 1                  */
+#define PHY_REG_IDR2        0x03        /* PHY Identifier 2                  */
+#define PHY_REG_ANAR        0x04        /* Auto-Negotiation Advertisement    */
+#define PHY_REG_ANLPAR      0x05        /* Auto-Neg. Link Partner Abitily    */
+#define PHY_REG_ANER        0x06        /* Auto-Neg. Expansion Register      */
+#define PHY_REG_ANNPTR      0x07        /* Auto-Neg. Next Page TX            */
+
+/* PHY Extended Registers */
+#define PHY_REG_STS         0x10        /* Status Register                   */
+#define PHY_REG_MICR        0x11        /* MII Interrupt Control Register    */
+#define PHY_REG_MISR        0x12        /* MII Interrupt Status Register     */
+#define PHY_REG_FCSCR       0x14        /* False Carrier Sense Counter       */
+#define PHY_REG_RECR        0x15        /* Receive Error Counter             */
+#define PHY_REG_PCSR        0x16        /* PCS Sublayer Config. and Status   */
+#define PHY_REG_RBR         0x17        /* RMII and Bypass Register          */
+#define PHY_REG_LEDCR       0x18        /* LED Direct Control Register       */
+#define PHY_REG_PHYCR       0x19        /* PHY Control Register              */
+#define PHY_REG_10BTSCR     0x1A        /* 10Base-T Status/Control Register  */
+#define PHY_REG_CDCTRL1     0x1B        /* CD Test Control and BIST Extens.  */
+#define PHY_REG_EDCR        0x1D        /* Energy Detect Control Register    */
+
+#define PHY_FULLD_100M      0x2100      /* Full Duplex 100Mbit               */
+#define PHY_HALFD_100M      0x2000      /* Half Duplex 100Mbit               */
+#define PHY_FULLD_10M       0x0100      /* Full Duplex 10Mbit                */
+#define PHY_HALFD_10M       0x0000      /* Half Duplex 10MBit                */
+#define PHY_AUTO_NEG        0x3000      /* Select Auto Negotiation           */
+
+#define DP83848C_DEF_ADR    0x0100      /* Default PHY device address        */
+#define DP83848C_ID         0x20005C90  /* PHY Identifier                    */
+
+// prototypes
+portBASE_TYPE           Init_EMAC(void);
+unsigned short ReadFrameBE_EMAC(void);
+void           CopyToFrame_EMAC(void *Source, unsigned int Size);
+void           CopyFromFrame_EMAC(void *Dest, unsigned short Size);
+void           DummyReadFrame_EMAC(unsigned short Size);
+unsigned short StartReadFrame(void);
+void           EndReadFrame(void);
+unsigned int   CheckFrameReceived(void);
+void           RequestSend(void);
+unsigned int   Rdy4Tx(void);
+void           DoSend_EMAC(unsigned short FrameSize);
+void vEMACWaitForInput( void );
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer );
+
+
+#endif
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
+

Demo/ARM7_LPC2368_Rowley/webserver/http-strings

@@ -0,0 +1,35 @@
+http_http "http://"
+http_200 "200 "
+http_301 "301 "
+http_302 "302 "
+http_get "GET "
+http_10 "HTTP/1.0"
+http_11 "HTTP/1.1"
+http_content_type "content-type: "
+http_texthtml "text/html"
+http_location "location: "
+http_host "host: "
+http_crnl "\r\n"
+http_index_html "/index.html"
+http_404_html "/404.html"
+http_referer "Referer:"
+http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"
+http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"
+http_content_type_plain "Content-type: text/plain\r\n\r\n"
+http_content_type_html "Content-type: text/html\r\n\r\n"
+http_content_type_css  "Content-type: text/css\r\n\r\n"
+http_content_type_text "Content-type: text/text\r\n\r\n"
+http_content_type_png  "Content-type: image/png\r\n\r\n"
+http_content_type_gif  "Content-type: image/gif\r\n\r\n"
+http_content_type_jpg  "Content-type: image/jpeg\r\n\r\n"
+http_content_type_binary "Content-type: application/octet-stream\r\n\r\n"
+http_html ".html"
+http_shtml ".shtml"
+http_htm ".htm"
+http_css ".css"
+http_png ".png"
+http_gif ".gif"
+http_jpg ".jpg"
+http_text ".txt"
+http_txt ".txt"
+

Demo/ARM7_LPC2368_Rowley/webserver/http-strings.c

@@ -0,0 +1,102 @@
+const char http_http[8] = 
+/* "http://" */
+{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };
+const char http_200[5] = 
+/* "200 " */
+{0x32, 0x30, 0x30, 0x20, };
+const char http_301[5] = 
+/* "301 " */
+{0x33, 0x30, 0x31, 0x20, };
+const char http_302[5] = 
+/* "302 " */
+{0x33, 0x30, 0x32, 0x20, };
+const char http_get[5] = 
+/* "GET " */
+{0x47, 0x45, 0x54, 0x20, };
+const char http_10[9] = 
+/* "HTTP/1.0" */
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };
+const char http_11[9] = 
+/* "HTTP/1.1" */
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };
+const char http_content_type[15] = 
+/* "content-type: " */
+{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };
+const char http_texthtml[10] = 
+/* "text/html" */
+{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_location[11] = 
+/* "location: " */
+{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };
+const char http_host[7] = 
+/* "host: " */
+{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };
+const char http_crnl[3] = 
+/* "\r\n" */
+{0xd, 0xa, };
+const char http_index_html[12] = 
+/* "/index.html" */
+{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_404_html[10] = 
+/* "/404.html" */
+{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_referer[9] = 
+/* "Referer:" */
+{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };
+const char http_header_200[84] = 
+/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };
+const char http_header_404[91] = 
+/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };
+const char http_content_type_plain[29] = 
+/* "Content-type: text/plain\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_html[28] = 
+/* "Content-type: text/html\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_css [27] = 
+/* "Content-type: text/css\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_text[28] = 
+/* "Content-type: text/text\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_png [28] = 
+/* "Content-type: image/png\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_gif [28] = 
+/* "Content-type: image/gif\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_jpg [29] = 
+/* "Content-type: image/jpeg\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_binary[43] = 
+/* "Content-type: application/octet-stream\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };
+const char http_html[6] = 
+/* ".html" */
+{0x2e, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_shtml[7] = 
+/* ".shtml" */
+{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_htm[5] = 
+/* ".htm" */
+{0x2e, 0x68, 0x74, 0x6d, };
+const char http_css[5] = 
+/* ".css" */
+{0x2e, 0x63, 0x73, 0x73, };
+const char http_png[5] = 
+/* ".png" */
+{0x2e, 0x70, 0x6e, 0x67, };
+const char http_gif[5] = 
+/* ".gif" */
+{0x2e, 0x67, 0x69, 0x66, };
+const char http_jpg[5] = 
+/* ".jpg" */
+{0x2e, 0x6a, 0x70, 0x67, };
+const char http_text[5] = 
+/* ".txt" */
+{0x2e, 0x74, 0x78, 0x74, };
+const char http_txt[5] = 
+/* ".txt" */
+{0x2e, 0x74, 0x78, 0x74, };

Demo/ARM7_LPC2368_Rowley/webserver/http-strings.h

@@ -0,0 +1,34 @@
+extern const char http_http[8];
+extern const char http_200[5];
+extern const char http_301[5];
+extern const char http_302[5];
+extern const char http_get[5];
+extern const char http_10[9];
+extern const char http_11[9];
+extern const char http_content_type[15];
+extern const char http_texthtml[10];
+extern const char http_location[11];
+extern const char http_host[7];
+extern const char http_crnl[3];
+extern const char http_index_html[12];
+extern const char http_404_html[10];
+extern const char http_referer[9];
+extern const char http_header_200[84];
+extern const char http_header_404[91];
+extern const char http_content_type_plain[29];
+extern const char http_content_type_html[28];
+extern const char http_content_type_css [27];
+extern const char http_content_type_text[28];
+extern const char http_content_type_png [28];
+extern const char http_content_type_gif [28];
+extern const char http_content_type_jpg [29];
+extern const char http_content_type_binary[43];
+extern const char http_html[6];
+extern const char http_shtml[7];
+extern const char http_htm[5];
+extern const char http_css[5];
+extern const char http_png[5];
+extern const char http_gif[5];
+extern const char http_jpg[5];
+extern const char http_text[5];
+extern const char http_txt[5];

Demo/ARM7_LPC2368_Rowley/webserver/httpd-cgi.c

@@ -0,0 +1,276 @@
+/**
+ * \addtogroup httpd
+ * @{
+ */
+
+/**
+ * \file
+ *         Web server script interface
+ * \author
+ *         Adam Dunkels <adam@sics.se>
+ *
+ */
+
+/*
+ * Copyright (c) 2001-2006, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack.
+ *
+ * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $
+ *
+ */
+
+#include "uip.h"
+#include "psock.h"
+#include "httpd.h"
+#include "httpd-cgi.h"
+#include "httpd-fs.h"
+
+#include <stdio.h>
+#include <string.h>
+
+HTTPD_CGI_CALL(file, "file-stats", file_stats);
+HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);
+HTTPD_CGI_CALL(net, "net-stats", net_stats);
+HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );
+HTTPD_CGI_CALL(io, "led-io", led_io );
+
+
+static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &io, NULL };
+
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+httpd_cgifunction
+httpd_cgi(char *name)
+{
+  const struct httpd_cgi_call **f;
+
+  /* Find the matching name in the table, return the function. */
+  for(f = calls; *f != NULL; ++f) {
+    if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {
+      return (*f)->function;
+    }
+  }
+  return nullfunction;
+}
+/*---------------------------------------------------------------------------*/
+static unsigned short
+generate_file_stats(void *arg)
+{
+  char *f = (char *)arg;
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(file_stats(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+
+  PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);
+  
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static const char closed[] =   /*  "CLOSED",*/
+{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};
+static const char syn_rcvd[] = /*  "SYN-RCVD",*/
+{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,
+ 0x44,  0};
+static const char syn_sent[] = /*  "SYN-SENT",*/
+{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,
+ 0x54,  0};
+static const char established[] = /*  "ESTABLISHED",*/
+{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,
+ 0x45, 0x44, 0};
+static const char fin_wait_1[] = /*  "FIN-WAIT-1",*/
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
+ 0x54, 0x2d, 0x31, 0};
+static const char fin_wait_2[] = /*  "FIN-WAIT-2",*/
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
+ 0x54, 0x2d, 0x32, 0};
+static const char closing[] = /*  "CLOSING",*/
+{0x43, 0x4c, 0x4f, 0x53, 0x49,
+ 0x4e, 0x47, 0};
+static const char time_wait[] = /*  "TIME-WAIT,"*/
+{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,
+ 0x49, 0x54, 0};
+static const char last_ack[] = /*  "LAST-ACK"*/
+{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,
+ 0x4b, 0};
+
+static const char *states[] = {
+  closed,
+  syn_rcvd,
+  syn_sent,
+  established,
+  fin_wait_1,
+  fin_wait_2,
+  closing,
+  time_wait,
+  last_ack};
+  
+
+static unsigned short
+generate_tcp_stats(void *arg)
+{
+  struct uip_conn *conn;
+  struct httpd_state *s = (struct httpd_state *)arg;
+    
+  conn = &uip_conns[s->count];
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,
+		 "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",
+		 htons(conn->lport),
+		 htons(conn->ripaddr[0]) >> 8,
+		 htons(conn->ripaddr[0]) & 0xff,
+		 htons(conn->ripaddr[1]) >> 8,
+		 htons(conn->ripaddr[1]) & 0xff,
+		 htons(conn->rport),
+		 states[conn->tcpstateflags & UIP_TS_MASK],
+		 conn->nrtx,
+		 conn->timer,
+		 (uip_outstanding(conn))? '*':' ',
+		 (uip_stopped(conn))? '!':' ');
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))
+{
+  
+  PSOCK_BEGIN(&s->sout);
+
+  for(s->count = 0; s->count < UIP_CONNS; ++s->count) {
+    if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {
+      PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);
+    }
+  }
+
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static unsigned short
+generate_net_stats(void *arg)
+{
+  struct httpd_state *s = (struct httpd_state *)arg;
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,
+		  "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);
+}
+
+static
+PT_THREAD(net_stats(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+
+#if UIP_STATISTICS
+
+  for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);
+      ++s->count) {
+    PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);
+  }
+  
+#endif /* UIP_STATISTICS */
+  
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+
+extern void vTaskList( signed char *pcWriteBuffer );
+static char cCountBuf[ 32 ];
+long lRefreshCount = 0;
+static unsigned short
+generate_rtos_stats(void *arg)
+{
+	lRefreshCount++;
+	sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );
+    vTaskList( uip_appdata );
+	strcat( uip_appdata, cCountBuf );
+  
+	return strlen( uip_appdata );
+}
+/*---------------------------------------------------------------------------*/
+
+
+static
+PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+  PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);  
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+
+char *pcStatus[ 3 ];
+unsigned long ulString;
+extern unsigned long uxParTextGetLED( unsigned long uxLED );
+
+static unsigned short generate_io_state( void *arg )
+{
+	for( ulString = 0; ulString < 4; ulString++ )
+	{
+		if( uxParTextGetLED( ulString + 5 ) )
+		{
+			pcStatus[ ulString ] = "checked";
+		}
+		else
+		{
+			pcStatus[ ulString ] = "";
+		}
+	}
+
+	sprintf( uip_appdata,
+		"<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED 2.5,"\
+		"<input type=\"checkbox\" name=\"LED1\" value=\"1\" %s>LED 2.6,"\
+		"<input type=\"checkbox\" name=\"LED2\" value=\"1\" %s>LED 2.7"\
+		"<p>"\
+		"<input type=\"text\" name=\"LCD\" value=\"Enter LCD text\" size=\"16\">",
+		pcStatus[ 0 ], 
+		pcStatus[ 1 ], 
+		pcStatus[ 2 ] );
+
+	return strlen( uip_appdata );
+}
+
+static PT_THREAD(led_io(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+  PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);
+  PSOCK_END(&s->sout);
+}
+
+/** @} */
+
+
+
+
+
+

Demo/ARM7_LPC2368_Rowley/webserver/httpd-cgi.h

@@ -0,0 +1,84 @@
+/**
+ * \addtogroup httpd
+ * @{
+ */
+
+/**
+ * \file
+ *         Web server script interface header file
+ * \author
+ *         Adam Dunkels <adam@sics.se>
+ *
+ */
+
+
+
+/*
+ * Copyright (c) 2001, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack.
+ *
+ * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $
+ *
+ */
+
+#ifndef __HTTPD_CGI_H__
+#define __HTTPD_CGI_H__
+
+#include "psock.h"
+#include "httpd.h"
+
+typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));
+
+httpd_cgifunction httpd_cgi(char *name);
+
+struct httpd_cgi_call {
+  const char *name;
+  const httpd_cgifunction function;
+};
+
+/**
+ * \brief      HTTPD CGI function declaration
+ * \param name The C variable name of the function
+ * \param str  The string name of the function, used in the script file
+ * \param function A pointer to the function that implements it
+ *
+ *             This macro is used for declaring a HTTPD CGI
+ *             function. This function is then added to the list of
+ *             HTTPD CGI functions with the httpd_cgi_add() function.
+ *
+ * \hideinitializer
+ */
+#define HTTPD_CGI_CALL(name, str, function) \
+static PT_THREAD(function(struct httpd_state *, char *)); \
+static const struct httpd_cgi_call name = {str, function}
+
+void httpd_cgi_init(void);
+#endif /* __HTTPD_CGI_H__ */
+
+/** @} */

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fs.c

@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $
+ */
+
+#include "httpd.h"
+#include "httpd-fs.h"
+#include "httpd-fsdata.h"
+
+#ifndef NULL
+#define NULL 0
+#endif /* NULL */
+
+#include "httpd-fsdata.c"
+
+#if HTTPD_FS_STATISTICS
+static u16_t count[HTTPD_FS_NUMFILES];
+#endif /* HTTPD_FS_STATISTICS */
+
+/*-----------------------------------------------------------------------------------*/
+static u8_t
+httpd_fs_strcmp(const char *str1, const char *str2)
+{
+  u8_t i;
+  i = 0;
+ loop:
+
+  if(str2[i] == 0 ||
+     str1[i] == '\r' ||
+     str1[i] == '\n') {
+    return 0;
+  }
+
+  if(str1[i] != str2[i]) {
+    return 1;
+  }
+
+
+  ++i;
+  goto loop;
+}
+/*-----------------------------------------------------------------------------------*/
+int
+httpd_fs_open(const char *name, struct httpd_fs_file *file)
+{
+#if HTTPD_FS_STATISTICS
+  u16_t i = 0;
+#endif /* HTTPD_FS_STATISTICS */
+  struct httpd_fsdata_file_noconst *f;
+
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;
+      f != NULL;
+      f = (struct httpd_fsdata_file_noconst *)f->next) {
+
+    if(httpd_fs_strcmp(name, f->name) == 0) {
+      file->data = f->data;
+      file->len = f->len;
+#if HTTPD_FS_STATISTICS
+      ++count[i];
+#endif /* HTTPD_FS_STATISTICS */
+      return 1;
+    }
+#if HTTPD_FS_STATISTICS
+    ++i;
+#endif /* HTTPD_FS_STATISTICS */
+
+  }
+  return 0;
+}
+/*-----------------------------------------------------------------------------------*/
+void
+httpd_fs_init(void)
+{
+#if HTTPD_FS_STATISTICS
+  u16_t i;
+  for(i = 0; i < HTTPD_FS_NUMFILES; i++) {
+    count[i] = 0;
+  }
+#endif /* HTTPD_FS_STATISTICS */
+}
+/*-----------------------------------------------------------------------------------*/
+#if HTTPD_FS_STATISTICS
+u16_t httpd_fs_count
+(char *name)
+{
+  struct httpd_fsdata_file_noconst *f;
+  u16_t i;
+
+  i = 0;
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;
+      f != NULL;
+      f = (struct httpd_fsdata_file_noconst *)f->next) {
+
+    if(httpd_fs_strcmp(name, f->name) == 0) {
+      return count[i];
+    }
+    ++i;
+  }
+  return 0;
+}
+#endif /* HTTPD_FS_STATISTICS */
+/*-----------------------------------------------------------------------------------*/

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fs.h

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $
+ */
+#ifndef __HTTPD_FS_H__
+#define __HTTPD_FS_H__
+
+#define HTTPD_FS_STATISTICS 1
+
+struct httpd_fs_file {
+  char *data;
+  int len;
+};
+
+/* file must be allocated by caller and will be filled in
+   by the function. */
+int httpd_fs_open(const char *name, struct httpd_fs_file *file);
+
+#ifdef HTTPD_FS_STATISTICS
+#if HTTPD_FS_STATISTICS == 1
+u16_t httpd_fs_count(char *name);
+#endif /* HTTPD_FS_STATISTICS */
+#endif /* HTTPD_FS_STATISTICS */
+
+void httpd_fs_init(void);
+
+#endif /* __HTTPD_FS_H__ */

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fs/404.html

@@ -0,0 +1,8 @@
+<html>
+  <body bgcolor="white">
+    <center>
+      <h1>404 - file not found</h1>
+      <h3>Go <a href="/">here</a> instead.</h3>
+    </center>
+  </body>
+</html>

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fs/index.html

@@ -0,0 +1,13 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,100)"bgcolor="#CCCCff">
+<font face="arial">
+Loading index.shtml.  Click <a href="index.shtml">here</a> if not automatically redirected.
+</font>
+</font>
+</body>
+</html>
+

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fs/index.shtml

@@ -0,0 +1,20 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,2000)"bgcolor="#CCCCff">
+<font face="arial">
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<br><p>
+<h2>Task statistics</h2>
+Page will refresh evey 2 seconds.<p>
+<font face="courier"><pre>Task          State  Priority  Stack	#<br>************************************************<br>
+%! rtos-stats
+</pre></font>
+</font>
+</body>
+</html>
+

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fs/io.shtml

@@ -0,0 +1,28 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY bgcolor="#CCCCff">
+<font face="arial">
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<b>LED and LCD IO</b><br>
+
+<p>
+
+Use the check boxes to select the LED's to turn on or off, enter text to display on the LCD, then click "Update IO".
+
+
+<p>
+<form name="aForm" action="/io.shtml" method="get">
+%! led-io
+<p>
+<input type="submit" value="Update IO">
+</form>
+<br><p>
+</font>
+</body>
+</html>
+

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fs/stats.shtml

@@ -0,0 +1,41 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY bgcolor="#CCCCff">
+<font face="arial">
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<br><p>
+<h2>Network statistics</h2>
+<table width="300" border="0">
+<tr><td align="left"><font face="courier"><pre>
+IP           Packets dropped
+             Packets received
+             Packets sent
+IP errors    IP version/header length
+             IP length, high byte
+             IP length, low byte
+             IP fragments
+             Header checksum
+             Wrong protocol
+ICMP	     Packets dropped
+             Packets received
+             Packets sent
+             Type errors
+TCP          Packets dropped
+             Packets received
+             Packets sent
+             Checksum errors
+             Data packets without ACKs
+             Resets
+             Retransmissions
+	     No connection avaliable
+	     Connection attempts to closed ports
+</pre></font></td><td><pre>%! net-stats
+</pre></table>
+</font>
+</body>
+</html>

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fs/tcp.shtml

@@ -0,0 +1,21 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY bgcolor="#CCCCff">
+<font face="arial">
+<a href="index.shtml">RTOS Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<br>
+<h2>Network connections</h2>
+<p>
+<table>
+<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>
+%! tcp-connections
+</pre></font>
+</font>
+</body>
+</html>
+

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fsdata.c

@@ -0,0 +1,470 @@
+static const unsigned char data_404_html[] = {
+	/* /404.html */
+	0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,
+	0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 0xa, 0x20, 0x20, 
+	0x3c, 0x62, 0x6f, 0x64, 0x79, 0x20, 0x62, 0x67, 0x63, 0x6f, 
+	0x6c, 0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65, 
+	0x22, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63, 
+	0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e, 0xd, 0xa, 0x20, 0x20, 
+	0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x31, 0x3e, 0x34, 0x30, 
+	0x34, 0x20, 0x2d, 0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x6e, 
+	0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f, 
+	0x68, 0x31, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 
+	0x20, 0x3c, 0x68, 0x33, 0x3e, 0x47, 0x6f, 0x20, 0x3c, 0x61, 
+	0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, 0x2f, 0x22, 0x3e, 
+	0x68, 0x65, 0x72, 0x65, 0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69, 
+	0x6e, 0x73, 0x74, 0x65, 0x61, 0x64, 0x2e, 0x3c, 0x2f, 0x68, 
+	0x33, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x2f, 
+	0x63, 0x65, 0x6e, 0x74, 0x65, 0x72, 0x3e, 0xd, 0xa, 0x20, 
+	0x20, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, 0xd, 0xa, 
+	0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0};
+
+static const unsigned char data_index_html[] = {
+	/* /index.html */
+	0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,
+	0x3c, 0x21, 0x44, 0x4f, 0x43, 0x54, 0x59, 0x50, 0x45, 0x20, 
+	0x48, 0x54, 0x4d, 0x4c, 0x20, 0x50, 0x55, 0x42, 0x4c, 0x49, 
+	0x43, 0x20, 0x22, 0x2d, 0x2f, 0x2f, 0x57, 0x33, 0x43, 0x2f, 
+	0x2f, 0x44, 0x54, 0x44, 0x20, 0x48, 0x54, 0x4d, 0x4c, 0x20, 
+	0x34, 0x2e, 0x30, 0x31, 0x20, 0x54, 0x72, 0x61, 0x6e, 0x73, 
+	0x69, 0x74, 0x69, 0x6f, 0x6e, 0x61, 0x6c, 0x2f, 0x2f, 0x45, 
+	0x4e, 0x22, 0x20, 0x22, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 
+	0x2f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x33, 0x2e, 0x6f, 0x72, 
+	0x67, 0x2f, 0x54, 0x52, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x34, 
+	0x2f, 0x6c, 0x6f, 0x6f, 0x73, 0x65, 0x2e, 0x64, 0x74, 0x64, 
+	0x22, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 
+	0xd, 0xa, 0x20, 0x20, 0x3c, 0x68, 0x65, 0x61, 0x64, 0x3e, 
+	0xd, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x74, 0x69, 0x74, 
+	0x6c, 0x65, 0x3e, 0x46, 0x72, 0x65, 0x65, 0x52, 0x54, 0x4f, 
+	0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x75, 0x49, 0x50, 0x20, 
+	0x57, 0x45, 0x42, 0x20, 0x73, 0x65, 0x72, 0x76, 0x65, 0x72, 
+	0x20, 0x64, 0x65, 0x6d, 0x6f, 0x3c, 0x2f, 0x74, 0x69, 0x74, 
+	0x6c, 0x65, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x3c, 0x2f, 0x68, 
+	0x65, 0x61, 0x64, 0x3e, 0xd, 0xa, 0x20, 0x20, 0x3c, 0x42, 
+	0x4f, 0x44, 0x59, 0x20, 0x6f, 0x6e, 0x4c, 0x6f, 0x61, 0x64, 
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+	0x66, 0x61, 0x63, 0x65, 0x3d, 0x22, 0x61, 0x72, 0x69, 0x61, 
+	0x6c, 0x22, 0x3e, 0xd, 0xa, 0x3c, 0x61, 0x20, 0x68, 0x72, 
+	0x65, 0x66, 0x3d, 0x22, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 
+	0x73, 0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, 0x52, 0x54, 0x4f, 
+	0x53, 0x20, 0x53, 0x74, 0x61, 0x74, 0x73, 0x3c, 0x2f, 0x61, 
+	0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, 
+	0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, 
+	0x73, 0x74, 0x61, 0x74, 0x73, 0x2e, 0x73, 0x68, 0x74, 0x6d, 
+	0x6c, 0x22, 0x3e, 0x54, 0x43, 0x50, 0x20, 0x53, 0x74, 0x61, 
+	0x74, 0x73, 0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x3c, 0x62, 0x3e, 
+	0x7c, 0x3c, 0x2f, 0x62, 0x3e, 0x20, 0x3c, 0x61, 0x20, 0x68, 
+	0x72, 0x65, 0x66, 0x3d, 0x22, 0x74, 0x63, 0x70, 0x2e, 0x73, 
+	0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, 0x43, 0x6f, 0x6e, 0x6e, 
+	0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0x3c, 0x2f, 0x61, 
+	0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, 
+	0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, 
+	0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 
+	0x2e, 0x66, 0x72, 0x65, 0x65, 0x72, 0x74, 0x6f, 0x73, 0x2e, 
+	0x6f, 0x72, 0x67, 0x2f, 0x22, 0x3e, 0x46, 0x72, 0x65, 0x65, 
+	0x52, 0x54, 0x4f, 0x53, 0x2e, 0x6f, 0x72, 0x67, 0x20, 0x48, 
+	0x6f, 0x6d, 0x65, 0x70, 0x61, 0x67, 0x65, 0x3c, 0x2f, 0x61, 
+	0x3e, 0x20, 0x3c, 0x62, 0x3e, 0x7c, 0x3c, 0x2f, 0x62, 0x3e, 
+	0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 0x66, 0x3d, 0x22, 
+	0x69, 0x6f, 0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, 0x22, 0x3e, 
+	0x49, 0x4f, 0x3c, 0x2f, 0x61, 0x3e, 0xd, 0xa, 0x3c, 0x62, 
+	0x72, 0x3e, 0x3c, 0x70, 0x3e, 0xd, 0xa, 0x3c, 0x68, 0x72, 
+	0x3e, 0xd, 0xa, 0x3c, 0x62, 0x72, 0x3e, 0xd, 0xa, 0x3c, 
+	0x68, 0x32, 0x3e, 0x4e, 0x65, 0x74, 0x77, 0x6f, 0x72, 0x6b, 
+	0x20, 0x63, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 
+	0x6e, 0x73, 0x3c, 0x2f, 0x68, 0x32, 0x3e, 0xd, 0xa, 0x3c, 
+	0x70, 0x3e, 0xd, 0xa, 0x3c, 0x74, 0x61, 0x62, 0x6c, 0x65, 
+	0x3e, 0xd, 0xa, 0x3c, 0x74, 0x72, 0x3e, 0x3c, 0x74, 0x68, 
+	0x3e, 0x4c, 0x6f, 0x63, 0x61, 0x6c, 0x3c, 0x2f, 0x74, 0x68, 
+	0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x52, 0x65, 0x6d, 0x6f, 0x74, 
+	0x65, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 
+	0x53, 0x74, 0x61, 0x74, 0x65, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 
+	0x3c, 0x74, 0x68, 0x3e, 0x52, 0x65, 0x74, 0x72, 0x61, 0x6e, 
+	0x73, 0x6d, 0x69, 0x73, 0x73, 0x69, 0x6f, 0x6e, 0x73, 0x3c, 
+	0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 0x68, 0x3e, 0x54, 0x69, 
+	0x6d, 0x65, 0x72, 0x3c, 0x2f, 0x74, 0x68, 0x3e, 0x3c, 0x74, 
+	0x68, 0x3e, 0x46, 0x6c, 0x61, 0x67, 0x73, 0x3c, 0x2f, 0x74, 
+	0x68, 0x3e, 0x3c, 0x2f, 0x74, 0x72, 0x3e, 0xd, 0xa, 0x25, 
+	0x21, 0x20, 0x74, 0x63, 0x70, 0x2d, 0x63, 0x6f, 0x6e, 0x6e, 
+	0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0xd, 0xa, 0x3c, 
+	0x2f, 0x70, 0x72, 0x65, 0x3e, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 
+	0x74, 0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x66, 0x6f, 0x6e, 0x74, 
+	0x3e, 0xd, 0xa, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e, 
+	0xd, 0xa, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xd, 
+	0xa, 0xd, 0xa, 0};
+
+const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};
+
+const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};
+
+const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};
+
+const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}};
+
+const struct httpd_fsdata_file file_stats_shtml[] = {{file_io_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};
+
+const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};
+
+#define HTTPD_FS_ROOT file_tcp_shtml
+
+#define HTTPD_FS_NUMFILES 6

Demo/ARM7_LPC2368_Rowley/webserver/httpd-fsdata.h

@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $
+ */
+#ifndef __HTTPD_FSDATA_H__
+#define __HTTPD_FSDATA_H__
+
+#include "uip.h"
+
+struct httpd_fsdata_file {
+  const struct httpd_fsdata_file *next;
+  const char *name;
+  const char *data;
+  const int len;
+#ifdef HTTPD_FS_STATISTICS
+#if HTTPD_FS_STATISTICS == 1
+  u16_t count;
+#endif /* HTTPD_FS_STATISTICS */
+#endif /* HTTPD_FS_STATISTICS */
+};
+
+struct httpd_fsdata_file_noconst {
+  struct httpd_fsdata_file *next;
+  char *name;
+  char *data;
+  int len;
+#ifdef HTTPD_FS_STATISTICS
+#if HTTPD_FS_STATISTICS == 1
+  u16_t count;
+#endif /* HTTPD_FS_STATISTICS */
+#endif /* HTTPD_FS_STATISTICS */
+};
+
+#endif /* __HTTPD_FSDATA_H__ */

Demo/ARM7_LPC2368_Rowley/webserver/httpd.c

@@ -0,0 +1,346 @@
+/**
+ * \addtogroup apps
+ * @{
+ */
+
+/**
+ * \defgroup httpd Web server
+ * @{
+ * The uIP web server is a very simplistic implementation of an HTTP
+ * server. It can serve web pages and files from a read-only ROM
+ * filesystem, and provides a very small scripting language.
+
+ */
+
+/**
+ * \file
+ *         Web server
+ * \author
+ *         Adam Dunkels <adam@sics.se>
+ */
+
+
+/*
+ * Copyright (c) 2004, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $
+ */
+
+#include "uip.h"
+#include "httpd.h"
+#include "httpd-fs.h"
+#include "httpd-cgi.h"
+#include "http-strings.h"
+
+#include <string.h>
+
+#define STATE_WAITING 0
+#define STATE_OUTPUT  1
+
+#define ISO_nl      0x0a
+#define ISO_space   0x20
+#define ISO_bang    0x21
+#define ISO_percent 0x25
+#define ISO_period  0x2e
+#define ISO_slash   0x2f
+#define ISO_colon   0x3a
+
+
+/*---------------------------------------------------------------------------*/
+static unsigned short
+generate_part_of_file(void *state)
+{
+  struct httpd_state *s = (struct httpd_state *)state;
+
+  if(s->file.len > uip_mss()) {
+    s->len = uip_mss();
+  } else {
+    s->len = s->file.len;
+  }
+  memcpy(uip_appdata, s->file.data, s->len);
+  
+  return s->len;
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(send_file(struct httpd_state *s))
+{
+  PSOCK_BEGIN(&s->sout);
+  
+  do {
+    PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);
+    s->file.len -= s->len;
+    s->file.data += s->len;
+  } while(s->file.len > 0);
+      
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(send_part_of_file(struct httpd_state *s))
+{
+  PSOCK_BEGIN(&s->sout);
+
+  PSOCK_SEND(&s->sout, s->file.data, s->len);
+  
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static void
+next_scriptstate(struct httpd_state *s)
+{
+  char *p;
+  p = strchr(s->scriptptr, ISO_nl) + 1;
+  s->scriptlen -= (unsigned short)(p - s->scriptptr);
+  s->scriptptr = p;
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(handle_script(struct httpd_state *s))
+{
+  char *ptr;
+  
+  PT_BEGIN(&s->scriptpt);
+
+
+  while(s->file.len > 0) {
+
+    /* Check if we should start executing a script. */
+    if(*s->file.data == ISO_percent &&
+       *(s->file.data + 1) == ISO_bang) {
+      s->scriptptr = s->file.data + 3;
+      s->scriptlen = s->file.len - 3;
+      if(*(s->scriptptr - 1) == ISO_colon) {
+	httpd_fs_open(s->scriptptr + 1, &s->file);
+	PT_WAIT_THREAD(&s->scriptpt, send_file(s));
+      } else {
+	PT_WAIT_THREAD(&s->scriptpt,
+		       httpd_cgi(s->scriptptr)(s, s->scriptptr));
+      }
+      next_scriptstate(s);
+      
+      /* The script is over, so we reset the pointers and continue
+	 sending the rest of the file. */
+      s->file.data = s->scriptptr;
+      s->file.len = s->scriptlen;
+    } else {
+      /* See if we find the start of script marker in the block of HTML
+	 to be sent. */
+
+      if(s->file.len > uip_mss()) {
+	s->len = uip_mss();
+      } else {
+	s->len = s->file.len;
+      }
+
+      if(*s->file.data == ISO_percent) {
+	ptr = strchr(s->file.data + 1, ISO_percent);
+      } else {
+	ptr = strchr(s->file.data, ISO_percent);
+      }
+      if(ptr != NULL &&
+	 ptr != s->file.data) {
+	s->len = (int)(ptr - s->file.data);
+	if(s->len >= uip_mss()) {
+	  s->len = uip_mss();
+	}
+      }
+      PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));
+      s->file.data += s->len;
+      s->file.len -= s->len;
+      
+    }
+  }
+  
+  PT_END(&s->scriptpt);
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))
+{
+  char *ptr;
+
+  PSOCK_BEGIN(&s->sout);
+
+  PSOCK_SEND_STR(&s->sout, statushdr);
+
+  ptr = strrchr(s->filename, ISO_period);
+  if(ptr == NULL) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_binary);
+  } else if(strncmp(http_html, ptr, 5) == 0 ||
+	    strncmp(http_shtml, ptr, 6) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_html);
+  } else if(strncmp(http_css, ptr, 4) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_css);
+  } else if(strncmp(http_png, ptr, 4) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_png);
+  } else if(strncmp(http_gif, ptr, 4) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_gif);
+  } else if(strncmp(http_jpg, ptr, 4) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_jpg);
+  } else {
+    PSOCK_SEND_STR(&s->sout, http_content_type_plain);
+  }
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(handle_output(struct httpd_state *s))
+{
+  char *ptr;
+  
+  PT_BEGIN(&s->outputpt);
+ 
+  if(!httpd_fs_open(s->filename, &s->file)) {
+    httpd_fs_open(http_404_html, &s->file);
+    strcpy(s->filename, http_404_html);
+    PT_WAIT_THREAD(&s->outputpt,
+		   send_headers(s,
+		   http_header_404));
+    PT_WAIT_THREAD(&s->outputpt,
+		   send_file(s));
+  } else {
+    PT_WAIT_THREAD(&s->outputpt,
+		   send_headers(s,
+		   http_header_200));
+    ptr = strchr(s->filename, ISO_period);
+    if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {
+      PT_INIT(&s->scriptpt);
+      PT_WAIT_THREAD(&s->outputpt, handle_script(s));
+    } else {
+      PT_WAIT_THREAD(&s->outputpt,
+		     send_file(s));
+    }
+  }
+  PSOCK_CLOSE(&s->sout);
+  PT_END(&s->outputpt);
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(handle_input(struct httpd_state *s))
+{
+  PSOCK_BEGIN(&s->sin);
+
+  PSOCK_READTO(&s->sin, ISO_space);
+
+  
+  if(strncmp(s->inputbuf, http_get, 4) != 0) {
+    PSOCK_CLOSE_EXIT(&s->sin);
+  }
+  PSOCK_READTO(&s->sin, ISO_space);
+
+  if(s->inputbuf[0] != ISO_slash) {
+    PSOCK_CLOSE_EXIT(&s->sin);
+  }
+
+  if(s->inputbuf[1] == ISO_space) {
+    strncpy(s->filename, http_index_html, sizeof(s->filename));
+  } else {
+
+    s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;
+
+    /* Process any form input being sent to the server. */
+    {
+        extern void vApplicationProcessFormInput( char *pcInputString, long xInputLength );
+        vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );
+    }
+
+    strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));
+  }
+
+  /*  httpd_log_file(uip_conn->ripaddr, s->filename);*/
+  
+  s->state = STATE_OUTPUT;
+
+  while(1) {
+    PSOCK_READTO(&s->sin, ISO_nl);
+
+    if(strncmp(s->inputbuf, http_referer, 8) == 0) {
+      s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;
+      /*      httpd_log(&s->inputbuf[9]);*/
+    }
+  }
+  
+  PSOCK_END(&s->sin);
+}
+/*---------------------------------------------------------------------------*/
+static void
+handle_connection(struct httpd_state *s)
+{
+  handle_input(s);
+  if(s->state == STATE_OUTPUT) {
+    handle_output(s);
+  }
+}
+/*---------------------------------------------------------------------------*/
+void
+httpd_appcall(void)
+{
+  struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);
+
+  if(uip_closed() || uip_aborted() || uip_timedout()) {
+  } else if(uip_connected()) {
+    PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);
+    PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);
+    PT_INIT(&s->outputpt);
+    s->state = STATE_WAITING;
+    /*    timer_set(&s->timer, CLOCK_SECOND * 100);*/
+    s->timer = 0;
+    handle_connection(s);
+  } else if(s != NULL) {
+    if(uip_poll()) {
+      ++s->timer;
+      if(s->timer >= 20) {
+	uip_abort();
+      }
+    } else {
+      s->timer = 0;
+    }
+    handle_connection(s);
+  } else {
+    uip_abort();
+  }
+}
+/*---------------------------------------------------------------------------*/
+/**
+ * \brief      Initialize the web server
+ *
+ *             This function initializes the web server and should be
+ *             called at system boot-up.
+ */
+void
+httpd_init(void)
+{
+  uip_listen(HTONS(80));
+}
+/*---------------------------------------------------------------------------*/
+/** @} */

Demo/ARM7_LPC2368_Rowley/webserver/httpd.h

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2001-2005, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack.
+ *
+ * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $
+ *
+ */
+
+#ifndef __HTTPD_H__
+#define __HTTPD_H__
+
+#include "psock.h"
+#include "httpd-fs.h"
+
+struct httpd_state {
+  unsigned char timer;
+  struct psock sin, sout;
+  struct pt outputpt, scriptpt;
+  char inputbuf[50];
+  char filename[20];
+  char state;
+  struct httpd_fs_file file;
+  int len;
+  char *scriptptr;
+  int scriptlen;
+  
+  unsigned short count;
+};
+
+void httpd_init(void);
+void httpd_appcall(void);
+
+void httpd_log(char *msg);
+void httpd_log_file(u16_t *requester, char *file);
+
+#endif /* __HTTPD_H__ */

Demo/ARM7_LPC2368_Rowley/webserver/makefsdata

@@ -0,0 +1,78 @@
+#!/usr/bin/perl
+
+open(OUTPUT, "> httpd-fsdata.c");
+
+chdir("httpd-fs");
+
+opendir(DIR, ".");
+@files =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
+closedir(DIR);
+
+foreach $file (@files) {  
+   
+    if(-d $file && $file !~ /^\./) {
+	print "Processing directory $file\n";
+	opendir(DIR, $file);
+	@newfiles =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
+	closedir(DIR);
+	printf "Adding files @newfiles\n";
+	@files = (@files, map { $_ = "$file/$_" } @newfiles);
+	next;
+    }
+}
+
+foreach $file (@files) {
+    if(-f $file) {
+	
+	print "Adding file $file\n";
+	
+	open(FILE, $file) || die "Could not open file $file\n";
+
+	$file =~ s-^-/-;
+	$fvar = $file;
+	$fvar =~ s-/-_-g;
+	$fvar =~ s-\.-_-g;
+	# for AVR, add PROGMEM here
+	print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");
+	print(OUTPUT "\t/* $file */\n\t");
+	for($j = 0; $j < length($file); $j++) {
+	    printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));
+	}
+	printf(OUTPUT "0,\n");
+	
+	
+	$i = 0;        
+	while(read(FILE, $data, 1)) {
+	    if($i == 0) {
+		print(OUTPUT "\t");
+	    }
+	    printf(OUTPUT "%#02x, ", unpack("C", $data));
+	    $i++;
+	    if($i == 10) {
+		print(OUTPUT "\n");
+		$i = 0;
+	    }
+	}
+	print(OUTPUT "0};\n\n");
+	close(FILE);
+	push(@fvars, $fvar);
+	push(@pfiles, $file);
+    }
+}
+
+for($i = 0; $i < @fvars; $i++) {
+    $file = $pfiles[$i];
+    $fvar = $fvars[$i];
+
+    if($i == 0) {
+        $prevfile = "NULL";
+    } else {
+        $prevfile = "file" . $fvars[$i - 1];
+    }
+    print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");
+    print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");
+    print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");
+}
+
+print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");
+print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");

Demo/ARM7_LPC2368_Rowley/webserver/makestrings

@@ -0,0 +1,40 @@
+#!/usr/bin/perl
+
+
+sub stringify {
+  my $name = shift(@_);
+  open(OUTPUTC, "> $name.c");
+  open(OUTPUTH, "> $name.h");
+  
+  open(FILE, "$name");
+  
+  while(<FILE>) {
+    if(/(.+) "(.+)"/) {
+      $var = $1;
+      $data = $2;
+      
+      $datan = $data;
+      $datan =~ s/\\r/\r/g;
+      $datan =~ s/\\n/\n/g;
+      $datan =~ s/\\01/\01/g;      
+      $datan =~ s/\\0/\0/g;
+      
+      printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1);
+      printf(OUTPUTC "/* \"$data\" */\n");
+      printf(OUTPUTC "{");
+      for($j = 0; $j < length($datan); $j++) {
+	printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1)));
+      }
+      printf(OUTPUTC "};\n");
+      
+      printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1);
+      
+    }
+  }
+  close(OUTPUTC);
+  close(OUTPUTH);
+}
+stringify("http-strings");
+
+exit 0;
+

Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c

@@ -0,0 +1,318 @@
+/*
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license
+	and contact details.  Please ensure to read the configuration and relevant
+	port sections of the online documentation.
+	***************************************************************************
+*/
+/* Standard includes. */
+#include <string.h>
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+/* uip includes. */
+#include "uip.h"
+#include "uip_arp.h"
+#include "httpd.h"
+#include "timer.h"
+#include "clock-arch.h"
+
+/* Demo includes. */
+#include "emac.h"
+#include "partest.h"
+
+/*-----------------------------------------------------------*/
+
+/* MAC address configuration. */
+#define uipMAC_ADDR0	0x00
+#define uipMAC_ADDR1	0x12
+#define uipMAC_ADDR2	0x13
+#define uipMAC_ADDR3	0x10
+#define uipMAC_ADDR4	0x15
+#define uipMAC_ADDR5	0x11
+
+/* IP address configuration. */
+#define uipIP_ADDR0		172
+#define uipIP_ADDR1		25
+#define uipIP_ADDR2		218
+#define uipIP_ADDR3		10	
+
+/* How long to wait before attempting to connect the MAC again. */
+#define uipINIT_WAIT    100
+
+/* Shortcut to the header within the Rx buffer. */
+#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])
+
+/* Standard constant. */
+#define uipTOTAL_FRAME_HEADER_SIZE	54
+
+/*-----------------------------------------------------------*/
+
+/* 
+ * Send the uIP buffer to the MAC. 
+ */
+static void prvENET_Send(void);
+
+/*
+ * Setup the MAC address in the MAC itself, and in the uIP stack.
+ */
+static void prvSetMACAddress( void );
+
+/*
+ * Port functions required by the uIP stack.
+ */
+void clock_init( void );
+clock_time_t clock_time( void );
+
+/*-----------------------------------------------------------*/
+
+/* The semaphore used by the ISR to wake the uIP task. */
+extern xSemaphoreHandle xEMACSemaphore;
+
+/*-----------------------------------------------------------*/
+
+void clock_init(void)
+{
+	/* This is done when the scheduler starts. */
+}
+/*-----------------------------------------------------------*/
+
+clock_time_t clock_time( void )
+{
+	return xTaskGetTickCount();
+}
+/*-----------------------------------------------------------*/
+
+void vuIP_Task( void *pvParameters )
+{
+portBASE_TYPE i;
+uip_ipaddr_t xIPAddr;
+struct timer periodic_timer, arp_timer;
+extern void ( vEMAC_ISR )( void );
+
+	/* Create the semaphore used by the ISR to wake this task. */
+	vSemaphoreCreateBinary( xEMACSemaphore );
+	
+	/* Initialise the uIP stack. */
+	timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );
+	timer_set( &arp_timer, configTICK_RATE_HZ * 10 );
+	uip_init();
+	uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );
+	uip_sethostaddr( xIPAddr );
+	httpd_init();
+
+	/* Initialise the MAC. */
+	while( Init_EMAC() != pdPASS )
+    {
+        vTaskDelay( uipINIT_WAIT );
+    }
+
+	portENTER_CRITICAL();
+	{
+        IntEnable = INT_RX_DONE;
+        VICIntEnable |= 0x00200000;
+        VICVectAddr21 = ( portLONG ) vEMAC_ISR;
+		prvSetMACAddress();
+	}
+	portEXIT_CRITICAL();
+	
+
+	for( ;; )
+	{
+		/* Is there received data ready to be processed? */
+		uip_len = uiGetEMACRxData( uip_buf );
+		
+		if( uip_len > 0 )
+		{
+			/* Standard uIP loop taken from the uIP manual. */
+			if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
+			{
+				uip_arp_ipin();
+				uip_input();
+
+				/* If the above function invocation resulted in data that 
+				should be sent out on the network, the global variable 
+				uip_len is set to a value > 0. */
+				if( uip_len > 0 )
+				{
+					uip_arp_out();
+					prvENET_Send();
+				}
+			}
+			else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
+			{
+				uip_arp_arpin();
+
+				/* If the above function invocation resulted in data that 
+				should be sent out on the network, the global variable 
+				uip_len is set to a value > 0. */
+				if( uip_len > 0 )
+				{
+					prvENET_Send();
+				}
+			}
+		}
+		else
+		{
+			if( timer_expired( &periodic_timer ) )
+			{
+				timer_reset( &periodic_timer );
+				for( i = 0; i < UIP_CONNS; i++ )
+				{
+					uip_periodic( i );
+	
+					/* If the above function invocation resulted in data that 
+					should be sent out on the network, the global variable 
+					uip_len is set to a value > 0. */
+					if( uip_len > 0 )
+					{
+						uip_arp_out();
+						prvENET_Send();
+					}
+				}	
+	
+				/* Call the ARP timer function every 10 seconds. */
+				if( timer_expired( &arp_timer ) )
+				{
+					timer_reset( &arp_timer );
+					uip_arp_timer();
+				}
+			}
+			else
+			{			
+				/* We did not receive a packet, and there was no periodic
+				processing to perform.  Block for a fixed period.  If a packet
+				is received during this period we will be woken by the ISR
+				giving us the Semaphore. */
+				xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 );			
+			}
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvENET_Send(void)
+{
+    RequestSend();
+
+    /* Copy the header into the Tx buffer. */
+    CopyToFrame_EMAC( uip_buf, uipTOTAL_FRAME_HEADER_SIZE );
+    if( uip_len > uipTOTAL_FRAME_HEADER_SIZE )
+    {
+        CopyToFrame_EMAC( uip_appdata, ( uip_len - uipTOTAL_FRAME_HEADER_SIZE ) );
+    }
+
+    DoSend_EMAC( uip_len );
+}
+/*-----------------------------------------------------------*/
+
+static void prvSetMACAddress( void )
+{
+struct uip_eth_addr xAddr;
+
+	/* Configure the MAC address in the uIP stack. */
+	xAddr.addr[ 0 ] = uipMAC_ADDR0;
+	xAddr.addr[ 1 ] = uipMAC_ADDR1;
+	xAddr.addr[ 2 ] = uipMAC_ADDR2;
+	xAddr.addr[ 3 ] = uipMAC_ADDR3;
+	xAddr.addr[ 4 ] = uipMAC_ADDR4;
+	xAddr.addr[ 5 ] = uipMAC_ADDR5;
+	uip_setethaddr( xAddr );
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationProcessFormInput( portCHAR *pcInputString, portBASE_TYPE xInputLength )
+{
+char *c, *pcText;
+static portCHAR cMessageForDisplay[ 32 ];
+extern xQueueHandle xLCDQueue;
+xLCDMessage xLCDMessage;
+
+	/* Process the form input sent by the IO page of the served HTML. */
+
+	c = strstr( pcInputString, "?" );
+    if( c )
+    {
+		/* Turn LED's on or off in accordance with the check box status. */
+		if( strstr( c, "LED0=1" ) != NULL )
+		{
+			vParTestSetLED( 5, 0 );
+		}
+		else
+		{
+			vParTestSetLED( 5, 1 );
+		}		
+		
+		if( strstr( c, "LED1=1" ) != NULL )
+		{
+			vParTestSetLED( 6, 0 );
+		}
+		else
+		{
+			vParTestSetLED( 6, 1 );
+		}		
+
+		if( strstr( c, "LED2=1" ) != NULL )
+		{
+			vParTestSetLED( 7, 0 );
+		}
+		else
+		{
+			vParTestSetLED( 7, 1 );
+		}
+
+		/* Find the start of the text to be displayed on the LCD. */
+        pcText = strstr( c, "LCD=" );
+        pcText += strlen( "LCD=" );
+
+        /* Terminate the file name for further processing within uIP. */
+        *c = 0x00;
+
+        /* Terminate the LCD string. */
+        c = strstr( pcText, " " );
+        if( c != NULL )
+        {
+            *c = 0x00;
+        }
+
+        /* Add required spaces. */
+        while( ( c = strstr( pcText, "+" ) ) != NULL )
+        {
+            *c = ' ';
+        }
+    
+        /* Write the message to the LCD. */
+		strcpy( cMessageForDisplay, pcText );
+		xLCDMessage.xColumn = 0;
+		xLCDMessage.pcMessage = cMessageForDisplay;
+        xQueueSend( xLCDQueue, &xLCDMessage, portMAX_DELAY );
+    }
+}
+

Demo/ARM7_LPC2368_Rowley/webserver/uip-conf.h

@@ -0,0 +1,157 @@
+/**
+ * \addtogroup uipopt
+ * @{
+ */
+
+/**
+ * \name Project-specific configuration options
+ * @{
+ *
+ * uIP has a number of configuration options that can be overridden
+ * for each project. These are kept in a project-specific uip-conf.h
+ * file and all configuration names have the prefix UIP_CONF.
+ */
+
+/*
+ * Copyright (c) 2006, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack
+ *
+ * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $
+ */
+
+/**
+ * \file
+ *         An example uIP configuration file
+ * \author
+ *         Adam Dunkels <adam@sics.se>
+ */
+
+#ifndef __UIP_CONF_H__
+#define __UIP_CONF_H__
+
+#include <stdint.h>
+
+/**
+ * 8 bit datatype
+ *
+ * This typedef defines the 8-bit type used throughout uIP.
+ *
+ * \hideinitializer
+ */
+typedef uint8_t u8_t;
+
+/**
+ * 16 bit datatype
+ *
+ * This typedef defines the 16-bit type used throughout uIP.
+ *
+ * \hideinitializer
+ */
+typedef uint16_t u16_t;
+
+/**
+ * Statistics datatype
+ *
+ * This typedef defines the dataype used for keeping statistics in
+ * uIP.
+ *
+ * \hideinitializer
+ */
+typedef unsigned short uip_stats_t;
+
+/**
+ * Maximum number of TCP connections.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_MAX_CONNECTIONS 40
+
+/**
+ * Maximum number of listening TCP ports.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_MAX_LISTENPORTS 40
+
+/**
+ * uIP buffer size.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_BUFFER_SIZE     1480
+
+/**
+ * CPU byte order.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_BYTE_ORDER      LITTLE_ENDIAN
+
+/**
+ * Logging on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_LOGGING         0
+
+/**
+ * UDP support on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_UDP             0
+
+/**
+ * UDP checksums on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_UDP_CHECKSUMS   1
+
+/**
+ * uIP statistics on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_STATISTICS      1
+
+/* Here we include the header file for the application(s) we use in
+   our project. */
+/*#include "smtp.h"*/
+/*#include "hello-world.h"*/
+/*#include "telnetd.h"*/
+#include "webserver.h"
+/*#include "dhcpc.h"*/
+/*#include "resolv.h"*/
+/*#include "webclient.h"*/
+
+#endif /* __UIP_CONF_H__ */
+
+/** @} */
+/** @} */

Demo/ARM7_LPC2368_Rowley/webserver/webserver.h

@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2002, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack
+ *
+ * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $
+ *
+ */
+#ifndef __WEBSERVER_H__
+#define __WEBSERVER_H__
+
+#include "httpd.h"
+
+typedef struct httpd_state uip_tcp_appstate_t;
+/* UIP_APPCALL: the name of the application function. This function
+   must return void and take no arguments (i.e., C type "void
+   appfunc(void)"). */
+#ifndef UIP_APPCALL
+#define UIP_APPCALL     httpd_appcall
+#endif
+
+
+#endif /* __WEBSERVER_H__ */

Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_STR71x_IAR/ParTest/ParTest.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_STR71x_IAR/main.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_STR71x_IAR/serial/serial.c

@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
@@ -27,6 +27,9 @@
 	See http://www.FreeRTOS.org for documentation, latest information, license
 	and contact details.  Please ensure to read the configuration and relevant
 	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
 	***************************************************************************
 */
 

Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h

@@ -0,0 +1,80 @@
+/*
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license
+	and contact details.  Please ensure to read the configuration and relevant
+	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
+	***************************************************************************
+*/
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+#include <75x_lib.h>
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *----------------------------------------------------------*/
+
+#define configUSE_PREEMPTION		1
+#define configUSE_IDLE_HOOK			0
+#define configUSE_TICK_HOOK			0
+#define configCPU_CLOCK_HZ			( ( unsigned portLONG ) 60000000 ) /* Timer clock. */
+#define configTICK_RATE_HZ			( ( portTickType ) 1000 )
+#define configMAX_PRIORITIES		( ( unsigned portBASE_TYPE ) 5 )
+#define configMINIMAL_STACK_SIZE	( ( unsigned portSHORT ) 100 )
+#define configTOTAL_HEAP_SIZE		( ( size_t ) 12800 )
+#define configMAX_TASK_NAME_LEN		( 16 )
+#define configUSE_TRACE_FACILITY	0
+#define configUSE_16_BIT_TICKS		0
+#define configIDLE_SHOULD_YIELD		0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 		0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+
+#define INCLUDE_vTaskPrioritySet		1
+#define INCLUDE_uxTaskPriorityGet		1
+#define INCLUDE_vTaskDelete				0
+#define INCLUDE_vTaskCleanUpResources	0
+#define INCLUDE_vTaskSuspend			1
+#define INCLUDE_vTaskDelayUntil			1
+#define INCLUDE_vTaskDelay				1
+
+
+#endif /* FREERTOS_CONFIG_H */

Demo/ARM7_STR75x_GCC/ParTest/ParTest.c

@@ -0,0 +1,140 @@
+/*
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
+
+	This file is part of the FreeRTOS.org distribution.
+
+	FreeRTOS.org is free software; you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation; either version 2 of the License, or
+	(at your option) any later version.
+
+	FreeRTOS.org is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with FreeRTOS.org; if not, write to the Free Software
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	A special exception to the GPL can be applied should you wish to distribute
+	a combined work that includes FreeRTOS.org, without being obliged to provide
+	the source code for any proprietary components.  See the licensing section
+	of http://www.FreeRTOS.org for full details of how and when the exception
+	can be applied.
+
+	***************************************************************************
+	See http://www.FreeRTOS.org for documentation, latest information, license
+	and contact details.  Please ensure to read the configuration and relevant
+	port sections of the online documentation.
+
+	Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
+	with commercial development and support options.
+	***************************************************************************
+*/
+
+/* Library includes. */
+#include "75x_GPIO.h"
+#include "75x_map.h"
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+
+/* Demo application includes. */
+#include "partest.h"
+
+/*-----------------------------------------------------------
+ * Simple parallel port IO routines for the LED's 
+ *-----------------------------------------------------------*/
+
+#define partstNUM_LEDS	4
+
+typedef struct GPIOMAP
+{
+	GPIO_TypeDef	*pxPort;
+	unsigned portLONG ulPin;
+	unsigned portLONG ulValue;
+} GPIO_MAP;
+
+static GPIO_MAP xLEDMap[ partstNUM_LEDS ] =
+{
+	{ ( GPIO_TypeDef	* )GPIO1_BASE, GPIO_Pin_1, 0UL },
+	{ ( GPIO_TypeDef	* )GPIO0_BASE, GPIO_Pin_16, 0UL },
+	{ ( GPIO_TypeDef	* )GPIO2_BASE, GPIO_Pin_18, 0UL },	
+	{ ( GPIO_TypeDef	* )GPIO2_BASE, GPIO_Pin_19, 0UL }	
+};
+
+/*-----------------------------------------------------------*/
+
+void vParTestInitialise( void )
+{	
+GPIO_InitTypeDef GPIO_InitStructure ;
+
+    /* Configure the bits used to flash LED's on port 1 as output. */
+
+	/* Configure LED3 */
+	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_16;
+	GPIO_Init(GPIO0,&GPIO_InitStructure);
+
+	/* Configure LED2 */
+	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
+	GPIO_Init(GPIO1, &GPIO_InitStructure);
+
+	/* Configure LED4 and LED5 */
+	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_18 | GPIO_Pin_19;
+	GPIO_Init(GPIO2, &GPIO_InitStructure);
+
+	vParTestSetLED( 0, 0 );
+	vParTestSetLED( 1, 0 );
+	vParTestSetLED( 2, 0 );
+	vParTestSetLED( 3, 0 );
+}
+/*-----------------------------------------------------------*/
+
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
+{
+	if( uxLED < partstNUM_LEDS )
+	{
+		portENTER_CRITICAL();
+		{
+			if( xValue )
+			{
+				GPIO_WriteBit( xLEDMap[ uxLED ].pxPort, xLEDMap[ uxLED ].ulPin, Bit_RESET );
+				xLEDMap[ uxLED ].ulValue = 0;
+			}
+			else
+			{
+				GPIO_WriteBit( xLEDMap[ uxLED ].pxPort, xLEDMap[ uxLED ].ulPin, Bit_SET );
+				xLEDMap[ uxLED ].ulValue = 1;			
+			}
+		}
+		portEXIT_CRITICAL();
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
+{
+	if( uxLED < partstNUM_LEDS )
+	{
+		portENTER_CRITICAL();
+		{
+			if( xLEDMap[ uxLED ].ulValue == 1 )
+			{
+				GPIO_WriteBit( xLEDMap[ uxLED ].pxPort, xLEDMap[ uxLED ].ulPin, Bit_RESET );
+				xLEDMap[ uxLED ].ulValue = 0;
+			}
+			else
+			{
+				GPIO_WriteBit( xLEDMap[ uxLED ].pxPort, xLEDMap[ uxLED ].ulPin, Bit_SET );
+				xLEDMap[ uxLED ].ulValue = 1;			
+			}
+		}
+		portEXIT_CRITICAL();
+	}
+}
+
+
+
+

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_adc.h

@@ -0,0 +1,177 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_adc.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006  
+* Description        : This file contains all the functions prototypes for the
+*                      ADC software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1 
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_ADC_H
+#define __75x_ADC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* ADC Init structure definition */
+typedef struct
+{
+  u16 ADC_ConversionMode;
+  u16 ADC_ExtTrigger;
+  u16 ADC_AutoClockOff;
+  u8  ADC_SamplingPrescaler;
+  u8  ADC_ConversionPrescaler;
+  u8  ADC_FirstChannel;
+  u8  ADC_ChannelNumber;
+ }ADC_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* ADC control status flags */
+#define ADC_FLAG_ECH                            0x0001
+#define ADC_FLAG_EOC                            0x0002
+#define ADC_FLAG_JECH                           0x0004
+#define ADC_FLAG_JEOC                           0x0008
+#define ADC_FLAG_AnalogWatchdog0_LowThreshold   0x0010
+#define ADC_FLAG_AnalogWatchdog0_HighThreshold  0x0020
+#define ADC_FLAG_AnalogWatchdog1_LowThreshold   0x0040
+#define ADC_FLAG_AnalogWatchdog1_HighThreshold  0x0080
+#define ADC_FLAG_AnalogWatchdog2_LowThreshold   0x0100
+#define ADC_FLAG_AnalogWatchdog2_HighThreshold  0x0200
+#define ADC_FLAG_AnalogWatchdog3_LowThreshold   0x0400
+#define ADC_FLAG_AnalogWatchdog3_HighThreshold  0x0800
+
+/* ADC Interrupt sources */
+#define ADC_IT_ECH                            0x0001
+#define ADC_IT_EOC                            0x0002
+#define ADC_IT_JECH                           0x0004
+#define ADC_IT_JEOC                           0x0008
+#define ADC_IT_AnalogWatchdog0_LowThreshold   0x0010
+#define ADC_IT_AnalogWatchdog0_HighThreshold  0x0020
+#define ADC_IT_AnalogWatchdog1_LowThreshold   0x0040
+#define ADC_IT_AnalogWatchdog1_HighThreshold  0x0080
+#define ADC_IT_AnalogWatchdog2_LowThreshold   0x0100
+#define ADC_IT_AnalogWatchdog2_HighThreshold  0x0200
+#define ADC_IT_AnalogWatchdog3_LowThreshold   0x0400
+#define ADC_IT_AnalogWatchdog3_HighThreshold  0x0800
+#define ADC_IT_ALL                            0x0FFF
+
+/* ADC Watchdogs Thresholds */
+#define ADC_AnalogWatchdog0   0x0030
+#define ADC_AnalogWatchdog1   0x00C0
+#define ADC_AnalogWatchdog2   0x0300
+#define ADC_AnalogWatchdog3   0x0C00
+
+/* ADC Channels */
+#define ADC_CHANNEL0   0x0
+#define ADC_CHANNEL1   0x1
+#define ADC_CHANNEL2   0x2
+#define ADC_CHANNEL3   0x3
+#define ADC_CHANNEL4   0x4
+#define ADC_CHANNEL5   0x5
+#define ADC_CHANNEL6   0x6
+#define ADC_CHANNEL7   0x7
+#define ADC_CHANNEL8   0x8
+#define ADC_CHANNEL9   0x9
+#define ADC_CHANNEL10  0xA
+#define ADC_CHANNEL11  0xB
+#define ADC_CHANNEL12  0xC
+#define ADC_CHANNEL13  0xD
+#define ADC_CHANNEL14  0xE
+#define ADC_CHANNEL15  0xF
+
+/* ADC DMA Channels */
+#define ADC_DMA_CHANNEL0   0x0001
+#define ADC_DMA_CHANNEL1   0x0002
+#define ADC_DMA_CHANNEL2   0x0004
+#define ADC_DMA_CHANNEL3   0x0008
+#define ADC_DMA_CHANNEL4   0x0010
+#define ADC_DMA_CHANNEL5   0x0020
+#define ADC_DMA_CHANNEL6   0x0040
+#define ADC_DMA_CHANNEL7   0x0080
+#define ADC_DMA_CHANNEL8   0x0100
+#define ADC_DMA_CHANNEL9   0x0200
+#define ADC_DMA_CHANNEL10  0x0400
+#define ADC_DMA_CHANNEL11  0x0800
+#define ADC_DMA_CHANNEL12  0x1000
+#define ADC_DMA_CHANNEL13  0x2000
+#define ADC_DMA_CHANNEL14  0x4000
+#define ADC_DMA_CHANNEL15  0x8000
+
+/* Trigger conversion detection */
+#define ADC_ExtTrigger_LowLevel    0x4FFF
+#define ADC_ExtTrigger_HighLevel   0x5000
+#define ADC_ExtTrigger_FallingEdge 0x6000
+#define ADC_ExtTrigger_RisingEdge  0x7000
+#define ADC_ExtTrigger_Disable     0x8FFF
+
+/* DMA enable config */
+#define ADC_DMA_ExtTrigger_HighLevel  0x6000
+#define ADC_DMA_ExtTrigger_LowLevel   0x4FFF
+#define ADC_DMA_Enable                0x8000
+#define ADC_DMA_Disable               0x3FFF
+
+/* Injected Trigger conversion detection */
+#define ADC_Injec_ExtTrigger_RisingEdge  0x6000
+#define ADC_Injec_ExtTrigger_FallingEdge 0xDFFF
+#define ADC_Injec_ExtTrigger_Disable     0x3FFF
+
+/* Start Conversion */
+#define ADC_Conversion_Start   0x0001
+#define ADC_Conversion_Stop    0xFFFE
+
+/* ADC Conversion Modes */
+#define ADC_ConversionMode_Scan     0x8000
+#define ADC_ConversionMode_OneShot  0x7FFF
+
+/* Auto Clock Off */
+#define ADC_AutoClockOff_Enable  0x4000
+#define ADC_AutoClockOff_Disable 0xBFFF
+
+/* Calibration */
+#define ADC_Calibration_ON       0x0002
+#define ADC_CalibAverage_Disable 0x0020
+#define ADC_CalibAverage_Enable  0xFFDF
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+void ADC_DeInit(void);
+void ADC_Init(ADC_InitTypeDef *ADC_InitStruct);
+void ADC_StructInit(ADC_InitTypeDef *ADC_InitStruct);
+void ADC_Cmd(FunctionalState NewState);
+void ADC_StartCalibration(u16 ADC_CalibAverage);
+FlagStatus ADC_GetCalibrationStatus(void);
+void ADC_ConversionCmd(u16 ADC_Conversion);
+FlagStatus ADC_GetSTARTBitStatus(void);
+void ADC_AutoClockOffConfig(FunctionalState NewState);
+u16 ADC_GetConversionValue(u8 ADC_CHANNEL);
+void ADC_ITConfig(u16 ADC_IT, FunctionalState NewState);
+void ADC_AnalogWatchdogConfig(u16 ADC_AnalogWatchdog, u8 ADC_CHANNEL, 
+                              u16 LowThreshold, u16 HighThreshold);
+void ADC_AnalogWatchdogCmd(u16 ADC_AnalogWatchdog, FunctionalState NewState);
+u16 ADC_GetAnalogWatchdogResult(u16 ADC_AnalogWatchdog);
+void ADC_StartInjectedConversion(void);
+void ADC_InjectedConversionConfig(u16 ADC_Injec_ExtTrigger, u8 FirstChannel, u8 ChannelNumber);
+void ADC_DMAConfig(u16 ADC_DMA_CHANNEL, FunctionalState NewState);
+void ADC_DMACmd(u16 ADC_DMA);
+u16 ADC_GetDMAFirstEnabledChannel(void);
+FlagStatus ADC_GetFlagStatus(u16 ADC_FLAG);
+void ADC_ClearFlag(u16 ADC_FLAG);
+ITStatus ADC_GetITStatus(u16 ADC_IT);
+void ADC_ClearITPendingBit(u16 ADC_IT);
+
+#endif /*__75x_ADC_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_can.h

@@ -0,0 +1,165 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_can.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      CAN bus software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_CAN_H
+#define __75x_CAN_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+
+/* CAN Init structure define */
+typedef struct
+{
+  u8  CAN_ConfigParameters;
+  u32 CAN_Bitrate;
+}CAN_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* Standard bitrates available*/
+enum
+{
+  CAN_BITRATE_100K,
+  CAN_BITRATE_125K,
+  CAN_BITRATE_250K,
+  CAN_BITRATE_500K,
+  CAN_BITRATE_1M
+};
+
+/* Control register*/
+#define CAN_CR_TEST            0x0080
+#define CAN_CR_CCE             0x0040
+#define CAN_CR_DAR             0x0020
+#define CAN_CR_EIE             0x0008
+#define CAN_CR_SIE             0x0004
+#define CAN_CR_IE              0x0002
+#define CAN_CR_INIT            0x0001
+
+/* Status register */
+#define CAN_SR_BOFF            0x0080
+#define CAN_SR_EWARN           0x0040
+#define CAN_SR_EPASS           0x0020
+#define CAN_SR_RXOK            0x0010
+#define CAN_SR_TXOK            0x0008
+#define CAN_SR_LEC             0x0007
+
+/* Test register*/
+#define CAN_TESTR_RX           0x0080
+#define CAN_TESTR_TX1          0x0040
+#define CAN_TESTR_TX0          0x0020
+#define CAN_TESTR_LBACK        0x0010
+#define CAN_TESTR_SILENT       0x0008
+#define CAN_TESTR_BASIC        0x0004
+
+/* IFn / Command Request register*/
+#define CAN_CRR_BUSY           0x8000
+
+/* IFn / Command Mask register*/
+#define CAN_CMR_WRRD           0x0080
+#define CAN_CMR_MASK           0x0040
+#define CAN_CMR_ARB            0x0020
+#define CAN_CMR_CONTROL        0x0010
+#define CAN_CMR_CLRINTPND      0x0008
+#define CAN_CMR_TXRQSTNEWDAT   0x0004
+#define CAN_CMR_DATAA          0x0002
+#define CAN_CMR_DATAB          0x0001
+
+/* IFn / Mask 2 register*/
+#define CAN_M2R_MXTD           0x8000
+#define CAN_M2R_MDIR           0x4000
+
+/* IFn / Arbitration 2 register*/
+#define CAN_A2R_MSGVAL         0x8000
+#define CAN_A2R_XTD            0x4000
+#define CAN_A2R_DIR            0x2000
+
+/* IFn / Message Control register*/
+#define CAN_MCR_NEWDAT         0x8000
+#define CAN_MCR_MSGLST         0x4000
+#define CAN_MCR_INTPND         0x2000
+#define CAN_MCR_UMASK          0x1000
+#define CAN_MCR_TXIE           0x0800
+#define CAN_MCR_RXIE           0x0400
+#define CAN_MCR_RMTEN          0x0200
+#define CAN_MCR_TXRQST         0x0100
+#define CAN_MCR_EOB            0x0080
+
+
+/* Wake-up modes*/
+enum
+{
+  CAN_WAKEUP_ON_EXT,
+  CAN_WAKEUP_ON_CAN
+};
+
+
+/* CAN message structure*/
+typedef struct
+{
+  u32 IdType;
+  u32 Id;
+  u8 Dlc;
+  u8 Data[8];
+} canmsg;
+
+/* Message ID types*/
+enum
+{
+  CAN_STD_ID,
+  CAN_EXT_ID
+};
+
+/* Message ID limits*/
+
+#define CAN_LAST_STD_ID	((1<<11) - 1)
+#define CAN_LAST_EXT_ID	((1L<<29) - 1)
+
+/* Exported functions ------------------------------------------------------- */
+
+void CAN_Init (CAN_InitTypeDef *CAN_InitStruct);
+void CAN_DeInit (void);
+void CAN_StructInit(CAN_InitTypeDef *CAN_InitStruct);
+void CAN_SetBitrate(u32 bitrate);
+void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp);
+ErrorStatus CAN_SetUnusedMsgObj(u32 msgobj);
+ErrorStatus CAN_SetTxMsgObj(u32 msgobj, u32 idType);
+ErrorStatus CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast);
+void CAN_InvalidateAllMsgObj(void);
+ErrorStatus CAN_ReleaseMessage(u32 msgobj);
+ErrorStatus CAN_SendMessage(u32 msgobj, canmsg* pCanMsg);
+ErrorStatus CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg);
+ErrorStatus CAN_WaitEndOfTx(void);
+ErrorStatus CAN_BasicSendMessage(canmsg* pCanMsg);
+ErrorStatus CAN_BasicReceiveMessage(canmsg* pCanMsg);
+void CAN_EnterTestMode(u8 TestMask);
+void CAN_EnterInitMode(u8 InitMask);
+void CAN_LeaveInitMode(void);
+void CAN_LeaveTestMode(void);
+void CAN_ReleaseTxMessage(u32 msgobj);
+void CAN_ReleaseRxMessage(u32 msgobj);
+u32 CAN_IsMessageWaiting(u32 msgobj);
+u32 CAN_IsTransmitRequested(u32 msgobj);
+u32 CAN_IsInterruptPending(u32 msgobj);
+u32 CAN_IsObjectValid(u32 msgobj);
+
+#endif /* __75x_CAN_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_cfg.h

@@ -0,0 +1,48 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_cfg.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      CFG software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_CFG_H
+#define __75x_CFG_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+#define CFG_BootSpace_FLASH     0x00000000
+#define CFG_BootSpace_SRAM      0x00000002
+#define CFG_BootSpace_ExtSMI    0x00000003
+
+#define CFG_FLASHBurst_Disable    0xFFFFFEFF
+#define CFG_FLASHBurst_Enable     0x00000100
+
+#define CFG_USBFilter_Disable    0xFFFFFDFF
+#define CFG_USBFilter_Enable     0x00000200
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void CFG_BootSpaceConfig(u32 CFG_BootSpace);
+void CFG_FLASHBurstConfig(u32 CFG_FLASHBurst);
+void CFG_USBFilterConfig(u32 CFG_USBFilter);
+FlagStatus CFG_GetFlagStatus(void);
+
+#endif /* __75x_CFG_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_conf.h

@@ -0,0 +1,106 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_conf.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : Library configuration file.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_CONF_H
+#define __75x_CONF_H
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Comment the line below to compile the library in release mode */
+//#define DEBUG
+
+/************************************* SMI ************************************/
+//#define _SMI
+
+/************************************* CFG ************************************/
+#define _CFG
+
+/************************************* MRCC ************************************/
+#define _MRCC
+
+/************************************* ADC ************************************/
+//#define _ADC
+
+/************************************* TB *************************************/
+#define _TB
+
+/************************************* TIM ************************************/
+#define _TIM
+#define _TIM0
+#define _TIM1
+#define _TIM2
+
+/************************************* PWM ************************************/
+#define _PWM
+
+/************************************* WDG ************************************/
+#define _WDG
+
+/************************************* SSP ************************************/
+//#define _SSP
+//#define _SSP0
+//#define _SSP1
+
+/************************************* CAN ************************************/
+//#define _CAN
+
+/************************************* I2C ************************************/
+//#define _I2C
+
+/************************************* UART ***********************************/
+#define _UART
+#define _UART0
+#define _UART1
+#define _UART2
+
+/************************************* GPIO ***********************************/
+#define _GPIO
+#define _GPIO0
+#define _GPIO1
+#define _GPIO2
+#define _GPIOREMAP
+
+/************************************* DMA ************************************/
+//#define _DMA
+//#define _DMA_Stream0
+//#define _DMA_Stream1
+//#define _DMA_Stream2
+//#define _DMA_Stream3
+
+/************************************* RTC ************************************/
+//#define _RTC
+
+/************************************* EXTIT **********************************/
+#define _EXTIT
+
+/************************************* EIC ************************************/
+#define _EIC
+
+/* Comment the following line, depending on the external Quartz oscillator used
+   in your application */
+#define Main_Oscillator    4000000   /* 4 MHz Quartz oscillator used */
+//#define Main_Oscillator    8000000   /* 8 MHz Quartz oscillator used */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+#endif /* __75x_CONF_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_dma.h

@@ -0,0 +1,140 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_dma.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006 
+* Description        : This file contains all the functions prototypes for the
+*                      DMA software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1 
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion ------------------------------------ */
+#ifndef __75x_DMA_H
+#define __75x_DMA_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* DMA Init structure definition */
+typedef struct
+{
+  u32 DMA_SRCBaseAddr;
+  u32 DMA_DSTBaseAddr;	
+  u16 DMA_BufferSize;	
+  u16 DMA_SRC;   
+  u16 DMA_DST; 
+  u16 DMA_SRCSize;
+  u16 DMA_SRCBurst;
+  u16 DMA_DSTSize;
+  u16 DMA_Mode;  
+  u16 DMA_M2M; 
+  u16 DMA_DIR; 
+}DMA_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* DMA interrupt Mask */
+#define DMA_IT_SI0    0x0001
+#define DMA_IT_SI1    0x0002
+#define DMA_IT_SI2    0x0004
+#define DMA_IT_SI3    0x0008
+#define DMA_IT_SE0    0x0010
+#define DMA_IT_SE1    0x0020
+#define DMA_IT_SE2    0x0040
+#define DMA_IT_SE3    0x0080
+#define DMA_IT_ALL    0x00FF
+
+/* DMA Flags */
+#define DMA_FLAG_SI0     0x0001
+#define DMA_FLAG_SI1     0x0002
+#define DMA_FLAG_SI2     0x0004
+#define DMA_FLAG_SI3     0x0008
+#define DMA_FLAG_SE0     0x0010
+#define DMA_FLAG_SE1     0x0020
+#define DMA_FLAG_SE2     0x0040
+#define DMA_FLAG_SE3     0x0080
+#define DMA_FLAG_ACT0    0x0100
+#define DMA_FLAG_ACT1    0x0200
+#define DMA_FLAG_ACT2    0x0400
+#define DMA_FLAG_ACT3    0x0800
+
+/* DMA Increment Current Source Register */
+#define DMA_SRC_INCR        0x0002
+#define DMA_SRC_NOT_INCR    0xFFFD
+
+/* DMA Increment Current Destination Register */
+#define DMA_DST_INCR        0x0004
+#define DMA_DST_NOT_INCR    0xFFFB
+
+/* Source to DMA data width */
+#define DMA_SRCSize_Byte        0x0000
+#define DMA_SRCSize_HalfWord    0x0008
+#define DMA_SRCSize_Word        0x0010
+
+/* DMA source burst size */
+#define DMA_SRCBurst_1Data     0x0000
+#define DMA_SRCBurst_4Data     0x0020
+#define DMA_SRCBurst_8Data     0x0040
+#define DMA_SRCBurst_16Data    0x0060
+
+/* DMA destination data width */
+#define DMA_DSTSize_Byte        0x0000
+#define DMA_DSTSize_HalfWord    0x0080
+#define DMA_DSTSize_Word        0x0100
+
+/* DMA mode */
+#define DMA_Mode_Circular    0x0200
+#define DMA_Mode_Normal      0xFDFF
+
+/* Memory to Memory Transfer */
+#define DMA_M2M_Enable     0x0800
+#define DMA_M2M_Disable    0xF7FF
+
+/* Direction Transfer */
+#define DMA_DIR_PeriphDST    0x2000
+#define DMA_DIR_PeriphSRC    0xDFFF
+
+/* DMA streamx Registers */
+#define DMA_SOURCEL   0x00000000  /* source base address low register */
+#define DMA_SOURCEH   0x00000004  /* source base address high register */
+#define DMA_DESTL     0x00000008  /* destination base address low register */
+#define DMA_DESTH     0x0000000C  /* destination base address high register */
+#define DMA_MAX       0x00000010  /* Maximum count register */
+#define DMA_CTRL      0x00000014  /* Control register */
+#define DMA_SOCURRH   0x00000018  /* Current Source address high register */
+#define DMA_SOCURRL   0x0000001C  /* Current Source address low register */
+#define DMA_DECURRH   0x00000020  /* Current Destination address high register */
+#define DMA_DECURRL   0x00000024  /* Current Destination address low register */
+#define DMA_TCNT      0x00000028  /* Terminal Counter Register */
+#define DMA_LUBUFF    0x0000002C  /* Last Used Buffer location */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void DMA_DeInit(DMA_Stream_TypeDef* DMA_Streamx);
+void DMA_Init(DMA_Stream_TypeDef* DMA_Streamx, DMA_InitTypeDef* DMA_InitStruct);
+void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct);
+void DMA_Cmd(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState);
+void DMA_ITConfig(u16 DMA_IT, FunctionalState NewState);
+u32 DMA_GetCurrDSTAddr(DMA_Stream_TypeDef* DMA_Streamx);
+u32 DMA_GetCurrSRCAddr(DMA_Stream_TypeDef* DMA_Streamx);
+u16 DMA_GetTerminalCounter(DMA_Stream_TypeDef* DMA_Streamx);
+void DMA_LastBufferSweepConfig(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState);
+void DMA_LastBufferAddrConfig(DMA_Stream_TypeDef* DMA_Streamx, u16 DMA_LastBufferAddr);
+FlagStatus DMA_GetFlagStatus(u16 DMA_FLAG);
+void DMA_ClearFlag(u16 DMA_FLAG);
+ITStatus DMA_GetITStatus(u16 DMA_IT);
+void DMA_ClearITPendingBit(u16 DMA_IT);
+
+#endif /* __75x_DMA_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_eic.h

@@ -0,0 +1,97 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_eic.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      EIC software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_EIC_H
+#define __75x_EIC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+typedef struct
+{
+  u8 EIC_IRQChannel;
+  u8 EIC_IRQChannelPriority;
+  FunctionalState EIC_IRQChannelCmd;
+}EIC_IRQInitTypeDef;
+
+typedef struct
+{
+  u8 EIC_FIQChannel;
+  FunctionalState EIC_FIQChannelCmd;
+}EIC_FIQInitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* IRQ channels */
+#define WAKUP_IRQChannel        0
+#define TIM2_OC2_IRQChannel     1
+#define TIM2_OC1_IRQChannel     2
+#define TIM2_IC12_IRQChannel    3
+#define TIM2_UP_IRQChannel      4
+#define TIM1_OC2_IRQChannel     5
+#define TIM1_OC1_IRQChannel     6
+#define TIM1_IC12_IRQChannel    7
+#define TIM1_UP_IRQChannel      8
+#define TIM0_OC2_IRQChannel     9
+#define TIM0_OC1_IRQChannel     10
+#define TIM0_IC12_IRQChannel    11
+#define TIM0_UP_IRQChannel      12
+#define PWM_OC123_IRQChannel    13
+#define PWM_EM_IRQChannel       14
+#define PWM_UP_IRQChannel       15
+#define I2C_IRQChannel          16
+#define SSP1_IRQChannel         17
+#define SSP0_IRQChannel         18
+#define UART2_IRQChannel        19
+#define UART1_IRQChannel        20
+#define UART0_IRQChannel        21
+#define CAN_IRQChannel          22
+#define USB_LP_IRQChannel       23
+#define USB_HP_IRQChannel       24
+#define ADC_IRQChannel          25
+#define DMA_IRQChannel          26
+#define EXTIT_IRQChannel        27
+#define MRCC_IRQChannel         28
+#define FLASHSMI_IRQChannel     29
+#define RTC_IRQChannel          30
+#define TB_IRQChannel           31
+
+/* FIQ channels */
+#define EXTIT_Line0_FIQChannel    0x00000001
+#define WATCHDOG_FIQChannel       0x00000002
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void EIC_DeInit(void);
+void EIC_IRQInit(EIC_IRQInitTypeDef* EIC_IRQInitStruct);
+void EIC_FIQInit(EIC_FIQInitTypeDef* EIC_FIQInitStruct);
+void EIC_IRQStructInit(EIC_IRQInitTypeDef* EIC_IRQInitStruct);
+void EIC_FIQStructInit(EIC_FIQInitTypeDef* EIC_FIQInitStruct);
+void EIC_IRQCmd(FunctionalState NewState);
+void EIC_FIQCmd(FunctionalState NewState);
+u8 EIC_GetCurrentIRQChannel(void);
+u8 EIC_GetCurrentIRQChannelPriority(void);
+void EIC_CurrentIRQPriorityConfig(u8 NewPriority);
+u8 EIC_GetCurrentFIQChannel(void);
+void EIC_ClearFIQPendingBit(u8 EIC_FIQChannel);
+
+#endif /* __75x_EIC_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_extit.h

@@ -0,0 +1,77 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_extit.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      EXTIT software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_EXTIT_H
+#define __75x_EXTIT_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* EXTIT Trigger enumeration */
+typedef enum
+{
+  EXTIT_ITTrigger_Falling = 1,
+  EXTIT_ITTrigger_Rising
+}EXTITTrigger_TypeDef;
+
+/* EXTIT Init Structure definition */
+typedef struct
+{
+  u32 EXTIT_ITLine;
+  EXTITTrigger_TypeDef EXTIT_ITTrigger;
+  FunctionalState EXTIT_ITLineCmd;
+}EXTIT_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* EXTIT Lines */
+#define EXTIT_ITLineNone    0x0000  /* No interrupt selected */
+#define EXTIT_ITLine0       0x0001  /* External interrupt line 0 */
+#define EXTIT_ITLine1       0x0002  /* External interrupt line 1 */
+#define EXTIT_ITLine2       0x0004  /* External interrupt line 2 */
+#define EXTIT_ITLine3       0x0008  /* External interrupt line 3 */
+#define EXTIT_ITLine4       0x0010  /* External interrupt line 4 */
+#define EXTIT_ITLine5       0x0020  /* External interrupt line 5 */
+#define EXTIT_ITLine6       0x0040  /* External interrupt line 6 */
+#define EXTIT_ITLine7       0x0080  /* External interrupt line 7 */
+#define EXTIT_ITLine8       0x0100  /* External interrupt line 8 */
+#define EXTIT_ITLine9       0x0200  /* External interrupt line 9 */
+#define EXTIT_ITLine10      0x0400  /* External interrupt line 10 */
+#define EXTIT_ITLine11      0x0800  /* External interrupt line 11 */
+#define EXTIT_ITLine12      0x1000  /* External interrupt line 12 */
+#define EXTIT_ITLine13      0x2000  /* External interrupt line 13 */
+#define EXTIT_ITLine14      0x4000  /* External interrupt line 14 */
+#define EXTIT_ITLine15      0x8000  /* External interrupt line 15 */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void EXTIT_DeInit(void);
+void EXTIT_Init(EXTIT_InitTypeDef* EXTIT_InitStruct);
+void EXTIT_StructInit(EXTIT_InitTypeDef* EXTIT_InitStruct);
+void EXTIT_GenerateSWInterrupt(u16 EXTIT_ITLine);
+FlagStatus EXTIT_GetFlagStatus(u16 EXTIT_ITLine);
+void EXTIT_ClearFlag(u16 EXTIT_ITLine);
+ITStatus EXTIT_GetITStatus(u16 EXTIT_ITLine);
+void EXTIT_ClearITPendingBit(u16 EXTIT_ITLine);
+
+#endif /* __75x_EXTIT_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_gpio.h

@@ -0,0 +1,120 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_gpio.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      GPIO software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_GPIO_H
+#define __75x_GPIO_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Configuration Mode enumeration */
+typedef enum
+{ GPIO_Mode_AIN = 1,
+  GPIO_Mode_IN_FLOATING,
+  GPIO_Mode_IPD,
+  GPIO_Mode_IPU,
+  GPIO_Mode_Out_OD,
+  GPIO_Mode_Out_PP,
+  GPIO_Mode_AF_OD,
+  GPIO_Mode_AF_PP
+}GPIOMode_TypeDef;
+
+/* GPIO Init structure definition */
+typedef struct
+{
+  u32 GPIO_Pin;
+  GPIOMode_TypeDef GPIO_Mode;
+}GPIO_InitTypeDef;
+
+/* Bit_SET and Bit_RESET enumeration */
+typedef enum
+{ Bit_RESET = 0,
+  Bit_SET
+}BitAction;
+
+
+/* Exported constants --------------------------------------------------------*/
+/* GPIO pins define */
+#define GPIO_Pin_None        0x00000000  /* No pin selected */
+#define GPIO_Pin_0           0x00000001  /* Pin 0 selected */
+#define GPIO_Pin_1           0x00000002  /* Pin 1 selected */
+#define GPIO_Pin_2           0x00000004  /* Pin 2 selected */
+#define GPIO_Pin_3           0x00000008  /* Pin 3 selected */
+#define GPIO_Pin_4           0x00000010  /* Pin 4 selected */
+#define GPIO_Pin_5           0x00000020  /* Pin 5 selected */
+#define GPIO_Pin_6           0x00000040  /* Pin 6 selected */
+#define GPIO_Pin_7           0x00000080  /* Pin 7 selected */
+#define GPIO_Pin_8           0x00000100  /* Pin 8 selected */
+#define GPIO_Pin_9           0x00000200  /* Pin 9 selected */
+#define GPIO_Pin_10          0x00000400  /* Pin 10 selected */
+#define GPIO_Pin_11          0x00000800  /* Pin 11 selected */
+#define GPIO_Pin_12          0x00001000  /* Pin 12 selected */
+#define GPIO_Pin_13          0x00002000  /* Pin 13 selected */
+#define GPIO_Pin_14          0x00004000  /* Pin 14 selected */
+#define GPIO_Pin_15          0x00008000  /* Pin 15 selected */
+#define GPIO_Pin_16          0x00010000  /* Pin 16 selected */
+#define GPIO_Pin_17          0x00020000  /* Pin 17 selected */
+#define GPIO_Pin_18          0x00040000  /* Pin 18 selected */
+#define GPIO_Pin_19          0x00080000  /* Pin 19 selected */
+#define GPIO_Pin_20          0x00100000  /* Pin 20 selected */
+#define GPIO_Pin_21          0x00200000  /* Pin 21 selected */
+#define GPIO_Pin_22          0x00400000  /* Pin 22 selected */
+#define GPIO_Pin_23          0x00800000  /* Pin 23 selected */
+#define GPIO_Pin_24          0x01000000  /* Pin 24 selected */
+#define GPIO_Pin_25          0x02000000  /* Pin 25 selected */
+#define GPIO_Pin_26          0x04000000  /* Pin 26 selected */
+#define GPIO_Pin_27          0x08000000  /* Pin 27 selected */
+#define GPIO_Pin_28          0x10000000  /* Pin 28 selected */
+#define GPIO_Pin_29          0x20000000  /* Pin 29 selected */
+#define GPIO_Pin_30          0x40000000  /* Pin 30 selected */
+#define GPIO_Pin_31          0x80000000  /* Pin 31 selected */
+#define GPIO_Pin_All         0xFFFFFFFF  /* All pins selected */
+
+/* GPIO Remap define */
+#define GPIO_Remap_SMI_CS3_EN  0x23 /* SMI CS3 Enable */
+#define GPIO_Remap_SMI_CS2_EN  0x22 /* SMI CS2 Enable */
+#define GPIO_Remap_SMI_CS1_EN  0x21 /* SMI CS1 Enable */
+#define GPIO_Remap_SMI_EN      0x20 /* SMI Enable */
+#define GPIO_Remap_DBGOFF      0x45 /* JTAG Disable */
+#define GPIO_Remap_UART1       0x44 /* UART1 Alternate Function mapping */
+#define GPIO_Remap_UART2       0x43 /* UART2 Alternate Function mapping */
+#define GPIO_Remap_SSP1        0x42 /* SSP1 Alternate Function mapping */
+#define GPIO_Remap_TIM2        0x41 /* TIM2 Alternate Function mapping */
+#define GPIO_Remap_TIM0        0x40 /* TIM0 Alternate Function mapping */
+
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void GPIO_DeInit(GPIO_TypeDef* GPIOx);
+void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
+void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
+u32  GPIO_Read(GPIO_TypeDef* GPIOx);
+u8   GPIO_ReadBit(GPIO_TypeDef* GPIOx, u32 GPIO_Pin);
+void GPIO_Write(GPIO_TypeDef* GPIOx, u32 PortVal);
+void GPIO_WriteBit(GPIO_TypeDef* GPIOx,u32 GPIO_Pin, BitAction BitVal);
+void GPIO_PinMaskConfig(GPIO_TypeDef* GPIOx, u32 GPIO_Pin, FunctionalState NewState);
+u32  GPIO_GetPortMask(GPIO_TypeDef* GPIOx);
+void GPIO_PinRemapConfig(u16 GPIO_Remap, FunctionalState NewState);
+
+#endif /* __75x_GPIO_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_i2c.h

@@ -0,0 +1,115 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_i2c.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006 
+* Description        : This file contains all the functions prototypes for the
+*                      I2C software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion ------------------------------------ */
+#ifndef __75x_I2C_H
+#define __75x_I2C_H
+
+/* Includes ----------------------------------------------------------------- */
+#include "75x_map.h"
+
+/* Exported types ----------------------------------------------------------- */
+/* I2C Init structure definition */
+typedef struct
+{
+   u32 I2C_CLKSpeed;
+   u16 I2C_OwnAddress;
+   u8  I2C_GeneralCall;
+   u8  I2C_Ack;
+}I2C_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* General Call */
+#define  I2C_GeneralCall_Enable      0x10
+#define  I2C_GeneralCall_Disable     0xEF
+
+/* Acknowledgement */
+#define  I2C_Ack_Enable      0x04
+#define  I2C_Ack_Disable     0xFB
+
+/* I2C Flags */
+#define  I2C_FLAG_SB      0x0001
+#define  I2C_FLAG_M_SL    0x0002
+#define  I2C_FLAG_ADSL    0x0004
+#define  I2C_FLAG_BTF     0x0008
+#define  I2C_FLAG_BUSY    0x0010
+#define  I2C_FLAG_TRA     0x0020
+#define  I2C_FLAG_ADD10   0x0040
+#define  I2C_FLAG_EVF     0x0080
+#define  I2C_FLAG_GCAL    0x0100
+#define  I2C_FLAG_BERR    0x0200
+#define  I2C_FLAG_ARLO    0x0400
+#define  I2C_FLAG_STOPF   0x0800
+#define  I2C_FLAG_AF      0x1000
+#define  I2C_FLAG_ENDAD   0x2000
+#define  I2C_FLAG_ACK     0x4000
+
+/* I2C Events */
+#define  I2C_EVENT_SLAVE_ADDRESS_MATCHED   ( I2C_FLAG_EVF | I2C_FLAG_BUSY  |I2C_FLAG_ADSL)    
+#define  I2C_EVENT_SLAVE_BYTE_RECEIVED     ( I2C_FLAG_EVF | I2C_FLAG_BUSY  | I2C_FLAG_BTF )     
+#define  I2C_EVENT_SLAVE_BYTE_TRANSMITTED  ( I2C_FLAG_EVF | I2C_FLAG_BUSY  | I2C_FLAG_BTF  | I2C_FLAG_TRA ) 
+#define  I2C_EVENT_MASTER_MODE_SELECT      ( I2C_FLAG_EVF | I2C_FLAG_BUSY  | I2C_FLAG_M_SL | I2C_FLAG_SB )                 
+#define  I2C_EVENT_MASTER_MODE_SELECTED    ( I2C_FLAG_EVF | I2C_FLAG_BUSY  | I2C_FLAG_M_SL | I2C_FLAG_ENDAD )    
+#define  I2C_EVENT_MASTER_BYTE_RECEIVED    ( I2C_FLAG_EVF | I2C_FLAG_BUSY  | I2C_FLAG_M_SL | I2C_FLAG_BTF )                
+#define  I2C_EVENT_MASTER_BYTE_TRANSMITTED ( I2C_FLAG_EVF | I2C_FLAG_BUSY  | I2C_FLAG_M_SL | I2C_FLAG_BTF | I2C_FLAG_TRA )  
+#define  I2C_EVENT_MASTER_MODE_ADDRESS10   ( I2C_FLAG_EVF | I2C_FLAG_BUSY  | I2C_FLAG_M_SL |I2C_FLAG_ADD10 )               
+#define  I2C_EVENT_SLAVE_STOP_DETECTED       I2C_FLAG_STOPF                                  
+#define  I2C_EVENT_SLAVE_ACK_FAILURE       ( I2C_FLAG_EVF | I2C_FLAG_BUSY | I2C_FLAG_BTF  | I2C_FLAG_TRA | I2C_FLAG_AF)    
+
+#define  I2C_BUS_ERROR_DETECTED       I2C_FLAG_BERR
+#define  I2C_ARBITRATION_LOST         I2C_FLAG_ARLO
+#define  I2C_SLAVE_GENERAL_CALL       (I2C_FLAG_BUSY | I2C_FLAG_GCAL)
+
+/* Master/Receiver Mode */ 
+#define  I2C_MODE_TRANSMITTER          0x00
+#define  I2C_MODE_RECEIVER             0x01
+
+/* I2C Registers offset */
+#define  I2C_CR     0x00
+#define  I2C_SR1    0x04
+#define  I2C_SR2    0x08
+#define  I2C_CCR    0x0C
+#define  I2C_OAR1   0x10
+#define  I2C_OAR2   0x14
+#define  I2C_DR     0x18
+#define  I2C_ECCR   0x1C
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void I2C_DeInit(void);
+void I2C_Init(I2C_InitTypeDef* I2C_InitStruct);
+void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
+void I2C_Cmd(FunctionalState NewState);
+void I2C_GenerateSTART(FunctionalState NewState);
+void I2C_GenerateSTOP(FunctionalState NewState);
+void I2C_AcknowledgeConfig(FunctionalState NewState);
+void I2C_ITConfig(FunctionalState NewState);
+u16 I2C_GetLastEvent(void);
+ErrorStatus I2C_CheckEvent(u16 I2C_EVENT);
+void I2C_SendData(u8 Data);
+u8 I2C_ReceiveData(void);
+void I2C_Send7bitAddress(u8 Address, u8 Direction);
+u8 I2C_ReadRegister(u8 I2C_Register);
+FlagStatus I2C_GetFlagStatus(u16 I2C_FLAG);
+void I2C_ClearFlag(u16 I2C_FLAG, ...);
+
+#endif /* __75x_I2C_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_lib.h

@@ -0,0 +1,103 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_lib.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file includes the peripherals header files in the
+*                      user application.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_LIB_H
+#define __75x_LIB_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+#ifdef _SMI
+  #include "75x_smi.h"
+#endif /*_SMI */
+
+#ifdef _CFG
+  #include "75x_cfg.h"
+#endif /*_CFG*/
+
+#ifdef _MRCC
+  #include "75x_mrcc.h"
+#endif /*_MRCC */
+
+#ifdef _ADC
+  #include "75x_adc.h"
+#endif /*_ADC */
+
+#ifdef _TB
+  #include "75x_tb.h"
+#endif /*_TB */
+
+#ifdef _TIM
+  #include "75x_tim.h"
+#endif /*_TIM */
+
+#ifdef _PWM
+  #include "75x_pwm.h"
+#endif /*_PWM */
+
+#ifdef _WDG
+  #include "75x_wdg.h"
+#endif /*_WDG */
+
+#ifdef _SSP
+  #include "75x_ssp.h"
+#endif /*_SSP */
+
+#ifdef _CAN
+  #include "75x_can.h"
+#endif /*_CAN */
+
+#ifdef _I2C
+  #include "75x_i2c.h"
+#endif /*_I2C */
+
+#ifdef _UART
+  #include "75x_uart.h"
+#endif /*_UART */
+
+#ifdef _GPIO
+  #include "75x_gpio.h"
+#endif /*_GPIO */
+
+#ifdef _DMA
+  #include "75x_dma.h"
+#endif /*_DMA */
+
+#ifdef _RTC
+  #include "75x_rtc.h"
+#endif /*_RTC */
+
+#ifdef _EXTIT
+  #include "75x_extit.h"
+#endif /*_EXTIT */
+
+#ifdef _EIC
+  #include "75x_eic.h"
+#endif /*_EIC */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void debug(void);
+
+#endif /* __75x_LIB_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_map.h

@@ -0,0 +1,697 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_map.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the peripheral register's definitions
+*                      and memory mapping.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_MAP_H
+#define __75x_MAP_H
+
+#ifndef EXT
+  #define EXT extern
+#endif /* EXT */
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_conf.h"
+#include "75x_type.h"
+
+/* Exported types ------------------------------------------------------------*/
+/******************************************************************************/
+/*                          IP registers structures               	      */
+/******************************************************************************/
+
+/*------------------------ Analog to Digital Converter -----------------------*/
+typedef struct
+{
+  vu16 CLR0;
+  u16  EMPTY1;
+  vu16 CLR1;
+  u16  EMPTY2;
+  vu16 CLR2;
+  u16  EMPTY3;
+  vu16 CLR3;
+  u16  EMPTY4;
+  vu16 CLR4;
+  u16  EMPTY5;
+  vu16 TRA0;
+  u16  EMPTY6;
+  vu16 TRA1;
+  u16  EMPTY7;
+  vu16 TRA2;
+  u16  EMPTY8;
+  vu16 TRA3;
+  u16  EMPTY9;
+  vu16 TRB0;
+  u16  EMPTY10;
+  vu16 TRB1;
+  u16  EMPTY11;
+  vu16 TRB2;
+  u16  EMPTY12;
+  vu16 TRB3;
+  u16  EMPTY13;
+  vu16 DMAR;
+  u16  EMPTY14[7];
+  vu16 DMAE;
+  u16  EMPTY15 ;
+  vu16 PBR;
+  u16  EMPTY16;
+  vu16 IMR;
+  u16  EMPTY17;
+  vu16 D0;
+  u16  EMPTY18;
+  vu16 D1;
+  u16  EMPTY19;
+  vu16 D2;
+  u16  EMPTY20;
+  vu16 D3;
+  u16  EMPTY21;
+  vu16 D4;
+  u16  EMPTY22;
+  vu16 D5;
+  u16  EMPTY23;
+  vu16 D6;
+  u16  EMPTY24;
+  vu16 D7;
+  u16  EMPTY25;
+  vu16 D8;
+  u16  EMPTY26;
+  vu16 D9;
+  u16  EMPTY27;
+  vu16 D10;
+  u16  EMPTY28;
+  vu16 D11;
+  u16  EMPTY29;
+  vu16 D12;
+  u16  EMPTY30;
+  vu16 D13;
+  u16  EMPTY31;
+  vu16 D14;
+  u16  EMPTY32;
+  vu16 D15;
+  u16  EMPTY33;
+} ADC_TypeDef;
+
+/*------------------------ Controller Area Network ---------------------------*/
+typedef struct
+{
+  vu16 CRR;			
+  u16  EMPTY1;
+  vu16 CMR;			
+  u16  EMPTY2;
+  vu16 M1R;			
+  u16  EMPTY3;
+  vu16 M2R;			
+  u16  EMPTY4;
+  vu16 A1R;			
+  u16  EMPTY5;
+  vu16 A2R;			
+  u16  EMPTY6;
+  vu16 MCR;			
+  u16  EMPTY7;
+  vu16 DA1R;		
+  u16  EMPTY8;
+  vu16 DA2R;		
+  u16  EMPTY9;
+  vu16 DB1R;		
+  u16  EMPTY10;
+  vu16 DB2R;		
+  u16  EMPTY11[27];
+} CAN_MsgObj_TypeDef;
+
+typedef struct
+{
+  vu16 CR;			
+  u16  EMPTY1;
+  vu16 SR;			
+  u16  EMPTY2;
+  vu16 ERR;			
+  u16  EMPTY3;
+  vu16 BTR;			
+  u16  EMPTY4;
+  vu16 IDR;			
+  u16  EMPTY5;
+  vu16 TESTR;		
+  u16  EMPTY6;
+  vu16 BRPR;		
+  u16  EMPTY7[3];
+  CAN_MsgObj_TypeDef sMsgObj[2];
+  u16  EMPTY8[16];
+  vu16 TXR1R;		
+  u16  EMPTY9;
+  vu16 TXR2R;		
+  u16  EMPTY10[13];
+  vu16 ND1R;		
+  u16  EMPTY11;
+  vu16 ND2R;		
+  u16  EMPTY12[13];
+  vu16 IP1R;		
+  u16  EMPTY13;
+  vu16 IP2R;		
+  u16  EMPTY14[13];
+  vu16 MV1R;		
+  u16  EMPTY15;
+  vu16 MV2R;		
+  u16  EMPTY16;
+} CAN_TypeDef;
+
+/*--------------------------- Configuration Register -------------------------*/
+typedef struct
+{
+  vu32 GLCONF;
+} CFG_TypeDef;
+
+/*-------------------------------- DMA Controller ----------------------------*/
+typedef struct
+{
+  vu16  SOURCEL;
+  u16   EMPTY1;
+  vu16  SOURCEH;
+  u16   EMPTY2;
+  vu16  DESTL;
+  u16   EMPTY3;
+  vu16  DESTH;
+  u16   EMPTY4;
+  vu16  MAX;
+  u16   EMPTY5;
+  vu16  CTRL;
+  u16   EMPTY6;
+  vuc16 SOCURRH;
+  u16   EMPTY7;
+  vuc16 SOCURRL;
+  u16   EMPTY8;
+  vuc16 DECURRH;
+  u16   EMPTY9;
+  vuc16 DECURRL;
+  u16   EMPTY10;
+  vuc16 TCNT;
+  u16   EMPTY11;
+  vu16  LUBUFF;
+  u16   EMPTY12;
+} DMA_Stream_TypeDef;
+
+typedef struct
+{
+  vu16 MASK;
+  u16  EMPTY4;
+  vu16 CLR;
+  u16  EMPTY5;
+  vuc16 STATUS;
+  u16  EMPTY6;
+  vu16 LAST;       
+  u16  EMPTY7;
+} DMA_TypeDef;
+
+/*----------------------- Enhanced Interrupt Controller ----------------------*/
+typedef struct
+{
+  vu32 ICR; 
+  vuc32 CICR;   
+  vu32 CIPR;
+  u32  EMPTY1;
+  vu32 FIER;
+  vu32 FIPR;
+  vu32 IVR;
+  vu32 FIR;
+  vu32 IER;
+  u32  EMPTY2[7];
+  vu32 IPR;
+  u32  EMPTY3[7];
+  vu32 SIRn[32];
+} EIC_TypeDef;
+
+/*------------------------- External Interrupt Controller --------------------*/
+typedef struct
+{
+  vu32 MR;
+  vu32 TSR;
+  vu32 SWIR;
+  vu32 PR;
+} EXTIT_TypeDef;
+
+/*-------------------------- General Purpose IO ports ------------------------*/
+typedef struct
+{
+  vu32 PC0;
+  vu32 PC1;
+  vu32 PC2;
+  vu32 PD;
+  vu32 PM;
+} GPIO_TypeDef;
+
+typedef struct
+{
+  vu32 REMAP0R;
+  vu32 REMAP1R;
+} GPIOREMAP_TypeDef;
+
+/*--------------------------------- I2C interface ----------------------------*/
+typedef struct
+{
+  vu8 CR; 
+  u8  EMPTY1[3];
+  vu8 SR1;
+  u8  EMPTY2[3];
+  vu8 SR2;
+  u8  EMPTY3[3];
+  vu8 CCR;
+  u8  EMPTY4[3];
+  vu8 OAR1;
+  u8  EMPTY5[3];
+  vu8 OAR2;
+  u8  EMPTY6[3];
+  vu8 DR;
+  u8  EMPTY7[3];
+  vu8 ECCR;
+  u8  EMPTY8[3];
+} I2C_TypeDef;
+
+/*---------------------------- Power, Reset and Clocks -----------------------*/
+typedef  struct
+{
+  vu32 CLKCTL;
+  vu32 RFSR;
+  vu32 PWRCTRL;
+  u32  EMPTY1;
+  vu32 PCLKEN;
+  vu32 PSWRES;
+  u32  EMPTY2[2];
+  vu32 BKP0;
+  vu32 BKP1;
+} MRCC_TypeDef;
+
+/*-------------------------------- Real Time Clock ---------------------------*/
+typedef struct
+{
+  vu16 CRH;
+  u16  EMPTY;
+  vu16 CRL;
+  u16  EMPTY1;
+  vu16 PRLH;
+  u16  EMPTY2;
+  vu16 PRLL;
+  u16  EMPTY3;
+  vu16 DIVH;
+  u16  EMPTY4;
+  vu16 DIVL;
+  u16  EMPTY5;
+  vu16 CNTH;
+  u16  EMPTY6;
+  vu16 CNTL;
+  u16  EMPTY7;
+  vu16 ALRH;
+  u16  EMPTY8;
+  vu16 ALRL;
+  u16  EMPTY9;
+} RTC_TypeDef;
+
+/*---------------------------- Serial Memory Interface -----------------------*/
+typedef struct
+{
+  vu32 CR1;
+  vu32 CR2;
+  vu32 SR;
+  vu32 TR;
+  vuc32 RR;
+} SMI_TypeDef;
+
+/*--------------------------------- Timer Base -------------------------------*/
+typedef struct
+{
+  vu16 CR;
+  u16  EMPTY1;
+  vu16 SCR;
+  u16  EMPTY2;
+  vu16 IMCR;
+  u16  EMPTY3[7];
+  vu16 RSR;
+  u16  EMPTY4;
+  vu16 RER;
+  u16  EMPTY5;
+  vu16 ISR;
+  u16  EMPTY6;
+  vu16 CNT;
+  u16  EMPTY7;
+  vu16 PSC;
+  u16  EMPTY8[3];
+  vu16 ARR;
+  u16  EMPTY9[13];
+  vu16 ICR1;
+  u16  EMPTY10;
+} TB_TypeDef;
+
+/*------------------------------------ TIM -----------------------------------*/
+typedef struct
+{
+  vu16 CR;
+  u16  EMPTY1;
+  vu16 SCR;
+  u16  EMPTY2;
+  vu16 IMCR;
+  u16  EMPTY3;
+  vu16 OMR1;
+  u16  EMPTY4[5];
+  vu16 RSR;
+  u16  EMPTY5;
+  vu16 RER;
+  u16  EMPTY6;
+  vu16 ISR;
+  u16  EMPTY7;
+  vu16 CNT;
+  u16  EMPTY8;
+  vu16 PSC;
+  u16  EMPTY9[3];
+  vu16 ARR;
+  u16  EMPTY10;
+  vu16 OCR1;
+  u16  EMPTY11;
+  vu16 OCR2;
+  u16  EMPTY12[9];
+  vu16 ICR1;
+  u16  EMPTY13;
+  vu16 ICR2;
+  u16  EMPTY14[9];
+  vu16 DMAB;
+  u16  EMPTY15;
+} TIM_TypeDef;
+
+/*------------------------------------ PWM -----------------------------------*/
+typedef struct
+{
+  vu16 CR;
+  u16  EMPTY1;
+  vu16 SCR;
+  u16  EMPTY2[3];
+  vu16 OMR1;
+  u16  EMPTY3;
+  vu16 OMR2;
+  u16  EMPTY4[3];
+  vu16 RSR;
+  u16  EMPTY5;
+  vu16 RER;
+  u16  EMPTY6;
+  vu16 ISR;
+  u16  EMPTY7;
+  vu16 CNT;
+  u16  EMPTY8;
+  vu16 PSC;
+  u16  EMPTY9;
+  vu16 RCR;
+  u16  EMPTY10;
+  vu16 ARR;
+  u16  EMPTY11;
+  vu16 OCR1;
+  u16  EMPTY12;
+  vu16 OCR2;
+  u16  EMPTY13;
+  vu16 OCR3;
+  u16  EMPTY14[15];
+  vu16 DTR;
+  u16  EMPTY15;
+  vu16 DMAB;
+  u16  EMPTY16;
+} PWM_TypeDef;
+
+/*----------------------- Synchronous Serial Peripheral ----------------------*/
+typedef struct
+{
+  vu32 CR0;
+  vu32 CR1;
+  vu32 DR;
+  vu32 SR;
+  vu32 PR;
+  vu32 IMSCR;
+  vu32 RISR;
+  vu32 MISR;
+  vu32 ICR;
+  vu32 DMACR;
+} SSP_TypeDef;
+
+/*---------------- Universal Asynchronous Receiver Transmitter ---------------*/
+typedef struct
+{
+  vu16 DR;
+  u16  EMPTY;
+  vu16 RSR;
+  u16  EMPTY1[9];
+  vu16 FR;
+  u16  EMPTY2;
+  vu16 BKR;
+  u16  EMPTY3[3];
+  vu16 IBRD;
+  u16  EMPTY4;
+  vu16 FBRD;
+  u16  EMPTY5;
+  vu16 LCR;
+  u16  EMPTY6;
+  vu16 CR;
+  u16  EMPTY7;
+  vu16 IFLS;
+  u16  EMPTY8;
+  vu16 IMSC;
+  u16  EMPTY9;
+  vu16 RIS;
+  u16  EMPTY10;
+  vu16 MIS;
+  u16  EMPTY11;
+  vu16 ICR;
+  u16  EMPTY12;
+  vu16 DMACR;
+  u16  EMPTY13;
+} UART_TypeDef;
+
+/*---------------------------------- WATCHDOG --------------------------------*/
+typedef struct
+{
+  vu16 CR;
+  u16  EMPTY1;
+  vu16 PR;
+  u16 EMPTY2;
+  vu16 VR;
+  u16  EMPTY3;
+  vu16 CNT;
+  u16  EMPTY4;
+  vu16 SR;
+  u16  EMPTY5;
+  vu16 MR;
+  u16  EMPTY6;
+  vu16 KR;
+  u16  EMPTY7;
+} WDG_TypeDef;
+
+/*******************************************************************************
+*                      Peripherals' Base addresses
+*******************************************************************************/
+
+#define SRAM_BASE      0x40000000
+
+#define CONFIG_BASE    0x60000000
+
+#define SMIR_BASE      0x90000000
+
+#define PERIPH_BASE    0xFFFF0000
+
+#define CFG_BASE            (CONFIG_BASE + 0x0010)
+#define MRCC_BASE           (CONFIG_BASE + 0x0020)
+#define ADC_BASE            (PERIPH_BASE + 0x8400)
+#define TB_BASE             (PERIPH_BASE + 0x8800)
+#define TIM0_BASE           (PERIPH_BASE + 0x8C00)
+#define TIM1_BASE           (PERIPH_BASE + 0x9000)
+#define TIM2_BASE           (PERIPH_BASE + 0x9400)
+#define PWM_BASE            (PERIPH_BASE + 0x9800)
+#define WDG_BASE            (PERIPH_BASE + 0xB000)
+#define SSP0_BASE           (PERIPH_BASE + 0xB800)
+#define SSP1_BASE           (PERIPH_BASE + 0xBC00)
+#define CAN_BASE            (PERIPH_BASE + 0xC400)
+#define I2C_BASE            (PERIPH_BASE + 0xCC00)
+#define UART0_BASE          (PERIPH_BASE + 0xD400)
+#define UART1_BASE          (PERIPH_BASE + 0xD800)
+#define UART2_BASE          (PERIPH_BASE + 0xDC00)
+#define GPIO0_BASE          (PERIPH_BASE + 0xE400)
+#define GPIOREMAP_BASE      (PERIPH_BASE + 0xE420)
+#define GPIO1_BASE          (PERIPH_BASE + 0xE440)
+#define GPIO2_BASE          (PERIPH_BASE + 0xE480)
+#define DMA_BASE            (PERIPH_BASE + 0xECF0)
+#define DMA_Stream0_BASE    (PERIPH_BASE + 0xEC00)
+#define DMA_Stream1_BASE    (PERIPH_BASE + 0xEC40)
+#define DMA_Stream2_BASE    (PERIPH_BASE + 0xEC80)
+#define DMA_Stream3_BASE    (PERIPH_BASE + 0xECC0)
+#define RTC_BASE            (PERIPH_BASE + 0xF000)
+#define EXTIT_BASE          (PERIPH_BASE + 0xF400)
+#define EIC_BASE            (PERIPH_BASE + 0xF800)
+
+/*******************************************************************************
+                            IPs' declaration
+*******************************************************************************/
+
+/*------------------- Non Debug Mode -----------------------------------------*/
+
+#ifndef DEBUG
+  #define SMI            ((SMI_TypeDef *)           SMIR_BASE)
+  #define CFG            ((CFG_TypeDef *)           CFG_BASE)
+  #define MRCC           ((MRCC_TypeDef *)          MRCC_BASE)
+  #define ADC            ((ADC_TypeDef *)           ADC_BASE)
+  #define TB             ((TB_TypeDef *)            TB_BASE)
+  #define TIM0           ((TIM_TypeDef *)           TIM0_BASE)
+  #define TIM1           ((TIM_TypeDef *)           TIM1_BASE)
+  #define TIM2           ((TIM_TypeDef *)           TIM2_BASE)
+  #define PWM            ((PWM_TypeDef *)           PWM_BASE)
+  #define WDG            ((WDG_TypeDef *)           WDG_BASE)
+  #define SSP0           ((SSP_TypeDef *)           SSP0_BASE)
+  #define SSP1           ((SSP_TypeDef *)           SSP1_BASE)
+  #define CAN            ((CAN_TypeDef *)           CAN_BASE)
+  #define I2C            ((I2C_TypeDef *)           I2C_BASE)
+  #define UART0          ((UART_TypeDef *)          UART0_BASE)
+  #define UART1          ((UART_TypeDef *)          UART1_BASE)
+  #define UART2          ((UART_TypeDef *)          UART2_BASE)
+  #define GPIO0          ((GPIO_TypeDef *)          GPIO0_BASE)
+  #define GPIOREMAP      ((GPIOREMAP_TypeDef *)     GPIOREMAP_BASE)
+  #define GPIO1          ((GPIO_TypeDef *)          GPIO1_BASE)
+  #define GPIO2          ((GPIO_TypeDef *)          GPIO2_BASE)
+  #define DMA            ((DMA_TypeDef *)           DMA_BASE)
+  #define DMA_Stream0    ((DMA_Stream_TypeDef *)    DMA_Stream0_BASE)
+  #define DMA_Stream1    ((DMA_Stream_TypeDef *)    DMA_Stream1_BASE)
+  #define DMA_Stream2    ((DMA_Stream_TypeDef *)    DMA_Stream2_BASE)
+  #define DMA_Stream3    ((DMA_Stream_TypeDef *)    DMA_Stream3_BASE)
+  #define RTC            ((RTC_TypeDef *)           RTC_BASE)
+  #define EXTIT          ((EXTIT_TypeDef *)         EXTIT_BASE)
+  #define EIC            ((EIC_TypeDef *)           EIC_BASE)
+#else   /* DEBUG */
+  #ifdef _SMI
+    EXT SMI_TypeDef           *SMI;
+  #endif /*_SMI */
+
+  #ifdef _CFG
+    EXT CFG_TypeDef           *CFG;
+  #endif /*_CFG */
+
+  #ifdef _MRCC
+    EXT MRCC_TypeDef          *MRCC;
+  #endif /*_MRCC */
+
+  #ifdef _ADC
+    EXT ADC_TypeDef           *ADC;
+  #endif /*_ADC */  
+
+  #ifdef _TB
+    EXT TB_TypeDef            *TB;
+  #endif /*_TB */
+
+  #ifdef _TIM0
+    EXT TIM_TypeDef           *TIM0;
+  #endif /*_TIM0 */
+
+  #ifdef _TIM1
+    EXT TIM_TypeDef           *TIM1;
+  #endif /*_TIM1 */
+
+  #ifdef _TIM2
+    EXT TIM_TypeDef           *TIM2;
+  #endif /*_TIM2 */
+
+  #ifdef _PWM
+    EXT PWM_TypeDef           *PWM;
+  #endif /*_PWM */
+
+  #ifdef _WDG
+    EXT WDG_TypeDef           *WDG;
+  #endif /*_WDG */
+
+  #ifdef _SSP0
+    EXT SSP_TypeDef           *SSP0;
+  #endif /*_SSP0 */
+
+  #ifdef _SSP1
+    EXT SSP_TypeDef           *SSP1;
+  #endif /*_SSP1 */
+
+  #ifdef _CAN
+    EXT CAN_TypeDef           *CAN;
+  #endif /*_CAN */
+
+  #ifdef _I2C
+    EXT I2C_TypeDef           *I2C;
+  #endif /*_I2C */
+
+  #ifdef _UART0
+    EXT UART_TypeDef          *UART0;
+  #endif /*_UART0 */
+
+  #ifdef _UART1
+    EXT UART_TypeDef          *UART1;
+  #endif /*_UART1 */
+
+  #ifdef _UART2
+    EXT UART_TypeDef          *UART2;
+  #endif /*_UART2 */
+
+  #ifdef _GPIO0
+    EXT GPIO_TypeDef          *GPIO0;
+  #endif /*_GPIO0 */
+
+  #ifdef _GPIOREMAP
+    EXT GPIOREMAP_TypeDef     *GPIOREMAP;
+  #endif /*_GPIOREMAP */
+
+  #ifdef _GPIO1
+    EXT GPIO_TypeDef          *GPIO1;
+  #endif /*_GPIO1 */
+
+  #ifdef _GPIO2
+    EXT GPIO_TypeDef          *GPIO2;
+  #endif /*_GPIO2 */
+
+  #ifdef _DMA
+    EXT DMA_TypeDef           *DMA;
+  #endif /*_DMA */
+
+  #ifdef _DMA_Stream0
+    EXT DMA_Stream_TypeDef    *DMA_Stream0;
+  #endif /*_DMA_Stream0 */
+
+  #ifdef _DMA_Stream1
+    EXT DMA_Stream_TypeDef    *DMA_Stream1;
+  #endif /*_DMA_Stream1 */
+
+  #ifdef _DMA_Stream2
+    EXT DMA_Stream_TypeDef    *DMA_Stream2;
+  #endif /*_DMA_Stream2 */
+
+  #ifdef _DMA_Stream3
+    EXT DMA_Stream_TypeDef    *DMA_Stream3;
+  #endif /*_DMA_Stream3 */
+
+  #ifdef _RTC
+    EXT RTC_TypeDef           *RTC;
+  #endif /*_RTC */
+
+  #ifdef _EXTIT
+    EXT EXTIT_TypeDef         *EXTIT;
+  #endif /*_EXTIT */
+
+  #ifdef _EIC
+    EXT EIC_TypeDef           *EIC;
+  #endif /*_EIC */
+  
+#endif  /* DEBUG */
+
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+#endif /* __75x_MAP_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_mrcc.h

@@ -0,0 +1,241 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_mrcc.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      MRCC software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_MRCC_H
+#define __75x_MRCC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* MRCC Buck-up registers */
+typedef enum
+{
+  MRCC_BKP0,
+  MRCC_BKP1
+}MRCC_BKPReg;
+
+typedef enum
+{
+  FREEOSC,
+  OSC4MPLL,
+  OSC4M,
+  CKRTC,
+  Disabled,
+  OSC4M_Div128,
+  LPOSC,
+  OSC32K,
+  Internal,
+  External,
+  ON,
+  OFF
+}CLKSourceTypeDef;
+
+
+typedef struct
+{
+  CLKSourceTypeDef CKSYS_Source;  /* FREEOSC, OSC4MPLL, OSC4M, CKRTC */
+  CLKSourceTypeDef CKRTC_Source;  /* Disabled, OSC4M_Div128, OSC32K, LPOSC */
+  CLKSourceTypeDef CKUSB_Source;  /* Disabled, Internal, External */
+  CLKSourceTypeDef PLL_Status;    /* ON, OFF */
+  CLKSourceTypeDef OSC4M_Status;  /* ON, OFF */
+  CLKSourceTypeDef LPOSC_Status;  /* ON, OFF */
+  CLKSourceTypeDef OSC32K_Status; /* ON, OFF */
+  u32 CKSYS_Frequency;  
+  u32 HCLK_Frequency;   
+  u32 CKTIM_Frequency;  
+  u32 PCLK_Frequency;   
+}MRCC_ClocksTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* Oscillator divider by 2 */
+#define MRCC_XTDIV2_Disable    0xFFFF7FFF
+#define MRCC_XTDIV2_Enable     0x00008000
+
+/* System clock source */
+#define MRCC_CKSYS_FREEOSC     0x01
+#define MRCC_CKSYS_OSC4M       0x02
+#define MRCC_CKSYS_OSC4MPLL    0x03
+#define MRCC_CKSYS_RTC         0x04
+
+/* PLL multiplication factors */
+#define MRCC_PLL_Disabled    0xFEFFFFFF
+#define MRCC_PLL_NoChange    0x00000001
+#define MRCC_PLL_Mul_12      0x18000000
+#define MRCC_PLL_Mul_14      0x10000000
+#define MRCC_PLL_Mul_15      0x08000000
+#define MRCC_PLL_Mul_16      0x00000000
+
+/* AHB clock source */
+#define MRCC_CKSYS_Div1    0x00000000
+#define MRCC_CKSYS_Div2    0x00000008
+#define MRCC_CKSYS_Div4    0x00000010
+#define MRCC_CKSYS_Div8    0x00000018
+
+/* TIM clock source */
+#define MRCC_HCLK_Div1    0x00000000
+#define MRCC_HCLK_Div2    0x00000001
+#define MRCC_HCLK_Div4    0x00000002
+#define MRCC_HCLK_Div8    0x00000003
+
+/* APB clock source */
+#define MRCC_CKTIM_Div1    0xFFFFFFFB
+#define MRCC_CKTIM_Div2    0x00000004
+
+/* RTC clock sources */
+#define MRCC_CKRTC_OSC4M_Div128    0x01000000
+#define MRCC_CKRTC_OSC32K          0x02000000
+#define MRCC_CKRTC_LPOSC           0x03000000
+
+/* USB clock sources */
+#define MRCC_CKUSB_Internal    0xFFBFFFFF
+#define MRCC_CKUSB_External    0x00400000
+
+/* MRCC Interrupts */
+#define MRCC_IT_LOCK    0x40000000
+#define MRCC_IT_NCKD    0x00080000
+
+/* Peripheral Clock */
+#define MRCC_Peripheral_ALL      0x1975623F
+#define MRCC_Peripheral_EXTIT    0x10000000
+#define MRCC_Peripheral_RTC      0x08000000
+#define MRCC_Peripheral_GPIO     0x01000000
+#define MRCC_Peripheral_UART2    0x00400000
+#define MRCC_Peripheral_UART1    0x00200000
+#define MRCC_Peripheral_UART0    0x00100000
+#define MRCC_Peripheral_I2C      0x00040000
+#define MRCC_Peripheral_CAN      0x00010000
+#define MRCC_Peripheral_SSP1     0x00004000
+#define MRCC_Peripheral_SSP0     0x00002000
+#define MRCC_Peripheral_USB      0x00000200
+#define MRCC_Peripheral_PWM      0x00000020
+#define MRCC_Peripheral_TIM2     0x00000010
+#define MRCC_Peripheral_TIM1     0x00000008
+#define MRCC_Peripheral_TIM0     0x00000004
+#define MRCC_Peripheral_TB       0x00000002
+#define MRCC_Peripheral_ADC      0x00000001
+
+/* Clock sources to measure theire frequency */
+#define MRCC_ClockSource_CKSYS    0x01
+#define MRCC_ClockSource_HCLK     0x02
+#define MRCC_ClockSource_PCLK     0x03
+#define MRCC_ClockSource_CKTIM    0x04
+
+/* Low Power Debug Mode */
+#define MRCC_LPDM_Disable    0xFFFFFFF7
+#define MRCC_LPDM_Enable     0x00000008
+
+/* WFI Mode parameters */
+#define MRCC_WFIParam_FLASHPowerDown    0x00000000
+#define MRCC_WFIParam_FLASHOn           0x00000010
+#define MRCC_WFIParam_FLASHOff          0x00004000
+
+/* STOP Mode parameters */
+#define MRCC_STOPParam_Default     0x00000000
+#define MRCC_STOPParam_OSC4MOff    0x00008000
+#define MRCC_STOPParam_FLASHOff    0x00004000
+#define MRCC_STOPParam_MVREGOff    0x00002000
+
+/* I/O Pins voltage range */
+#define MRCC_IOVoltageRange_5V     0xFFFEFFFF
+#define MRCC_IOVoltageRange_3V3    0x00010000
+
+/* Clock sources to output on MCO pin */
+#define MRCC_MCO_HCLK          0x00000000
+#define MRCC_MCO_PCLK          0x00000040
+#define MRCC_MCO_OSC4M         0x00000080
+#define MRCC_MCO_CKPLL2        0x000000C0
+#define MRCC_MCOPrescaler_1    0xFFFFFFDF
+#define MRCC_MCOPrescaler_2    0x00000020
+
+/* 4MHz main oscillator configuration */
+#define MRCC_OSC4M_Default    0xFFFCFFFF
+#define MRCC_OSC4M_Disable    0x00020000
+#define MRCC_OSC4M_Bypass     0x00010000
+
+/* OSC32K oscillator configuration */
+#define MRCC_OSC32K_Disable          0xDFFFFFFF
+#define MRCC_OSC32K_Enable           0x20000000
+#define MRCC_OSC32KBypass_Disable    0xBFFFFFFF
+#define MRCC_OSC32KBypass_Enable     0x40000000
+
+/* LPOSC oscillator configuration */
+#define MRCC_LPOSC_Disable    0xEFFFFFFF
+#define MRCC_LPOSC_Enable     0x10000000
+
+/* RTC measurement configuration */
+#define MRCC_RTCM_Disable    0xFBFFFFFF
+#define MRCC_RTCM_Enable     0x04000000
+
+/* MRCC Flags */
+#define MRCC_FLAG_LOCK         0x3F
+#define MRCC_FLAG_LOCKIF       0x3D
+#define MRCC_FLAG_CKSEL        0x37
+#define MRCC_FLAG_CKOSCSEL     0x35
+#define MRCC_FLAG_NCKD         0x32
+#define MRCC_FLAG_SWR          0x5D
+#define MRCC_FLAG_WDGR         0x5C
+#define MRCC_FLAG_EXTR         0x5B
+#define MRCC_FLAG_WKP          0x5A
+#define MRCC_FLAG_STDB         0x59
+#define MRCC_FLAG_BCOUNT       0x58
+#define MRCC_FLAG_OSC32KRDY    0x7F
+#define MRCC_FLAG_CKRTCOK      0x7B
+#define MRCC_FLAG_LPDONE       0x67
+#define MRCC_FLAG_LP           0x60
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void MRCC_DeInit(void);
+void MRCC_XTDIV2Config(u32 MRCC_XTDIV2);
+ErrorStatus MRCC_CKSYSConfig(u32 MRCC_CKSYS, u32 MRCC_PLL);
+void MRCC_HCLKConfig(u32 MRCC_HCLK);
+void MRCC_CKTIMConfig(u32 MRCC_CKTIM);
+void MRCC_PCLKConfig(u32 MRCC_PCLK);
+ErrorStatus MRCC_CKRTCConfig(u32 MRCC_CKRTC);
+ErrorStatus MRCC_CKUSBConfig(u32 MRCC_CKUSB);
+void MRCC_ITConfig(u32 MRCC_IT, FunctionalState NewState);
+void MRCC_PeripheralClockConfig(u32 MRCC_Peripheral, FunctionalState NewState);
+void MRCC_PeripheralSWResetConfig(u32 MRCC_Peripheral, FunctionalState NewState);
+void MRCC_GetClocksStatus(MRCC_ClocksTypeDef*  MRCC_ClocksStatus);
+void MRCC_LPMC_DBGConfig(u32 MRCC_LPDM);
+void MRCC_EnterWFIMode(u32 MRCC_WFIParam);
+void MRCC_EnterSTOPMode(u32 MRCC_STOPParam);
+void MRCC_EnterSTANDBYMode(void);
+void MRCC_GenerateSWReset(void);
+void MRCC_WriteBackupRegister(MRCC_BKPReg MRCC_BKP, u32 Data);
+u32 MRCC_ReadBackupRegister(MRCC_BKPReg MRCC_BKP);
+void MRCC_IOVoltageRangeConfig(u32 MRCC_IOVoltageRange);
+void MRCC_MCOConfig(u32 MRCC_MCO, u32 MCO_MCOPrescaler);
+ErrorStatus MRCC_OSC4MConfig(u32 MRCC_OSC4M);
+ErrorStatus MRCC_OSC32KConfig(u32 MRCC_OSC32K, u32 MRCC_OSC32KBypass);
+ErrorStatus MRCC_LPOSCConfig(u32 MRCC_LPOSC);
+void MRCC_RTCMConfig(u32 MRCC_RTCM);
+void MRCC_SetBuilderCounter(u8 BuilderCounter);
+u16 MRCC_GetCKSYSCounter(void);
+FlagStatus MRCC_GetFlagStatus(u8 MRCC_FLAG);
+void MRCC_ClearFlag(u8 MRCC_FLAG);
+ITStatus MRCC_GetITStatus(u32 MRCC_IT);
+void MRCC_ClearITPendingBit(u32 MRCC_IT);
+ErrorStatus MRCC_WaitForOSC4MStartUp(void);
+
+#endif /* __75x_MRCC_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_pwm.h

@@ -0,0 +1,215 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_pwm.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the 
+*                      PWM software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_PWM_H
+#define __75x_PWM_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+
+typedef struct
+{
+  u16 PWM_Mode;        /* PWM Mode */
+  u16 PWM_Prescaler;   /* Prescaler value */
+  u16 PWM_CounterMode; /* Counter mode: Up/Down, Edge aligned or center aligned */
+  u16 PWM_Period;      /* Period value */
+  u16 PWM_Complementary; /* Complementary PWM selection */
+  u16 PWM_OCState;       /* Output compare off-state in Run mode */
+  u16 PWM_OCNState;      /* Complementary Output compare off-state in Run mode */
+  u16 PWM_Channel;       /* PWM Channel: 1, 2 or 3 */
+  u16 PWM_Pulse1;        /* PWM or OCM Channel 1 pulse length */
+  u16 PWM_Pulse2;        /* PWM or OCM Channel 2 pulse length */
+  u16 PWM_Pulse3;        /* PWM or OCM Channel 3 pulse length */
+  u16 PWM_Polarity1;     /* PWM, OCM or OPM Channel 1 polarity */
+  u16 PWM_Polarity2;     /* PWM or OCM  Channel 2 polarity */
+  u16 PWM_Polarity3;     /* PWM or OCM  Channel 3 polarity */
+  u16 PWM_Polarity1N;    /* PWM or OCM  Channel 1N polarity */
+  u16 PWM_Polarity2N;    /* PWM or OCM  Channel 2N polarity */
+  u16 PWM_Polarity3N;    /* PWM or OCM  Channel 3N polarity */
+  u16 PWM_DTRAccess;     /* Enable or disable the configuration of DTR register parameters:
+                          DeadTime, Emergency, LOCKLevel, OSSIState, OCState and OCNState */
+  u16 PWM_DeadTime;      /* Dead Time value */
+  u16 PWM_Emergency;     /* Emergency selection: Enable / Disable */
+  u16 PWM_LOCKLevel;     /* LOCK level */
+  u16 PWM_OSSIState;     /* Off-State Selection for Idle state */
+  u8 PWM_RepetitionCounter; /* Repetition counter value */
+} PWM_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* PWM modes */
+#define PWM_Mode_OCTiming    0x0001
+#define PWM_Mode_OCActive    0x0002
+#define PWM_Mode_OCInactive  0x0003
+#define PWM_Mode_OCToggle    0x0004
+#define PWM_Mode_PWM         0x0005
+
+/* PWM Counter Mode */
+#define PWM_CounterMode_Up              0x0000
+#define PWM_CounterMode_Down            0x0010
+#define PWM_CounterMode_CenterAligned1  0x0020
+#define PWM_CounterMode_CenterAligned2  0x0040
+#define PWM_CounterMode_CenterAligned3  0x0060
+
+/* PWM Channel */
+#define PWM_Channel_1    0x0001
+#define PWM_Channel_2    0x0002
+#define PWM_Channel_3    0x0004
+#define PWM_Channel_ALL  0x0007
+
+/* PWM Polarity channel 1 */
+#define PWM_Polarity1_High  0x0001
+#define PWM_Polarity1_Low   0x0002
+
+/* PWM Polarity channel 2 */
+#define PWM_Polarity2_High  0x0001
+#define PWM_Polarity2_Low   0x0002
+
+/* PWM Polarity channel 3 */
+#define PWM_Polarity3_High  0x0001
+#define PWM_Polarity3_Low   0x0002
+
+/* PWM Polarity channel 1N */
+#define PWM_Polarity1N_High  0x0001
+#define PWM_Polarity1N_Low   0x0002
+
+/* PWM Polarity channel 2N */
+#define PWM_Polarity2N_High  0x0001
+#define PWM_Polarity2N_Low   0x0002
+
+/* PWM Polarity channel 3N */
+#define PWM_Polarity3N_High  0x0001
+#define PWM_Polarity3N_Low   0x0002
+
+/* PWM interrupt sources */
+#define PWM_IT_OC1           0x0100
+#define PWM_IT_OC2           0x0200
+#define PWM_IT_OC3           0x0400
+#define PWM_IT_Update        0x0001
+#define PWM_IT_GlobalUpdate  0x1001
+#define PWM_IT_Emergency     0x8000
+
+/* PWM DMA sources */
+#define PWM_DMASource_OC1        0x0100
+#define PWM_DMASource_OC2        0x0200
+#define PWM_DMASource_OC3        0x0400
+#define PWM_DMASource_Update     0x0001
+
+/* PWM DMA Base address */
+#define PWM_DMABase_CR    0x0000
+#define PWM_DMABase_SCR   0x0800
+#define PWM_DMABase_OMR1  0x1800
+#define PWM_DMABase_OMR2  0x2000
+#define PWM_DMABase_RSR   0x3000
+#define PWM_DMABase_RER   0x3800
+#define PWM_DMABase_ISR   0x4000
+#define PWM_DMABase_CNT   0x4800
+#define PWM_DMABase_PSC   0x5000
+#define PWM_DMABase_RCR   0x5800
+#define PWM_DMABase_ARR   0x6000
+#define PWM_DMABase_OCR1  0x6800
+#define PWM_DMABase_OCR2  0x7000
+#define PWM_DMABase_OCR3  0x7800
+#define PWM_DMABase_DTR   0xB800
+
+/* PWM OCM state */
+#define PWM_OCRMState_Enable   0x0005
+#define PWM_OCRMState_Disable  0x0006
+
+/* PWM Flags */
+#define PWM_FLAG_OC1        0x0100
+#define PWM_FLAG_OC2        0x0200
+#define PWM_FLAG_OC3        0x0400
+#define PWM_FLAG_Update     0x0001
+#define PWM_FLAG_Emergency  0x8000
+
+/*  PWM_ForcedAction */
+#define PWM_ForcedAction_Active    0x000A
+#define PWM_ForcedAction_InActive  0x0008
+
+/* PWM TRGO Mode */
+#define PWM_TRGOMode_Enable  0x0100
+#define PWM_TRGOMode_Update  0x0200
+#define PWM_TRGOMode_Reset   0x0000
+#define PWM_TRGOMode_OC      0x0300
+
+/* PWM Complementary outputs Enable/Disable */
+#define PWM_Complementary_Disable  0x0001
+#define PWM_Complementary_Enable   0x0002
+
+/* PWM DTR Access Enable/Disable */
+#define PWM_DTRAccess_Enable  0x0001
+#define PWM_DTRAccess_Disable 0x0002
+
+/* PWM Emergency input Enable/Disable */
+#define PWM_Emergency_Disable  0x0000
+#define PWM_Emergency_Enable   0x1000
+
+/* OC states */
+#define PWM_OCNState_Disable   0x0001
+#define PWM_OCNState_Enable    0x0002
+#define PWM_OCNState_OffState  0x0003
+
+/* OCN states */
+#define PWM_OCState_Disable   0x0004
+#define PWM_OCState_Enable    0x0005
+#define PWM_OCState_OffState  0x0006
+
+/* PWM LOCK level */
+#define PWM_LOCKLevel_1    0x0400
+#define PWM_LOCKLevel_2    0x0800
+#define PWM_LOCKLevel_3    0x0C00
+#define PWM_LOCKLevel_OFF  0x0000
+
+/* Off State selection for Idle state */
+#define PWM_OSSIState_Disable  0x0000
+#define PWM_OSSIState_Enable   0x2000
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+void PWM_DeInit(void);
+void PWM_Init(PWM_InitTypeDef* PWM_InitStruct);
+void PWM_StructInit(PWM_InitTypeDef *PWM_InitStruct);
+void PWM_Cmd(FunctionalState Newstate);
+void PWM_CtrlPWMOutputs(FunctionalState Newstate); 
+void PWM_ITConfig(u16 PWM_IT, FunctionalState Newstate);
+void PWM_DMAConfig(u16 PWM_DMASources, u16 PWM_OCRMState, u16 PWM_DMABase);
+void PWM_DMACmd(u16 PWM_DMASources, FunctionalState Newstate);
+void PWM_SetPrescaler(u16 Prescaler);
+void PWM_SetPeriod(u16 Period);
+void PWM_SetPulse(u16 PWM_Channel, u16 Pulse);
+void PWM_SetPulse1(u16 Pulse);
+void PWM_SetPulse2(u16 Pulse);
+void PWM_SetPulse3(u16 Pulse);
+void PWM_DebugCmd(FunctionalState Newstate);
+void PWM_CounterModeConfig(u16 PWM_CounterMode);
+void PWM_ForcedOCConfig(u16 PWM_Channel, u16 PWM_ForcedAction);
+void PWM_SetDeadTime(u16 DeadTime);
+void PWM_ResetCounter(void);
+void PWM_TRGOSelection(u16 PWM_TRGOMode);
+FlagStatus PWM_GetFlagStatus(u16 PWM_FLAG);
+void PWM_ClearFlag(u16 PWM_FLAG);
+ITStatus PWM_GetITStatus(u16 PWM_IT);
+void PWM_ClearITPendingBit(u16 PWM_IT);
+
+#endif /* __75x_PWM_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_rtc.h

@@ -0,0 +1,63 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_rtc.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      RTC software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_RTC_H
+#define __75x_RTC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* RTC interrupts define */
+#define RTC_IT_Overflow    0x0004  /* Overflow interrupt */
+#define RTC_IT_Alarm       0x0002  /* Alarm interrupt */
+#define RTC_IT_Second      0x0001  /* Second interrupt */
+
+/* RTC interrupts flags */
+#define RTC_FLAG_RTOFF       0x0020  /* RTC Operation OFF flag */
+#define RTC_FLAG_RSF         0x0008  /* Registers Synchronized flag */
+#define RTC_FLAG_Overflow    0x0004  /* Overflow interrupt flag */
+#define RTC_FLAG_Alarm       0x0002  /* Alarm interrupt flag */
+#define RTC_FLAG_Second      0x0001  /* Second interrupt flag */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void RTC_DeInit(void);
+void RTC_ITConfig(u16 RTC_IT, FunctionalState NewState);
+void RTC_EnterConfigMode(void);
+void RTC_ExitConfigMode(void);
+u32  RTC_GetCounter(void);
+void RTC_SetCounter(u32 CounterValue);
+void RTC_SetPrescaler(u32 PrescalerValue);
+u32  RTC_GetPrescaler(void);
+void RTC_SetAlarm(u32 AlarmValue);
+u32  RTC_GetDivider(void);
+void RTC_WaitForLastTask(void);
+void RTC_WaitForSynchro(void);
+FlagStatus RTC_GetFlagStatus(u16 RTC_FLAG);
+void RTC_ClearFlag(u16 RTC_FLAG);
+ITStatus RTC_GetITStatus(u16 RTC_IT);
+void RTC_ClearITPendingBit(u16 RTC_IT);
+
+#endif /* __75x_RTC_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_smi.h

@@ -0,0 +1,111 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_smi.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      SMI software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_SMI_H
+#define __75x_SMI_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+typedef struct
+{
+  u8 SMI_ClockHold;
+  u8 SMI_Prescaler;
+  u8 SMI_DeselectTime;
+} SMI_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* SMI mode */
+#define SMI_Mode_HW    0xEFFFFFFF
+#define SMI_Mode_SW    0x10000000
+
+/* Reception Length */
+#define SMI_RxLength_0Bytes    0x00000000
+#define SMI_RxLength_1Byte     0x00000010
+#define SMI_RxLength_2Bytes    0x00000020
+#define SMI_RxLength_3Bytes    0x00000030
+#define SMI_RxLength_4Bytes    0x00000040
+
+/* Transmission Length */
+#define SMI_TxLength_0Bytes    0x00000000
+#define SMI_TxLength_1Byte     0x00000001
+#define SMI_TxLength_2Bytes    0x00000002
+#define SMI_TxLength_3Bytes    0x00000003
+#define SMI_TxLength_4Bytes    0x00000004
+
+/* SMI memory Banks */
+#define SMI_Bank_0    0x00000001
+#define SMI_Bank_1    0x00000002
+#define SMI_Bank_2    0x00000004
+#define SMI_Bank_3    0x00000008
+
+/* SMI Interrupts */
+#define SMI_IT_WC    0x00000200
+#define SMI_IT_TF    0x00000100
+
+/* Fast Read Mode */
+#define SMI_FastRead_Disable    0xFFFF7FFF
+#define SMI_FastRead_Enable     0x00008000
+
+/* Write Burst Mode */
+#define SMI_WriteBurst_Disable    0xDFFFFFFF
+#define SMI_WriteBurst_Enable     0x20000000
+
+/* SMI Flags */
+#define SMI_FLAG_Bank3_WM    0x00008000
+#define SMI_FLAG_Bank2_WM    0x00004000
+#define SMI_FLAG_Bank1_WM    0x00002000
+#define SMI_FLAG_Bank0_WM    0x00001000
+#define SMI_FLAG_ERF2        0x00000800
+#define SMI_FLAG_ERF1        0x00000400
+#define SMI_FLAG_WC          0x00000200
+#define SMI_FLAG_TF          0x00000100
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void SMI_DeInit(void); 
+void SMI_Init(SMI_InitTypeDef* SMI_InitStruct); 
+void SMI_StructInit(SMI_InitTypeDef* SMI_InitStruct);
+void SMI_ModeConfig(u32 SMI_Mode);
+void SMI_TxRxLengthConfig(u32 SMI_TxLength, u32 SMI_RxLength); 
+void SMI_BankCmd(u32 SMI_Bank, FunctionalState NewState); 
+void SMI_ITConfig(u32 SMI_IT, FunctionalState NewState); 
+void SMI_SelectBank(u32 SMI_Bank); 
+void SMI_SendWENCmd(void); 
+void SMI_SendRSRCmd(void);
+void SMI_SendCmd(u32 Command);
+void SMI_FastReadConfig(u32 SMI_FastRead);
+void SMI_WriteBurstConfig(u32 SMI_WriteBurst);
+void SMI_WriteByte(u32 WriteAddr, u8 Data);
+void SMI_WriteHalfWord(u32 WriteAddr, u16 Data);
+void SMI_WriteWord(u32 WriteAddr, u32 Data);
+u8 SMI_ReadByte(u32 ReadAddr);
+u16 SMI_ReadHalfWord(u32 ReadAddr);
+u32 SMI_ReadWord(u32 ReadAddr);
+u8 SMI_ReadMemoryStatusRegister(void);
+FlagStatus SMI_GetFlagStatus(u32 SMI_FLAG);
+void SMI_ClearFlag(u32 SMI_FLAG);
+ITStatus SMI_GetITStatus(u32 SMI_IT);
+void SMI_ClearITPendingBit(u32 SMI_IT);
+
+#endif /* __75x_SMI_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_ssp.h

@@ -0,0 +1,135 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_SSP.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      SSP software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1 
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_SSP_H
+#define __75x_SSP_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* SSP Init structure definition */
+typedef struct
+{
+  u16 SSP_FrameFormat;
+  u16 SSP_Mode;
+  u16 SSP_CPOL;
+  u16 SSP_CPHA;
+  u16 SSP_DataSize;
+  u16 SSP_NSS;
+  u16 SSP_SlaveOutput;
+  u8 SSP_ClockRate;
+  u8 SSP_ClockPrescaler;
+}SSP_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* SSP Frame Format Select */
+#define SSP_FrameFormat_TI          0x0010
+#define SSP_FrameFormat_Motorola    0xFFCF
+
+/* SSP Master/Slave Select */
+#define SSP_Mode_Master    0xFFFB
+#define SSP_Mode_Slave     0x0004
+
+/* SSP Clock Polarity */
+#define SSP_CPOL_Low     0xFFBF
+#define SSP_CPOL_High    0x0040
+
+/* SSP Clock Phase */
+#define SSP_CPHA_1Edge    0xFF7F
+#define SSP_CPHA_2Edge    0x0080
+
+/* SSP Data Size */
+#define SSP_DataSize_16b    0x000F
+#define SSP_DataSize_15b    0x000E
+#define SSP_DataSize_14b    0x000D
+#define SSP_DataSize_13b    0x000C
+#define SSP_DataSize_12b    0x000B
+#define SSP_DataSize_11b    0x000A
+#define SSP_DataSize_10b    0x0009
+#define SSP_DataSize_9b     0x0008
+#define SSP_DataSize_8b     0x0007
+#define SSP_DataSize_7b     0x0006
+#define SSP_DataSize_6b     0x0005
+#define SSP_DataSize_5b     0x0004
+#define SSP_DataSize_4b     0x0003
+
+/* SSP Slave Select management config */
+#define SSP_NSS_Hard    0xFFEF
+#define SSP_NSS_Soft    0x0010
+
+/* SSP NSS internal config */
+#define SSP_NSSInternal_Set      0x0020
+#define SSP_NSSInternal_Reset    0xFFDF
+
+/* SSP Slave output config */
+#define SSP_SlaveOutput_Enable     0xFFF7
+#define SSP_SlaveOutput_Disable    0x0008
+
+/* SSP Interrupts */
+#define SSP_IT_TxFifo       0x0008
+#define SSP_IT_RxFifo       0x0004
+#define SSP_IT_RxTimeOut    0x0002
+#define SSP_IT_RxOverrun    0x0001
+
+/* SSP Flags */
+#define SSP_FLAG_Busy              0x0024
+#define SSP_FLAG_RxFifoFull        0x0023
+#define SSP_FLAG_RxFifoNotEmpty    0x0022
+#define SSP_FLAG_TxFifoNotFull     0x0021
+#define SSP_FLAG_TxFifoEmpty       0x0020
+#define SSP_FLAG_TxFifo            0x0043
+#define SSP_FLAG_RxFifo            0x0042
+#define SSP_FLAG_RxTimeOut         0x0041
+#define SSP_FLAG_RxOverrun         0x0040
+
+/* SSP DMA Requests */
+#define SSP0_DMA_Transmit    0x0002
+#define SSP0_DMA_Receive     0x0001
+
+#define SSP0_DMATxReq_Single     0xFFF7
+#define SSP0_DMATxReq_Burst      0x0008
+
+#define SSP0_DMARxReq_Single     0xFFFB
+#define SSP0_DMARxReq_Burst      0x0004
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void SSP_DeInit(SSP_TypeDef* SSPx);
+void SSP_Init(SSP_TypeDef* SSPx, SSP_InitTypeDef* SSP_InitStruct);
+void SSP_StructInit(SSP_InitTypeDef* SSP_InitStruct);
+void SSP_Cmd(SSP_TypeDef* SSPx, FunctionalState NewState);
+void SSP_ITConfig(SSP_TypeDef* SSPx, u16 SSP_IT, FunctionalState NewState);
+void SSP_DMACmd(u16 SSP0_DMAtransfer, FunctionalState NewState);
+void SSP_DMATxConfig(u16 SSP0_DMATxReq);
+void SSP_DMARxConfig(u16 SSP0_DMARxReq);
+void SSP_SendData(SSP_TypeDef* SSPx, u16 Data);
+u16 SSP_ReceiveData(SSP_TypeDef* SSPx);
+void SSP_LoopBackConfig(SSP_TypeDef* SSPx, FunctionalState NewState);
+void SSP_NSSInternalConfig(SSP_TypeDef* SSPx, u16 SSP_NSSState);
+FlagStatus SSP_GetFlagStatus(SSP_TypeDef* SSPx, u16 SSP_FLAG);
+void SSP_ClearFlag(SSP_TypeDef* SSPx, u16 SSP_FLAG);
+ITStatus SSP_GetITStatus(SSP_TypeDef* SSPx, u16 SSP_IT);
+void SSP_ClearITPendingBit(SSP_TypeDef* SSPx, u16 SSP_IT);
+
+#endif /* __75x_SSP_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_tb.h

@@ -0,0 +1,93 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_tb.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the 
+*                      TB software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_TB_H
+#define __75x_TB_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+typedef struct
+{
+  u16 TB_Mode;         /* TB mode */
+  u16 TB_ClockSource;  /* TB clock source: CK_TIM or CK_RTC */
+  u16 TB_CounterMode;  /* TB counter mode */
+  u16 TB_ICAPolarity;  /* TB Input Capture signal Polarity */
+  u16 TB_Prescaler;    /* TB Prescaler factor */
+  u16 TB_AutoReload;   /* TB AutoReload factor */
+} TB_InitTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* TB modes */
+#define TB_Mode_IC      0x0002
+#define TB_Mode_Timing  0x0001
+
+/* TB clock source */
+#define TB_ClockSource_CKTIM 0x0001
+#define TB_ClockSource_CKRTC 0x0002
+
+/* TB Input capture polarity */
+#define TB_ICAPolarity_Rising   0x7000
+#define TB_ICAPolarity_Falling  0x8000
+
+/* TB counter modes */
+#define TB_CounterMode_Up             0x0000
+#define TB_CounterMode_Down           0x0010
+#define TB_CounterMode_CenterAligned  0x0060
+
+/* TB interrupt sources */
+#define TB_IT_Update        0x0001
+#define TB_IT_IC            0x0004
+#define TB_IT_GlobalUpdate  0x8001
+
+/* TB Flags */
+#define TB_FLAG_IC      0x0004
+#define TB_FLAG_Update  0x0001
+
+/* TB Slave Mode Selection */
+#define TB_SMSMode_Trigger  0x0018
+#define TB_SMSMode_Gated    0x0010
+#define TB_SMSMode_External 0x0008  
+#define TB_SMSMode_Reset    0x0000
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void TB_DeInit(void);
+void TB_Init(TB_InitTypeDef* TB_InitStruct);
+void TB_StructInit(TB_InitTypeDef *TB_InitStruct);
+void TB_Cmd(FunctionalState Newstate );
+void TB_ITConfig(u16 TB_IT, FunctionalState Newstate);
+void TB_SetPrescaler(u16 Prescaler);
+void TB_ResetCounter(void);
+void TB_DebugCmd(FunctionalState Newstate);
+void TB_CounterModeConfig(u16 TB_CounterMode);
+void TB_SLaveModeConfig(u16 TB_SMSMode);
+u16 TB_GetCounter(void);
+u16 TB_GetICAP1(void);
+void TB_SetCounter(u16 Counter);
+FlagStatus TB_GetFlagStatus(u16 TB_FLAG);
+void TB_ClearFlag(u16 TB_FLAG);
+ITStatus TB_GetITStatus(u16 TB_IT);
+void TB_ClearITPendingBit(u16 TB_IT);
+
+#endif /* __75x_TB_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_tim.h

@@ -0,0 +1,232 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_tim.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the 
+*                      TIM software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_TIM_H
+#define __75x_TIM_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+typedef struct
+{
+  u16 TIM_Mode;              /* Timer Mode */
+  u16 TIM_Prescaler;         /* Prescaler value */
+  u16 TIM_ClockSource;       /* Timer clock source */
+  u16 TIM_ExtCLKEdge;        /* External clock edge */
+  u16 TIM_CounterMode;       /* Counter mode: Up/Down, Edge aligned or center aligned */
+  u16 TIM_Period;            /* Period value */
+  u16 TIM_Channel;           /* Timer Channel: 1, 2 or All */
+  u16 TIM_Pulse1;            /* PWM or OCM Channel 1 pulse length */
+  u16 TIM_Pulse2;            /* PWM or OCM Channel 2 pulse length */
+  u16 TIM_RepetitivePulse;   /* OPM Repetitive pulse state: enable or disable */
+  u16 TIM_Polarity1;         /* PWM, OCM or OPM Channel 1 polarity */
+  u16 TIM_Polarity2;         /* PWM or OCM  Channel 2 polarity */
+  u16 TIM_IC1Selection;      /* Input Capture 1 selection: TI1 or TI2 */
+  u16 TIM_IC2Selection;      /* Input Capture 2 selection: TI1 or TI2 */
+  u16 TIM_IC1Polarity;       /* Input Capture 1 polarity */
+  u16 TIM_IC2Polarity;       /* Input Capture 2 polarity */
+  u16 TIM_PWMI_ICSelection;  /* PWM Input Capture selection: TI1 or TI2 */
+  u16 TIM_PWMI_ICPolarity;   /* PWM Input Capture Polarity */
+} TIM_InitTypeDef;
+
+/* Master and slave synchronized Timer peripherals */
+typedef enum
+{
+  PWM_Master  = 0x01,
+  TIM0_Master,
+  TIM1_Master,
+  TIM2_Master
+}Master_TypeDef;
+
+typedef enum
+{
+  PWM_Slave  = 0x05,
+  TIM0_Slave,
+  TIM1_Slave,
+  TIM2_Slave
+}Slave_TypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+/* TIM modes */
+#define TIM_Mode_OCTiming    0x0001
+#define TIM_Mode_OCActive    0x0002
+#define TIM_Mode_OCInactive  0x0003
+#define TIM_Mode_OCToggle    0x0004
+#define TIM_Mode_PWM         0x0005
+#define TIM_Mode_PWMI        0x0006
+#define TIM_Mode_IC          0x0007
+#define TIM_Mode_Encoder1    0x0008
+#define TIM_Mode_Encoder2    0x0009
+#define TIM_Mode_Encoder3    0x000A
+#define TIM_Mode_OPM_PWM     0x000B
+#define TIM_Mode_OPM_Toggle  0x000C
+#define TIM_Mode_OPM_Active  0x000D
+
+/* TIM Clock Source */
+#define TIM_ClockSource_Internal  0x0001
+#define TIM_ClockSource_TI11      0x0002
+#define TIM_ClockSource_TI12      0x0003
+#define TIM_ClockSource_TI22      0x0004
+#define TIM_ClockSource_TI21      0x0005
+
+/* TIM External Clock Edge */
+#define TIM_ExtCLKEdge_Falling  0x0001
+#define TIM_ExtCLKEdge_Rising   0x0002
+
+/* TIM Counter Mode */
+#define TIM_CounterMode_Up              0x0000
+#define TIM_CounterMode_Down            0x0010
+#define TIM_CounterMode_CenterAligned1  0x0020
+#define TIM_CounterMode_CenterAligned2  0x0040
+#define TIM_CounterMode_CenterAligned3  0x0060
+
+/* TIM Channel */
+#define TIM_Channel_1    0x0001
+#define TIM_Channel_2    0x0002
+#define TIM_Channel_ALL  0x0003
+
+/* TIM Polarity channel 1 */
+#define TIM_Polarity1_High  0x0001
+#define TIM_Polarity1_Low   0x0002
+
+/* TIM Polarity channel 2 */
+#define TIM_Polarity2_High  0x0001
+#define TIM_Polarity2_Low   0x0002
+
+#define TIM_RepetitivePulse_Disable  0x0005
+#define TIM_RepetitivePulse_Enable   0x0006
+
+/* TIM Input Capture channel 1 Selection */
+#define TIM_IC1Selection_TI1  0x0001
+#define TIM_IC1Selection_TI2  0x0002
+
+/* TIM Input Capture channel 2 Selection */
+#define TIM_IC2Selection_TI1  0x0001
+#define TIM_IC2Selection_TI2  0x0002
+
+/* TIM Input Capture channel 1 Polarity */
+#define  TIM_IC1Polarity_Falling  0x0001
+#define  TIM_IC1Polarity_Rising   0x0002
+
+/* TIM Input Capture channel 2 Polarity */
+#define  TIM_IC2Polarity_Falling  0x0001
+#define  TIM_IC2Polarity_Rising   0x0002
+
+/* TIM PWM Input IC Selection */
+#define TIM_PWMI_ICSelection_TI1  0x0001
+#define TIM_PWMI_ICSelection_TI2  0x0002
+
+/*  TIM PWM Input IC Polarity */
+#define TIM_PWMI_ICPolarity_Falling  0x0003
+#define TIM_PWMI_ICPolarity_Rising   0x0004
+
+/* TIM interrupt sources */
+#define TIM_IT_IC1           0x0004
+#define TIM_IT_IC2           0x0008
+#define TIM_IT_OC1           0x0100
+#define TIM_IT_OC2           0x0200
+#define TIM_IT_Update        0x0001
+#define TIM_IT_GlobalUpdate  0x1001
+
+/* TIM DMA sources */
+#define TIM_DMASource_IC1     0x0004
+#define TIM_DMASource_IC2     0x0008
+#define TIM_DMASource_OC1     0x0100
+#define TIM_DMASource_OC2     0x0200
+#define TIM_DMASource_Update  0x0001
+
+/* TIM DMA Base address */
+#define TIM_DMABase_CR    0x0000
+#define TIM_DMABase_SCR   0x0800
+#define TIM_DMABase_IMCR  0x1000
+#define TIM_DMABase_OMR1  0x1800
+#define TIM_DMABase_RSR   0x3000
+#define TIM_DMABase_RER   0x3800
+#define TIM_DMABase_ISR   0x4000
+#define TIM_DMABase_CNT   0x4800
+#define TIM_DMABase_PSC   0x5000
+#define TIM_DMABase_ARR   0x6000
+#define TIM_DMABase_OCR1  0x6800
+#define TIM_DMABase_OCR2  0x7000
+#define TIM_DMABase_ICR1  0x9800
+#define TIM_DMABase_ICR2  0xA000
+
+/* TIM Flags */
+#define TIM_FLAG_IC1     0x0004
+#define TIM_FLAG_IC2     0x0008
+#define TIM_FLAG_OC1     0x0100
+#define TIM_FLAG_OC2     0x0200
+#define TIM_FLAG_Update  0x0001
+
+/*  TIM_ForcedAction */
+#define TIM_ForcedAction_Active    0x000A
+#define TIM_ForcedAction_InActive  0x0008
+
+/* TIM synchronization action */
+#define TIM_SynchroAction_Enable  0x0100
+#define TIM_SynchroAction_Update  0x0200
+#define TIM_SynchroAction_Reset   0x0000
+#define TIM_SynchroAction_OC      0x0300
+
+/* TIM synchronization mode */
+#define TIM_SynchroMode_Gated    0x0010
+#define TIM_SynchroMode_Trigger  0x0018
+#define TIM_SynchroMode_External 0x0008
+#define TIM_SynchroMode_Reset    0x0000
+
+/* OCRM bit states */
+#define TIM_OCRMState_Enable   0x0005
+#define TIM_OCRMState_Disable  0x0006
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+void TIM_DeInit(TIM_TypeDef *TIMx);
+void TIM_Init(TIM_TypeDef* TIMx, TIM_InitTypeDef* TIM_InitStruct);
+void TIM_StructInit(TIM_InitTypeDef *TIM_InitStruct);
+void TIM_Cmd(TIM_TypeDef *TIMx, FunctionalState Newstate);
+void TIM_ITConfig(TIM_TypeDef *TIMx, u16 TIM_IT, FunctionalState Newstate);
+void TIM_PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_Channel, FunctionalState Newstate);
+void TIM_DMAConfig(u16 TIM_DMASources, u16 TIM_OCRMState, u16 TIM_DMABase);
+void TIM_DMACmd(u16 TIM_DMASources, FunctionalState Newstate);
+void TIM_ClockSourceConfig(TIM_TypeDef *TIMx, u16 TIM_ClockSource,
+                           u16 TIM_ExtCLKEdge);
+void TIM_SetPrescaler(TIM_TypeDef* TIMx, u16 Prescaler);
+void TIM_SetPeriod(TIM_TypeDef* TIMx, u16 Period);
+void TIM_SetPulse(TIM_TypeDef* TIMx, u16 TIM_Channel, u16 Pulse);
+u16 TIM_GetICAP1(TIM_TypeDef *TIMx);
+u16 TIM_GetICAP2(TIM_TypeDef *TIMx);
+u16 TIM_GetPWMIPulse(TIM_TypeDef *TIMx);
+u16 TIM_GetPWMIPeriod(TIM_TypeDef *TIMx);
+void TIM_DebugCmd(TIM_TypeDef *TIMx, FunctionalState Newstate);
+void TIM_CounterModeConfig(TIM_TypeDef* TIMx, u16 TIM_CounterMode);
+void TIM_ForcedOCConfig(TIM_TypeDef* TIMx, u16 TIM_Channel,
+                        u16 TIM_ForcedAction);
+void TIM_ResetCounter(TIM_TypeDef* TIMx);
+void TIM_SynchroConfig(Master_TypeDef Master, Slave_TypeDef Slave,
+                       u16 TIM_SynchroAction, u16 TIM_SynchroMode);
+FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, u16 TIM_FLAG);
+void TIM_ClearFlag(TIM_TypeDef* TIMx, u16 TIM_FLAG);
+ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, u16 TIM_IT);
+void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, u16 TIM_IT);
+
+#endif /* __75x_TIM_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_type.h

@@ -0,0 +1,71 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_type.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the common data types used for the
+*                      STR75x software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_TYPE_H
+#define __75x_TYPE_H
+
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+typedef signed long      s32;
+typedef signed short     s16;
+typedef signed char      s8;
+
+typedef volatile signed long      vs32;
+typedef volatile signed short     vs16;
+typedef volatile signed char      vs8;
+
+typedef unsigned long       u32;
+typedef unsigned short      u16;
+typedef unsigned char       u8;
+
+typedef volatile unsigned long      vu32;
+typedef volatile unsigned short     vu16;
+typedef volatile unsigned char      vu8;
+
+typedef volatile unsigned long  const    vuc32;  /* Read Only */
+typedef volatile unsigned short const    vuc16;  /* Read Only */
+typedef volatile unsigned char  const    vuc8;   /* Read Only */
+
+
+typedef enum { FALSE = 0, TRUE  = !FALSE } bool;
+
+typedef enum { RESET = 0, SET   = !RESET } FlagStatus, ITStatus;
+
+typedef enum { DISABLE = 0, ENABLE  = !DISABLE} FunctionalState;
+
+typedef enum { ERROR = 0, SUCCESS  = !ERROR} ErrorStatus;
+
+#define U8_MAX     ((u8)255)
+#define S8_MAX     ((s8)127)
+#define S8_MIN     ((s8)-128)
+#define U16_MAX    ((u16)65535u)
+#define S16_MAX    ((s16)32767)
+#define S16_MIN	   ((s16)-32768)
+#define U32_MAX	   ((u32)4294967295uL)
+#define S32_MAX    ((s32)2147483647)
+#define S32_MIN    ((s32)-2147483648)
+
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+#endif /* __75x_TYPE_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_uart.h

@@ -0,0 +1,178 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_uart.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      UART software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_UART_H
+#define __75x_UART_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* UART FIFO Level enumeration */
+typedef enum
+{
+  UART_FIFOLevel_1_8 = 0x0000,  /* FIFO size 16 bytes, FIFO level 2 bytes */
+  UART_FIFOLevel_1_4 = 0x0001,  /* FIFO size 16 bytes, FIFO level 4 bytes */
+  UART_FIFOLevel_1_2 = 0x0002,  /* FIFO size 16 bytes, FIFO level 8 bytes */
+  UART_FIFOLevel_3_4 = 0x0003,  /* FIFO size 16 bytes, FIFO level 12 bytes */
+  UART_FIFOLevel_7_8 = 0x0004   /* FIFO size 16 bytes, FIFO level 14 bytes */
+}UART_FIFOLevel;
+
+/* UART Init Structure definition */
+typedef struct
+{
+  u16 UART_WordLength;
+  u16 UART_StopBits;
+  u16 UART_Parity;
+  u32 UART_BaudRate;
+  u16 UART_HardwareFlowControl;
+  u16 UART_Mode;
+  u16 UART_FIFO;
+  UART_FIFOLevel UART_TxFIFOLevel;
+  UART_FIFOLevel UART_RxFIFOLevel;
+}UART_InitTypeDef;
+
+
+/* UART RTS enumeration */
+typedef enum
+{
+  RTSRESET = 1,
+  RTSSET
+}UART_RTSTypeDef;
+
+
+/* Exported constants --------------------------------------------------------*/
+/* UART Data Length */
+#define UART_WordLength_5D          0x0000  /* 5 bits Data */
+#define UART_WordLength_6D          0x0020  /* 6 bits Data */
+#define UART_WordLength_7D          0x0040  /* 7 bits Data */
+#define UART_WordLength_8D          0x0060  /* 8 bits Data */
+                                                                                               
+/* UART Stop Bits */
+#define UART_StopBits_1             0xFFF7  /* One stop bit is transmitted at 
+                                               the end of frame */
+#define UART_StopBits_2             0x0008  /* Tow stop bits are transmitted 
+                                               at the end of frame */
+
+/* UART Parity */
+#define UART_Parity_No              0x0000  /* Parity Disable */
+#define UART_Parity_Even            0x0006  /* Even Parity */
+#define UART_Parity_Odd             0x0002  /* Odd Parity */
+#define UART_Parity_OddStick        0x0082  /* 1 is transmitted as bit parity */
+#define UART_Parity_EvenStick       0x0086  /* 0 is transmitted as bit parity */
+
+/* UART Hardware Flow Control */
+#define UART_HardwareFlowControl_None       0x0000/* HFC Disable */
+#define UART_HardwareFlowControl_RTS        0x4000/* RTS Enable */
+#define UART_HardwareFlowControl_CTS        0x8000/* CTS Enable */
+#define UART_HardwareFlowControl_RTS_CTS    0xC000/* CTS and RTS Enable */
+
+/* UART Mode */
+#define UART_Mode_Rx                0x0200  /* UART Rx Enabled */
+#define UART_Mode_Tx                0x0100  /* UART Tx Enbled */
+#define UART_Mode_Tx_Rx             0x0300  /* UART Tx and Rx Enabled */
+
+/* UART FIFO */
+#define UART_FIFO_Disable           0xFFEF  /* FIFOs Disable */
+#define UART_FIFO_Enable            0x0010  /* FIFOs Enable */
+
+/* UART Interrupt definition */
+#define UART_IT_OverrunError        0x0400  /* Overrun Error interrupt */
+#define UART_IT_BreakError          0x0200  /* Break Error interrupt */
+#define UART_IT_ParityError         0x0100  /* Parity Error interrupt */
+#define UART_IT_FrameError          0x0080  /* Frame Error interrupt */
+#define UART_IT_ReceiveTimeOut      0x0040  /* Receive Time Out interrupt */
+#define UART_IT_Transmit            0x0020  /* Transmit interrupt */
+#define UART_IT_Receive             0x0010  /* Receive interrupt */
+#define UART_IT_CTS                 0x0002  /* CTS interrupt */
+
+/* UART0 DMA transfer */
+#define UART0_DMATransfer_Single    0xFFF7  /* Single DMA transfer */
+#define UART0_DMATransfer_Burst     0x0008  /* Burst DMA transfer */
+
+/* UART0 DMA On Error */
+#define UART0_DMAOnError_Enable     0xFFFB  /* DMA receive request enabled
+                                                when the UART0 error interrupt
+                                                is asserted. */
+#define UART0_DMAOnError_Disable    0x0004  /* DMA receive request disabled
+                                                when the UART0 error interrupt
+                                                is asserted. */
+
+/* UART0 DMA Request */
+#define UART0_DMAReq_Tx             0x0002  /* Transmit DMA Enable */
+#define UART0_DMAReq_Rx             0x0001  /* Receive DMA Enable */
+
+/* UART FLAG */
+#define UART_FLAG_OverrunError      0x23    /* Overrun error flag */
+#define UART_FLAG_Break             0x22    /* break error flag */
+#define UART_FLAG_ParityError       0x21    /* parity error flag */
+#define UART_FLAG_FrameError        0x20    /* frame error flag */
+#define UART_FLAG_TxFIFOEmpty       0x47    /* Transmit FIFO Empty flag */
+#define UART_FLAG_RxFIFOFull        0x46    /* Receive FIFO Full flag */
+#define UART_FLAG_TxFIFOFull        0x45    /* Transmit FIFO Full flag */
+#define UART_FLAG_RxFIFOEmpty       0x44    /* Receive FIFO Empty flag */
+#define UART_FLAG_Busy              0x43    /* UART Busy flag */
+#define UART_FLAG_CTS               0x40    /* CTS flag */
+#define UART_RawIT_OverrunError     0x6A    /* Overrun Error Masked IT flag */
+#define UART_RawIT_BreakError       0x69    /* Break Error Masked IT flag */
+#define UART_RawIT_ParityError      0x68    /* Parity Error Masked IT flag */
+#define UART_RawIT_FrameError       0x67    /* Frame Error Masked IT flag */
+#define UART_RawIT_ReceiveTimeOut   0x66    /* ReceiveTimeOut Masked IT flag */
+#define UART_RawIT_Transmit         0x65    /* Transmit Masked IT flag */
+#define UART_RawIT_Receive          0x64    /* Receive Masked IT flag */
+#define UART_RawIT_CTS              0x61    /* CTS Masked IT flag */
+
+/* UART LIN break length */
+#define UART_LINBreakLength_10      0x0000  /* 10 low bits */
+#define UART_LINBreakLength_11      0x0200  /* 11 low bits */
+#define UART_LINBreakLength_12      0x0400  /* 12 low bits */
+#define UART_LINBreakLength_13      0x0600  /* 13 low bits */
+#define UART_LINBreakLength_14      0x0800  /* 14 low bits */
+#define UART_LINBreakLength_15      0x0A00  /* 15 low bits */
+#define UART_LINBreakLength_16      0x0C00  /* 16 low bits */
+#define UART_LINBreakLength_17      0x0E00  /* 17 low bits */
+#define UART_LINBreakLength_18      0x1000  /* 18 low bits */
+#define UART_LINBreakLength_19      0x1200  /* 19 low bits */
+#define UART_LINBreakLength_20      0x1400  /* 20 low bits */
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void UART_DeInit(UART_TypeDef* UARTx);
+void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct);
+void UART_StructInit(UART_InitTypeDef* UART_InitStruct);
+void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState);
+void UART_ITConfig(UART_TypeDef* UARTx, u16 UART_IT, FunctionalState NewState);
+void UART_DMAConfig(u16 UART0_DMATransfer, u16 UART0_DMAOnError);
+void UART_DMACmd(u16 UART0_DMAReq, FunctionalState NewState);
+void UART_LoopBackConfig(UART_TypeDef* UARTx, FunctionalState NewState);
+void UART_LINConfig(UART_TypeDef* UARTx, u16 UART_LINBreakLength);
+void UART_LINCmd(UART_TypeDef* UARTx, FunctionalState NewState);
+void UART_SendData(UART_TypeDef* UARTx, u8 Data);
+u8 UART_ReceiveData(UART_TypeDef* UARTx);
+void UART_SendBreak(UART_TypeDef* UARTx);
+void UART_RTSConfig(UART_TypeDef* UARTx,UART_RTSTypeDef RTSState);
+FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, u16 UART_FLAG);
+void UART_ClearFlag(UART_TypeDef* UARTx, u16 UART_FLAG);
+ITStatus UART_GetITStatus(UART_TypeDef* UARTx, u16 UART_IT);
+void UART_ClearITPendingBit(UART_TypeDef* UARTx, u16 UART_IT);
+
+#endif /* __75x_UART_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/75x_wdg.h

@@ -0,0 +1,62 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_wdg.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      WDG software library.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __75x_WDG_H
+#define __75x_WDG_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_map.h"
+
+/* Exported types ------------------------------------------------------------*/
+ typedef struct
+{
+  u16 WDG_Mode;       /* Watchdog or Timer mode */
+  u16 WDG_Preload;    /* Preload register */
+  u8 WDG_Prescaler;   /* Prescaler register */
+}WDG_InitTypeDef;
+/* Exported constants --------------------------------------------------------*/
+
+/* WDG/Timer Select */
+#define WDG_Mode_WDG       0x0001
+#define WDG_Mode_Timer     0xFFFE
+
+/* WDG End of Count interrupt request */
+#define WDG_IT_EC          0x0001
+
+/* WDG end of count Flag */
+#define WDG_FLAG_EC        0x0001
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void WDG_DeInit(void);
+void WDG_Init(WDG_InitTypeDef* WDG_InitStruct);
+void WDG_StructInit(WDG_InitTypeDef* WDG_InitStruct);
+void WDG_Cmd(FunctionalState NewState);
+void WDG_ITConfig(FunctionalState NewState);
+u16 WDG_GetCounter(void);
+FlagStatus WDG_GetFlagStatus(void);
+void WDG_ClearFlag(void);
+ITStatus WDG_GetITStatus(void);
+void WDG_ClearITPendingBit(void);
+
+#endif /* __WDG_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/inc/lcd.h

@@ -0,0 +1,120 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : lcd.h
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file contains all the functions prototypes for the
+*                      lcd software driver.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Define to prevent recursive inclusion ---------------------------------------*/
+#ifndef __LCD_H
+#define __LCD_H
+
+/* Includes --------------------------------------------------------------------*/
+#include "75x_lib.h"
+
+/* Exported types --------------------------------------------------------------*/
+
+  /* Data lines configuration mode */
+  typedef enum
+  {
+    Input,
+    Output
+  } DataConfigMode_TypeDef;
+
+  /* Text color mode */
+  typedef enum
+  {
+    BlackText=0,
+    WhiteText=1
+  } TextColorMode_TypeDef;
+
+  /* Dot On/Off mode */
+  typedef enum
+  {
+    Dot_On,
+    Dot_Off
+  } DotMode_TypeDef;
+
+/* Exported constants ----------------------------------------------------------*/
+
+/* LCD Control pins */
+#define CtrlPin_E2           0x00000001
+#define CtrlPin_E1           0x00000002
+#define CtrlPin_RW           0x00000004
+#define CtrlPin_DI           0x00000008
+
+/* LCD Commands */
+#define DISPLAY_ON             0xAF
+#define DISPLAY_OFF            0xAE
+#define START_LINE             0xC0
+#define START_COLUMN           0x00
+#define CLOCKWISE_OUTPUT       0xA0
+#define DYNAMIC_DRIVE 	       0xA4
+#define DUTY_CYCLE             0xA9
+#define READ_MODIFY_WRITE_OFF  0xEE
+#define SOFTWARE_RESET         0xE2
+
+/* LCD Lines when LCD is managed as 2*17 characters */
+#define Line1    0x0
+#define Line2    0x2
+
+/* Exported macro --------------------------------------------------------------*/
+/* Exported functions ----------------------------------------------------------*/
+/*----- Low layer function -----*/
+void LCD_CtrlLinesConfig(void);
+void LCD_CtrlLinesWrite(GPIO_TypeDef* GPIOx, u32 CtrlPins, BitAction BitVal);
+void LCD_DataLinesConfig(DataConfigMode_TypeDef Mode);
+void LCD_DataLinesWrite(GPIO_TypeDef* GPIOx, u32 PortVal);
+
+/*----- Medium layer function -----*/
+void LCD_CheckMasterStatus(void);
+void LCD_CheckSlaveStatus(void);
+void LCD_SendMasterCmd(u8 Cmd);
+void LCD_SendSlaveCmd(u8 Cmd);
+void LCD_SendMasterData(u8 Data);
+u32 LCD_ReadMasterData(void);
+void LCD_SendSlaveData(u8 Data);
+u32 LCD_ReadSlaveData(void);
+void LCD_SetMasterPage(u8 Page); 	
+void LCD_SetSlavePage(u8 Page);
+void LCD_SetMasterColumn(u8 Address);
+void LCD_SetSlaveColumn(u8 Address);
+void LCD_DrawChar(u8 Line, u8 Column, u8 Width, u8 *Bmp);
+u8 LCD_HexToAsciiLow(u8 byte);
+u8 LCD_HexToAsciiHigh(u8 byte);
+void LCD_SetTextColor(TextColorMode_TypeDef TextColor);
+
+/*----- High layer function -----*/
+void LCD_Init(void);
+/* LCD managed as 2 Lines, 17 characters each one (2Lines*17Char) */
+void LCD_ClearLine(u8 Line);
+void LCD_DisplayChar(u8 Line, u8 Column, u8 Ascii, TextColorMode_TypeDef CharMode);
+void LCD_DisplayString(u8 Line, u8 *ptr, TextColorMode_TypeDef CharMode);
+void LCD_Printf(u8* ptr, ...);
+/* LCD managed as 122*32 dots */
+void LCD_ClearMaster(void);
+void LCD_ClearSlave(void);
+void LCD_Clear(void);
+void LCD_DrawMasterGraphic(u8 *Bmp);
+void LCD_DrawSlaveGraphic(u8 *Bmp);
+void LCD_DrawGraphic(u8 *Bmp);
+void LCD_ScrollGraphic(u8 *Bmp, u32 nCount);
+void LCD_DrawPixel(u8 XPos, u8 YPos, DotMode_TypeDef Mode);
+void LCD_DrawLine(u8 XPos1, u8 YPos1, u8 XPos2, u8 YPos2);
+void LCD_DrawBox(u8 XPos, u8 YPos, u8 Dx, u8 Dy);
+
+#endif /*__LCD_H */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE******/

Demo/ARM7_STR75x_GCC/STLibrary/src/75x_adc.c

@@ -0,0 +1,869 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_adc.c
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file provides all the ADC software functions.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_adc.h"
+#include "75x_mrcc.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* Mask for Power Down Mode */
+#define ADC_PowerDown_Enable  0x8000
+#define ADC_PowerDown_Disable 0x7FFF
+
+/* Mask for Watchdog Thresholds Enable */
+#define ADC_AnalogWatchdog_Enable  0x8000
+#define ADC_AnalogWatchdog_Disable 0x7FFF
+
+/* Mask for Injected conversion start */
+#define ADC_Injec_ConversionStart  0x8000
+
+/* DMA enable */
+#define ADC_DMA_ExtEnable_Mask  0x4000
+
+/* Injected start trigger enable */
+#define ADC_Injec_ExtTrigger_Enable   0x4000
+
+/* ADC Masks */
+#define ADC_DMAFirstEnabledChannel_Mask  0x000F 
+#define ADC_DataRegisterOffset           0x0050
+#define ADC_FirstChannel_Mask            0xFFF0
+#define ADC_ChannelNumber_Mask           0xFC3F
+#define ADC_Threshold_Mask               0xFC00
+#define ADC_AnalogWatchdogChannel_Mask   0xC3FF
+#define ADC_Prescalers_Mask              0x7F18
+#define ADC_SPEN_Mask                    0x8000
+#define ADC_FallingEdge_Mask             0xEFFF
+#define ADC_LowLevel_Mask                0x4000
+#define ADC_HighLevel_Mask               0xDFFF
+#define ADC_Calibration_Mask             0x0002
+	
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name  : ADC_DeInit                                           
+* Description    : Deinitializes the ADC peripheral registers to their default
+*                  reset values.
+* Input          : None.  
+* Output         : None                                              
+* Return         : None.                                                
+*******************************************************************************/
+void ADC_DeInit(void)
+{
+  /* Reset the ADC registers values*/
+  MRCC_PeripheralSWResetConfig(MRCC_Peripheral_ADC,ENABLE);
+  MRCC_PeripheralSWResetConfig(MRCC_Peripheral_ADC,DISABLE); 
+}
+
+/*******************************************************************************
+* Function Name  : ADC_Init                                                 
+* Description    : Initializes the ADC  peripheral according to the specified
+*                  parameters in the ADC_InitStruct.
+* Input          : - ADC_InitStruct: pointer to an ADC_InitTypeDef structure that
+                   contains the configuration information for the ADC peripheral.
+* Output         : None                                                      
+* Return         : None                                                      
+*******************************************************************************/
+void ADC_Init(ADC_InitTypeDef* ADC_InitStruct)
+{
+  /* Configure the conversion mode */
+  if(ADC_InitStruct->ADC_ConversionMode == ADC_ConversionMode_Scan)
+  {
+    /* Set the scan conversion mode */
+    ADC->CLR2 |= ADC_ConversionMode_Scan;
+  }
+  else
+  {
+    /* Set the one-shot conversion mode */
+    ADC->CLR2 &= ADC_ConversionMode_OneShot;
+  }
+  
+  /* Configure the external start conversion trigger */
+  switch(ADC_InitStruct->ADC_ExtTrigger)
+  {
+    case ADC_ExtTrigger_HighLevel:
+      /* Start conversion on High level of the external trigger (TIM0) */
+      ADC->CLR0 &= ADC_HighLevel_Mask;
+      ADC->CLR0 |= ADC_ExtTrigger_HighLevel;
+      break;
+      
+    case ADC_ExtTrigger_LowLevel:
+      /* Start conversion on low level of the external trigger (TIM0) */
+      ADC->CLR0 &= ADC_ExtTrigger_LowLevel; 
+      ADC->CLR0 |= ADC_LowLevel_Mask;
+      break;
+      
+    case ADC_ExtTrigger_RisingEdge:
+      /* Start conversion on rising edge of the external trigger (TIM0) */
+      ADC->CLR0 |= ADC_ExtTrigger_RisingEdge;
+      break;
+    
+    case ADC_ExtTrigger_FallingEdge:
+      /* Start conversion on falling edge of the external trigger (TIM0) */
+      ADC->CLR0 &= ADC_FallingEdge_Mask;
+      ADC->CLR0 |= ADC_ExtTrigger_FallingEdge;
+      break;
+    
+    case ADC_ExtTrigger_Disable:
+      /* Disable the external trigger and start the conversion by software */
+      ADC->CLR0 &= ADC_ExtTrigger_Disable;
+      break;
+
+    default:
+      break; 
+  }
+
+  /* Configure the auto clock off feature */
+  if (ADC_InitStruct->ADC_AutoClockOff == ADC_AutoClockOff_Enable)
+  {
+    /* Enable the auto clock off feature */
+    ADC->CLR4 |= ADC_AutoClockOff_Enable;
+  }
+  else
+  {
+    /* Disable the auto clock off feature */
+    ADC->CLR4 &= ADC_AutoClockOff_Disable;	
+  }
+  
+  /* Clear conversion prescaler CNVP[2:0], sampling prescaler SMPP[2:0] bits 
+     and Sample prescaler enable SPEN bit */
+  ADC->CLR1 &= ADC_Prescalers_Mask;
+  /* Set conversion prescaler value (sampling and conversion prescalers are equal
+     while SPEN bit is reset */ 
+  ADC->CLR1 |= (ADC_InitStruct->ADC_ConversionPrescaler<<5);
+  
+  /* In case ADC_SamplingPrescaler member is different from the conversion one */
+  if(ADC_InitStruct->ADC_SamplingPrescaler != ADC_InitStruct->ADC_ConversionPrescaler)
+  {
+    /* Set the sampling prescaler value */
+    ADC->CLR1 |= ADC_InitStruct->ADC_SamplingPrescaler;
+    /* Set SPEN bit (sampling and conversion prescalers are different */
+    ADC->CLR1 = (ADC->CLR1 | ADC_SPEN_Mask);	
+  }
+  
+  /* Clear first channel to be converted FCH[3:0] bits */
+  ADC->CLR2 &= ADC_FirstChannel_Mask;
+  /* Set the first channel to be converted */
+  ADC->CLR2 |= ADC_InitStruct->ADC_FirstChannel;
+  /* Clear number of channels to be converted NCH[3:0] bits */
+  ADC->CLR2 &= ADC_ChannelNumber_Mask;  
+  /* Set the number of channels to be converted */
+  ADC->CLR2 |= ((ADC_InitStruct->ADC_ChannelNumber)-1<<6);
+}
+
+/*******************************************************************************
+* Function Name  : ADC_StructInit                                       
+* Description    : Fills each ADC_InitStruct member with its default value.
+* Input          : - ADC_InitStruct: pointer to an ADC_InitTypeDef structure
+                     which will be initialized.  
+* Output         : None 
+* Return         : None.
+*******************************************************************************/
+void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
+{
+  /* Initialize the ADC_ConversionMode member */
+  ADC_InitStruct->ADC_ConversionMode = ADC_ConversionMode_OneShot;
+  
+  /* Initialize the ADC_ExtTrigger member */
+  ADC_InitStruct->ADC_ExtTrigger = ADC_ExtTrigger_Disable;
+  
+  /* Initialize the ADC_AutoClockOff member */
+  ADC_InitStruct->ADC_AutoClockOff = ADC_AutoClockOff_Disable;
+  
+  /* Initialize the ADC_SamplingPrescaler member */
+  ADC_InitStruct->ADC_SamplingPrescaler = 0;
+  
+  /* Initialize the ADC_ConversionPrescaler member */
+  ADC_InitStruct->ADC_ConversionPrescaler = 0;
+  
+  /* Initialize the ADC_FirstChannel member */
+  ADC_InitStruct->ADC_FirstChannel = ADC_CHANNEL0;
+  
+  /* Initialize the ADC_ChannelNumber member */
+  ADC_InitStruct->ADC_ChannelNumber = 1;
+ }
+
+/*******************************************************************************
+* Function Name  : ADC_StartCalibration                                       
+* Description    : Starts the ADC Calibration. Calibration average enabled/disabled.
+* Input          : - ADC_CalibAverage: Enables or disables ADC calibration average.
+*                    This parameter can be one of the following values:
+*                         - ADC_CalibAverage_Enable:  enable calibration average 
+*                         - ADC_CalibAverage_Disable: disable calibration average  
+* Output         : None 
+* Return         : None                                                       
+*******************************************************************************/
+void ADC_StartCalibration(u16 ADC_CalibAverage)
+{
+  if (ADC_CalibAverage == ADC_CalibAverage_Enable)
+  {
+    /* Enable ADC Calibration Average */
+    ADC->CLR4 &= ADC_CalibAverage_Enable;
+  }
+  else
+  {
+    /* Disable ADC Calibration Average */
+    ADC->CLR4 |= ADC_CalibAverage_Disable;
+  }
+
+  /* Start Calibration */
+  ADC->CLR0 |= ADC_Calibration_ON;
+}
+
+/*******************************************************************************
+* Function Name  : ADC_GetCalibrationStatus
+* Description    : Get the ADC Calibration Status.
+* Input          : None
+* Output         : None 
+* Return         : The NewState of the ADC calibration (SET or RESET).
+*******************************************************************************/
+FlagStatus ADC_GetCalibrationStatus(void)
+{
+  /* Check the status of the ADC calibration */
+  if((ADC->CLR0 & ADC_Calibration_Mask) != RESET)
+  {
+    /* Return SET if ADC Calibration is on going */
+    return SET;
+  }
+  else
+  {
+    /* Return RESET if ADC Calibration is finished */
+    return RESET;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_ConversionCmd
+* Description    : Starts or stops the ADC conversion.
+* Input          : - ADC_Conversion: specifies the ADC command to apply.
+*                    This parameter can be one of the following values:
+*                         - ADC_Conversion_Start: start conversion 
+*                         - ADC_Conversion_Stop:  stop conversion 
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_ConversionCmd (u16 ADC_Conversion)
+{
+  if (ADC_Conversion == ADC_Conversion_Start)
+  {
+    /* Start the ADC Conversion */
+    ADC->CLR0 |= ADC_Conversion_Start;
+  }
+  else
+  {
+    /* Stop the ADC Conversion */
+    ADC->CLR0 &= ADC_Conversion_Stop;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_GetSTARTBitStatus
+* Description    : Gets the ADC START/STOP bit Status.
+* Input          : None
+* Output         : None 
+* Return         : The NewState of the ADC START/STOP bit (SET or RESET).
+*******************************************************************************/
+FlagStatus ADC_GetSTARTBitStatus(void)
+{
+  /* Check the status of the ADC START/STOP bit */
+  if((ADC->CLR0 & ADC_Conversion_Start) != RESET)
+  {
+    /* Return SET if ADC Conversion is started */
+    return SET;
+  }
+  else
+  {
+    /* Return RESET if ADC Conversion is stopped */
+    return RESET;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_Cmd
+* Description    : Enables the ADC peripheral or puts it in power down mode.
+*                  - NewState: new state of the ADC peripheral. 
+*                    This parameter can be: ENABLE or DISABLE.
+* Output         : None  
+* Return         : None.
+*******************************************************************************/
+void ADC_Cmd(FunctionalState NewState)
+{
+  if (NewState == DISABLE)
+  {
+    /* Enable ADC Power Down Mode */
+    ADC->CLR4 |= ADC_PowerDown_Enable;
+  }
+  else
+  {
+    /* Disable ADC Power Down Mode */
+    ADC->CLR4 &= ADC_PowerDown_Disable;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_AutoClockOffConfig                                
+* Description    : Enables or disables the Auto clock off feature.
+*                  - NewState: new state of the Auto clock off feature. This 
+*                    parameter can be: ENABLE or DISABLE.  
+* Output         : None   
+* Return         : None.                                                 
+*******************************************************************************/
+void ADC_AutoClockOffConfig(FunctionalState NewState)
+{
+  if (NewState == ENABLE)
+  {
+    /* Enable ADC Auto Clock Off */
+    ADC->CLR4 |= ADC_AutoClockOff_Enable;
+  }
+  else
+  {
+    /* Disable ADC Auto Clock Off */
+    ADC->CLR4 &= ADC_AutoClockOff_Disable;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_AnalogWatchdogConfig                                       
+* Description    : Configures the analog input channel to be used for the selected
+*                  Analog Watchdog and defines its corresponding High and Low 
+*                  threshold values.               
+* Input          : - ADC_AnalogWatchdog: specifies the analog watchdog which will
+*                    be affected to the desired converted channel. This parameter
+*                    can be one of the following values: 
+*                     - ADC_AnalogWatchdog0: select analog watchdog 0
+*                     - ADC_AnalogWatchdog1: select analog watchdog 1
+*                     - ADC_AnalogWatchdog2: select analog watchdog 2
+*                     - ADC_AnalogWatchdog3: select analog watchdog 3
+*                  - ADC_CHANNEL: specifies the channel linked to the selected 
+*                    analog watchdog. This parameter can be ADC_CHANNELx where x 
+*                    can be (0..15)                    
+*                  - LowThreshold: Low Threshold for the selected Analog watchdog
+*                  - HighThreshold: High Threshold for the selected Analog watchdog
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_AnalogWatchdogConfig(u16 ADC_AnalogWatchdog, u8 ADC_CHANNEL, 
+                              u16 LowThreshold, u16 HighThreshold)
+{
+  switch (ADC_AnalogWatchdog)
+  {
+    /* Set the selected channel and their corresponding High and Low thresholds */
+    case ADC_AnalogWatchdog0 :
+      ADC->TRA0 = (ADC->TRA0 & ADC_AnalogWatchdogChannel_Mask) | ((u16) ADC_CHANNEL<<10);
+      ADC->TRA0 = (ADC->TRA0 & ADC_Threshold_Mask) |  HighThreshold;
+      ADC->TRB0 = (ADC->TRB0 & ADC_Threshold_Mask) |  LowThreshold;
+      break;
+
+    case ADC_AnalogWatchdog1 :
+      ADC->TRA1 = (ADC->TRA1 & ADC_AnalogWatchdogChannel_Mask) | ((u16) ADC_CHANNEL<<10);
+      ADC->TRA1 = (ADC->TRA1 & ADC_Threshold_Mask) |  HighThreshold;
+      ADC->TRB1 = (ADC->TRB1 & ADC_Threshold_Mask) |  LowThreshold;
+      break;
+
+    case ADC_AnalogWatchdog2 :
+      ADC->TRA2 = (ADC->TRA2 & ADC_AnalogWatchdogChannel_Mask) | ((u16) ADC_CHANNEL<<10);
+      ADC->TRA2 = (ADC->TRA2 & ADC_Threshold_Mask) |  HighThreshold;
+      ADC->TRB2 = (ADC->TRB2 & ADC_Threshold_Mask) |  LowThreshold;
+      break;
+
+    case ADC_AnalogWatchdog3 :
+      ADC->TRA3 = (ADC->TRA3 & ADC_AnalogWatchdogChannel_Mask) | ((u16) ADC_CHANNEL<<10);
+      ADC->TRA3 = (ADC->TRA3 & ADC_Threshold_Mask) |  HighThreshold;
+      ADC->TRB3 = (ADC->TRB3 & ADC_Threshold_Mask) |  LowThreshold;
+      break;
+
+    default:
+      break; 
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_AnalogWatchdogCmd                                   
+* Description    : Enables or disables the selected analog Watchdog.
+* Input          : - ADC_AnalogWatchdog: specifies the analog watchdog to be 
+*                    enabled or disabled. This parameter can be one of the 
+*                    following values: 
+*                     - ADC_AnalogWatchdog0: select analog watchdog 0
+*                     - ADC_AnalogWatchdog1: select analog watchdog 1
+*                     - ADC_AnalogWatchdog2: select analog watchdog 2
+*                     - ADC_AnalogWatchdog3: select analog watchdog 3
+*                  - NewState: new state of the specified analog watchdog.
+*                    This parameter can be: ENABLE or DISABLE.
+* Output         : None
+* Return         : None.                                                   
+*******************************************************************************/
+void ADC_AnalogWatchdogCmd(u16 ADC_AnalogWatchdog, FunctionalState NewState)
+{
+  if (NewState == ENABLE)
+  {
+    /* Enable the selected ADC AnalogWatchdogx */
+    switch (ADC_AnalogWatchdog)
+    {
+      case ADC_AnalogWatchdog0 : 
+        ADC->TRB0 |= ADC_AnalogWatchdog_Enable;
+        break;
+
+      case ADC_AnalogWatchdog1 : 
+        ADC->TRB1 |= ADC_AnalogWatchdog_Enable;  
+        break;
+
+      case ADC_AnalogWatchdog2 : 
+        ADC->TRB2 |= ADC_AnalogWatchdog_Enable;  
+        break;
+
+      case ADC_AnalogWatchdog3 : 
+        ADC->TRB3 |= ADC_AnalogWatchdog_Enable;  
+        break;
+
+      default:
+        break; 
+    }
+  }
+  else
+  {
+    /* Disable the selected ADC AnalogWatchdogx */
+    switch (ADC_AnalogWatchdog)
+    {
+      case ADC_AnalogWatchdog0 : 
+        ADC->TRB0 &= ADC_AnalogWatchdog_Disable;  
+        break;
+
+      case ADC_AnalogWatchdog1 : 
+        ADC->TRB1 &= ADC_AnalogWatchdog_Disable;  
+        break;
+
+      case ADC_AnalogWatchdog2 : 
+        ADC->TRB2 &= ADC_AnalogWatchdog_Disable;  
+        break;
+
+      case ADC_AnalogWatchdog3 : 
+        ADC->TRB3 &= ADC_AnalogWatchdog_Disable;  
+        break;
+
+      default:
+        break; 
+    }
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_GetAnalogWatchdogResult
+* Description    : Returns the comparison result of the selected analog watchdog.
+* Input          : - ADC_AnalogWatchdog: specifies the analog watchdog channel 
+*                    which its comparison result will be returned. This parameter
+*                    can be one of the following values: 
+*                     - ADC_AnalogWatchdog0: select analog watchdog 0
+*                     - ADC_AnalogWatchdog1: select analog watchdog 1
+*                     - ADC_AnalogWatchdog2: select analog watchdog 2
+*                     - ADC_AnalogWatchdog3: select analog watchdog 3
+* Output         : None
+* Return         : The analog watchdog comparaison result value
+*******************************************************************************/
+u16 ADC_GetAnalogWatchdogResult(u16 ADC_AnalogWatchdog)
+{
+  /* Return the selected ADC AnalogWatchdogx comparaison result */
+  switch(ADC_AnalogWatchdog)
+  {
+    case ADC_AnalogWatchdog0 :
+      return ((ADC->PBR & ADC_AnalogWatchdog)>>4);
+
+    case ADC_AnalogWatchdog1 :
+      return ((ADC->PBR & ADC_AnalogWatchdog)>>6);
+
+    case ADC_AnalogWatchdog2 :
+      return ((ADC->PBR & ADC_AnalogWatchdog)>>8);
+
+    case ADC_AnalogWatchdog3 :
+      return ((ADC->PBR & ADC_AnalogWatchdog)>>10);
+
+    default : return (0xFF);  /* if a wrong value of ADC_AnalogWatchdog is selected */
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_InjectedConversionConfig
+* Description    : Configures the start trigger level for the injected channels 
+*                  and the injected analog input channels to be converted. 
+* Input          : - ADC_Injec_ExtTrigger: specifies the start trigger level.
+*                    This parameter can be one of the following values:
+*                         - ADC_Injec_ExtTrigger_Disable : external trigger disabled
+*                         - ADC_Injec_ExtTrigger_RisingEdge: external trigger
+*                           configured as rising edge of PWM Timer TRGO signal
+*                         - ADC_Injec_ExtTrigger_FallingEdge: external trigger 
+*                           configured as falling edge of PWM Timer TRGO signal 
+*                  - FirstChannel: specifies the first injected channel to be
+*                    converted. 
+*                    This parameter can be ADC_CHANNELx  where x can be (0..15). 
+*                  - ChannelNumber: specifies the Number of the injected channels 
+*                    to be converted. This parameter can be a  value from 1 to 16.    
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_InjectedConversionConfig(u16 ADC_Injec_ExtTrigger, u8 FirstChannel, u8 ChannelNumber)
+{
+  /* Configure the external start injected conversion trigger */
+  switch (ADC_Injec_ExtTrigger)
+  {
+    case ADC_Injec_ExtTrigger_Disable  :
+      /* Disable the external trigger and start the injected conversion by software */
+      ADC->CLR3 &= ADC_Injec_ExtTrigger_Disable ;
+      break;
+    case ADC_Injec_ExtTrigger_RisingEdge :
+      /* Start injected conversion on rising edge of the external trigger (PWM) */
+      ADC->CLR3 |= ADC_Injec_ExtTrigger_RisingEdge;
+      break;
+    case ADC_Injec_ExtTrigger_FallingEdge :
+      /* Start injected conversion on falling edge of the external trigger (PWM) */
+      ADC->CLR3 |= ADC_Injec_ExtTrigger_Enable; 
+      ADC->CLR3 &= ADC_Injec_ExtTrigger_FallingEdge;
+      break;
+
+    default:
+      break;
+  }
+  
+  /* Clear first injected channel to be converted JFCH[3:0] bits */
+  ADC->CLR3 &= ADC_FirstChannel_Mask;
+  /* Set the first injected channel to be converted */
+  ADC->CLR3 |= FirstChannel;
+  /* Clear number of injected channels to be converted JNCH[3:0] bits */
+  ADC->CLR3 &= ADC_ChannelNumber_Mask;  
+  /* Set the number of injected channels to be converted */
+  ADC->CLR3 |= ((ChannelNumber-1)<<6);
+}
+
+/*******************************************************************************
+* Function Name  : ADC_StartInjectedConversion
+* Description    : Starts by software the conversion of the injected input channels.
+* Input          : None
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_StartInjectedConversion(void)
+{
+  /* Start the injected ADC Conversion */
+  ADC->CLR3 |= ADC_Injec_ConversionStart;
+}
+
+/*******************************************************************************
+* Function Name  : ADC_GetConversionValue
+* Description    : Reads the conversion result from the appropriate data register.
+* Input          : - ADC_CHANNEL :specifies the ADC channel which its conversion 
+*                    value have to be returned. This parameter can be ADC_CHANNELx
+*                    where x can be (0..15) to select channelx  
+* Output         : None
+* Return         : The returned value holds the conversion result of the selected   
+*                  channel.
+*******************************************************************************/
+u16 ADC_GetConversionValue(u8 ADC_CHANNEL)
+{
+  /* Return the conversion result of the selected channel */
+  return *((u16 *)(ADC_BASE + ((ADC_CHANNEL<<2) + ADC_DataRegisterOffset)));
+}
+
+/*******************************************************************************
+* Function Name  : ADC_ITConfig
+* Description    : Enables or disables the specified ADC interrupts.
+* Input          : - ADC_IT: specifies the ADC interrupts to be enabled or disabled.
+*                    This parameter can be any combination of the following values:
+*                         - ADC_IT_ECH:  End of chain conversion interrupt
+*                         - ADC_IT_EOC:  End of channel conversion interrupt
+*                         - ADC_IT_JECH: Injected end of chain conversion interrupt
+*                         - ADC_IT_JEOC: Injected end of channel conversion interrupt
+*                         - ADC_IT_AnalogWatchdog0_LowThreshold:
+*                                        Analog Watchdog 0 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog0_HighThreshold:
+*                                        Analog Watchdog 0 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog1_LowThreshold:
+*                                        Analog Watchdog 1 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog1_HighThreshold:
+*                                        Analog Watchdog 1 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog2_LowThreshold:
+*                                        Analog Watchdog 2 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog2_HighThreshold:
+*                                        Analog Watchdog 2 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog3_LowThreshold:
+*                                        Analog Watchdog 3 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog3_HighThreshold:
+*                                         Analog Watchdog 5 HighThreshold interrupt
+*                         - ADC_IT_ALL:  All interrupts
+*                  - NewState: new state of the specified ADC interrupts.
+*                    This parameter can be: ENABLE or DISABLE.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_ITConfig(u16 ADC_IT, FunctionalState NewState)
+{
+  if (NewState == ENABLE)
+  {
+    /* Enable the selected ADC interrupts */
+    ADC->IMR |= ADC_IT;
+  }
+  else
+  {
+    /* Disable the selected ADC interrupts */
+    ADC->IMR &= ~ADC_IT;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_DMAConfig
+* Description    : Configures the ADC<44>s DMA interface.
+* Input          : - ADC_DMA_CHANNEL: specifies the channels to be enabled or 
+*                    disabled for DMA transfer. This parameter can be any 
+*                    combination of ADC_DMA_CHANNELx where x can be (0..15). 
+*                  - NewState: new state of the specified ADC DMA channels.
+*                    This parameter can be: ENABLE or DISABLE.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_DMAConfig(u16 ADC_DMA_CHANNEL, FunctionalState NewState)
+{
+  if(NewState == ENABLE)
+  {
+    /* Enable DMA for the selected channels */
+    ADC->DMAR |= ADC_DMA_CHANNEL ;
+  }
+  else
+  {
+    /* Disable DMA for the selected channels */
+    ADC->DMAR &= ~ADC_DMA_CHANNEL;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_DMACmd
+* Description    : Enable or disable the DMA transfer for the ADC.
+* Input          : - ADC_DMA: specifies the DMA command. This parameter can be 
+*                    one of the following values:
+*                         - ADC_DMA_Disable: disable the DMA capability
+*                         - ADC_DMA_Enable: enabled by setting the global 
+*                           enable bit
+*                         - ADC_DMA_ExtTrigger_HighLevel: enabled by detection of
+*                           high level of TIM2 OC2 signal
+*                         - ADC_DMA_ExtTrigger_LowLevel: enabled by detection of
+*                           low level of TIM2 OC2 signal
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_DMACmd(u16 ADC_DMA)
+{
+  /* Configure the DMA external trigger enable */
+  switch (ADC_DMA)
+  {
+    case ADC_DMA_Disable :
+      /* Disable DMA transfer */
+      ADC->DMAE &= ADC_DMA_Disable;
+      break;
+      
+    case ADC_DMA_Enable :
+      /* Enable DMA transfer */
+      ADC->DMAE |= ADC_DMA_Enable;
+      break;
+      
+    case ADC_DMA_ExtTrigger_HighLevel :
+      /* Enable DMA transfer on high level of the external trigger (TIM2) */
+      ADC->DMAE &= ADC_DMA_Disable;
+      ADC->DMAE |= ADC_DMA_ExtTrigger_HighLevel;
+      break;
+      
+    case ADC_DMA_ExtTrigger_LowLevel :
+      /* Enable DMA transfer on low level of the external trigger (TIM2) */
+      ADC->DMAE |= ADC_DMA_ExtEnable_Mask; 
+      ADC->DMAE &= ADC_DMA_ExtTrigger_LowLevel;
+      break;
+
+    default:
+      break;      
+  }  
+}
+
+/*******************************************************************************
+* Function Name  : ADC_GetDMAFirstEnabledChannel
+* Description    : Gets the first DMA-enabled channel configured at the time that
+*                  DMA was last globally enabled.
+* Input          : None
+* Output         : None
+* Return         : The first DMA enabled channel
+*******************************************************************************/
+u16 ADC_GetDMAFirstEnabledChannel(void)
+{
+  /* Return the DMA first enabled channel */
+  return (ADC->DMAE & ADC_DMAFirstEnabledChannel_Mask);
+}
+
+/*******************************************************************************
+* Function Name  : ADC_GetFlagStatus
+* Description    : Checks whether the specified ADC flag is set or not.
+* Input          : - ADC_FLAG: specifies the ADC flag to check. This parameter 
+*                    can be one of the following values:
+*                         - ADC_FLAG_ECH:  End of chain conversion Flag
+*                         - ADC_FLAG_EOC:  End of channel conversion Flag
+*                         - ADC_FLAG_JECH: End of injected chain conversion Flag
+*                         - ADC_FLAG_JEOC: End of injected channel conversion Flag
+*                         - ADC_FLAG_AnalogWatchdog0_LowThreshold:  
+*                                          Analog Watchdog 0 LowThreshold Flag        
+*                         - ADC_FLAG_AnalogWatchdog0_HighThreshold: 
+*                                          Analog Watchdog 0 HighThreshold Flag 	
+*                         - ADC_FLAG_AnalogWatchdog1_LowThreshold:  
+*                                          Analog Watchdog 1 LowThreshold Flag  	
+*                         - ADC_FLAG_AnalogWatchdog1_HighThreshold: 
+*                                          Analog Watchdog 1 HighThreshold Flag  	
+*                         - ADC_FLAG_AnalogWatchdog2_LowThreshold:  
+*                                          Analog Watchdog 2 LowThreshold Flag  	
+*                         - ADC_FLAG_AnalogWatchdog2_HighThreshold: 
+*                                          Analog Watchdog 2 HighThreshold Flag 	
+*                         - ADC_FLAG_AnalogWatchdog3_LowThreshold:  
+*                                          Analog Watchdog 3 LowThreshold Flag  	
+*                         - ADC_FLAG_AnalogWatchdog3_HighThreshold: 
+*                                          Analog Watchdog 3 HighThreshold Flag 
+* Output         : None	
+* Return         : The new state of the ADC_FLAG (SET or RESET).
+*******************************************************************************/
+FlagStatus ADC_GetFlagStatus(u16 ADC_FLAG)
+{
+  /* Check the status of the specified ADC flag */
+  if((ADC->PBR & ADC_FLAG) != RESET)
+  {
+    /* Return SET if ADC_FLAG is set */
+    return SET;
+  }
+  else
+  {
+    /* Return RESET if ADC_FLAG is reset */
+    return RESET;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_ClearFlag
+* Description    : Clears the ADC<44>s pending flags.  
+* Input          : - ADC_FLAG: specifies the flag to clear. This parameter can 
+*                    be any combination of the following values:
+*                         - ADC_FLAG_ECH:  End of chain conversion flag
+*                         - ADC_FLAG_EOC:  End of channel conversion flag
+*                         - ADC_FLAG_JECH: Injected end of chain conversion flag
+*                         - ADC_FLAG_JEOC: Injected end of channel conversion flag
+*                         - ADC_FLAG_AnalogWatchdog0_LowThreshold:  
+*                                         Analog Watchdog 0 LowThreshold flag        
+*                         - ADC_FLAG_AnalogWatchdog0_HighThreshold: 
+*                                         Analog Watchdog 0 HighThreshold flag 	
+*                         - ADC_FLAG_AnalogWatchdog1_LowThreshold:  
+*                                         Analog Watchdog 1 LowThreshold flag  	
+*                         - ADC_FLAG_AnalogWatchdog1_HighThreshold: 
+*                                         Analog Watchdog 1 HighThreshold flag  	
+*                         - ADC_FLAG_AnalogWatchdog2_LowThreshold:  
+*                                         Analog Watchdog 2 LowThreshold flag  	
+*                         - ADC_FLAG_AnalogWatchdog2_HighThreshold: 
+*                                         Analog Watchdog 2 HighThreshold flag 	
+*                         - ADC_FLAG_AnalogWatchdog3_LowThreshold:  
+*                                         Analog Watchdog 3 LowThreshold flag  	
+*                         - ADC_FLAG_AnalogWatchdog3_HighThreshold: 
+*                                         Analog Watchdog 3 HighThreshold flag  	
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_ClearFlag(u16 ADC_FLAG)
+{
+  /* Clear the selected ADC flag */ 
+  ADC->PBR = ADC_FLAG;
+}
+
+/*******************************************************************************
+* Function Name  : ADC_GetITStatus
+* Description    : Checks whether the specified ADC interrupt has occured or not.
+* Input          : - ADC_IT: specifies the ADC interrupt source to check. This 
+*                    parameter can be one of the following values:
+*                         - ADC_IT_ECH :End of chain conversion interrupt 
+*                         - ADC_IT_EOC :End of channel conversion interrupt
+*                         - ADC_IT_JECH :End of injected chain conversion interrupt
+*                         - ADC_IT_JEOC :End of injected channel conversion interrupt
+*                         - ADC_IT_AnalogWatchdog0_LowThreshold:  
+*                                         Analog Watchdog 0 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog0_HighThreshold: 
+*                                         Analog Watchdog 0 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog1_LowThreshold:  
+*                                         Analog Watchdog 1 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog1_HighThreshold: 
+*                                         Analog Watchdog 1 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog2_LowThreshold:  
+*                                         Analog Watchdog 2 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog2_HighThreshold: 
+*                                         Analog Watchdog 2 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog3_LowThreshold:  
+*                                         Analog Watchdog 3 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog3_HighThreshold: 
+*                                         Analog Watchdog 3 HighThreshold interrupt
+* Output         : None	
+* Return         : The new state of the ADC_IT (SET or RESET).
+*******************************************************************************/
+ITStatus ADC_GetITStatus(u16 ADC_IT)
+{
+  /* Check the status of the specified ADC interrupt */
+  if((ADC->PBR & ADC_IT) != RESET)
+  {
+    /* Return SET if the ADC interrupt flag is set */
+    return SET;
+  }
+  else
+  {
+    /* Return RESET if the ADC interrupt flag is reset */
+    return RESET;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : ADC_ClearITPendingBit
+* Description    : Clears the ADC<44>s interrupt pending bits.  
+* Input          : - ADC_IT: specifies the interrupt pending bit to clear. This 
+*                    parameter can be can be any combination of the following 
+*                    values:
+*                         - ADC_IT_ECH:  End of chain conversion interrupt
+*                         - ADC_IT_EOC:  End of channel conversion interrupt
+*                         - ADC_IT_JECH: Injected end of chain conversion interrupt
+*                         - ADC_IT_JEOC: Injected end of channel conversion interrupt
+*                         - ADC_IT_AnalogWatchdog0_LowThreshold:  
+*                                         Analog Watchdog 0 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog0_HighThreshold: 
+*                                         Analog Watchdog 0 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog1_LowThreshold:  
+*                                         Analog Watchdog 1 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog1_HighThreshold: 
+*                                         Analog Watchdog 1 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog2_LowThreshold:  
+*                                         Analog Watchdog 2 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog2_HighThreshold: 
+*                                         Analog Watchdog 2 HighThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog3_LowThreshold:  
+*                                         Analog Watchdog 3 LowThreshold interrupt
+*                         - ADC_IT_AnalogWatchdog3_HighThreshold: 
+*                                         Analog Watchdog 5 HighThreshold interrupt
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void ADC_ClearITPendingBit(u16 ADC_IT)
+{
+  /* Clear the selected ADC interrupts pending bits */
+  ADC->PBR = ADC_IT;
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/src/75x_can.c

@@ -0,0 +1,765 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_can.c
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file provides all the CAN software functions.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_can.h"
+#include "75x_mrcc.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/*----------------------------------------------------------------------------*/
+/* Macro Name     : xxx_ID_MSK, xxx_ID_ARB                                    */
+/* Description    : Form the Mask and Arbitration registers value to filter   */
+/*                  a range of identifiers or a fixed identifier, for standard*/
+/*                  and extended IDs                                          */
+/*----------------------------------------------------------------------------*/
+#define RANGE_ID_MSK(range_start, range_end)	(~((range_end) - (range_start)))
+#define RANGE_ID_ARB(range_start, range_end)	((range_start) & (range_end))
+
+#define FIXED_ID_MSK(id)	RANGE_ID_MSK((id), (id))
+#define FIXED_ID_ARB(id)	RANGE_ID_ARB((id), (id))
+
+#define STD_RANGE_ID_MSK(range_start, range_end)	((u16)((RANGE_ID_MSK((range_start), (range_end)) & 0x7FF) << 2))
+#define STD_RANGE_ID_ARB(range_start, range_end)	((u16)(RANGE_ID_ARB((range_start), (range_end)) << 2))
+
+#define STD_FIXED_ID_MSK(id)	((u16)((FIXED_ID_MSK(id) & 0x7FF) << 2))
+#define STD_FIXED_ID_ARB(id)	((u16)(FIXED_ID_ARB(id) << 2))
+
+#define EXT_RANGE_ID_MSK_L(range_start, range_end)	((u16)(RANGE_ID_MSK((range_start), (range_end)) >> 11))
+#define EXT_RANGE_ID_MSK_H(range_start, range_end)	((u16)(STD_RANGE_ID_MSK((range_start), (range_end)) | ((RANGE_ID_MSK((range_start), (range_end)) >> 27) & 0x03)))
+#define EXT_RANGE_ID_ARB_L(range_start, range_end)	((u16)(RANGE_ID_ARB((range_start), (range_end)) >> 11))
+#define EXT_RANGE_ID_ARB_H(range_start, range_end)	((u16)(STD_RANGE_ID_ARB((range_start), (range_end)) | ((RANGE_ID_ARB((range_start), (range_end)) >> 27) & 0x03)))
+
+#define EXT_FIXED_ID_MSK_L(id)	((u16)(FIXED_ID_MSK(id) >> 11))
+#define EXT_FIXED_ID_MSK_H(id)	((u16)(STD_FIXED_ID_MSK(id) | ((FIXED_ID_MSK(id) >> 27) & 0x03)))
+#define EXT_FIXED_ID_ARB_L(id)	((u16)(FIXED_ID_ARB(id) >> 11))
+#define EXT_FIXED_ID_ARB_H(id)	((u16)(STD_FIXED_ID_ARB(id) | ((FIXED_ID_ARB(id) >> 27) & 0x03)))
+
+/* macro to format the timing register value from the timing parameters*/
+#define CAN_TIMING(tseg1, tseg2, sjw, brp)	((((tseg2-1) & 0x07) << 12) | (((tseg1-1) & 0x0F) << 8) | (((sjw-1) & 0x03) << 6) | ((brp-1) & 0x3F))
+
+/* Private variables ---------------------------------------------------------*/
+/* array of pre-defined timing parameters for standard bitrates*/
+u16 CanTimings[] = {       /* value   bitrate     NTQ  TSEG1  TSEG2  SJW  BRP */
+  CAN_TIMING(11, 4, 4, 5), /* 0x3AC4  100 kbit/s  16   11     4      4    5   */
+  CAN_TIMING(11, 4, 4, 4), /* 0x3AC3  125 kbit/s  16   11     4      4    4   */
+  CAN_TIMING( 4, 3, 3, 4), /* 0x2383  250 kbit/s   8    4     3      3    4   */
+  CAN_TIMING(13, 2, 1, 1), /* 0x1C00  500 kbit/s  16   13     2      1    1   */
+  CAN_TIMING( 4, 3, 1, 1), /* 0x2300  1 Mbit/s     8    4     3      1    1   */
+};
+
+/* Private function prototypes -----------------------------------------------*/
+static u32 GetFreeIF(void);
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name  : CAN_DeInit                                                
+* Description    : Deinitializes the CAN peripheral registers to their default     
+*                  reset values.                                     
+* Input          : None                                                      
+* Output         : None                                                      
+* Return         : None                                                      
+*******************************************************************************/
+void CAN_DeInit (void)
+{
+  /* Reset the CAN registers values*/
+  MRCC_PeripheralSWResetConfig(MRCC_Peripheral_CAN,ENABLE);
+  MRCC_PeripheralSWResetConfig(MRCC_Peripheral_CAN,DISABLE);
+}
+
+/*******************************************************************************
+* Function Name  : CAN_Init                                                  
+* Description    : Initializes the CAN peripheral according to the specified 
+*                  parameters in the CAN_InitStruct.                                            
+* Input          : CAN_InitStruct: pointer to a CAN_InitTypeDef structure that
+*                  contains the configuration information for the CAN peripheral. 
+* Output         : None                                                      
+* Return         : None                                                      
+*******************************************************************************/
+void CAN_Init(CAN_InitTypeDef* CAN_InitStruct)
+{
+  CAN_EnterInitMode(CAN_CR_CCE | CAN_InitStruct->CAN_ConfigParameters);
+  CAN_SetBitrate(CAN_InitStruct->CAN_Bitrate);
+  CAN_LeaveInitMode();
+  CAN_LeaveTestMode();
+}
+
+/*******************************************************************************
+* Function Name  : CAN_StructInit		                        
+* Description    : Fills each CAN_InitStruct member with its reset value.	      
+* Input          : CAN_InitStruct : pointer to a CAN_InitTypeDef structure which       
+*                  will be initialized. 
+* Output         : None                  
+* Return         : None.						      
+*******************************************************************************/
+void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
+{
+/* Reset CAN init structure parameters values */
+  CAN_InitStruct->CAN_ConfigParameters = 0x0;
+  CAN_InitStruct->CAN_Bitrate = 0x2301;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_SetBitrate                                            
+* Description    : Setups a standard CAN bitrate.                              
+* Input          : bitrate: specifies the bit rate.                       
+* Output         : None                                                      
+* Return         : None                                                                         
+*******************************************************************************/
+void CAN_SetBitrate(u32 bitrate)
+{
+  CAN->BTR = CanTimings[bitrate];  /* write the predefined timing value */
+  CAN->BRPR = 0; 		     /* clear the Extended Baud Rate Prescaler */
+}
+
+/*******************************************************************************
+* Function Name  : CAN_SetTiming                                             
+* Description    : Setups the CAN timing with specific parameters             
+* Input          : - tseg1: specifies Time Segment before the sample point.
+*                    This parameter must be a number between 1 and 16.       
+*                  - tseg2: Time Segment after the sample point. This parameter 
+*                    must be a number between 1 and 8.        
+*                  - sjw: Synchronisation Jump Width. This parameter must be                 
+*                     a number between 1 and 4.
+*                  - brp: Baud Rate Prescaler. This parameter must be a number
+*                    between 1 and 1024.                                         
+* Output         : None                                                      
+* Return         : None                                                                       
+*******************************************************************************/
+void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp)
+{
+  CAN->BTR = CAN_TIMING(tseg1, tseg2, sjw, brp);
+  CAN->BRPR = ((brp-1) >> 6) & 0x0F;
+}
+
+/*******************************************************************************
+* Function Name  : GetFreeIF                                             
+* Description    : Searchs the first free message interface, starting from 0.  
+* Input          : None                                                      
+* Output         : None                                                      
+* Return         : A free message interface number (0 or 1) if found, else 2 
+*******************************************************************************/
+static u32 GetFreeIF(void)
+{
+  if ((CAN->sMsgObj[0].CRR & CAN_CRR_BUSY) == 0)
+    return 0;
+  else if ((CAN->sMsgObj[1].CRR & CAN_CRR_BUSY) == 0)
+    return 1;
+  else
+   return 2;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_SetUnusedMsgObj                                       
+* Description    : Configures the message object as unused                   
+* Input          : msgobj: specifies the Message object number, from 0 to 31.                      
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Interface to treat the message
+*                         - ERROR: No interface found to treat the message
+*******************************************************************************/
+ErrorStatus CAN_SetUnusedMsgObj(u32 msgobj)
+{
+  u32 msg_if=0;
+
+  if ((msg_if = GetFreeIF()) == 2)
+  {
+    return ERROR;
+  }
+
+  CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
+                           | CAN_CMR_MASK
+                           | CAN_CMR_ARB
+                           | CAN_CMR_CONTROL
+                           | CAN_CMR_DATAA
+                           | CAN_CMR_DATAB;
+
+  CAN->sMsgObj[msg_if].M1R = 0;
+  CAN->sMsgObj[msg_if].M2R = 0;
+
+  CAN->sMsgObj[msg_if].A1R = 0;
+  CAN->sMsgObj[msg_if].A2R = 0;
+
+  CAN->sMsgObj[msg_if].MCR = 0;
+
+  CAN->sMsgObj[msg_if].DA1R = 0;
+  CAN->sMsgObj[msg_if].DA2R = 0;
+  CAN->sMsgObj[msg_if].DB1R = 0;
+  CAN->sMsgObj[msg_if].DB2R = 0;
+
+ CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
+ 
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_SetTxMsgObj                                           
+* Description    : Configures the message object as TX.                        
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                      
+*                  - idType: specifies the identifier type of the frames that
+*                    will be transmitted using this message object.
+*                    This parameter can be one of the following values:
+*                          - CAN_STD_ID (standard ID, 11-bit)
+*                          - CAN_EXT_ID (extended ID, 29-bit)                                
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Interface to treat the message
+*                         - ERROR: No interface found to treat the message
+*******************************************************************************/
+ErrorStatus CAN_SetTxMsgObj(u32 msgobj, u32 idType)
+{
+  u32 msg_if=0;
+
+  if ((msg_if = GetFreeIF()) == 2)
+  {
+    return ERROR;
+  }
+  
+  CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
+                           | CAN_CMR_MASK
+                           | CAN_CMR_ARB
+                           | CAN_CMR_CONTROL
+                           | CAN_CMR_DATAA
+                           | CAN_CMR_DATAB;
+
+  CAN->sMsgObj[msg_if].M1R = 0;
+  CAN->sMsgObj[msg_if].A1R = 0;
+
+  if (idType == CAN_STD_ID)
+  {
+    CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR;
+    CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR;
+  }
+  else
+  {
+    CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR | CAN_M2R_MXTD;
+    CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR | CAN_A2R_XTD;
+  }
+
+  CAN->sMsgObj[msg_if].MCR = CAN_MCR_TXIE | CAN_MCR_EOB;
+
+  CAN->sMsgObj[msg_if].DA1R = 0;
+  CAN->sMsgObj[msg_if].DA2R = 0;
+  CAN->sMsgObj[msg_if].DB1R = 0;
+  CAN->sMsgObj[msg_if].DB2R = 0;
+
+  CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
+  
+  return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_SetRxMsgObj                                           
+* Description    : Configures the message object as RX.                        
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                    
+*                  - idType: specifies the identifier type of the frames that
+*                    will be transmitted using this message object.
+*                    This parameter can be one of the following values:
+*                          - CAN_STD_ID (standard ID, 11-bit)
+*                          - CAN_EXT_ID (extended ID, 29-bit)                               
+*                  - idLow: specifies the low part of the identifier range used      
+*                    for acceptance filtering.
+*                  - idHigh: specifies the high part of the identifier range    
+*                    used for acceptance filtering.
+*                  - singleOrFifoLast: specifies the end-of-buffer indicator.
+*                    This parameter can be one of the following values:
+*                          - TRUE: for a single receive object or a FIFO receive
+*                            object that is the last one of the FIFO. 
+*                          - FALSE: for a FIFO receive object that is not the 
+*                            last one. 
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Interface to treat the message
+*                         - ERROR: No interface found to treat the message
+*******************************************************************************/
+ErrorStatus CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast)
+{
+  u32 msg_if=0;
+
+  if ((msg_if = GetFreeIF()) == 2)
+  {
+    return ERROR;
+  }
+  
+  CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
+                           | CAN_CMR_MASK
+                           | CAN_CMR_ARB
+                           | CAN_CMR_CONTROL
+                           | CAN_CMR_DATAA
+                           | CAN_CMR_DATAB;
+
+  if (idType == CAN_STD_ID)
+  {
+    CAN->sMsgObj[msg_if].M1R = 0;
+    CAN->sMsgObj[msg_if].M2R = STD_RANGE_ID_MSK(idLow, idHigh);
+
+    CAN->sMsgObj[msg_if].A1R = 0;
+    CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | STD_RANGE_ID_ARB(idLow, idHigh);
+  }
+  else
+  {
+    CAN->sMsgObj[msg_if].M1R = EXT_RANGE_ID_MSK_L(idLow, idHigh);
+    CAN->sMsgObj[msg_if].M2R = CAN_M2R_MXTD | EXT_RANGE_ID_MSK_H(idLow, idHigh);
+
+    CAN->sMsgObj[msg_if].A1R = EXT_RANGE_ID_ARB_L(idLow, idHigh);
+    CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_XTD | EXT_RANGE_ID_ARB_H(idLow, idHigh);
+  }
+
+  CAN->sMsgObj[msg_if].MCR = CAN_MCR_RXIE | CAN_MCR_UMASK | (singleOrFifoLast ? CAN_MCR_EOB : 0);
+
+  CAN->sMsgObj[msg_if].DA1R = 0;
+  CAN->sMsgObj[msg_if].DA2R = 0;
+  CAN->sMsgObj[msg_if].DB1R = 0;
+  CAN->sMsgObj[msg_if].DB2R = 0;
+
+  CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
+  
+  return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_InvalidateAllMsgObj				      
+* Description    : Configures all the message objects as unused.               
+* Input          : None                                                      
+* Output         : None                                                      
+* Return         : None                                                      
+*******************************************************************************/
+void CAN_InvalidateAllMsgObj(void)
+{
+  u32 i=0;
+  for (i = 0; i < 32; i++)
+    CAN_SetUnusedMsgObj(i);
+}
+
+
+/*******************************************************************************
+* Function Name  : CAN_ReleaseMessage					      
+* Description    : Releases the message object                                
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                     
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Interface to treat the message
+*                         - ERROR: No interface found to treat the message
+*******************************************************************************/
+ErrorStatus CAN_ReleaseMessage(u32 msgobj)
+{
+  u32 msg_if=0;
+
+  if ((msg_if = GetFreeIF()) == 2)
+  {
+    return ERROR;
+  }
+
+  CAN->sMsgObj[msg_if].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
+  CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
+  
+  return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_SendMessage                                           
+* Description    : Start transmission of a message                           
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                    
+*                : - pCanMsg: pointer to the message structure containing data     
+*                    to transmit.
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Transmission OK
+*                         - ERROR: No transmission
+*******************************************************************************/
+ErrorStatus CAN_SendMessage(u32 msgobj, canmsg* pCanMsg)
+{
+  if (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY)
+  {
+    return ERROR;                    
+  }
+
+  CAN->SR &= ~CAN_SR_TXOK;
+
+  /* read the Arbitration and Message Control*/
+  CAN->sMsgObj[0].CMR = CAN_CMR_ARB | CAN_CMR_CONTROL;
+
+  CAN->sMsgObj[0].CRR = 1 + msgobj;
+
+  if (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY)
+  {
+    return ERROR;                    
+  }
+
+  /* update the contents needed for transmission*/
+  CAN->sMsgObj[0].CMR = CAN_CMR_WRRD
+                      | CAN_CMR_ARB
+                      | CAN_CMR_CONTROL
+                      | CAN_CMR_DATAA
+                      | CAN_CMR_DATAB;
+
+  if ((CAN->sMsgObj[0].A2R & CAN_A2R_XTD) == 0)
+  {
+    /* standard ID*/
+    CAN->sMsgObj[0].A1R = 0;
+    CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id);
+  }
+  else
+  {
+    /* extended ID*/
+    CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id);
+    CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id);
+  }
+
+  CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFEF0) | CAN_MCR_NEWDAT | CAN_MCR_TXRQST | pCanMsg->Dlc;
+
+  CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0];
+  CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2];
+  CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4];
+  CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6];
+
+  CAN->sMsgObj[0].CRR = 1 + msgobj;
+
+  return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_ReceiveMessage                                        
+* Description    : Gets the message, if received.
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                     
+*                  - release: specifies the message release indicator.
+*                    This parameter can be one of the following values:
+*                          - TRUE: the message object is released when getting  
+*                            the data.
+*                          - FALSE: the message object is not released.
+*                  - pCanMsg: pointer to the message structure where received   
+*                    data is copied.
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Reception OK
+*                         - ERROR: No message pending
+*******************************************************************************/
+ErrorStatus CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg)
+{
+  if (!CAN_IsMessageWaiting(msgobj))
+  {
+    return ERROR;
+  }
+
+  CAN->SR &= ~CAN_SR_RXOK;
+
+  /* read the message contents*/
+  CAN->sMsgObj[1].CMR = CAN_CMR_MASK
+                      | CAN_CMR_ARB
+                      | CAN_CMR_CONTROL
+                      | CAN_CMR_CLRINTPND
+                      | (release ? CAN_CMR_TXRQSTNEWDAT : 0)
+                      | CAN_CMR_DATAA
+                      | CAN_CMR_DATAB;
+
+  CAN->sMsgObj[1].CRR = 1 + msgobj;
+
+  if (CAN->sMsgObj[1].CRR & CAN_CRR_BUSY)
+  {
+    return ERROR;                    
+  }
+  
+  if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0)
+  {
+    /* standard ID*/
+    pCanMsg->IdType = CAN_STD_ID;
+    pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF;
+  }
+  else
+  {
+    /* extended ID*/
+    pCanMsg->IdType = CAN_EXT_ID;
+    pCanMsg->Id  = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF); 
+    pCanMsg->Id |= ((u32)CAN->sMsgObj[1].A1R << 11);
+    pCanMsg->Id |= (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27);
+  }
+
+  pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F;
+
+  pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R;
+  pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8);
+  pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R;
+  pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8);
+  pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R;
+  pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8);
+  pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R;
+  pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8);
+
+  return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_WaitEndOfTx                                           
+* Description    : Waits until current transmission is finished.               
+* Input          : None                                                      
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Transmission ended
+*                         - ERROR: Transmission did not occur yet
+*******************************************************************************/
+ErrorStatus CAN_WaitEndOfTx(void)
+{
+  if ((CAN->SR & CAN_SR_TXOK) == 0)
+  {
+    return ERROR;
+  }
+  CAN->SR &= ~CAN_SR_TXOK;
+  
+  return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_BasicSendMessage                                      
+* Description    : Starts transmission of a message in BASIC mode. This mode 
+*                  does not use the message RAM.             
+* Input          : pCanMsg: Pointer to the message structure containing data to       
+*                  transmit.                                                  
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Transmission OK
+*                         - ERROR: No transmission
+*******************************************************************************/
+ErrorStatus CAN_BasicSendMessage(canmsg* pCanMsg)
+{
+  /* clear NewDat bit in IF2 to detect next reception*/
+  CAN->sMsgObj[1].MCR &= ~CAN_MCR_NEWDAT;
+
+  CAN->SR &= ~CAN_SR_TXOK;
+  CAN->sMsgObj[0].CMR = CAN_CMR_WRRD
+                      | CAN_CMR_ARB
+                      | CAN_CMR_CONTROL
+                      | CAN_CMR_DATAA
+                      | CAN_CMR_DATAB;
+
+  if (pCanMsg->IdType == CAN_STD_ID)
+  {
+    /* standard ID*/
+    CAN->sMsgObj[0].A1R = 0;
+    CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id);
+  }
+  else
+  {
+    /* extended ID*/
+    CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id);
+    CAN->sMsgObj[0].A2R = ((CAN->sMsgObj[0].A2R) & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id);
+  }
+
+  CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFCF0) | pCanMsg->Dlc;
+
+  CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0];
+  CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2];
+  CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4];
+  CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6];
+
+  /* request transmission*/
+  if (CAN->sMsgObj[0].CRR == CAN_CRR_BUSY )
+  {
+    return ERROR;
+  }
+
+  return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_BasicReceiveMessage                                   
+* Description    : Gets the message in BASIC mode, if received. This mode does
+*                  not use the message RAM.                
+* Input          : pCanMsg: pointer to the message structure where message is copied.    
+* Output         : None                                                      
+* Return         : An ErrorStatus enumuration value:
+*                         - SUCCESS: Reception OK
+*                         - ERROR: No message pending
+*******************************************************************************/
+ErrorStatus CAN_BasicReceiveMessage(canmsg* pCanMsg)
+{
+  if ((CAN->sMsgObj[1].MCR & CAN_MCR_NEWDAT) == 0)
+  {
+    return ERROR;
+  }
+
+  CAN->SR &= ~CAN_SR_RXOK;
+
+  CAN->sMsgObj[1].CMR = CAN_CMR_ARB
+                      | CAN_CMR_CONTROL
+                      | CAN_CMR_DATAA
+                      | CAN_CMR_DATAB;
+
+  if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0)
+  {
+    /* standard ID*/
+    pCanMsg->IdType = CAN_STD_ID;
+    pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF;
+  }
+  else
+  {
+    /* extended ID*/
+    pCanMsg->IdType = CAN_EXT_ID;
+    pCanMsg->Id  = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF);
+    pCanMsg->Id |= ((u32)CAN->sMsgObj[1].A1R << 11);
+    pCanMsg->Id |= (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27);
+  }
+
+  pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F;
+
+  pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R;
+  pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8);
+  pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R;
+  pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8);
+  pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R;
+  pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8);
+  pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R;
+  pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8);
+
+  return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_EnterInitMode                                         
+* Description    : Switchs the CAN into initialization mode. This function must
+*                  be used in conjunction with CAN_LeaveInitMode().                 
+* Input          : InitMask: specifies the CAN configuration in normal mode.      
+* Output         : None                                                      
+* Return         : None                                                          
+*******************************************************************************/
+void CAN_EnterInitMode(u8 InitMask)
+{
+  CAN->CR = InitMask | CAN_CR_INIT;
+  CAN->SR = 0;					/* reset the status*/
+}
+
+/*******************************************************************************
+* Function Name  : CAN_LeaveInitMode                                         
+* Description    : Leaves the initialization mode (switch into normal mode).
+*                  This function must be used in conjunction with CAN_EnterInitMode().  
+* Input          : None                                                      
+* Output         : None                                                      
+* Return         : None                                                      
+*******************************************************************************/
+void CAN_LeaveInitMode(void)
+{
+  CAN->CR &= ~(CAN_CR_INIT | CAN_CR_CCE);
+}
+
+/*******************************************************************************
+* Function Name  : CAN_EnterTestMode                                         
+* Description    : Switchs the CAN into test mode. This function must be used in
+*                  conjunction with CAN_LeaveTestMode().                            
+* Input          : TestMask: specifies the configuration in test modes.     
+* Output         : None                                                      
+* Return         : None                                                            
+*******************************************************************************/
+void CAN_EnterTestMode(u8 TestMask)
+{
+  CAN->CR |= CAN_CR_TEST;
+  CAN->TESTR |= TestMask;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_LeaveTestMode                                         
+* Description    : Leaves the current test mode (switch into normal mode).
+*                  This function must be used in conjunction with CAN_EnterTestMode().    
+* Input          : None                                                      
+* Output         : None                                                      
+* Return         : None                                                      
+*******************************************************************************/
+void CAN_LeaveTestMode(void)
+{
+  CAN->CR |= CAN_CR_TEST;
+  CAN->TESTR &= ~(CAN_TESTR_LBACK | CAN_TESTR_SILENT | CAN_TESTR_BASIC);
+  CAN->CR &= ~CAN_CR_TEST;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_ReleaseTxMessage                                      
+* Description    : Releases the transmit message object.
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                     
+* Output         : None                                                      
+* Return         : None                                                                        
+*******************************************************************************/
+void CAN_ReleaseTxMessage(u32 msgobj)
+{
+  CAN->sMsgObj[0].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
+  CAN->sMsgObj[0].CRR = 1 + msgobj;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_ReleaseRxMessage                                      
+* Description    : Releases the receive message object.                        
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                      
+* Output         : None                                                      
+* Return         : None                                                                      
+*******************************************************************************/
+void CAN_ReleaseRxMessage(u32 msgobj)
+{
+  CAN->sMsgObj[1].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
+  CAN->sMsgObj[1].CRR = 1 + msgobj;
+}
+
+/*******************************************************************************
+* Function Name  : CAN_IsMessageWaiting                                      
+* Description    : Tests the waiting status of a received message.             
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                       
+* Output         : None                                                      
+* Return         : A non-zero value if the corresponding message object has  
+*                  received a message waiting to be copied, else 0.           
+*******************************************************************************/
+u32 CAN_IsMessageWaiting(u32 msgobj)
+{
+  return (msgobj < 16 ? CAN->ND1R & (1 << msgobj) : CAN->ND2R & (1 << (msgobj-16)));
+}
+
+/*******************************************************************************
+* Function Name  : CAN_IsTransmitRequested                                   
+* Description    : Tests the request status of a transmitted message.          
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                      
+* Output         : None                                                      
+* Return         : A non-zero value if the corresponding message is requested
+*                  to transmit, else 0.                                       
+*******************************************************************************/
+u32 CAN_IsTransmitRequested(u32 msgobj)
+{
+  return (msgobj < 16 ? CAN->TXR1R & (1 << msgobj) : CAN->TXR2R & (1 << (msgobj-16)));
+}
+
+/*******************************************************************************
+* Function Name  : CAN_IsInterruptPending                                    
+* Description    : Tests the interrupt status of a message object.             
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                      
+* Output         : None                                                      
+* Return         : A non-zero value if the corresponding message has an      
+*                  interrupt pending, else 0.                                 
+*******************************************************************************/
+u32 CAN_IsInterruptPending(u32 msgobj)
+{
+  return (msgobj < 16 ? CAN->IP1R & (1 << msgobj) : CAN->IP2R & (1 << (msgobj-16)));
+}
+
+/*******************************************************************************
+* Function Name  : CAN_IsObjectValid                                         
+* Description    : Tests the validity of a message object (ready to use).      
+* Input          : - msgobj: specifies the Message object number, from 0 to 31.                      
+* Output         : None                                                      
+* Return         : A non-zero value if the corresponding message object is   
+*                  valid, else 0.                                             
+*******************************************************************************/
+u32 CAN_IsObjectValid(u32 msgobj)
+{
+  return (msgobj < 16 ? CAN->MV1R & (1 << msgobj) : CAN->MV2R & (1 << (msgobj-16)));
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/src/75x_cfg.c

@@ -0,0 +1,122 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_cfg.c
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file provides all the CFG software functions.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_cfg.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define CFG_SWBOOT_Mask	      0xFFFFFFFC
+#define CFG_FLASHBusy_Mask    0x00000080
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name  : CFG_BootSpaceConfig
+* Description    : Selects which memory space will be remapped at address 0x00.
+* Input          : - CFG_BootSpace: specifies the memory space to be remapped
+*                    at address 0x00.
+*                    This parameter can be one of the following values:
+*                          - CFG_BootSpace_FLASH
+*                          - CFG_BootSpace_SRAM
+*                          - CFG_BootSpace_ExtSMI
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void CFG_BootSpaceConfig(u32 CFG_BootSpace)
+{
+  u32 Temp = 0;
+  
+  /* Clear SW_BOOT[1:0] bits */ 
+  Temp = CFG->GLCONF & CFG_SWBOOT_Mask;
+  
+  /* Set SW_BOOT[1:0] bits according to CFG_BootSpace parameter value */ 
+  Temp |= CFG_BootSpace;
+  
+  /* Store the new value */ 
+  CFG->GLCONF = Temp;   
+}
+
+/*******************************************************************************
+* Function Name  : CFG_FLASHBurstConfig
+* Description    : Enables or disables the FLASH Burst mode.
+* Input          : - CCFG_FLASHBurst: specifies the new state of the FLASH Burst
+*                    mode.
+*                    This parameter can be one of the following values:
+*                          - CFG_FLASHBurst_Disable
+*                          - CFG_FLASHBurst_Enable
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void CFG_FLASHBurstConfig(u32 CFG_FLASHBurst)
+{
+  if(CFG_FLASHBurst == CFG_FLASHBurst_Enable)
+  {
+    CFG->GLCONF |= CFG_FLASHBurst_Enable;
+  }
+  else
+  {
+    CFG->GLCONF &= CFG_FLASHBurst_Disable;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : CFG_USBFilterConfig
+* Description    : Enables or disables the USB Filter.
+* Input          : - CFG_USBFilter: specifies the new state of the USB Filter.
+*                    This parameter can be one of the following values:
+*                          - CFG_USBFilter_Disable
+*                          - CFG_USBFilter_Enable
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void CFG_USBFilterConfig(u32 CFG_USBFilter)
+{
+  if(CFG_USBFilter == CFG_USBFilter_Enable)
+  {
+    CFG->GLCONF |= CFG_USBFilter_Enable;
+  }
+  else
+  {
+    CFG->GLCONF &= CFG_USBFilter_Disable;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : CFG_GetFlagStatus
+* Description    : Checks whether the FLASH Busy flag is set or not.
+* Input          : None
+* Output         : None
+* Return         : The new state of FLASH Busy flag (SET or RESET).
+*******************************************************************************/
+FlagStatus CFG_GetFlagStatus(void)
+{
+  if((CFG->GLCONF & CFG_FLASHBusy_Mask) != RESET)
+  {
+    return SET;
+  }
+  else
+  {
+    return RESET;
+  }
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/src/75x_dma.c

@@ -0,0 +1,596 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_dma.c
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006 
+* Description        : This file provides all the DMA software functions.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_dma.h"
+#include "75x_mrcc.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* DMA enable */
+#define DMA_Enable     0x0001
+#define DMA_Disable    0xFFFE
+
+/* DMA Last Buffer Sweep */
+#define DMA_Last0_Enable_Mask    0x0001
+#define DMA_Last0_Disable_Mask   0xFFFE
+#define DMA_Last1_Enable_Mask    0x0002
+#define DMA_Last1_Disable_Mask   0xFFFD
+#define DMA_Last2_Enable_Mask    0x0004
+#define DMA_Last2_Disable_Mask   0xFFFB
+#define DMA_Last3_Enable_Mask    0x0008
+#define DMA_Last3_Disable_Mask   0xFFF7
+
+/* DMA Masks */
+#define DMA_Stream0_MASK_Mask  0xFFEE
+#define DMA_Stream0_CLR_Mask   0x0011
+#define DMA_Stream0_LAST_Mask  0xFFFE
+
+#define DMA_Stream1_MASK_Mask  0xFFDD
+#define DMA_Stream1_CLR_Mask   0x0022
+#define DMA_Stream1_LAST_Mask  0xFFFD
+
+#define DMA_Stream2_MASK_Mask  0xFFBB
+#define DMA_Stream2_CLR_Mask   0x0044
+#define DMA_Stream2_LAST_Mask  0xFFFB
+
+#define DMA_Stream3_MASK_Mask  0xFF77
+#define DMA_Stream3_CLR_Mask   0x0088
+#define DMA_Stream3_LAST_Mask  0xFFF7
+
+#define DMA_SRCSize_Mask   0xFFE7
+#define DMA_SRCBurst_Mask  0xFF9F
+#define DMA_DSTSize_Mask   0xFE7F     
+
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+/*******************************************************************************
+* Function Name  : DMA_DeInit
+* Description    : Deinitializes the DMA streamx registers to their default reset
+*                  values.
+* Input          : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
+*                    Stream.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void DMA_DeInit(DMA_Stream_TypeDef* DMA_Streamx)
+{
+  /* Reset streamx source base address register */
+  DMA_Streamx->SOURCEL = 0;
+  DMA_Streamx->SOURCEH = 0;
+
+  /* Reset streamx destination base address register */
+  DMA_Streamx->DESTL = 0;
+  DMA_Streamx->DESTH = 0;
+
+  /* Reset streamx maximum count register */
+  DMA_Streamx->MAX  = 0;
+  /* Reset streamx control register */
+  DMA_Streamx->CTRL = 0;
+  /* Reset streamx last used buffer location register */
+  DMA_Streamx->LUBUFF = 0;
+
+  switch(*(u32*)&DMA_Streamx)
+  {
+    case DMA_Stream0_BASE:
+      /* Reset interrupt mask, clear and flag bits for stream0 */
+      DMA->MASK &= DMA_Stream0_MASK_Mask;
+      DMA->CLR |= DMA_Stream0_CLR_Mask;
+      DMA->LAST &= DMA_Stream0_LAST_Mask;
+      break;
+
+    case DMA_Stream1_BASE:
+      /* Reset interrupt mask, clear and flag bits for stream1 */
+      DMA->MASK &= DMA_Stream1_MASK_Mask;
+      DMA->CLR |= DMA_Stream1_CLR_Mask;
+      DMA->LAST &= DMA_Stream1_LAST_Mask;
+      break;
+
+    case DMA_Stream2_BASE:
+    /* Reset interrupt mask, clear and flag bits for stream2 */
+      DMA->MASK &= DMA_Stream2_MASK_Mask;
+      DMA->CLR |= DMA_Stream2_CLR_Mask;
+      DMA->LAST &= DMA_Stream2_LAST_Mask;
+      break;
+
+    case DMA_Stream3_BASE:
+      /* Reset interrupt mask, clear and flag bits for stream3 */
+      DMA->MASK &= DMA_Stream3_MASK_Mask;
+      DMA->CLR |= DMA_Stream3_CLR_Mask;
+      DMA->LAST &= DMA_Stream3_LAST_Mask;
+      break;
+      
+    default:
+      break;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : DMA_Init
+* Description    : Initializes the DMAx stream according to the specified
+*                  parameters in the DMA_InitStruct.
+* Input          : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
+*                    Stream.
+*                  - DMA_InitStruct: pointer to a DMA_InitTypeDef structure that
+*                    contains the configuration information for the specified
+*                    DMA stream.
+* Output         : None
+* Return         : None
+******************************************************************************/
+void DMA_Init(DMA_Stream_TypeDef*  DMA_Streamx, DMA_InitTypeDef* DMA_InitStruct)
+{
+  /* set the buffer Size */
+   DMA_Streamx->MAX = DMA_InitStruct->DMA_BufferSize ;
+
+  /* Configure the incrementation of the current source Register */
+  if(DMA_InitStruct->DMA_SRC == DMA_SRC_INCR)
+  {
+    /* Increment current source register */
+    DMA_Streamx->CTRL |= DMA_SRC_INCR;
+  }
+  else 
+  {
+    /* Current source register unchanged */
+    DMA_Streamx->CTRL &= DMA_SRC_NOT_INCR;
+  }
+  
+  /* Configure the incrementation of the current destination Register */
+  if(DMA_InitStruct->DMA_DST == DMA_DST_INCR)
+  {
+    /* Increment current source register */
+    DMA_Streamx->CTRL |= DMA_DST_INCR;
+  }
+  else 
+  {
+    /* Current source register unchanged */
+    DMA_Streamx->CTRL &= DMA_DST_NOT_INCR;
+  }
+  
+  /* Clear source to DMA data width SOSIZE[1:0] bits */
+  DMA_Streamx->CTRL &= DMA_SRCSize_Mask;
+  /* Set the source to DMA data width */
+  DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCSize;
+  
+  /* Clear the DMA peripheral burst size SOBURST[1:0] bits */
+  DMA_Streamx->CTRL &= DMA_SRCBurst_Mask;
+  /* Set the DMA peripheral burst size */
+  DMA_Streamx->CTRL |= DMA_InitStruct->DMA_SRCBurst;
+  
+  /* Clear destination to DMA dat width DESIZE[1:0] bits */
+  DMA_Streamx->CTRL &= DMA_DSTSize_Mask;
+  /* Set the destination to DMA data width */
+  DMA_Streamx->CTRL |= DMA_InitStruct->DMA_DSTSize;
+  
+  /* Configure the circular mode */
+  if(DMA_InitStruct->DMA_Mode == DMA_Mode_Circular)
+  {
+    /* Set circular mode */
+    DMA_Streamx->CTRL |= DMA_Mode_Circular;
+  }
+  else 
+  {
+    /* Set normal mode */
+    DMA_Streamx->CTRL &= DMA_Mode_Normal;
+  } 
+  
+  /* Configure the direction transfer */
+  if(DMA_InitStruct->DMA_DIR == DMA_DIR_PeriphDST)
+  {
+    /* Set peripheral as destination */
+    DMA_Streamx->CTRL |= DMA_DIR_PeriphDST;
+  }
+  else 
+  {
+    /* Set peripheral as source */
+    DMA_Streamx->CTRL &= DMA_DIR_PeriphSRC;
+  } 
+  
+  /* Configure the memory to memory transfer only for stream3 */
+  if(DMA_Streamx == DMA_Stream3)
+  {
+    if(DMA_InitStruct->DMA_M2M == DMA_M2M_Enable)
+    {
+      /* Enable memory to memory transfer for stream3 */
+      DMA_Streamx->CTRL |= DMA_M2M_Enable;
+    }
+    else 
+    {
+      /* Disable memory to memory transfer for stream3 */
+      DMA_Streamx->CTRL &= DMA_M2M_Disable;
+    } 	
+  }
+
+  /* Configure the source base address */
+  DMA_Streamx->SOURCEL = DMA_InitStruct->DMA_SRCBaseAddr;
+  DMA_Streamx->SOURCEH = DMA_InitStruct->DMA_SRCBaseAddr >> 16;
+
+  /* Configure the destination base address */
+  DMA_Streamx->DESTL = DMA_InitStruct->DMA_DSTBaseAddr;
+  DMA_Streamx->DESTH = DMA_InitStruct->DMA_DSTBaseAddr >> 16;
+}
+
+/*******************************************************************************
+* Function Name  : DMA_StructInit
+* Description    : Fills each DMA_InitStruct member with its default value.
+* Input          : DMA_InitStruct : pointer to a DMA_InitTypeDef structure
+*                  which will be initialized.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
+{
+  /* Initialize the DMA_BufferSize member */
+  DMA_InitStruct->DMA_BufferSize = 0;
+
+  /* initialize the DMA_SRCBaseAddr member */
+  DMA_InitStruct->DMA_SRCBaseAddr = 0;
+
+  /* Initialize the DMA_DSTBaseAddr member */
+  DMA_InitStruct ->DMA_DSTBaseAddr = 0;
+  
+  /* Initialize the DMA_SRC member */
+  DMA_InitStruct->DMA_SRC = DMA_SRC_NOT_INCR;
+  
+  /* Initialize the DMA_DST member */
+  DMA_InitStruct->DMA_DST = DMA_DST_NOT_INCR;
+  
+  /* Initialize the DMA_SRCSize member */
+  DMA_InitStruct->DMA_SRCSize = DMA_SRCSize_Byte;
+  
+  /* Initialize the DMA_SRCBurst member */
+  DMA_InitStruct->DMA_SRCBurst = DMA_SRCBurst_1Data;
+  
+  /* Initialize the DMA_DSTSize member */
+  DMA_InitStruct->DMA_DSTSize = DMA_DSTSize_Byte;
+  
+  /* Initialize the DMA_Mode member */
+  DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
+  
+  /* Initialize the DMA_M2M member */
+  DMA_InitStruct->DMA_M2M =  DMA_M2M_Disable;
+
+  /* Initialize the DMA_DIR member */
+  DMA_InitStruct->DMA_DIR = DMA_DIR_PeriphSRC;
+}
+
+/*******************************************************************************
+* Function Name  : DMA_Cmd
+* Description    : Enables or disables the specified DMA stream.
+* Input          : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
+*                    Stream.
+*                  - NewState: new state of the DMAx stream. This parameter can
+*                  be: ENABLE or DISABLE.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void DMA_Cmd(DMA_Stream_TypeDef*  DMA_Streamx, FunctionalState NewState)
+{
+  if(NewState == ENABLE)
+  {
+    /* Enable the selected DMA streamx */
+    DMA_Streamx->CTRL |= DMA_Enable;
+  }
+  else
+  {
+    /* Disable the selected DMA streamx */
+    DMA_Streamx->CTRL &= DMA_Disable;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : DMA_ITConfig
+* Description    : Enables or disables the specified DMA interrupts.
+* Input          : - DMA_IT: specifies the DMA interrupts sources to be enabled
+*                    or disabled. This parameter can be any combination of the
+*                    following values:
+*                         - DMA_IT_SI0: Stream0 transfer end interrupt mask
+*                         - DMA_IT_SI1: Stream1 transfer end interrupt mask
+*                         - DMA_IT_SI2: Stream2 transfer end interrupt mask
+*                         - DMA_IT_SI3: Stream3 transfer end interrupt mask
+*                         - DMA_IT_SE0: Stream0 transfer error interrupt mask
+*                         - DMA_IT_SE1: Stream1 transfer error interrupt mask
+*                         - DMA_IT_SE2: Stream2 transfer error interrupt mask
+*                         - DMA_IT_SE3: Stream3 transfer error interrupt mask
+*                         - DMA_IT_ALL: ALL DMA interrupts mask
+*                  - NewState: new state of the specified DMA interrupts.
+*                    This parameter can be: ENABLE or DISABLE.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void DMA_ITConfig(u16 DMA_IT, FunctionalState NewState)
+{
+  if(NewState == ENABLE)
+  {
+    /* Enable the selected DMA interrupts */
+    DMA->MASK |= DMA_IT;
+  }
+  else
+  {
+    /* Disable the selected DMA interrupts */
+    DMA->MASK &= ~DMA_IT;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : DMA_GetCurrDSTAddr
+* Description    : Returns the current value of the destination address pointer
+*                  related to the specified DMA stream.
+* Input          : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
+*                    Stream.
+* Output         : None
+* Return         : The current value of the destination address pointer related
+*                  to the specified DMA stream.
+*******************************************************************************/
+u32 DMA_GetCurrDSTAddr(DMA_Stream_TypeDef*  DMA_Streamx)
+{ 
+  u32 Tmp = 0;
+
+  /* Get high current destination address */
+  Tmp = (DMA_Streamx->DECURRH)<<16;
+  /* Get low current destination address */
+  Tmp |= DMA_Streamx->DECURRL;
+
+  /* Return the current destination address value for streamx */
+  return Tmp;
+}
+
+/*******************************************************************************
+* Function Name  : DMA_GetCurrSRCAddr
+* Description    : Returns the current value of the source address pointer
+*                  related to the specified DMA stream.
+* Input          : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
+*                    Stream.
+* Output         : None
+* Return         : The current value of the source address pointer related to
+*                  the specified DMA stream.
+*******************************************************************************/
+u32 DMA_GetCurrSRCAddr(DMA_Stream_TypeDef*  DMA_Streamx)
+{
+  u32 Tmp = 0;
+
+  /* Get high current source address */
+  Tmp = (DMA_Streamx->SOCURRH)<<16;
+  /* Get slow current source address */
+  Tmp |= DMA_Streamx->SOCURRL;
+
+  /* Return the current source address value for streamx */
+  return Tmp;
+}
+
+/*******************************************************************************
+* Function Name  : DMA_GetTerminalCounter
+* Description    : Returns the number of data units remaining in the current
+*                  DMA stream transfer.
+* Input          : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
+*                    Stream.
+* Output         : None
+* Return         : The number of data units remaining in the current DMA stream
+*                  transfer.
+*******************************************************************************/
+u16 DMA_GetTerminalCounter(DMA_Stream_TypeDef*  DMA_Streamx)
+{
+  /* Return the terminal counter value for streamx */
+  return(DMA_Streamx->TCNT);
+}
+
+/*******************************************************************************
+* Function Name  : DMA_LastBufferSweepConfig
+* Description    : Activates or disactivates the last buffer sweep mode for the 
+*                  DMA streamx configured in circular buffer mode.
+* Input          : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
+*                    Stream.
+*                  - NewState: new state of the Last buffer sweep DMA_Streamx.                 
+*                    This parameter can be: ENABLE or DISABLE.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void DMA_LastBufferSweepConfig(DMA_Stream_TypeDef* DMA_Streamx, FunctionalState NewState)
+{  
+  switch(*(u32*)&DMA_Streamx)
+  {
+    case DMA_Stream0_BASE:
+      if(NewState == ENABLE)
+      {
+        /* Activates the last circular buffer sweep mode for stream0 */
+        DMA->LAST |= DMA_Last0_Enable_Mask;
+      }
+      else
+      {
+        /* Disactivates the last circular buffer sweep mode for stream0 */
+        DMA->LAST &= DMA_Last0_Disable_Mask;
+      }	
+      break;
+
+    case DMA_Stream1_BASE:
+      if(NewState == ENABLE)
+      {
+        /* Activates the last circular buffer sweep mode for stream1 */
+        DMA->LAST |= DMA_Last1_Enable_Mask;
+      }
+      else
+      {
+        /* Disactivates the last circular buffer sweep mode for stream1 */
+        DMA->LAST &= DMA_Last1_Disable_Mask;
+      }	
+      break;
+
+    case DMA_Stream2_BASE:
+      if(NewState == ENABLE)
+      {
+        /* Activates the last circular buffer sweep mode for stream2 */
+        DMA->LAST |= DMA_Last2_Enable_Mask;
+      }
+      else
+      {
+        /* Disactivates the last circular buffer sweep mode for stream2 */
+        DMA->LAST &= DMA_Last2_Disable_Mask;
+      }	
+      break;
+
+    case DMA_Stream3_BASE:
+      if(NewState == ENABLE)
+      {
+        /* Activates the last circular buffer sweep mode for stream3 */
+        DMA->LAST |= DMA_Last3_Enable_Mask;
+      }
+      else
+      {
+        /* Disactivates the last circular buffer sweep mode for stream3 */
+        DMA->LAST &= DMA_Last3_Disable_Mask;
+      }	
+      break;
+    
+    default:
+      break;      
+  }
+}
+
+/*******************************************************************************
+* Function Name  : DMA_LastBufferAddrConfig
+* Description    : Configures the circular buffer position where the last data 
+*                  to be used by the specified DMA stream is located.
+* Input          : - DMA_Streamx: where x can be 0, 1, 2 or 3 to select the DMA
+*                    Stream.
+*                  - DMA_LastBufferAddr: specifies the circular buffer position
+*                    where the last data to be used by the specified DMA stream
+*                    is located.
+*                    This member must be a number between 0 and the stream BufferSize-1.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void DMA_LastBufferAddrConfig(DMA_Stream_TypeDef*  DMA_Streamx, u16 DMA_LastBufferAddr)
+{
+  /* Set the streamx last data circular buffer location */
+  DMA_Streamx->LUBUFF = DMA_LastBufferAddr;
+}
+
+/*******************************************************************************
+* Function Name  : DMA_GetFlagStatus
+* Description    : Checks whether the specified DMA flag is set or not.
+* Input          : - DMA_FLAG: specifies the flag to check. This parameter can 
+*                    be one of the following values:
+*                         - DMA_FLAG_SI0:  Stream0 transfer end flag.
+*                         - DMA_FLAG_SI1:  Stream1 transfer end flag.
+*                         - DMA_FLAG_SI2:  Stream2 transfer end flag.
+*                         - DMA_FLAG_SI3:  Stream3 transfer end flag.
+*                         - DMA_FLAG_SE0:  Stream0 transfer error flag.
+*                         - DMA_FLAG_SE1:  Stream1 transfer error flag.
+*                         - DMA_FLAG_SE2:  Stream2 transfer error flag.
+*                         - DMA_FLAG_SE3:  Stream3 transfer error flag.
+*                         - DMA_FLAG_ACT0: Stream0 status.
+*                         - DMA_FLAG_ACT1: Stream1 status.
+*                         - DMA_FLAG_ACT2: Stream2 status.
+*                         - DMA_FLAG_ACT3: Stream3 status.
+* Output         : None
+* Return         : The new state of DMA_FLAG (SET or RESET).
+*******************************************************************************/
+FlagStatus DMA_GetFlagStatus(u16 DMA_FLAG)
+{
+  /* Check the status of the specified DMA flag */
+  if((DMA->STATUS & DMA_FLAG) != RESET)
+  {
+    /* Return SET if DMA_FLAG is set */
+    return SET;
+  }
+  else
+  {
+    /* Return RESET if DMA_FLAG is reset */
+    return RESET;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : DMA_ClearFlag
+* Description    : Clears the DMA<4D>s pending flags.
+* Input          : - DMA_FLAG: specifies the flag to clear. This parameter can 
+*                    be any combination of the following values:
+*                         - DMA_FLAG_SI0:  Stream0 transfer end flag.
+*                         - DMA_FLAG_SI1:  Stream1 transfer end flag.
+*                         - DMA_FLAG_SI2:  Stream2 transfer end flag.
+*                         - DMA_FLAG_SI3:  Stream3 transfer end flag.
+*                         - DMA_FLAG_SE0:  Stream0 transfer error flag.
+*                         - DMA_FLAG_SE1:  Stream1 transfer error flag.
+*                         - DMA_FLAG_SE2:  Stream2 transfer error flag.
+*                         - DMA_FLAG_SE3:  Stream3 transfer error flag.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void DMA_ClearFlag(u16 DMA_FLAG)
+{
+  /* Clear the selected DMA flags */ 
+  DMA->CLR = DMA_FLAG ;
+}
+
+/*******************************************************************************
+* Function Name  : DMA_GetITStatus
+* Description    : Checks whether the specified DMA interrupt has occured or not.
+* Input          : - DMA_IT: specifies the DMA interrupt source to check.  
+*                    This parameter can be one of the following values:
+*                         - DMA_IT_SI0: Stream0 transfer end interrupt 
+*                         - DMA_IT_SI1: Stream1 transfer end interrupt 
+*                         - DMA_IT_SI2: Stream2 transfer end interrupt 
+*                         - DMA_IT_SI3: Stream3 transfer end interrupt 
+*                         - DMA_IT_SE0: Stream0 transfer error interrupt 
+*                         - DMA_IT_SE1: Stream1 transfer error interrupt 
+*                         - DMA_IT_SE2: Stream2 transfer error interrupt 
+*                         - DMA_IT_SE3: Stream3 transfer error interrupt 
+* Output         : None
+* Return         : The new state of DMA_IT (SET or RESET).
+*******************************************************************************/
+ITStatus DMA_GetITStatus(u16 DMA_IT)
+{
+  /* Check the status of the specified DMA interrupt */
+  if((DMA->STATUS & DMA_IT) != RESET)
+  {
+    /* Return SET if the DMA interrupt flag is set */
+    return SET;
+  }
+  else
+  {
+    /* Return RESET if the DMA interrupt flag is reset */
+    return RESET;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : DMA_ClearITPendingBit
+* Description    : Clears the DMA<4D>s interrupt pending bits. 
+* Input          : - DMA_IT: specifies the interrupt pending bit to clear.  
+*                    This parameter can be any combination of the following values:
+*                         - DMA_IT_SI0:  Stream0 transfer end interrupt.
+*                         - DMA_IT_SI1:  Stream1 transfer end interrupt.
+*                         - DMA_IT_SI2:  Stream2 transfer end interrupt.
+*                         - DMA_IT_SI3:  Stream3 transfer end interrupt.
+*                         - DMA_IT_SE0:  Stream0 transfer error interrupt.
+*                         - DMA_IT_SE1:  Stream1 transfer error interrupt.
+*                         - DMA_IT_SE2:  Stream2 transfer error interrupt.
+*                         - DMA_IT_SE3:  Stream3 transfer error interrupt.
+*                         - DMA_IT_ALL:  All DMA interrupts.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void DMA_ClearITPendingBit(u16 DMA_IT)
+{
+  /* Clear the selected DMA interrupts pending bits */
+  DMA->CLR = DMA_IT ;
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/

Demo/ARM7_STR75x_GCC/STLibrary/src/75x_eic.c

@@ -0,0 +1,258 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : 75x_eic.c
+* Author             : MCD Application Team
+* Date First Issued  : 03/10/2006
+* Description        : This file provides all the EIC software functions.
+********************************************************************************
+* History:
+* 07/17/2006 : V1.0
+* 03/10/2006 : V0.1
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "75x_eic.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define EIC_IRQEnable_Mask     0x00000001
+#define EIC_IRQDisable_Mask    0xFFFFFFFE
+
+#define EIC_FIQEnable_Mask     0x00000002
+#define EIC_FIQDisable_Mask    0xFFFFFFFD
+
+#define EIC_SIPL_Mask          0x0000000F
+#define EIC_SIPL_Reset_Mask    0xFFFFFFF0
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name  : EIC_DeInit
+* Description    : Deinitializes the EIC peripheral registers to their default
+*                  reset values.
+* Input          : None
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_DeInit(void)
+{
+  EIC->ICR = 0x00;
+  EIC->CIPR = 0x00;
+  EIC->FIR = 0x0C;
+  EIC->IER = 0x00;
+  EIC->IPR = 0xFFFFFFFF;
+}
+
+/*******************************************************************************
+* Function Name  : EIC_IRQInit
+* Description    : Configures the IRQ channels according to the specified
+*                  parameters in the EIC_IRQInitStruct.
+* Input          : EIC_IRQInitStruct: pointer to a EIC_IRQInitTypeDef structure.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_IRQInit(EIC_IRQInitTypeDef* EIC_IRQInitStruct)
+{
+  u32 Tmp = 0;
+
+  if(EIC_IRQInitStruct->EIC_IRQChannelCmd == ENABLE)
+  {
+    /* Enable the selected IRQ channel */
+    EIC->IER |= 1 << EIC_IRQInitStruct->EIC_IRQChannel;
+
+    /* Configure the selected IRQ channel priority ***************************/
+    /* Clear SIPL[3:0] bits */
+    EIC->SIRn[EIC_IRQInitStruct->EIC_IRQChannel] &= EIC_SIPL_Reset_Mask;
+
+    /* Configure SIPL[3:0] bits according to EIC_IRQChannelPriority parameter */
+    Tmp = EIC_IRQInitStruct->EIC_IRQChannelPriority & EIC_SIPL_Mask;
+    EIC->SIRn[EIC_IRQInitStruct->EIC_IRQChannel] |= Tmp;
+  }
+  else
+  {
+    /* Disable the select IRQ channel */
+    EIC->IER &=~ (1 << EIC_IRQInitStruct->EIC_IRQChannel);
+  }
+}
+
+/*******************************************************************************
+* Function Name  : EIC_FIQInit
+* Description    : Configures the FIQ channels according to the specified
+*                  parameters in the EIC_FIQInitStruct.
+* Input          : EIC_FIQInitStruct: pointer to a EIC_FIQInitTypeDef structure.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_FIQInit(EIC_FIQInitTypeDef* EIC_FIQInitStruct)
+{
+  if(EIC_FIQInitStruct->EIC_FIQChannelCmd == ENABLE)
+  {
+    /* Enable the selected FIQ channel */
+    EIC->FIER |= EIC_FIQInitStruct->EIC_FIQChannel ;
+  }
+  else
+  {
+    /* Disable the selected FIQ channel */
+    EIC->FIER &= ~EIC_FIQInitStruct->EIC_FIQChannel;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : EIC_IRQStructInit
+* Description    : Fills each EIC_IRQInitStruct member with its default value.
+* Input          : EIC_IRQInitStruct: pointer to a EIC_IRQInitTypeDef structure
+*                  which will be initialized.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_IRQStructInit(EIC_IRQInitTypeDef* EIC_IRQInitStruct)
+{
+  EIC_IRQInitStruct->EIC_IRQChannel = 0x1F;
+  EIC_IRQInitStruct->EIC_IRQChannelPriority = 0;
+  EIC_IRQInitStruct->EIC_IRQChannelCmd = DISABLE;
+}
+
+/*******************************************************************************
+* Function Name  : EIC_FIQStructInit
+* Description    : Fills each EIC_FIQInitStruct member with its default value.
+* Input          : EIC_FIQInitStruct: pointer to a EIC_FIQInitTypeDef structure
+*                  which will be initialized.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_FIQStructInit(EIC_FIQInitTypeDef* EIC_FIQInitStruct)
+{
+  EIC_FIQInitStruct->EIC_FIQChannel = 0x03;
+  EIC_FIQInitStruct->EIC_FIQChannelCmd = DISABLE;
+}
+
+/*******************************************************************************
+* Function Name  : EIC_IRQCmd
+* Description    : Enables or disables EIC IRQ output request to CPU.
+* Input          : NewState: new state of the EIC IRQ output request to CPU.
+*                  This parameter can be: ENABLE or DISABLE.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_IRQCmd(FunctionalState NewState)
+{
+  if(NewState == ENABLE)
+  {
+    /* Enable EIC IRQ output request to CPU */
+    EIC->ICR |= EIC_IRQEnable_Mask;
+  }
+  else
+  {
+    /* Disable EIC IRQ output request to CPU */
+    EIC->ICR &= EIC_IRQDisable_Mask;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : EIC_FIQCmd
+* Description    : Enables or disables EIC FIQ output request to CPU.
+* Input          : NewState: new state of the EIC FIQ output request to CPU.
+*                  This parameter can be: ENABLE or DISABLE.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_FIQCmd(FunctionalState NewState)
+{
+  if(NewState == ENABLE)
+  {
+    /* Enable EIC FIQ output request to CPU */
+    EIC->ICR |= EIC_FIQEnable_Mask;
+  }
+  else
+  {
+    /* Disable EIC FIQ output request to CPU */
+    EIC->ICR &= EIC_FIQDisable_Mask;
+  }
+}
+
+/*******************************************************************************
+* Function Name  : EIC_GetCurrentIRQChannel
+* Description    : Returns the current served IRQ channel identifier.
+* Input          : None
+* Output         : None
+* Return         : The current served IRQ channel.
+*******************************************************************************/
+u8 EIC_GetCurrentIRQChannel(void)
+{
+  /* Read and return the CIC[4:0] bits of CICR register */
+  return ((u8) (EIC->CICR));
+}
+
+/*******************************************************************************
+* Function Name  : EIC_GetCurrentIRQChannelPriority
+* Description    : Returns the priority level of the current served IRQ channel.
+* Input          : None
+* Output         : None
+* Return         : The priority level of the current served IRQ channel.
+*******************************************************************************/
+u8 EIC_GetCurrentIRQChannelPriority(void)
+{
+  /* Read and return the CIP[3:0] bits of CIPR register */
+  return ((u8) (EIC->CIPR));
+}
+
+/*******************************************************************************
+* Function Name  : EIC_CurrentIRQPriorityConfig
+* Description    : Changes the priority of the current served IRQ channel.
+*                  The new priority value must be higher, or equal, than the
+*                  priority value associated to the interrupt channel currently
+*                  serviced.
+* Input          : NewPriority: new priority value of the IRQ interrupt routine
+*                  currently serviced.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_CurrentIRQPriorityConfig(u8 NewPriority)
+{
+  /* Disable EIC IRQ output request to CPU */
+  EIC->ICR &= EIC_IRQDisable_Mask;
+
+  /* Change the current priority */
+  EIC->CIPR = NewPriority;
+
+  /* Enable EIC IRQ output request to CPU  */
+  EIC->ICR |= EIC_IRQEnable_Mask;
+}
+
+/*******************************************************************************
+* Function Name  : EIC_GetCurrentFIQChannel
+* Description    : Returns the current served FIQ channel identifier.
+* Input          : None
+* Output         : None
+* Return         : The current served FIQ channel.
+*******************************************************************************/
+u8 EIC_GetCurrentFIQChannel(void)
+{
+  /* Read and return the FIP[1:0] bits of FIPR register */
+  return ((u8) (EIC->FIPR));
+}
+
+/*******************************************************************************
+* Function Name  : EIC_ClearFIQPendingBit
+* Description    : Clears the pending bit of the selected FIQ Channel.
+* Input          : EIC_FIQChannel: specifies the FIQ channel to clear its
+*                  pending bit.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EIC_ClearFIQPendingBit(u8 EIC_FIQChannel)
+{
+  /* Clear the correspondent FIQ pending bit */
+  EIC->FIPR = EIC_FIQChannel ;
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/