Update History.txt

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

.github/CONTRIBUTING.md

@@ -1,70 +1,70 @@
-# Contribution guidelines
-
-Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or
-documentation, we welcome our community to be involved in this project.
-
-Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible.
-
-## Code of conduct
-This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct).
-For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact
-opensource-codeofconduct@amazon.com with any additional questions or comments.
-
-
-## Security issue notifications
-If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue.
-
-
-## Submitting a bugs/feature request
-Have a bug to report or feature to request? Follow these steps:
-1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed. 
-2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below.
-3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features.
-
-When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include:
-
-* A clear description of the situation — what you observe, what you expect, and your view on how the two differ.
-* A reproducible test case or sequence of steps.
-* The version of our code being used.
-* Any modifications you've made relevant to the bug.
-* Details of your environment or deployment. Highlight anything unusual.
-
-
-## Contributing via pull request
-Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that:
-
-1. You are working against the latest source on the *master* branch.
-2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already.
-3. You open an issue to discuss any significant work - we would hate for your time to be wasted.
-
-To send us a pull request, please:
-
-1. Fork the repository.
-2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change.
-3. Follow the [coding style guide](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
-4. Commit to your fork using clear commit messages.
-5. Send us a pull request, answering any default questions in the pull request interface.    
-   NOTE: Please make sure the default option (Allow edits from maintainers) is left checked.    
-6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation.
-
-GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and
-[creating a pull request](https://help.github.com/articles/creating-a-pull-request/).
-
-## Coding style
-* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
-
-
-## Getting your pull request merged
-All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications.
-
-
-## Finding contributions to work on
-Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start.
-
-
-## Licensing
-The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/master/FreeRTOS/License/license.txt)
-
-Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable.
-
-We may ask you to sign a [Contributor License Agreement (CLA)](https://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes.
+# Contribution guidelines
+
+Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or
+documentation, we welcome our community to be involved in this project.
+
+Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible.
+
+## Code of conduct
+This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct).
+For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact
+opensource-codeofconduct@amazon.com with any additional questions or comments.
+
+
+## Security issue notifications
+If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue.
+
+
+## Submitting a bugs/feature request
+Have a bug to report or feature to request? Follow these steps:
+1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed.
+2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below.
+3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features.
+
+When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include:
+
+* A clear description of the situation - what you observe, what you expect, and your view on how the two differ.
+* A reproducible test case or sequence of steps.
+* The version of our code being used.
+* Any modifications you've made relevant to the bug.
+* Details of your environment or deployment. Highlight anything unusual.
+
+
+## Contributing via pull request
+Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that:
+
+1. You are working against the latest source on the *main* branch.
+2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already.
+3. You open an issue to discuss any significant work - we would hate for your time to be wasted.
+
+To send us a pull request, please:
+
+1. Fork the repository.
+2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change.
+3. Follow the [coding style guide](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
+4. Commit to your fork using clear commit messages.
+5. Send us a pull request, answering any default questions in the pull request interface.
+   NOTE: Please make sure the default option (Allow edits from maintainers) is left checked.
+6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation.
+
+GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and
+[creating a pull request](https://help.github.com/articles/creating-a-pull-request/).
+
+## Coding style
+* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
+
+
+## Getting your pull request merged
+All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications.
+
+
+## Finding contributions to work on
+Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start.
+
+
+## Licensing
+The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/License/license.txt)
+
+Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable.
+
+We may ask you to sign a [Contributor License Agreement (CLA)](https://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes.

.github/ISSUE_TEMPLATE/bug-report.md

@@ -24,7 +24,7 @@ A concise description of what the bug is.
 
 **To Reproduce**
 - Use project ... and configure with ...
-- Run on ... and could observe ... 
+- Run on ... and could observe ...
 
 **Expected behavior**
 A concise description of what you expected to happen.

.github/ISSUE_TEMPLATE/documentation-issue.md

@@ -11,7 +11,7 @@ assignees: ''
 Please describe the issue and expected clarification in concise language.
 
 **Reference**
-Please attach the URL at which you are experiencing the issue. 
+Please attach the URL at which you are experiencing the issue.
 
 **Screenshot**
 If applicable, please attach screenshot.

.github/ISSUE_TEMPLATE/feature_request.md

@@ -0,0 +1,20 @@
+---
+name: Feature request
+about: Suggest a new feature for this project
+title: "[Feature Request] <replace with your title>"
+labels: enhancement
+assignees: ''
+
+---
+
+**Is your feature request related to a problem? Please describe.**
+A clear and concise description of what the problem is. Ex. I'm always frustrated when [...]
+
+**Describe the solution you'd like**
+A clear and concise description of what you want to happen.
+
+**Describe alternatives you've considered**
+A clear and concise description of any alternative solutions or features you've considered.
+
+**Additional context**
+Add any other context or screenshots about the feature request here.

.github/actions/url_verifier.sh

@@ -8,6 +8,7 @@ then
     exit 2
 fi
 
+USER_AGENT="Mozilla/5.0 (Macintosh; Intel Mac OS X 10_14_6) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/88.0.4324.146 Safari/537.36"
 SCRIPT_RET=0
 
 set -o nounset        # Treat unset variables as an error
@@ -27,7 +28,7 @@ function test {
 
     for UNIQ_URL in ${!dict[@]} # loop urls
     do
-     CURL_RES=$(curl -I ${UNIQ_URL} 2>/dev/null| head -n 1 | cut -f 2 -d ' ')
+     CURL_RES=$(curl -si --user-agent "$(USER_AGENT)" ${UNIQ_URL} 2>/dev/null| head -n 1 | cut -f 2 -d ' ')
      RES=$?
 
         if [ "${CURL_RES}" == '' -o "${CURL_RES}" != '200' ]
@@ -38,11 +39,14 @@ function test {
             then
                 CURL_RES=$RES
                 SCRIPT_RET=1
+                echo ERROR: Result is: "${CURL_RES}"
             elif [ "${CURL_RES}" == '403' ]
             then
                 SCRIPT_RET=1
+                echo ERROR: Result is: "${CURL_RES}"
+            else
+                echo WARNING: Result is: "${CURL_RES}"
             fi
-            echo Result is: "${CURL_RES}"
             echo "================================="
         fi
     done

.github/lexicon.txt

@@ -1105,6 +1105,7 @@ misc
 misconfiguration
 miso
 misra
+mit
 mmcr
 mmi
 mmr
@@ -1529,6 +1530,7 @@ prvinitialisenewstreambuffer
 prvinitialisenewtimer
 prvinsertblockintofreelist
 prvlockqueue
+prvnotifyqueuesetcontainer
 prvportmalloc
 prvportresetpic
 prvprocesssimulatedinterrupts
@@ -1617,6 +1619,7 @@ pvowner
 pvparameter
 pvparameters
 pvportmalloc
+pvportmallocstack
 pvportrealloc
 pvreg
 pvrxdata
@@ -1686,6 +1689,7 @@ pxprevious
 pxpreviouswaketime
 pxqueue
 pxqueuebuffer
+pxqueuesetcontainer
 pxramstack
 pxreadycoroutinelists
 pxreadytaskslists
@@ -1705,7 +1709,9 @@ pxstreambuffercreatestatic
 pxtagvalue
 pxtask
 pxtaskbuffer
+pxtaskcode
 pxtaskdefinition
+pxtaskin
 pxtaskstatus
 pxtaskstatusarray
 pxtasktag
@@ -1976,6 +1982,7 @@ softreset
 sp
 spck
 spd
+spdx
 sph
 spi
 spidis
@@ -2304,6 +2311,8 @@ ullporttaskhasfpucontext
 ulmair
 ulmask
 ulmatchvalueforonetick
+ulnumberofheapallocations
+ulnumberofheapfrees
 ulong
 ulparameter
 ulparameters
@@ -2326,6 +2335,7 @@ ulstatsaspercentage
 ulstoppedtimercompensation
 ultablebase
 ultaskgetidleruntimecounter
+ultaskgetidleruntimepercent
 ultaskhasfpucontext
 ultasknotificationtakeindexed
 ultasknotifystateclear
@@ -2335,6 +2345,8 @@ ultasknotifyvalueclear
 ultasknotifyvalueclearindexed
 ultaskswitchedintime
 ultaskswitchrequested
+ultotalmemoryallocations
+ultotalmemoryfrees
 ultotalruntime
 ultotalruntimediv
 ulusingfpu
@@ -2434,6 +2446,7 @@ uxsavedmaskvalue
 uxsavedtaskstackpointer
 uxschedulersuspended
 uxsemaphoregetcount
+uxsemaphoregetcountfromisr
 uxstate
 uxstreambuffernumber
 uxtaskgetnumberoftasks
@@ -2765,6 +2778,9 @@ xgenericlistitem
 xgetfreestackspace
 xhandle
 xhead
+xheapbytescurrentlyallocated
+xheapbytescurrentlyheld
+xheapbyteshighwatermark
 xheapregions
 xhigherpriorittaskwoken
 xhigherprioritytaskwoken
@@ -2791,6 +2807,7 @@ xlistend
 xmair
 xmaxcount
 xmaxexpirycountbeforestopping
+xmaxheapbyteseverheld
 xmaxsize
 xmc
 xmessage
@@ -3017,6 +3034,7 @@ xtaskswaitingforbits
 xtaskswaitingtermination
 xtaskswaitingtoreceive
 xtaskswaitingtosend
+xtasktodelete
 xtasktonotify
 xtasktoquery
 xtasktoresume

.github/scripts/find_replace.sh

@@ -0,0 +1,7 @@
+#!/bin/bash
+old_text=$1
+new_text=$2
+echo "Old text: ${old_text}"
+echo "New text: ${new_text}"
+grep -rl "${old_text}" . | xargs gsed -i -e '1h;2,$H;$!d;g' -e "s/${old_text}/${new_text}/g"
+

.github/scripts/kernel_checker.py

@@ -0,0 +1,152 @@
+#!/usr/bin/env python3
+#/*
+# * FreeRTOS Kernel V10.4.5
+# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+# *
+# * SPDX-License-Identifier: MIT
+# *
+# * Permission is hereby granted, free of charge, to any person obtaining a copy of
+# * this software and associated documentation files (the "Software"), to deal in
+# * the Software without restriction, including without limitation the rights to
+# * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+# * the Software, and to permit persons to whom the Software is furnished to do so,
+# * subject to the following conditions:
+# *
+# * The above copyright notice and this permission notice shall be included in all
+# * copies or substantial portions of the Software.
+# *
+# * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+# * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+# * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+# *
+# * https://www.FreeRTOS.org
+# * https://github.com/FreeRTOS
+# *
+# */
+
+import os
+from common.header_checker import HeaderChecker
+
+#--------------------------------------------------------------------------------------------------
+#                                            CONFIG
+#--------------------------------------------------------------------------------------------------
+KERNEL_IGNORED_FILES = [
+    'FreeRTOS-openocd.c',
+    'Makefile',
+    '.DS_Store'
+]
+
+KERNEL_IGNORED_EXTENSIONS = [
+    '.yml',
+    '.css',
+    '.idx',
+    '.md',
+    '.url',
+    '.sty',
+    '.0-rc2',
+    '.s82',
+    '.js',
+    '.out',
+    '.pack',
+    '.2',
+    '.1-kernel-only',
+    '.0-kernel-only',
+    '.0-rc1',
+    '.readme',
+    '.tex',
+    '.png',
+    '.bat',
+    '.sh',
+    '.txt',
+    '.cmake'
+]
+
+KERNEL_ASM_EXTENSIONS = [
+    '.s',
+    '.S',
+    '.src',
+    '.inc',
+    '.s26',
+    '.s43',
+    '.s79',
+    '.s85',
+    '.s87',
+    '.s90',
+    '.asm',
+    '.h'
+]
+
+KERNEL_PY_EXTENSIONS = [
+    '.py'
+]
+
+KERNEL_IGNORED_PATTERNS = [
+    r'.*\.git.*',
+    r'.*portable/IAR/AtmelSAM7S64/.*AT91SAM7.*',
+    r'.*portable/GCC/ARM7_AT91SAM7S/.*',
+    r'.*portable/MPLAB/PIC18F/stdio.h'
+]
+
+KERNEL_THIRD_PARTY_PATTERNS = [
+    r'.*portable/ThirdParty/GCC/Posix/port*',
+    r'.*portable/ThirdParty/*',
+    r'.*portable/IAR/AVR32_UC3/.*',
+    r'.*portable/GCC/AVR32_UC3/.*',
+]
+
+KERNEL_HEADER = [
+    '/*\n',
+    ' * FreeRTOS Kernel V10.4.5\n',
+    ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n',
+    ' *\n',
+    ' * SPDX-License-Identifier: MIT\n',
+    ' *\n',
+    ' * Permission is hereby granted, free of charge, to any person obtaining a copy of\n',
+    ' * this software and associated documentation files (the "Software"), to deal in\n',
+    ' * the Software without restriction, including without limitation the rights to\n',
+    ' * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n',
+    ' * the Software, and to permit persons to whom the Software is furnished to do so,\n',
+    ' * subject to the following conditions:\n',
+    ' *\n',
+    ' * The above copyright notice and this permission notice shall be included in all\n',
+    ' * copies or substantial portions of the Software.\n',
+    ' *\n',
+    ' * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n',
+    ' * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n',
+    ' * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n',
+    ' * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n',
+    ' * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n',
+    ' * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n',
+    ' *\n',
+    ' * https://www.FreeRTOS.org\n',
+    ' * https://github.com/FreeRTOS\n',
+    ' *\n',
+    ' */\n',
+]
+
+def main():
+    parser = HeaderChecker.configArgParser()
+    args   = parser.parse_args()
+
+    # Configure the checks then run
+    checker = HeaderChecker(KERNEL_HEADER,
+                            ignored_files=KERNEL_IGNORED_FILES,
+                            ignored_ext=KERNEL_IGNORED_EXTENSIONS,
+                            ignored_patterns=KERNEL_IGNORED_PATTERNS,
+                            third_party_patterns=KERNEL_THIRD_PARTY_PATTERNS,
+                            py_ext=KERNEL_PY_EXTENSIONS,
+                            asm_ext=KERNEL_ASM_EXTENSIONS)
+    checker.ignoreFile(os.path.split(__file__)[-1])
+
+    rc = checker.processArgs(args)
+    if rc:
+        checker.showHelp(__file__)
+
+    return rc
+
+if __name__ == '__main__':
+    exit(main())
+

.github/uncrustify.cfg

@@ -0,0 +1,160 @@
+# Uncrustify-0.67
+input_tab_size                  = 4        # unsigned number
+output_tab_size                 = 4        # unsigned number
+sp_arith                        = force    # ignore/add/remove/force
+sp_assign                       = force    # ignore/add/remove/force
+sp_assign_default               = force    # ignore/add/remove/force
+sp_before_assign                = force    # ignore/add/remove/force
+sp_after_assign                 = force    # ignore/add/remove/force
+sp_enum_assign                  = force    # ignore/add/remove/force
+sp_enum_before_assign           = force    # ignore/add/remove/force
+sp_enum_after_assign            = force    # ignore/add/remove/force
+sp_pp_stringify                 = add      # ignore/add/remove/force
+sp_bool                         = force    # ignore/add/remove/force
+sp_compare                      = force    # ignore/add/remove/force
+sp_inside_paren                 = force    # ignore/add/remove/force
+sp_paren_paren                  = force    # ignore/add/remove/force
+sp_paren_brace                  = force    # ignore/add/remove/force
+sp_before_ptr_star              = force    # ignore/add/remove/force
+sp_before_unnamed_ptr_star      = force    # ignore/add/remove/force
+sp_between_ptr_star             = remove   # ignore/add/remove/force
+sp_after_ptr_star               = force    # ignore/add/remove/force
+sp_before_byref                 = force    # ignore/add/remove/force
+sp_after_byref                  = remove   # ignore/add/remove/force
+sp_after_byref_func             = remove   # ignore/add/remove/force
+sp_before_angle                 = remove   # ignore/add/remove/force
+sp_inside_angle                 = remove   # ignore/add/remove/force
+sp_after_angle                  = force    # ignore/add/remove/force
+sp_before_sparen                = remove   # ignore/add/remove/force
+sp_inside_sparen                = force    # ignore/add/remove/force
+sp_after_sparen                 = force    # ignore/add/remove/force
+sp_sparen_brace                 = force    # ignore/add/remove/force
+sp_before_semi_for              = remove   # ignore/add/remove/force
+sp_before_semi_for_empty        = add      # ignore/add/remove/force
+sp_after_semi_for_empty         = force    # ignore/add/remove/force
+sp_before_square                = remove   # ignore/add/remove/force
+sp_before_squares               = remove   # ignore/add/remove/force
+sp_inside_square                = force    # ignore/add/remove/force
+sp_after_comma                  = force    # ignore/add/remove/force
+sp_after_cast                   = force    # ignore/add/remove/force
+sp_inside_paren_cast            = force    # ignore/add/remove/force
+sp_sizeof_paren                 = remove   # ignore/add/remove/force
+sp_inside_braces_enum           = force    # ignore/add/remove/force
+sp_inside_braces_struct         = force    # ignore/add/remove/force
+sp_inside_braces                = force    # ignore/add/remove/force
+sp_inside_braces_empty          = remove   # ignore/add/remove/force
+sp_type_func                    = force    # ignore/add/remove/force
+sp_func_proto_paren             = remove   # ignore/add/remove/force
+sp_func_def_paren               = remove   # ignore/add/remove/force
+sp_inside_fparens               = remove   # ignore/add/remove/force
+sp_inside_fparen                = force    # ignore/add/remove/force
+sp_fparen_brace                 = add      # ignore/add/remove/force
+sp_func_call_paren              = remove   # ignore/add/remove/force
+sp_func_class_paren             = remove   # ignore/add/remove/force
+sp_return_paren                 = remove   # ignore/add/remove/force
+sp_attribute_paren              = remove   # ignore/add/remove/force
+sp_defined_paren                = remove   # ignore/add/remove/force
+sp_macro                        = force    # ignore/add/remove/force
+sp_macro_func                   = force    # ignore/add/remove/force
+sp_brace_typedef                = force    # ignore/add/remove/force
+sp_before_dc                    = remove   # ignore/add/remove/force
+sp_after_dc                     = remove   # ignore/add/remove/force
+sp_cond_colon                   = force    # ignore/add/remove/force
+sp_cond_question                = force    # ignore/add/remove/force
+sp_case_label                   = force    # ignore/add/remove/force
+sp_endif_cmt                    = force    # ignore/add/remove/force
+sp_before_tr_emb_cmt            = force    # ignore/add/remove/force
+sp_num_before_tr_emb_cmt        = 1        # unsigned number
+indent_columns                  = 4        # unsigned number
+indent_with_tabs                = 0        # unsigned number
+indent_align_string             = true     # false/true
+indent_class                    = true     # false/true
+indent_class_colon              = true     # false/true
+indent_member                   = 3        # unsigned number
+indent_switch_case              = 4        # unsigned number
+indent_case_brace               = 3        # number
+nl_assign_leave_one_liners      = true     # false/true
+nl_class_leave_one_liners       = true     # false/true
+nl_start_of_file                = remove   # ignore/add/remove/force
+nl_end_of_file                  = force    # ignore/add/remove/force
+nl_end_of_file_min              = 1        # unsigned number
+nl_assign_brace                 = add      # ignore/add/remove/force
+nl_func_var_def_blk             = 1        # unsigned number
+nl_fcall_brace                  = add      # ignore/add/remove/force
+nl_enum_brace                   = force    # ignore/add/remove/force
+nl_struct_brace                 = force    # ignore/add/remove/force
+nl_union_brace                  = force    # ignore/add/remove/force
+nl_if_brace                     = add      # ignore/add/remove/force
+nl_brace_else                   = add      # ignore/add/remove/force
+nl_else_brace                   = add      # ignore/add/remove/force
+nl_getset_brace                 = force    # ignore/add/remove/force
+nl_for_brace                    = add      # ignore/add/remove/force
+nl_while_brace                  = add      # ignore/add/remove/force
+nl_do_brace                     = add      # ignore/add/remove/force
+nl_switch_brace                 = add      # ignore/add/remove/force
+nl_multi_line_define            = true     # false/true
+nl_before_case                  = true     # false/true
+nl_after_case                   = true     # false/true
+nl_func_type_name               = remove   # ignore/add/remove/force
+nl_func_proto_type_name         = remove   # ignore/add/remove/force
+nl_func_paren                   = remove   # ignore/add/remove/force
+nl_func_def_paren               = remove   # ignore/add/remove/force
+nl_func_decl_start              = remove   # ignore/add/remove/force
+nl_func_def_start               = remove   # ignore/add/remove/force
+nl_func_decl_args               = add      # ignore/add/remove/force
+nl_func_def_args                = add      # ignore/add/remove/force
+nl_func_decl_end                = remove   # ignore/add/remove/force
+nl_func_def_end                 = remove   # ignore/add/remove/force
+nl_fdef_brace                   = add      # ignore/add/remove/force
+nl_after_semicolon              = true     # false/true
+nl_after_brace_open             = true     # false/true
+nl_after_brace_close            = true     # false/true
+nl_squeeze_ifdef                = true     # false/true
+nl_before_if                    = force    # ignore/add/remove/force
+nl_after_if                     = force    # ignore/add/remove/force
+nl_before_for                   = force    # ignore/add/remove/force
+nl_after_for                    = force    # ignore/add/remove/force
+nl_before_while                 = force    # ignore/add/remove/force
+nl_after_while                  = force    # ignore/add/remove/force
+nl_before_switch                = force    # ignore/add/remove/force
+nl_after_switch                 = force    # ignore/add/remove/force
+nl_before_do                    = force    # ignore/add/remove/force
+nl_after_do                     = force    # ignore/add/remove/force
+nl_max                          = 4        # unsigned number
+nl_after_func_proto_group       = 1        # unsigned number
+nl_after_func_body_class        = 2        # unsigned number
+nl_before_block_comment         = 2        # unsigned number
+eat_blanks_after_open_brace     = true     # false/true
+eat_blanks_before_close_brace   = true     # false/true
+nl_after_return                 = true     # false/true
+pos_bool                        = trail    # ignore/join/lead/lead_break/lead_force/trail/trail_break/trail_force
+align_var_def_amp_style         = 1        # unsigned number
+align_var_def_thresh            = 16       # unsigned number
+align_assign_thresh             = 12       # unsigned number
+align_struct_init_span          = 3        # unsigned number
+align_typedef_gap               = 3        # unsigned number
+align_typedef_span              = 5        # unsigned number
+align_typedef_star_style        = 1        # unsigned number
+align_typedef_amp_style         = 1        # unsigned number
+align_right_cmt_span            = 3        # unsigned number
+align_nl_cont                   = true     # false/true
+align_pp_define_gap             = 4        # unsigned number
+align_pp_define_span            = 3        # unsigned number
+cmt_cpp_to_c                    = true     # false/true
+cmt_star_cont                   = true     # false/true
+mod_full_brace_do               = add      # ignore/add/remove/force
+mod_full_brace_for              = add      # ignore/add/remove/force
+mod_full_brace_if               = add      # ignore/add/remove/force
+mod_full_brace_while            = add      # ignore/add/remove/force
+mod_full_paren_if_bool          = true     # false/true
+mod_remove_extra_semicolon      = true     # false/true
+mod_add_long_ifdef_endif_comment = 10      # unsigned number
+mod_add_long_ifdef_else_comment = 10       # unsigned number
+mod_case_brace                  = remove   # ignore/add/remove/force
+mod_remove_empty_return         = true     # false/true
+pp_indent                       = force    # ignore/add/remove/force
+pp_indent_at_level              = true     # false/true
+pp_indent_count                 = 4        # unsigned number
+pp_space                        = remove   # ignore/add/remove/force
+pp_if_indent_code               = true     # false/true
+# option(s) with 'not default' value: 158

.github/workflows/auto-release.yml

@@ -0,0 +1,57 @@
+name: Kernel-Auto-Release
+
+on:
+  workflow_dispatch:
+    inputs:
+      commit_id:
+        description: 'Commit ID'
+        required: true
+        default: 'HEAD'
+      version_number:
+        description: 'Version Number (Ex. 10.4.4)'
+        required: true
+        default: '10.4.4'
+      main_br_version:
+        description: "Version String for task.h on main branch (leave empty to leave as-is)."
+        require: false
+        default: ''
+
+jobs:
+  release-packager:
+    name: Release Packager
+    runs-on: ubuntu-latest
+    steps:
+      # Install python 3
+      - name: Tool Setup
+        uses: actions/setup-python@v2
+        with:
+          python-version: 3.7.10
+          architecture:   x64
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+      # Currently FreeRTOS/.github/scripts houses the release script. Download it for upcoming usage
+      - name: Checkout FreeRTOS Release Tools
+        uses: actions/checkout@v2
+        with:
+          repository: FreeRTOS/FreeRTOS
+          path: tools
+
+      # Simpler git auth if we use checkout action and forward the repo to release script
+      - name: Checkout FreeRTOS Kernel
+        uses: actions/checkout@v2
+        with:
+          path: local_kernel
+          fetch-depth: 0
+
+      - name: Release
+        run: |
+          # Configure repo for push
+          git config --global user.name ${{ github.actor }}
+          git config --global user.email ${{ github.actor }}@users.noreply.github.com
+          # Install deps and run
+          pip install -r ./tools/.github/scripts/release-requirements.txt
+          ./tools/.github/scripts/release.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit=${{ github.event.inputs.commit_id }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
+          exit $?
+        env:
+            GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

.github/workflows/ci.yml

@@ -3,7 +3,7 @@ on:
   push:
     branches: ["**"]
   pull_request:
-    branches: [master]
+    branches: [main]
   workflow_dispatch:
 jobs:
   spell-check:
@@ -12,7 +12,7 @@ jobs:
       - name: Checkout Parent Repo
         uses: actions/checkout@v2
         with:
-          ref: master
+          ref: main
           repository: aws/aws-iot-device-sdk-embedded-C
           path: main
       - name: Clone This Repo
@@ -34,6 +34,27 @@ jobs:
           else
             exit 1
           fi
+  formatting:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v2
+      - name: Install Uncrustify
+        run: sudo apt-get install uncrustify
+      - name: Run Uncrustify
+        run: |
+          uncrustify --version
+          find . \( -name portable \) -prune -false -o -iname "*.[hc]" -exec uncrustify --check -c .github/uncrustify.cfg {} +
+      - name: Check For Trailing Whitespace
+        run: |
+          set +e
+          grep --exclude="README.md" --exclude-dir="portable"  -rnI -e "[[:blank:]]$" .
+          if [ "$?" = "0" ]; then
+            echo "Files have trailing whitespace."
+            exit 1
+          else
+            exit 0
+          fi
+
   url-check:
     runs-on: ubuntu-latest
     steps:
@@ -44,3 +65,4 @@ jobs:
       - name: URL Checker
         run: |
             bash kernel/.github/actions/url_verifier.sh kernel
+

.github/workflows/git-secrets.yml

@@ -0,0 +1,24 @@
+name: git-secrets Check
+on:
+  push:
+  pull_request:
+  workflow_dispatch:
+jobs:
+  git-secrets:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v2
+        with:
+          submodules: recursive
+      - name: Checkout awslabs/git-secrets
+        uses: actions/checkout@v2
+        with:
+          repository: awslabs/git-secrets
+          ref: master
+          path: git-secrets
+      - name: Install git-secrets
+        run: cd git-secrets && sudo make install && cd ..
+      - name: Run git-secrets
+        run: |
+          git-secrets --register-aws
+          git-secrets --scan

.github/workflows/kernel-checks.yml

@@ -0,0 +1,72 @@
+name: Kernel-Checker
+
+on: [push, pull_request]
+
+jobs:
+  kernel-checker:
+    name: FreeRTOS Kernel Header Checks
+    runs-on: ubuntu-latest
+    steps:
+      # Install python 3
+      - name: Tool Setup
+        uses: actions/setup-python@v2
+        with:
+          python-version: 3.7.10
+          architecture:   x64
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+      # There is shared code, hosted by FreeRTOS/FreeRTOS, with deps needed by header checker
+      - name: Checkout FreeRTOS Tools
+        uses: actions/checkout@v2
+        with:
+          repository: FreeRTOS/FreeRTOS
+          ref:  main
+          path: tools
+
+      # Checkout user pull request changes
+      - name: Checkout Pull Request
+        uses: actions/checkout@v2
+        with:
+          ref:  ${{ github.event.pull_request.head.sha }}
+          path: inspect
+
+      # Collect all affected files
+      - name: Collecting changed files
+        uses: lots0logs/gh-action-get-changed-files@2.1.4
+        with:
+          token: ${{ secrets.GITHUB_TOKEN }}
+
+      # Run checks
+      - name: Check File Headers
+        run: |
+          mv tools/.github/scripts/common inspect/.github/scripts
+          pip install -r inspect/.github/scripts/common/requirements.txt
+          cd inspect
+          .github/scripts/kernel_checker.py --json ${HOME}/files_modified.json ${HOME}/files_added.json ${HOME}/files_renamed.json
+          exit $?
+  build-checker:
+    name: FreeRTOS Posix Build Check
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout the parent repository
+        uses: actions/checkout@v2
+        with:
+          ref: main
+          repository: FreeRTOS/FreeRTOS
+          submodules: 'recursive'
+          fetch-depth: 1
+          path: ./workspace
+      - name: Checkout the current repository
+        uses: actions/checkout@v2
+        with:
+          path: ./workspace/FreeRTOS/Source
+      - name: Posix Build Checker
+        run: |
+              bash workspace/.github/scripts/posix_build_checker.sh workspace
+      - name: Install lib pcap dev
+        run: |
+          sudo apt-get install libpcap-dev
+      - name: Posix Network Build Checker
+        run: |
+          bash workspace/.github/scripts/posix_network_build_checker.sh workspace

.github/workflows/unit-tests.yml

@@ -0,0 +1,56 @@
+name: CMock Unit Tests
+on: [push, pull_request]
+
+jobs:
+  run:
+    runs-on: ubuntu-latest
+    steps:
+    - name: Checkout Parent Repository
+      uses: actions/checkout@v2
+      with:
+        ref: main
+        repository: FreeRTOS/FreeRTOS
+        submodules: 'recursive'
+        fetch-depth: 1
+    - name: Clone This Repo
+      uses: actions/checkout@v2
+      with:
+        path: ./FreeRTOS/Source
+
+    - name: Setup Python
+      uses: actions/setup-python@master
+      with:
+        python-version: 3.8
+
+    - name: Install packages
+      run: |
+          sudo apt-get install lcov cflow ruby doxygen build-essential
+    - name: Run Unit Tests with ENABLE_SANITIZER=1
+      run: |
+          make -C FreeRTOS/Test/CMock clean
+          make -C FreeRTOS/Test/CMock ENABLE_SANITIZER=1 run_col_formatted
+    - name: Run Unit Tests for coverage
+      run: |
+          make -C FreeRTOS/Test/CMock clean
+          make -C FreeRTOS/Test/CMock lcovhtml
+          lcov --config-file FreeRTOS/Test/CMock/lcovrc --summary FreeRTOS/Test/CMock/build/cmock_test.info > FreeRTOS/Test/CMock/build/cmock_test_summary.txt
+    - name: Upload coverage to Codecov
+      uses: codecov/codecov-action@v1
+      with:
+        files: FreeRTOS/Test/CMock/build/cmock_test.info
+        working-directory: .
+        root_dir: FreeRTOS/Source
+        flags: unittests
+        fail_ci_if_error: false
+        path_to_write_report: coverage/codecov_report.txt
+        verbose: false
+    - name: Archive code coverage data
+      uses: actions/upload-artifact@v2
+      with:
+        name: coverage-data
+        path: FreeRTOS/Test/CMock/build/cmock_test*
+    - name: Archive code coverage html report
+      uses: actions/upload-artifact@v2
+      with:
+        name: coverage-report
+        path: FreeRTOS/Test/CMock/build/coverage

.gitmodules

@@ -0,0 +1,6 @@
+[submodule "ThirdParty/FreeRTOS-Kernel-Partner-Supported-Ports"]
+	path = portable/ThirdParty/Partner-Supported-Ports
+	url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports
+[submodule "ThirdParty/FreeRTOS-Kernel-Community-Supported-Ports"]
+	path = portable/ThirdParty/Community-Supported-Ports
+	url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Community-Supported-Ports

History.txt

@@ -1,13 +1,96 @@
 Documentation and download available at https://www.FreeRTOS.org/
 
-Changes between FreeRTOS V10.4.1 and FreeRTOS V10.4.2 released November 10 2020
+Changes between FreeRTOS V10.4.4 and FreeRTOS V10.4.5 released September 10 2021
+
+	See https://www.FreeRTOS.org/FreeRTOS-V10.4.5.html
+
+	+ Introduce configRUN_TIME_COUNTER_TYPE which enables developers to define
+	  the type used to hold run time statistic counters. Defaults to uint32_t
+	  for backward compatibility. #define configRUN_TIME_COUNTER_TYPE to a type
+	  (for example, uint64_t) in FreeRTOSConfig.h to override the default.
+	+ Introduce ulTaskGetIdleRunTimePercent() to complement the pre-existing
+	  ulTaskGetIdleRunTimeCounter(). Whereas the pre-existing function returns
+	  the raw run time counter value, the new function returns the percentage of
+	  the entire run time consumed by the idle task. Note the amount of idle
+	  time is only a good measure of the slack time in a system if there are no
+	  other tasks executing at the idle priority, tickless idle is not used, and
+	  configIDLE_SHOULD_YIELD is set to 0.
+	+ ARMv8-M secure-side port:  Tasks that call secure functions from the
+	  non-secure side of an ARMv8-M MCU (ARM Cortex-M23 and Cortex-M33) have two
+	  contexts – one on the non-secure side and one on the secure-side. Previous
+	  versions of the FreeRTOS ARMv8-M secure-side ports allocated the structures
+	  that reference secure-side contexts at run time.  Now the structures are
+	  allocated statically at compile time.  The change necessitates the
+	  introduction of the secureconfigMAX_SECURE_CONTEXTS configuration constant,
+	  which sets the number of statically allocated secure contexts.
+	  secureconfigMAX_SECURE_CONTEXTS defaults to 8 if left undefined.
+	  Applications that only use FreeRTOS code on the non-secure side, such as
+	  those running third-party code on the secure side, are not affected by
+	  this change.
+
+
+Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.4 released May 28 2021
+    + Minor performance improvements to xTaskIncrementTick() achieved by providing
+      macro versions of uxListRemove() and vListInsertEnd().
+    + Minor refactor of timers.c that obsoletes the need for the
+      tmrCOMMAND_START_DONT_TRACE macro and removes the need for timers.c to
+      post to its own event queue.  A consequence of this change is that auto-
+      reload timers that miss their intended next execution time will execute
+      again immediately rather than executing again the next time the command
+      queue is processed.  (thanks Jeff Tenney).
+    + Fix a race condition in the message buffer implementation.  The
+      underlying cause was that length and data bytes are written and read as
+      two distinct operations, which both modify the size of the buffer. If a
+      context switch occurs after adding or removing the length bytes, but
+      before adding or removing the data bytes, then another task may observe
+      the message buffer in an invalid state.
+    + The xTaskCreate() and xTaskCreateStatic() functions accept a task priority
+      as an input parameter.  The priority has always been silently capped to
+      (configMAX_PRIORITIES - 1) should it be set to a value above that priority.
+      Now values above that priority will also trigger a configASSERT() failure.
+	+ Replace configASSERT( pcQueueName ) in vQueueAddToRegistry with a NULL
+      pointer check.
+    + Introduce the configSTACK_ALLOCATION_FROM_SEPARATE_HEAP configuration
+      constant that enables the stack allocated to tasks to come from a heap other
+      than the heap used by other memory allocations.  This enables stacks to be
+      placed within special regions, such as fast tightly coupled memory.
+    + If there is an attempt to add the same queue or semaphore handle to the
+      queue registry more than once then prior versions would create two separate
+      entries.  Now if this is done the first entry is overwritten rather than
+      duplicated.
+    + Update the ESP32 port and TF-M (Trusted Firmware M)code to the latest from
+      their respective repositories.
+    + Correct a build error in the POSIX port.
+    + Additional minor formatting updates, including replacing tabs with spaces
+      in more files.
+    + Other minor updates include adding additional configASSERT() checks and
+      correcting and improving code comments.
+    + Go look at the smp branch to see the progress towards the Symetric
+      Multiprocessing Kernel. https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/smp
+
+Changes between FreeRTOS V10.4.2 and FreeRTOS V10.4.3 released December 14 2020
+
+	V10.4.3 is included in the 202012.00 LTS release.  Learn more at https:/freertos.org/lts-libraries.html
+
 	See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
 
-	+ Fix an issue in the ARMv8-M ports that caused BASEPRI to be masked 
-	  between the first task starting to execute and that task making 
+	+ Changes to improve robustness and consistency for buffer allocation in
+	  the heap, queue and stream buffer.
+	+ The following functions can no longer be called from unprivileged code.
+	  - xTaskCreateRestricted
+	  - xTaskCreateRestrictedStatic
+	  - vTaskAllocateMPURegions
+
+
+Changes between FreeRTOS V10.4.1 and FreeRTOS V10.4.2 released November 10 2020
+
+	See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
+
+	+ Fix an issue in the ARMv8-M ports that caused BASEPRI to be masked
+	  between the first task starting to execute and that task making
 	  a FreeRTOS API call.
 	+ Introduced xTaskDelayUntil(), which is functionally equivalent to
-	  vTaskDelayUntil(), with the addition of returning a value to 
+	  vTaskDelayUntil(), with the addition of returning a value to
 	  indicating whether or not the function placed the calling task into
 	  the Blocked state or not.
 	+ Update WolfSSL to 4.5.0 and add the FIPS ready demo.
@@ -18,10 +101,11 @@ Changes between FreeRTOS V10.4.1 and FreeRTOS V10.4.2 released November 10 2020
 
 
 Changes between FreeRTOS V10.4.0 and FreeRTOS V10.4.1 released September 17 2020
+
 	See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
 
-	+ Fixed an incorrectly named parameter that prevented the 
-	  ulTaskNotifyTakeIndexed macro compiling, and the name space clash in the 
+	+ Fixed an incorrectly named parameter that prevented the
+	  ulTaskNotifyTakeIndexed macro compiling, and the name space clash in the
 	  test code that prevented this error causing test failures.
 
 
@@ -62,8 +146,8 @@ Changes between FreeRTOS V10.3.1 and FreeRTOS V10.4.0 released September 10 2020
 	+ Added new POSIX port layer that allows FreeRTOS to run on Linux hosts in
 	  the same way the Windows port layer enables FreeRTOS to run on Windows
 	  hosts.
-	+ Many other minor optimisations and enhancements. For full details  
-	  see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/master
+	+ Many other minor optimisations and enhancements. For full details
+	  see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/main
 
 
 Changes between FreeRTOS V10.3.0 and FreeRTOS V10.3.1 released February 18 2020

README.md

@@ -31,7 +31,7 @@ See the readme file in the ```./portable``` directory for more information.
 - The ```./include``` directory contains the real time kernel header files.
 
 ### Code Formatting
-FreeRTOS files are formatted using the "uncrustify" tool. The configuration file used by uncrustify can be found in the [FreeRTOS/FreeRTOS repository](https://github.com/FreeRTOS/FreeRTOS/blob/master/tools/uncrustify.cfg). 
+FreeRTOS files are formatted using the "uncrustify" tool. The configuration file used by uncrustify can be found in the [FreeRTOS/FreeRTOS repository](https://github.com/FreeRTOS/FreeRTOS/blob/main/tools/uncrustify.cfg). 
 
 ### Spelling
 *lexicon.txt* contains words that are not traditionally found in an English dictionary. It is used by the spellchecker to verify the various jargon, variable names, and other odd words used in the FreeRTOS code base. If your pull request fails to pass the spelling and you believe this is a mistake, then add the word to *lexicon.txt*. 

croutine.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in

event_groups.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -626,7 +628,11 @@ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup,
 void vEventGroupDelete( EventGroupHandle_t xEventGroup )
 {
     EventGroup_t * pxEventBits = xEventGroup;
-    const List_t * pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );
+    const List_t * pxTasksWaitingForBits;
+
+    configASSERT( pxEventBits );
+
+    pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits );
 
     vTaskSuspendAll();
     {

include/FreeRTOS.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -45,7 +47,7 @@
  *     contains the typedefs required to build FreeRTOS.  Read the instructions
  *     in FreeRTOS/source/stdint.readme for more information.
  */
-#include <stdint.h>     /* READ COMMENT ABOVE. */
+#include <stdint.h> /* READ COMMENT ABOVE. */
 
 /* *INDENT-OFF* */
 #ifdef __cplusplus
@@ -128,21 +130,23 @@
 
 #ifdef INCLUDE_xTaskDelayUntil
     #ifdef INCLUDE_vTaskDelayUntil
-        /* INCLUDE_vTaskDelayUntil was replaced by INCLUDE_xTaskDelayUntil.  Backward
-         * compatibility is maintained if only one or the other is defined, but
-         * there is a conflict if both are defined. */
+
+/* INCLUDE_vTaskDelayUntil was replaced by INCLUDE_xTaskDelayUntil.  Backward
+ * compatibility is maintained if only one or the other is defined, but
+ * there is a conflict if both are defined. */
         #error INCLUDE_vTaskDelayUntil and INCLUDE_xTaskDelayUntil are both defined.  INCLUDE_vTaskDelayUntil is no longer required and should be removed
     #endif
 #endif
 
 #ifndef INCLUDE_xTaskDelayUntil
     #ifdef INCLUDE_vTaskDelayUntil
-        /* If INCLUDE_vTaskDelayUntil is set but INCLUDE_xTaskDelayUntil is not then
-         * the project's FreeRTOSConfig.h probably pre-dates the introduction of
-         * xTaskDelayUntil and setting INCLUDE_xTaskDelayUntil to whatever
-         * INCLUDE_vTaskDelayUntil is set to will ensure backward compatibility.
-         */
-        #define INCLUDE_xTaskDelayUntil INCLUDE_vTaskDelayUntil
+
+/* If INCLUDE_vTaskDelayUntil is set but INCLUDE_xTaskDelayUntil is not then
+ * the project's FreeRTOSConfig.h probably pre-dates the introduction of
+ * xTaskDelayUntil and setting INCLUDE_xTaskDelayUntil to whatever
+ * INCLUDE_vTaskDelayUntil is set to will ensure backward compatibility.
+ */
+        #define INCLUDE_xTaskDelayUntil    INCLUDE_vTaskDelayUntil
     #endif
 #endif
 
@@ -903,6 +907,14 @@
     #define configSTACK_DEPTH_TYPE    uint16_t
 #endif
 
+#ifndef configRUN_TIME_COUNTER_TYPE
+
+/* Defaults to uint32_t for backward compatibility, but can be overridden in
+ * FreeRTOSConfig.h if uint32_t is too restrictive. */
+
+    #define configRUN_TIME_COUNTER_TYPE    uint32_t
+#endif
+
 #ifndef configMESSAGE_BUFFER_LENGTH_TYPE
 
 /* Defaults to size_t for backward compatibility, but can be overridden
@@ -979,7 +991,7 @@
 
 #ifndef configMIN
 
-/* The application writer has not provided their own MAX macro, so define
+/* The application writer has not provided their own MIN macro, so define
  * the following generic implementation. */
     #define configMIN( a, b )    ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) )
 #endif
@@ -1054,6 +1066,11 @@
     #define configRUN_FREERTOS_SECURE_ONLY    0
 #endif
 
+#ifndef configRUN_ADDITIONAL_TESTS
+    #define configRUN_ADDITIONAL_TESTS    0
+#endif
+
+
 /* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using
  * dynamically allocated RAM, in which case when any task is deleted it is known
  * that both the task's stack and TCB need to be freed.  Sometimes the
@@ -1105,7 +1122,7 @@
  * data hiding policy, so the real structures used by FreeRTOS to maintain the
  * state of tasks, queues, semaphores, etc. are not accessible to the application
  * code.  However, if the application writer wants to statically allocate such
- * an object then the size of the object needs to be know.  Dummy structures
+ * an object then the size of the object needs to be known.  Dummy structures
  * that are guaranteed to have the same size and alignment requirements of the
  * real objects are used for this purpose.  The dummy list and list item
  * structures below are used for inclusion in such a dummy structure.
@@ -1154,7 +1171,7 @@ typedef struct xSTATIC_LIST
  * strict data hiding policy.  This means the Task structure used internally by
  * FreeRTOS is not accessible to application code.  However, if the application
  * writer wants to statically allocate the memory required to create a task then
- * the size of the task object needs to be know.  The StaticTask_t structure
+ * the size of the task object needs to be known.  The StaticTask_t structure
  * below is provided for this purpose.  Its sizes and alignment requirements are
  * guaranteed to match those of the genuine structure, no matter which
  * architecture is being used, and no matter how the values in FreeRTOSConfig.h
@@ -1190,7 +1207,7 @@ typedef struct xSTATIC_TCB
         void * pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
     #endif
     #if ( configGENERATE_RUN_TIME_STATS == 1 )
-        uint32_t ulDummy16;
+        configRUN_TIME_COUNTER_TYPE ulDummy16;
     #endif
     #if ( configUSE_NEWLIB_REENTRANT == 1 )
         struct  _reent xDummy17;
@@ -1217,7 +1234,7 @@ typedef struct xSTATIC_TCB
  * strict data hiding policy.  This means the Queue structure used internally by
  * FreeRTOS is not accessible to application code.  However, if the application
  * writer wants to statically allocate the memory required to create a queue
- * then the size of the queue object needs to be know.  The StaticQueue_t
+ * then the size of the queue object needs to be known.  The StaticQueue_t
  * structure below is provided for this purpose.  Its sizes and alignment
  * requirements are guaranteed to match those of the genuine structure, no
  * matter which architecture is being used, and no matter how the values in
@@ -1288,7 +1305,7 @@ typedef struct xSTATIC_EVENT_GROUP
  * strict data hiding policy.  This means the software timer structure used
  * internally by FreeRTOS is not accessible to application code.  However, if
  * the application writer wants to statically allocate the memory required to
- * create a software timer then the size of the queue object needs to be know.
+ * create a software timer then the size of the queue object needs to be known.
  * The StaticTimer_t structure below is provided for this purpose.  Its sizes
  * and alignment requirements are guaranteed to match those of the genuine
  * structure, no matter which architecture is being used, and no matter how the
@@ -1316,12 +1333,12 @@ typedef struct xSTATIC_TIMER
  * internally by FreeRTOS is not accessible to application code.  However, if
  * the application writer wants to statically allocate the memory required to
  * create a stream buffer then the size of the stream buffer object needs to be
- * know.  The StaticStreamBuffer_t structure below is provided for this purpose.
- * Its size and alignment requirements are guaranteed to match those of the
- * genuine structure, no matter which architecture is being used, and no matter
- * how the values in FreeRTOSConfig.h are set.  Its contents are somewhat
- * obfuscated in the hope users will recognise that it would be unwise to make
- * direct use of the structure members.
+ * known.  The StaticStreamBuffer_t structure below is provided for this
+ * purpose.  Its size and alignment requirements are guaranteed to match those
+ * of the genuine structure, no matter which architecture is being used, and
+ * no matter how the values in FreeRTOSConfig.h are set.  Its contents are
+ * somewhat obfuscated in the hope users will recognise that it would be unwise
+ * to make direct use of the structure members.
  */
 typedef struct xSTATIC_STREAM_BUFFER
 {

include/StackMacros.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in

include/atomic.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in

include/croutine.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -65,7 +67,7 @@ typedef struct corCoRoutineControlBlock
  *                               crCOROUTINE_CODE pxCoRoutineCode,
  *                               UBaseType_t uxPriority,
  *                               UBaseType_t uxIndex
- *                             ); 
+ *                             );
  * </pre>
  *
  * Create a new co-routine and add it to the list of co-routines that are

include/deprecated_definitions.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in

include/event_groups.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -102,10 +104,10 @@ typedef TickType_t               EventBits_t;
  *
  * Internally, within the FreeRTOS implementation, event groups use a [small]
  * block of memory, in which the event group's structure is stored.  If an event
- * groups is created using xEventGropuCreate() then the required memory is
+ * groups is created using xEventGroupCreate() then the required memory is
  * automatically dynamically allocated inside the xEventGroupCreate() function.
  * (see https://www.FreeRTOS.org/a00111.html).  If an event group is created
- * using xEventGropuCreateStatic() then the application writer must instead
+ * using xEventGroupCreateStatic() then the application writer must instead
  * provide the memory that will get used by the event group.
  * xEventGroupCreateStatic() therefore allows an event group to be created
  * without using any dynamic memory allocation.
@@ -158,10 +160,10 @@ typedef TickType_t               EventBits_t;
  *
  * Internally, within the FreeRTOS implementation, event groups use a [small]
  * block of memory, in which the event group's structure is stored.  If an event
- * groups is created using xEventGropuCreate() then the required memory is
+ * groups is created using xEventGroupCreate() then the required memory is
  * automatically dynamically allocated inside the xEventGroupCreate() function.
  * (see https://www.FreeRTOS.org/a00111.html).  If an event group is created
- * using xEventGropuCreateStatic() then the application writer must instead
+ * using xEventGroupCreateStatic() then the application writer must instead
  * provide the memory that will get used by the event group.
  * xEventGroupCreateStatic() therefore allows an event group to be created
  * without using any dynamic memory allocation.

include/list.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -31,7 +33,7 @@
  *
  * list_ts can only store pointers to list_item_ts.  Each ListItem_t contains a
  * numeric value (xItemValue).  Most of the time the lists are sorted in
- * descending item value order.
+ * ascending item value order.
  *
  * Lists are created already containing one list item.  The value of this
  * item is the maximum possible that can be stored, it is therefore always at
@@ -141,19 +143,19 @@
 struct xLIST;
 struct xLIST_ITEM
 {
-    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE               /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-    configLIST_VOLATILE TickType_t xItemValue;              /*< The value being listed.  In most cases this is used to sort the list in descending order. */
-    struct xLIST_ITEM * configLIST_VOLATILE pxNext;         /*< Pointer to the next ListItem_t in the list. */
-    struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;     /*< Pointer to the previous ListItem_t in the list. */
-    void * pvOwner;                                         /*< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
-    struct xLIST * configLIST_VOLATILE pxContainer;         /*< Pointer to the list in which this list item is placed (if any). */
-    listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE              /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE           /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    configLIST_VOLATILE TickType_t xItemValue;          /*< The value being listed.  In most cases this is used to sort the list in ascending order. */
+    struct xLIST_ITEM * configLIST_VOLATILE pxNext;     /*< Pointer to the next ListItem_t in the list. */
+    struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */
+    void * pvOwner;                                     /*< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
+    struct xLIST * configLIST_VOLATILE pxContainer;     /*< Pointer to the list in which this list item is placed (if any). */
+    listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE          /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 };
-typedef struct xLIST_ITEM ListItem_t;                       /* For some reason lint wants this as two separate definitions. */
+typedef struct xLIST_ITEM ListItem_t;                   /* For some reason lint wants this as two separate definitions. */
 
 struct xMINI_LIST_ITEM
 {
-    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE     /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
     configLIST_VOLATILE TickType_t xItemValue;
     struct xLIST_ITEM * configLIST_VOLATILE pxNext;
     struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
@@ -165,11 +167,11 @@ typedef struct xMINI_LIST_ITEM MiniListItem_t;
  */
 typedef struct xLIST
 {
-    listFIRST_LIST_INTEGRITY_CHECK_VALUE          /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listFIRST_LIST_INTEGRITY_CHECK_VALUE      /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
     volatile UBaseType_t uxNumberOfItems;
-    ListItem_t * configLIST_VOLATILE pxIndex;     /*< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
-    MiniListItem_t xListEnd;                      /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
-    listSECOND_LIST_INTEGRITY_CHECK_VALUE         /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
+    MiniListItem_t xListEnd;                  /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
+    listSECOND_LIST_INTEGRITY_CHECK_VALUE     /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
 } List_t;
 
 /*
@@ -192,7 +194,7 @@ typedef struct xLIST
 
 /*
  * Access macro to set the value of the list item.  In most cases the value is
- * used to sort the list in descending order.
+ * used to sort the list in ascending order.
  *
  * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
  * \ingroup LinkedList
@@ -289,6 +291,86 @@ typedef struct xLIST
         ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner;                                         \
     }
 
+/*
+ * Version of uxListRemove() that does not return a value.  Provided as a slight
+ * optimisation for xTaskIncrementTick() by being inline.
+ *
+ * Remove an item from a list.  The list item has a pointer to the list that
+ * it is in, so only the list item need be passed into the function.
+ *
+ * @param uxListRemove The item to be removed.  The item will remove itself from
+ * the list pointed to by it's pxContainer parameter.
+ *
+ * @return The number of items that remain in the list after the list item has
+ * been removed.
+ *
+ * \page listREMOVE_ITEM listREMOVE_ITEM
+ * \ingroup LinkedList
+ */
+#define listREMOVE_ITEM( pxItemToRemove ) \
+    {                                     \
+        /* The list item knows which list it is in.  Obtain the list from the list \
+         * item. */                                                              \
+        List_t * const pxList = ( pxItemToRemove )->pxContainer;                 \
+                                                                                 \
+        ( pxItemToRemove )->pxNext->pxPrevious = ( pxItemToRemove )->pxPrevious; \
+        ( pxItemToRemove )->pxPrevious->pxNext = ( pxItemToRemove )->pxNext;     \
+        /* Make sure the index is left pointing to a valid item. */              \
+        if( pxList->pxIndex == ( pxItemToRemove ) )                              \
+        {                                                                        \
+            pxList->pxIndex = ( pxItemToRemove )->pxPrevious;                    \
+        }                                                                        \
+                                                                                 \
+        ( pxItemToRemove )->pxContainer = NULL;                                  \
+        ( pxList->uxNumberOfItems )--;                                           \
+    }
+
+/*
+ * Inline version of vListInsertEnd() to provide slight optimisation for
+ * xTaskIncrementTick().
+ *
+ * Insert a list item into a list.  The item will be inserted in a position
+ * such that it will be the last item within the list returned by multiple
+ * calls to listGET_OWNER_OF_NEXT_ENTRY.
+ *
+ * The list member pxIndex is used to walk through a list.  Calling
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
+ * Placing an item in a list using vListInsertEnd effectively places the item
+ * in the list position pointed to by pxIndex.  This means that every other
+ * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
+ * the pxIndex parameter again points to the item being inserted.
+ *
+ * @param pxList The list into which the item is to be inserted.
+ *
+ * @param pxNewListItem The list item to be inserted into the list.
+ *
+ * \page listINSERT_END listINSERT_END
+ * \ingroup LinkedList
+ */
+#define listINSERT_END( pxList, pxNewListItem )           \
+    {                                                     \
+        ListItem_t * const pxIndex = ( pxList )->pxIndex; \
+                                                          \
+        /* Only effective when configASSERT() is also defined, these tests may catch \
+         * the list data structures being overwritten in memory.  They will not catch \
+         * data errors caused by incorrect configuration or use of FreeRTOS. */ \
+        listTEST_LIST_INTEGRITY( ( pxList ) );                                  \
+        listTEST_LIST_ITEM_INTEGRITY( ( pxNewListItem ) );                      \
+                                                                                \
+        /* Insert a new list item into ( pxList ), but rather than sort the list, \
+         * makes the new list item the last item to be removed by a call to \
+         * listGET_OWNER_OF_NEXT_ENTRY(). */                 \
+        ( pxNewListItem )->pxNext = pxIndex;                 \
+        ( pxNewListItem )->pxPrevious = pxIndex->pxPrevious; \
+                                                             \
+        pxIndex->pxPrevious->pxNext = ( pxNewListItem );     \
+        pxIndex->pxPrevious = ( pxNewListItem );             \
+                                                             \
+        /* Remember which list the item is in. */            \
+        ( pxNewListItem )->pxContainer = ( pxList );         \
+                                                             \
+        ( ( pxList )->uxNumberOfItems )++;                   \
+    }
 
 /*
  * Access function to obtain the owner of the first entry in a list.  Lists
@@ -359,7 +441,7 @@ void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
 
 /*
  * Insert a list item into a list.  The item will be inserted into the list in
- * a position determined by its item value (descending item value order).
+ * a position determined by its item value (ascending item value order).
  *
  * @param pxList The list into which the item is to be inserted.
  *

include/message_buffer.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -630,7 +632,7 @@ typedef void * MessageBufferHandle_t;
 /**
  * message_buffer.h
  * <pre>
- * BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
+ * BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer );
  * </pre>
  *
  * Tests to see if a message buffer is full.  A message buffer is full if it
@@ -648,7 +650,7 @@ typedef void * MessageBufferHandle_t;
 /**
  * message_buffer.h
  * <pre>
- * BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
+ * BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer );
  * </pre>
  *
  * Tests to see if a message buffer is empty (does not contain any messages).
@@ -690,7 +692,7 @@ typedef void * MessageBufferHandle_t;
 /**
  * message_buffer.h
  * <pre>
- * size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
+ * size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer );
  * </pre>
  * Returns the number of bytes of free space in the message buffer.
  *
@@ -714,7 +716,7 @@ typedef void * MessageBufferHandle_t;
 /**
  * message_buffer.h
  * <pre>
- * size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
+ * size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer );
  * </pre>
  * Returns the length (in bytes) of the next message in a message buffer.
  * Useful if xMessageBufferReceive() returned 0 because the size of the buffer

include/mpu_prototypes.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -50,16 +52,10 @@ TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
                                     UBaseType_t uxPriority,
                                     StackType_t * const puxStackBuffer,
                                     StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
-                                      TaskHandle_t * pxCreatedTask ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
-                                            TaskHandle_t * pxCreatedTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask,
-                                  const MemoryRegion_t * const pxRegions ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
-                          const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
+                                const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
 eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
@@ -93,8 +89,9 @@ BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
 TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
 UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
                                       const UBaseType_t uxArraySize,
-                                      uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
-uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
+                                      configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
+configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
+configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
 void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
 BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,

include/mpu_wrappers.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -29,7 +31,7 @@
 
 /* This file redefines API functions to be called through a wrapper macro, but
  * only for ports that are using the MPU. */
-#ifdef portUSING_MPU_WRAPPERS
+#if ( portUSING_MPU_WRAPPERS == 1 )
 
 /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
  * included from queue.c or task.c to prevent it from having an effect within
@@ -47,8 +49,6 @@
 /* Map standard tasks.h API functions to the MPU equivalents. */
         #define xTaskCreate                            MPU_xTaskCreate
         #define xTaskCreateStatic                      MPU_xTaskCreateStatic
-        #define xTaskCreateRestricted                  MPU_xTaskCreateRestricted
-        #define vTaskAllocateMPURegions                MPU_vTaskAllocateMPURegions
         #define vTaskDelete                            MPU_vTaskDelete
         #define vTaskDelay                             MPU_vTaskDelay
         #define xTaskDelayUntil                        MPU_xTaskDelayUntil
@@ -77,6 +77,7 @@
         #define vTaskList                              MPU_vTaskList
         #define vTaskGetRunTimeStats                   MPU_vTaskGetRunTimeStats
         #define ulTaskGetIdleRunTimeCounter            MPU_ulTaskGetIdleRunTimeCounter
+        #define ulTaskGetIdleRunTimePercent            MPU_ulTaskGetIdleRunTimePercent
         #define xTaskGenericNotify                     MPU_xTaskGenericNotify
         #define xTaskGenericNotifyWait                 MPU_xTaskGenericNotifyWait
         #define ulTaskGenericNotifyTake                MPU_ulTaskGenericNotifyTake
@@ -179,7 +180,6 @@
     #define PRIVILEGED_FUNCTION
     #define PRIVILEGED_DATA
     #define FREERTOS_SYSTEM_CALL
-    #define portUSING_MPU_WRAPPERS    0
 
 #endif /* portUSING_MPU_WRAPPERS */
 

include/portable.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -53,30 +55,22 @@
 
 #if portBYTE_ALIGNMENT == 32
     #define portBYTE_ALIGNMENT_MASK    ( 0x001f )
-#endif
-
-#if portBYTE_ALIGNMENT == 16
+#elif portBYTE_ALIGNMENT == 16
     #define portBYTE_ALIGNMENT_MASK    ( 0x000f )
-#endif
-
-#if portBYTE_ALIGNMENT == 8
+#elif portBYTE_ALIGNMENT == 8
     #define portBYTE_ALIGNMENT_MASK    ( 0x0007 )
-#endif
-
-#if portBYTE_ALIGNMENT == 4
+#elif portBYTE_ALIGNMENT == 4
     #define portBYTE_ALIGNMENT_MASK    ( 0x0003 )
-#endif
-
-#if portBYTE_ALIGNMENT == 2
+#elif portBYTE_ALIGNMENT == 2
     #define portBYTE_ALIGNMENT_MASK    ( 0x0001 )
-#endif
-
-#if portBYTE_ALIGNMENT == 1
+#elif portBYTE_ALIGNMENT == 1
     #define portBYTE_ALIGNMENT_MASK    ( 0x0000 )
-#endif
-
-#ifndef portBYTE_ALIGNMENT_MASK
+#else /* if portBYTE_ALIGNMENT == 32 */
     #error "Invalid portBYTE_ALIGNMENT definition"
+#endif /* if portBYTE_ALIGNMENT == 32 */
+
+#ifndef portUSING_MPU_WRAPPERS
+    #define portUSING_MPU_WRAPPERS    0
 #endif
 
 #ifndef portNUM_CONFIGURABLE_REGIONS
@@ -91,6 +85,11 @@
     #define portARCH_NAME    NULL
 #endif
 
+#ifndef configSTACK_ALLOCATION_FROM_SEPARATE_HEAP
+    /* Defaults to 0 for backward compatibility. */
+    #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP    0
+#endif
+
 /* *INDENT-OFF* */
 #ifdef __cplusplus
     extern "C" {
@@ -142,13 +141,13 @@ typedef struct HeapRegion
 /* Used to pass information about the heap out of vPortGetHeapStats(). */
 typedef struct xHeapStats
 {
-    size_t xAvailableHeapSpaceInBytes;          /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
-    size_t xSizeOfLargestFreeBlockInBytes;      /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
-    size_t xSizeOfSmallestFreeBlockInBytes;     /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
-    size_t xNumberOfFreeBlocks;                 /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
-    size_t xMinimumEverFreeBytesRemaining;      /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
-    size_t xNumberOfSuccessfulAllocations;      /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
-    size_t xNumberOfSuccessfulFrees;            /* The number of calls to vPortFree() that has successfully freed a block of memory. */
+    size_t xAvailableHeapSpaceInBytes;      /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
+    size_t xSizeOfLargestFreeBlockInBytes;  /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xNumberOfFreeBlocks;             /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xMinimumEverFreeBytesRemaining;  /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
+    size_t xNumberOfSuccessfulAllocations;  /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
+    size_t xNumberOfSuccessfulFrees;        /* The number of calls to vPortFree() that has successfully freed a block of memory. */
 } HeapStats_t;
 
 /*
@@ -179,6 +178,14 @@ void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
 size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
 size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
 
+#if ( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 )
+    void * pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION;
+    void vPortFreeStack( void * pv ) PRIVILEGED_FUNCTION;
+#else
+    #define pvPortMallocStack    pvPortMalloc
+    #define vPortFreeStack       vPortFree
+#endif
+
 /*
  * Setup the hardware ready for the scheduler to take control.  This generally
  * sets up a tick interrupt and sets timers for the correct tick frequency.

include/projdefs.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in

include/queue.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -1491,6 +1493,10 @@ BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
  * does not effect the number of queues, semaphores and mutexes that can be
  * created - just the number that the registry can hold.
  *
+ * If vQueueAddToRegistry is called more than once with the same xQueue
+ * parameter, the registry will store the pcQueueName parameter from the
+ * most recent call to vQueueAddToRegistry.
+ *
  * @param xQueue The handle of the queue being added to the registry.  This
  * is the handle returned by a call to xQueueCreate().  Semaphore and mutex
  * handles can also be passed in here.

include/semphr.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -1170,4 +1172,18 @@ typedef QueueHandle_t SemaphoreHandle_t;
  */
 #define uxSemaphoreGetCount( xSemaphore )                uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) )
 
+/**
+ * semphr.h
+ * <pre>
+ * UBaseType_t uxSemaphoreGetCountFromISR( SemaphoreHandle_t xSemaphore );
+ * </pre>
+ *
+ * If the semaphore is a counting semaphore then uxSemaphoreGetCountFromISR() returns
+ * its current count value.  If the semaphore is a binary semaphore then
+ * uxSemaphoreGetCountFromISR() returns 1 if the semaphore is available, and 0 if the
+ * semaphore is not available.
+ *
+ */
+#define uxSemaphoreGetCountFromISR( xSemaphore )         uxQueueMessagesWaitingFromISR( ( QueueHandle_t ) ( xSemaphore ) )
+
 #endif /* SEMAPHORE_H */

include/stack_macros.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -43,13 +45,21 @@
 
 /*-----------------------------------------------------------*/
 
+/*
+ * portSTACK_LIMIT_PADDING is a number of extra words to consider to be in
+ * use on the stack.
+ */
+#ifndef portSTACK_LIMIT_PADDING
+    #define portSTACK_LIMIT_PADDING    0
+#endif
+
 #if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
 
 /* Only the current stack state is to be checked. */
     #define taskCHECK_FOR_STACK_OVERFLOW()                                                            \
     {                                                                                                 \
         /* Is the currently saved stack pointer within the stack limit? */                            \
-        if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )                                     \
+        if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING )           \
         {                                                                                             \
             vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
         }                                                                                             \
@@ -65,7 +75,7 @@
     {                                                                                                 \
                                                                                                       \
         /* Is the currently saved stack pointer within the stack limit? */                            \
-        if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )                                \
+        if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING )      \
         {                                                                                             \
             vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
         }                                                                                             \

include/stdint.readme

@@ -1,3 +1,30 @@
+/*
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
 
 #ifndef FREERTOS_STDINT
 #define FREERTOS_STDINT
@@ -10,7 +37,7 @@
  * To use this file:
  *
  *    1) Copy this file into the directory that contains your FreeRTOSConfig.h
- *       header file, as that directory will already be in the compilers include
+ *       header file, as that directory will already be in the compiler's include
  *       path.
  *
  *    2) Rename the copied file stdint.h.
@@ -24,4 +51,8 @@ typedef unsigned short uint16_t;
 typedef long int32_t;
 typedef unsigned long uint32_t;
 
+#ifndef SIZE_MAX
+    #define SIZE_MAX    ( ( size_t ) -1 )
+#endif
+
 #endif /* FREERTOS_STDINT */

include/stream_buffer.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in

include/task.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -44,10 +46,17 @@
 * MACROS AND DEFINITIONS
 *----------------------------------------------------------*/
 
-#define tskKERNEL_VERSION_NUMBER       "V10.4.2"
+/*
+ * If tskKERNEL_VERSION_NUMBER ends with + it represents the version in development
+ * after the numbered release.
+ *
+ * The tskKERNEL_VERSION_MAJOR, tskKERNEL_VERSION_MINOR, tskKERNEL_VERSION_BUILD
+ * values will reflect the last released version number.
+ */
+#define tskKERNEL_VERSION_NUMBER       "V10.4.5"
 #define tskKERNEL_VERSION_MAJOR        10
 #define tskKERNEL_VERSION_MINOR        4
-#define tskKERNEL_VERSION_BUILD        2
+#define tskKERNEL_VERSION_BUILD        5
 
 /* MPU region parameters passed in ulParameters
  * of MemoryRegion_t struct. */
@@ -74,7 +83,7 @@
  * \defgroup TaskHandle_t TaskHandle_t
  * \ingroup Tasks
  */
-struct tskTaskControlBlock;     /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+struct tskTaskControlBlock; /* The old naming convention is used to prevent breaking kernel aware debuggers. */
 typedef struct tskTaskControlBlock * TaskHandle_t;
 
 /*
@@ -86,22 +95,22 @@ typedef BaseType_t (* TaskHookFunction_t)( void * );
 /* Task states returned by eTaskGetState. */
 typedef enum
 {
-    eRunning = 0,     /* A task is querying the state of itself, so must be running. */
-    eReady,           /* The task being queried is in a read or pending ready list. */
-    eBlocked,         /* The task being queried is in the Blocked state. */
-    eSuspended,       /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */
-    eDeleted,         /* The task being queried has been deleted, but its TCB has not yet been freed. */
-    eInvalid          /* Used as an 'invalid state' value. */
+    eRunning = 0, /* A task is querying the state of itself, so must be running. */
+    eReady,       /* The task being queried is in a ready or pending ready list. */
+    eBlocked,     /* The task being queried is in the Blocked state. */
+    eSuspended,   /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */
+    eDeleted,     /* The task being queried has been deleted, but its TCB has not yet been freed. */
+    eInvalid      /* Used as an 'invalid state' value. */
 } eTaskState;
 
 /* Actions that can be performed when vTaskNotify() is called. */
 typedef enum
 {
-    eNoAction = 0,                /* Notify the task without updating its notify value. */
-    eSetBits,                     /* Set bits in the task's notification value. */
-    eIncrement,                   /* Increment the task's notification value. */
-    eSetValueWithOverwrite,       /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */
-    eSetValueWithoutOverwrite     /* Set the task's notification value if the previous value has been read by the task. */
+    eNoAction = 0,            /* Notify the task without updating its notify value. */
+    eSetBits,                 /* Set bits in the task's notification value. */
+    eIncrement,               /* Increment the task's notification value. */
+    eSetValueWithOverwrite,   /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */
+    eSetValueWithoutOverwrite /* Set the task's notification value if the previous value has been read by the task. */
 } eNotifyAction;
 
 /*
@@ -129,7 +138,7 @@ typedef struct xMEMORY_REGION
 typedef struct xTASK_PARAMETERS
 {
     TaskFunction_t pvTaskCode;
-    const char * pcName;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    const char * pcName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
     configSTACK_DEPTH_TYPE usStackDepth;
     void * pvParameters;
     UBaseType_t uxPriority;
@@ -144,23 +153,23 @@ typedef struct xTASK_PARAMETERS
  * in the system. */
 typedef struct xTASK_STATUS
 {
-    TaskHandle_t xHandle;                            /* The handle of the task to which the rest of the information in the structure relates. */
-    const char * pcTaskName;                         /* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
-    UBaseType_t xTaskNumber;                         /* A number unique to the task. */
-    eTaskState eCurrentState;                        /* The state in which the task existed when the structure was populated. */
-    UBaseType_t uxCurrentPriority;                   /* The priority at which the task was running (may be inherited) when the structure was populated. */
-    UBaseType_t uxBasePriority;                      /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
-    uint32_t ulRunTimeCounter;                       /* The total run time allocated to the task so far, as defined by the run time stats clock.  See https://www.FreeRTOS.org/rtos-run-time-stats.html.  Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */
-    StackType_t * pxStackBase;                       /* Points to the lowest address of the task's stack area. */
-    configSTACK_DEPTH_TYPE usStackHighWaterMark;     /* The minimum amount of stack space that has remained for the task since the task was created.  The closer this value is to zero the closer the task has come to overflowing its stack. */
+    TaskHandle_t xHandle;                         /* The handle of the task to which the rest of the information in the structure relates. */
+    const char * pcTaskName;                      /* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+    UBaseType_t xTaskNumber;                      /* A number unique to the task. */
+    eTaskState eCurrentState;                     /* The state in which the task existed when the structure was populated. */
+    UBaseType_t uxCurrentPriority;                /* The priority at which the task was running (may be inherited) when the structure was populated. */
+    UBaseType_t uxBasePriority;                   /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
+    configRUN_TIME_COUNTER_TYPE ulRunTimeCounter; /* The total run time allocated to the task so far, as defined by the run time stats clock.  See https://www.FreeRTOS.org/rtos-run-time-stats.html.  Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */
+    StackType_t * pxStackBase;                    /* Points to the lowest address of the task's stack area. */
+    configSTACK_DEPTH_TYPE usStackHighWaterMark;  /* The minimum amount of stack space that has remained for the task since the task was created.  The closer this value is to zero the closer the task has come to overflowing its stack. */
 } TaskStatus_t;
 
 /* Possible return values for eTaskConfirmSleepModeStatus(). */
 typedef enum
 {
-    eAbortSleep = 0,           /* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
-    eStandardSleep,            /* Enter a sleep mode that will not last any longer than the expected idle time. */
-    eNoTasksWaitingTimeout     /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */
+    eAbortSleep = 0,       /* A task has been made ready or a context switch pended since portSUPPRESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
+    eStandardSleep,        /* Enter a sleep mode that will not last any longer than the expected idle time. */
+    eNoTasksWaitingTimeout /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */
 } eSleepModeStatus;
 
 /**
@@ -246,12 +255,12 @@ typedef enum
  * task. h
  * <pre>
  * BaseType_t xTaskCreate(
- *                            TaskFunction_t pvTaskCode,
- *                            const char * const pcName,
+ *                            TaskFunction_t pxTaskCode,
+ *                            const char *pcName,
  *                            configSTACK_DEPTH_TYPE usStackDepth,
  *                            void *pvParameters,
  *                            UBaseType_t uxPriority,
- *                            TaskHandle_t *pvCreatedTask
+ *                            TaskHandle_t *pxCreatedTask
  *                        );
  * </pre>
  *
@@ -275,7 +284,7 @@ typedef enum
  * support can alternatively create an MPU constrained task using
  * xTaskCreateRestricted().
  *
- * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * @param pxTaskCode Pointer to the task entry function.  Tasks
  * must be implemented to never return (i.e. continuous loop).
  *
  * @param pcName A descriptive name for the task.  This is mainly used to
@@ -296,7 +305,7 @@ typedef enum
  * example, to create a privileged task at priority 2 the uxPriority parameter
  * should be set to ( 2 | portPRIVILEGE_BIT ).
  *
- * @param pvCreatedTask Used to pass back a handle by which the created task
+ * @param pxCreatedTask Used to pass back a handle by which the created task
  * can be referenced.
  *
  * @return pdPASS if the task was successfully created and added to a ready
@@ -338,7 +347,7 @@ typedef enum
  */
 #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
     BaseType_t xTaskCreate( TaskFunction_t pxTaskCode,
-                            const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                            const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
                             const configSTACK_DEPTH_TYPE usStackDepth,
                             void * const pvParameters,
                             UBaseType_t uxPriority,
@@ -348,12 +357,12 @@ typedef enum
 /**
  * task. h
  * <pre>
- * TaskHandle_t xTaskCreateStatic( TaskFunction_t pvTaskCode,
- *                               const char * const pcName,
+ * TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
+ *                               const char *pcName,
  *                               uint32_t ulStackDepth,
  *                               void *pvParameters,
  *                               UBaseType_t uxPriority,
- *                               StackType_t *pxStackBuffer,
+ *                               StackType_t *puxStackBuffer,
  *                               StaticTask_t *pxTaskBuffer );
  * </pre>
  *
@@ -369,7 +378,7 @@ typedef enum
  * memory.  xTaskCreateStatic() therefore allows a task to be created without
  * using any dynamic memory allocation.
  *
- * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * @param pxTaskCode Pointer to the task entry function.  Tasks
  * must be implemented to never return (i.e. continuous loop).
  *
  * @param pcName A descriptive name for the task.  This is mainly used to
@@ -386,7 +395,7 @@ typedef enum
  *
  * @param uxPriority The priority at which the task will run.
  *
- * @param pxStackBuffer Must point to a StackType_t array that has at least
+ * @param puxStackBuffer Must point to a StackType_t array that has at least
  * ulStackDepth indexes - the array will then be used as the task's stack,
  * removing the need for the stack to be allocated dynamically.
  *
@@ -394,15 +403,15 @@ typedef enum
  * then be used to hold the task's data structures, removing the need for the
  * memory to be allocated dynamically.
  *
- * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will
- * be created and a handle to the created task is returned.  If either
- * pxStackBuffer or pxTaskBuffer are NULL then the task will not be created and
+ * @return If neither puxStackBuffer nor pxTaskBuffer are NULL, then the task
+ * will be created and a handle to the created task is returned.  If either
+ * puxStackBuffer or pxTaskBuffer are NULL then the task will not be created and
  * NULL is returned.
  *
  * Example usage:
  * <pre>
  *
- *  // Dimensions the buffer that the task being created will use as its stack.
+ *  // Dimensions of the buffer that the task being created will use as its stack.
  *  // NOTE:  This is the number of words the stack will hold, not the number of
  *  // bytes.  For example, if each stack item is 32-bits, and this is set to 100,
  *  // then 400 bytes (100 * 32-bits) will be allocated.
@@ -455,7 +464,7 @@ typedef enum
  */
 #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
     TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode,
-                                    const char * const pcName,     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                                    const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
                                     const uint32_t ulStackDepth,
                                     void * const pvParameters,
                                     UBaseType_t uxPriority,
@@ -643,7 +652,7 @@ typedef enum
  *
  * @param xTask The handle of the task being updated.
  *
- * @param xRegions A pointer to an MemoryRegion_t structure that contains the
+ * @param xRegions A pointer to a MemoryRegion_t structure that contains the
  * new memory region definitions.
  *
  * Example usage:
@@ -684,7 +693,7 @@ void vTaskAllocateMPURegions( TaskHandle_t xTask,
 /**
  * task. h
  * <pre>
- * void vTaskDelete( TaskHandle_t xTask );
+ * void vTaskDelete( TaskHandle_t xTaskToDelete );
  * </pre>
  *
  * INCLUDE_vTaskDelete must be defined as 1 for this function to be available.
@@ -703,7 +712,7 @@ void vTaskAllocateMPURegions( TaskHandle_t xTask,
  * See the demo application file death.c for sample code that utilises
  * vTaskDelete ().
  *
- * @param xTask The handle of the task to be deleted.  Passing NULL will
+ * @param xTaskToDelete The handle of the task to be deleted.  Passing NULL will
  * cause the calling task to be deleted.
  *
  * Example usage:
@@ -748,7 +757,7 @@ void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
  * period of 100 ticks will cause the task to unblock 100 ticks after
  * vTaskDelay() is called.  vTaskDelay() does not therefore provide a good method
  * of controlling the frequency of a periodic task as the path taken through the
- * code, as well as other task and interrupt activity, will effect the frequency
+ * code, as well as other task and interrupt activity, will affect the frequency
  * at which vTaskDelay() gets called and therefore the time at which the task
  * next executes.  See xTaskDelayUntil() for an alternative API function designed
  * to facilitate fixed frequency execution.  It does this by specifying an
@@ -850,10 +859,10 @@ BaseType_t xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
  * vTaskDelayUntil() is the older version of xTaskDelayUntil() and does not
  * return a value.
  */
-#define vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement )       \
-{                                                                   \
-    ( void ) xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); \
-}
+#define vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement )           \
+    {                                                                   \
+        ( void ) xTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); \
+    }
 
 
 /**
@@ -1466,7 +1475,7 @@ UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
  * \defgroup pcTaskGetName pcTaskGetName
  * \ingroup TaskUtils
  */
-char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
 /**
  * task. h
@@ -1482,7 +1491,7 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;     /*lin
  * \defgroup pcTaskGetHandle pcTaskGetHandle
  * \ingroup TaskUtils
  */
-TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+TaskHandle_t xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
 /**
  * task.h
@@ -1602,48 +1611,50 @@ configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) PRIVIL
 
 #if ( configCHECK_FOR_STACK_OVERFLOW > 0 )
 
-     /**
-      * task.h
-      * <pre>void vApplicationStackOverflowHook( TaskHandle_t xTask char *pcTaskName); </pre>
-      *
-      * The application stack overflow hook is called when a stack overflow is detected for a task.
-      *
-      * Details on stack overflow detection can be found here: https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
-      *
-      * @param xTask the task that just exceeded its stack boundaries.
-      * @param pcTaskName A character string containing the name of the offending task.
-      */
-     void vApplicationStackOverflowHook( TaskHandle_t xTask,
-                                               char * pcTaskName );
+/**
+ * task.h
+ * <pre>void vApplicationStackOverflowHook( TaskHandle_t xTask char *pcTaskName); </pre>
+ *
+ * The application stack overflow hook is called when a stack overflow is detected for a task.
+ *
+ * Details on stack overflow detection can be found here: https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
+ *
+ * @param xTask the task that just exceeded its stack boundaries.
+ * @param pcTaskName A character string containing the name of the offending task.
+ */
+    void vApplicationStackOverflowHook( TaskHandle_t xTask,
+                                        char * pcTaskName );
 
 #endif
 
-#if  (  configUSE_TICK_HOOK > 0 )
-    /**
-     *  task.h
-     *  <pre>void vApplicationTickHook( void ); </pre>
-     *
-     * This hook function is called in the system tick handler after any OS work is completed.
-     */
+#if  ( configUSE_TICK_HOOK > 0 )
+
+/**
+ *  task.h
+ *  <pre>void vApplicationTickHook( void ); </pre>
+ *
+ * This hook function is called in the system tick handler after any OS work is completed.
+ */
     void vApplicationTickHook( void ); /*lint !e526 Symbol not defined as it is an application callback. */
 
 #endif
 
 #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
-    /**
-     * task.h
-     * <pre>void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) </pre>
-     *
-     * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Idle Task TCB.  This function is required when
-     * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
-     *
-     * @param ppxIdleTaskTCBBuffer A handle to a statically allocated TCB buffer
-     * @param ppxIdleTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
-     * @param pulIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
-     */
+
+/**
+ * task.h
+ * <pre>void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, StackType_t ** ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) </pre>
+ *
+ * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Idle Task TCB.  This function is required when
+ * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
+ *
+ * @param ppxIdleTaskTCBBuffer A handle to a statically allocated TCB buffer
+ * @param ppxIdleTaskStackBuffer A handle to a statically allocated Stack buffer for the idle task
+ * @param pulIdleTaskStackSize A pointer to the number of elements that will fit in the allocated stack buffer
+ */
     void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
-                                               StackType_t ** ppxIdleTaskStackBuffer,
-                                               uint32_t * pulIdleTaskStackSize ); /*lint !e526 Symbol not defined as it is an application callback. */
+                                        StackType_t ** ppxIdleTaskStackBuffer,
+                                        uint32_t * pulIdleTaskStackSize ); /*lint !e526 Symbol not defined as it is an application callback. */
 #endif
 
 /**
@@ -1714,7 +1725,7 @@ TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;
  *  {
  *  TaskStatus_t *pxTaskStatusArray;
  *  volatile UBaseType_t uxArraySize, x;
- *  uint32_t ulTotalRunTime, ulStatsAsPercentage;
+ *  configRUN_TIME_COUNTER_TYPE ulTotalRunTime, ulStatsAsPercentage;
  *
  *      // Make sure the write buffer does not contain a string.
  * pcWriteBuffer = 0x00;
@@ -1770,7 +1781,7 @@ TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;
  */
 UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
                                   const UBaseType_t uxArraySize,
-                                  uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION;
+                                  configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) PRIVILEGED_FUNCTION;
 
 /**
  * task. h
@@ -1795,8 +1806,10 @@ UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
  * demo applications.  Do not consider it to be part of the scheduler.
  *
  * vTaskList() calls uxTaskGetSystemState(), then formats part of the
- * uxTaskGetSystemState() output into a human readable table that displays task
- * names, states and stack usage.
+ * uxTaskGetSystemState() output into a human readable table that displays task:
+ * names, states, priority, stack usage and task number.
+ * Stack usage specified as the number of unused StackType_t words stack can hold
+ * on top of stack - not the number of bytes.
  *
  * vTaskList() has a dependency on the sprintf() C library function that might
  * bloat the code size, use a lot of stack, and provide different results on
@@ -1817,7 +1830,7 @@ UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
  * \defgroup vTaskList vTaskList
  * \ingroup TaskUtils
  */
-void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
 /**
  * task. h
@@ -1871,15 +1884,16 @@ void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unq
  * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats
  * \ingroup TaskUtils
  */
-void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
 
 /**
  * task. h
- * <PRE>uint32_t ulTaskGetIdleRunTimeCounter( void );</PRE>
+ * <PRE>configRUN_TIME_COUNTER_TYPE ulTaskGetIdleRunTimeCounter( void );</PRE>
+ * <PRE>configRUN_TIME_COUNTER_TYPE ulTaskGetIdleRunTimePercent( void );</PRE>
  *
- * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
- * must both be defined as 1 for this function to be available.  The application
- * must also then provide definitions for
+ * configGENERATE_RUN_TIME_STATS, configUSE_STATS_FORMATTING_FUNCTIONS and
+ * INCLUDE_xTaskGetIdleTaskHandle must all be defined as 1 for these functions
+ * to be available.  The application must also then provide definitions for
  * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
  * to configure a peripheral timer/counter and return the timers current count
  * value respectively.  The counter should be at least 10 times the frequency of
@@ -1891,9 +1905,16 @@ void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lin
  * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
  * While uxTaskGetSystemState() and vTaskGetRunTimeStats() writes the total
  * execution time of each task into a buffer, ulTaskGetIdleRunTimeCounter()
- * returns the total execution time of just the idle task.
+ * returns the total execution time of just the idle task and
+ * ulTaskGetIdleRunTimePercent() returns the percentage of the CPU time used by
+ * just the idle task.
  *
- * @return The total run time of the idle task.  This is the amount of time the
+ * Note the amount of idle time is only a good measure of the slack time in a
+ * system if there are no other tasks executing at the idle priority, tickless
+ * idle is not used, and configIDLE_SHOULD_YIELD is set to 0.
+ *
+ * @return The total run time of the idle task or the percentage of the total
+ * run time consumed by the idle task.  This is the amount of time the
  * idle task has actually been executing.  The unit of time is dependent on the
  * frequency configured using the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and
  * portGET_RUN_TIME_COUNTER_VALUE() macros.
@@ -1901,7 +1922,8 @@ void vTaskGetRunTimeStats( char * pcWriteBuffer ) PRIVILEGED_FUNCTION;     /*lin
  * \defgroup ulTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter
  * \ingroup TaskUtils
  */
-uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
+configRUN_TIME_COUNTER_TYPE ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
+configRUN_TIME_COUNTER_TYPE ulTaskGetIdleRunTimePercent( void ) PRIVILEGED_FUNCTION;
 
 /**
  * task. h
@@ -1932,9 +1954,8 @@ uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
  * that way task notifications can be used to send data to a task, or be used as
  * light weight and fast binary or counting semaphores.
  *
- * A task can use xTaskNotifyWaitIndexed() to [optionally] block to wait for a
- * notification to be pending, or ulTaskNotifyTakeIndexed() to [optionally] block
- * to wait for a notification value to have a non-zero value.  The task does
+ * A task can use xTaskNotifyWaitIndexed() or ulTaskNotifyTakeIndexed() to
+ * [optionally] block to wait for a notification to be pending.  The task does
  * not consume any CPU time while it is in the Blocked state.
  *
  * A notification sent to a task will remain pending until it is cleared by the
@@ -1976,7 +1997,7 @@ uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
  *
  * eSetBits -
  * The target notification value is bitwise ORed with ulValue.
- * xTaskNofifyIndexed() always returns pdPASS in this case.
+ * xTaskNotifyIndexed() always returns pdPASS in this case.
  *
  * eIncrement -
  * The target notification value is incremented.  ulValue is not used and
@@ -2119,7 +2140,7 @@ BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify,
  * value, if at all.  Valid values for eAction are as follows:
  *
  * eSetBits -
- * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
+ * The task's notification value is bitwise ORed with ulValue.  xTaskNotify()
  * always returns pdPASS in this case.
  *
  * eIncrement -
@@ -2289,7 +2310,7 @@ BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
  * the Blocked state for a notification to be received, should a notification
  * not already be pending when xTaskNotifyWait() was called.  The task
  * will not consume any processing time while it is in the Blocked state.  This
- * is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be
+ * is specified in kernel ticks, the macro pdMS_TO_TICKS( value_in_ms ) can be
  * used to convert a time specified in milliseconds to a time specified in
  * ticks.
  *
@@ -2520,8 +2541,8 @@ void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
  * value acts like a counting semaphore.
  *
  * A task can use ulTaskNotifyTakeIndexed() to [optionally] block to wait for
- * the task's notification value to be non-zero.  The task does not consume any
- * CPU time while it is in the Blocked state.
+ * a notification.  The task does not consume any CPU time while it is in the
+ * Blocked state.
  *
  * Where as xTaskNotifyWaitIndexed() will return when a notification is pending,
  * ulTaskNotifyTakeIndexed() will return when the task's notification value is
@@ -2559,7 +2580,7 @@ void vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
  * should the count not already be greater than zero when
  * ulTaskNotifyTake() was called.  The task will not consume any processing
  * time while it is in the Blocked state.  This is specified in kernel ticks,
- * the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time
+ * the macro pdMS_TO_TICKS( value_in_ms ) can be used to convert a time
  * specified in milliseconds to a time specified in ticks.
  *
  * @return The task's notification count before it is either cleared to zero or
@@ -2738,7 +2759,7 @@ void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
  * @param pxTicksToWait The number of ticks to check for timeout i.e. if
  * pxTicksToWait ticks have passed since pxTimeOut was last updated (either by
  * vTaskSetTimeOutState() or xTaskCheckForTimeOut()), the timeout has occurred.
- * If the timeout has not occurred, pxTIcksToWait is updated to reflect the
+ * If the timeout has not occurred, pxTicksToWait is updated to reflect the
  * number of remaining ticks.
  *
  * @return If timeout has occurred, pdTRUE is returned. Otherwise pdFALSE is
@@ -2758,7 +2779,7 @@ void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
  *  // spent in the Blocked state does not exceed MAX_TIME_TO_WAIT. This
  *  // continues until either the buffer contains at least uxWantedBytes bytes,
  *  // or the total amount of time spent in the Blocked state reaches
- *  // MAX_TIME_TO_WAIT – at which point the task reads however many bytes are
+ *  // MAX_TIME_TO_WAIT - at which point the task reads however many bytes are
  *  // available up to a maximum of uxWantedBytes.
  *
  *  size_t xUART_Receive( uint8_t *pucBuffer, size_t uxWantedBytes )
@@ -2875,7 +2896,7 @@ BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
  * xItemValue value, and inserts the list item at the end of the list.
  *
  * The 'ordered' version uses the existing event list item value (which is the
- * owning tasks priority) to insert the list item into the event list is task
+ * owning task's priority) to insert the list item into the event list in task
  * priority order.
  *
  * @param pxEventList The list containing tasks that are blocked waiting
@@ -2885,7 +2906,7 @@ BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
  * event list is not ordered by task priority.
  *
  * @param xTicksToWait The maximum amount of time that the task should wait
- * for the event to occur.  This is specified in kernel ticks,the constant
+ * for the event to occur.  This is specified in kernel ticks, the constant
  * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time
  * period.
  */

include/timers.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -1326,20 +1328,20 @@ BaseType_t xTimerGenericCommand( TimerHandle_t xTimer,
 
 #if ( configSUPPORT_STATIC_ALLOCATION == 1 )
 
-    /**
-     * task.h
-     * <pre>void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) </pre>
-     * 
-     * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB.  This function is required when 
-     * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
-     * 
-     * @param ppxTimerTaskTCBBuffer   A handle to a statically allocated TCB buffer
-     * @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
-     * @param pulTimerTaskStackSize   A pointer to the number of elements that will fit in the allocated stack buffer
-     */
+/**
+ * task.h
+ * <pre>void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) </pre>
+ *
+ * This function is used to provide a statically allocated block of memory to FreeRTOS to hold the Timer Task TCB.  This function is required when
+ * configSUPPORT_STATIC_ALLOCATION is set.  For more information see this URI: https://www.FreeRTOS.org/a00110.html#configSUPPORT_STATIC_ALLOCATION
+ *
+ * @param ppxTimerTaskTCBBuffer   A handle to a statically allocated TCB buffer
+ * @param ppxTimerTaskStackBuffer A handle to a statically allocated Stack buffer for thie idle task
+ * @param pulTimerTaskStackSize   A pointer to the number of elements that will fit in the allocated stack buffer
+ */
     void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
-                                          StackType_t ** ppxTimerTaskStackBuffer,
-                                              uint32_t * pulTimerTaskStackSize );
+                                         StackType_t ** ppxTimerTaskStackBuffer,
+                                         uint32_t * pulTimerTaskStackSize );
 
 #endif
 

list.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -158,6 +160,9 @@ void vListInsert( List_t * const pxList,
         *   4) Using a queue or semaphore before it has been initialised or
         *      before the scheduler has been started (are interrupts firing
         *      before vTaskStartScheduler() has been called?).
+        *   5) If the FreeRTOS port supports interrupt nesting then ensure that
+        *      the priority of the tick interrupt is at or below
+        *      configMAX_SYSCALL_INTERRUPT_PRIORITY.
         **********************************************************************/
 
         for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */

portable/ARMv8M/copy_files.py

@@ -1,6 +1,8 @@
 #/*
-# * FreeRTOS Kernel V10.4.2
-# * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+# * FreeRTOS Kernel V10.4.5
+# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+# *
+# * SPDX-License-Identifier: MIT
 # *
 # * Permission is hereby granted, free of charge, to any person obtaining a copy of
 # * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
 # * https://www.FreeRTOS.org
 # * https://github.com/FreeRTOS
 # *
-# * 1 tab == 4 spaces!
 # */
 
 import os

portable/ARMv8M/non_secure/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -779,7 +781,8 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
     uint32_t ulPC;
 
     #if ( configENABLE_TRUSTZONE == 1 )
-        uint32_t ulR0;
+        uint32_t ulR0, ulR1;
+        extern TaskHandle_t pxCurrentTCB;
         #if ( configENABLE_MPU == 1 )
             uint32_t ulControl, ulIsTaskPrivileged;
         #endif /* configENABLE_MPU */
@@ -810,25 +813,27 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
                         ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
 
                         /* Allocate and load a context for the secure task. */
-                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
+                        xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged, pxCurrentTCB );
                     }
                 #else /* if ( configENABLE_MPU == 1 ) */
                     {
                         /* Allocate and load a context for the secure task. */
-                        xSecureContext = SecureContext_AllocateContext( ulR0 );
+                        xSecureContext = SecureContext_AllocateContext( ulR0, pxCurrentTCB );
                     }
                 #endif /* configENABLE_MPU */
 
-                configASSERT( xSecureContext != NULL );
-                SecureContext_LoadContext( xSecureContext );
+                configASSERT( xSecureContext != securecontextINVALID_CONTEXT_ID );
+                SecureContext_LoadContext( xSecureContext, pxCurrentTCB );
                 break;
 
             case portSVC_FREE_SECURE_CONTEXT:
-                /* R0 contains the secure context handle to be freed. */
+                /* R0 contains TCB being freed and R1 contains the secure
+                 * context handle to be freed. */
                 ulR0 = pulCallerStackAddress[ 0 ];
+                ulR1 = pulCallerStackAddress[ 1 ];
 
                 /* Free the secure context. */
-                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR0 );
+                SecureContext_FreeContext( ( SecureContextHandle_t ) ulR1, ( void * ) ulR0 );
                 break;
         #endif /* configENABLE_TRUSTZONE */
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */
@@ -54,79 +55,79 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_
         "	ldr  r0, [r3]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
         "													\n"
         #if ( configENABLE_MPU == 1 )
-            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
-            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
-            "	movs r5, #1										\n"/* r5 = 1. */
-            "	bics r4, r5										\n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-            "	str r4, [r2]									\n"/* Disable MPU. */
-            "													\n"
-            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-            "	ldr  r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
-            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
-            "	str  r4, [r2]									\n"/* Program MAIR0. */
-            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
-            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-            "	movs r5, #4										\n"/* r5 = 4. */
-            "	str  r5, [r2]									\n"/* Program RNR = 4. */
-            "	ldmia r3!, {r6,r7}								\n"/* Read first set of RBAR/RLAR from TCB. */
-            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
-            "	stmia r4!, {r6,r7}								\n"/* Write first set of RBAR/RLAR registers. */
-            "	movs r5, #5										\n"/* r5 = 5. */
-            "	str  r5, [r2]									\n"/* Program RNR = 5. */
-            "	ldmia r3!, {r6,r7}								\n"/* Read second set of RBAR/RLAR from TCB. */
-            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
-            "	stmia r4!, {r6,r7}								\n"/* Write second set of RBAR/RLAR registers. */
-            "	movs r5, #6										\n"/* r5 = 6. */
-            "	str  r5, [r2]									\n"/* Program RNR = 6. */
-            "	ldmia r3!, {r6,r7}								\n"/* Read third set of RBAR/RLAR from TCB. */
-            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
-            "	stmia r4!, {r6,r7}								\n"/* Write third set of RBAR/RLAR registers. */
-            "	movs r5, #7										\n"/* r5 = 7. */
-            "	str  r5, [r2]									\n"/* Program RNR = 7. */
-            "	ldmia r3!, {r6,r7}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
-            "	ldr  r4, xRBARConst2							\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
-            "	stmia r4!, {r6,r7}								\n"/* Write fourth set of RBAR/RLAR registers. */
-            "													\n"
-            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
-            "	movs r5, #1										\n"/* r5 = 1. */
-            "	orrs r4, r5										\n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-            "	str r4, [r2]									\n"/* Enable MPU. */
-            "	dsb												\n"/* Force memory writes before continuing. */
+            "	dmb											\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2						\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]								\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1									\n"/* r5 = 1. */
+            "	bics r4, r5									\n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]								\n"/* Disable MPU. */
+            "												\n"
+            "	adds r3, #4									\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r3]								\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2						\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]								\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2							\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	adds r3, #4									\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	movs r5, #4									\n"/* r5 = 4. */
+            "	str  r5, [r2]								\n"/* Program RNR = 4. */
+            "	ldmia r3!, {r6,r7}							\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2						\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}							\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r5, #5									\n"/* r5 = 5. */
+            "	str  r5, [r2]								\n"/* Program RNR = 5. */
+            "	ldmia r3!, {r6,r7}							\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2						\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}							\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r5, #6									\n"/* r5 = 6. */
+            "	str  r5, [r2]								\n"/* Program RNR = 6. */
+            "	ldmia r3!, {r6,r7}							\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2						\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}							\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r5, #7									\n"/* r5 = 7. */
+            "	str  r5, [r2]								\n"/* Program RNR = 7. */
+            "	ldmia r3!, {r6,r7}							\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r4, xRBARConst2						\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r4!, {r6,r7}							\n"/* Write fourth set of RBAR/RLAR registers. */
+            "												\n"
+            "	ldr r2, xMPUCTRLConst2						\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]								\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1									\n"/* r5 = 1. */
+            "	orrs r4, r5									\n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]								\n"/* Enable MPU. */
+            "	dsb											\n"/* Force memory writes before continuing. */
         #endif /* configENABLE_MPU */
         "													\n"
         #if ( configENABLE_MPU == 1 )
-            "	ldm  r0!, {r1-r4}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
-            "	ldr  r5, xSecureContextConst2					\n"
-            "	str  r1, [r5]									\n"/* Set xSecureContext to this task's value for the same. */
-            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
-            "	msr  control, r3								\n"/* Set this task's CONTROL value. */
-            "	adds r0, #32									\n"/* Discard everything up to r0. */
-            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
-            "	isb												\n"
-            "	bx   r4											\n"/* Finally, branch to EXC_RETURN. */
+            "	ldm  r0!, {r1-r4}							\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
+            "	ldr  r5, xSecureContextConst2				\n"
+            "	str  r1, [r5]								\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2								\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r3							\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32								\n"/* Discard everything up to r0. */
+            "	msr  psp, r0								\n"/* This is now the new top of stack to use in the task. */
+            "	isb											\n"
+            "	bx   r4										\n"/* Finally, branch to EXC_RETURN. */
         #else /* configENABLE_MPU */
-            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-            "	ldr  r4, xSecureContextConst2					\n"
-            "	str  r1, [r4]									\n"/* Set xSecureContext to this task's value for the same. */
-            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
-            "	movs r1, #2										\n"/* r1 = 2. */
-            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
-            "	adds r0, #32									\n"/* Discard everything up to r0. */
-            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
-            "	isb												\n"
-            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+            "	ldm  r0!, {r1-r3}							\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+            "	ldr  r4, xSecureContextConst2				\n"
+            "	str  r1, [r4]								\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2								\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2									\n"/* r1 = 2. */
+            "	msr  CONTROL, r1							\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32								\n"/* Discard everything up to r0. */
+            "	msr  psp, r0								\n"/* This is now the new top of stack to use in the task. */
+            "	isb											\n"
+            "	bx   r3										\n"/* Finally, branch to EXC_RETURN. */
         #endif /* configENABLE_MPU */
         "													\n"
         "	.align 4										\n"
         "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
         "xSecureContextConst2: .word xSecureContext			\n"
         #if ( configENABLE_MPU == 1 )
-            "xMPUCTRLConst2: .word 0xe000ed94					\n"
-            "xMAIR0Const2: .word 0xe000edc0						\n"
-            "xRNRConst2: .word 0xe000ed98						\n"
-            "xRBARConst2: .word 0xe000ed9c						\n"
+            "xMPUCTRLConst2: .word 0xe000ed94				\n"
+            "xMAIR0Const2: .word 0xe000edc0					\n"
+            "xRNRConst2: .word 0xe000ed98					\n"
+            "xRBARConst2: .word 0xe000ed9c					\n"
         #endif /* configENABLE_MPU */
     );
 }
@@ -232,64 +233,66 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
         "	.extern SecureContext_SaveContext				\n"
         "	.extern SecureContext_LoadContext				\n"
         "													\n"
-        "	mrs r1, psp										\n"/* Read PSP in r1. */
-        "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-        "	ldr r0, [r2]									\n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+        "	ldr r3, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        "	ldr r0, [r3]									\n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r3]									\n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/
+        "	mrs r2, psp										\n"/* Read PSP in r2. */
         "													\n"
         "	cbz r0, save_ns_context							\n"/* No secure context to save. */
         "	push {r0-r2, r14}								\n"
-        "	bl SecureContext_SaveContext					\n"
+        "	bl SecureContext_SaveContext					\n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
         "	pop {r0-r3}										\n"/* LR is now in r3. */
         "	mov lr, r3										\n"/* LR = r3. */
-        "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-        "	bpl save_ns_context								\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        "	lsls r1, r3, #25								\n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        "	bpl save_ns_context								\n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
         "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        "	ldr r1, [r3]									\n"/* Read pxCurrentTCB. */
         #if ( configENABLE_MPU == 1 )
-            "	subs r1, r1, #16								\n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
-            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
-            "	mrs r3, control									\n"/* r3 = CONTROL. */
-            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
-            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	subs r2, r2, #16							\n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	str r2, [r1]								\n"/* Save the new top of stack in TCB. */
+            "	mrs r1, psplim								\n"/* r1 = PSPLIM. */
+            "	mrs r3, control								\n"/* r3 = CONTROL. */
+            "	mov r4, lr									\n"/* r4 = LR/EXC_RETURN. */
+            "	stmia r2!, {r0, r1, r3, r4}					\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
         #else /* configENABLE_MPU */
-            "	subs r1, r1, #12								\n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
-            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
-            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
-            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
-            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+            "	subs r2, r2, #12							\n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+            "	str r2, [r1]								\n"/* Save the new top of stack in TCB. */
+            "	mrs r1, psplim								\n"/* r1 = PSPLIM. */
+            "	mov r3, lr									\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r2!, {r0, r1, r3}						\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
         #endif /* configENABLE_MPU */
         "	b select_next_task								\n"
         "													\n"
         " save_ns_context:									\n"
         "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        "	ldr r1, [r3]									\n"/* Read pxCurrentTCB. */
         #if ( configENABLE_MPU == 1 )
-            "	subs r1, r1, #48								\n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
-            "	adds r1, r1, #16								\n"/* r1 = r1 + 16. */
-            "	stmia r1!, {r4-r7}								\n"/* Store the low registers that are not saved automatically. */
-            "	mov r4, r8										\n"/* r4 = r8. */
-            "	mov r5, r9										\n"/* r5 = r9. */
-            "	mov r6, r10										\n"/* r6 = r10. */
-            "	mov r7, r11										\n"/* r7 = r11. */
-            "	stmia r1!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
-            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
-            "	mrs r3, control									\n"/* r3 = CONTROL. */
-            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
-            "	subs r1, r1, #48								\n"/* r1 = r1 - 48. */
-            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	subs r2, r2, #48							\n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+            "	str r2, [r1]								\n"/* Save the new top of stack in TCB. */
+            "	adds r2, r2, #16							\n"/* r2 = r2 + 16. */
+            "	stmia r2!, {r4-r7}							\n"/* Store the low registers that are not saved automatically. */
+            "	mov r4, r8									\n"/* r4 = r8. */
+            "	mov r5, r9									\n"/* r5 = r9. */
+            "	mov r6, r10									\n"/* r6 = r10. */
+            "	mov r7, r11									\n"/* r7 = r11. */
+            "	stmia r2!, {r4-r7}							\n"/* Store the high registers that are not saved automatically. */
+            "	mrs r1, psplim								\n"/* r1 = PSPLIM. */
+            "	mrs r3, control								\n"/* r3 = CONTROL. */
+            "	mov r4, lr									\n"/* r4 = LR/EXC_RETURN. */
+            "	subs r2, r2, #48							\n"/* r2 = r2 - 48. */
+            "	stmia r2!, {r0, r1, r3, r4}					\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
         #else /* configENABLE_MPU */
-            "	subs r1, r1, #44								\n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
-            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
-            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
-            "	stmia r1!, {r0, r2-r7}							\n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
-            "	mov r4, r8										\n"/* r4 = r8. */
-            "	mov r5, r9										\n"/* r5 = r9. */
-            "	mov r6, r10										\n"/* r6 = r10. */
-            "	mov r7, r11										\n"/* r7 = r11. */
-            "	stmia r1!, {r4-r7}								\n"/* Store the high registers that are not saved automatically. */
+            "	subs r2, r2, #44							\n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+            "	str r2, [r1]								\n"/* Save the new top of stack in TCB. */
+            "	mrs r1, psplim								\n"/* r1 = PSPLIM. */
+            "	mov r3, lr									\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r2!, {r0, r1, r3-r7}					\n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
+            "	mov r4, r8									\n"/* r4 = r8. */
+            "	mov r5, r9									\n"/* r5 = r9. */
+            "	mov r6, r10									\n"/* r6 = r10. */
+            "	mov r7, r11									\n"/* r7 = r11. */
+            "	stmia r2!, {r4-r7}							\n"/* Store the high registers that are not saved automatically. */
         #endif /* configENABLE_MPU */
         "													\n"
         " select_next_task:									\n"
@@ -297,106 +300,110 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
         "	bl vTaskSwitchContext							\n"
         "	cpsie i											\n"
         "													\n"
-        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "	ldr r3, [r2]									\n"/* Read pxCurrentTCB. */
-        "	ldr r1, [r3]									\n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r3]									\n"/* Read pxCurrentTCB. */
+        "	ldr r2, [r1]									\n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
         "													\n"
         #if ( configENABLE_MPU == 1 )
-            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
-            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
-            "	movs r5, #1										\n"/* r5 = 1. */
-            "	bics r4, r5										\n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-            "	str r4, [r2]									\n"/* Disable MPU. */
-            "													\n"
-            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-            "	ldr r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
-            "	ldr r2, xMAIR0Const								\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
-            "	str r4, [r2]									\n"/* Program MAIR0. */
-            "	ldr r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
-            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-            "	movs r5, #4										\n"/* r5 = 4. */
-            "	str  r5, [r2]									\n"/* Program RNR = 4. */
-            "	ldmia r3!, {r6,r7}								\n"/* Read first set of RBAR/RLAR from TCB. */
-            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
-            "	stmia r4!, {r6,r7}								\n"/* Write first set of RBAR/RLAR registers. */
-            "	movs r5, #5										\n"/* r5 = 5. */
-            "	str  r5, [r2]									\n"/* Program RNR = 5. */
-            "	ldmia r3!, {r6,r7}								\n"/* Read second set of RBAR/RLAR from TCB. */
-            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
-            "	stmia r4!, {r6,r7}								\n"/* Write second set of RBAR/RLAR registers. */
-            "	movs r5, #6										\n"/* r5 = 6. */
-            "	str  r5, [r2]									\n"/* Program RNR = 6. */
-            "	ldmia r3!, {r6,r7}								\n"/* Read third set of RBAR/RLAR from TCB. */
-            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
-            "	stmia r4!, {r6,r7}								\n"/* Write third set of RBAR/RLAR registers. */
-            "	movs r5, #7										\n"/* r5 = 7. */
-            "	str  r5, [r2]									\n"/* Program RNR = 7. */
-            "	ldmia r3!, {r6,r7}								\n"/* Read fourth set of RBAR/RLAR from TCB. */
-            "	ldr  r4, xRBARConst								\n"/* r4 = 0xe000ed9c [Location of RBAR]. */
-            "	stmia r4!, {r6,r7}								\n"/* Write fourth set of RBAR/RLAR registers. */
-            "													\n"
-            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
-            "	movs r5, #1										\n"/* r5 = 1. */
-            "	orrs r4, r5										\n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-            "	str r4, [r2]									\n"/* Enable MPU. */
-            "	dsb												\n"/* Force memory writes before continuing. */
+            "	dmb											\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r3, xMPUCTRLConst						\n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r3]								\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1									\n"/* r5 = 1. */
+            "	bics r4, r5									\n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r3]								\n"/* Disable MPU. */
+            "												\n"
+            "	adds r1, #4									\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr r4, [r1]								\n"/* r4 = *r1 i.e. r4 = MAIR0. */
+            "	ldr r3, xMAIR0Const							\n"/* r3 = 0xe000edc0 [Location of MAIR0]. */
+            "	str r4, [r3]								\n"/* Program MAIR0. */
+            "	ldr r4, xRNRConst							\n"/* r4 = 0xe000ed98 [Location of RNR]. */
+            "	adds r1, #4									\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	movs r5, #4									\n"/* r5 = 4. */
+            "	str  r5, [r4]								\n"/* Program RNR = 4. */
+            "	ldmia r1!, {r6,r7}							\n"/* Read first set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r6,r7}							\n"/* Write first set of RBAR/RLAR registers. */
+            "	movs r5, #5									\n"/* r5 = 5. */
+            "	str  r5, [r4]								\n"/* Program RNR = 5. */
+            "	ldmia r1!, {r6,r7}							\n"/* Read second set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r6,r7}							\n"/* Write second set of RBAR/RLAR registers. */
+            "	movs r5, #6									\n"/* r5 = 6. */
+            "	str  r5, [r4]								\n"/* Program RNR = 6. */
+            "	ldmia r1!, {r6,r7}							\n"/* Read third set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r6,r7}							\n"/* Write third set of RBAR/RLAR registers. */
+            "	movs r5, #7									\n"/* r5 = 7. */
+            "	str  r5, [r4]								\n"/* Program RNR = 7. */
+            "	ldmia r1!, {r6,r7}							\n"/* Read fourth set of RBAR/RLAR from TCB. */
+            "	ldr  r3, xRBARConst							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	stmia r3!, {r6,r7}							\n"/* Write fourth set of RBAR/RLAR registers. */
+            "												\n"
+            "	ldr r3, xMPUCTRLConst						\n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r3]								\n"/* Read the value of MPU_CTRL. */
+            "	movs r5, #1									\n"/* r5 = 1. */
+            "	orrs r4, r5									\n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
+            "	str r4, [r3]								\n"/* Enable MPU. */
+            "	dsb											\n"/* Force memory writes before continuing. */
         #endif /* configENABLE_MPU */
         "													\n"
         #if ( configENABLE_MPU == 1 )
-            "	ldmia r1!, {r0, r2-r4}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
-            "	msr control, r3									\n"/* Restore the CONTROL register value for the task. */
-            "	mov lr, r4										\n"/* LR = r4. */
-            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
-            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
-            "	push {r1,r4}									\n"
-            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
-            "	pop {r1,r4}										\n"
-            "	mov lr, r4										\n"/* LR = r4. */
-            "	lsls r2, r4, #25								\n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
-            "	bx lr											\n"
+            "	ldmia r2!, {r0, r1, r3, r4}					\n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
+            "	msr psplim, r1								\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r3								\n"/* Restore the CONTROL register value for the task. */
+            "	mov lr, r4									\n"/* LR = r4. */
+            "	ldr r3, xSecureContextConst					\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r3]								\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context					\n"/* If there is no secure context for the task, restore the non-secure context. */
+             "	ldr r3, pxCurrentTCBConst					\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "	ldr r1, [r3]								\n"/* Read pxCurrentTCB. */
+            "	push {r2, r4}								\n"
+            "	bl SecureContext_LoadContext				\n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "	pop {r2, r4}								\n"
+            "	mov lr, r4									\n"/* LR = r4. */
+            "	lsls r1, r4, #25							\n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context						\n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r2									\n"/* Remember the new top of stack for the task. */
+            "	bx lr										\n"
         #else /* configENABLE_MPU */
-            "	ldmia r1!, {r0, r2-r3}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
-            "	mov lr, r3										\n"/* LR = r3. */
-            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
-            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
-            "	push {r1,r3}									\n"
-            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
-            "	pop {r1,r3}										\n"
-            "	mov lr, r3										\n"/* LR = r3. */
-            "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
-            "	bx lr											\n"
+            "	ldmia r2!, {r0, r1, r4}						\n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
+            "	msr psplim, r1								\n"/* Restore the PSPLIM register value for the task. */
+            "	mov lr, r4									\n"/* LR = r4. */
+            "	ldr r3, xSecureContextConst					\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r3]								\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context					\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	ldr r3, pxCurrentTCBConst					\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "	ldr r1, [r3]								\n"/* Read pxCurrentTCB. */
+            "	push {r2, r4}								\n"
+            "	bl SecureContext_LoadContext				\n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "	pop {r2, r4}								\n"
+            "	mov lr, r4									\n"/* LR = r4. */
+            "	lsls r1, r4, #25							\n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context						\n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r2									\n"/* Remember the new top of stack for the task. */
+            "	bx lr										\n"
         #endif /* configENABLE_MPU */
         "													\n"
         " restore_ns_context:								\n"
-        "	adds r1, r1, #16								\n"/* Move to the high registers. */
-        "	ldmia r1!, {r4-r7}								\n"/* Restore the high registers that are not automatically restored. */
+        "	adds r2, r2, #16								\n"/* Move to the high registers. */
+        "	ldmia r2!, {r4-r7}								\n"/* Restore the high registers that are not automatically restored. */
         "	mov r8, r4										\n"/* r8 = r4. */
         "	mov r9, r5										\n"/* r9 = r5. */
         "	mov r10, r6										\n"/* r10 = r6. */
         "	mov r11, r7										\n"/* r11 = r7. */
-        "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
-        "	subs r1, r1, #32								\n"/* Go back to the low registers. */
-        "	ldmia r1!, {r4-r7}								\n"/* Restore the low registers that are not automatically restored. */
+        "	msr psp, r2										\n"/* Remember the new top of stack for the task. */
+        "	subs r2, r2, #32								\n"/* Go back to the low registers. */
+        "	ldmia r2!, {r4-r7}								\n"/* Restore the low registers that are not automatically restored. */
         "	bx lr											\n"
         "													\n"
         "	.align 4										\n"
         "pxCurrentTCBConst: .word pxCurrentTCB				\n"
         "xSecureContextConst: .word xSecureContext			\n"
         #if ( configENABLE_MPU == 1 )
-            "xMPUCTRLConst: .word 0xe000ed94					\n"
-            "xMAIR0Const: .word 0xe000edc0						\n"
-            "xRNRConst: .word 0xe000ed98						\n"
-            "xRBARConst: .word 0xe000ed9c						\n"
+            "xMPUCTRLConst: .word 0xe000ed94				\n"
+            "xMAIR0Const: .word 0xe000edc0					\n"
+            "xRNRConst: .word 0xe000ed98					\n"
+            "xRBARConst: .word 0xe000ed9c					\n"
         #endif /* configENABLE_MPU */
     );
 }
@@ -439,10 +446,10 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR
 {
     __asm volatile
     (
-        "	ldr r1, [r0]									\n"/* The first item in the TCB is the top of the stack. */
-        "	ldr r0, [r1]									\n"/* The first item on the stack is the task's xSecureContext. */
-        "	cmp r0, #0										\n"/* Raise svc if task's xSecureContext is not NULL. */
-        "	beq free_secure_context							\n"
+        "	ldr r2, [r0]									\n"/* The first item in the TCB is the top of the stack. */
+        "	ldr r1, [r2]									\n"/* The first item on the stack is the task's xSecureContext. */
+        "	cmp r1, #0										\n"/* Raise svc if task's xSecureContext is not NULL. */
+        "	bne free_secure_context							\n"/* Branch if r1 != 0. */
         "	bx lr											\n"/* There is no secure context (xSecureContext is NULL). */
         " free_secure_context:								\n"
         "	svc %0											\n"/* Secure context is freed in the supervisor call. */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -212,7 +213,7 @@
     #define portYIELD()                                 vPortYield()
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
@@ -263,9 +264,6 @@
  * @param[in] pxTCB The TCB of the task being deleted.
  */
         #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-    #else
-        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-        #define portCLEAN_UP_TCB( pxTCB )
     #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -212,7 +213,7 @@
     #define portYIELD()                                 vPortYield()
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
@@ -263,9 +264,6 @@
  * @param[in] pxTCB The TCB of the task being deleted.
  */
         #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-    #else
-        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-        #define portCLEAN_UP_TCB( pxTCB )
     #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */
@@ -50,66 +51,66 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_
         "	ldr  r0, [r3]									\n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
         "													\n"
         #if ( configENABLE_MPU == 1 )
-            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
-            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
-            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-            "	str r4, [r2]									\n"/* Disable MPU. */
-            "													\n"
-            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-            "	ldr  r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
-            "	ldr  r2, xMAIR0Const2							\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
-            "	str  r4, [r2]									\n"/* Program MAIR0. */
-            "	ldr  r2, xRNRConst2								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
-            "	movs r4, #4										\n"/* r4 = 4. */
-            "	str  r4, [r2]									\n"/* Program RNR = 4. */
-            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-            "	ldr  r2, xRBARConst2							\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
-            "	ldmia r3!, {r4-r11}								\n"/* Read 4 set of RBAR/RLAR registers from TCB. */
-            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
-            "													\n"
-            "	ldr r2, xMPUCTRLConst2							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
-            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-            "	str r4, [r2]									\n"/* Enable MPU. */
-            "	dsb												\n"/* Force memory writes before continuing. */
+            "	dmb											\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r2, xMPUCTRLConst2						\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]								\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1									\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r2]								\n"/* Disable MPU. */
+            "												\n"
+            "	adds r3, #4									\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
+            "	ldr  r4, [r3]								\n"/* r4 = *r3 i.e. r4 = MAIR0. */
+            "	ldr  r2, xMAIR0Const2						\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "	str  r4, [r2]								\n"/* Program MAIR0. */
+            "	ldr  r2, xRNRConst2							\n"/* r2 = 0xe000ed98 [Location of RNR]. */
+            "	movs r4, #4									\n"/* r4 = 4. */
+            "	str  r4, [r2]								\n"/* Program RNR = 4. */
+            "	adds r3, #4									\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+            "	ldr  r2, xRBARConst2						\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r3!, {r4-r11}							\n"/* Read 4 set of RBAR/RLAR registers from TCB. */
+            "	stmia r2!, {r4-r11}							\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "												\n"
+            "	ldr r2, xMPUCTRLConst2						\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r2]								\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1									\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r2]								\n"/* Enable MPU. */
+            "	dsb											\n"/* Force memory writes before continuing. */
         #endif /* configENABLE_MPU */
         "													\n"
         #if ( configENABLE_MPU == 1 )
-            "	ldm  r0!, {r1-r4}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
-            "	ldr  r5, xSecureContextConst2					\n"
-            "	str  r1, [r5]									\n"/* Set xSecureContext to this task's value for the same. */
-            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
-            "	msr  control, r3								\n"/* Set this task's CONTROL value. */
-            "	adds r0, #32									\n"/* Discard everything up to r0. */
-            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
-            "	isb												\n"
-            "	mov  r0, #0										\n"
-            "	msr  basepri, r0								\n"/* Ensure that interrupts are enabled when the first task starts. */
-            "	bx   r4											\n"/* Finally, branch to EXC_RETURN. */
+            "	ldm  r0!, {r1-r4}							\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
+            "	ldr  r5, xSecureContextConst2				\n"
+            "	str  r1, [r5]								\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2								\n"/* Set this task's PSPLIM value. */
+            "	msr  control, r3							\n"/* Set this task's CONTROL value. */
+            "	adds r0, #32								\n"/* Discard everything up to r0. */
+            "	msr  psp, r0								\n"/* This is now the new top of stack to use in the task. */
+            "	isb											\n"
+            "	mov  r0, #0									\n"
+            "	msr  basepri, r0							\n"/* Ensure that interrupts are enabled when the first task starts. */
+            "	bx   r4										\n"/* Finally, branch to EXC_RETURN. */
         #else /* configENABLE_MPU */
-            "	ldm  r0!, {r1-r3}								\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-            "	ldr  r4, xSecureContextConst2					\n"
-            "	str  r1, [r4]									\n"/* Set xSecureContext to this task's value for the same. */
-            "	msr  psplim, r2									\n"/* Set this task's PSPLIM value. */
-            "	movs r1, #2										\n"/* r1 = 2. */
-            "	msr  CONTROL, r1								\n"/* Switch to use PSP in the thread mode. */
-            "	adds r0, #32									\n"/* Discard everything up to r0. */
-            "	msr  psp, r0									\n"/* This is now the new top of stack to use in the task. */
-            "	isb												\n"
-            "	mov  r0, #0										\n"
-            "	msr  basepri, r0								\n"/* Ensure that interrupts are enabled when the first task starts. */
-            "	bx   r3											\n"/* Finally, branch to EXC_RETURN. */
+            "	ldm  r0!, {r1-r3}							\n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+            "	ldr  r4, xSecureContextConst2				\n"
+            "	str  r1, [r4]								\n"/* Set xSecureContext to this task's value for the same. */
+            "	msr  psplim, r2								\n"/* Set this task's PSPLIM value. */
+            "	movs r1, #2									\n"/* r1 = 2. */
+            "	msr  CONTROL, r1							\n"/* Switch to use PSP in the thread mode. */
+            "	adds r0, #32								\n"/* Discard everything up to r0. */
+            "	msr  psp, r0								\n"/* This is now the new top of stack to use in the task. */
+            "	isb											\n"
+            "	mov  r0, #0									\n"
+            "	msr  basepri, r0							\n"/* Ensure that interrupts are enabled when the first task starts. */
+            "	bx   r3										\n"/* Finally, branch to EXC_RETURN. */
         #endif /* configENABLE_MPU */
         "													\n"
         "	.align 4										\n"
         "pxCurrentTCBConst2: .word pxCurrentTCB				\n"
         "xSecureContextConst2: .word xSecureContext			\n"
         #if ( configENABLE_MPU == 1 )
-            "xMPUCTRLConst2: .word 0xe000ed94					\n"
-            "xMAIR0Const2: .word 0xe000edc0						\n"
-            "xRNRConst2: .word 0xe000ed98						\n"
-            "xRBARConst2: .word 0xe000ed9c						\n"
+            "xMPUCTRLConst2: .word 0xe000ed94				\n"
+            "xMAIR0Const2: .word 0xe000edc0					\n"
+            "xRNRConst2: .word 0xe000ed98					\n"
+            "xRBARConst2: .word 0xe000ed9c					\n"
         #endif /* configENABLE_MPU */
     );
 }
@@ -216,62 +217,65 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
         "	.extern SecureContext_SaveContext				\n"
         "	.extern SecureContext_LoadContext				\n"
         "													\n"
-        "	mrs r1, psp										\n"/* Read PSP in r1. */
-        "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-        "	ldr r0, [r2]									\n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+        "	ldr r3, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        "	ldr r0, [r3]									\n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r3]									\n"/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+        "	mrs r2, psp										\n"/* Read PSP in r2. */
         "													\n"
         "	cbz r0, save_ns_context							\n"/* No secure context to save. */
         "	push {r0-r2, r14}								\n"
-        "	bl SecureContext_SaveContext					\n"
+        "	bl SecureContext_SaveContext					\n"/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
         "	pop {r0-r3}										\n"/* LR is now in r3. */
         "	mov lr, r3										\n"/* LR = r3. */
-        "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-        "	bpl save_ns_context								\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        "	lsls r1, r3, #25								\n"/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        "	bpl save_ns_context								\n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        "													\n"
         "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        "	ldr r1, [r3]									\n"/* Read pxCurrentTCB.*/
         #if ( configENABLE_MPU == 1 )
-            "	subs r1, r1, #16								\n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
-            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
-            "	mrs r3, control									\n"/* r3 = CONTROL. */
-            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
-            "	stmia r1!, {r0, r2-r4}							\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	subs r2, r2, #16							\n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	str r2, [r1]								\n"/* Save the new top of stack in TCB. */
+            "	mrs r1, psplim								\n"/* r1 = PSPLIM. */
+            "	mrs r3, control								\n"/* r3 = CONTROL. */
+            "	mov r4, lr									\n"/* r4 = LR/EXC_RETURN. */
+            "	stmia r2!, {r0, r1, r3, r4}					\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
         #else /* configENABLE_MPU */
-            "	subs r1, r1, #12								\n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
-            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
-            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
-            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
-            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+            "	subs r2, r2, #12							\n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+            "	str r2, [r1]								\n"/* Save the new top of stack in TCB. */
+            "	mrs r1, psplim								\n"/* r1 = PSPLIM. */
+            "	mov r3, lr									\n"/* r3 = LR/EXC_RETURN. */
+            "	stmia r2!, {r0, r1, r3}						\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
         #endif /* configENABLE_MPU */
         "	b select_next_task								\n"
         "													\n"
         " save_ns_context:									\n"
         "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "	ldr r2, [r3]									\n"/* Read pxCurrentTCB. */
+        "	ldr r1, [r3]									\n"/* Read pxCurrentTCB. */
         #if ( configENABLE_FPU == 1 )
-            "	tst lr, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-            "	it eq											\n"
-            "	vstmdbeq r1!, {s16-s31}							\n"/* Store the FPU registers which are not saved automatically. */
+            "	tst lr, #0x10								\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq										\n"
+            "	vstmdbeq r2!, {s16-s31}						\n"/* Store the FPU registers which are not saved automatically. */
         #endif /* configENABLE_FPU */
         #if ( configENABLE_MPU == 1 )
-            "	subs r1, r1, #48								\n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
-            "	adds r1, r1, #16								\n"/* r1 = r1 + 16. */
-            "	stm r1, {r4-r11}								\n"/* Store the registers that are not saved automatically. */
-            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
-            "	mrs r3, control									\n"/* r3 = CONTROL. */
-            "	mov r4, lr										\n"/* r4 = LR/EXC_RETURN. */
-            "	subs r1, r1, #16								\n"/* r1 = r1 - 16. */
-            "	stm r1, {r0, r2-r4}								\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+            "	subs r2, r2, #48							\n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+            "	str r2, [r1]								\n"/* Save the new top of stack in TCB. */
+            "	adds r2, r2, #16							\n"/* r2 = r2 + 16. */
+            "	stm r2, {r4-r11}							\n"/* Store the registers that are not saved automatically. */
+            "	mrs r1, psplim								\n"/* r1 = PSPLIM. */
+            "	mrs r3, control								\n"/* r3 = CONTROL. */
+            "	mov r4, lr									\n"/* r4 = LR/EXC_RETURN. */
+            "	subs r2, r2, #16							\n"/* r2 = r2 - 16. */
+            "	stmia r2!, {r0, r1, r3, r4}					\n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
         #else /* configENABLE_MPU */
-            "	subs r1, r1, #44								\n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-            "	str r1, [r2]									\n"/* Save the new top of stack in TCB. */
-            "	adds r1, r1, #12								\n"/* r1 = r1 + 12. */
-            "	stm r1, {r4-r11}								\n"/* Store the registers that are not saved automatically. */
-            "	mrs r2, psplim									\n"/* r2 = PSPLIM. */
-            "	mov r3, lr										\n"/* r3 = LR/EXC_RETURN. */
-            "	subs r1, r1, #12								\n"/* r1 = r1 - 12. */
-            "	stmia r1!, {r0, r2-r3}							\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
+            "	subs r2, r2, #44							\n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+            "	str r2, [r1]								\n"/* Save the new top of stack in TCB. */
+            "	adds r2, r2, #12							\n"/* r2 = r2 + 12. */
+            "	stm r2, {r4-r11}							\n"/* Store the registers that are not saved automatically. */
+            "	mrs r1, psplim								\n"/* r1 = PSPLIM. */
+            "	mov r3, lr									\n"/* r3 = LR/EXC_RETURN. */
+            "	subs r2, r2, #12							\n"/* r2 = r2 - 12. */
+            "	stmia r2!, {r0, r1, r3}						\n"/* Store xSecureContext, PSPLIM and LR on the stack. */
         #endif /* configENABLE_MPU */
         "													\n"
         " select_next_task:									\n"
@@ -283,87 +287,91 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
         "	mov r0, #0										\n"/* r0 = 0. */
         "	msr basepri, r0									\n"/* Enable interrupts. */
         "													\n"
-        "	ldr r2, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-        "	ldr r3, [r2]									\n"/* Read pxCurrentTCB. */
-        "	ldr r1, [r3]									\n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
+        "	ldr r3, pxCurrentTCBConst						\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        "	ldr r1, [r3]									\n"/* Read pxCurrentTCB. */
+        "	ldr r2, [r1]									\n"/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
         "													\n"
         #if ( configENABLE_MPU == 1 )
-            "	dmb												\n"/* Complete outstanding transfers before disabling MPU. */
-            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
-            "	bic r4, #1										\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-            "	str r4, [r2]									\n"/* Disable MPU. */
-            "													\n"
-            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-            "	ldr r4, [r3]									\n"/* r4 = *r3 i.e. r4 = MAIR0. */
-            "	ldr r2, xMAIR0Const								\n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
-            "	str r4, [r2]									\n"/* Program MAIR0. */
-            "	ldr r2, xRNRConst								\n"/* r2 = 0xe000ed98 [Location of RNR]. */
-            "	movs r4, #4										\n"/* r4 = 4. */
-            "	str r4, [r2]									\n"/* Program RNR = 4. */
-            "	adds r3, #4										\n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-            "	ldr  r2, xRBARConst								\n"/* r2 = 0xe000ed9c [Location of RBAR]. */
-            "	ldmia r3!, {r4-r11}								\n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
-            "	stmia r2!, {r4-r11}								\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
-            "													\n"
-            "	ldr r2, xMPUCTRLConst							\n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-            "	ldr r4, [r2]									\n"/* Read the value of MPU_CTRL. */
-            "	orr r4, #1										\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-            "	str r4, [r2]									\n"/* Enable MPU. */
-            "	dsb												\n"/* Force memory writes before continuing. */
+            "	dmb											\n"/* Complete outstanding transfers before disabling MPU. */
+            "	ldr r3, xMPUCTRLConst						\n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r3]								\n"/* Read the value of MPU_CTRL. */
+            "	bic r4, #1									\n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
+            "	str r4, [r3]								\n"/* Disable MPU. */
+            "												\n"
+            "	adds r1, #4									\n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+            "	ldr r4, [r1]								\n"/* r4 = *r1 i.e. r4 = MAIR0. */
+            "	ldr r3, xMAIR0Const							\n"/* r3 = 0xe000edc0 [Location of MAIR0]. */
+            "	str r4, [r3]								\n"/* Program MAIR0. */
+            "	ldr r3, xRNRConst							\n"/* r3 = 0xe000ed98 [Location of RNR]. */
+            "	movs r4, #4									\n"/* r4 = 4. */
+            "	str r4, [r3]								\n"/* Program RNR = 4. */
+            "	adds r1, #4									\n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+            "	ldr r3, xRBARConst							\n"/* r3 = 0xe000ed9c [Location of RBAR]. */
+            "	ldmia r1!, {r4-r11}							\n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "	stmia r3!, {r4-r11}							\n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "												\n"
+            "	ldr r3, xMPUCTRLConst						\n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "	ldr r4, [r3]								\n"/* Read the value of MPU_CTRL. */
+            "	orr r4, #1									\n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
+            "	str r4, [r3]								\n"/* Enable MPU. */
+            "	dsb											\n"/* Force memory writes before continuing. */
         #endif /* configENABLE_MPU */
         "													\n"
         #if ( configENABLE_MPU == 1 )
-            "	ldmia r1!, {r0, r2-r4}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
-            "	msr control, r3									\n"/* Restore the CONTROL register value for the task. */
-            "	mov lr, r4										\n"/* LR = r4. */
-            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
-            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
-            "	push {r1,r4}									\n"
-            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
-            "	pop {r1,r4}										\n"
-            "	mov lr, r4										\n"/* LR = r4. */
-            "	lsls r2, r4, #25								\n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
-            "	bx lr											\n"
+            "	ldmia r2!, {r0, r1, r3, r4}					\n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
+            "	msr psplim, r1								\n"/* Restore the PSPLIM register value for the task. */
+            "	msr control, r3								\n"/* Restore the CONTROL register value for the task. */
+            "	mov lr, r4									\n"/* LR = r4. */
+            "	ldr r3, xSecureContextConst					\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r3]								\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context					\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	ldr r3, pxCurrentTCBConst					\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "	ldr r1, [r3]								\n"/* Read pxCurrentTCB. */
+            "	push {r2, r4}								\n"
+            "	bl SecureContext_LoadContext				\n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "	pop {r2, r4}								\n"
+            "	mov lr, r4									\n"/* LR = r4. */
+            "	lsls r1, r4, #25							\n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context						\n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r2									\n"/* Remember the new top of stack for the task. */
+            "	bx lr										\n"
         #else /* configENABLE_MPU */
-            "	ldmia r1!, {r0, r2-r3}							\n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-            "	msr psplim, r2									\n"/* Restore the PSPLIM register value for the task. */
-            "	mov lr, r3										\n"/* LR = r3. */
-            "	ldr r2, xSecureContextConst						\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-            "	str r0, [r2]									\n"/* Restore the task's xSecureContext. */
-            "	cbz r0, restore_ns_context						\n"/* If there is no secure context for the task, restore the non-secure context. */
-            "	push {r1,r3}									\n"
-            "	bl SecureContext_LoadContext					\n"/* Restore the secure context. */
-            "	pop {r1,r3}										\n"
-            "	mov lr, r3										\n"/* LR = r3. */
-            "	lsls r2, r3, #25								\n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-            "	bpl restore_ns_context							\n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-            "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
-            "	bx lr											\n"
+            "	ldmia r2!, {r0, r1, r4}						\n"/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
+            "	msr psplim, r1								\n"/* Restore the PSPLIM register value for the task. */
+            "	mov lr, r4									\n"/* LR = r4. */
+            "	ldr r3, xSecureContextConst					\n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+            "	str r0, [r3]								\n"/* Restore the task's xSecureContext. */
+            "	cbz r0, restore_ns_context					\n"/* If there is no secure context for the task, restore the non-secure context. */
+            "	ldr r3, pxCurrentTCBConst					\n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "	ldr r1, [r3]								\n"/* Read pxCurrentTCB. */
+            "	push {r2, r4}								\n"
+            "	bl SecureContext_LoadContext				\n"/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+            "	pop {r2, r4}								\n"
+            "	mov lr, r4									\n"/* LR = r4. */
+            "	lsls r1, r4, #25							\n"/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+            "	bpl restore_ns_context						\n"/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+            "	msr psp, r2									\n"/* Remember the new top of stack for the task. */
+            "	bx lr										\n"
         #endif /* configENABLE_MPU */
         "													\n"
         " restore_ns_context:								\n"
-        "	ldmia r1!, {r4-r11}								\n"/* Restore the registers that are not automatically restored. */
+        "	ldmia r2!, {r4-r11}								\n"/* Restore the registers that are not automatically restored. */
         #if ( configENABLE_FPU == 1 )
-            "	tst lr, #0x10									\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-            "	it eq											\n"
-            "	vldmiaeq r1!, {s16-s31}							\n"/* Restore the FPU registers which are not restored automatically. */
+            "	tst lr, #0x10								\n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+            "	it eq										\n"
+            "	vldmiaeq r2!, {s16-s31}						\n"/* Restore the FPU registers which are not restored automatically. */
         #endif /* configENABLE_FPU */
-        "	msr psp, r1										\n"/* Remember the new top of stack for the task. */
+        "	msr psp, r2										\n"/* Remember the new top of stack for the task. */
         "	bx lr											\n"
         "													\n"
         "	.align 4										\n"
         "pxCurrentTCBConst: .word pxCurrentTCB				\n"
         "xSecureContextConst: .word xSecureContext			\n"
         #if ( configENABLE_MPU == 1 )
-            "xMPUCTRLConst: .word 0xe000ed94					\n"
-            "xMAIR0Const: .word 0xe000edc0						\n"
-            "xRNRConst: .word 0xe000ed98						\n"
-            "xRBARConst: .word 0xe000ed9c						\n"
+            "xMPUCTRLConst: .word 0xe000ed94				\n"
+            "xMAIR0Const: .word 0xe000edc0					\n"
+            "xRNRConst: .word 0xe000ed98					\n"
+            "xRBARConst: .word 0xe000ed9c					\n"
         #endif /* configENABLE_MPU */
         ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
     );
@@ -402,9 +410,9 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR
 {
     __asm volatile
     (
-        "	ldr r1, [r0]									\n"/* The first item in the TCB is the top of the stack. */
-        "	ldr r0, [r1]									\n"/* The first item on the stack is the task's xSecureContext. */
-        "	cmp r0, #0										\n"/* Raise svc if task's xSecureContext is not NULL. */
+        "	ldr r2, [r0]									\n"/* The first item in the TCB is the top of the stack. */
+        "	ldr r1, [r2]									\n"/* The first item on the stack is the task's xSecureContext. */
+        "	cmp r1, #0										\n"/* Raise svc if task's xSecureContext is not NULL. */
         "	it ne											\n"
         "	svcne %0										\n"/* Secure context is freed in the supervisor call. */
         "	bx lr											\n"/* Return. */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -212,7 +213,7 @@
     #define portYIELD()                                 vPortYield()
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
@@ -263,9 +264,6 @@
  * @param[in] pxTCB The TCB of the task being deleted.
  */
         #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-    #else
-        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-        #define portCLEAN_UP_TCB( pxTCB )
     #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -212,7 +213,7 @@
     #define portYIELD()                                 vPortYield()
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
@@ -263,9 +264,6 @@
  * @param[in] pxTCB The TCB of the task being deleted.
  */
         #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-    #else
-        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-        #define portCLEAN_UP_TCB( pxTCB )
     #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,9 +24,15 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
+/* Including FreeRTOSConfig.h here will cause build errors if the header file
+contains code not understood by the assembler - for example the 'extern' keyword.
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
+the code is included in C files but excluded by the preprocessor in assembly
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
+#include "FreeRTOSConfig.h"
+
 	EXTERN pxCurrentTCB
 	EXTERN xSecureContext
 	EXTERN vTaskSwitchContext
@@ -193,64 +201,66 @@ vClearInterruptMask:
 /*-----------------------------------------------------------*/
 
 PendSV_Handler:
-	mrs r1, psp								/* Read PSP in r1. */
-	ldr r2, =xSecureContext					/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	ldr r0, [r2]							/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+	ldr r3, =xSecureContext					/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+	ldr r0, [r3]							/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+	ldr r3, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+	ldr r1, [r3]							/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+	mrs r2, psp								/* Read PSP in r2. */
 
 	cbz r0, save_ns_context					/* No secure context to save. */
 	push {r0-r2, r14}
-	bl SecureContext_SaveContext
+	bl SecureContext_SaveContext			/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
 	pop {r0-r3}								/* LR is now in r3. */
 	mov lr, r3								/* LR = r3. */
-	lsls r2, r3, #25						/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	bpl save_ns_context						/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+	lsls r1, r3, #25						/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+	bpl save_ns_context						/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
 	ldr r3, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr r2, [r3]							/* Read pxCurrentTCB. */
+	ldr r1, [r3]							/* Read pxCurrentTCB. */
 #if ( configENABLE_MPU == 1 )
-	subs r1, r1, #16						/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	str r1, [r2]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
+	subs r2, r2, #16						/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+	str r2, [r1]							/* Save the new top of stack in TCB. */
+	mrs r1, psplim							/* r1 = PSPLIM. */
 	mrs r3, control							/* r3 = CONTROL. */
 	mov r4, lr								/* r4 = LR/EXC_RETURN. */
-	stmia r1!, {r0, r2-r4}					/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+	stmia r2!, {r0, r1, r3, r4}				/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
 #else /* configENABLE_MPU */
-	subs r1, r1, #12						/* Make space for xSecureContext, PSPLIM and LR on the stack. */
-	str r1, [r2]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
+	subs r2, r2, #12						/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+	str r2, [r1]							/* Save the new top of stack in TCB. */
+	mrs r1, psplim							/* r1 = PSPLIM. */
 	mov r3, lr								/* r3 = LR/EXC_RETURN. */
-	stmia r1!, {r0, r2-r3}					/* Store xSecureContext, PSPLIM and LR on the stack. */
+	stmia r2!, {r0, r1, r3}					/* Store xSecureContext, PSPLIM and LR on the stack. */
 #endif /* configENABLE_MPU */
 	b select_next_task
 
 	save_ns_context:
 		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-		ldr r2, [r3]						/* Read pxCurrentTCB. */
+		ldr r1, [r3]						/* Read pxCurrentTCB. */
 	#if ( configENABLE_MPU == 1 )
-		subs r1, r1, #48					/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-		str r1, [r2]						/* Save the new top of stack in TCB. */
-		adds r1, r1, #16					/* r1 = r1 + 16. */
-		stmia r1!, {r4-r7}					/* Store the low registers that are not saved automatically. */
+		subs r2, r2, #48					/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+		str r2, [r1]						/* Save the new top of stack in TCB. */
+		adds r2, r2, #16					/* r2 = r2 + 16. */
+		stmia r2!, {r4-r7}					/* Store the low registers that are not saved automatically. */
 		mov r4, r8							/* r4 = r8. */
 		mov r5, r9							/* r5 = r9. */
 		mov r6, r10							/* r6 = r10. */
 		mov r7, r11							/* r7 = r11. */
-		stmia r1!, {r4-r7}					/* Store the high registers that are not saved automatically. */
-		mrs r2, psplim						/* r2 = PSPLIM. */
+		stmia r2!, {r4-r7}					/* Store the high registers that are not saved automatically. */
+		mrs r1, psplim						/* r1 = PSPLIM. */
 		mrs r3, control						/* r3 = CONTROL. */
 		mov r4, lr							/* r4 = LR/EXC_RETURN. */
-		subs r1, r1, #48					/* r1 = r1 - 48. */
-		stmia r1!, {r0, r2-r4}				/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+		subs r2, r2, #48					/* r2 = r2 - 48. */
+		stmia r2!, {r0, r1, r3, r4}			/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
 	#else /* configENABLE_MPU */
-		subs r1, r1, #44					/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-		str r1, [r2]						/* Save the new top of stack in TCB. */
-		mrs r2, psplim						/* r2 = PSPLIM. */
+		subs r2, r2, #44					/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+		str r2, [r1]						/* Save the new top of stack in TCB. */
+		mrs r1, psplim						/* r1 = PSPLIM. */
 		mov r3, lr							/* r3 = LR/EXC_RETURN. */
-		stmia r1!, {r0, r2-r7}				/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
+		stmia r2!, {r0, r1, r3-r7}			/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
 		mov r4, r8							/* r4 = r8. */
 		mov r5, r9							/* r5 = r9. */
 		mov r6, r10							/* r6 = r10. */
 		mov r7, r11							/* r7 = r11. */
-		stmia r1!, {r4-r7}					/* Store the high registers that are not saved automatically. */
+		stmia r2!, {r4-r7}					/* Store the high registers that are not saved automatically. */
 	#endif /* configENABLE_MPU */
 
 	select_next_task:
@@ -258,96 +268,100 @@ PendSV_Handler:
 		bl vTaskSwitchContext
 		cpsie i
 
-		ldr r2, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-		ldr r3, [r2]						/* Read pxCurrentTCB. */
-		ldr r1, [r3]						/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
+		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+		ldr r1, [r3]						/* Read pxCurrentTCB. */
+		ldr r2, [r1]						/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
 
 	#if ( configENABLE_MPU == 1 )
 		dmb									/* Complete outstanding transfers before disabling MPU. */
-		ldr r2, =0xe000ed94					/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-		ldr r4, [r2]						/* Read the value of MPU_CTRL. */
+		ldr r3, =0xe000ed94					/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
+		ldr r4, [r3]						/* Read the value of MPU_CTRL. */
 		movs r5, #1							/* r5 = 1. */
 		bics r4, r5							/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-		str r4, [r2]						/* Disable MPU. */
+		str r4, [r3]						/* Disable MPU. */
 
-		adds r3, #4							/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-		ldr r4, [r3]						/* r4 = *r3 i.e. r4 = MAIR0. */
-		ldr r2, =0xe000edc0					/* r2 = 0xe000edc0 [Location of MAIR0]. */
-		str r4, [r2]						/* Program MAIR0. */
-		ldr r2, =0xe000ed98					/* r2 = 0xe000ed98 [Location of RNR]. */
-		adds r3, #4							/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
+		adds r1, #4							/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+		ldr r4, [r1]						/* r4 = *r1 i.e. r4 = MAIR0. */
+		ldr r3, =0xe000edc0					/* r3 = 0xe000edc0 [Location of MAIR0]. */
+		str r4, [r3]						/* Program MAIR0. */
+		ldr r4, =0xe000ed98					/* r4 = 0xe000ed98 [Location of RNR]. */
+		adds r1, #4							/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
 		movs r5, #4							/* r5 = 4. */
-		str  r5, [r2]						/* Program RNR = 4. */
-		ldmia r3!, {r6,r7}					/* Read first set of RBAR/RLAR from TCB. */
-		ldr  r4, =0xe000ed9c				/* r4 = 0xe000ed9c [Location of RBAR]. */
-		stmia r4!, {r6,r7}					/* Write first set of RBAR/RLAR registers. */
+		str  r5, [r4]						/* Program RNR = 4. */
+		ldmia r1!, {r6,r7}					/* Read first set of RBAR/RLAR from TCB. */
+		ldr  r3, =0xe000ed9c				/* r3 = 0xe000ed9c [Location of RBAR]. */
+		stmia r3!, {r6,r7}					/* Write first set of RBAR/RLAR registers. */
 		movs r5, #5							/* r5 = 5. */
-		str  r5, [r2]						/* Program RNR = 5. */
-		ldmia r3!, {r6,r7}					/* Read second set of RBAR/RLAR from TCB. */
-		ldr  r4, =0xe000ed9c				/* r4 = 0xe000ed9c [Location of RBAR]. */
-		stmia r4!, {r6,r7}					/* Write second set of RBAR/RLAR registers. */
+		str  r5, [r4]						/* Program RNR = 5. */
+		ldmia r1!, {r6,r7}					/* Read second set of RBAR/RLAR from TCB. */
+		ldr  r3, =0xe000ed9c				/* r3 = 0xe000ed9c [Location of RBAR]. */
+		stmia r3!, {r6,r7}					/* Write second set of RBAR/RLAR registers. */
 		movs r5, #6							/* r5 = 6. */
-		str  r5, [r2]						/* Program RNR = 6. */
-		ldmia r3!, {r6,r7}					/* Read third set of RBAR/RLAR from TCB. */
-		ldr  r4, =0xe000ed9c				/* r4 = 0xe000ed9c [Location of RBAR]. */
-		stmia r4!, {r6,r7}					/* Write third set of RBAR/RLAR registers. */
+		str  r5, [r4]						/* Program RNR = 6. */
+		ldmia r1!, {r6,r7}					/* Read third set of RBAR/RLAR from TCB. */
+		ldr  r3, =0xe000ed9c				/* r3 = 0xe000ed9c [Location of RBAR]. */
+		stmia r3!, {r6,r7}					/* Write third set of RBAR/RLAR registers. */
 		movs r5, #7							/* r5 = 7. */
-		str  r5, [r2]						/* Program RNR = 7. */
-		ldmia r3!, {r6,r7}					/* Read fourth set of RBAR/RLAR from TCB. */
-		ldr  r4, =0xe000ed9c				/* r4 = 0xe000ed9c [Location of RBAR]. */
-		stmia r4!, {r6,r7}					/* Write fourth set of RBAR/RLAR registers. */
+		str  r5, [r4]						/* Program RNR = 7. */
+		ldmia r1!, {r6,r7}					/* Read fourth set of RBAR/RLAR from TCB. */
+		ldr  r3, =0xe000ed9c				/* r3 = 0xe000ed9c [Location of RBAR]. */
+		stmia r3!, {r6,r7}					/* Write fourth set of RBAR/RLAR registers. */
 
-		ldr r2, =0xe000ed94					/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-		ldr r4, [r2]						/* Read the value of MPU_CTRL. */
+		ldr r3, =0xe000ed94					/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
+		ldr r4, [r3]						/* Read the value of MPU_CTRL. */
 		movs r5, #1							/* r5 = 1. */
 		orrs r4, r5							/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-		str r4, [r2]						/* Enable MPU. */
+		str r4, [r3]						/* Enable MPU. */
 		dsb									/* Force memory writes before continuing. */
 	#endif /* configENABLE_MPU */
 
 	#if ( configENABLE_MPU == 1 )
-		ldmia r1!, {r0, r2-r4}				/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-		msr psplim, r2						/* Restore the PSPLIM register value for the task. */
+		ldmia r2!, {r0, r1, r3, r4}			/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
+		msr psplim, r1						/* Restore the PSPLIM register value for the task. */
 		msr control, r3						/* Restore the CONTROL register value for the task. */
 		mov lr, r4							/* LR = r4. */
-		ldr r2, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-		str r0, [r2]						/* Restore the task's xSecureContext. */
+		ldr r3, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+		str r0, [r3]						/* Restore the task's xSecureContext. */
 		cbz r0, restore_ns_context			/* If there is no secure context for the task, restore the non-secure context. */
-		push {r1,r4}
-		bl SecureContext_LoadContext		/* Restore the secure context. */
-		pop {r1,r4}
+		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+		ldr r1, [r3]						/* Read pxCurrentTCB. */
+		push {r2, r4}
+		bl SecureContext_LoadContext		/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+		pop {r2, r4}
 		mov lr, r4							/* LR = r4. */
-		lsls r2, r4, #25					/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-		bpl restore_ns_context				/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
+		lsls r1, r4, #25					/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+		bpl restore_ns_context				/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+		msr psp, r2							/* Remember the new top of stack for the task. */
 		bx lr
 	#else /* configENABLE_MPU */
-		ldmia r1!, {r0, r2-r3}				/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-		msr psplim, r2						/* Restore the PSPLIM register value for the task. */
-		mov lr, r3							/* LR = r3. */
-		ldr r2, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-		str r0, [r2]						/* Restore the task's xSecureContext. */
+		ldmia r2!, {r0, r1, r4}				/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
+		msr psplim, r1						/* Restore the PSPLIM register value for the task. */
+		mov lr, r4							/* LR = r4. */
+		ldr r3, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+		str r0, [r3]						/* Restore the task's xSecureContext. */
 		cbz r0, restore_ns_context			/* If there is no secure context for the task, restore the non-secure context. */
-		push {r1,r3}
-		bl SecureContext_LoadContext		/* Restore the secure context. */
-		pop {r1,r3}
-		mov lr, r3							/* LR = r3. */
-		lsls r2, r3, #25					/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-		bpl restore_ns_context				/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
+		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+		ldr r1, [r3]						/* Read pxCurrentTCB. */
+		push {r2, r4}
+		bl SecureContext_LoadContext		/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+		pop {r2, r4}
+		mov lr, r4							/* LR = r4. */
+		lsls r1, r4, #25					/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+		bpl restore_ns_context				/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+		msr psp, r2							/* Remember the new top of stack for the task. */
 		bx lr
 	#endif /* configENABLE_MPU */
 
 	restore_ns_context:
-		adds r1, r1, #16					/* Move to the high registers. */
-		ldmia r1!, {r4-r7}					/* Restore the high registers that are not automatically restored. */
+		adds r2, r2, #16					/* Move to the high registers. */
+		ldmia r2!, {r4-r7}					/* Restore the high registers that are not automatically restored. */
 		mov r8, r4							/* r8 = r4. */
 		mov r9, r5							/* r9 = r5. */
 		mov r10, r6							/* r10 = r6. */
 		mov r11, r7							/* r11 = r7. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
-		subs r1, r1, #32					/* Go back to the low registers. */
-		ldmia r1!, {r4-r7}					/* Restore the low registers that are not automatically restored. */
+		msr psp, r2							/* Remember the new top of stack for the task. */
+		subs r2, r2, #32					/* Go back to the low registers. */
+		ldmia r2!, {r4-r7}					/* Restore the low registers that are not automatically restored. */
 		bx lr
 /*-----------------------------------------------------------*/
 
@@ -364,10 +378,10 @@ SVC_Handler:
 /*-----------------------------------------------------------*/
 
 vPortFreeSecureContext:
-	ldr r1, [r0]							/* The first item in the TCB is the top of the stack. */
-	ldr r0, [r1]							/* The first item on the stack is the task's xSecureContext. */
-	cmp r0, #0								/* Raise svc if task's xSecureContext is not NULL. */
-	beq free_secure_context
+	ldr r2, [r0]							/* The first item in the TCB is the top of the stack. */
+	ldr r1, [r2]							/* The first item on the stack is the task's xSecureContext. */
+	cmp r1, #0								/* Raise svc if task's xSecureContext is not NULL. */
+	bne free_secure_context					/* Branch if r1 != 0. */
 	bx lr									/* There is no secure context (xSecureContext is NULL). */
 	free_secure_context:
 		svc 1								/* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -212,7 +213,7 @@
     #define portYIELD()                                 vPortYield()
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
@@ -263,9 +264,6 @@
  * @param[in] pxTCB The TCB of the task being deleted.
  */
         #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-    #else
-        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-        #define portCLEAN_UP_TCB( pxTCB )
     #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,8 +24,13 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
+/* Including FreeRTOSConfig.h here will cause build errors if the header file
+contains code not understood by the assembler - for example the 'extern' keyword.
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
+the code is included in C files but excluded by the preprocessor in assembly
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
+#include "FreeRTOSConfig.h"
 
 	EXTERN pxCurrentTCB
 	EXTERN vTaskSwitchContext

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -212,7 +213,7 @@
     #define portYIELD()                                 vPortYield()
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
@@ -263,9 +264,6 @@
  * @param[in] pxTCB The TCB of the task being deleted.
  */
         #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-    #else
-        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-        #define portCLEAN_UP_TCB( pxTCB )
     #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 /* Including FreeRTOSConfig.h here will cause build errors if the header file
 contains code not understood by the assembler - for example the 'extern' keyword.
@@ -183,62 +184,65 @@ vClearInterruptMask:
 /*-----------------------------------------------------------*/
 
 PendSV_Handler:
-	mrs r1, psp								/* Read PSP in r1. */
-	ldr r2, =xSecureContext					/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	ldr r0, [r2]							/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+	ldr r3, =xSecureContext					/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+	ldr r0, [r3]							/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+	ldr r3, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+	ldr r1, [r3]							/* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+	mrs r2, psp								/* Read PSP in r2. */
 
 	cbz r0, save_ns_context					/* No secure context to save. */
 	push {r0-r2, r14}
-	bl SecureContext_SaveContext
+	bl SecureContext_SaveContext			/* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
 	pop {r0-r3}								/* LR is now in r3. */
 	mov lr, r3								/* LR = r3. */
-	lsls r2, r3, #25						/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	bpl save_ns_context						/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+	lsls r1, r3, #25						/* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+	bpl save_ns_context						/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+
 	ldr r3, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr r2, [r3]							/* Read pxCurrentTCB. */
+	ldr r1, [r3]							/* Read pxCurrentTCB. */
 #if ( configENABLE_MPU == 1 )
-	subs r1, r1, #16						/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	str r1, [r2]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
+	subs r2, r2, #16						/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+	str r2, [r1]							/* Save the new top of stack in TCB. */
+	mrs r1, psplim							/* r1 = PSPLIM. */
 	mrs r3, control							/* r3 = CONTROL. */
 	mov r4, lr								/* r4 = LR/EXC_RETURN. */
-	stmia r1!, {r0, r2-r4}					/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+	stmia r2!, {r0, r1, r3, r4}				/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
 #else /* configENABLE_MPU */
-	subs r1, r1, #12						/* Make space for xSecureContext, PSPLIM and LR on the stack. */
-	str r1, [r2]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
+	subs r2, r2, #12						/* Make space for xSecureContext, PSPLIM and LR on the stack. */
+	str r2, [r1]							/* Save the new top of stack in TCB. */
+	mrs r1, psplim							/* r1 = PSPLIM. */
 	mov r3, lr								/* r3 = LR/EXC_RETURN. */
-	stmia r1!, {r0, r2-r3}					/* Store xSecureContext, PSPLIM and LR on the stack. */
+	stmia r2!, {r0, r1, r3}					/* Store xSecureContext, PSPLIM and LR on the stack. */
 #endif /* configENABLE_MPU */
 	b select_next_task
 
 	save_ns_context:
 		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-		ldr r2, [r3]						/* Read pxCurrentTCB. */
+		ldr r1, [r3]						/* Read pxCurrentTCB. */
 	#if ( configENABLE_FPU == 1 )
 		tst lr, #0x10						/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
 		it eq
-		vstmdbeq r1!, {s16-s31}				/* Store the FPU registers which are not saved automatically. */
+		vstmdbeq r2!, {s16-s31}				/* Store the FPU registers which are not saved automatically. */
 	#endif /* configENABLE_FPU */
 	#if ( configENABLE_MPU == 1 )
-		subs r1, r1, #48					/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-		str r1, [r2]						/* Save the new top of stack in TCB. */
-		adds r1, r1, #16					/* r1 = r1 + 16. */
-		stm r1, {r4-r11}					/* Store the registers that are not saved automatically. */
-		mrs r2, psplim						/* r2 = PSPLIM. */
+		subs r2, r2, #48					/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
+		str r2, [r1]						/* Save the new top of stack in TCB. */
+		adds r2, r2, #16					/* r2 = r2 + 16. */
+		stm r2, {r4-r11}					/* Store the registers that are not saved automatically. */
+		mrs r1, psplim						/* r1 = PSPLIM. */
 		mrs r3, control						/* r3 = CONTROL. */
 		mov r4, lr							/* r4 = LR/EXC_RETURN. */
-		subs r1, r1, #16					/* r1 = r1 - 16. */
-		stm r1, {r0, r2-r4}					/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
+		subs r2, r2, #16					/* r2 = r2 - 16. */
+		stmia r2!, {r0, r1, r3, r4}			/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
 	#else /* configENABLE_MPU */
-		subs r1, r1, #44					/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-		str r1, [r2]						/* Save the new top of stack in TCB. */
-		adds r1, r1, #12					/* r1 = r1 + 12. */
-		stm r1, {r4-r11}					/* Store the registers that are not saved automatically. */
-		mrs r2, psplim						/* r2 = PSPLIM. */
+		subs r2, r2, #44					/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+		str r2, [r1]						/* Save the new top of stack in TCB. */
+		adds r2, r2, #12					/* r2 = r2 + 12. */
+		stm r2, {r4-r11}					/* Store the registers that are not saved automatically. */
+		mrs r1, psplim						/* r1 = PSPLIM. */
 		mov r3, lr							/* r3 = LR/EXC_RETURN. */
-		subs r1, r1, #12					/* r1 = r1 - 12. */
-		stmia r1!, {r0, r2-r3}				/* Store xSecureContext, PSPLIM and LR on the stack. */
+		subs r2, r2, #12					/* r2 = r2 - 12. */
+		stmia r2!, {r0, r1, r3}				/* Store xSecureContext, PSPLIM and LR on the stack. */
 	#endif /* configENABLE_MPU */
 
 	select_next_task:
@@ -250,77 +254,81 @@ PendSV_Handler:
 		mov r0, #0							/* r0 = 0. */
 		msr basepri, r0						/* Enable interrupts. */
 
-		ldr r2, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-		ldr r3, [r2]						/* Read pxCurrentTCB. */
-		ldr r1, [r3]						/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
+		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+		ldr r1, [r3]						/* Read pxCurrentTCB. */
+		ldr r2, [r1]						/* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
 
 	#if ( configENABLE_MPU == 1 )
 		dmb									/* Complete outstanding transfers before disabling MPU. */
-		ldr r2, =0xe000ed94					/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-		ldr r4, [r2]						/* Read the value of MPU_CTRL. */
+		ldr r3, =0xe000ed94					/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
+		ldr r4, [r3]						/* Read the value of MPU_CTRL. */
 		bic r4, r4, #1						/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-		str r4, [r2]						/* Disable MPU. */
+		str r4, [r3]						/* Disable MPU. */
 
-		adds r3, #4							/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-		ldr r4, [r3]						/* r4 = *r3 i.e. r4 = MAIR0. */
-		ldr r2, =0xe000edc0					/* r2 = 0xe000edc0 [Location of MAIR0]. */
-		str r4, [r2]						/* Program MAIR0. */
-		ldr r2, =0xe000ed98					/* r2 = 0xe000ed98 [Location of RNR]. */
+		adds r1, #4							/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
+		ldr r4, [r1]						/* r4 = *r1 i.e. r4 = MAIR0. */
+		ldr r3, =0xe000edc0					/* r3 = 0xe000edc0 [Location of MAIR0]. */
+		str r4, [r3]						/* Program MAIR0. */
+		ldr r3, =0xe000ed98					/* r3 = 0xe000ed98 [Location of RNR]. */
 		movs r4, #4							/* r4 = 4. */
-		str r4, [r2]						/* Program RNR = 4. */
-		adds r3, #4							/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-		ldr  r2, =0xe000ed9c				/* r2 = 0xe000ed9c [Location of RBAR]. */
-		ldmia r3!, {r4-r11}					/* Read 4 sets of RBAR/RLAR registers from TCB. */
-		stmia r2!, {r4-r11}					/* Write 4 set of RBAR/RLAR registers using alias registers. */
+		str r4, [r3]						/* Program RNR = 4. */
+		adds r1, #4							/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
+		ldr  r3, =0xe000ed9c				/* r3 = 0xe000ed9c [Location of RBAR]. */
+		ldmia r1!, {r4-r11}					/* Read 4 sets of RBAR/RLAR registers from TCB. */
+		stmia r3!, {r4-r11}					/* Write 4 set of RBAR/RLAR registers using alias registers. */
 
-		ldr r2, =0xe000ed94					/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-		ldr r4, [r2]						/* Read the value of MPU_CTRL. */
+		ldr r3, =0xe000ed94					/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
+		ldr r4, [r3]						/* Read the value of MPU_CTRL. */
 		orr r4, r4, #1						/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-		str r4, [r2]						/* Enable MPU. */
+		str r4, [r3]						/* Enable MPU. */
 		dsb									/* Force memory writes before continuing. */
 	#endif /* configENABLE_MPU */
 
 	#if ( configENABLE_MPU == 1 )
-		ldmia r1!, {r0, r2-r4}				/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-		msr psplim, r2						/* Restore the PSPLIM register value for the task. */
+		ldmia r2!, {r0, r1, r3, r4}			/* Read from stack - r0 = xSecureContext, r1 = PSPLIM, r3 = CONTROL and r4 = LR. */
+		msr psplim, r1						/* Restore the PSPLIM register value for the task. */
 		msr control, r3						/* Restore the CONTROL register value for the task. */
 		mov lr, r4							/* LR = r4. */
-		ldr r2, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-		str r0, [r2]						/* Restore the task's xSecureContext. */
+		ldr r3, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+		str r0, [r3]						/* Restore the task's xSecureContext. */
 		cbz r0, restore_ns_context			/* If there is no secure context for the task, restore the non-secure context. */
-		push {r1,r4}
-		bl SecureContext_LoadContext		/* Restore the secure context. */
-		pop {r1,r4}
+		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+		ldr r1, [r3]						/* Read pxCurrentTCB. */
+		push {r2, r4}
+		bl SecureContext_LoadContext		/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+		pop {r2, r4}
 		mov lr, r4							/* LR = r4. */
-		lsls r2, r4, #25					/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-		bpl restore_ns_context				/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
+		lsls r1, r4, #25					/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+		bpl restore_ns_context				/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+		msr psp, r2							/* Remember the new top of stack for the task. */
 		bx lr
 	#else /* configENABLE_MPU */
-		ldmia r1!, {r0, r2-r3}				/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-		msr psplim, r2						/* Restore the PSPLIM register value for the task. */
-		mov lr, r3							/* LR = r3. */
-		ldr r2, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-		str r0, [r2]						/* Restore the task's xSecureContext. */
+		ldmia r2!, {r0, r1, r4}				/* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
+		msr psplim, r1						/* Restore the PSPLIM register value for the task. */
+		mov lr, r4							/* LR = r4. */
+		ldr r3, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
+		str r0, [r3]						/* Restore the task's xSecureContext. */
 		cbz r0, restore_ns_context			/* If there is no secure context for the task, restore the non-secure context. */
-		push {r1,r3}
-		bl SecureContext_LoadContext		/* Restore the secure context. */
-		pop {r1,r3}
-		mov lr, r3							/* LR = r3. */
-		lsls r2, r3, #25					/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-		bpl restore_ns_context				/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
+		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+		ldr r1, [r3]						/* Read pxCurrentTCB. */
+		push {r2, r4}
+		bl SecureContext_LoadContext		/* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+		pop {r2, r4}
+		mov lr, r4							/* LR = r4. */
+		lsls r1, r4, #25					/* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+		bpl restore_ns_context				/* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+		msr psp, r2							/* Remember the new top of stack for the task. */
 		bx lr
 	#endif /* configENABLE_MPU */
 
 	restore_ns_context:
-		ldmia r1!, {r4-r11}					/* Restore the registers that are not automatically restored. */
+		ldmia r2!, {r4-r11}					/* Restore the registers that are not automatically restored. */
 	#if ( configENABLE_FPU == 1 )
 		tst lr, #0x10						/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
 		it eq
-		vldmiaeq r1!, {s16-s31}				/* Restore the FPU registers which are not restored automatically. */
+		vldmiaeq r2!, {s16-s31}				/* Restore the FPU registers which are not restored automatically. */
 	#endif /* configENABLE_FPU */
-		msr psp, r1							/* Remember the new top of stack for the task. */
+		msr psp, r2							/* Remember the new top of stack for the task. */
 		bx lr
 /*-----------------------------------------------------------*/
 
@@ -334,9 +342,9 @@ SVC_Handler:
 
 vPortFreeSecureContext:
 	/* r0 = uint32_t *pulTCB. */
-	ldr r1, [r0]							/* The first item in the TCB is the top of the stack. */
-	ldr r0, [r1]							/* The first item on the stack is the task's xSecureContext. */
-	cmp r0, #0								/* Raise svc if task's xSecureContext is not NULL. */
+	ldr r2, [r0]							/* The first item in the TCB is the top of the stack. */
+	ldr r1, [r2]							/* The first item on the stack is the task's xSecureContext. */
+	cmp r1, #0								/* Raise svc if task's xSecureContext is not NULL. */
 	it ne
 	svcne 1									/* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */
 	bx lr									/* Return. */

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -212,7 +213,7 @@
     #define portYIELD()                                 vPortYield()
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
@@ -263,9 +264,6 @@
  * @param[in] pxTCB The TCB of the task being deleted.
  */
         #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-    #else
-        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-        #define portCLEAN_UP_TCB( pxTCB )
     #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 /* Including FreeRTOSConfig.h here will cause build errors if the header file
 contains code not understood by the assembler - for example the 'extern' keyword.

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -212,7 +213,7 @@
     #define portYIELD()                                 vPortYield()
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/
 
@@ -263,9 +264,6 @@
  * @param[in] pxTCB The TCB of the task being deleted.
  */
         #define portCLEAN_UP_TCB( pxTCB )                           vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-    #else
-        #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-        #define portCLEAN_UP_TCB( pxTCB )
     #endif /* configENABLE_TRUSTZONE */
 /*-----------------------------------------------------------*/
 

portable/ARMv8M/non_secure/portasm.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef __PORT_ASM_H__

portable/ARMv8M/secure/context/portable/GCC/ARM_CM23/secure_context_port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Secure context includes. */
@@ -35,56 +36,63 @@
     #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
 #endif
 
-secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
+void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) );
+void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) );
+
+void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
 {
-    /* xSecureContextHandle value is in r0. */
+    /* pxSecureContext value is in r0. */
     __asm volatile
     (
-        "	.syntax unified							\n"
-        "											\n"
-        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
-        "	cbz r1, load_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
-        "	ldmia r0!, {r1, r2}						\n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
+        " .syntax unified                   \n"
+        "                                   \n"
+        " mrs r1, ipsr                      \n" /* r1 = IPSR. */
+        " cbz r1, load_ctx_therad_mode      \n" /* Do nothing if the processor is running in the Thread Mode. */
+        " ldmia r0!, {r1, r2}               \n" /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */
+        "                                   \n"
         #if ( configENABLE_MPU == 1 )
-            "	ldmia r1!, {r3}							\n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
-            "	msr control, r3							\n"/* CONTROL = r3. */
+            " ldmia r1!, {r3}               \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */
+            " msr control, r3               \n" /* CONTROL = r3. */
         #endif /* configENABLE_MPU */
-        "	msr psplim, r2							\n"/* PSPLIM = r2. */
-        "	msr psp, r1								\n"/* PSP = r1. */
-        "											\n"
-        " load_ctx_therad_mode:						\n"
-        "	nop										\n"
-        "											\n"
+        "                                   \n"
+        " msr psplim, r2                    \n" /* PSPLIM = r2. */
+        " msr psp, r1                       \n" /* PSP = r1. */
+        "                                   \n"
+        " load_ctx_therad_mode:             \n"
+        "    bx lr                          \n"
+        "                                   \n"
         ::: "r0", "r1", "r2"
     );
 }
 /*-----------------------------------------------------------*/
 
-secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
+void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
 {
-    /* xSecureContextHandle value is in r0. */
+    /* pxSecureContext value is in r0. */
     __asm volatile
     (
-        "	.syntax unified							\n"
-        "											\n"
-        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
-        "	cbz r1, save_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
-        "	mrs r1, psp								\n"/* r1 = PSP. */
+        " .syntax unified                   \n"
+        "                                   \n"
+        " mrs r1, ipsr                      \n" /* r1 = IPSR. */
+        " cbz r1, save_ctx_therad_mode      \n" /* Do nothing if the processor is running in the Thread Mode. */
+        " mrs r1, psp                       \n" /* r1 = PSP. */
+        "                                   \n"
         #if ( configENABLE_MPU == 1 )
-            "	mrs r2, control							\n"/* r2 = CONTROL. */
-            "	subs r1, r1, #4							\n"/* Make space for the CONTROL value on the stack. */
-            "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-            "	stmia r1!, {r2}							\n"/* Store CONTROL value on the stack. */
+            " mrs r2, control               \n" /* r2 = CONTROL. */
+            " subs r1, r1, #4               \n" /* Make space for the CONTROL value on the stack. */
+            " str r1, [r0]                  \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */
+            " stmia r1!, {r2}               \n" /* Store CONTROL value on the stack. */
         #else /* configENABLE_MPU */
-            "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
+            " str r1, [r0]                  \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */
         #endif /* configENABLE_MPU */
-        "	movs r1, %0								\n"/* r1 = securecontextNO_STACK. */
-        "	msr psplim, r1							\n"/* PSPLIM = securecontextNO_STACK. */
-        "	msr psp, r1								\n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
-        "											\n"
-        " save_ctx_therad_mode:						\n"
-        "	nop										\n"
-        "											\n"
+        "                                   \n"
+        " movs r1, %0                       \n" /* r1 = securecontextNO_STACK. */
+        " msr psplim, r1                    \n" /* PSPLIM = securecontextNO_STACK. */
+        " msr psp, r1                       \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+        "                                   \n"
+        " save_ctx_therad_mode:             \n"
+        "   bx lr                           \n"
+        "                                   \n"
         ::"i" ( securecontextNO_STACK ) : "r1", "memory"
     );
 }

portable/ARMv8M/secure/context/portable/GCC/ARM_CM33/secure_context_port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Secure context includes. */
@@ -31,57 +32,65 @@
 /* Secure port macros. */
 #include "secure_port_macros.h"
 
-secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
+void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) );
+void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext ) __attribute__( ( naked ) );
+
+void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext )
 {
-    /* xSecureContextHandle value is in r0. */
+    /* pxSecureContext value is in r0. */
     __asm volatile
     (
-        "	.syntax unified							\n"
-        "											\n"
-        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
-        "	cbz r1, load_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
-        "	ldmia r0!, {r1, r2}						\n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
+        " .syntax unified                   \n"
+        "                                   \n"
+        " mrs r1, ipsr                      \n" /* r1 = IPSR. */
+        " cbz r1, load_ctx_therad_mode      \n" /* Do nothing if the processor is running in the Thread Mode. */
+        " ldmia r0!, {r1, r2}               \n" /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */
+        "                                   \n"
         #if ( configENABLE_MPU == 1 )
-            "	ldmia r1!, {r3}							\n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
-            "	msr control, r3							\n"/* CONTROL = r3. */
+            " ldmia r1!, {r3}               \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */
+            " msr control, r3               \n" /* CONTROL = r3. */
         #endif /* configENABLE_MPU */
-        "	msr psplim, r2							\n"/* PSPLIM = r2. */
-        "	msr psp, r1								\n"/* PSP = r1. */
-        "											\n"
-        " load_ctx_therad_mode:						\n"
-        "	nop										\n"
-        "											\n"
+        "                                   \n"
+        " msr psplim, r2                    \n" /* PSPLIM = r2. */
+        " msr psp, r1                       \n" /* PSP = r1. */
+        "                                   \n"
+        " load_ctx_therad_mode:             \n"
+        "    bx lr                          \n"
+        "                                   \n"
         ::: "r0", "r1", "r2"
     );
 }
 /*-----------------------------------------------------------*/
 
-secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
+void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
 {
-    /* xSecureContextHandle value is in r0. */
+    /* pxSecureContext value is in r0. */
     __asm volatile
     (
-        "	.syntax unified							\n"
-        "											\n"
-        "	mrs r1, ipsr							\n"/* r1 = IPSR. */
-        "	cbz r1, save_ctx_therad_mode			\n"/* Do nothing if the processor is running in the Thread Mode. */
-        "	mrs r1, psp								\n"/* r1 = PSP. */
+        " .syntax unified                   \n"
+        "                                   \n"
+        " mrs r1, ipsr                      \n" /* r1 = IPSR. */
+        " cbz r1, save_ctx_therad_mode      \n" /* Do nothing if the processor is running in the Thread Mode. */
+        " mrs r1, psp                       \n" /* r1 = PSP. */
+        "                                   \n"
         #if ( configENABLE_FPU == 1 )
-            "	vstmdb r1!, {s0}						\n"/* Trigger the defferred stacking of FPU registers. */
-            "	vldmia r1!, {s0}						\n"/* Nullify the effect of the pervious statement. */
+            " vstmdb r1!, {s0}              \n" /* Trigger the defferred stacking of FPU registers. */
+            " vldmia r1!, {s0}              \n" /* Nullify the effect of the pervious statement. */
         #endif /* configENABLE_FPU */
+        "                                   \n"
         #if ( configENABLE_MPU == 1 )
-            "	mrs r2, control							\n"/* r2 = CONTROL. */
-            "	stmdb r1!, {r2}							\n"/* Store CONTROL value on the stack. */
+            " mrs r2, control               \n" /* r2 = CONTROL. */
+            " stmdb r1!, {r2}               \n" /* Store CONTROL value on the stack. */
         #endif /* configENABLE_MPU */
-        "	str r1, [r0]							\n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-        "	movs r1, %0								\n"/* r1 = securecontextNO_STACK. */
-        "	msr psplim, r1							\n"/* PSPLIM = securecontextNO_STACK. */
-        "	msr psp, r1								\n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
-        "											\n"
-        " save_ctx_therad_mode:						\n"
-        "	nop										\n"
-        "											\n"
+        "                                   \n"
+        " str r1, [r0]                      \n" /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */
+        " movs r1, %0                       \n" /* r1 = securecontextNO_STACK. */
+        " msr psplim, r1                    \n" /* PSPLIM = securecontextNO_STACK. */
+        " msr psp, r1                       \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+        "                                   \n"
+        " save_ctx_therad_mode:             \n"
+        "    bx lr                          \n"
+        "                                   \n"
         ::"i" ( securecontextNO_STACK ) : "r1", "memory"
     );
 }

portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port.c

@@ -1,48 +0,0 @@
-/*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * https://www.FreeRTOS.org
- * https://github.com/FreeRTOS
- *
- * 1 tab == 4 spaces!
- */
-
-/* Secure context includes. */
-#include "secure_context.h"
-
-/* Secure port macros. */
-#include "secure_port_macros.h"
-
-/* Functions implemented in assembler file. */
-extern void SecureContext_LoadContextAsm( SecureContextHandle_t xSecureContextHandle );
-extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHandle );
-
-secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
-{
-    SecureContext_LoadContextAsm( xSecureContextHandle );
-}
-/*-----------------------------------------------------------*/
-
-secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
-{
-    SecureContext_SaveContextAsm( xSecureContextHandle );
-}
-/*-----------------------------------------------------------*/

portable/ARMv8M/secure/context/portable/IAR/ARM_CM23/secure_context_port_asm.s

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,55 +24,65 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
-	SECTION .text:CODE:NOROOT(2)
-	THUMB
+    SECTION .text:CODE:NOROOT(2)
+    THUMB
 
-	PUBLIC SecureContext_LoadContextAsm
-	PUBLIC SecureContext_SaveContextAsm
+/* Including FreeRTOSConfig.h here will cause build errors if the header file
+contains code not understood by the assembler - for example the 'extern' keyword.
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
+the code is included in C files but excluded by the preprocessor in assembly
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
+#include "FreeRTOSConfig.h"
+
+    PUBLIC SecureContext_LoadContextAsm
+    PUBLIC SecureContext_SaveContextAsm
 
 #if ( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
 #endif
 /*-----------------------------------------------------------*/
 
 SecureContext_LoadContextAsm:
-	/* xSecureContextHandle value is in r0. */
-	mrs r1, ipsr							/* r1 = IPSR. */
-	cbz r1, load_ctx_therad_mode			/* Do nothing if the processor is running in the Thread Mode. */
-	ldmia r0!, {r1, r2}						/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
-#if ( configENABLE_MPU == 1 )
-	ldmia r1!, {r3}							/* Read CONTROL register value from task's stack. r3 = CONTROL. */
-	msr control, r3							/* CONTROL = r3. */
-#endif /* configENABLE_MPU */
-	msr psplim, r2							/* PSPLIM = r2. */
-	msr psp, r1								/* PSP = r1. */
+    /* pxSecureContext value is in r0. */
+    mrs r1, ipsr                    /* r1 = IPSR. */
+    cbz r1, load_ctx_therad_mode    /* Do nothing if the processor is running in the Thread Mode. */
+    ldmia r0!, {r1, r2}             /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */
 
-	load_ctx_therad_mode:
-		bx lr
+#if ( configENABLE_MPU == 1 )
+    ldmia r1!, {r3}                 /* Read CONTROL register value from task's stack. r3 = CONTROL. */
+    msr control, r3                 /* CONTROL = r3. */
+#endif /* configENABLE_MPU */
+
+    msr psplim, r2                  /* PSPLIM = r2. */
+    msr psp, r1                     /* PSP = r1. */
+
+    load_ctx_therad_mode:
+        bx lr
 /*-----------------------------------------------------------*/
 
 SecureContext_SaveContextAsm:
-	/* xSecureContextHandle value is in r0. */
-	mrs r1, ipsr							/* r1 = IPSR. */
-	cbz r1, save_ctx_therad_mode			/* Do nothing if the processor is running in the Thread Mode. */
-	mrs r1, psp								/* r1 = PSP. */
-#if ( configENABLE_MPU == 1 )
-	mrs r2, control							/* r2 = CONTROL. */
-	subs r1, r1, #4							/* Make space for the CONTROL value on the stack. */
-	str r1, [r0]							/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-	stmia r1!, {r2}							/* Store CONTROL value on the stack. */
-#else /* configENABLE_MPU */
-	str r1, [r0]							/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-#endif /* configENABLE_MPU */
-	movs r1, #0								/* r1 = securecontextNO_STACK. */
-	msr psplim, r1							/* PSPLIM = securecontextNO_STACK. */
-	msr psp, r1								/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+    /* pxSecureContext value is in r0. */
+    mrs r1, ipsr                    /* r1 = IPSR. */
+    cbz r1, save_ctx_therad_mode    /* Do nothing if the processor is running in the Thread Mode. */
+    mrs r1, psp                     /* r1 = PSP. */
 
-	save_ctx_therad_mode:
-		bx lr
+#if ( configENABLE_MPU == 1 )
+    mrs r2, control                 /* r2 = CONTROL. */
+    subs r1, r1, #4                 /* Make space for the CONTROL value on the stack. */
+    str r1, [r0]                    /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */
+    stmia r1!, {r2}                 /* Store CONTROL value on the stack. */
+#else /* configENABLE_MPU */
+    str r1, [r0]                    /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */
+#endif /* configENABLE_MPU */
+
+    movs r1, #0                     /* r1 = securecontextNO_STACK. */
+    msr psplim, r1                  /* PSPLIM = securecontextNO_STACK. */
+    msr psp, r1                     /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+
+    save_ctx_therad_mode:
+        bx lr
 /*-----------------------------------------------------------*/
 
-	END
+    END

portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port.c

@@ -1,48 +0,0 @@
-/*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * https://www.FreeRTOS.org
- * https://github.com/FreeRTOS
- *
- * 1 tab == 4 spaces!
- */
-
-/* Secure context includes. */
-#include "secure_context.h"
-
-/* Secure port macros. */
-#include "secure_port_macros.h"
-
-/* Functions implemented in assembler file. */
-extern void SecureContext_LoadContextAsm( SecureContextHandle_t xSecureContextHandle );
-extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHandle );
-
-secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
-{
-    SecureContext_LoadContextAsm( xSecureContextHandle );
-}
-/*-----------------------------------------------------------*/
-
-secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
-{
-    SecureContext_SaveContextAsm( xSecureContextHandle );
-}
-/*-----------------------------------------------------------*/

portable/ARMv8M/secure/context/portable/IAR/ARM_CM33/secure_context_port_asm.s

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,52 +24,63 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
-	SECTION .text:CODE:NOROOT(2)
-	THUMB
+    SECTION .text:CODE:NOROOT(2)
+    THUMB
 
-	PUBLIC SecureContext_LoadContextAsm
-	PUBLIC SecureContext_SaveContextAsm
+/* Including FreeRTOSConfig.h here will cause build errors if the header file
+contains code not understood by the assembler - for example the 'extern' keyword.
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
+the code is included in C files but excluded by the preprocessor in assembly
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
+#include "FreeRTOSConfig.h"
+
+    PUBLIC SecureContext_LoadContextAsm
+    PUBLIC SecureContext_SaveContextAsm
 /*-----------------------------------------------------------*/
 
 SecureContext_LoadContextAsm:
-	/* xSecureContextHandle value is in r0. */
-	mrs r1, ipsr							/* r1 = IPSR. */
-	cbz r1, load_ctx_therad_mode			/* Do nothing if the processor is running in the Thread Mode. */
-	ldmia r0!, {r1, r2}						/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
-#if ( configENABLE_MPU == 1 )
-	ldmia r1!, {r3}							/* Read CONTROL register value from task's stack. r3 = CONTROL. */
-	msr control, r3							/* CONTROL = r3. */
-#endif /* configENABLE_MPU */
-	msr psplim, r2							/* PSPLIM = r2. */
-	msr psp, r1								/* PSP = r1. */
+    /* pxSecureContext value is in r0. */
+    mrs r1, ipsr                        /* r1 = IPSR. */
+    cbz r1, load_ctx_therad_mode        /* Do nothing if the processor is running in the Thread Mode. */
+    ldmia r0!, {r1, r2}                 /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */
 
-	load_ctx_therad_mode:
-		bx lr
+#if ( configENABLE_MPU == 1 )
+    ldmia r1!, {r3}                     /* Read CONTROL register value from task's stack. r3 = CONTROL. */
+    msr control, r3                     /* CONTROL = r3. */
+#endif /* configENABLE_MPU */
+
+    msr psplim, r2                      /* PSPLIM = r2. */
+    msr psp, r1                         /* PSP = r1. */
+
+    load_ctx_therad_mode:
+        bx lr
 /*-----------------------------------------------------------*/
 
 SecureContext_SaveContextAsm:
-	/* xSecureContextHandle value is in r0. */
-	mrs r1, ipsr							/* r1 = IPSR. */
-	cbz r1, save_ctx_therad_mode			/* Do nothing if the processor is running in the Thread Mode. */
-	mrs r1, psp								/* r1 = PSP. */
-#if ( configENABLE_FPU == 1 )
-	vstmdb r1!, {s0}						/* Trigger the defferred stacking of FPU registers. */
-	vldmia r1!, {s0}						/* Nullify the effect of the pervious statement. */
-#endif /* configENABLE_FPU */
-#if ( configENABLE_MPU == 1 )
-	mrs r2, control							/* r2 = CONTROL. */
-	stmdb r1!, {r2}							/* Store CONTROL value on the stack. */
-#endif /* configENABLE_MPU */
-	str r1, [r0]							/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
-	movs r1, #0								/* r1 = securecontextNO_STACK. */
-	msr psplim, r1							/* PSPLIM = securecontextNO_STACK. */
-	msr psp, r1								/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+    /* pxSecureContext value is in r0. */
+    mrs r1, ipsr                        /* r1 = IPSR. */
+    cbz r1, save_ctx_therad_mode        /* Do nothing if the processor is running in the Thread Mode. */
+    mrs r1, psp                         /* r1 = PSP. */
 
-	save_ctx_therad_mode:
-		bx lr
+#if ( configENABLE_FPU == 1 )
+    vstmdb r1!, {s0}                    /* Trigger the defferred stacking of FPU registers. */
+    vldmia r1!, {s0}                    /* Nullify the effect of the pervious statement. */
+#endif /* configENABLE_FPU */
+
+#if ( configENABLE_MPU == 1 )
+    mrs r2, control                     /* r2 = CONTROL. */
+    stmdb r1!, {r2}                     /* Store CONTROL value on the stack. */
+#endif /* configENABLE_MPU */
+
+    str r1, [r0]                        /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */
+    movs r1, #0                         /* r1 = securecontextNO_STACK. */
+    msr psplim, r1                      /* PSPLIM = securecontextNO_STACK. */
+    msr psp, r1                         /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
+
+    save_ctx_therad_mode:
+        bx lr
 /*-----------------------------------------------------------*/
 
-	END
+    END

portable/ARMv8M/secure/context/secure_context.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Secure context includes. */
@@ -49,37 +50,119 @@
  * Bit[1] - 1 --> Thread mode uses PSP.
  */
 #define securecontextCONTROL_VALUE_UNPRIVILEGED    0x03
+
+/**
+ * @brief Size of stack seal values in bytes.
+ */
+#define securecontextSTACK_SEAL_SIZE               8
+
+/**
+ * @brief Stack seal value as recommended by ARM.
+ */
+#define securecontextSTACK_SEAL_VALUE              0xFEF5EDA5
+
+/**
+ * @brief Maximum number of secure contexts.
+ */
+#ifndef secureconfigMAX_SECURE_CONTEXTS
+    #define secureconfigMAX_SECURE_CONTEXTS        8UL
+#endif
 /*-----------------------------------------------------------*/
 
 /**
- * @brief Structure to represent secure context.
- *
- * @note Since stack grows down, pucStackStart is the highest address while
- * pucStackLimit is the first addess of the allocated memory.
+ * @brief Pre-allocated array of secure contexts.
  */
-typedef struct SecureContext
+SecureContext_t xSecureContexts[ secureconfigMAX_SECURE_CONTEXTS ];
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Get a free secure context for a task from the secure context pool (xSecureContexts).
+ *
+ * This function ensures that only one secure context is allocated for a task.
+ *
+ * @param[in] pvTaskHandle The task handle for which the secure context is allocated.
+ *
+ * @return Index of a free secure context in the xSecureContexts array.
+ */
+static uint32_t ulGetSecureContext( void * pvTaskHandle );
+
+/**
+ * @brief Return the secure context to the secure context pool (xSecureContexts).
+ *
+ * @param[in] ulSecureContextIndex Index of the context in the xSecureContexts array.
+ */
+static void vReturnSecureContext( uint32_t ulSecureContextIndex );
+
+/* These are implemented in assembly. */
+extern void SecureContext_LoadContextAsm( SecureContext_t * pxSecureContext );
+extern void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext );
+/*-----------------------------------------------------------*/
+
+static uint32_t ulGetSecureContext( void * pvTaskHandle )
 {
-    uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */
-    uint8_t * pucStackLimit;          /**< Last location of the stack memory (PSPLIM). */
-    uint8_t * pucStackStart;          /**< First location of the stack memory. */
-} SecureContext_t;
+    /* Start with invalid index. */
+    uint32_t i, ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS;
+
+    for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ )
+    {
+        if( ( xSecureContexts[ i ].pucCurrentStackPointer == NULL ) &&
+            ( xSecureContexts[ i ].pucStackLimit == NULL ) &&
+            ( xSecureContexts[ i ].pucStackStart == NULL ) &&
+            ( xSecureContexts[ i ].pvTaskHandle == NULL ) &&
+            ( ulSecureContextIndex == secureconfigMAX_SECURE_CONTEXTS ) )
+        {
+            ulSecureContextIndex = i;
+        }
+        else if( xSecureContexts[ i ].pvTaskHandle == pvTaskHandle )
+        {
+            /* A task can only have one secure context. Do not allocate a second
+             * context for the same task. */
+            ulSecureContextIndex = secureconfigMAX_SECURE_CONTEXTS;
+            break;
+        }
+    }
+
+    return ulSecureContextIndex;
+}
+/*-----------------------------------------------------------*/
+
+static void vReturnSecureContext( uint32_t ulSecureContextIndex )
+{
+    xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = NULL;
+    xSecureContexts[ ulSecureContextIndex ].pucStackLimit = NULL;
+    xSecureContexts[ ulSecureContextIndex ].pucStackStart = NULL;
+    xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = NULL;
+}
 /*-----------------------------------------------------------*/
 
 secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 {
-    uint32_t ulIPSR;
+    uint32_t ulIPSR, i;
+    static uint32_t ulSecureContextsInitialized = 0;
 
     /* Read the Interrupt Program Status Register (IPSR) value. */
     secureportREAD_IPSR( ulIPSR );
 
     /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
      * when the processor is running in the Thread Mode. */
-    if( ulIPSR != 0 )
+    if( ( ulIPSR != 0 ) && ( ulSecureContextsInitialized == 0 ) )
     {
+        /* Ensure to initialize secure contexts only once. */
+        ulSecureContextsInitialized = 1;
+
         /* No stack for thread mode until a task's context is loaded. */
         secureportSET_PSPLIM( securecontextNO_STACK );
         secureportSET_PSP( securecontextNO_STACK );
 
+        /* Initialize all secure contexts. */
+        for( i = 0; i < secureconfigMAX_SECURE_CONTEXTS; i++ )
+        {
+            xSecureContexts[ i ].pucCurrentStackPointer = NULL;
+            xSecureContexts[ i ].pucStackLimit = NULL;
+            xSecureContexts[ i ].pucStackStart = NULL;
+            xSecureContexts[ i ].pvTaskHandle = NULL;
+        }
+
         #if ( configENABLE_MPU == 1 )
             {
                 /* Configure thread mode to use PSP and to be unprivileged. */
@@ -87,7 +170,7 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
             }
         #else /* configENABLE_MPU */
             {
-                /* Configure thread mode to use PSP and to be privileged.. */
+                /* Configure thread mode to use PSP and to be privileged. */
                 secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
             }
         #endif /* configENABLE_MPU */
@@ -97,54 +180,68 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 
 #if ( configENABLE_MPU == 1 )
     secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
-                                                                                       uint32_t ulIsTaskPrivileged )
+                                                                                       uint32_t ulIsTaskPrivileged,
+                                                                                       void * pvTaskHandle )
 #else /* configENABLE_MPU */
-    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
+    secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                                                       void * pvTaskHandle )
 #endif /* configENABLE_MPU */
 {
     uint8_t * pucStackMemory = NULL;
-    uint32_t ulIPSR;
-    SecureContextHandle_t xSecureContextHandle = NULL;
+    uint8_t * pucStackLimit;
+    uint32_t ulIPSR, ulSecureContextIndex;
+    SecureContextHandle_t xSecureContextHandle = securecontextINVALID_CONTEXT_ID;
 
     #if ( configENABLE_MPU == 1 )
         uint32_t * pulCurrentStackPointer = NULL;
     #endif /* configENABLE_MPU */
 
-    /* Read the Interrupt Program Status Register (IPSR) value. */
+    /* Read the Interrupt Program Status Register (IPSR) and Process Stack Limit
+     * Register (PSPLIM) value. */
     secureportREAD_IPSR( ulIPSR );
+    secureportREAD_PSPLIM( pucStackLimit );
 
     /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
-     * when the processor is running in the Thread Mode. */
-    if( ulIPSR != 0 )
+     * when the processor is running in the Thread Mode.
+     * Also do nothing, if a secure context us already loaded. PSPLIM is set to
+     * securecontextNO_STACK when no secure context is loaded. */
+    if( ( ulIPSR != 0 ) && ( pucStackLimit == securecontextNO_STACK ) )
     {
-        /* Allocate the context structure. */
-        xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
+        /* Ontain a free secure context. */
+        ulSecureContextIndex = ulGetSecureContext( pvTaskHandle );
 
-        if( xSecureContextHandle != NULL )
+        /* Were we able to get a free context? */
+        if( ulSecureContextIndex < secureconfigMAX_SECURE_CONTEXTS )
         {
             /* Allocate the stack space. */
-            pucStackMemory = pvPortMalloc( ulSecureStackSize );
+            pucStackMemory = pvPortMalloc( ulSecureStackSize + securecontextSTACK_SEAL_SIZE );
 
             if( pucStackMemory != NULL )
             {
                 /* Since stack grows down, the starting point will be the last
                  * location. Note that this location is next to the last
-                 * allocated byte because the hardware decrements the stack
-                 * pointer before writing i.e. if stack pointer is 0x2, a push
-                 * operation will decrement the stack pointer to 0x1 and then
-                 * write at 0x1. */
-                xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
+                 * allocated byte for stack (excluding the space for seal values)
+                 * because the hardware decrements the stack pointer before
+                 * writing i.e. if stack pointer is 0x2, a push operation will
+                 * decrement the stack pointer to 0x1 and then write at 0x1. */
+                xSecureContexts[ ulSecureContextIndex ].pucStackStart = pucStackMemory + ulSecureStackSize;
+
+                /* Seal the created secure process stack. */
+                *( uint32_t * )( pucStackMemory + ulSecureStackSize ) = securecontextSTACK_SEAL_VALUE;
+                *( uint32_t * )( pucStackMemory + ulSecureStackSize + 4 ) = securecontextSTACK_SEAL_VALUE;
 
                 /* The stack cannot go beyond this location. This value is
                  * programmed in the PSPLIM register on context switch.*/
-                xSecureContextHandle->pucStackLimit = pucStackMemory;
+                xSecureContexts[ ulSecureContextIndex ].pucStackLimit = pucStackMemory;
+
+                xSecureContexts[ ulSecureContextIndex ].pvTaskHandle = pvTaskHandle;
 
                 #if ( configENABLE_MPU == 1 )
                     {
                         /* Store the correct CONTROL value for the task on the stack.
                          * This value is programmed in the CONTROL register on
                          * context switch. */
-                        pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
+                        pulCurrentStackPointer = ( uint32_t * ) xSecureContexts[ ulSecureContextIndex ].pucStackStart;
                         pulCurrentStackPointer--;
 
                         if( ulIsTaskPrivileged )
@@ -158,22 +255,18 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 
                         /* Store the current stack pointer. This value is programmed in
                          * the PSP register on context switch. */
-                        xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
+                        xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
                     }
                 #else /* configENABLE_MPU */
                     {
                         /* Current SP is set to the starting of the stack. This
                          * value programmed in the PSP register on context switch. */
-                        xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
+                        xSecureContexts[ ulSecureContextIndex ].pucCurrentStackPointer = xSecureContexts[ ulSecureContextIndex ].pucStackStart;
                     }
                 #endif /* configENABLE_MPU */
-            }
-            else
-            {
-                /* Free the context to avoid memory leak and make sure to return
-                 * NULL to indicate failure. */
-                vPortFree( xSecureContextHandle );
-                xSecureContextHandle = NULL;
+
+                /* Ensure to never return 0 as a valid context handle. */
+                xSecureContextHandle = ulSecureContextIndex + 1UL;
             }
         }
     }
@@ -182,9 +275,9 @@ secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
 }
 /*-----------------------------------------------------------*/
 
-secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle )
+secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle )
 {
-    uint32_t ulIPSR;
+    uint32_t ulIPSR, ulSecureContextIndex;
 
     /* Read the Interrupt Program Status Register (IPSR) value. */
     secureportREAD_IPSR( ulIPSR );
@@ -193,14 +286,66 @@ secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandl
      * when the processor is running in the Thread Mode. */
     if( ulIPSR != 0 )
     {
-        /* Ensure that valid parameters are passed. */
-        secureportASSERT( xSecureContextHandle != NULL );
+        /* Only free if a valid context handle is passed. */
+        if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) )
+        {
+            ulSecureContextIndex = xSecureContextHandle - 1UL;
 
-        /* Free the stack space. */
-        vPortFree( xSecureContextHandle->pucStackLimit );
+            /* Ensure that the secure context being deleted is associated with
+             * the task. */
+            if( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle )
+            {
+                /* Free the stack space. */
+                vPortFree( xSecureContexts[ ulSecureContextIndex ].pucStackLimit );
 
-        /* Free the context itself. */
-        vPortFree( xSecureContextHandle );
+                /* Return the secure context back to the free secure contexts pool. */
+                vReturnSecureContext( ulSecureContextIndex );
+            }
+        }
+    }
+}
+/*-----------------------------------------------------------*/
+
+secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle )
+{
+    uint8_t * pucStackLimit;
+    uint32_t ulSecureContextIndex;
+
+    if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) )
+    {
+        ulSecureContextIndex = xSecureContextHandle - 1UL;
+
+        secureportREAD_PSPLIM( pucStackLimit );
+
+        /* Ensure that no secure context is loaded and the task is loading it's
+         * own context. */
+        if( ( pucStackLimit == securecontextNO_STACK ) &&
+            ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) )
+        {
+            SecureContext_LoadContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) );
+        }
+    }
+}
+/*-----------------------------------------------------------*/
+
+secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle )
+{
+    uint8_t * pucStackLimit;
+    uint32_t ulSecureContextIndex;
+
+    if( ( xSecureContextHandle > 0UL ) && ( xSecureContextHandle <= secureconfigMAX_SECURE_CONTEXTS ) )
+    {
+        ulSecureContextIndex = xSecureContextHandle - 1UL;
+
+        secureportREAD_PSPLIM( pucStackLimit );
+
+        /* Ensure that task's context is loaded and the task is saving it's own
+         * context. */
+        if( ( xSecureContexts[ ulSecureContextIndex ].pucStackLimit == pucStackLimit ) &&
+            ( xSecureContexts[ ulSecureContextIndex ].pvTaskHandle == pvTaskHandle ) )
+        {
+            SecureContext_SaveContextAsm( &( xSecureContexts[ ulSecureContextIndex ] ) );
+        }
     }
 }
 /*-----------------------------------------------------------*/

portable/ARMv8M/secure/context/secure_context.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef __SECURE_CONTEXT_H__
@@ -35,15 +36,35 @@
 #include "FreeRTOSConfig.h"
 
 /**
- * @brief PSP value when no task's context is loaded.
+ * @brief PSP value when no secure context is loaded.
  */
-#define securecontextNO_STACK    0x0
+#define securecontextNO_STACK               0x0
 
 /**
- * @brief Opaque handle.
+ * @brief Invalid context ID.
  */
-struct SecureContext;
-typedef struct SecureContext * SecureContextHandle_t;
+#define securecontextINVALID_CONTEXT_ID     0UL
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Structure to represent a secure context.
+ *
+ * @note Since stack grows down, pucStackStart is the highest address while
+ * pucStackLimit is the first address of the allocated memory.
+ */
+typedef struct SecureContext
+{
+    uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */
+    uint8_t * pucStackLimit;          /**< Last location of the stack memory (PSPLIM). */
+    uint8_t * pucStackStart;          /**< First location of the stack memory. */
+    void * pvTaskHandle;              /**< Task handle of the task this context is associated with. */
+} SecureContext_t;
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Opaque handle for a secure context.
+ */
+typedef uint32_t SecureContextHandle_t;
 /*-----------------------------------------------------------*/
 
 /**
@@ -71,9 +92,11 @@ void SecureContext_Init( void );
  */
 #if ( configENABLE_MPU == 1 )
     SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
-                                                         uint32_t ulIsTaskPrivileged );
+                                                         uint32_t ulIsTaskPrivileged,
+                                                         void * pvTaskHandle );
 #else /* configENABLE_MPU */
-    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
+    SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
+                                                         void * pvTaskHandle );
 #endif /* configENABLE_MPU */
 
 /**
@@ -85,7 +108,7 @@ void SecureContext_Init( void );
  * @param[in] xSecureContextHandle Context handle corresponding to the
  * context to be freed.
  */
-void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle );
+void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle );
 
 /**
  * @brief Loads the given context.
@@ -96,7 +119,7 @@ void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle );
  * @param[in] xSecureContextHandle Context handle corresponding to the context
  * to be loaded.
  */
-void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle );
+void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle );
 
 /**
  * @brief Saves the given context.
@@ -107,6 +130,6 @@ void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle );
  * @param[in] xSecureContextHandle Context handle corresponding to the context
  * to be saved.
  */
-void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle );
+void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle, void * pvTaskHandle );
 
 #endif /* __SECURE_CONTEXT_H__ */

portable/ARMv8M/secure/heap/secure_heap.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */
@@ -37,7 +38,9 @@
 /**
  * @brief Total heap size.
  */
-#define secureconfigTOTAL_HEAP_SIZE    ( ( ( size_t ) ( 10 * 1024 ) ) )
+#ifndef secureconfigTOTAL_HEAP_SIZE
+    #define secureconfigTOTAL_HEAP_SIZE    ( ( ( size_t ) ( 10 * 1024 ) ) )
+#endif
 
 /* No test marker by default. */
 #ifndef mtCOVERAGE_TEST_MARKER
@@ -446,9 +449,3 @@ size_t xPortGetMinimumEverFreeHeapSize( void )
     return xMinimumEverFreeBytesRemaining;
 }
 /*-----------------------------------------------------------*/
-
-void vPortInitialiseBlocks( void )
-{
-    /* This just exists to keep the linker quiet. */
-}
-/*-----------------------------------------------------------*/

portable/ARMv8M/secure/heap/secure_heap.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef __SECURE_HEAP_H__
@@ -48,4 +49,18 @@ void * pvPortMalloc( size_t xWantedSize );
  */
 void vPortFree( void * pv );
 
+/**
+ * @brief Get the free heap size.
+ *
+ * @return Free heap size.
+ */
+size_t xPortGetFreeHeapSize( void );
+
+/**
+ * @brief Get the minimum ever free heap size.
+ *
+ * @return Minimum ever free heap size.
+ */
+size_t xPortGetMinimumEverFreeHeapSize( void );
+
 #endif /* __SECURE_HEAP_H__ */

portable/ARMv8M/secure/init/secure_init.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Standard includes. */

portable/ARMv8M/secure/init/secure_init.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef __SECURE_INIT_H__

portable/ARMv8M/secure/macros/secure_port_macros.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef __SECURE_PORT_MACROS_H__
@@ -67,6 +68,12 @@
 #define secureportSET_PSP( pucCurrentStackPointer ) \
     __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
 
+/**
+ * @brief Read the PSPLIM value in the given variable.
+ */
+#define secureportREAD_PSPLIM( pucOutStackLimit ) \
+    __asm volatile ( "mrs %0, psplim"  : "=r" ( pucOutStackLimit ) )
+
 /**
  * @brief Set the PSPLIM to the given value.
  */

portable/BCC/16BitDOS/Flsh186/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*

portable/BCC/16BitDOS/Flsh186/prtmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H

portable/BCC/16BitDOS/PC/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*

portable/BCC/16BitDOS/PC/prtmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H

portable/BCC/16BitDOS/common/portasm.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORT_ASM_H

portable/BCC/16BitDOS/common/portcomn.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*

portable/CCS/ARM_CM3/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in

portable/CCS/ARM_CM3/portasm.asm

@@ -1,6 +1,8 @@
 ;/*
-; * FreeRTOS Kernel V10.4.2
-; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; * FreeRTOS Kernel V10.4.5
+; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; *
+; * SPDX-License-Identifier: MIT
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
 ; * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
 ; * https://www.FreeRTOS.org
 ; * https://github.com/FreeRTOS
 ; *
-; * 1 tab == 4 spaces!
 ; */
 
 	.thumb

portable/CCS/ARM_CM3/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
@@ -92,7 +93,7 @@
 
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired != pdFALSE ) portYIELD(); } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 
 /*-----------------------------------------------------------*/

portable/CCS/ARM_CM4F/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in

portable/CCS/ARM_CM4F/portasm.asm

@@ -1,6 +1,8 @@
 ;/*
-; * FreeRTOS Kernel V10.4.2
-; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; * FreeRTOS Kernel V10.4.5
+; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; *
+; * SPDX-License-Identifier: MIT
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
 ; * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
 ; * https://www.FreeRTOS.org
 ; * https://github.com/FreeRTOS
 ; *
-; * 1 tab == 4 spaces!
 ; */
 
 	.thumb

portable/CCS/ARM_CM4F/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 
@@ -86,7 +87,7 @@
 
     #define portNVIC_INT_CTRL_REG     ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
     #define portNVIC_PENDSVSET_BIT    ( 1UL << 28UL )
-    #define portEND_SWITCHING_ISR( xSwitchRequired )    if( xSwitchRequired != pdFALSE ) portYIELD()
+    #define portEND_SWITCHING_ISR( xSwitchRequired )    do { if( xSwitchRequired != pdFALSE ) portYIELD(); } while( 0 )
     #define portYIELD_FROM_ISR( x )                     portEND_SWITCHING_ISR( x )
 
 /*-----------------------------------------------------------*/

portable/CCS/ARM_Cortex-R4/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* FreeRTOS includes. */

portable/CCS/ARM_Cortex-R4/portASM.asm

@@ -1,6 +1,8 @@
 ;/*
-; * FreeRTOS Kernel V10.4.2
-; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; * FreeRTOS Kernel V10.4.5
+; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; *
+; * SPDX-License-Identifier: MIT
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
 ; * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
 ; * https://www.FreeRTOS.org
 ; * https://github.com/FreeRTOS
 ; *
-; * 1 tab == 4 spaces!
 ; */
 
         .text

portable/CCS/ARM_Cortex-R4/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef __PORTMACRO_H__
@@ -84,7 +85,7 @@ extern void vPortYield( void );
 #define portSYS_SSIR1_REG			( * ( ( volatile uint32_t * ) 0xFFFFFFB0 ) )
 #define portSYS_SSIR1_SSKEY			( 0x7500UL )
 #define portYIELD_WITHIN_API()		{ portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY;  asm( " DSB " ); asm( " ISB " ); }
-#define portYIELD_FROM_ISR( x )		if( x != pdFALSE ){ portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY;  ( void ) portSYS_SSIR1_REG; }
+#define portYIELD_FROM_ISR( x )		do { if( x != pdFALSE ) { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY;  ( void ) portSYS_SSIR1_REG; } } while( 0 )
 
 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
 	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1

portable/CCS/MSP430X/data_model.h

@@ -1,6 +1,8 @@
 ;/*
-; * FreeRTOS Kernel V10.4.2
-; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; * FreeRTOS Kernel V10.4.5
+; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; *
+; * SPDX-License-Identifier: MIT
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
 ; * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
 ; * https://www.FreeRTOS.org
 ; * https://github.com/FreeRTOS
 ; *
-; * 1 tab == 4 spaces!
 ; */
 
 	.if $DEFINED( __LARGE_DATA_MODEL__ )

portable/CCS/MSP430X/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Scheduler includes. */

portable/CCS/MSP430X/portext.asm

@@ -1,6 +1,8 @@
 ;/*
-; * FreeRTOS Kernel V10.4.2
-; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; * FreeRTOS Kernel V10.4.5
+; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+; *
+; * SPDX-License-Identifier: MIT
 ; *
 ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
 ; * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
 ; * https://www.FreeRTOS.org
 ; * https://github.com/FreeRTOS
 ; *
-; * 1 tab == 4 spaces!
 ; */
 
 ; * The definition of the "register test" tasks, as described at the top of

portable/CCS/MSP430X/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -131,7 +132,7 @@ extern void vPortYield( void );
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
 
 extern void vTaskSwitchContext( void );
-#define portYIELD_FROM_ISR( x ) if( x ) vPortYield()
+#define portYIELD_FROM_ISR( x ) do { if( x ) vPortYield(); } while( 0 )
 
 void vApplicationSetupTimerInterrupt( void );
 

portable/CodeWarrior/ColdFire_V1/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Kernel includes. */

portable/CodeWarrior/ColdFire_V1/portasm.S

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*

portable/CodeWarrior/ColdFire_V1/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -101,10 +102,7 @@ extern void vPortClearInterruptMaskFromISR( UBaseType_t );
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
 /*-----------------------------------------------------------*/
 
-#define portEND_SWITCHING_ISR( xSwitchRequired )	if( xSwitchRequired != pdFALSE )	\
-													{									\
-														portYIELD();					\
-													}
+#define portEND_SWITCHING_ISR( xSwitchRequired )	do { if( xSwitchRequired != pdFALSE ) { portYIELD(); } } while( 0 )
 
 
 #ifdef __cplusplus

portable/CodeWarrior/ColdFire_V2/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Kernel includes. */

portable/CodeWarrior/ColdFire_V2/portasm.S

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /*

portable/CodeWarrior/ColdFire_V2/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 #ifndef PORTMACRO_H
@@ -100,10 +101,7 @@ extern void vPortClearInterruptMaskFromISR( UBaseType_t );
 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
 /*-----------------------------------------------------------*/
 
-#define portEND_SWITCHING_ISR( xSwitchRequired )	if( xSwitchRequired != pdFALSE )	\
-													{									\
-														portYIELD();					\
-													}
+#define portEND_SWITCHING_ISR( xSwitchRequired )	do { if( xSwitchRequired != pdFALSE ) { portYIELD(); } } while( 0 )
 
 
 #ifdef __cplusplus

portable/CodeWarrior/HCS12/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 /* Scheduler includes. */

portable/CodeWarrior/HCS12/portmacro.h

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */
 
 

portable/Common/mpu_wrappers.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -85,34 +87,6 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged )
 }
 /*-----------------------------------------------------------*/
 
-#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-    BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
-                                          TaskHandle_t * pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */
-    {
-        BaseType_t xReturn;
-        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-        xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask );
-        vPortResetPrivilege( xRunningPrivileged );
-        return xReturn;
-    }
-#endif /* conifgSUPPORT_DYNAMIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-#if ( configSUPPORT_STATIC_ALLOCATION == 1 )
-    BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
-                                                TaskHandle_t * pxCreatedTask ) /* FREERTOS_SYSTEM_CALL */
-    {
-        BaseType_t xReturn;
-        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-        xReturn = xTaskCreateRestrictedStatic( pxTaskDefinition, pxCreatedTask );
-        vPortResetPrivilege( xRunningPrivileged );
-        return xReturn;
-    }
-#endif /* conifgSUPPORT_DYNAMIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
 #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
     BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode,
                                 const char * const pcName,
@@ -150,16 +124,6 @@ void vPortResetPrivilege( BaseType_t xRunningPrivileged )
 #endif /* configSUPPORT_STATIC_ALLOCATION */
 /*-----------------------------------------------------------*/
 
-void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask,
-                                  const MemoryRegion_t * const xRegions ) /* FREERTOS_SYSTEM_CALL */
-{
-    BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-    vTaskAllocateMPURegions( xTask, xRegions );
-    vPortResetPrivilege( xRunningPrivileged );
-}
-/*-----------------------------------------------------------*/
-
 #if ( INCLUDE_vTaskDelete == 1 )
     void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) /* FREERTOS_SYSTEM_CALL */
     {
@@ -385,9 +349,22 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */
 /*-----------------------------------------------------------*/
 
 #if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
-    uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) /* FREERTOS_SYSTEM_CALL */
+    configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) /* FREERTOS_SYSTEM_CALL */
     {
-        uint32_t xReturn;
+        configRUN_TIME_COUNTER_TYPE xReturn;
+        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
+
+        xReturn = ulTaskGetIdleRunTimePercent();
+        vPortResetPrivilege( xRunningPrivileged );
+        return xReturn;
+    }
+#endif
+/*-----------------------------------------------------------*/
+
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
+    configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) /* FREERTOS_SYSTEM_CALL */
+    {
+        configRUN_TIME_COUNTER_TYPE xReturn;
         BaseType_t xRunningPrivileged = xPortRaisePrivilege();
 
         xReturn = ulTaskGetIdleRunTimeCounter();
@@ -466,7 +443,7 @@ char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) /* FREERTOS_SYSTEM_CALL */
 #if ( configUSE_TRACE_FACILITY == 1 )
     UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * pxTaskStatusArray,
                                           UBaseType_t uxArraySize,
-                                          uint32_t * pulTotalRunTime ) /* FREERTOS_SYSTEM_CALL */
+                                          configRUN_TIME_COUNTER_TYPE * pulTotalRunTime ) /* FREERTOS_SYSTEM_CALL */
     {
         UBaseType_t uxReturn;
         BaseType_t xRunningPrivileged = xPortRaisePrivilege();
@@ -959,33 +936,6 @@ void MPU_vQueueDelete( QueueHandle_t xQueue ) /* FREERTOS_SYSTEM_CALL */
 }
 /*-----------------------------------------------------------*/
 
-#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-    void MPU_vPortInitialiseBlocks( void ) /* FREERTOS_SYSTEM_CALL */
-    {
-        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-        vPortInitialiseBlocks();
-
-        vPortResetPrivilege( xRunningPrivileged );
-    }
-#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
-#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
-    size_t MPU_xPortGetFreeHeapSize( void ) /* FREERTOS_SYSTEM_CALL */
-    {
-        size_t xReturn;
-        BaseType_t xRunningPrivileged = xPortRaisePrivilege();
-
-        xReturn = xPortGetFreeHeapSize();
-
-        vPortResetPrivilege( xRunningPrivileged );
-
-        return xReturn;
-    }
-#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
-/*-----------------------------------------------------------*/
-
 #if ( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) )
     TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
                                     const TickType_t xTimerPeriodInTicks,

portable/GCC/ARM7_AT91FR40008/port.c

@@ -1,6 +1,8 @@
 /*
- * FreeRTOS Kernel V10.4.2
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.4.5
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -22,7 +24,6 @@
  * https://www.FreeRTOS.org
  * https://github.com/FreeRTOS
  *
- * 1 tab == 4 spaces!
  */