[AUTO][RELEASE]: Update SBOM

* Update History.txt for v11.0.0

.git-blame-ignore-revs

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+# Normalize line endings and whitespace
+ddd1e30018e74ad293cda0635018d636a6657f57
+
+# Convert tabs to spaces (4)
+8c77117c32e49a5070cd85e8920c36723997e465
+
+# Apply uncrustify rules
+587a83d647619bb0a508661c7bb4d6df89851582
+2c530ba5c352fdf420d1b13709a3970f04e9e6c6
+718178c68a1c863dd1a2eac7aea326a789d3bc52
+a5dbc2b1de17e5468420d5a928d7392d799780e2

.gitattributes

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.github/CODEOWNERS

@@ -0,0 +1,37 @@
+# Each line is a file pattern followed by one or more owners.
+
+# These owners will be the default owners for everything in
+# the repo. Unless a later match takes precedence,
+# @global-owner1 and @global-owner2 will be requested for
+# review when someone opens a pull request.
+*      @FreeRTOS/pr-bar-raiser
+
+# Order is important; the last matching pattern takes the most
+# precedence. When someone opens a pull request that only
+# modifies JS files, only @js-owner and not the global
+# owner(s) will be requested for a review.
+# *.c FreeRTOS/pr-bar-raiser
+
+# You can also use email addresses if you prefer. They'll be
+# used to look up users just like we do for commit author
+# emails.
+# *.go docs@example.com
+
+# In this example, @doctocat owns any files in the build/logs
+# directory at the root of the repository and any of its
+# subdirectories.
+# /build/logs/ @doctocat
+
+# The `docs/*` pattern will match files like
+# `docs/getting-started.md` but not further nested files like
+# `docs/build-app/troubleshooting.md`.
+# docs/*  docs@example.com
+
+# In this example, @octocat owns any file in an apps directory
+# anywhere in your repository.
+# apps/ @octocat
+
+# In this example, @doctocat owns any file in the `/docs`
+# directory in the root of your repository and any of its
+# subdirectories.
+# /docs/ @doctocat

.github/CONTRIBUTING.md

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+# Contribution guidelines
+
+Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or
+documentation, we welcome our community to be involved in this project.
+
+Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible.
+
+## Code of conduct
+This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct).
+For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact
+opensource-codeofconduct@amazon.com with any additional questions or comments.
+
+
+## Security issue notifications
+If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue.
+
+
+## Submitting a bugs/feature request
+Have a bug to report or feature to request? Follow these steps:
+1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed.
+2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below.
+3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features.
+
+When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include:
+
+* A clear description of the situation - what you observe, what you expect, and your view on how the two differ.
+* A reproducible test case or sequence of steps.
+* The version of our code being used.
+* Any modifications you've made relevant to the bug.
+* Details of your environment or deployment. Highlight anything unusual.
+
+
+## Contributing via pull request
+Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that:
+
+1. You are working against the latest source on the *main* branch.
+2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already.
+3. You open an issue to discuss any significant work - we would hate for your time to be wasted.
+
+To send us a pull request, please:
+
+1. Fork the repository.
+2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change.
+3. Follow the [coding style guide](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
+4. Commit to your fork using clear commit messages.
+5. Send us a pull request, answering any default questions in the pull request interface.
+   NOTE: Please make sure the default option (Allow edits from maintainers) is left checked.
+6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation.
+
+GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and
+[creating a pull request](https://help.github.com/articles/creating-a-pull-request/).
+
+## Coding style
+* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
+
+
+## Getting your pull request merged
+All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications. For more information on the pull request process, please see the documentation [here](pull_request_process.md).
+
+
+## Finding contributions to work on
+Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start.
+
+
+## Licensing
+The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/License/license.txt)
+
+Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable.
+
+We may ask you to sign a [Contributor License Agreement (CLA)](https://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes.

.github/ISSUE_TEMPLATE/bug-report.md

@@ -0,0 +1,40 @@
+---
+name: Bug report
+about: Create a report to help us improve FreeRTOS. This should only be used for confirmed
+  bugs. If you suspect something it is best to first discuss it on the FreeRTOS community
+  support forums linked below.
+title: "[BUG]"
+labels: bug
+assignees: ''
+
+---
+
+**Describe the bug**
+A concise description of what the bug is.
+
+**Target**
+- Development board: [e.g. HiFive11 RevB]
+- Instruction Set Architecture: [e.g. RV32IMAC]
+- IDE and version: [e.g. Freedom Studio 4.12.0.2019-08-2]
+- Toolchain and version: [e.g. riscv64-unknown-elf-gcc-8.3.0-2019.08.0]
+
+**Host**
+- Host OS: [e.g. MacOS]
+- Version: [e.g. Mojave 10.14.6]
+
+**To Reproduce**
+- Use project ... and configure with ...
+- Run on ... and could observe ...
+
+**Expected behavior**
+A concise description of what you expected to happen.
+
+**Screenshots**
+If applicable, add screenshots to help explain your problem.
+
+**Additional context**
+Add any other context about the problem here.
+e.g. code snippet to reproduce the issue.
+e.g. stack trace, memory dump, debugger log, and many etc.
+
+<!-- For general inquiries, please post in [FreeRTOS forum](https://forums.FreeRTOS.org) for community support. -->

.github/ISSUE_TEMPLATE/config.yml

@@ -0,0 +1,5 @@
+blank_issues_enabled: false
+contact_links:
+  - name: FreeRTOS Community Support Forum
+    url: https://forums.freertos.org/
+    about: Please ask and answer questions about FreeRTOS here.

.github/ISSUE_TEMPLATE/documentation-issue.md

@@ -0,0 +1,23 @@
+---
+name: Documentation issue
+about: Create a report to help us improve our documentation.
+title: "[DOC]"
+labels: documentation
+assignees: ''
+
+---
+
+**Describe the issue**
+Please describe the issue and expected clarification in concise language.
+
+**Reference**
+Please attach the URL at which you are experiencing the issue.
+
+**Screenshot**
+If applicable, please attach screenshot.
+
+**Browser**
+- Browser: [e.g. Chrome]
+- Version: [e.g. 80.0.3987.132]
+
+<!-- For general inquiries, please post in [FreeRTOS forum](https://forums.FreeRTOS.org) for community support. -->

.github/ISSUE_TEMPLATE/feature_request.md

@@ -0,0 +1,30 @@
+---
+name: Feature request
+about: Suggest a new feature for this project
+title: "[Feature Request] <replace with your title>"
+labels: enhancement
+assignees: ''
+
+---
+
+**Is your feature request related to a problem? Please describe.**
+A clear and concise description of what the problem is. Ex. I'm always frustrated when [...]
+
+**Describe the solution you'd like**
+A clear and concise description of what you want to happen.
+
+**Describe alternatives you've considered**
+A clear and concise description of any alternative solutions or features you've considered.
+
+**How many devices will this feature impact?**
+Expected volume for your product.
+
+**What are your project timelines?**
+Timeline for milestones such as design completion, testing and validation, and production.
+
+**Additional context**
+Add any other context or screenshots about the feature request here.
+
+
+If you have the same (or similar) feature request, please upvote this issue with thumbs up 👍
+and use the comments section to provide answers to the questions above.

.github/SECURITY.md

@@ -0,0 +1,5 @@
+## Reporting a Vulnerability
+
+If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security 
+via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/) or directly via email to aws-security@amazon.com. 
+Please do **not** create a public github issue.

.github/pull_request_process.md

@@ -0,0 +1,115 @@
+# Pull Request Process
+
+This document explains the stages that a Pull Request (PR) goes through when a pull request is submitted to a git repository in the FreeRTOS organization in Github. Before you start a PR, please read and familiarize yourself with [CONTRIBUTING.md](CONTRIBUTING.md)
+
+## ****Terminologies****
+
+**FreeRTOS Partner Contributors**: These are selected developers and experts from community. 
+
+**FreeRTOS Team**: The FreeRTOS team consists of “AWS employees”. 
+
+**CODEOWNERS**: For all the FreeRTOS repositories, “FreeRTOS Team” and/or “FreeRTOS Partner contributors” will be CODEOWNER.
+
+**Contributor**: The Contributor is the person who submitted the pull request.
+
+**Assignee**: The Assignee is an AWS Employee who is responsible for identifying reviewers  and managing the PR. They track the progress of pull requests and ensure that they are reviewed and merged in a timely manner. 
+
+**Reviewer**: Reviewers are responsible for reviewing pull requests and providing feedback to the contributor. Two approving reviews, one of which must be from the CODEOWNER of the reposiroty, are required for a PR to be merged. 
+
+
+## ****Pull Request Life-Cycle****
+
+Once a pull request (PR) is submitted, it goes through the following stages:
+
+1. Open
+    1. The PR is created.
+    2. All the GitHub Actions pass and the PR is ready to be reviewed. 
+2. Triage
+    1. The PR is assigned to an assignee.
+    2. The assignee assigns a reviewer from the FreeRTOS Team to the PR.
+3. Review
+    1. The reviewer provides feedback and discusses open questions with the contributor, if needed.
+    2. If the contributor and the reviewer conclude, after discussion, that the PR will not be merged, then the PR is closed.
+    3. The PR contributor addresses the feedback and makes changes to the PR, if needed.
+    4. The reviewer approves the PR and assigns a second reviewer.
+4. Second Review
+    1. The second reviewer reviews the PR and provides feedback, if needed.
+    2. The PR contributor addresses the feedback and makes changes to the PR, if needed.
+    3. The second reviewer approves the PR.
+5. Testing
+    1. One of the reviewers tests the PR to ensure that it works correctly.
+6. Ready to Merge  
+   A PR becomes Ready to Merge when all the branch protection rules are satisfied. We have branch protection rules which require the following:
+    1. At least 2 reviews. 
+    2. One review from the CODEOWNER of the given repository. 
+    3. All PR checks must pass.
+7. Merge
+    1. The PR is merged.
+
+</br>
+
+The status of a PR is indicated through GitHub labels added by Reviewers/Assignees. The following are the most common status indicators: Triaged, Reviewer Assigned, Concept ACK/NACK, First Code Review In Progress, First Code Review Complete, Second Code Review In Progress, Second Code Review Complete, Testing In Progress and Testing Complete.
+
+Please note that we may decide to skip some stages depending on the type of PR. For example, a PR with a simple doc update will likely not go through all the above stages, however every PR is required to get approvals from 2 reviewers.
+
+The pictorial representation of our PR process is shown below.
+
+![PR Process](media/pr_process.png)
+
+
+</br>
+
+## **Turnaround Times**
+
+The length of time required to review a PR is unpredictable and varies from PR to PR since it depends on the complexity of the changes, availability of reviewers, and overall workload of the team. We generally attempt to resolve each PR in accordance with the timeframes below, excluding weekends and public holidays:
+
+* Triage: < 24 hours
+* Concept ACK/NACK: 1-2 weeks
+* Code Review: 1-2 weeks
+* Testing: 1-2 weeks
+
+
+## **Addressing the changes requested by reviewers**
+
+The author should address any review comments in 4 weeks or less. If the author is unable to address the comments in that time, we will do one of the following:
+
+* Make the required changes ourselves and merge the pull request.
+* Close the pull request.
+
+</br>
+
+### **Best Practices for Faster Reviews**
+
+Here are some best practices to follow so that your PR gets reviewed quickly. 
+
+1. If you plan to contribute a new feature to FreeRTOS, please get confirmation beforehand that the FreeRTOS team and community want, and will accept, this feature. This is true especially when you plan to make large or significant changes.  To get confirmation and feedback from FreeRTOS Team and  community, create a post in the FreeRTOS forums. 
+2. Smaller is better. Small, focused PR’s are reviewed more quickly and thoroughly, are simpler to rollback, and involve less wasted effort if rejected.  Avoid opening pull requests that span the whole repository.
+3. Don’t mix refactoring, bug fixes and feature development into a single PR. Lets say you are developing feature-x  and you come across poorly named variables or incomplete/incorrect comments. You should consider fixing those, but in a separate PR, not in the same PR as feature-x. 
+4. Comments matter. The code you develop will need to be maintained for a long time. Well placed comments provide context to your reviewers, maintainers and users, and also prevent them from misunderstanding the purpose of the code.  However, DO NOT add comments to explain things which are obvious by just glancing at the code. [Good Read: https://stackoverflow.blog/2021/12/23/best-practices-for-writing-code-comments/]
+5. Test your PR. In your PR, please accompany your changes with suitable unit tests and any other tests that will be helpful, and include descriptions of how to perform any manual tests. Instructions for unit tests can be found at [freertos.org](https://freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html#Testing) and [Github](https://github.com/FreeRTOS/FreeRTOS/blob/main/FreeRTOS/Test/CMock/Readme.md)
+
+
+**Push Back its ok:**
+Sometimes reviewers make mistakes. If a reviewer has requested you to make changes and you feel strongly about doing it a certain way, you are free to debate the merits of the requested change with the reviewer, while still following the code of conduct. You might be overruled, but you might also prevail. 
+
+**Be Pragmatic**
+Put a bit of thought into how your PR can be made easier to review and merge. No document can replace common sense and good taste. The best practices shared here and the contribution guidelines, if followed, will help you get your code reviewed and merged with less friction. 
+
+</br>
+
+### **Why is  my PR closed?** 
+
+Pull requests older than 120 days or not in-line with scope of the project will be closed. Exceptions can be made for pull requests that have active review comments, or that are awaiting other dependent pull requests. Closed pull requests are easy to recreate, and little work is lost by closing a pull request that is subsequently reopened. We want to limit the total number of pull requests in flight to:
+
+* Maintain a clean project
+* Remove old pull requests that would be difficult to rebase since the underlying code has changed over time
+* Encourage code velocity
+
+### **Why is my PR not getting reviewed/merged?**
+
+* It may be because of a feature freeze due to an upcoming release. During this time, only bug fixes are taken into consideration. If your pull request is a new feature, it will not be prioritised until after the release. Wait for the release.
+* It could be related to best practices (see contributing.md) not being followed. One common issue is that the pull request is too big to review. Let’s say you’ve touched 21 files and have 9347 insertions. When your would-be reviewers pull up the diffs, they run away - this pull request is going to take a few hours to review and they don’t have a few hours right now. They’ll get to it later, just as soon as they have more free time (ha!).
+* If you think the above two situations are not the reason, and you are not getting some pull request love,  please drop a couple of reminders on the PR comments. If everything else fails, please create a post on FreeRTOS forums with link to PR. 
+
+
+

.github/pull_request_template.md

@@ -0,0 +1,23 @@
+<!--- Title -->
+
+Description
+-----------
+<!--- Describe your changes in detail. -->
+
+Test Steps
+-----------
+<!-- Describe the steps to reproduce. -->
+
+Checklist:
+----------
+<!--- Go over all the following points, and put an `x` in all the boxes that apply. -->
+<!--- If you're unsure about any of these, don't hesitate to ask. We're here to help! -->
+- [ ] I have tested my changes. No regression in existing tests.
+- [ ] I have modified and/or added unit-tests to cover the code changes in this Pull Request.
+
+Related Issue
+-----------
+<!-- If any, please provide issue ID. -->
+
+
+By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

.github/scripts/find_replace.sh

@@ -0,0 +1,6 @@
+#!/bin/bash
+old_text=$1
+new_text=$2
+echo "Old text: ${old_text}"
+echo "New text: ${new_text}"
+grep -rl "${old_text}" . | xargs gsed -i -e '1h;2,$H;$!d;g' -e "s/${old_text}/${new_text}/g"

.github/scripts/kernel_checker.py

@@ -0,0 +1,159 @@
+#!/usr/bin/env python3
+#/*
+# * FreeRTOS Kernel V11.0.0
+# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+# *
+# * SPDX-License-Identifier: MIT
+# *
+# * Permission is hereby granted, free of charge, to any person obtaining a copy of
+# * this software and associated documentation files (the "Software"), to deal in
+# * the Software without restriction, including without limitation the rights to
+# * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+# * the Software, and to permit persons to whom the Software is furnished to do so,
+# * subject to the following conditions:
+# *
+# * The above copyright notice and this permission notice shall be included in all
+# * copies or substantial portions of the Software.
+# *
+# * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+# * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+# * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+# *
+# * https://www.FreeRTOS.org
+# * https://github.com/FreeRTOS
+# *
+# */
+
+import os
+from common.header_checker import HeaderChecker
+
+#--------------------------------------------------------------------------------------------------
+#                                            CONFIG
+#--------------------------------------------------------------------------------------------------
+KERNEL_IGNORED_FILES = [
+    'FreeRTOS-openocd.c',
+    'Makefile',
+    '.DS_Store',
+    'cspell.config.yaml'
+]
+
+KERNEL_IGNORED_EXTENSIONS = [
+    '.yml',
+    '.css',
+    '.idx',
+    '.md',
+    '.url',
+    '.sty',
+    '.0-rc2',
+    '.s82',
+    '.js',
+    '.out',
+    '.pack',
+    '.2',
+    '.1-kernel-only',
+    '.0-kernel-only',
+    '.0-rc1',
+    '.readme',
+    '.tex',
+    '.png',
+    '.bat',
+    '.sh',
+    '.txt',
+    '.cmake',
+    '.config'
+]
+
+KERNEL_ASM_EXTENSIONS = [
+    '.s',
+    '.S',
+    '.src',
+    '.inc',
+    '.s26',
+    '.s43',
+    '.s79',
+    '.s85',
+    '.s87',
+    '.s90',
+    '.asm',
+    '.h'
+]
+
+KERNEL_PY_EXTENSIONS = [
+    '.py'
+]
+
+KERNEL_IGNORED_PATTERNS = [
+    r'.*\.git.*',
+    r'.*portable/IAR/AtmelSAM7S64/.*AT91SAM7.*',
+    r'.*portable/GCC/ARM7_AT91SAM7S/.*',
+    r'.*portable/MPLAB/PIC18F/stdio.h',
+    r'.*portable/ThirdParty/xClang/XCOREAI/*',
+    r'.*IAR/ARM_C*',
+    r'.*IAR/78K0R/*',
+    r'.*CCS/MSP430X/*',
+    r'.*portable/template/*',
+    r'.*template_configuration/*'
+]
+
+KERNEL_THIRD_PARTY_PATTERNS = [
+    r'.*portable/ThirdParty/GCC/Posix/port*',
+    r'.*portable/ThirdParty/*',
+    r'.*portable/IAR/AVR32_UC3/.*',
+    r'.*portable/GCC/AVR32_UC3/.*',
+]
+
+KERNEL_HEADER = [
+    '/*\n',
+    ' * FreeRTOS Kernel V11.0.0\n',
+    ' * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n',
+    ' *\n',
+    ' * SPDX-License-Identifier: MIT\n',
+    ' *\n',
+    ' * Permission is hereby granted, free of charge, to any person obtaining a copy of\n',
+    ' * this software and associated documentation files (the "Software"), to deal in\n',
+    ' * the Software without restriction, including without limitation the rights to\n',
+    ' * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n',
+    ' * the Software, and to permit persons to whom the Software is furnished to do so,\n',
+    ' * subject to the following conditions:\n',
+    ' *\n',
+    ' * The above copyright notice and this permission notice shall be included in all\n',
+    ' * copies or substantial portions of the Software.\n',
+    ' *\n',
+    ' * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n',
+    ' * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n',
+    ' * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n',
+    ' * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n',
+    ' * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n',
+    ' * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n',
+    ' *\n',
+    ' * https://www.FreeRTOS.org\n',
+    ' * https://github.com/FreeRTOS\n',
+    ' *\n',
+    ' */\n',
+]
+
+def main():
+    parser = HeaderChecker.configArgParser()
+    args   = parser.parse_args()
+
+    # Configure the checks then run
+    checker = HeaderChecker(KERNEL_HEADER,
+                            ignored_files=KERNEL_IGNORED_FILES,
+                            ignored_ext=KERNEL_IGNORED_EXTENSIONS,
+                            ignored_patterns=KERNEL_IGNORED_PATTERNS,
+                            third_party_patterns=KERNEL_THIRD_PARTY_PATTERNS,
+                            py_ext=KERNEL_PY_EXTENSIONS,
+                            asm_ext=KERNEL_ASM_EXTENSIONS)
+    checker.ignoreFile(os.path.split(__file__)[-1])
+
+    rc = checker.processArgs(args)
+    if rc:
+        checker.showHelp(__file__)
+
+    return rc
+
+if __name__ == '__main__':
+    exit(main())

.github/scripts/manifest_updater.py

@@ -0,0 +1,32 @@
+#!/usr/bin/env python3
+import os
+import argparse
+
+THIS_FILE_PATH = os.path.dirname(os.path.abspath(__file__))
+MANIFEST_FILE = os.path.join(THIS_FILE_PATH, '..', '..', 'manifest.yml')
+
+def update_manifest_file(new_version_number):
+    updated_lines = []
+    with open(MANIFEST_FILE, 'r') as f:
+        for line in f:
+            line = line.strip()
+            if line.startswith('version'):
+                updated_lines.append(f'version: "v{new_version_number}"\n')
+            else:
+                updated_lines.append(f'{line}\n')
+
+    with open(MANIFEST_FILE, 'w') as f:
+        f.writelines(updated_lines)
+
+def parse_args():
+    parser = argparse.ArgumentParser()
+    parser.add_argument('-v', '--version', required=True, help='New version number.')
+    args = parser.parse_args()
+    return args
+
+def main():
+    args = parse_args()
+    update_manifest_file(args.version)
+
+if __name__ == '__main__':
+    main()

.github/uncrustify.cfg

@@ -0,0 +1,673 @@
+# Uncrustify-0.69.0
+
+newlines                        = auto     # lf/crlf/cr/auto
+input_tab_size                  = 4        # unsigned number
+output_tab_size                 = 4        # unsigned number
+string_escape_char              = 92       # unsigned number
+string_escape_char2             = 0        # unsigned number
+string_replace_tab_chars        = false    # true/false
+tok_split_gte                   = false    # true/false
+disable_processing_cmt          = " *INDENT-OFF*"      # string
+enable_processing_cmt           = " *INDENT-ON*"     # string
+enable_digraphs                 = false    # true/false
+utf8_bom                        = ignore   # ignore/add/remove/force
+utf8_byte                       = false    # true/false
+utf8_force                      = false    # true/false
+sp_arith                        = force    # ignore/add/remove/force
+sp_arith_additive               = ignore   # ignore/add/remove/force
+sp_assign                       = force    # ignore/add/remove/force
+sp_cpp_lambda_assign            = ignore   # ignore/add/remove/force
+sp_cpp_lambda_paren             = ignore   # ignore/add/remove/force
+sp_assign_default               = force    # ignore/add/remove/force
+sp_before_assign                = force    # ignore/add/remove/force
+sp_after_assign                 = force    # ignore/add/remove/force
+sp_enum_paren                   = ignore   # ignore/add/remove/force
+sp_enum_assign                  = force    # ignore/add/remove/force
+sp_enum_before_assign           = force    # ignore/add/remove/force
+sp_enum_after_assign            = force    # ignore/add/remove/force
+sp_enum_colon                   = ignore   # ignore/add/remove/force
+sp_pp_concat                    = add      # ignore/add/remove/force
+sp_pp_stringify                 = add      # ignore/add/remove/force
+sp_before_pp_stringify          = ignore   # ignore/add/remove/force
+sp_bool                         = force    # ignore/add/remove/force
+sp_compare                      = force    # ignore/add/remove/force
+sp_inside_paren                 = force    # ignore/add/remove/force
+sp_paren_paren                  = force    # ignore/add/remove/force
+sp_cparen_oparen                = ignore   # ignore/add/remove/force
+sp_balance_nested_parens        = false    # true/false
+sp_paren_brace                  = force    # ignore/add/remove/force
+sp_brace_brace                  = ignore   # ignore/add/remove/force
+sp_before_ptr_star              = force    # ignore/add/remove/force
+sp_before_unnamed_ptr_star      = force    # ignore/add/remove/force
+sp_between_ptr_star             = remove   # ignore/add/remove/force
+sp_after_ptr_star               = force    # ignore/add/remove/force
+sp_after_ptr_block_caret        = ignore   # ignore/add/remove/force
+sp_after_ptr_star_qualifier     = ignore   # ignore/add/remove/force
+sp_after_ptr_star_func          = ignore   # ignore/add/remove/force
+sp_ptr_star_paren               = ignore   # ignore/add/remove/force
+sp_before_ptr_star_func         = ignore   # ignore/add/remove/force
+sp_before_byref                 = force    # ignore/add/remove/force
+sp_before_unnamed_byref         = ignore   # ignore/add/remove/force
+sp_after_byref                  = remove   # ignore/add/remove/force
+sp_after_byref_func             = remove   # ignore/add/remove/force
+sp_before_byref_func            = ignore   # ignore/add/remove/force
+sp_after_type                   = force    # ignore/add/remove/force
+sp_after_decltype               = ignore   # ignore/add/remove/force
+sp_before_template_paren        = ignore   # ignore/add/remove/force
+sp_template_angle               = ignore   # ignore/add/remove/force
+sp_before_angle                 = remove   # ignore/add/remove/force
+sp_inside_angle                 = remove   # ignore/add/remove/force
+sp_inside_angle_empty           = ignore   # ignore/add/remove/force
+sp_angle_colon                  = ignore   # ignore/add/remove/force
+sp_after_angle                  = force    # ignore/add/remove/force
+sp_angle_paren                  = ignore   # ignore/add/remove/force
+sp_angle_paren_empty            = ignore   # ignore/add/remove/force
+sp_angle_word                   = ignore   # ignore/add/remove/force
+sp_angle_shift                  = add      # ignore/add/remove/force
+sp_permit_cpp11_shift           = false    # true/false
+sp_before_sparen                = remove   # ignore/add/remove/force
+sp_inside_sparen                = force    # ignore/add/remove/force
+sp_inside_sparen_open           = ignore   # ignore/add/remove/force
+sp_inside_sparen_close          = ignore   # ignore/add/remove/force
+sp_after_sparen                 = force    # ignore/add/remove/force
+sp_sparen_brace                 = force    # ignore/add/remove/force
+sp_invariant_paren              = ignore   # ignore/add/remove/force
+sp_after_invariant_paren        = ignore   # ignore/add/remove/force
+sp_special_semi                 = ignore   # ignore/add/remove/force
+sp_before_semi                  = remove   # ignore/add/remove/force
+sp_before_semi_for              = remove   # ignore/add/remove/force
+sp_before_semi_for_empty        = add      # ignore/add/remove/force
+sp_after_semi                   = add      # ignore/add/remove/force
+sp_after_semi_for               = force    # ignore/add/remove/force
+sp_after_semi_for_empty         = force    # ignore/add/remove/force
+sp_before_square                = remove   # ignore/add/remove/force
+sp_before_squares               = remove   # ignore/add/remove/force
+sp_cpp_before_struct_binding    = ignore   # ignore/add/remove/force
+sp_inside_square                = force    # ignore/add/remove/force
+sp_inside_square_oc_array       = ignore   # ignore/add/remove/force
+sp_after_comma                  = force    # ignore/add/remove/force
+sp_before_comma                 = remove   # ignore/add/remove/force
+sp_after_mdatype_commas         = ignore   # ignore/add/remove/force
+sp_before_mdatype_commas        = ignore   # ignore/add/remove/force
+sp_between_mdatype_commas       = ignore   # ignore/add/remove/force
+sp_paren_comma                  = force    # ignore/add/remove/force
+sp_before_ellipsis              = ignore   # ignore/add/remove/force
+sp_type_ellipsis                = ignore   # ignore/add/remove/force
+sp_type_question                = ignore   # ignore/add/remove/force
+sp_paren_ellipsis               = ignore   # ignore/add/remove/force
+sp_paren_qualifier              = ignore   # ignore/add/remove/force
+sp_paren_noexcept               = ignore   # ignore/add/remove/force
+sp_after_class_colon            = ignore   # ignore/add/remove/force
+sp_before_class_colon           = ignore   # ignore/add/remove/force
+sp_after_constr_colon           = ignore   # ignore/add/remove/force
+sp_before_constr_colon          = ignore   # ignore/add/remove/force
+sp_before_case_colon            = remove   # ignore/add/remove/force
+sp_after_operator               = ignore   # ignore/add/remove/force
+sp_after_operator_sym           = ignore   # ignore/add/remove/force
+sp_after_operator_sym_empty     = ignore   # ignore/add/remove/force
+sp_after_cast                   = force    # ignore/add/remove/force
+sp_inside_paren_cast            = force    # ignore/add/remove/force
+sp_cpp_cast_paren               = ignore   # ignore/add/remove/force
+sp_sizeof_paren                 = remove   # ignore/add/remove/force
+sp_sizeof_ellipsis              = ignore   # ignore/add/remove/force
+sp_sizeof_ellipsis_paren        = ignore   # ignore/add/remove/force
+sp_decltype_paren               = ignore   # ignore/add/remove/force
+sp_after_tag                    = ignore   # ignore/add/remove/force
+sp_inside_braces_enum           = force    # ignore/add/remove/force
+sp_inside_braces_struct         = force    # ignore/add/remove/force
+sp_inside_braces_oc_dict        = ignore   # ignore/add/remove/force
+sp_after_type_brace_init_lst_open = ignore   # ignore/add/remove/force
+sp_before_type_brace_init_lst_close = ignore   # ignore/add/remove/force
+sp_inside_type_brace_init_lst   = ignore   # ignore/add/remove/force
+sp_inside_braces                = force    # ignore/add/remove/force
+sp_inside_braces_empty          = remove   # ignore/add/remove/force
+sp_type_func                    = force    # ignore/add/remove/force
+sp_type_brace_init_lst          = ignore   # ignore/add/remove/force
+sp_func_proto_paren             = remove   # ignore/add/remove/force
+sp_func_proto_paren_empty       = ignore   # ignore/add/remove/force
+sp_func_def_paren               = remove   # ignore/add/remove/force
+sp_func_def_paren_empty         = ignore   # ignore/add/remove/force
+sp_inside_fparens               = remove   # ignore/add/remove/force
+sp_inside_fparen                = force    # ignore/add/remove/force
+sp_inside_tparen                = ignore   # ignore/add/remove/force
+sp_after_tparen_close           = ignore   # ignore/add/remove/force
+sp_square_fparen                = ignore   # ignore/add/remove/force
+sp_fparen_brace                 = add      # ignore/add/remove/force
+sp_fparen_brace_initializer     = ignore   # ignore/add/remove/force
+sp_fparen_dbrace                = ignore   # ignore/add/remove/force
+sp_func_call_paren              = remove   # ignore/add/remove/force
+sp_func_call_paren_empty        = ignore   # ignore/add/remove/force
+sp_func_call_user_paren         = ignore   # ignore/add/remove/force
+sp_func_call_user_inside_fparen = ignore   # ignore/add/remove/force
+sp_func_call_user_paren_paren   = ignore   # ignore/add/remove/force
+sp_func_class_paren             = remove   # ignore/add/remove/force
+sp_func_class_paren_empty       = ignore   # ignore/add/remove/force
+sp_return_paren                 = remove   # ignore/add/remove/force
+sp_return_brace                 = ignore   # ignore/add/remove/force
+sp_attribute_paren              = remove   # ignore/add/remove/force
+sp_defined_paren                = remove   # ignore/add/remove/force
+sp_throw_paren                  = ignore   # ignore/add/remove/force
+sp_after_throw                  = ignore   # ignore/add/remove/force
+sp_catch_paren                  = ignore   # ignore/add/remove/force
+sp_oc_catch_paren               = ignore   # ignore/add/remove/force
+sp_oc_classname_paren           = ignore   # ignore/add/remove/force
+sp_version_paren                = ignore   # ignore/add/remove/force
+sp_scope_paren                  = ignore   # ignore/add/remove/force
+sp_super_paren                  = remove   # ignore/add/remove/force
+sp_this_paren                   = remove   # ignore/add/remove/force
+sp_macro                        = force    # ignore/add/remove/force
+sp_macro_func                   = force    # ignore/add/remove/force
+sp_else_brace                   = ignore   # ignore/add/remove/force
+sp_brace_else                   = ignore   # ignore/add/remove/force
+sp_brace_typedef                = force    # ignore/add/remove/force
+sp_catch_brace                  = ignore   # ignore/add/remove/force
+sp_oc_catch_brace               = ignore   # ignore/add/remove/force
+sp_brace_catch                  = ignore   # ignore/add/remove/force
+sp_oc_brace_catch               = ignore   # ignore/add/remove/force
+sp_finally_brace                = ignore   # ignore/add/remove/force
+sp_brace_finally                = ignore   # ignore/add/remove/force
+sp_try_brace                    = ignore   # ignore/add/remove/force
+sp_getset_brace                 = ignore   # ignore/add/remove/force
+sp_word_brace                   = add      # ignore/add/remove/force
+sp_word_brace_ns                = add      # ignore/add/remove/force
+sp_before_dc                    = remove   # ignore/add/remove/force
+sp_after_dc                     = remove   # ignore/add/remove/force
+sp_d_array_colon                = ignore   # ignore/add/remove/force
+sp_not                          = remove   # ignore/add/remove/force
+sp_inv                          = remove   # ignore/add/remove/force
+sp_addr                         = remove   # ignore/add/remove/force
+sp_member                       = remove   # ignore/add/remove/force
+sp_deref                        = remove   # ignore/add/remove/force
+sp_sign                         = remove   # ignore/add/remove/force
+sp_incdec                       = remove   # ignore/add/remove/force
+sp_before_nl_cont               = add      # ignore/add/remove/force
+sp_after_oc_scope               = ignore   # ignore/add/remove/force
+sp_after_oc_colon               = ignore   # ignore/add/remove/force
+sp_before_oc_colon              = ignore   # ignore/add/remove/force
+sp_after_oc_dict_colon          = ignore   # ignore/add/remove/force
+sp_before_oc_dict_colon         = ignore   # ignore/add/remove/force
+sp_after_send_oc_colon          = ignore   # ignore/add/remove/force
+sp_before_send_oc_colon         = ignore   # ignore/add/remove/force
+sp_after_oc_type                = ignore   # ignore/add/remove/force
+sp_after_oc_return_type         = ignore   # ignore/add/remove/force
+sp_after_oc_at_sel              = ignore   # ignore/add/remove/force
+sp_after_oc_at_sel_parens       = ignore   # ignore/add/remove/force
+sp_inside_oc_at_sel_parens      = ignore   # ignore/add/remove/force
+sp_before_oc_block_caret        = ignore   # ignore/add/remove/force
+sp_after_oc_block_caret         = ignore   # ignore/add/remove/force
+sp_after_oc_msg_receiver        = ignore   # ignore/add/remove/force
+sp_after_oc_property            = ignore   # ignore/add/remove/force
+sp_after_oc_synchronized        = ignore   # ignore/add/remove/force
+sp_cond_colon                   = force    # ignore/add/remove/force
+sp_cond_colon_before            = ignore   # ignore/add/remove/force
+sp_cond_colon_after             = ignore   # ignore/add/remove/force
+sp_cond_question                = force    # ignore/add/remove/force
+sp_cond_question_before         = ignore   # ignore/add/remove/force
+sp_cond_question_after          = ignore   # ignore/add/remove/force
+sp_cond_ternary_short           = ignore   # ignore/add/remove/force
+sp_case_label                   = force    # ignore/add/remove/force
+sp_range                        = ignore   # ignore/add/remove/force
+sp_after_for_colon              = ignore   # ignore/add/remove/force
+sp_before_for_colon             = ignore   # ignore/add/remove/force
+sp_extern_paren                 = ignore   # ignore/add/remove/force
+sp_cmt_cpp_start                = ignore   # ignore/add/remove/force
+sp_cmt_cpp_doxygen              = false    # true/false
+sp_cmt_cpp_qttr                 = false    # true/false
+sp_endif_cmt                    = force    # ignore/add/remove/force
+sp_after_new                    = ignore   # ignore/add/remove/force
+sp_between_new_paren            = ignore   # ignore/add/remove/force
+sp_after_newop_paren            = ignore   # ignore/add/remove/force
+sp_inside_newop_paren           = ignore   # ignore/add/remove/force
+sp_inside_newop_paren_open      = ignore   # ignore/add/remove/force
+sp_inside_newop_paren_close     = ignore   # ignore/add/remove/force
+sp_before_tr_emb_cmt            = force    # ignore/add/remove/force
+sp_num_before_tr_emb_cmt        = 1        # unsigned number
+sp_annotation_paren             = ignore   # ignore/add/remove/force
+sp_skip_vbrace_tokens           = false    # true/false
+sp_after_noexcept               = ignore   # ignore/add/remove/force
+sp_vala_after_translation       = ignore   # ignore/add/remove/force
+force_tab_after_define          = false    # true/false
+indent_columns                  = 4        # unsigned number
+indent_continue                 = 0        # number
+indent_continue_class_head      = 0        # unsigned number
+indent_single_newlines          = false    # true/false
+indent_param                    = 0        # unsigned number
+indent_with_tabs                = 0        # unsigned number
+indent_cmt_with_tabs            = false    # true/false
+indent_align_string             = true     # true/false
+indent_xml_string               = 0        # unsigned number
+indent_brace                    = 0        # unsigned number
+indent_braces                   = false    # true/false
+indent_braces_no_func           = false    # true/false
+indent_braces_no_class          = false    # true/false
+indent_braces_no_struct         = false    # true/false
+indent_brace_parent             = false    # true/false
+indent_paren_open_brace         = false    # true/false
+indent_cs_delegate_brace        = false    # true/false
+indent_cs_delegate_body         = false    # true/false
+indent_namespace                = false    # true/false
+indent_namespace_single_indent  = false    # true/false
+indent_namespace_level          = 0        # unsigned number
+indent_namespace_limit          = 0        # unsigned number
+indent_extern                   = false    # true/false
+indent_class                    = true     # true/false
+indent_class_colon              = true     # true/false
+indent_class_on_colon           = false    # true/false
+indent_constr_colon             = false    # true/false
+indent_ctor_init_leading        = 2        # unsigned number
+indent_ctor_init                = 0        # number
+indent_else_if                  = false    # true/false
+indent_var_def_blk              = 0        # number
+indent_var_def_cont             = false    # true/false
+indent_shift                    = false    # true/false
+indent_func_def_force_col1      = false    # true/false
+indent_func_call_param          = false    # true/false
+indent_func_def_param           = false    # true/false
+indent_func_proto_param         = false    # true/false
+indent_func_class_param         = false    # true/false
+indent_func_ctor_var_param      = false    # true/false
+indent_template_param           = false    # true/false
+indent_func_param_double        = false    # true/false
+indent_func_const               = 0        # unsigned number
+indent_func_throw               = 0        # unsigned number
+indent_member                   = 3        # unsigned number
+indent_member_single            = false    # true/false
+indent_sing_line_comments       = 0        # unsigned number
+indent_relative_single_line_comments = false    # true/false
+indent_switch_case              = 4        # unsigned number
+indent_switch_pp                = true     # true/false
+indent_case_shift               = 0        # unsigned number
+indent_case_brace               = 3        # number
+indent_col1_comment             = false    # true/false
+indent_col1_multi_string_literal = false    # true/false
+indent_label                    = 1        # number
+indent_access_spec              = 1        # number
+indent_access_spec_body         = false    # true/false
+indent_paren_nl                 = false    # true/false
+indent_paren_close              = 0        # unsigned number
+indent_paren_after_func_def     = false    # true/false
+indent_paren_after_func_decl    = false    # true/false
+indent_paren_after_func_call    = false    # true/false
+indent_comma_paren              = false    # true/false
+indent_bool_paren               = false    # true/false
+indent_semicolon_for_paren      = false    # true/false
+indent_first_bool_expr          = false    # true/false
+indent_first_for_expr           = false    # true/false
+indent_square_nl                = false    # true/false
+indent_preserve_sql             = false    # true/false
+indent_align_assign             = true     # true/false
+indent_align_paren              = true     # true/false
+indent_oc_block                 = false    # true/false
+indent_oc_block_msg             = 0        # unsigned number
+indent_oc_msg_colon             = 0        # unsigned number
+indent_oc_msg_prioritize_first_colon = true     # true/false
+indent_oc_block_msg_xcode_style = false    # true/false
+indent_oc_block_msg_from_keyword = false    # true/false
+indent_oc_block_msg_from_colon  = false    # true/false
+indent_oc_block_msg_from_caret  = false    # true/false
+indent_oc_block_msg_from_brace  = false    # true/false
+indent_min_vbrace_open          = 0        # unsigned number
+indent_vbrace_open_on_tabstop   = false    # true/false
+indent_token_after_brace        = true     # true/false
+indent_cpp_lambda_body          = false    # true/false
+indent_using_block              = true     # true/false
+indent_ternary_operator         = 0        # unsigned number
+indent_off_after_return_new     = false    # true/false
+indent_single_after_return      = false    # true/false
+indent_ignore_asm_block         = false    # true/false
+nl_collapse_empty_body          = false    # true/false
+nl_assign_leave_one_liners      = true     # true/false
+nl_class_leave_one_liners       = true     # true/false
+nl_enum_leave_one_liners        = false    # true/false
+nl_getset_leave_one_liners      = false    # true/false
+nl_cs_property_leave_one_liners = false    # true/false
+nl_func_leave_one_liners        = false    # true/false
+nl_cpp_lambda_leave_one_liners  = false    # true/false
+nl_if_leave_one_liners          = false    # true/false
+nl_while_leave_one_liners       = false    # true/false
+nl_for_leave_one_liners         = false    # true/false
+nl_oc_msg_leave_one_liner       = false    # true/false
+nl_oc_mdef_brace                = ignore   # ignore/add/remove/force
+nl_oc_block_brace               = ignore   # ignore/add/remove/force
+nl_oc_interface_brace           = ignore   # ignore/add/remove/force
+nl_oc_implementation_brace      = ignore   # ignore/add/remove/force
+nl_start_of_file                = remove   # ignore/add/remove/force
+nl_start_of_file_min            = 0        # unsigned number
+nl_end_of_file                  = force    # ignore/add/remove/force
+nl_end_of_file_min              = 1        # unsigned number
+nl_assign_brace                 = add      # ignore/add/remove/force
+nl_assign_square                = ignore   # ignore/add/remove/force
+nl_tsquare_brace                = ignore   # ignore/add/remove/force
+nl_after_square_assign          = ignore   # ignore/add/remove/force
+nl_fcall_brace                  = add      # ignore/add/remove/force
+nl_enum_brace                   = force    # ignore/add/remove/force
+nl_enum_class                   = ignore   # ignore/add/remove/force
+nl_enum_class_identifier        = ignore   # ignore/add/remove/force
+nl_enum_identifier_colon        = ignore   # ignore/add/remove/force
+nl_enum_colon_type              = ignore   # ignore/add/remove/force
+nl_struct_brace                 = force    # ignore/add/remove/force
+nl_union_brace                  = force    # ignore/add/remove/force
+nl_if_brace                     = add      # ignore/add/remove/force
+nl_brace_else                   = add      # ignore/add/remove/force
+nl_elseif_brace                 = ignore   # ignore/add/remove/force
+nl_else_brace                   = add      # ignore/add/remove/force
+nl_else_if                      = ignore   # ignore/add/remove/force
+nl_before_if_closing_paren      = ignore   # ignore/add/remove/force
+nl_brace_finally                = ignore   # ignore/add/remove/force
+nl_finally_brace                = ignore   # ignore/add/remove/force
+nl_try_brace                    = ignore   # ignore/add/remove/force
+nl_getset_brace                 = force    # ignore/add/remove/force
+nl_for_brace                    = add      # ignore/add/remove/force
+nl_catch_brace                  = ignore   # ignore/add/remove/force
+nl_oc_catch_brace               = ignore   # ignore/add/remove/force
+nl_brace_catch                  = ignore   # ignore/add/remove/force
+nl_oc_brace_catch               = ignore   # ignore/add/remove/force
+nl_brace_square                 = ignore   # ignore/add/remove/force
+nl_brace_fparen                 = ignore   # ignore/add/remove/force
+nl_while_brace                  = add      # ignore/add/remove/force
+nl_scope_brace                  = ignore   # ignore/add/remove/force
+nl_unittest_brace               = ignore   # ignore/add/remove/force
+nl_version_brace                = ignore   # ignore/add/remove/force
+nl_using_brace                  = ignore   # ignore/add/remove/force
+nl_brace_brace                  = ignore   # ignore/add/remove/force
+nl_do_brace                     = add      # ignore/add/remove/force
+nl_brace_while                  = ignore   # ignore/add/remove/force
+nl_switch_brace                 = add      # ignore/add/remove/force
+nl_synchronized_brace           = ignore   # ignore/add/remove/force
+nl_multi_line_cond              = false    # true/false
+nl_multi_line_define            = true     # true/false
+nl_before_case                  = true     # true/false
+nl_after_case                   = true     # true/false
+nl_case_colon_brace             = ignore   # ignore/add/remove/force
+nl_before_throw                 = ignore   # ignore/add/remove/force
+nl_namespace_brace              = ignore   # ignore/add/remove/force
+nl_template_class               = ignore   # ignore/add/remove/force
+nl_class_brace                  = ignore   # ignore/add/remove/force
+nl_class_init_args              = ignore   # ignore/add/remove/force
+nl_constr_init_args             = ignore   # ignore/add/remove/force
+nl_enum_own_lines               = ignore   # ignore/add/remove/force
+nl_func_type_name               = remove   # ignore/add/remove/force
+nl_func_type_name_class         = ignore   # ignore/add/remove/force
+nl_func_class_scope             = ignore   # ignore/add/remove/force
+nl_func_scope_name              = ignore   # ignore/add/remove/force
+nl_func_proto_type_name         = remove   # ignore/add/remove/force
+nl_func_paren                   = remove   # ignore/add/remove/force
+nl_func_paren_empty             = ignore   # ignore/add/remove/force
+nl_func_def_paren               = remove   # ignore/add/remove/force
+nl_func_def_paren_empty         = ignore   # ignore/add/remove/force
+nl_func_call_paren              = ignore   # ignore/add/remove/force
+nl_func_call_paren_empty        = ignore   # ignore/add/remove/force
+nl_func_decl_start              = remove   # ignore/add/remove/force
+nl_func_def_start               = remove   # ignore/add/remove/force
+nl_func_decl_start_single       = ignore   # ignore/add/remove/force
+nl_func_def_start_single        = ignore   # ignore/add/remove/force
+nl_func_decl_start_multi_line   = false    # true/false
+nl_func_def_start_multi_line    = false    # true/false
+nl_func_decl_args               = add      # ignore/add/remove/force
+nl_func_def_args                = add      # ignore/add/remove/force
+nl_func_decl_args_multi_line    = false    # true/false
+nl_func_def_args_multi_line     = false    # true/false
+nl_func_decl_end                = remove   # ignore/add/remove/force
+nl_func_def_end                 = remove   # ignore/add/remove/force
+nl_func_decl_end_single         = ignore   # ignore/add/remove/force
+nl_func_def_end_single          = ignore   # ignore/add/remove/force
+nl_func_decl_end_multi_line     = false    # true/false
+nl_func_def_end_multi_line      = false    # true/false
+nl_func_decl_empty              = ignore   # ignore/add/remove/force
+nl_func_def_empty               = ignore   # ignore/add/remove/force
+nl_func_call_empty              = ignore   # ignore/add/remove/force
+nl_func_call_start              = ignore   # ignore/add/remove/force
+nl_func_call_start_multi_line   = false    # true/false
+nl_func_call_args_multi_line    = false    # true/false
+nl_func_call_end_multi_line     = false    # true/false
+nl_oc_msg_args                  = false    # true/false
+nl_fdef_brace                   = add      # ignore/add/remove/force
+nl_fdef_brace_cond              = ignore   # ignore/add/remove/force
+nl_cpp_ldef_brace               = ignore   # ignore/add/remove/force
+nl_return_expr                  = ignore   # ignore/add/remove/force
+nl_after_semicolon              = true     # true/false
+nl_paren_dbrace_open            = ignore   # ignore/add/remove/force
+nl_type_brace_init_lst          = ignore   # ignore/add/remove/force
+nl_type_brace_init_lst_open     = ignore   # ignore/add/remove/force
+nl_type_brace_init_lst_close    = ignore   # ignore/add/remove/force
+nl_after_brace_open             = true     # true/false
+nl_after_brace_open_cmt         = false    # true/false
+nl_after_vbrace_open            = false    # true/false
+nl_after_vbrace_open_empty      = false    # true/false
+nl_after_brace_close            = true     # true/false
+nl_after_vbrace_close           = false    # true/false
+nl_brace_struct_var             = ignore   # ignore/add/remove/force
+nl_define_macro                 = false    # true/false
+nl_squeeze_paren_close          = false    # true/false
+nl_squeeze_ifdef                = true     # true/false
+nl_squeeze_ifdef_top_level      = false    # true/false
+nl_before_if                    = force    # ignore/add/remove/force
+nl_after_if                     = force    # ignore/add/remove/force
+nl_before_for                   = force    # ignore/add/remove/force
+nl_after_for                    = force    # ignore/add/remove/force
+nl_before_while                 = force    # ignore/add/remove/force
+nl_after_while                  = force    # ignore/add/remove/force
+nl_before_switch                = force    # ignore/add/remove/force
+nl_after_switch                 = force    # ignore/add/remove/force
+nl_before_synchronized          = ignore   # ignore/add/remove/force
+nl_after_synchronized           = ignore   # ignore/add/remove/force
+nl_before_do                    = force    # ignore/add/remove/force
+nl_after_do                     = force    # ignore/add/remove/force
+nl_before_return                = false    # true/false
+nl_after_return                 = true     # true/false
+nl_ds_struct_enum_cmt           = false    # true/false
+nl_ds_struct_enum_close_brace   = false    # true/false
+nl_class_colon                  = ignore   # ignore/add/remove/force
+nl_constr_colon                 = ignore   # ignore/add/remove/force
+nl_namespace_two_to_one_liner   = false    # true/false
+nl_create_if_one_liner          = false    # true/false
+nl_create_for_one_liner         = false    # true/false
+nl_create_while_one_liner       = false    # true/false
+nl_create_func_def_one_liner    = false    # true/false
+nl_split_if_one_liner           = false    # true/false
+nl_split_for_one_liner          = false    # true/false
+nl_split_while_one_liner        = false    # true/false
+nl_max                          = 4        # unsigned number
+nl_max_blank_in_func            = 0        # unsigned number
+nl_before_func_body_proto       = 0        # unsigned number
+nl_before_func_body_def         = 0        # unsigned number
+nl_before_func_class_proto      = 0        # unsigned number
+nl_before_func_class_def        = 0        # unsigned number
+nl_after_func_proto             = 0        # unsigned number
+nl_after_func_proto_group       = 1        # unsigned number
+nl_after_func_class_proto       = 0        # unsigned number
+nl_after_func_class_proto_group = 0        # unsigned number
+nl_class_leave_one_liner_groups = false    # true/false
+nl_after_func_body              = 0        # unsigned number
+nl_after_func_body_class        = 2        # unsigned number
+nl_after_func_body_one_liner    = 0        # unsigned number
+nl_func_var_def_blk             = 1        # unsigned number
+nl_typedef_blk_start            = 0        # unsigned number
+nl_typedef_blk_end              = 0        # unsigned number
+nl_typedef_blk_in               = 0        # unsigned number
+nl_var_def_blk_start            = 0        # unsigned number
+nl_var_def_blk_end              = 0        # unsigned number
+nl_var_def_blk_in               = 0        # unsigned number
+nl_before_block_comment         = 2        # unsigned number
+nl_before_c_comment             = 0        # unsigned number
+nl_before_cpp_comment           = 0        # unsigned number
+nl_after_multiline_comment      = false    # true/false
+nl_after_label_colon            = false    # true/false
+nl_after_struct                 = 0        # unsigned number
+nl_before_class                 = 0        # unsigned number
+nl_after_class                  = 0        # unsigned number
+nl_before_access_spec           = 0        # unsigned number
+nl_after_access_spec            = 0        # unsigned number
+nl_comment_func_def             = 0        # unsigned number
+nl_after_try_catch_finally      = 0        # unsigned number
+nl_around_cs_property           = 0        # unsigned number
+nl_between_get_set              = 0        # unsigned number
+nl_property_brace               = ignore   # ignore/add/remove/force
+nl_inside_namespace             = 0        # unsigned number
+eat_blanks_after_open_brace     = true     # true/false
+eat_blanks_before_close_brace   = true     # true/false
+nl_remove_extra_newlines        = 0        # unsigned number
+nl_after_annotation             = ignore   # ignore/add/remove/force
+nl_between_annotation           = ignore   # ignore/add/remove/force
+pos_arith                       = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_assign                      = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_bool                        = trail    # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_compare                     = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_conditional                 = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_comma                       = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_enum_comma                  = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_class_comma                 = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_constr_comma                = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_class_colon                 = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+pos_constr_colon                = ignore   # ignore/break/force/lead/trail/join/lead_break/lead_force/trail_break/trail_force
+code_width                      = 0        # unsigned number
+ls_for_split_full               = false    # true/false
+ls_func_split_full              = false    # true/false
+ls_code_width                   = false    # true/false
+align_keep_tabs                 = false    # true/false
+align_with_tabs                 = false    # true/false
+align_on_tabstop                = false    # true/false
+align_number_right              = false    # true/false
+align_keep_extra_space          = false    # true/false
+align_func_params               = false    # true/false
+align_func_params_span          = 0        # unsigned number
+align_func_params_thresh        = 0        # number
+align_func_params_gap           = 0        # unsigned number
+align_constr_value_span         = 0        # unsigned number
+align_constr_value_thresh       = 0        # number
+align_constr_value_gap          = 0        # unsigned number
+align_same_func_call_params     = false    # true/false
+align_same_func_call_params_span = 0        # unsigned number
+align_same_func_call_params_thresh = 0        # number
+align_var_def_span              = 0        # unsigned number
+align_var_def_star_style        = 0        # unsigned number
+align_var_def_amp_style         = 1        # unsigned number
+align_var_def_thresh            = 16       # number
+align_var_def_gap               = 0        # unsigned number
+align_var_def_colon             = false    # true/false
+align_var_def_colon_gap         = 0        # unsigned number
+align_var_def_attribute         = false    # true/false
+align_var_def_inline            = false    # true/false
+align_assign_span               = 0        # unsigned number
+align_assign_func_proto_span    = 0        # unsigned number
+align_assign_thresh             = 12       # number
+align_assign_decl_func          = 0        # unsigned number
+align_enum_equ_span             = 0        # unsigned number
+align_enum_equ_thresh           = 0        # number
+align_var_class_span            = 0        # unsigned number
+align_var_class_thresh          = 0        # number
+align_var_class_gap             = 0        # unsigned number
+align_var_struct_span           = 0        # unsigned number
+align_var_struct_thresh         = 0        # number
+align_var_struct_gap            = 0        # unsigned number
+align_struct_init_span          = 3        # unsigned number
+align_typedef_span              = 5        # unsigned number
+align_typedef_gap               = 3        # unsigned number
+align_typedef_func              = 0        # unsigned number
+align_typedef_star_style        = 1        # unsigned number
+align_typedef_amp_style         = 1        # unsigned number
+align_right_cmt_span            = 3        # unsigned number
+align_right_cmt_gap             = 0        # unsigned number
+align_right_cmt_mix             = false    # true/false
+align_right_cmt_same_level      = false    # true/false
+align_right_cmt_at_col          = 0        # unsigned number
+align_func_proto_span           = 0        # unsigned number
+align_func_proto_thresh         = 0        # number
+align_func_proto_gap            = 0        # unsigned number
+align_on_operator               = false    # true/false
+align_mix_var_proto             = false    # true/false
+align_single_line_func          = false    # true/false
+align_single_line_brace         = false    # true/false
+align_single_line_brace_gap     = 0        # unsigned number
+align_oc_msg_spec_span          = 0        # unsigned number
+align_nl_cont                   = true     # true/false
+align_pp_define_together        = false    # true/false
+align_pp_define_span            = 3        # unsigned number
+align_pp_define_gap             = 4        # unsigned number
+align_left_shift                = true     # true/false
+align_asm_colon                 = false    # true/false
+align_oc_msg_colon_span         = 0        # unsigned number
+align_oc_msg_colon_first        = false    # true/false
+align_oc_decl_colon             = false    # true/false
+cmt_width                       = 0        # unsigned number
+cmt_reflow_mode                 = 0        # unsigned number
+cmt_convert_tab_to_spaces       = false    # true/false
+cmt_indent_multi                = true     # true/false
+cmt_c_group                     = false    # true/false
+cmt_c_nl_start                  = false    # true/false
+cmt_c_nl_end                    = false    # true/false
+cmt_cpp_to_c                    = true     # true/false
+cmt_cpp_group                   = false    # true/false
+cmt_cpp_nl_start                = false    # true/false
+cmt_cpp_nl_end                  = false    # true/false
+cmt_star_cont                   = true     # true/false
+cmt_sp_before_star_cont         = 0        # unsigned number
+cmt_sp_after_star_cont          = 0        # unsigned number
+cmt_multi_check_last            = true     # true/false
+cmt_multi_first_len_minimum     = 4        # unsigned number
+cmt_insert_file_header          = ""         # string
+cmt_insert_file_footer          = ""         # string
+cmt_insert_func_header          = ""         # string
+cmt_insert_class_header         = ""         # string
+cmt_insert_oc_msg_header        = ""         # string
+cmt_insert_before_preproc       = false    # true/false
+cmt_insert_before_inlines       = true     # true/false
+cmt_insert_before_ctor_dtor     = false    # true/false
+mod_full_brace_do               = add      # ignore/add/remove/force
+mod_full_brace_for              = add      # ignore/add/remove/force
+mod_full_brace_function         = ignore   # ignore/add/remove/force
+mod_full_brace_if               = add      # ignore/add/remove/force
+mod_full_brace_if_chain         = false    # true/false
+mod_full_brace_if_chain_only    = false    # true/false
+mod_full_brace_while            = add      # ignore/add/remove/force
+mod_full_brace_using            = ignore   # ignore/add/remove/force
+mod_full_brace_nl               = 0        # unsigned number
+mod_full_brace_nl_block_rem_mlcond = false    # true/false
+mod_paren_on_return             = ignore   # ignore/add/remove/force
+mod_pawn_semicolon              = false    # true/false
+mod_full_paren_if_bool          = true     # true/false
+mod_remove_extra_semicolon      = true     # true/false
+mod_add_long_function_closebrace_comment = 0        # unsigned number
+mod_add_long_namespace_closebrace_comment = 0        # unsigned number
+mod_add_long_class_closebrace_comment = 0        # unsigned number
+mod_add_long_switch_closebrace_comment = 0        # unsigned number
+mod_add_long_ifdef_endif_comment = 10       # unsigned number
+mod_add_long_ifdef_else_comment = 10       # unsigned number
+mod_sort_import                 = false    # true/false
+mod_sort_using                  = false    # true/false
+mod_sort_include                = false    # true/false
+mod_move_case_break             = false    # true/false
+mod_case_brace                  = remove   # ignore/add/remove/force
+mod_remove_empty_return         = true     # true/false
+mod_enum_last_comma             = ignore   # ignore/add/remove/force
+mod_sort_oc_properties          = false    # true/false
+mod_sort_oc_property_class_weight = 0        # number
+mod_sort_oc_property_thread_safe_weight = 0        # number
+mod_sort_oc_property_readwrite_weight = 0        # number
+mod_sort_oc_property_reference_weight = 0        # number
+mod_sort_oc_property_getter_weight = 0        # number
+mod_sort_oc_property_setter_weight = 0        # number
+mod_sort_oc_property_nullability_weight = 0        # number
+pp_indent                       = force    # ignore/add/remove/force
+pp_indent_at_level              = true     # true/false
+pp_indent_count                 = 4        # unsigned number
+pp_space                        = remove   # ignore/add/remove/force
+pp_space_count                  = 0        # unsigned number
+pp_indent_region                = 0        # number
+pp_region_indent_code           = false    # true/false
+pp_indent_if                    = 0        # number
+pp_if_indent_code               = true     # true/false
+pp_define_at_level              = false    # true/false
+pp_ignore_define_body           = false    # true/false
+pp_indent_case                  = true     # true/false
+pp_indent_func_def              = true     # true/false
+pp_indent_extern                = true     # true/false
+pp_indent_brace                 = false    # true/false
+include_category_0              = ""         # string
+include_category_1              = ""         # string
+include_category_2              = ""         # string
+use_indent_func_call_param      = true     # true/false
+use_indent_continue_only_once   = false    # true/false
+indent_cpp_lambda_only_once     = false    # true/false
+use_options_overriding_for_qt_macros = true     # true/false
+warn_level_tabs_found_in_verbatim_string_literals = 2        # unsigned number

.github/workflows/auto-release.yml

@@ -0,0 +1,106 @@
+name: Kernel-Auto-Release
+
+on:
+  workflow_dispatch:
+    inputs:
+      commit_id:
+        description: 'Commit ID'
+        required: true
+        default: 'HEAD'
+      version_number:
+        description: 'Version Number (Ex. 10.4.4)'
+        required: true
+        default: '10.4.4'
+      main_br_version:
+        description: "Version String for task.h on main branch (leave empty to leave as-is)."
+        required: false
+        default: ''
+
+jobs:
+  release-packager:
+    name: Release Packager
+    runs-on: ubuntu-latest
+    steps:
+      # Install python 3
+      - name: Tool Setup
+        uses: actions/setup-python@v2
+        with:
+          architecture:   x64
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+      # Currently FreeRTOS/.github/scripts houses the release script. Download it for upcoming usage
+      - name: Checkout FreeRTOS Release Tools
+        uses: actions/checkout@v3
+        with:
+          repository: FreeRTOS/FreeRTOS
+          path: tools
+
+      # Simpler git auth if we use checkout action and forward the repo to release script
+      - name: Checkout FreeRTOS Kernel
+        uses: actions/checkout@v3
+        with:
+          path: local_kernel
+          fetch-depth: 0
+
+      - name: Configure git identity
+        run: |
+          git config --global user.name ${{ github.actor }}
+          git config --global user.email ${{ github.actor }}@users.noreply.github.com
+
+      - name: create a new branch that references commit id
+        working-directory: ./local_kernel
+        run: |
+          git checkout -b ${{ github.event.inputs.version_number }} ${{ github.event.inputs.commit_id }}
+          echo "COMMIT_SHA_1=$(git rev-parse HEAD)" >> $GITHUB_ENV
+
+      - name: Update source files with version info
+        run: |
+          # Install deps and run
+          pip install -r ./tools/.github/scripts/release-requirements.txt
+          ./tools/.github/scripts/update_src_version.py FreeRTOS --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_1 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
+          exit $?
+        env:
+            GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+      - name : Update version number in manifest.yml
+        working-directory: ./local_kernel
+        run: |
+          ./.github/scripts/manifest_updater.py -v ${{ github.event.inputs.version_number }}
+          exit $?
+
+      - name : Commit version number change in manifest.yml
+        working-directory: ./local_kernel
+        run: |
+          git add .
+          git commit -m '[AUTO][RELEASE]: Update version number in manifest.yml'
+          git push -u origin ${{ github.event.inputs.version_number }}
+
+      - name: Generate SBOM
+        uses: FreeRTOS/CI-CD-Github-Actions/sbom-generator@main
+        with:
+          repo_path: ./local_kernel
+          source_path: ./
+
+      - name: commit SBOM file
+        working-directory: ./local_kernel
+        run: |
+          git add .
+          git commit -m '[AUTO][RELEASE]: Update SBOM'
+          git push -u origin ${{ github.event.inputs.version_number }}
+          echo "COMMIT_SHA_2=$(git rev-parse HEAD)" >> $GITHUB_ENV
+
+      - name: Release
+        run: |
+          # Install deps and run
+          pip install -r ./tools/.github/scripts/release-requirements.txt
+          ./tools/.github/scripts/release.py ${{ github.repository_owner }} --kernel-repo-path=local_kernel --kernel-commit=${{ env.COMMIT_SHA_2 }} --new-kernel-version=${{ github.event.inputs.version_number }} --new-kernel-main-br-version=${{ github.event.inputs.main_br_version }}
+          exit $?
+        env:
+            GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+      - name: Cleanup
+        working-directory: ./local_kernel
+        run: |
+          # Delete the branch created for Tag by SBOM generator
+          git push -u origin --delete ${{ github.event.inputs.version_number }}

.github/workflows/ci.yml

@@ -0,0 +1,49 @@
+name: CI Checks
+on:
+  push:
+    branches: ["**"]
+  pull_request:
+    branches: [main]
+  workflow_dispatch:
+jobs:
+  formatting:
+    runs-on: ubuntu-20.04
+    steps:
+      - uses: actions/checkout@v3
+      - name: Check Formatting of FreeRTOS-Kernel Files
+        uses: FreeRTOS/CI-CD-Github-Actions/formatting@main
+        with:
+          exclude-dirs: portable
+
+  spell-check:
+      runs-on: ubuntu-latest
+      steps:
+        - name: Clone This Repo
+          uses: actions/checkout@v3
+        - name: Run spellings check
+          uses: FreeRTOS/CI-CD-Github-Actions/spellings@main
+          with:
+            path: ./
+            exclude-files: History.txt
+
+  link-verifier:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Clone This Repo
+        uses: actions/checkout@v3
+      - name: Link Verification
+        uses: FreeRTOS/CI-CD-Github-Actions/link-verifier@main
+
+  verify-manifest:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v3
+        with:
+          submodules: true
+          fetch-depth: 0
+
+      - name: Run manifest verifier
+        uses: FreeRTOS/CI-CD-GitHub-Actions/manifest-verifier@main
+        with:
+          path: ./
+          fail-on-incorrect-version: true

.github/workflows/coverity_scan.yml

@@ -0,0 +1,88 @@
+name: Coverity Scan
+on:
+  # Run on every commit to mainline
+  push:
+    branches: main
+  # Allow manual running of the scan
+  workflow_dispatch:
+
+env:
+  bashPass: \033[32;1mPASSED -
+  bashInfo: \033[33;1mINFO -
+  bashFail: \033[31;1mFAILED -
+  bashEnd:  \033[0m
+
+jobs:
+  Coverity-Scan:
+    if: ( github.repository == 'FreeRTOS/FreeRTOS-Kernel' )
+    name: Coverity Scan
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout the Repository
+        uses: actions/checkout@v3
+
+      - env:
+          stepName: Install Build Essentials
+        shell: bash
+        run: |
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+          sudo apt-get -y update
+          sudo apt-get -y install build-essential
+
+          echo "::endgroup::"
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+      - env:
+          stepName: Install Coverity Build
+          COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
+        shell: bash
+        run: |
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+          wget -nv -qO- https://scan.coverity.com/download/linux64 --post-data "token=${COVERITY_TOKEN}&project=FreeRTOS-Kernel" | tar -zx --one-top-level=cov_scan --strip-components 1
+          echo "cov_scan_path=$(pwd)/cov_scan/bin" >> $GITHUB_ENV
+
+          echo "::endgroup::"
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
+
+      - env:
+          stepName: Coverity Build
+          COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
+          COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
+        shell: bash
+        run: |
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+          export PATH="$PATH:${{env.cov_scan_path}}"
+          cmake -S ./examples/cmake_example/ -B build
+          cd build
+          cov-build --dir cov-int make -j
+          # Move the report out of the build directory
+          tar czvf ../gcc_freertos_kernel_sample_build.tgz cov-int
+
+          echo "::endgroup::"
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
+
+      - env:
+          stepName: Upload Coverity Report for Scan
+          COVERITY_TOKEN: ${{ secrets.COVERITY_SCAN_TOKEN }}
+          COVERITY_EMAIL: ${{ secrets.COVERITY_SCAN_EMAIL }}
+        shell: bash
+        run: |
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+          COV_SCAN_UPLOAD_STATUS=$(curl --form token=${COVERITY_TOKEN} \
+            --form email=${COVERITY_EMAIL} \
+            --form file=@gcc_freertos_kernel_sample_build.tgz \
+            --form version="Mainline" \
+            --form description="FreeRTOS Kernel Commit Scan" \
+            https://scan.coverity.com/builds?project=FreeRTOS-Kernel)
+
+          echo "::endgroup::"
+          echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }} "
+          echo "${COV_SCAN_UPLOAD_STATUS}" | grep -q -e 'Build successfully submitted' || echo >&2 "Error submitting build for analysis: ${COV_SCAN_UPLOAD_STATUS}"

.github/workflows/formatting.yml

@@ -0,0 +1,25 @@
+name: Format Pull Request Files
+
+on:
+  issue_comment:
+    types: [created]
+
+env:
+  bashPass: \033[32;1mPASSED -
+  bashInfo: \033[33;1mINFO -
+  bashFail: \033[31;1mFAILED -
+  bashEnd:  \033[0m
+
+jobs:
+  Formatting:
+    name: Run Formatting Check
+    if: ${{ github.event.issue.pull_request &&
+        ( ( github.event.comment.body == '/bot run uncrustify' ) ||
+          ( github.event.comment.body == '/bot run formatting' ) ) }}
+    runs-on: ubuntu-20.04
+    steps:
+    - name: Apply Formatting Fix
+      id: check-formatting  
+      uses: FreeRTOS/CI-CD-Github-Actions/formatting-bot@main
+      with:
+        exclude-dirs: portable

.github/workflows/git-secrets.yml

@@ -0,0 +1,24 @@
+name: git-secrets Check
+on:
+  push:
+  pull_request:
+  workflow_dispatch:
+jobs:
+  git-secrets:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v3
+        with:
+          submodules: recursive
+      - name: Checkout awslabs/git-secrets
+        uses: actions/checkout@v3
+        with:
+          repository: awslabs/git-secrets
+          ref: master
+          path: git-secrets
+      - name: Install git-secrets
+        run: cd git-secrets && sudo make install && cd ..
+      - name: Run git-secrets
+        run: |
+          git-secrets --register-aws
+          git-secrets --scan

.github/workflows/kernel-checks.yml

@@ -0,0 +1,69 @@
+name: Kernel-Checker
+
+on: [push, pull_request]
+
+jobs:
+  kernel-checker:
+    name: FreeRTOS Kernel Header Checks
+    runs-on: ubuntu-20.04
+    steps:
+      # Install python 3
+      - name: Tool Setup
+        uses: actions/setup-python@v3
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+
+      # There is shared code, hosted by FreeRTOS/FreeRTOS, with deps needed by header checker
+      - name: Checkout FreeRTOS Tools
+        uses: actions/checkout@v3
+        with:
+          repository: FreeRTOS/FreeRTOS
+          sparse-checkout: '.github'
+          ref:  main
+          path: tools
+
+      # Checkout user pull request changes
+      - name: Checkout Pull Request
+        uses: actions/checkout@v3
+        with:
+          path: inspect
+
+      # Collect all affected files
+      - name: Collecting changed files
+        uses: lots0logs/gh-action-get-changed-files@2.2.2
+        with:
+          token: ${{ secrets.GITHUB_TOKEN }}
+
+      # Run checks
+      - env:
+          bashPass: \033[32;1mPASSED -
+          bashInfo: \033[33;1mINFO -
+          bashFail: \033[31;1mFAILED -
+          bashEnd:  \033[0m
+          stepName: Check File Headers
+        name: ${{ env.stepName }}
+        shell: bash
+        run: |
+          # ${{ env.stepName }}
+          echo -e "::group::${{ env.bashInfo }} Install Dependencies ${{ env.bashEnd }}"
+
+          # Copy the common tools from the FreeRTOS/FreeRTOS repo.
+          mv tools/.github/scripts/common inspect/.github/scripts
+
+          # Install the necessary python dependencies
+          pip install -r inspect/.github/scripts/common/requirements.txt
+          cd inspect
+
+          echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
+
+          # Use the python script to check the copyright header of modified files.
+          .github/scripts/kernel_checker.py --json ${HOME}/files_modified.json ${HOME}/files_added.json ${HOME}/files_renamed.json
+          exitStatus=$?
+          echo -e "::endgroup::"
+
+          if [ $exitStatus -eq 0 ]; then
+            echo -e "${{ env.bashPass }} ${{ env.stepName }} ${{ env.bashEnd }}"
+          else
+            echo -e "${{ env.bashFail }} ${{ env.stepName }} ${{ env.bashEnd }}"
+          fi
+          exit $exitStatus

.github/workflows/kernel-demos.yml

@@ -0,0 +1,213 @@
+name: FreeRTOS-Kernel Demos
+on: [push, pull_request]
+
+jobs:
+  WIN32-MSVC:
+    name: WIN32 MSVC
+    runs-on: windows-latest
+    steps:
+      - name: Checkout the FreeRTOS/FreeRTOS Repository
+        uses: actions/checkout@v3
+        with:
+          ref: main
+          repository: FreeRTOS/FreeRTOS
+          submodules: 'recursive'
+          fetch-depth: 1
+
+      # Checkout user pull request changes
+      - name: Checkout Pull Request
+        uses: actions/checkout@v3
+        with:
+          path: ./FreeRTOS/Source
+
+      - name: Add msbuild to PATH
+        uses: microsoft/setup-msbuild@v1.1
+
+      - name: Build WIN32-MSVC Demo
+        working-directory: FreeRTOS/Demo/WIN32-MSVC
+        run: msbuild WIN32.sln -t:rebuild
+
+      - name: Build WIN32-MSVC-Static-Allocation-Only Demo
+        working-directory: FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only
+        run: msbuild WIN32.sln -t:rebuild
+
+  WIN32-MingW:
+    name: WIN32 MingW
+    runs-on: windows-latest
+    steps:
+      - name: Checkout the FreeRTOS/FreeRTOS Repository
+        uses: actions/checkout@v3
+        with:
+          ref: main
+          repository: FreeRTOS/FreeRTOS
+          submodules: 'recursive'
+          fetch-depth: 1
+
+      # Checkout user pull request changes
+      - name: Checkout Pull Request
+        uses: actions/checkout@v3
+        with:
+          path: ./FreeRTOS/Source
+
+      - name: Build WIN32-MingW Demo
+        working-directory: FreeRTOS/Demo/WIN32-MingW
+        run: |
+          gcc --version
+          make --version
+          make
+
+  POSIX-GCC:
+    name: Native GCC
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout the FreeRTOS/FreeRTOS Repository
+        uses: actions/checkout@v3
+        with:
+          ref: main
+          repository: FreeRTOS/FreeRTOS
+          submodules: 'recursive'
+          fetch-depth: 1
+
+      # Checkout user pull request changes
+      - name: Checkout Pull Request
+        uses: actions/checkout@v3
+        with:
+          path: ./FreeRTOS/Source
+
+      - name: Install GCC
+        shell: bash
+        run: |
+          sudo apt-get -y update
+          sudo apt-get -y install build-essential
+
+      - name: Build Posix_GCC Demo
+        shell: bash
+        working-directory: FreeRTOS/Demo/Posix_GCC
+        run: make -j
+
+      - name: Build Posix_GCC Demo for Coverage Test
+        shell: bash
+        working-directory: FreeRTOS/Demo/Posix_GCC
+        run: make -j COVERAGE_TEST=1
+
+  CMake-Example:
+    name: CMake Example with Native GCC
+    runs-on: ubuntu-latest
+    steps:
+      # Checkout user pull request changes
+      - name: Checkout Repository
+        uses: actions/checkout@v3
+
+      - name: Install GCC
+        shell: bash
+        run: |
+          sudo apt-get -y update
+          sudo apt-get -y install build-essential
+
+      - name: Build CMake Example Demo
+        shell: bash
+        working-directory: examples/cmake_example
+        run: |
+          cmake -S . -B build
+          cmake --build build
+
+      - name: Build CMake SMP Example Demo
+        shell: bash
+        working-directory: examples/cmake_example
+        run: |
+          cmake -S . -B build -DFREERTOS_SMP_EXAMPLE=1
+          cmake --build build
+
+  MSP430-GCC:
+    name: GNU MSP430 Toolchain
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout the FreeRTOS/FreeRTOS Repository
+        uses: actions/checkout@v3
+        with:
+          ref: main
+          repository: FreeRTOS/FreeRTOS
+          submodules: 'recursive'
+          fetch-depth: 1
+
+      # Checkout user pull request changes
+      - name: Checkout Pull Request
+        uses: actions/checkout@v3
+        with:
+          path: ./FreeRTOS/Source
+
+      - name: Install MSP430 Toolchain
+        shell: bash
+        run: |
+          sudo apt-get -y update
+          sudo apt-get -y install gcc-msp430 build-essential
+
+      - name: Build msp430_GCC Demo
+        shell: bash
+        working-directory: FreeRTOS/Demo/msp430_GCC
+        run: make -j
+
+  ARM-GCC:
+    name: GNU ARM Toolchain
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout the FreeRTOS/FreeRTOS Repository
+        uses: actions/checkout@v3
+        with:
+          ref: main
+          repository: FreeRTOS/FreeRTOS
+          fetch-depth: 1
+
+      - name: Fetch Community-Supported-Demos Submodule
+        shell: bash
+        run: |
+          # Fetch Community-Supported-Demos Submodule
+          echo "::group::Fetch Community-Supported-Demos Submodule"
+          git submodule update --checkout --init --depth 1 FreeRTOS/Demo/ThirdParty/Community-Supported-Demos
+          echo "::engdroup::"
+          if [ "$?" = "0" ]; then
+            echo -e "\033[32;3mCloned the Community-Supported-Demos\033[0m"
+          else
+            echo -e "\033[32;31mCommunity-Supported-Demos Clone Failed...\033[0m"
+            exit 1
+          fi
+
+      # Checkout user pull request changes
+      - name: Checkout Pull Request
+        uses: actions/checkout@v3
+        with:
+          path: ./FreeRTOS/Source
+
+      - name: Install GNU ARM Toolchain
+        shell: bash
+        run: |
+          sudo apt-get -y update
+          sudo apt-get -y install gcc-arm-none-eabi build-essential cmake git ninja-build python3-minimal
+
+      - name: Build CORTEX_MPU_M3_MPS2_QEMU_GCC Demo
+        shell: bash
+        working-directory: FreeRTOS/Demo/CORTEX_MPU_M3_MPS2_QEMU_GCC
+        run: make -j
+
+      - name: Build CORTEX_LM3S102_GCC Demo
+        shell: bash
+        working-directory: FreeRTOS/Demo/CORTEX_LM3S102_GCC
+        run: make -j
+
+      - name: Build CORTEX_LM3S811_GCC Demo
+        shell: bash
+        working-directory: FreeRTOS/Demo/CORTEX_LM3S811_GCC
+        run: make -j
+
+      - name: Build CORTEX_M0+_RP2040 Demos
+        shell: bash
+        working-directory: FreeRTOS/Demo/ThirdParty/Community-Supported-Demos/CORTEX_M0+_RP2040
+        run: |
+          git clone https://github.com/raspberrypi/pico-sdk.git
+          cmake -B build -DPICO_SDK_PATH=pico-sdk -GNinja
+          ninja -C build --verbose
+
+      - name: Build CORTEX_MPS2_QEMU_IAR_GCC Demo
+        shell: bash
+        working-directory: FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC
+        run: make -C build/gcc -j

.github/workflows/unit-tests.yml

@@ -0,0 +1,56 @@
+name: CMock Unit Tests
+on: [push, pull_request]
+
+jobs:
+  run:
+    runs-on: ubuntu-20.04
+    steps:
+    - name: Checkout Parent Repository
+      uses: actions/checkout@v3
+      with:
+        ref: main
+        repository: FreeRTOS/FreeRTOS
+        submodules: 'recursive'
+        fetch-depth: 1
+
+    # Checkout user pull request changes
+    - name: Checkout Pull Request
+      uses: actions/checkout@v3
+      with:
+        path: ./FreeRTOS/Source
+
+    - name: Setup Python
+      uses: actions/setup-python@master
+      with:
+        python-version: 3.8
+
+    - name: Install packages
+      run: |
+          sudo apt-get install lcov cflow ruby doxygen build-essential unifdef
+    - name: Run Unit Tests with ENABLE_SANITIZER=1
+      run: |
+          make -C FreeRTOS/Test/CMock clean
+          make -C FreeRTOS/Test/CMock ENABLE_SANITIZER=1 run_col_formatted
+    - name: Run Unit Tests for coverage
+      run: |
+          make -C FreeRTOS/Test/CMock clean
+          make -C FreeRTOS/Test/CMock lcovhtml
+          lcov --config-file FreeRTOS/Test/CMock/lcovrc --summary FreeRTOS/Test/CMock/build/cmock_test.info > FreeRTOS/Test/CMock/build/cmock_test_summary.txt
+    - name: Upload coverage to Codecov
+      uses: codecov/codecov-action@v3.1.0
+      with:
+        files: ${{ github.workspace }}/FreeRTOS/Test/CMock/build/cmock_test.info
+        root_dir: ${{ github.workspace }}/FreeRTOS/Source
+        flags: unittests
+        fail_ci_if_error: false
+        verbose: false
+    - name: Archive code coverage data
+      uses: actions/upload-artifact@v2
+      with:
+        name: coverage-data
+        path: FreeRTOS/Test/CMock/build/cmock_test*
+    - name: Archive code coverage html report
+      uses: actions/upload-artifact@v2
+      with:
+        name: coverage-report
+        path: FreeRTOS/Test/CMock/build/coverage

.gitmodules

@@ -0,0 +1,6 @@
+[submodule "ThirdParty/FreeRTOS-Kernel-Partner-Supported-Ports"]
+	path = portable/ThirdParty/Partner-Supported-Ports
+	url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports
+[submodule "ThirdParty/FreeRTOS-Kernel-Community-Supported-Ports"]
+	path = portable/ThirdParty/Community-Supported-Ports
+	url = https://github.com/FreeRTOS/FreeRTOS-Kernel-Community-Supported-Ports

CMakeLists.txt

@@ -0,0 +1,264 @@
+cmake_minimum_required(VERSION 3.15)
+
+# User is responsible to one mandatory option:
+#   FREERTOS_PORT, if not specified and native port detected, uses the native compile.
+#
+# User is responsible for one library target:
+#   freertos_config ,typically an INTERFACE library
+#
+# DEPRECATED: FREERTOS_CONFIG_FILE_DIRECTORY - but still supported if no freertos_config defined for now.
+#             May be removed at some point in the future.
+#
+# User can choose which heap implementation to use (either the implementations
+# included with FreeRTOS [1..5] or a custom implementation) by providing the
+# option FREERTOS_HEAP. When dynamic allocation is used, the user must specify a
+# heap implementation. If the option is not set, the cmake will use no heap
+# implementation (e.g. when only static allocation is used).
+
+# `freertos_config` target defines the path to FreeRTOSConfig.h and optionally other freertos based config files
+if(NOT TARGET freertos_config )
+    if (NOT DEFINED FREERTOS_CONFIG_FILE_DIRECTORY )
+
+        message(FATAL_ERROR " freertos_config target not specified.  Please specify a cmake target that defines the include directory for FreeRTOSConfig.h:\n"
+            "  add_library(freertos_config INTERFACE)\n"
+            "  target_include_directories(freertos_config SYSTEM\n"
+            "    INTERFACE\n"
+            "      include) # The config file directory\n"
+            "  target_compile_definitions(freertos_config\n"
+            "    PUBLIC\n"
+            "    projCOVERAGE_TEST=0)\n")
+    else()
+        message(WARNING " Using deprecated 'FREERTOS_CONFIG_FILE_DIRECTORY' - please update your project CMakeLists.txt file:\n"
+            "  add_library(freertos_config INTERFACE)\n"
+            "  target_include_directories(freertos_config SYSTEM\n"
+            "    INTERFACE\n"
+            "      include) # The config file directory\n"
+            "  target_compile_definitions(freertos_config\n"
+            "    PUBLIC\n"
+            "    projCOVERAGE_TEST=0)\n")
+    endif()
+endif()
+
+# FreeRTOS port option
+if(NOT FREERTOS_PORT)
+    message(WARNING " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):\n"
+        "  set(FREERTOS_PORT GCC_ARM_CM4F CACHE STRING \"\")\n"
+        " or from CMake command line option:\n"
+        "  -DFREERTOS_PORT=GCC_ARM_CM4F\n"
+        " \n"
+        " Available port options:\n"
+        " A_CUSTOM_PORT                    - Compiler: User Defined  Target: User Defined\n"
+        " BCC_16BIT_DOS_FLSH186            - Compiler: BCC           Target: 16 bit DOS Flsh186\n"
+        " BCC_16BIT_DOS_PC                 - Compiler: BCC           Target: 16 bit DOS PC\n"
+        " CCS_ARM_CM3                      - Compiler: CCS           Target: ARM Cortex-M3\n"
+        " CCS_ARM_CM4F                     - Compiler: CCS           Target: ARM Cortex-M4 with FPU\n"
+        " CCS_ARM_CR4                      - Compiler: CCS           Target: ARM Cortex-R4\n"
+        " CCS_MSP430X                      - Compiler: CCS           Target: MSP430X\n"
+        " CODEWARRIOR_COLDFIRE_V1          - Compiler: CoreWarrior   Target: ColdFire V1\n"
+        " CODEWARRIOR_COLDFIRE_V2          - Compiler: CoreWarrior   Target: ColdFire V2\n"
+        " CODEWARRIOR_HCS12                - Compiler: CoreWarrior   Target: HCS12\n"
+        " GCC_ARM_CA9                      - Compiler: GCC           Target: ARM Cortex-A9\n"
+        " GCC_ARM_AARCH64                  - Compiler: GCC           Target: ARM v8-A\n"
+        " GCC_ARM_AARCH64_SRE              - Compiler: GCC           Target: ARM v8-A SRE\n"
+        " GCC_ARM_CM0                      - Compiler: GCC           Target: ARM Cortex-M0\n"
+        " GCC_ARM_CM3                      - Compiler: GCC           Target: ARM Cortex-M3\n"
+        " GCC_ARM_CM3_MPU                  - Compiler: GCC           Target: ARM Cortex-M3 with MPU\n"
+        " GCC_ARM_CM4_MPU                  - Compiler: GCC           Target: ARM Cortex-M4 with MPU\n"
+        " GCC_ARM_CM4F                     - Compiler: GCC           Target: ARM Cortex-M4 with FPU\n"
+        " GCC_ARM_CM7                      - Compiler: GCC           Target: ARM Cortex-M7\n"
+        " GCC_ARM_CM23_NONSECURE           - Compiler: GCC           Target: ARM Cortex-M23 non-secure\n"
+        " GCC_ARM_CM23_SECURE              - Compiler: GCC           Target: ARM Cortex-M23 secure\n"
+        " GCC_ARM_CM23_NTZ_NONSECURE       - Compiler: GCC           Target: ARM Cortex-M23 non-trustzone non-secure\n"
+        " GCC_ARM_CM33_NONSECURE           - Compiler: GCC           Target: ARM Cortex-M33 non-secure\n"
+        " GCC_ARM_CM33_SECURE              - Compiler: GCC           Target: ARM Cortex-M33 secure\n"
+        " GCC_ARM_CM33_NTZ_NONSECURE       - Compiler: GCC           Target: ARM Cortex-M33 non-trustzone non-secure\n"
+        " GCC_ARM_CM33_TFM                 - Compiler: GCC           Target: ARM Cortex-M33 non-secure for TF-M\n"
+        " GCC_ARM_CM35P_NONSECURE          - Compiler: GCC           Target: ARM Cortex-M35P non-secure\n"
+        " GCC_ARM_CM35P_SECURE             - Compiler: GCC           Target: ARM Cortex-M35P secure\n"
+        " GCC_ARM_CM35P_NTZ_NONSECURE      - Compiler: GCC           Target: ARM Cortex-M35P non-trustzone non-secure\n"
+        " GCC_ARM_CM55_NONSECURE           - Compiler: GCC           Target: ARM Cortex-M55 non-secure\n"
+        " GCC_ARM_CM55_SECURE              - Compiler: GCC           Target: ARM Cortex-M55 secure\n"
+        " GCC_ARM_CM55_NTZ_NONSECURE       - Compiler: GCC           Target: ARM Cortex-M55 non-trustzone non-secure\n"
+        " GCC_ARM_CM55_TFM                 - Compiler: GCC           Target: ARM Cortex-M55 non-secure for TF-M\n"
+        " GCC_ARM_CM85_NONSECURE           - Compiler: GCC           Target: ARM Cortex-M85 non-secure\n"
+        " GCC_ARM_CM85_SECURE              - Compiler: GCC           Target: ARM Cortex-M85 secure\n"
+        " GCC_ARM_CM85_NTZ_NONSECURE       - Compiler: GCC           Target: ARM Cortex-M85 non-trustzone non-secure\n"
+        " GCC_ARM_CM85_TFM                 - Compiler: GCC           Target: ARM Cortex-M85 non-secure for TF-M\n"
+        " GCC_ARM_CR5                      - Compiler: GCC           Target: ARM Cortex-R5\n"
+        " GCC_ARM_CRX_NOGIC                - Compiler: GCC           Target: ARM Cortex-Rx no GIC\n"
+        " GCC_ARM7_AT91FR40008             - Compiler: GCC           Target: ARM7 Atmel AT91R40008\n"
+        " GCC_ARM7_AT91SAM7S               - Compiler: GCC           Target: ARM7 Atmel AT91SAM7S\n"
+        " GCC_ARM7_LPC2000                 - Compiler: GCC           Target: ARM7 LPC2000\n"
+        " GCC_ARM7_LPC23XX                 - Compiler: GCC           Target: ARM7 LPC23xx\n"
+        " GCC_ATMEGA323                    - Compiler: GCC           Target: ATMega323\n"
+        " GCC_AVR32_UC3                    - Compiler: GCC           Target: AVR32 UC3\n"
+        " GCC_COLDFIRE_V2                  - Compiler: GCC           Target: ColdFire V2\n"
+        " GCC_CORTUS_APS3                  - Compiler: GCC           Target: CORTUS APS3\n"
+        " GCC_H8S2329                      - Compiler: GCC           Target: H8S2329\n"
+        " GCC_HCS12                        - Compiler: GCC           Target: HCS12\n"
+        " GCC_IA32_FLAT                    - Compiler: GCC           Target: IA32 flat\n"
+        " GCC_MICROBLAZE                   - Compiler: GCC           Target: MicroBlaze\n"
+        " GCC_MICROBLAZE_V8                - Compiler: GCC           Target: MicroBlaze V8\n"
+        " GCC_MICROBLAZE_V9                - Compiler: GCC           Target: MicroBlaze V9\n"
+        " GCC_MSP430F449                   - Compiler: GCC           Target: MSP430F449\n"
+        " GCC_NIOSII                       - Compiler: GCC           Target: NiosII\n"
+        " GCC_PPC405_XILINX                - Compiler: GCC           Target: Xilinx PPC405\n"
+        " GCC_PPC440_XILINX                - Compiler: GCC           Target: Xilinx PPC440\n"
+        " GCC_RISC_V                       - Compiler: GCC           Target: RISC-V\n"
+        " GCC_RISC_V_PULPINO_VEGA_RV32M1RM - Compiler: GCC           Target: RISC-V Pulpino Vega RV32M1RM\n"
+        " GCC_RISC_V_GENERIC               - Compiler: GCC           Target: RISC-V with FREERTOS_RISCV_EXTENSION\n"
+        " GCC_RL78                         - Compiler: GCC           Target: Renesas RL78\n"
+        " GCC_RX100                        - Compiler: GCC           Target: Renesas RX100\n"
+        " GCC_RX200                        - Compiler: GCC           Target: Renesas RX200\n"
+        " GCC_RX600                        - Compiler: GCC           Target: Renesas RX600\n"
+        " GCC_RX600_V2                     - Compiler: GCC           Target: Renesas RX600 v2\n"
+        " GCC_RX700_V3_DPFPU               - Compiler: GCC           Target: Renesas RX700 v3 with DPFPU\n"
+        " GCC_STR75X                       - Compiler: GCC           Target: STR75x\n"
+        " GCC_TRICORE_1782                 - Compiler: GCC           Target: TriCore 1782\n"
+        " GCC_ARC_EM_HS                    - Compiler: GCC           Target: DesignWare ARC EM HS\n"
+        " GCC_ARC_V1                       - Compiler: GCC           Target: DesignWare ARC v1\n"
+        " GCC_ATMEGA                       - Compiler: GCC           Target: ATmega\n"
+        " GCC_POSIX                        - Compiler: GCC           Target: Posix\n"
+        " GCC_RP2040                       - Compiler: GCC           Target: RP2040 ARM Cortex-M0+\n"
+        " GCC_XTENSA_ESP32                 - Compiler: GCC           Target: Xtensa ESP32\n"
+        " GCC_AVRDX                        - Compiler: GCC           Target: AVRDx\n"
+        " GCC_AVR_MEGA0                    - Compiler: GCC           Target: AVR Mega0\n"
+        " IAR_78K0K                        - Compiler: IAR           Target: Renesas 78K0K\n"
+        " IAR_ARM_CA5_NOGIC                - Compiler: IAR           Target: ARM Cortex-A5 no GIC\n"
+        " IAR_ARM_CA9                      - Compiler: IAR           Target: ARM Cortex-A9\n"
+        " IAR_ARM_CM0                      - Compiler: IAR           Target: ARM Cortex-M0\n"
+        " IAR_ARM_CM3                      - Compiler: IAR           Target: ARM Cortex-M3\n"
+        " IAR_ARM_CM4F                     - Compiler: IAR           Target: ARM Cortex-M4 with FPU\n"
+        " IAR_ARM_CM4F_MPU                 - Compiler: IAR           Target: ARM Cortex-M4 with FPU and MPU\n"
+        " IAR_ARM_CM7                      - Compiler: IAR           Target: ARM Cortex-M7\n"
+        " IAR_ARM_CM23_NONSECURE           - Compiler: IAR           Target: ARM Cortex-M23 non-secure\n"
+        " IAR_ARM_CM23_SECURE              - Compiler: IAR           Target: ARM Cortex-M23 secure\n"
+        " IAR_ARM_CM23_NTZ_NONSECURE       - Compiler: IAR           Target: ARM Cortex-M23 non-trustzone non-secure\n"
+        " IAR_ARM_CM33_NONSECURE           - Compiler: IAR           Target: ARM Cortex-M33 non-secure\n"
+        " IAR_ARM_CM33_SECURE              - Compiler: IAR           Target: ARM Cortex-M33 secure\n"
+        " IAR_ARM_CM33_NTZ_NONSECURE       - Compiler: IAR           Target: ARM Cortex-M33 non-trustzone non-secure\n"
+        " IAR_ARM_CM35P_NONSECURE          - Compiler: IAR           Target: ARM Cortex-M35P non-secure\n"
+        " IAR_ARM_CM35P_SECURE             - Compiler: IAR           Target: ARM Cortex-M35P secure\n"
+        " IAR_ARM_CM35P_NTZ_NONSECURE      - Compiler: IAR           Target: ARM Cortex-M35P non-trustzone non-secure\n"
+        " IAR_ARM_CM55_NONSECURE           - Compiler: IAR           Target: ARM Cortex-M55 non-secure\n"
+        " IAR_ARM_CM55_SECURE              - Compiler: IAR           Target: ARM Cortex-M55 secure\n"
+        " IAR_ARM_CM55_NTZ_NONSECURE       - Compiler: IAR           Target: ARM Cortex-M55 non-trustzone non-secure\n"
+        " IAR_ARM_CM85_NONSECURE           - Compiler: IAR           Target: ARM Cortex-M85 non-secure\n"
+        " IAR_ARM_CM85_SECURE              - Compiler: IAR           Target: ARM Cortex-M85 secure\n"
+        " IAR_ARM_CM85_NTZ_NONSECURE       - Compiler: IAR           Target: ARM Cortex-M85 non-trustzone non-secure\n"
+        " IAR_ARM_CRX_NOGIC                - Compiler: IAR           Target: ARM Cortex-Rx no GIC\n"
+        " IAR_ATMEGA323                    - Compiler: IAR           Target: ATMega323\n"
+        " IAR_ATMEL_SAM7S64                - Compiler: IAR           Target: Atmel SAM7S64\n"
+        " IAR_ATMEL_SAM9XE                 - Compiler: IAR           Target: Atmel SAM9XE\n"
+        " IAR_AVR_AVRDX                    - Compiler: IAR           Target: AVRDx\n"
+        " IAR_AVR_MEGA0                    - Compiler: IAR           Target: AVR Mega0\n"
+        " IAR_AVR32_UC3                    - Compiler: IAR           Target: AVR32 UC3\n"
+        " IAR_LPC2000                      - Compiler: IAR           Target: LPC2000\n"
+        " IAR_MSP430                       - Compiler: IAR           Target: MSP430\n"
+        " IAR_MSP430X                      - Compiler: IAR           Target: MSP430X\n"
+        " IAR_RISC_V                       - Compiler: IAR           Target: RISC-V\n"
+        " IAR_RISC_V_GENERIC               - Compiler: IAR           Target: RISC-V with FREERTOS_RISCV_EXTENSION\n"
+        " IAR_RL78                         - Compiler: IAR           Target: Renesas RL78\n"
+        " IAR_RX100                        - Compiler: IAR           Target: Renesas RX100\n"
+        " IAR_RX600                        - Compiler: IAR           Target: Renesas RX600\n"
+        " IAR_RX700_V3_DPFPU               - Compiler: IAR           Target: Renesas RX700 v3 with DPFPU\n"
+        " IAR_RX_V2                        - Compiler: IAR           Target: Renesas RX v2\n"
+        " IAR_STR71X                       - Compiler: IAR           Target: STR71x\n"
+        " IAR_STR75X                       - Compiler: IAR           Target: STR75x\n"
+        " IAR_STR91X                       - Compiler: IAR           Target: STR91x\n"
+        " IAR_V850ES_FX3                   - Compiler: IAR           Target: Renesas V850ES/Fx3\n"
+        " IAR_V850ES_HX3                   - Compiler: IAR           Target: Renesas V850ES/Hx3\n"
+        " MIKROC_ARM_CM4F                  - Compiler: MikroC        Target: ARM Cortex-M4 with FPU\n"
+        " MPLAB_PIC18F                     - Compiler: MPLAB         Target: PIC18F\n"
+        " MPLAB_PIC24                      - Compiler: MPLAB         Target: PIC24\n"
+        " MPLAB_PIC32MEC14XX               - Compiler: MPLAB         Target: PIC32MEC14xx\n"
+        " MPLAB_PIC32MX                    - Compiler: MPLAB         Target: PIC32MX\n"
+        " MPLAB_PIC32MZ                    - Compiler: MPLAB         Target: PIC32MZ\n"
+        " MSVC_MINGW                       - Compiler: MSVC or MinGW Target: x86\n"
+        " OWATCOM_16BIT_DOS_FLSH186        - Compiler: Open Watcom   Target: 16 bit DOS Flsh186\n"
+        " OWATCOM_16BIT_DOS_PC             - Compiler: Open Watcom   Target: 16 bit DOS PC\n"
+        " PARADIGM_TERN_EE_LARGE           - Compiler: Paradigm      Target: Tern EE large\n"
+        " PARADIGM_TERN_EE_SMALL           - Compiler: Paradigm      Target: Tern EE small\n"
+        " RENESAS_RX100                    - Compiler: Renesas       Target: RX100\n"
+        " RENESAS_RX200                    - Compiler: Renesas       Target: RX200\n"
+        " RENESAS_RX600                    - Compiler: Renesas       Target: RX600\n"
+        " RENESAS_RX600_V2                 - Compiler: Renesas       Target: RX600 v2\n"
+        " RENESAS_RX700_V3_DPFPU           - Compiler: Renesas       Target: RX700 v3 with DPFPU\n"
+        " RENESAS_SH2A_FPU                 - Compiler: Renesas       Target: SH2A with FPU\n"
+        " ROWLEY_MSP430F449                - Compiler: Rowley        Target: MSP430F449\n"
+        " RVDS_ARM_CA9                     - Compiler: RVDS          Target: ARM Cortex-A9\n"
+        " RVDS_ARM_CM0                     - Compiler: RVDS          Target: ARM Cortex-M0\n"
+        " RVDS_ARM_CM3                     - Compiler: RVDS          Target: ARM Cortex-M3\n"
+        " RVDS_ARM_CM4_MPU                 - Compiler: RVDS          Target: ARM Cortex-M4 with MPU\n"
+        " RVDS_ARM_CM4F                    - Compiler: RVDS          Target: ARM Cortex-M4 with FPU\n"
+        " RVDS_ARM_CM7                     - Compiler: RVDS          Target: ARM Cortex-M7\n"
+        " RVDS_ARM7_LPC21XX                - Compiler: RVDS          Target: ARM7 LPC21xx\n"
+        " SDCC_CYGNAL                      - Compiler: SDCC          Target: Cygnal\n"
+        " SOFTUNE_MB91460                  - Compiler: Softune       Target: MB91460\n"
+        " SOFTUNE_MB96340                  - Compiler: Softune       Target: MB96340\n"
+        " TASKING_ARM_CM4F                 - Compiler: Tasking       Target: ARM Cortex-M4 with FPU\n"
+        " TEMPLATE                         - Compiler: HOST          Target: None\n"
+        " CDK_THEAD_CK802                  - Compiler: CDK           Target: T-head CK802\n"
+        " XCC_XTENSA                       - Compiler: XCC           Target: Xtensa\n"
+        " WIZC_PIC18                       - Compiler: WizC          Target: PIC18")
+    # Native FREERTOS_PORT for Linux and Windows MINGW builds
+    if(UNIX)
+        message(STATUS " Auto-Detected Unix, setting FREERTOS_PORT=GCC_POSIX")
+        set(FREERTOS_PORT GCC_POSIX CACHE STRING "FreeRTOS port name")
+    elseif(MINGW)
+        message(STATUS " Auto-Detected MINGW, setting FREERTOS_PORT=MSVC_MINGW")
+        set(FREERTOS_PORT MSVC_MINGW CACHE STRING "FreeRTOS port name")
+    endif()
+elseif((FREERTOS_PORT STREQUAL "A_CUSTOM_PORT") AND (NOT TARGET freertos_kernel_port) )
+    message(FATAL_ERROR " FREERTOS_PORT is set to A_CUSTOM_PORT. Please specify the custom port target with all necessary files. For example:\n"
+    " Assuming a directory of:\n"
+    "  FreeRTOSCustomPort/\n"
+    "    CMakeLists.txt\n"
+    "    port.c\n"
+    "    portmacro.h\n"
+    " Where FreeRTOSCustomPort/CMakeLists.txt is a modified version of:\n"
+    "   add_library(freertos_kernel_port STATIC)\n"
+    "   target_sources(freertos_kernel_port\n"
+    "     PRIVATE\n"
+    "       port.c\n"
+    "       portmacro.h)\n"
+    "   target_include_directories(freertos_kernel_port\n"
+    "     PUBLIC\n"
+    "      .)\n"
+    "   target_link_libraries(freertos_kernel_port\n"
+    "     PRIVATE\n"
+    "       freertos_kernel_include)")
+endif()
+
+add_library(freertos_kernel STATIC)
+
+########################################################################
+add_subdirectory(include)
+add_subdirectory(portable)
+
+target_sources(freertos_kernel PRIVATE
+    croutine.c
+    event_groups.c
+    list.c
+    queue.c
+    stream_buffer.c
+    tasks.c
+    timers.c
+)
+
+if (DEFINED FREERTOS_HEAP )
+    # User specified a heap implementation add heap implementation to freertos_kernel.
+    target_sources(freertos_kernel PRIVATE
+        # If FREERTOS_HEAP is digit between 1 .. 5 - it is heap number, otherwise - it is path to custom heap source file
+        $<IF:$<BOOL:$<FILTER:${FREERTOS_HEAP},EXCLUDE,^[1-5]$>>,${FREERTOS_HEAP},portable/MemMang/heap_${FREERTOS_HEAP}.c>
+    )
+endif()
+
+
+target_link_libraries(freertos_kernel
+    PUBLIC
+        freertos_kernel_port
+        freertos_kernel_include
+)
+
+########################################################################

GitHub-FreeRTOS-Kernel-Home.url

@@ -0,0 +1,7 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop3=19,2
+[InternetShortcut]
+URL=https://github.com/FreeRTOS/FreeRTOS-Kernel
+IconIndex=0
+IDList=
+HotKey=0

LICENSE.md

@@ -0,0 +1,19 @@
+MIT License
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.

License/license.txt

@@ -1,37 +0,0 @@
-The FreeRTOS kernel is released under the MIT open source license, the text of
-which is provided below.
-
-This license covers the FreeRTOS kernel source files, which are located in the
-/FreeRTOS/Source directory of the official FreeRTOS kernel download.  It also
-covers most of the source files in the demo application projects, which are
-located in the /FreeRTOS/Demo directory of the official FreeRTOS download.  The
-demo projects may also include third party software that is not part of FreeRTOS
-and is licensed separately to FreeRTOS.  Examples of third party software
-includes header files provided by chip or tools vendors, linker scripts,
-peripheral drivers, etc.  All the software in subdirectories of the /FreeRTOS
-directory is either open source or distributed with permission, and is free for
-use.  For the avoidance of doubt, refer to the comments at the top of each
-source file.
-
-
-License text:
--------------
-
-Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
-Permission is hereby granted, free of charge, to any person obtaining a copy of
-this software and associated documentation files (the "Software"), to deal in
-the Software without restriction, including without limitation the rights to
-use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
-the Software, and to permit persons to whom the Software is furnished to do so,
-subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in all
-copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
-FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-

MISRA.md

@@ -0,0 +1,118 @@
+# MISRA Compliance
+
+FreeRTOS-Kernel conforms to [MISRA C:2012](https://www.misra.org.uk/misra-c)
+guidelines, with the deviations listed below. Compliance is checked with
+Coverity static analysis. Since the FreeRTOS kernel is designed for
+small-embedded devices, it needs to have a very small memory footprint and
+has to be efficient. To achieve that and to increase the performance, it
+deviates from some MISRA rules. The specific deviations, suppressed inline,
+are listed below.
+
+Additionally, [MISRA configuration file](examples/coverity/coverity_misra.config)
+contains project wide deviations.
+
+### Suppressed with Coverity Comments
+To find the violation references in the source files run grep on the source code
+with ( Assuming rule 8.4 violation; with justification in point 1 ):
+```
+grep 'MISRA Ref 8.4.1' . -rI
+```
+
+#### Rule 8.4
+
+MISRA C:2012 Rule 8.4: A compatible declaration shall be visible when an
+object or function with external linkage is defined.
+
+_Ref 8.4.1_
+ - pxCurrentTCB(s) is defined with external linkage but it is only referenced
+   from the assembly code in the port files. Therefore, adding a declaration in
+   header file is not useful as the assembly code will still need to declare it
+   separately.
+
+_Ref 8.4.2_
+ - xQueueRegistry is defined with external linkage because it is accessed by the
+   kernel unit tests. It is not meant to be directly accessed by the application
+   and therefore, not declared in a header file.
+
+#### Rule 8.6
+
+MISRA C:2012 Rule 8.6: An identifier with external linkage shall have exactly
+one external definition.
+
+_Ref 8.6.1_
+ - This rule prohibits an identifier with external linkage to have multiple
+   definitions or no definition. FreeRTOS hook functions are implemented in
+   the application and therefore, have no definition in the Kernel code.
+
+#### Rule 11.1
+MISRA C:2012 Rule 11.1: Conversions shall not be performed between a pointer to
+function and any other type.
+
+_Ref 11.1.1_
+ - The pointer to function is casted into void to avoid unused parameter
+   compiler warning when Stream Buffer's Tx and Rx Completed callback feature is
+   not used.
+
+#### Rule 11.3
+
+MISRA C:2012 Rule 11.3: A cast shall not be performed between a pointer to
+object type and a pointer to a different object type.
+
+_Ref 11.3.1_
+ - This rule prohibits casting a pointer to object into a pointer to a
+   different object because it may result in an incorrectly aligned pointer,
+   leading to undefined behavior. Even if the casting produces a correctly
+   aligned pointer, the behavior may be still undefined if the pointer is
+   used to access an object. FreeRTOS deliberately creates external aliases
+   for all the kernel object types (StaticEventGroup_t, StaticQueue_t,
+   StaticStreamBuffer_t, StaticTimer_t and StaticTask_t) for data hiding
+   purposes. The internal object types and the corresponding external
+   aliases are guaranteed to have the same size and alignment which is
+   checked using configASSERT.
+
+
+#### Rule 11.5
+
+MISRA C:2012 Rule 11.5: A conversion should not be performed from pointer to
+void into pointer to object.
+This rule prohibits conversion of a pointer to void into a pointer to
+object because it may result in an incorrectly aligned pointer leading
+to undefined behavior.
+
+_Ref 11.5.1_
+ - The memory blocks returned by pvPortMalloc() are guaranteed to meet the
+   architecture alignment requirements specified by portBYTE_ALIGNMENT.
+   The casting of the pointer to void returned by pvPortMalloc() is,
+   therefore, safe because it is guaranteed to be aligned.
+
+_Ref 11.5.2_
+ - The conversion from a pointer to void into a pointer to EventGroup_t is
+   safe because it is a pointer to EventGroup_t, which is returned to the
+   application at the time of event group creation for data hiding
+   purposes.
+
+_Ref 11.5.3_
+ - The conversion from a pointer to void in list macros for list item owner
+   is safe because the type of the pointer stored and retrieved is the
+   same.
+
+_Ref 11.5.4_
+ - The conversion from a pointer to void into a pointer to EventGroup_t is
+   safe because it is a pointer to EventGroup_t, which is passed as a
+   parameter to the xTimerPendFunctionCallFromISR API when the callback is
+   pended.
+
+_Ref 11.5.5_
+ - The conversion from a pointer to void into a pointer to uint8_t is safe
+   because data storage buffers are implemented as uint8_t arrays for the
+   ease of sizing, alignment and access.
+
+#### Rule 21.6
+
+MISRA C-2012 Rule 21.6: The Standard Library input/output functions shall not
+be used.
+
+_Ref 21.6.1_
+ - The Standard Library function snprintf is used in vTaskListTasks and
+   vTaskGetRunTimeStatistics APIs, both of which are utility functions only and
+   are not considered part of core kernel implementation.

Quick_Start_Guide.url

@@ -1,5 +1,5 @@
-[InternetShortcut]
-URL=http://www.freertos.org/FreeRTOS-quick-start-guide.html
-IDList=
-[{000214A0-0000-0000-C000-000000000046}]
-Prop3=19,2
+[InternetShortcut]
+URL=https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html
+IDList=
+[{000214A0-0000-0000-C000-000000000046}]
+Prop3=19,2

README.md

@@ -0,0 +1,182 @@
+[![CMock Unit Tests](https://github.com/FreeRTOS/FreeRTOS-Kernel/actions/workflows/unit-tests.yml/badge.svg?branch=main&event=push)](https://github.com/FreeRTOS/FreeRTOS-Kernel/actions/workflows/unit-tests.yml?query=branch%3Amain+event%3Apush+workflow%3A%22CMock+Unit+Tests%22++)
+[![codecov](https://codecov.io/gh/FreeRTOS/FreeRTOS-Kernel/badge.svg?branch=main)](https://codecov.io/gh/FreeRTOS/FreeRTOS-Kernel)
+
+## Getting started
+
+This repository contains FreeRTOS kernel source/header files and kernel
+ports only. This repository is referenced as a submodule in
+[FreeRTOS/FreeRTOS](https://github.com/FreeRTOS/FreeRTOS)
+repository, which contains pre-configured demo application projects under
+```FreeRTOS/Demo``` directory.
+
+The easiest way to use FreeRTOS is to start with one of the pre-configured demo
+application projects.  That way you will have the correct FreeRTOS source files
+included, and the correct include paths configured. Once a demo application is
+building and executing you can remove the demo application files, and start to
+add in your own application source files.  See the
+[FreeRTOS Kernel Quick Start Guide](https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html)
+for detailed instructions and other useful links.
+
+Additionally, for FreeRTOS kernel feature information refer to the
+[Developer Documentation](https://www.FreeRTOS.org/features.html),
+and [API Reference](https://www.FreeRTOS.org/a00106.html).
+
+Also for contributing and creating a Pull Request please refer to
+[the instructions here](.github/CONTRIBUTING.md#contributing-via-pull-request).
+
+### Getting help
+
+If you have any questions or need assistance troubleshooting your FreeRTOS project,
+we have an active community that can help on the
+[FreeRTOS Community Support Forum](https://forums.freertos.org).
+
+## To consume FreeRTOS-Kernel
+
+### Consume with CMake
+
+If using CMake, it is recommended to use this repository using FetchContent.
+Add the following into your project's main or a subdirectory's `CMakeLists.txt`:
+
+- Define the source and version/tag you want to use:
+
+```cmake
+FetchContent_Declare( freertos_kernel
+  GIT_REPOSITORY https://github.com/FreeRTOS/FreeRTOS-Kernel.git
+  GIT_TAG        main #Note: Best practice to use specific git-hash or tagged version
+)
+```
+
+In case you prefer to add it as a git submodule, do:
+
+```bash
+git submodule add https://github.com/FreeRTOS/FreeRTOS-Kernel.git <path of the submodule>
+git submodule update --init
+```
+
+- Add a freertos_config library (typically an INTERFACE library) The following assumes the directory structure:
+  - `include/FreeRTOSConfig.h`
+
+```cmake
+add_library(freertos_config INTERFACE)
+
+target_include_directories(freertos_config SYSTEM
+INTERFACE
+    include
+)
+
+target_compile_definitions(freertos_config
+  INTERFACE
+    projCOVERAGE_TEST=0
+)
+```
+
+In case you installed FreeRTOS-Kernel as a submodule, you will have to add it as a subdirectory:
+
+```cmake
+add_subdirectory(${FREERTOS_PATH})
+```
+
+- Configure the FreeRTOS-Kernel and make it available
+  - this particular example supports a native and cross-compiled build option.
+
+```cmake
+set( FREERTOS_HEAP "4" CACHE STRING "" FORCE)
+# Select the native compile PORT
+set( FREERTOS_PORT "GCC_POSIX" CACHE STRING "" FORCE)
+# Select the cross-compile PORT
+if (CMAKE_CROSSCOMPILING)
+  set(FREERTOS_PORT "GCC_ARM_CA9" CACHE STRING "" FORCE)
+endif()
+
+FetchContent_MakeAvailable(freertos_kernel)
+```
+
+- In case of cross compilation, you should also add the following to `freertos_config`:
+
+```cmake
+target_compile_definitions(freertos_config INTERFACE ${definitions})
+target_compile_options(freertos_config INTERFACE ${options})
+```
+
+### Consuming stand-alone - Cloning this repository
+
+To clone using HTTPS:
+
+```
+git clone https://github.com/FreeRTOS/FreeRTOS-Kernel.git
+```
+
+Using SSH:
+
+```
+git clone git@github.com:FreeRTOS/FreeRTOS-Kernel.git
+```
+
+## Repository structure
+
+- The root of this repository contains the three files that are common to
+every port - list.c, queue.c and tasks.c.  The kernel is contained within these
+three files.  croutine.c implements the optional co-routine functionality - which
+is normally only used on very memory limited systems.
+
+- The ```./portable``` directory contains the files that are specific to a particular microcontroller and/or compiler.
+See the readme file in the ```./portable``` directory for more information.
+
+- The ```./include``` directory contains the real time kernel header files.
+
+- The ```./template_configuration``` directory contains a sample `FreeRTOSConfig.h` to help jumpstart a new project.
+See the [FreeRTOSConfig.h](examples/template_configuration/FreeRTOSConfig.h) file for instructions.
+
+### Code Formatting
+
+FreeRTOS files are formatted using the
+"[uncrustify](https://github.com/uncrustify/uncrustify)" tool.
+The configuration file used by uncrustify can be found in the
+[FreeRTOS/CI-CD-GitHub-Actions's](https://github.com/FreeRTOS/CI-CD-Github-Actions)
+[uncrustify.cfg](https://github.com/FreeRTOS/CI-CD-Github-Actions/tree/main/formatting)
+file.
+
+### Line Endings
+
+File checked into the FreeRTOS-Kernel repository use unix-style LF line endings
+for the best compatibility with git.
+
+For optimal compatibility with Microsoft Windows tools, it is best to enable
+the git autocrlf feature. You can enable this setting for the current
+repository using the following command:
+
+```
+git config core.autocrlf true
+```
+
+### Git History Optimizations
+
+Some commits in this repository perform large refactors which touch many lines
+and lead to unwanted behavior when using the `git blame` command. You can
+configure git to ignore the list of large refactor commits in this repository
+with the following command:
+
+```
+git config blame.ignoreRevsFile .git-blame-ignore-revs
+```
+
+### Spelling and Formatting
+
+We recommend using [Visual Studio Code](https://code.visualstudio.com),
+commonly referred to as VSCode, when working on the FreeRTOS-Kernel.
+The FreeRTOS-Kernel also uses [cSpell](https://cspell.org/) as part of its
+spelling check. The config file for which can be found at [cspell.config.yaml](cspell.config.yaml)
+There is additionally a
+[cSpell plugin for VSCode](https://marketplace.visualstudio.com/items?itemName=streetsidesoftware.code-spell-checker)
+that can be used as well.
+*[.cSpellWords.txt](.github/.cSpellWords.txt)* contains words that are not
+traditionally found in an English dictionary. It is used by the spellchecker
+to verify the various jargon, variable names, and other odd words used in the
+FreeRTOS code base are correct. If your pull request fails to pass the spelling
+and you believe this is a mistake, then add the word to
+*[.cSpellWords.txt](.github/.cSpellWords.txt)*. When adding a word please
+then sort the list, which can be done by running the bash command:
+`sort -u .cSpellWords.txt -o .cSpellWords.txt`
+Note that only the FreeRTOS-Kernel Source Files, [include](include),
+[portable/MemMang](portable/MemMang), and [portable/Common](portable/Common)
+files are checked for proper spelling, and formatting at this time.

croutine.c

@@ -1,353 +1,382 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#include "FreeRTOS.h"
-#include "task.h"
-#include "croutine.h"
-
-/* Remove the whole file is co-routines are not being used. */
-#if( configUSE_CO_ROUTINES != 0 )
-
-/*
- * Some kernel aware debuggers require data to be viewed to be global, rather
- * than file scope.
- */
-#ifdef portREMOVE_STATIC_QUALIFIER
-	#define static
-#endif
-
-
-/* Lists for ready and blocked co-routines. --------------------*/
-static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ];	/*< Prioritised ready co-routines. */
-static List_t xDelayedCoRoutineList1;									/*< Delayed co-routines. */
-static List_t xDelayedCoRoutineList2;									/*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
-static List_t * pxDelayedCoRoutineList;									/*< Points to the delayed co-routine list currently being used. */
-static List_t * pxOverflowDelayedCoRoutineList;							/*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
-static List_t xPendingReadyCoRoutineList;								/*< Holds co-routines that have been readied by an external event.  They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
-
-/* Other file private variables. --------------------------------*/
-CRCB_t * pxCurrentCoRoutine = NULL;
-static UBaseType_t uxTopCoRoutineReadyPriority = 0;
-static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
-
-/* The initial state of the co-routine when it is created. */
-#define corINITIAL_STATE	( 0 )
-
-/*
- * Place the co-routine represented by pxCRCB into the appropriate ready queue
- * for the priority.  It is inserted at the end of the list.
- *
- * This macro accesses the co-routine ready lists and therefore must not be
- * used from within an ISR.
- */
-#define prvAddCoRoutineToReadyQueue( pxCRCB )																		\
-{																													\
-	if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority )															\
-	{																												\
-		uxTopCoRoutineReadyPriority = pxCRCB->uxPriority;															\
-	}																												\
-	vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) );	\
-}
-
-/*
- * Utility to ready all the lists used by the scheduler.  This is called
- * automatically upon the creation of the first co-routine.
- */
-static void prvInitialiseCoRoutineLists( void );
-
-/*
- * Co-routines that are readied by an interrupt cannot be placed directly into
- * the ready lists (there is no mutual exclusion).  Instead they are placed in
- * in the pending ready list in order that they can later be moved to the ready
- * list by the co-routine scheduler.
- */
-static void prvCheckPendingReadyList( void );
-
-/*
- * Macro that looks at the list of co-routines that are currently delayed to
- * see if any require waking.
- *
- * Co-routines are stored in the queue in the order of their wake time -
- * meaning once one co-routine has been found whose timer has not expired
- * we need not look any further down the list.
- */
-static void prvCheckDelayedList( void );
-
-/*-----------------------------------------------------------*/
-
-BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex )
-{
-BaseType_t xReturn;
-CRCB_t *pxCoRoutine;
-
-	/* Allocate the memory that will store the co-routine control block. */
-	pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) );
-	if( pxCoRoutine )
-	{
-		/* If pxCurrentCoRoutine is NULL then this is the first co-routine to
-		be created and the co-routine data structures need initialising. */
-		if( pxCurrentCoRoutine == NULL )
-		{
-			pxCurrentCoRoutine = pxCoRoutine;
-			prvInitialiseCoRoutineLists();
-		}
-
-		/* Check the priority is within limits. */
-		if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES )
-		{
-			uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1;
-		}
-
-		/* Fill out the co-routine control block from the function parameters. */
-		pxCoRoutine->uxState = corINITIAL_STATE;
-		pxCoRoutine->uxPriority = uxPriority;
-		pxCoRoutine->uxIndex = uxIndex;
-		pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode;
-
-		/* Initialise all the other co-routine control block parameters. */
-		vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) );
-		vListInitialiseItem( &( pxCoRoutine->xEventListItem ) );
-
-		/* Set the co-routine control block as a link back from the ListItem_t.
-		This is so we can get back to the containing CRCB from a generic item
-		in a list. */
-		listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );
-		listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );
-
-		/* Event lists are always in priority order. */
-		listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) );
-
-		/* Now the co-routine has been initialised it can be added to the ready
-		list at the correct priority. */
-		prvAddCoRoutineToReadyQueue( pxCoRoutine );
-
-		xReturn = pdPASS;
-	}
-	else
-	{
-		xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
-	}
-
-	return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList )
-{
-TickType_t xTimeToWake;
-
-	/* Calculate the time to wake - this may overflow but this is
-	not a problem. */
-	xTimeToWake = xCoRoutineTickCount + xTicksToDelay;
-
-	/* We must remove ourselves from the ready list before adding
-	ourselves to the blocked list as the same list item is used for
-	both lists. */
-	( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
-
-	/* The list item will be inserted in wake time order. */
-	listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake );
-
-	if( xTimeToWake < xCoRoutineTickCount )
-	{
-		/* Wake time has overflowed.  Place this item in the
-		overflow list. */
-		vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
-	}
-	else
-	{
-		/* The wake time has not overflowed, so we can use the
-		current block list. */
-		vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
-	}
-
-	if( pxEventList )
-	{
-		/* Also add the co-routine to an event list.  If this is done then the
-		function must be called with interrupts disabled. */
-		vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) );
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckPendingReadyList( void )
-{
-	/* Are there any co-routines waiting to get moved to the ready list?  These
-	are co-routines that have been readied by an ISR.  The ISR cannot access
-	the	ready lists itself. */
-	while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE )
-	{
-		CRCB_t *pxUnblockedCRCB;
-
-		/* The pending ready list can be accessed by an ISR. */
-		portDISABLE_INTERRUPTS();
-		{
-			pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) );
-			( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
-		}
-		portENABLE_INTERRUPTS();
-
-		( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) );
-		prvAddCoRoutineToReadyQueue( pxUnblockedCRCB );
-	}
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckDelayedList( void )
-{
-CRCB_t *pxCRCB;
-
-	xPassedTicks = xTaskGetTickCount() - xLastTickCount;
-	while( xPassedTicks )
-	{
-		xCoRoutineTickCount++;
-		xPassedTicks--;
-
-		/* If the tick count has overflowed we need to swap the ready lists. */
-		if( xCoRoutineTickCount == 0 )
-		{
-			List_t * pxTemp;
-
-			/* Tick count has overflowed so we need to swap the delay lists.  If there are
-			any items in pxDelayedCoRoutineList here then there is an error! */
-			pxTemp = pxDelayedCoRoutineList;
-			pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList;
-			pxOverflowDelayedCoRoutineList = pxTemp;
-		}
-
-		/* See if this tick has made a timeout expire. */
-		while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE )
-		{
-			pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );
-
-			if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) )
-			{
-				/* Timeout not yet expired. */
-				break;
-			}
-
-			portDISABLE_INTERRUPTS();
-			{
-				/* The event could have occurred just before this critical
-				section.  If this is the case then the generic list item will
-				have been moved to the pending ready list and the following
-				line is still valid.  Also the pvContainer parameter will have
-				been set to NULL so the following lines are also valid. */
-				( void ) uxListRemove( &( pxCRCB->xGenericListItem ) );
-
-				/* Is the co-routine waiting on an event also? */
-				if( pxCRCB->xEventListItem.pxContainer )
-				{
-					( void ) uxListRemove( &( pxCRCB->xEventListItem ) );
-				}
-			}
-			portENABLE_INTERRUPTS();
-
-			prvAddCoRoutineToReadyQueue( pxCRCB );
-		}
-	}
-
-	xLastTickCount = xCoRoutineTickCount;
-}
-/*-----------------------------------------------------------*/
-
-void vCoRoutineSchedule( void )
-{
-	/* See if any co-routines readied by events need moving to the ready lists. */
-	prvCheckPendingReadyList();
-
-	/* See if any delayed co-routines have timed out. */
-	prvCheckDelayedList();
-
-	/* Find the highest priority queue that contains ready co-routines. */
-	while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) )
-	{
-		if( uxTopCoRoutineReadyPriority == 0 )
-		{
-			/* No more co-routines to check. */
-			return;
-		}
-		--uxTopCoRoutineReadyPriority;
-	}
-
-	/* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines
-	 of the	same priority get an equal share of the processor time. */
-	listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) );
-
-	/* Call the co-routine. */
-	( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex );
-
-	return;
-}
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseCoRoutineLists( void )
-{
-UBaseType_t uxPriority;
-
-	for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ )
-	{
-		vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );
-	}
-
-	vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 );
-	vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 );
-	vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList );
-
-	/* Start with pxDelayedCoRoutineList using list1 and the
-	pxOverflowDelayedCoRoutineList using list2. */
-	pxDelayedCoRoutineList = &xDelayedCoRoutineList1;
-	pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2;
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList )
-{
-CRCB_t *pxUnblockedCRCB;
-BaseType_t xReturn;
-
-	/* This function is called from within an interrupt.  It can only access
-	event lists and the pending ready list.  This function assumes that a
-	check has already been made to ensure pxEventList is not empty. */
-	pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
-	( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
-	vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );
-
-	if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority )
-	{
-		xReturn = pdTRUE;
-	}
-	else
-	{
-		xReturn = pdFALSE;
-	}
-
-	return xReturn;
-}
-
-#endif /* configUSE_CO_ROUTINES == 0 */
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#include "FreeRTOS.h"
+#include "task.h"
+#include "croutine.h"
+
+/* Remove the whole file is co-routines are not being used. */
+#if ( configUSE_CO_ROUTINES != 0 )
+
+/*
+ * Some kernel aware debuggers require data to be viewed to be global, rather
+ * than file scope.
+ */
+    #ifdef portREMOVE_STATIC_QUALIFIER
+        #define static
+    #endif
+
+
+/* Lists for ready and blocked co-routines. --------------------*/
+    static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /**< Prioritised ready co-routines. */
+    static List_t xDelayedCoRoutineList1;                                   /**< Delayed co-routines. */
+    static List_t xDelayedCoRoutineList2;                                   /**< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
+    static List_t * pxDelayedCoRoutineList = NULL;                          /**< Points to the delayed co-routine list currently being used. */
+    static List_t * pxOverflowDelayedCoRoutineList = NULL;                  /**< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
+    static List_t xPendingReadyCoRoutineList;                               /**< Holds co-routines that have been readied by an external event.  They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
+
+/* Other file private variables. --------------------------------*/
+    CRCB_t * pxCurrentCoRoutine = NULL;
+    static UBaseType_t uxTopCoRoutineReadyPriority = 0;
+    static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
+
+/* The initial state of the co-routine when it is created. */
+    #define corINITIAL_STATE    ( 0 )
+
+/*
+ * Place the co-routine represented by pxCRCB into the appropriate ready queue
+ * for the priority.  It is inserted at the end of the list.
+ *
+ * This macro accesses the co-routine ready lists and therefore must not be
+ * used from within an ISR.
+ */
+    #define prvAddCoRoutineToReadyQueue( pxCRCB )                                                                               \
+    do {                                                                                                                        \
+        if( ( pxCRCB )->uxPriority > uxTopCoRoutineReadyPriority )                                                              \
+        {                                                                                                                       \
+            uxTopCoRoutineReadyPriority = ( pxCRCB )->uxPriority;                                                               \
+        }                                                                                                                       \
+        vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ ( pxCRCB )->uxPriority ] ), &( ( pxCRCB )->xGenericListItem ) ); \
+    } while( 0 )
+
+/*
+ * Utility to ready all the lists used by the scheduler.  This is called
+ * automatically upon the creation of the first co-routine.
+ */
+    static void prvInitialiseCoRoutineLists( void );
+
+/*
+ * Co-routines that are readied by an interrupt cannot be placed directly into
+ * the ready lists (there is no mutual exclusion).  Instead they are placed in
+ * in the pending ready list in order that they can later be moved to the ready
+ * list by the co-routine scheduler.
+ */
+    static void prvCheckPendingReadyList( void );
+
+/*
+ * Macro that looks at the list of co-routines that are currently delayed to
+ * see if any require waking.
+ *
+ * Co-routines are stored in the queue in the order of their wake time -
+ * meaning once one co-routine has been found whose timer has not expired
+ * we need not look any further down the list.
+ */
+    static void prvCheckDelayedList( void );
+
+/*-----------------------------------------------------------*/
+
+    BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
+                                 UBaseType_t uxPriority,
+                                 UBaseType_t uxIndex )
+    {
+        BaseType_t xReturn;
+        CRCB_t * pxCoRoutine;
+
+        traceENTER_xCoRoutineCreate( pxCoRoutineCode, uxPriority, uxIndex );
+
+        /* Allocate the memory that will store the co-routine control block. */
+        /* MISRA Ref 11.5.1 [Malloc memory assignment] */
+        /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
+        /* coverity[misra_c_2012_rule_11_5_violation] */
+        pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) );
+
+        if( pxCoRoutine )
+        {
+            /* If pxCurrentCoRoutine is NULL then this is the first co-routine to
+            * be created and the co-routine data structures need initialising. */
+            if( pxCurrentCoRoutine == NULL )
+            {
+                pxCurrentCoRoutine = pxCoRoutine;
+                prvInitialiseCoRoutineLists();
+            }
+
+            /* Check the priority is within limits. */
+            if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES )
+            {
+                uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1;
+            }
+
+            /* Fill out the co-routine control block from the function parameters. */
+            pxCoRoutine->uxState = corINITIAL_STATE;
+            pxCoRoutine->uxPriority = uxPriority;
+            pxCoRoutine->uxIndex = uxIndex;
+            pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode;
+
+            /* Initialise all the other co-routine control block parameters. */
+            vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) );
+            vListInitialiseItem( &( pxCoRoutine->xEventListItem ) );
+
+            /* Set the co-routine control block as a link back from the ListItem_t.
+             * This is so we can get back to the containing CRCB from a generic item
+             * in a list. */
+            listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );
+            listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );
+
+            /* Event lists are always in priority order. */
+            listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) );
+
+            /* Now the co-routine has been initialised it can be added to the ready
+             * list at the correct priority. */
+            prvAddCoRoutineToReadyQueue( pxCoRoutine );
+
+            xReturn = pdPASS;
+        }
+        else
+        {
+            xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
+        }
+
+        traceRETURN_xCoRoutineCreate( xReturn );
+
+        return xReturn;
+    }
+/*-----------------------------------------------------------*/
+
+    void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
+                                     List_t * pxEventList )
+    {
+        TickType_t xTimeToWake;
+
+        traceENTER_vCoRoutineAddToDelayedList( xTicksToDelay, pxEventList );
+
+        /* Calculate the time to wake - this may overflow but this is
+         * not a problem. */
+        xTimeToWake = xCoRoutineTickCount + xTicksToDelay;
+
+        /* We must remove ourselves from the ready list before adding
+         * ourselves to the blocked list as the same list item is used for
+         * both lists. */
+        ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
+
+        /* The list item will be inserted in wake time order. */
+        listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake );
+
+        if( xTimeToWake < xCoRoutineTickCount )
+        {
+            /* Wake time has overflowed.  Place this item in the
+             * overflow list. */
+            vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
+        }
+        else
+        {
+            /* The wake time has not overflowed, so we can use the
+             * current block list. */
+            vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
+        }
+
+        if( pxEventList )
+        {
+            /* Also add the co-routine to an event list.  If this is done then the
+             * function must be called with interrupts disabled. */
+            vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) );
+        }
+
+        traceRETURN_vCoRoutineAddToDelayedList();
+    }
+/*-----------------------------------------------------------*/
+
+    static void prvCheckPendingReadyList( void )
+    {
+        /* Are there any co-routines waiting to get moved to the ready list?  These
+         * are co-routines that have been readied by an ISR.  The ISR cannot access
+         * the ready lists itself. */
+        while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE )
+        {
+            CRCB_t * pxUnblockedCRCB;
+
+            /* The pending ready list can be accessed by an ISR. */
+            portDISABLE_INTERRUPTS();
+            {
+                pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyCoRoutineList ) );
+                ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
+            }
+            portENABLE_INTERRUPTS();
+
+            ( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) );
+            prvAddCoRoutineToReadyQueue( pxUnblockedCRCB );
+        }
+    }
+/*-----------------------------------------------------------*/
+
+    static void prvCheckDelayedList( void )
+    {
+        CRCB_t * pxCRCB;
+
+        xPassedTicks = xTaskGetTickCount() - xLastTickCount;
+
+        while( xPassedTicks )
+        {
+            xCoRoutineTickCount++;
+            xPassedTicks--;
+
+            /* If the tick count has overflowed we need to swap the ready lists. */
+            if( xCoRoutineTickCount == 0 )
+            {
+                List_t * pxTemp;
+
+                /* Tick count has overflowed so we need to swap the delay lists.  If there are
+                 * any items in pxDelayedCoRoutineList here then there is an error! */
+                pxTemp = pxDelayedCoRoutineList;
+                pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList;
+                pxOverflowDelayedCoRoutineList = pxTemp;
+            }
+
+            /* See if this tick has made a timeout expire. */
+            while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE )
+            {
+                pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );
+
+                if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) )
+                {
+                    /* Timeout not yet expired. */
+                    break;
+                }
+
+                portDISABLE_INTERRUPTS();
+                {
+                    /* The event could have occurred just before this critical
+                     *  section.  If this is the case then the generic list item will
+                     *  have been moved to the pending ready list and the following
+                     *  line is still valid.  Also the pvContainer parameter will have
+                     *  been set to NULL so the following lines are also valid. */
+                    ( void ) uxListRemove( &( pxCRCB->xGenericListItem ) );
+
+                    /* Is the co-routine waiting on an event also? */
+                    if( pxCRCB->xEventListItem.pxContainer )
+                    {
+                        ( void ) uxListRemove( &( pxCRCB->xEventListItem ) );
+                    }
+                }
+                portENABLE_INTERRUPTS();
+
+                prvAddCoRoutineToReadyQueue( pxCRCB );
+            }
+        }
+
+        xLastTickCount = xCoRoutineTickCount;
+    }
+/*-----------------------------------------------------------*/
+
+    void vCoRoutineSchedule( void )
+    {
+        traceENTER_vCoRoutineSchedule();
+
+        /* Only run a co-routine after prvInitialiseCoRoutineLists() has been
+         * called.  prvInitialiseCoRoutineLists() is called automatically when a
+         * co-routine is created. */
+        if( pxDelayedCoRoutineList != NULL )
+        {
+            /* See if any co-routines readied by events need moving to the ready lists. */
+            prvCheckPendingReadyList();
+
+            /* See if any delayed co-routines have timed out. */
+            prvCheckDelayedList();
+
+            /* Find the highest priority queue that contains ready co-routines. */
+            while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) )
+            {
+                if( uxTopCoRoutineReadyPriority == 0 )
+                {
+                    /* No more co-routines to check. */
+                    return;
+                }
+
+                --uxTopCoRoutineReadyPriority;
+            }
+
+            /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines
+             * of the same priority get an equal share of the processor time. */
+            listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) );
+
+            /* Call the co-routine. */
+            ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex );
+        }
+
+        traceRETURN_vCoRoutineSchedule();
+    }
+/*-----------------------------------------------------------*/
+
+    static void prvInitialiseCoRoutineLists( void )
+    {
+        UBaseType_t uxPriority;
+
+        for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ )
+        {
+            vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );
+        }
+
+        vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 );
+        vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 );
+        vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList );
+
+        /* Start with pxDelayedCoRoutineList using list1 and the
+         * pxOverflowDelayedCoRoutineList using list2. */
+        pxDelayedCoRoutineList = &xDelayedCoRoutineList1;
+        pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2;
+    }
+/*-----------------------------------------------------------*/
+
+    BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList )
+    {
+        CRCB_t * pxUnblockedCRCB;
+        BaseType_t xReturn;
+
+        traceENTER_xCoRoutineRemoveFromEventList( pxEventList );
+
+        /* This function is called from within an interrupt.  It can only access
+         * event lists and the pending ready list.  This function assumes that a
+         * check has already been made to ensure pxEventList is not empty. */
+        pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
+        ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
+        vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );
+
+        if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority )
+        {
+            xReturn = pdTRUE;
+        }
+        else
+        {
+            xReturn = pdFALSE;
+        }
+
+        traceRETURN_xCoRoutineRemoveFromEventList( xReturn );
+
+        return xReturn;
+    }
+
+#endif /* configUSE_CO_ROUTINES == 0 */

cspell.config.yaml

@@ -0,0 +1,31 @@
+---
+$schema: https://raw.githubusercontent.com/streetsidesoftware/cspell/main/cspell.schema.json
+version: '0.2'
+# Allows things like stringLength
+allowCompoundWords: true
+
+# Read files not to spell check from the git ignore
+useGitignore: true
+
+#  Language settings for C
+languageSettings:
+  - caseSensitive: false
+    enabled: true
+    languageId: c
+    locale: "*"
+
+# Add a dictionary, and the path to the word list
+dictionaryDefinitions:
+  - name: freertos-words
+    path: '.github/.cSpellWords.txt'
+    addWords: true
+
+dictionaries:
+  - freertos-words
+
+# Paths and files to ignore
+ignorePaths:
+  - 'dependency'
+  - 'docs'
+  - 'ThirdParty'
+  - 'History.txt'

examples/cmake_example/CMakeLists.txt

@@ -0,0 +1,73 @@
+cmake_minimum_required(VERSION 3.15)
+
+project(example)
+
+set(FREERTOS_KERNEL_PATH "../../")
+
+# Add the freertos_config for FreeRTOS-Kernel
+add_library(freertos_config INTERFACE)
+
+target_include_directories(freertos_config
+    INTERFACE
+    "../template_configuration"
+)
+
+if (DEFINED FREERTOS_SMP_EXAMPLE AND FREERTOS_SMP_EXAMPLE STREQUAL "1")
+    message(STATUS "Build FreeRTOS SMP example")
+    # Adding the following configurations to build SMP template port
+    add_compile_options( -DconfigNUMBER_OF_CORES=2 -DconfigUSE_PASSIVE_IDLE_HOOK=0 )
+endif()
+
+# Select the heap port.  values between 1-4 will pick a heap.
+set(FREERTOS_HEAP "4" CACHE STRING "" FORCE)
+
+# Select the native compile PORT
+set(FREERTOS_PORT "TEMPLATE" CACHE STRING "" FORCE)
+
+# Adding the FreeRTOS-Kernel subdirectory
+add_subdirectory(${FREERTOS_KERNEL_PATH} FreeRTOS-Kernel)
+
+########################################################################
+# Overall Compile Options
+# Note the compile option strategy is to error on everything and then
+# Per library opt-out of things that are warnings/errors.
+# This ensures that no matter what strategy for compilation you take, the
+# builds will still occur.
+#
+# Only tested with GNU and Clang.
+# Other options are https://cmake.org/cmake/help/latest/variable/CMAKE_LANG_COMPILER_ID.html#variable:CMAKE_%3CLANG%3E_COMPILER_ID
+# Naming of compilers translation map:
+#
+#   FreeRTOS    | CMake
+#   -------------------
+#   CCS         | ?TBD?
+#   GCC         | GNU, Clang, *Clang Others?
+#   IAR         | IAR
+#   Keil        | ARMCC
+#   MSVC        | MSVC # Note only for MinGW?
+#   Renesas     | ?TBD?
+
+target_compile_options(freertos_kernel PRIVATE
+    ### Gnu/Clang C Options
+    $<$<COMPILE_LANG_AND_ID:C,GNU>:-fdiagnostics-color=always>
+    $<$<COMPILE_LANG_AND_ID:C,Clang>:-fcolor-diagnostics>
+
+    $<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Wall>
+    $<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Wextra>
+    $<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Wpedantic>
+    $<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Werror>
+    $<$<COMPILE_LANG_AND_ID:C,Clang,GNU>:-Wconversion>
+    $<$<COMPILE_LANG_AND_ID:C,Clang>:-Weverything>
+
+    # Suppressions required to build clean with clang.
+    $<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-unused-macros>
+    $<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-padded>
+    $<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-missing-variable-declarations>
+    $<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-covered-switch-default>
+    $<$<COMPILE_LANG_AND_ID:C,Clang>:-Wno-cast-align> )
+
+add_executable(${PROJECT_NAME}
+    main.c
+)
+
+target_link_libraries(${PROJECT_NAME} freertos_kernel freertos_config)

examples/cmake_example/main.c

@@ -0,0 +1,92 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*
+ * This is a simple main that will start the FreeRTOS-Kernel and run a periodic task
+ * that only delays if compiled with the template port, this project will do nothing.
+ * For more information on getting started please look here:
+ * https://freertos.org/FreeRTOS-quick-start-guide.html
+ */
+
+/* FreeRTOS includes. */
+#include <FreeRTOS.h>
+#include <task.h>
+#include <queue.h>
+#include <timers.h>
+#include <semphr.h>
+
+/* Standard includes. */
+#include <stdio.h>
+
+void exampleTask( void * parameters )
+{
+    /* Unused parameters. */
+    ( void ) parameters;
+
+    for( ; ; )
+    {
+        /* Example Task Code */
+        vTaskDelay( 100 ); /* delay 100 ticks */
+    }
+}
+/*-----------------------------------------------------------*/
+
+void main( void )
+{
+    static StaticTask_t exampleTaskTCB;
+    static StackType_t exampleTaskStack[ configMINIMAL_STACK_SIZE ];
+
+    printf( "Example FreeRTOS Project\n" );
+
+    xTaskCreateStatic( exampleTask,
+                       "example",
+                       configMINIMAL_STACK_SIZE,
+                       NULL,
+                       configMAX_PRIORITIES - 1,
+                       &( exampleTaskStack[ 0 ] ),
+                       &( exampleTaskTCB ) );
+
+    /* Start the scheduler. */
+    vTaskStartScheduler();
+
+    for( ; ; )
+    {
+        /* Should not reach here. */
+    }
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationStackOverflowHook( TaskHandle_t xTask,
+                                    char * pcTaskName )
+{
+    /* Check pcTaskName for the name of the offending task,
+     * or pxCurrentTCB if pcTaskName has itself been corrupted. */
+    ( void ) xTask;
+    ( void ) pcTaskName;
+}
+/*-----------------------------------------------------------*/

examples/coverity/CMakeLists.txt

@@ -0,0 +1,39 @@
+cmake_minimum_required(VERSION 3.15)
+
+project(coverity)
+
+set(FREERTOS_KERNEL_PATH "../../")
+FILE(GLOB FREERTOS_KERNEL_SOURCE ${FREERTOS_KERNEL_PATH}*.c)
+
+# Coverity incorrectly infers the type of pdTRUE and pdFALSE as boolean because
+# of their names. This generates multiple false positive warnings about type
+# mismatch. Replace pdTRUE with pdPASS and pdFALSE with pdFAIL to avoid these
+# false positive warnings. This workaround will not be needed after Coverity
+# fixes the issue of incorrectly inferring the type of pdTRUE and pdFALSE as
+# boolean.
+add_custom_target(fix_source ALL
+                  COMMAND sed -i -b -e 's/pdFALSE/pdFAIL/g' -e 's/pdTRUE/pdPASS/g' ${FREERTOS_KERNEL_SOURCE}
+                  DEPENDS ${FREERTOS_KERNEL_SOURCE})
+
+# Add the freertos_config for FreeRTOS-Kernel.
+add_library(freertos_config INTERFACE)
+
+target_include_directories(freertos_config
+                           INTERFACE
+                           ./)
+
+# Select the heap. Values between 1-5 will pick a heap.
+set(FREERTOS_HEAP "3" CACHE STRING "" FORCE)
+
+# Select the FreeRTOS port.
+set(FREERTOS_PORT "TEMPLATE" CACHE STRING "" FORCE)
+
+# Add the FreeRTOS-Kernel subdirectory.
+add_subdirectory(${FREERTOS_KERNEL_PATH} FreeRTOS-Kernel)
+
+add_executable(${PROJECT_NAME}
+               ../cmake_example/main.c)
+
+add_dependencies(${PROJECT_NAME} fix_source)
+
+target_link_libraries(${PROJECT_NAME} freertos_kernel freertos_config)

examples/coverity/FreeRTOSConfig.h

@@ -0,0 +1,135 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/******************************************************************************/
+/* Hardware description related definitions. **********************************/
+/******************************************************************************/
+
+#define configCPU_CLOCK_HZ    ( ( unsigned long ) 20000000 )
+
+/******************************************************************************/
+/* Scheduling behaviour related definitions. **********************************/
+/******************************************************************************/
+
+#define configTICK_RATE_HZ                         ( 100U )
+#define configUSE_PREEMPTION                       1
+#define configUSE_TIME_SLICING                     1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION    0
+#define configUSE_TICKLESS_IDLE                    1
+#define configMAX_PRIORITIES                       5U
+#define configMINIMAL_STACK_SIZE                   128U
+#define configMAX_TASK_NAME_LEN                    4U
+#define configTICK_TYPE_WIDTH_IN_BITS              TICK_TYPE_WIDTH_64_BITS
+#define configIDLE_SHOULD_YIELD                    1
+#define configTASK_NOTIFICATION_ARRAY_ENTRIES      1U
+#define configQUEUE_REGISTRY_SIZE                  0U
+#define configENABLE_BACKWARD_COMPATIBILITY        1
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS    0
+#define configSTACK_DEPTH_TYPE                     size_t
+#define configMESSAGE_BUFFER_LENGTH_TYPE           size_t
+#define configUSE_NEWLIB_REENTRANT                 0
+
+/******************************************************************************/
+/* Software timer related definitions. ****************************************/
+/******************************************************************************/
+
+#define configUSE_TIMERS                1
+#define configTIMER_TASK_PRIORITY       ( configMAX_PRIORITIES - 1U )
+#define configTIMER_TASK_STACK_DEPTH    configMINIMAL_STACK_SIZE
+#define configTIMER_QUEUE_LENGTH        10U
+
+/******************************************************************************/
+/* Memory allocation related definitions. *************************************/
+/******************************************************************************/
+
+#define configSUPPORT_STATIC_ALLOCATION              1
+#define configSUPPORT_DYNAMIC_ALLOCATION             1
+#define configTOTAL_HEAP_SIZE                        4096U
+#define configAPPLICATION_ALLOCATED_HEAP             1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP    0
+#define configUSE_MINI_LIST_ITEM                     0
+
+/******************************************************************************/
+/* Interrupt nesting behaviour configuration. *********************************/
+/******************************************************************************/
+
+#define configKERNEL_INTERRUPT_PRIORITY          0U
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY     0U
+#define configMAX_API_CALL_INTERRUPT_PRIORITY    0U
+
+/******************************************************************************/
+/* Hook and callback function related definitions. ****************************/
+/******************************************************************************/
+
+#define configUSE_IDLE_HOOK                   0
+#define configUSE_TICK_HOOK                   0
+#define configUSE_MALLOC_FAILED_HOOK          0
+#define configUSE_DAEMON_TASK_STARTUP_HOOK    0
+#define configCHECK_FOR_STACK_OVERFLOW        0
+
+/******************************************************************************/
+/* Run time and task stats gathering related definitions. *********************/
+/******************************************************************************/
+
+#define configGENERATE_RUN_TIME_STATS           0
+#define configUSE_TRACE_FACILITY                0
+#define configUSE_STATS_FORMATTING_FUNCTIONS    0
+#define configKERNEL_PROVIDED_STATIC_MEMORY     1
+
+/******************************************************************************/
+/* Definitions that include or exclude functionality. *************************/
+/******************************************************************************/
+
+#define configUSE_TASK_NOTIFICATIONS           1
+#define configUSE_MUTEXES                      1
+#define configUSE_RECURSIVE_MUTEXES            1
+#define configUSE_COUNTING_SEMAPHORES          1
+#define configUSE_QUEUE_SETS                   1
+#define configUSE_APPLICATION_TASK_TAG         1
+#define INCLUDE_vTaskPrioritySet               1
+#define INCLUDE_uxTaskPriorityGet              1
+#define INCLUDE_vTaskDelete                    1
+#define INCLUDE_vTaskSuspend                   1
+#define INCLUDE_xResumeFromISR                 1
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         1
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    1
+#define INCLUDE_xTaskGetIdleTaskHandle         1
+#define INCLUDE_eTaskGetState                  1
+#define INCLUDE_xEventGroupSetBitFromISR       1
+#define INCLUDE_xTimerPendFunctionCall         1
+#define INCLUDE_xTaskAbortDelay                1
+#define INCLUDE_xTaskGetHandle                 1
+#define INCLUDE_xTaskResumeFromISR             1
+
+#endif /* FREERTOS_CONFIG_H */

examples/coverity/README.md

@@ -0,0 +1,58 @@
+# MISRA Compliance for FreeRTOS-Kernel
+FreeRTOS-Kernel is MISRA C:2012 compliant. This directory contains a project to
+run [Synopsys Coverity](https://www.synopsys.com/software-integrity/security-testing/static-analysis-sast.html)
+for checking MISRA compliance.
+
+> **Note**
+Coverity version 2022.6.1 incorrectly infers the type of `pdTRUE` and `pdFALSE`
+as boolean because of their names, resulting in multiple false positive warnings
+about type mismatch. We replace `pdTRUE` with `pdPASS` and `pdFALSE` with
+`pdFAIL` to avoid these false positive warnings. This workaround will not be
+needed after Coverity fixes the issue of incorrectly inferring the type of
+`pdTRUE` and `pdFALSE` as boolean.
+
+Deviations from the MISRA C:2012 guidelines are documented in
+[MISRA.md](../../MISRA.md) and [coverity_misra.config](coverity_misra.config)
+files.
+
+## Getting Started
+### Prerequisites
+Coverity can be run on any platform mentioned [here](https://sig-docs.synopsys.com/polaris/topics/c_coverity-compatible-platforms.html).
+The following are the prerequisites to generate coverity report:
+
+1. CMake version > 3.13.0 (You can check whether you have this by typing `cmake --version`).
+2. GCC compiler.
+    - See download and installation instructions [here](https://gcc.gnu.org/install/).
+3. Clone the repo using the following command:
+    - `git clone https://github.com/FreeRTOS/FreeRTOS-Kernel.git ./FreeRTOS-Kernel`
+
+### Generating Report
+Go to the root directory of the FreeRTOS-Kernel repo and run the following
+commands in a terminal:
+1. Update the compiler configuration in Coverity:
+  ~~~
+  cov-configure --force --compiler cc --comptype gcc
+  ~~~
+2. Create the build files using CMake in a `build` directory:
+  ~~~
+  cmake -B build -S examples/coverity
+  ~~~
+3. Build the (pseudo) application:
+  ~~~
+  cd build/
+  cov-build --emit-complementary-info --dir cov-out make
+  ~~~
+4. Go to the Coverity output directory (`cov-out`) and begin Coverity static
+   analysis:
+  ~~~
+  cd cov-out/
+  cov-analyze --dir ./cov-out \
+    --coding-standard-config ../examples/coverity/coverity_misra.config \
+    --tu-pattern "file('.*/FreeRTOS/Source/[A-Za-z_]*\.c')
+  ~~~
+5. Generate the HTML report:
+  ~~~
+  cov-format-errors --dir ./cov-out --html-output html-output
+  ~~~
+
+HTML report should now be generated in a directory named `html-output`.

examples/coverity/coverity_misra.config

@@ -0,0 +1,97 @@
+// MISRA C-2012 Rules
+
+{
+    version : "2.0",
+    standard : "c2012",
+    title: "Coverity MISRA Configuration",
+    deviations : [
+        // Disable the following rules.
+        {
+            deviation: "Rule 3.1",
+            reason: "We post HTTP links in code comments which contain // inside comments blocks."
+        },
+        {
+            deviation: "Rule 14.4",
+            reason: "do while( 0 ) pattern is used in macros to prevent extra semi-colon."
+        },
+
+        // Disable the following advisory rules and directives.
+        {
+            deviation: "Directive 4.4",
+            reason: "Code snippet is used in comment to help explanation."
+        },
+        {
+            deviation: "Directive 4.5",
+            reason: "Allow names that MISRA considers ambiguous."
+        },
+        {
+            deviation: "Directive 4.6",
+            reason: "Allow port to use primitive type with typedefs."
+        },
+        {
+            deviation: "Directive 4.8",
+            reason: "HeapRegion_t and HeapStats_t are used only in heap files but declared in portable.h which is included in multiple source files. As a result, these definitions appear in multiple source files where they are not used."
+        },
+        {
+            deviation: "Directive 4.9",
+            reason: "FreeRTOS-Kernel is optimised to work on small micro-controllers. To achieve that, function-like macros are used."
+        },
+        {
+            deviation: "Rule 2.3",
+            reason: "FreeRTOS defines types which is used in application."
+        },
+        {
+            deviation: "Rule 2.4",
+            reason: "Allow to define unused tag."
+        },
+        {
+            deviation: "Rule 2.5",
+            reason: "Allow to define unused macro."
+        },
+        {
+            deviation: "Rule 5.9",
+            reason: "Allow to define identifier with the same name in structure and global variable."
+        },
+        {
+            deviation: "Rule 8.7",
+            reason: "API functions are not used by the library outside of the files they are defined; however, they must be externally visible in order to be used by an application."
+        },
+        {
+            deviation: "Rule 8.9",
+            reason: "Allow to object to be defined in wider scope for debug purpose."
+        },
+        {
+            deviation: "Rule 8.13",
+            reason: "Allow to not to use const-qualified type for callback function."
+        },
+        {
+            deviation: "Rule 11.4",
+            reason: "Allow to convert between a pointer to object and an interger type for stack alignment."
+        },
+        {
+            deviation: "Rule 15.4",
+            reason: "Allow to use multiple break statements in a loop."
+        },
+        {
+            deviation: "Rule 15.5",
+            reason: "Allow to use multiple points of exit."
+        },
+        {
+            deviation: "Rule 17.8",
+            reason: "Allow to update the parameters of a function."
+        },
+        {
+            deviation: "Rule 18.4",
+            reason: "Allow to use pointer arithmetic."
+        },
+        {
+            deviation: "Rule 19.2",
+            reason: "Allow to use union."
+        },
+        {
+            deviation: "Rule 20.5",
+            reason: "Allow to use #undef for MPU wrappers."
+        }
+    ]
+}
+

examples/template_configuration/FreeRTOSConfig.h

@@ -0,0 +1,568 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*******************************************************************************
+ * This file provides an example FreeRTOSConfig.h header file, inclusive of an
+ * abbreviated explanation of each configuration item.  Online and reference
+ * documentation provides more information.
+ * https://www.freertos.org/a00110.html
+ *
+ * Constant values enclosed in square brackets ('[' and ']') must be completed
+ * before this file will build.
+ *
+ * Use the FreeRTOSConfig.h supplied with the RTOS port in use rather than this
+ * generic file, if one is available.
+ ******************************************************************************/
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/******************************************************************************/
+/* Hardware description related definitions. **********************************/
+/******************************************************************************/
+
+/* In most cases, configCPU_CLOCK_HZ must be set to the frequency of the clock
+ * that drives the peripheral used to generate the kernels periodic tick interrupt.
+ * The default value is set to 20MHz and matches the QEMU demo settings.  Your
+ * application will certainly need a different value so set this correctly.
+ * This is very often, but not always, equal to the main system clock frequency. */
+#define configCPU_CLOCK_HZ    ( ( unsigned long ) 20000000 )
+
+/* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only.
+ *
+ * By default ARM Cortex-M ports generate the RTOS tick interrupt from the
+ * Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same
+ * frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is
+ * not needed and should be left undefined. If the SysTick timer is clocked at a
+ * different frequency to the MCU core then set configCPU_CLOCK_HZ to the MCU clock
+ * frequency, as normal, and configSYSTICK_CLOCK_HZ to the SysTick clock
+ * frequency.  Not used if left undefined.
+ * The default value is undefined (commented out).  If you need this value bring it
+ * back and set it to a suitable value. */
+
+/*
+ #define configSYSTICK_CLOCK_HZ                  [Platform specific]
+ */
+
+/******************************************************************************/
+/* Scheduling behaviour related definitions. **********************************/
+/******************************************************************************/
+
+/* configTICK_RATE_HZ sets frequency of the tick interrupt in Hz, normally
+ * calculated from the configCPU_CLOCK_HZ value. */
+#define configTICK_RATE_HZ                         100
+
+/* Set configUSE_PREEMPTION to 1 to use pre-emptive scheduling.  Set
+ * configUSE_PREEMPTION to 0 to use co-operative scheduling.
+ * See https://www.freertos.org/single-core-amp-smp-rtos-scheduling.html. */
+#define configUSE_PREEMPTION                       1
+
+/* Set configUSE_TIME_SLICING to 1 to have the scheduler switch between Ready
+ * state tasks of equal priority on every tick interrupt.  Set
+ * configUSE_TIME_SLICING to 0 to prevent the scheduler switching between Ready
+ * state tasks just because there was a tick interrupt.  See
+ * https://freertos.org/single-core-amp-smp-rtos-scheduling.html. */
+#define configUSE_TIME_SLICING                     0
+
+/* Set configUSE_PORT_OPTIMISED_TASK_SELECTION to 1 to select the next task to
+ * run using an algorithm optimised to the instruction set of the target hardware -
+ * normally using a count leading zeros assembly instruction.  Set to 0 to select
+ * the next task to run using a generic C algorithm that works for all FreeRTOS
+ * ports.  Not all FreeRTOS ports have this option.  Defaults to 0 if left
+ * undefined. */
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION    0
+
+/* Set configUSE_TICKLESS_IDLE to 1 to use the low power tickless mode.  Set to
+ * 0 to keep the tick interrupt running at all times.  Not all FreeRTOS ports
+ * support tickless mode. See https://www.freertos.org/low-power-tickless-rtos.html
+ * Defaults to 0 if left undefined. */
+#define configUSE_TICKLESS_IDLE                    0
+
+/* configMAX_PRIORITIES Sets the number of available task priorities.  Tasks can
+ * be assigned priorities of 0 to (configMAX_PRIORITIES - 1).  Zero is the lowest
+ * priority. */
+#define configMAX_PRIORITIES                       5
+
+/* configMINIMAL_STACK_SIZE defines the size of the stack used by the Idle task
+ * (in words, not in bytes!).  The kernel does not use this constant for any other
+ * purpose.  Demo applications use the constant to make the demos somewhat portable
+ * across hardware architectures. */
+#define configMINIMAL_STACK_SIZE                   128
+
+/* configMAX_TASK_NAME_LEN sets the maximum length (in characters) of a task's
+ * human readable name.  Includes the NULL terminator. */
+#define configMAX_TASK_NAME_LEN                    16
+
+/* Time is measured in 'ticks' - which is the number of times the tick interrupt
+ * has executed since the RTOS kernel was started.
+ * The tick count is held in a variable of type TickType_t.
+ *
+ * configTICK_TYPE_WIDTH_IN_BITS controls the type (and therefore bit-width) of TickType_t:
+ *
+ * Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_16_BITS causes
+ * TickType_t to be defined (typedef'ed) as an unsigned 16-bit type.
+ *
+ * Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_32_BITS causes
+ * TickType_t to be defined (typedef'ed) as an unsigned 32-bit type.
+ *
+ * Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_64_BITS causes
+ * TickType_t to be defined (typedef'ed) as an unsigned 64-bit type. */
+#define configTICK_TYPE_WIDTH_IN_BITS              TICK_TYPE_WIDTH_64_BITS
+
+/* Set configIDLE_SHOULD_YIELD to 1 to have the Idle task yield to an
+ * application task if there is an Idle priority (priority 0) application task that
+ * can run.  Set to 0 to have the Idle task use all of its timeslice.  Default to 1
+ * if left undefined. */
+#define configIDLE_SHOULD_YIELD                    1
+
+/* Each task has an array of task notifications.
+ * configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the array.
+ * See https://www.freertos.org/RTOS-task-notifications.html  Defaults to 1 if
+ * left undefined. */
+#define configTASK_NOTIFICATION_ARRAY_ENTRIES      1
+
+/* configQUEUE_REGISTRY_SIZE sets the maximum number of queues and semaphores
+ * that can be referenced from the queue registry.  Only required when using a
+ * kernel aware debugger.  Defaults to 0 if left undefined. */
+#define configQUEUE_REGISTRY_SIZE                  0
+
+/* Set configENABLE_BACKWARD_COMPATIBILITY to 1 to map function names and
+ * datatypes from old version of FreeRTOS to their latest equivalent.  Defaults to
+ * 1 if left undefined. */
+#define configENABLE_BACKWARD_COMPATIBILITY        0
+
+/* Each task has its own array of pointers that can be used as thread local
+ * storage.  configNUM_THREAD_LOCAL_STORAGE_POINTERS set the number of indexes in
+ * the array.  See https://www.freertos.org/thread-local-storage-pointers.html
+ * Defaults to 0 if left undefined. */
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS    0
+
+/* When configUSE_MINI_LIST_ITEM is set to 0, MiniListItem_t and ListItem_t are
+ * both the same. When configUSE_MINI_LIST_ITEM is set to 1, MiniListItem_t contains
+ * 3 fewer fields than ListItem_t which saves some RAM at the cost of violating
+ * strict aliasing rules which some compilers depend on for optimization. Defaults
+ * to 1 if left undefined. */
+#define configUSE_MINI_LIST_ITEM                   1
+
+/* Sets the type used by the parameter to xTaskCreate() that specifies the stack
+ * size of the task being created.  The same type is used to return information
+ * about stack usage in various other API calls.  Defaults to size_t if left
+ * undefined. */
+#define configSTACK_DEPTH_TYPE                     size_t
+
+/* configMESSAGE_BUFFER_LENGTH_TYPE sets the type used to store the length of
+ * each message written to a FreeRTOS message buffer (the length is also written to
+ * the message buffer.  Defaults to size_t if left undefined - but that may waste
+ * space if messages never go above a length that could be held in a uint8_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE           size_t
+
+/* If configHEAP_CLEAR_MEMORY_ON_FREE is set to 1, then blocks of memory allocated
+ * using pvPortMalloc() will be cleared (i.e. set to zero) when freed using
+ * vPortFree(). Defaults to 0 if left undefined. */
+#define configHEAP_CLEAR_MEMORY_ON_FREE            1
+
+/* vTaskList and vTaskGetRunTimeStats APIs take a buffer as a parameter and assume
+ * that the length of the buffer is configSTATS_BUFFER_MAX_LENGTH. Defaults to
+ * 0xFFFF if left undefined.
+ * New applications are recommended to use vTaskListTasks and
+ * vTaskGetRunTimeStatistics APIs instead and supply the length of the buffer
+ * explicitly to avoid memory corruption. */
+#define configSTATS_BUFFER_MAX_LENGTH              0xFFFF
+
+/* Set configUSE_NEWLIB_REENTRANT to 1 to have a newlib reent structure
+ * allocated for each task.  Set to 0 to not support newlib reent structures.
+ * Default to 0 if left undefined.
+ *
+ * Note Newlib support has been included by popular demand, but is not used or
+ * tested by the FreeRTOS maintainers themselves. FreeRTOS is not responsible for
+ * resulting newlib operation. User must be familiar with newlib and must provide
+ * system-wide implementations of the necessary stubs. Note that (at the time of
+ * writing) the current newlib design implements a system-wide malloc() that must
+ * be provided with locks. */
+#define configUSE_NEWLIB_REENTRANT                 0
+
+/******************************************************************************/
+/* Software timer related definitions. ****************************************/
+/******************************************************************************/
+
+/* Set configUSE_TIMERS to 1 to include software timer functionality in the
+ * build.  Set to 0 to exclude software timer functionality from the build.  The
+ * FreeRTOS/source/timers.c source file must be included in the build if
+ * configUSE_TIMERS is set to 1.  Default to 0 if left undefined.  See
+ * https://www.freertos.org/RTOS-software-timer.html. */
+#define configUSE_TIMERS                1
+
+/* configTIMER_TASK_PRIORITY sets the priority used by the timer task.  Only
+ * used if configUSE_TIMERS is set to 1.  The timer task is a standard FreeRTOS
+ * task, so its priority is set like any other task.  See
+ * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html  Only used
+ * if configUSE_TIMERS is set to 1. */
+#define configTIMER_TASK_PRIORITY       ( configMAX_PRIORITIES - 1 )
+
+/* configTIMER_TASK_STACK_DEPTH sets the size of the stack allocated to the
+ * timer task (in words, not in bytes!).  The timer task is a standard FreeRTOS
+ * task.  See https://www.freertos.org/RTOS-software-timer-service-daemon-task.html
+ * Only used if configUSE_TIMERS is set to 1. */
+#define configTIMER_TASK_STACK_DEPTH    configMINIMAL_STACK_SIZE
+
+/* configTIMER_QUEUE_LENGTH sets the length of the queue (the number of discrete
+ * items the queue can hold) used to send commands to the timer task.  See
+ * https://www.freertos.org/RTOS-software-timer-service-daemon-task.html  Only used
+ * if configUSE_TIMERS is set to 1. */
+#define configTIMER_QUEUE_LENGTH        10
+
+/******************************************************************************/
+/* Memory allocation related definitions. *************************************/
+/******************************************************************************/
+
+/* Set configSUPPORT_STATIC_ALLOCATION to 1 to include FreeRTOS API functions
+ * that create FreeRTOS objects (tasks, queues, etc.) using statically allocated
+ * memory in the build.  Set to 0 to exclude the ability to create statically
+ * allocated objects from the build.  Defaults to 0 if left undefined.  See
+ * https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */
+#define configSUPPORT_STATIC_ALLOCATION              1
+
+/* Set configSUPPORT_DYNAMIC_ALLOCATION to 1 to include FreeRTOS API functions
+ * that create FreeRTOS objects (tasks, queues, etc.) using dynamically allocated
+ * memory in the build.  Set to 0 to exclude the ability to create dynamically
+ * allocated objects from the build.  Defaults to 1 if left undefined.  See
+ * https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */
+#define configSUPPORT_DYNAMIC_ALLOCATION             1
+
+/* Sets the total size of the FreeRTOS heap, in bytes, when heap_1.c, heap_2.c
+ * or heap_4.c are included in the build.  This value is defaulted to 4096 bytes but
+ * it must be tailored to each application.  Note the heap will appear in the .bss
+ * section.  See https://www.freertos.org/a00111.html. */
+#define configTOTAL_HEAP_SIZE                        4096
+
+/* Set configAPPLICATION_ALLOCATED_HEAP to 1 to have the application allocate
+ * the array used as the FreeRTOS heap.  Set to 0 to have the linker allocate the
+ * array used as the FreeRTOS heap.  Defaults to 0 if left undefined. */
+#define configAPPLICATION_ALLOCATED_HEAP             0
+
+/* Set configSTACK_ALLOCATION_FROM_SEPARATE_HEAP to 1 to have task stacks
+ * allocated from somewhere other than the FreeRTOS heap.  This is useful if you
+ * want to ensure stacks are held in fast memory.  Set to 0 to have task stacks
+ * come from the standard FreeRTOS heap.  The application writer must provide
+ * implementations for pvPortMallocStack() and vPortFreeStack() if set to 1.
+ * Defaults to 0 if left undefined. */
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP    0
+
+/* Set configENABLE_HEAP_PROTECTOR to 1 to enable bounds checking and obfuscation
+ * to internal heap block pointers in heap_4.c and heap_5.c to help catch pointer
+ * corruptions. Defaults to 0 if left undefined. */
+#define configENABLE_HEAP_PROTECTOR                  0
+
+/******************************************************************************/
+/* Interrupt nesting behaviour configuration. *********************************/
+/******************************************************************************/
+
+/* configKERNEL_INTERRUPT_PRIORITY sets the priority of the tick and context
+ * switch performing interrupts.  The default value is set to the highest interrupt
+ * priority (0).  Not supported by all FreeRTOS ports.  See
+ * https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific to ARM
+ * Cortex-M devices. */
+#define configKERNEL_INTERRUPT_PRIORITY          0
+
+/* configMAX_SYSCALL_INTERRUPT_PRIORITY sets the interrupt priority above which
+ * FreeRTOS API calls must not be made.  Interrupts above this priority are never
+ * disabled, so never delayed by RTOS activity.  The default value is set to the
+ * highest interrupt priority (0).  Not supported by all FreeRTOS ports.
+ * See https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific to
+ * ARM Cortex-M devices. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY     0
+
+/* Another name for configMAX_SYSCALL_INTERRUPT_PRIORITY - the name used depends
+ * on the FreeRTOS port. */
+#define configMAX_API_CALL_INTERRUPT_PRIORITY    0
+
+/******************************************************************************/
+/* Hook and callback function related definitions. ****************************/
+/******************************************************************************/
+
+/* Set the following configUSE_* constants to 1 to include the named hook
+ * functionality in the build.  Set to 0 to exclude the hook functionality from the
+ * build.  The application writer is responsible for providing the hook function
+ * for any set to 1.  See https://www.freertos.org/a00016.html. */
+#define configUSE_IDLE_HOOK                   0
+#define configUSE_TICK_HOOK                   0
+#define configUSE_MALLOC_FAILED_HOOK          0
+#define configUSE_DAEMON_TASK_STARTUP_HOOK    0
+
+/* Set configUSE_SB_COMPLETED_CALLBACK to 1 to have send and receive completed
+ * callbacks for each instance of a stream buffer or message buffer. When the
+ * option is set to 1, APIs xStreamBufferCreateWithCallback() and
+ * xStreamBufferCreateStaticWithCallback() (and likewise APIs for message
+ * buffer) can be used to create a stream buffer or message buffer instance
+ * with application provided callbacks. Defaults to 0 if left undefined. */
+#define configUSE_SB_COMPLETED_CALLBACK       0
+
+/* Set configCHECK_FOR_STACK_OVERFLOW to 1 or 2 for FreeRTOS to check for a
+ * stack overflow at the time of a context switch.  Set to 0 to not look for a
+ * stack overflow.  If configCHECK_FOR_STACK_OVERFLOW is 1 then the check only
+ * looks for the stack pointer being out of bounds when a task's context is saved
+ * to its stack - this is fast but somewhat ineffective.  If
+ * configCHECK_FOR_STACK_OVERFLOW is 2 then the check looks for a pattern written
+ * to the end of a task's stack having been overwritten.  This is slower, but will
+ * catch most (but not all) stack overflows.  The application writer must provide
+ * the stack overflow callback when configCHECK_FOR_STACK_OVERFLOW is set to 1.
+ * See https://www.freertos.org/Stacks-and-stack-overflow-checking.html  Defaults
+ * to 0 if left undefined. */
+#define configCHECK_FOR_STACK_OVERFLOW        2
+
+/******************************************************************************/
+/* Run time and task stats gathering related definitions. *********************/
+/******************************************************************************/
+
+/* Set configGENERATE_RUN_TIME_STATS to 1 to have FreeRTOS collect data on the
+ * processing time used by each task.  Set to 0 to not collect the data.  The
+ * application writer needs to provide a clock source if set to 1.  Defaults to 0
+ * if left undefined.  See https://www.freertos.org/rtos-run-time-stats.html. */
+#define configGENERATE_RUN_TIME_STATS           0
+
+/* Set configUSE_TRACE_FACILITY to include additional task structure members
+ * are used by trace and visualisation functions and tools.  Set to 0 to exclude
+ * the additional information from the structures. Defaults to 0 if left
+ * undefined. */
+#define configUSE_TRACE_FACILITY                0
+
+/* Set to 1 to include the vTaskList() and vTaskGetRunTimeStats() functions in
+ * the build.  Set to 0 to exclude these functions from the build.  These two
+ * functions introduce a dependency on string formatting functions that would
+ * otherwise not exist - hence they are kept separate.  Defaults to 0 if left
+ * undefined. */
+#define configUSE_STATS_FORMATTING_FUNCTIONS    0
+
+/******************************************************************************/
+/* Co-routine related definitions. ********************************************/
+/******************************************************************************/
+
+/* Set configUSE_CO_ROUTINES to 1 to include co-routine functionality in the
+ * build, or 0 to omit co-routine functionality from the build. To include
+ * co-routines, croutine.c must be included in the project. Defaults to 0 if left
+ * undefined. */
+#define configUSE_CO_ROUTINES              0
+
+/* configMAX_CO_ROUTINE_PRIORITIES defines the number of priorities available
+ * to the application co-routines. Any number of co-routines can share the same
+ * priority. Defaults to 0 if left undefined. */
+#define configMAX_CO_ROUTINE_PRIORITIES    1
+
+/******************************************************************************/
+/* Debugging assistance. ******************************************************/
+/******************************************************************************/
+
+/* configASSERT() has the same semantics as the standard C assert().  It can
+ * either be defined to take an action when the assertion fails, or not defined
+ * at all (i.e. comment out or delete the definitions) to completely remove
+ * assertions.  configASSERT() can be defined to anything you want, for example
+ * you can call a function if an assert fails that passes the filename and line
+ * number of the failing assert (for example, "vAssertCalled( __FILE__, __LINE__ )"
+ * or it can simple disable interrupts and sit in a loop to halt all execution
+ * on the failing line for viewing in a debugger. */
+#define configASSERT( x )         \
+    if( ( x ) == 0 )              \
+    {                             \
+        taskDISABLE_INTERRUPTS(); \
+        for( ; ; )                \
+        ;                         \
+    }
+
+/******************************************************************************/
+/* FreeRTOS MPU specific definitions. *****************************************/
+/******************************************************************************/
+
+/* If configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS is set to 1 then
+ * the application writer can provide functions that execute in privileged mode.
+ * See: https://www.freertos.org/a00110.html#configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
+ * Defaults to 0 if left undefined.  Only used by the FreeRTOS Cortex-M MPU ports,
+ * not the standard ARMv7-M Cortex-M port. */
+#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS    0
+
+/* Set configTOTAL_MPU_REGIONS to the number of MPU regions implemented on your
+ * target hardware.  Normally 8 or 16.  Only used by the FreeRTOS Cortex-M MPU
+ * ports, not the standard ARMv7-M Cortex-M port.  Defaults to 8 if left
+ * undefined. */
+#define configTOTAL_MPU_REGIONS                                   8
+
+/* configTEX_S_C_B_FLASH allows application writers to override the default
+ * values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for
+ * the MPU region covering Flash.  Defaults to 0x07UL (which means TEX=000, S=1,
+ * C=1, B=1) if left undefined.  Only used by the FreeRTOS Cortex-M MPU ports, not
+ * the standard ARMv7-M Cortex-M port. */
+#define configTEX_S_C_B_FLASH                                     0x07UL
+
+/* configTEX_S_C_B_SRAM allows application writers to override the default
+ * values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits for
+ * the MPU region covering RAM. Defaults to 0x07UL (which means TEX=000, S=1, C=1,
+ * B=1) if left undefined.  Only used by the FreeRTOS Cortex-M MPU ports, not
+ * the standard ARMv7-M Cortex-M port. */
+#define configTEX_S_C_B_SRAM                                      0x07UL
+
+/* Set configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY to 0 to prevent any privilege
+ * escalations originating from outside of the kernel code itself.  Set to 1 to
+ * allow application tasks to raise privilege.  Defaults to 1 if left undefined.
+ * Only used by the FreeRTOS Cortex-M MPU ports, not the standard ARMv7-M Cortex-M
+ * port. */
+#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY               1
+
+/* Set configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS to 1 to allow unprivileged
+ * tasks enter critical sections (effectively mask interrupts).  Set to 0 to
+ * prevent unprivileged tasks entering critical sections.  Defaults to 1 if left
+ * undefined.  Only used by the FreeRTOS Cortex-M MPU ports, not the standard
+ * ARMv7-M Cortex-M port. */
+#define configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS                0
+
+/* FreeRTOS Kernel version 10.6.0 introduced a new v2 MPU wrapper, namely
+ * mpu_wrappers_v2.c. Set configUSE_MPU_WRAPPERS_V1 to 0 to use the new v2 MPU
+ * wrapper. Set configUSE_MPU_WRAPPERS_V1 to 1 to use the old v1 MPU wrapper
+ * (mpu_wrappers.c). Defaults to 0 if left undefined. */
+#define configUSE_MPU_WRAPPERS_V1                                 0
+
+/* When using the v2 MPU wrapper, set configPROTECTED_KERNEL_OBJECT_POOL_SIZE to
+ * the total number of kernel objects, which includes tasks, queues, semaphores,
+ * mutexes, event groups, timers, stream buffers and message buffers, in your
+ * application. The application will not be able to have more than
+ * configPROTECTED_KERNEL_OBJECT_POOL_SIZE kernel objects at any point of
+ * time. */
+#define configPROTECTED_KERNEL_OBJECT_POOL_SIZE                   10
+
+/* When using the v2 MPU wrapper, set configSYSTEM_CALL_STACK_SIZE to the size
+ * of the system call stack in words. Each task has a statically allocated
+ * memory buffer of this size which is used as the stack to execute system
+ * calls. For example, if configSYSTEM_CALL_STACK_SIZE is defined as 128 and
+ * there are 10 tasks in the application, the total amount of memory used for
+ * system call stacks is 128 * 10 = 1280 words. */
+#define configSYSTEM_CALL_STACK_SIZE                              128
+
+/* When using the v2 MPU wrapper, set configENABLE_ACCESS_CONTROL_LIST to 1 to
+ * enable Access Control List (ACL) feature. When ACL is enabled, an
+ * unprivileged task by default does not have access to any kernel object other
+ * than itself. The application writer needs to explicitly grant the
+ * unprivileged task access to the kernel objects it needs using the APIs
+ * provided for the same. Defaults to 0 if left undefined. */
+#define configENABLE_ACCESS_CONTROL_LIST                          1
+
+/******************************************************************************/
+/* SMP( Symmetric MultiProcessing ) Specific Configuration definitions. *******/
+/******************************************************************************/
+
+/* Set configNUMBER_OF_CORES to the number of available processor cores. Defaults
+ * to 1 if left undefined. */
+
+/*
+ #define configNUMBER_OF_CORES                     [Num of available cores]
+ */
+
+/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
+ * configRUN_MULTIPLE_PRIORITIES to 0 to allow multiple tasks to run
+ * simultaneously only if they do not have equal priority, thereby maintaining
+ * the paradigm of a lower priority task never running if a higher priority task
+ * is able to run. If configRUN_MULTIPLE_PRIORITIES is set to 1, multiple tasks
+ * with different priorities may run simultaneously - so a higher and lower
+ * priority task may run on different cores at the same time. */
+#define configRUN_MULTIPLE_PRIORITIES             0
+
+/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
+ * configUSE_CORE_AFFINITY to 1 to enable core affinity feature. When core
+ * affinity feature is enabled, the vTaskCoreAffinitySet and vTaskCoreAffinityGet
+ * APIs can be used to set and retrieve which cores a task can run on. If
+ * configUSE_CORE_AFFINITY is set to 0 then the FreeRTOS scheduler is free to
+ * run any task on any available core. */
+#define configUSE_CORE_AFFINITY                   0
+
+/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), if
+ * configUSE_TASK_PREEMPTION_DISABLE is set to 1, individual tasks can be set to
+ * either pre-emptive or co-operative mode using the vTaskPreemptionDisable and
+ * vTaskPreemptionEnable APIs. */
+#define configUSE_TASK_PREEMPTION_DISABLE         0
+
+/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
+ * configUSE_PASSIVE_IDLE_HOOK to 1 to allow the application writer to use
+ * the passive idle task hook to add background functionality without the overhead
+ * of a separate task. Defaults to 0 if left undefined. */
+#define configUSE_PASSIVE_IDLE_HOOK               0
+
+/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one),
+ * configTIMER_SERVICE_TASK_CORE_AFFINITY allows the application writer to set
+ * the core affinity of the RTOS Daemon/Timer Service task. Defaults to
+ * tskNO_AFFINITY if left undefined. */
+#define configTIMER_SERVICE_TASK_CORE_AFFINITY    tskNO_AFFINITY
+
+
+/******************************************************************************/
+/* ARMv8-M secure side port related definitions. ******************************/
+/******************************************************************************/
+
+/* secureconfigMAX_SECURE_CONTEXTS define the maximum number of tasks that can
+ *  call into the secure side of an ARMv8-M chip.  Not used by any other ports. */
+#define secureconfigMAX_SECURE_CONTEXTS        5
+
+/* Defines the kernel provided implementation of
+ * vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory()
+ * to provide the memory that is used by the Idle task and Timer task respectively.
+ * The application can provide it's own implementation of
+ * vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() by
+ * setting configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */
+#define configKERNEL_PROVIDED_STATIC_MEMORY    1
+
+/******************************************************************************/
+/* Definitions that include or exclude functionality. *************************/
+/******************************************************************************/
+
+/* Set the following configUSE_* constants to 1 to include the named feature in
+ * the build, or 0 to exclude the named feature from the build. */
+#define configUSE_TASK_NOTIFICATIONS           1
+#define configUSE_MUTEXES                      1
+#define configUSE_RECURSIVE_MUTEXES            1
+#define configUSE_COUNTING_SEMAPHORES          1
+#define configUSE_QUEUE_SETS                   0
+#define configUSE_APPLICATION_TASK_TAG         0
+
+/* Set the following INCLUDE_* constants to 1 to incldue the named API function,
+ * or 0 to exclude the named API function.  Most linkers will remove unused
+ * functions even when the constant is 1. */
+#define INCLUDE_vTaskPrioritySet               1
+#define INCLUDE_uxTaskPriorityGet              1
+#define INCLUDE_vTaskDelete                    1
+#define INCLUDE_vTaskSuspend                   1
+#define INCLUDE_xResumeFromISR                 1
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         1
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       1
+#define INCLUDE_xTimerPendFunctionCall         0
+#define INCLUDE_xTaskAbortDelay                0
+#define INCLUDE_xTaskGetHandle                 0
+#define INCLUDE_xTaskResumeFromISR             1
+
+#endif /* FREERTOS_CONFIG_H */

examples/template_configuration/readme.md

@@ -0,0 +1,7 @@
+# Configuration support for FreeRTOS
+
+## Overview
+
+Every FreeRTOS project requires FreeRTOSConfig.h located in their include path.  In this folder you will find a sample FreeRTOSConfig.h that will assist you in preparing the configuration for your application.
+
+The FreeRTOSConfig.h in this folder is used in the minimal_freertos_example project provided and it not guaranteed to have the same configuration between updates.

include/CMakeLists.txt

@@ -0,0 +1,15 @@
+# FreeRTOS internal cmake file. Do not use it in user top-level project
+
+add_library(freertos_kernel_include INTERFACE)
+
+target_include_directories(freertos_kernel_include
+    INTERFACE
+        .
+        # Note: DEPRECATED but still supported, may be removed in a future release.
+        $<$<NOT:$<TARGET_EXISTS:freertos_config>>:${FREERTOS_CONFIG_FILE_DIRECTORY}>
+)
+
+target_link_libraries(freertos_kernel_include
+    INTERFACE
+        $<$<TARGET_EXISTS:freertos_config>:freertos_config>
+)

include/StackMacros.h

@@ -1,133 +1,34 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef STACK_MACROS_H
-#define STACK_MACROS_H
-
-#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */
-	#warning The name of this file has changed to stack_macros.h.  Please update your code accordingly.  This source file (which has the original name) will be removed in future released.
-#endif
-
-/*
- * Call the stack overflow hook function if the stack of the task being swapped
- * out is currently overflowed, or looks like it might have overflowed in the
- * past.
- *
- * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
- * the current stack state only - comparing the current top of stack value to
- * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
- * will also cause the last few stack bytes to be checked to ensure the value
- * to which the bytes were set when the task was created have not been
- * overwritten.  Note this second test does not guarantee that an overflowed
- * stack will always be recognised.
- */
-
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
-
-	/* Only the current stack state is to be checked. */
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-		/* Is the currently saved stack pointer within the stack limit? */								\
-		if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )										\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
-
-	/* Only the current stack state is to be checked. */
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-																										\
-		/* Is the currently saved stack pointer within the stack limit? */								\
-		if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )									\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
-
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-		const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;							\
-		const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;											\
-																										\
-		if( ( pulStack[ 0 ] != ulCheckValue ) ||												\
-			( pulStack[ 1 ] != ulCheckValue ) ||												\
-			( pulStack[ 2 ] != ulCheckValue ) ||												\
-			( pulStack[ 3 ] != ulCheckValue ) )												\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
-
-#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
-
-	#define taskCHECK_FOR_STACK_OVERFLOW()																								\
-	{																																	\
-	int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;																		\
-	static const uint8_t ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };	\
-																																		\
-																																		\
-		pcEndOfStack -= sizeof( ucExpectedStackBytes );																					\
-																																		\
-		/* Has the extremity of the task stack ever been written over? */																\
-		if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )					\
-		{																																\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );									\
-		}																																\
-	}
-
-#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
-/*-----------------------------------------------------------*/
-
-/* Remove stack overflow macro if not being used. */
-#ifndef taskCHECK_FOR_STACK_OVERFLOW
-	#define taskCHECK_FOR_STACK_OVERFLOW()
-#endif
-
-
-
-#endif /* STACK_MACROS_H */
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */
+    #warning The name of this file has changed to stack_macros.h.  Please update your code accordingly.  This source file (which has the original name) will be removed in a future release.
+#endif
+
+#include "stack_macros.h"

include/atomic.h

@@ -1,414 +1,419 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/**
- * @file atomic.h
- * @brief FreeRTOS atomic operation support.
- *
- * This file implements atomic functions by disabling interrupts globally.
- * Implementations with architecture specific atomic instructions can be
- * provided under each compiler directory.
- */
-
-#ifndef ATOMIC_H
-#define ATOMIC_H
-
-#ifndef INC_FREERTOS_H
-	#error "include FreeRTOS.h must appear in source files before include atomic.h"
-#endif
-
-/* Standard includes. */
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * Port specific definitions -- entering/exiting critical section.
- * Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h
- *
- * Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with
- * ATOMIC_ENTER_CRITICAL().
- *
- */
-#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
-
-	/* Nested interrupt scheme is supported in this port. */
-	#define ATOMIC_ENTER_CRITICAL()	 \
-		UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
-
-	#define ATOMIC_EXIT_CRITICAL()	  \
-		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
-
-#else
-
-	/* Nested interrupt scheme is NOT supported in this port. */
-	#define ATOMIC_ENTER_CRITICAL()	 portENTER_CRITICAL()
-	#define ATOMIC_EXIT_CRITICAL()	  portEXIT_CRITICAL()
-
-#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
-
-/*
- * Port specific definition -- "always inline".
- * Inline is compiler specific, and may not always get inlined depending on your
- * optimization level.  Also, inline is considered as performance optimization
- * for atomic.  Thus, if portFORCE_INLINE is not provided by portmacro.h,
- * instead of resulting error, simply define it away.
- */
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE
-#endif
-
-#define ATOMIC_COMPARE_AND_SWAP_SUCCESS	 0x1U		/**< Compare and swap succeeded, swapped. */
-#define ATOMIC_COMPARE_AND_SWAP_FAILURE	 0x0U		/**< Compare and swap failed, did not swap. */
-
-/*----------------------------- Swap && CAS ------------------------------*/
-
-/**
- * Atomic compare-and-swap
- *
- * @brief Performs an atomic compare-and-swap operation on the specified values.
- *
- * @param[in, out] pulDestination  Pointer to memory location from where value is
- *                               to be loaded and checked.
- * @param[in] ulExchange         If condition meets, write this value to memory.
- * @param[in] ulComparand        Swap condition.
- *
- * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
- *
- * @note This function only swaps *pulDestination with ulExchange, if previous
- *       *pulDestination value equals ulComparand.
- */
-static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
-															uint32_t ulExchange,
-															uint32_t ulComparand )
-{
-uint32_t ulReturnValue;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		if( *pulDestination == ulComparand )
-		{
-			*pulDestination = ulExchange;
-			ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
-		}
-		else
-		{
-			ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
-		}
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulReturnValue;
-}
-/*-----------------------------------------------------------*/
-
-/**
- * Atomic swap (pointers)
- *
- * @brief Atomically sets the address pointed to by *ppvDestination to the value
- *        of *pvExchange.
- *
- * @param[in, out] ppvDestination  Pointer to memory location from where a pointer
- *                                 value is to be loaded and written back to.
- * @param[in] pvExchange           Pointer value to be written to *ppvDestination.
- *
- * @return The initial value of *ppvDestination.
- */
-static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
-														void * pvExchange )
-{
-void * pReturnValue;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		pReturnValue = *ppvDestination;
-		*ppvDestination = pvExchange;
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return pReturnValue;
-}
-/*-----------------------------------------------------------*/
-
-/**
- * Atomic compare-and-swap (pointers)
- *
- * @brief Performs an atomic compare-and-swap operation on the specified pointer
- *        values.
- *
- * @param[in, out] ppvDestination  Pointer to memory location from where a pointer
- *                                 value is to be loaded and checked.
- * @param[in] pvExchange           If condition meets, write this value to memory.
- * @param[in] pvComparand          Swap condition.
- *
- * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
- *
- * @note This function only swaps *ppvDestination with pvExchange, if previous
- *       *ppvDestination value equals pvComparand.
- */
-static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
-																	void * pvExchange,
-																	void * pvComparand )
-{
-uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		if( *ppvDestination == pvComparand )
-		{
-			*ppvDestination = pvExchange;
-			ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
-		}
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulReturnValue;
-}
-
-
-/*----------------------------- Arithmetic ------------------------------*/
-
-/**
- * Atomic add
- *
- * @brief Atomically adds count to the value of the specified pointer points to.
- *
- * @param[in,out] pulAddend  Pointer to memory location from where value is to be
- *                         loaded and written back to.
- * @param[in] ulCount      Value to be added to *pulAddend.
- *
- * @return previous *pulAddend value.
- */
-static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
-												 uint32_t ulCount )
-{
-	uint32_t ulCurrent;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		ulCurrent = *pulAddend;
-		*pulAddend += ulCount;
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulCurrent;
-}
-/*-----------------------------------------------------------*/
-
-/**
- * Atomic subtract
- *
- * @brief Atomically subtracts count from the value of the specified pointer
- *        pointers to.
- *
- * @param[in,out] pulAddend  Pointer to memory location from where value is to be
- *                         loaded and written back to.
- * @param[in] ulCount      Value to be subtract from *pulAddend.
- *
- * @return previous *pulAddend value.
- */
-static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
-													  uint32_t ulCount )
-{
-	uint32_t ulCurrent;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		ulCurrent = *pulAddend;
-		*pulAddend -= ulCount;
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulCurrent;
-}
-/*-----------------------------------------------------------*/
-
-/**
- * Atomic increment
- *
- * @brief Atomically increments the value of the specified pointer points to.
- *
- * @param[in,out] pulAddend  Pointer to memory location from where value is to be
- *                         loaded and written back to.
- *
- * @return *pulAddend value before increment.
- */
-static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
-{
-uint32_t ulCurrent;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		ulCurrent = *pulAddend;
-		*pulAddend += 1;
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulCurrent;
-}
-/*-----------------------------------------------------------*/
-
-/**
- * Atomic decrement
- *
- * @brief Atomically decrements the value of the specified pointer points to
- *
- * @param[in,out] pulAddend  Pointer to memory location from where value is to be
- *                         loaded and written back to.
- *
- * @return *pulAddend value before decrement.
- */
-static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
-{
-uint32_t ulCurrent;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		ulCurrent = *pulAddend;
-		*pulAddend -= 1;
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulCurrent;
-}
-
-/*----------------------------- Bitwise Logical ------------------------------*/
-
-/**
- * Atomic OR
- *
- * @brief Performs an atomic OR operation on the specified values.
- *
- * @param [in, out] pulDestination  Pointer to memory location from where value is
- *                                to be loaded and written back to.
- * @param [in] ulValue            Value to be ORed with *pulDestination.
- *
- * @return The original value of *pulDestination.
- */
-static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
-												uint32_t ulValue )
-{
-uint32_t ulCurrent;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		ulCurrent = *pulDestination;
-		*pulDestination |= ulValue;
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulCurrent;
-}
-/*-----------------------------------------------------------*/
-
-/**
- * Atomic AND
- *
- * @brief Performs an atomic AND operation on the specified values.
- *
- * @param [in, out] pulDestination  Pointer to memory location from where value is
- *                                to be loaded and written back to.
- * @param [in] ulValue            Value to be ANDed with *pulDestination.
- *
- * @return The original value of *pulDestination.
- */
-static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
-												 uint32_t ulValue )
-{
-uint32_t ulCurrent;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		ulCurrent = *pulDestination;
-		*pulDestination &= ulValue;
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulCurrent;
-}
-/*-----------------------------------------------------------*/
-
-/**
- * Atomic NAND
- *
- * @brief Performs an atomic NAND operation on the specified values.
- *
- * @param [in, out] pulDestination  Pointer to memory location from where value is
- *                                to be loaded and written back to.
- * @param [in] ulValue            Value to be NANDed with *pulDestination.
- *
- * @return The original value of *pulDestination.
- */
-static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
-												  uint32_t ulValue )
-{
-uint32_t ulCurrent;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		ulCurrent = *pulDestination;
-		*pulDestination = ~( ulCurrent & ulValue );
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulCurrent;
-}
-/*-----------------------------------------------------------*/
-
-/**
- * Atomic XOR
- *
- * @brief Performs an atomic XOR operation on the specified values.
- *
- * @param [in, out] pulDestination  Pointer to memory location from where value is
- *                                to be loaded and written back to.
- * @param [in] ulValue            Value to be XORed with *pulDestination.
- *
- * @return The original value of *pulDestination.
- */
-static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
-												 uint32_t ulValue )
-{
-uint32_t ulCurrent;
-
-	ATOMIC_ENTER_CRITICAL();
-	{
-		ulCurrent = *pulDestination;
-		*pulDestination ^= ulValue;
-	}
-	ATOMIC_EXIT_CRITICAL();
-
-	return ulCurrent;
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ATOMIC_H */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/**
+ * @file atomic.h
+ * @brief FreeRTOS atomic operation support.
+ *
+ * This file implements atomic functions by disabling interrupts globally.
+ * Implementations with architecture specific atomic instructions can be
+ * provided under each compiler directory.
+ */
+
+#ifndef ATOMIC_H
+#define ATOMIC_H
+
+#ifndef INC_FREERTOS_H
+    #error "include FreeRTOS.h must appear in source files before include atomic.h"
+#endif
+
+/* Standard includes. */
+#include <stdint.h>
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*
+ * Port specific definitions -- entering/exiting critical section.
+ * Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h
+ *
+ * Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with
+ * ATOMIC_ENTER_CRITICAL().
+ *
+ */
+#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
+
+/* Nested interrupt scheme is supported in this port. */
+    #define ATOMIC_ENTER_CRITICAL() \
+    UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
+
+    #define ATOMIC_EXIT_CRITICAL() \
+    portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
+
+#else
+
+/* Nested interrupt scheme is NOT supported in this port. */
+    #define ATOMIC_ENTER_CRITICAL()    portENTER_CRITICAL()
+    #define ATOMIC_EXIT_CRITICAL()     portEXIT_CRITICAL()
+
+#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
+
+/*
+ * Port specific definition -- "always inline".
+ * Inline is compiler specific, and may not always get inlined depending on your
+ * optimization level.  Also, inline is considered as performance optimization
+ * for atomic.  Thus, if portFORCE_INLINE is not provided by portmacro.h,
+ * instead of resulting error, simply define it away.
+ */
+#ifndef portFORCE_INLINE
+    #define portFORCE_INLINE
+#endif
+
+#define ATOMIC_COMPARE_AND_SWAP_SUCCESS    0x1U     /**< Compare and swap succeeded, swapped. */
+#define ATOMIC_COMPARE_AND_SWAP_FAILURE    0x0U     /**< Compare and swap failed, did not swap. */
+
+/*----------------------------- Swap && CAS ------------------------------*/
+
+/**
+ * Atomic compare-and-swap
+ *
+ * @brief Performs an atomic compare-and-swap operation on the specified values.
+ *
+ * @param[in, out] pulDestination  Pointer to memory location from where value is
+ *                               to be loaded and checked.
+ * @param[in] ulExchange         If condition meets, write this value to memory.
+ * @param[in] ulComparand        Swap condition.
+ *
+ * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
+ *
+ * @note This function only swaps *pulDestination with ulExchange, if previous
+ *       *pulDestination value equals ulComparand.
+ */
+static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
+                                                            uint32_t ulExchange,
+                                                            uint32_t ulComparand )
+{
+    uint32_t ulReturnValue;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        if( *pulDestination == ulComparand )
+        {
+            *pulDestination = ulExchange;
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
+        }
+        else
+        {
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
+        }
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulReturnValue;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic swap (pointers)
+ *
+ * @brief Atomically sets the address pointed to by *ppvDestination to the value
+ *        of *pvExchange.
+ *
+ * @param[in, out] ppvDestination  Pointer to memory location from where a pointer
+ *                                 value is to be loaded and written back to.
+ * @param[in] pvExchange           Pointer value to be written to *ppvDestination.
+ *
+ * @return The initial value of *ppvDestination.
+ */
+static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
+                                                        void * pvExchange )
+{
+    void * pReturnValue;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        pReturnValue = *ppvDestination;
+        *ppvDestination = pvExchange;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return pReturnValue;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic compare-and-swap (pointers)
+ *
+ * @brief Performs an atomic compare-and-swap operation on the specified pointer
+ *        values.
+ *
+ * @param[in, out] ppvDestination  Pointer to memory location from where a pointer
+ *                                 value is to be loaded and checked.
+ * @param[in] pvExchange           If condition meets, write this value to memory.
+ * @param[in] pvComparand          Swap condition.
+ *
+ * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
+ *
+ * @note This function only swaps *ppvDestination with pvExchange, if previous
+ *       *ppvDestination value equals pvComparand.
+ */
+static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
+                                                                    void * pvExchange,
+                                                                    void * pvComparand )
+{
+    uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        if( *ppvDestination == pvComparand )
+        {
+            *ppvDestination = pvExchange;
+            ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
+        }
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulReturnValue;
+}
+
+
+/*----------------------------- Arithmetic ------------------------------*/
+
+/**
+ * Atomic add
+ *
+ * @brief Atomically adds count to the value of the specified pointer points to.
+ *
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
+ *                         loaded and written back to.
+ * @param[in] ulCount      Value to be added to *pulAddend.
+ *
+ * @return previous *pulAddend value.
+ */
+static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
+                                                 uint32_t ulCount )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulAddend;
+        *pulAddend += ulCount;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic subtract
+ *
+ * @brief Atomically subtracts count from the value of the specified pointer
+ *        pointers to.
+ *
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
+ *                         loaded and written back to.
+ * @param[in] ulCount      Value to be subtract from *pulAddend.
+ *
+ * @return previous *pulAddend value.
+ */
+static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
+                                                      uint32_t ulCount )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulAddend;
+        *pulAddend -= ulCount;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic increment
+ *
+ * @brief Atomically increments the value of the specified pointer points to.
+ *
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
+ *                         loaded and written back to.
+ *
+ * @return *pulAddend value before increment.
+ */
+static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulAddend;
+        *pulAddend += 1;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic decrement
+ *
+ * @brief Atomically decrements the value of the specified pointer points to
+ *
+ * @param[in,out] pulAddend  Pointer to memory location from where value is to be
+ *                         loaded and written back to.
+ *
+ * @return *pulAddend value before decrement.
+ */
+static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulAddend;
+        *pulAddend -= 1;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+
+/*----------------------------- Bitwise Logical ------------------------------*/
+
+/**
+ * Atomic OR
+ *
+ * @brief Performs an atomic OR operation on the specified values.
+ *
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
+ *                                to be loaded and written back to.
+ * @param [in] ulValue            Value to be ORed with *pulDestination.
+ *
+ * @return The original value of *pulDestination.
+ */
+static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
+                                                uint32_t ulValue )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulDestination;
+        *pulDestination |= ulValue;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic AND
+ *
+ * @brief Performs an atomic AND operation on the specified values.
+ *
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
+ *                                to be loaded and written back to.
+ * @param [in] ulValue            Value to be ANDed with *pulDestination.
+ *
+ * @return The original value of *pulDestination.
+ */
+static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
+                                                 uint32_t ulValue )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulDestination;
+        *pulDestination &= ulValue;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic NAND
+ *
+ * @brief Performs an atomic NAND operation on the specified values.
+ *
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
+ *                                to be loaded and written back to.
+ * @param [in] ulValue            Value to be NANDed with *pulDestination.
+ *
+ * @return The original value of *pulDestination.
+ */
+static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
+                                                  uint32_t ulValue )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulDestination;
+        *pulDestination = ~( ulCurrent & ulValue );
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * Atomic XOR
+ *
+ * @brief Performs an atomic XOR operation on the specified values.
+ *
+ * @param [in, out] pulDestination  Pointer to memory location from where value is
+ *                                to be loaded and written back to.
+ * @param [in] ulValue            Value to be XORed with *pulDestination.
+ *
+ * @return The original value of *pulDestination.
+ */
+static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
+                                                 uint32_t ulValue )
+{
+    uint32_t ulCurrent;
+
+    ATOMIC_ENTER_CRITICAL();
+    {
+        ulCurrent = *pulDestination;
+        *pulDestination ^= ulValue;
+    }
+    ATOMIC_EXIT_CRITICAL();
+
+    return ulCurrent;
+}
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* ATOMIC_H */

include/deprecated_definitions.h

@@ -1,279 +1,281 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef DEPRECATED_DEFINITIONS_H
-#define DEPRECATED_DEFINITIONS_H
-
-
-/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
-pre-processor definition was used to ensure the pre-processor found the correct
-portmacro.h file for the port being used.  That scheme was deprecated in favour
-of setting the compiler's include path such that it found the correct
-portmacro.h file - removing the need for the constant and allowing the
-portmacro.h file to be located anywhere in relation to the port being used.  The
-definitions below remain in the code for backward compatibility only.  New
-projects should not use them. */
-
-#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
-	#include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
-	typedef void ( __interrupt __far *pxISR )();
-#endif
-
-#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
-	#include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
-	typedef void ( __interrupt __far *pxISR )();
-#endif
-
-#ifdef GCC_MEGA_AVR
-	#include "../portable/GCC/ATMega323/portmacro.h"
-#endif
-
-#ifdef IAR_MEGA_AVR
-	#include "../portable/IAR/ATMega323/portmacro.h"
-#endif
-
-#ifdef MPLAB_PIC24_PORT
-	#include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
-#endif
-
-#ifdef MPLAB_DSPIC_PORT
-	#include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
-#endif
-
-#ifdef MPLAB_PIC18F_PORT
-	#include "../../Source/portable/MPLAB/PIC18F/portmacro.h"
-#endif
-
-#ifdef MPLAB_PIC32MX_PORT
-	#include "../../Source/portable/MPLAB/PIC32MX/portmacro.h"
-#endif
-
-#ifdef _FEDPICC
-	#include "libFreeRTOS/Include/portmacro.h"
-#endif
-
-#ifdef SDCC_CYGNAL
-	#include "../../Source/portable/SDCC/Cygnal/portmacro.h"
-#endif
-
-#ifdef GCC_ARM7
-	#include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
-#endif
-
-#ifdef GCC_ARM7_ECLIPSE
-	#include "portmacro.h"
-#endif
-
-#ifdef ROWLEY_LPC23xx
-	#include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
-#endif
-
-#ifdef IAR_MSP430
-	#include "..\..\Source\portable\IAR\MSP430\portmacro.h"
-#endif
-
-#ifdef GCC_MSP430
-	#include "../../Source/portable/GCC/MSP430F449/portmacro.h"
-#endif
-
-#ifdef ROWLEY_MSP430
-	#include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
-#endif
-
-#ifdef ARM7_LPC21xx_KEIL_RVDS
-	#include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
-#endif
-
-#ifdef SAM7_GCC
-	#include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
-#endif
-
-#ifdef SAM7_IAR
-	#include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
-#endif
-
-#ifdef SAM9XE_IAR
-	#include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
-#endif
-
-#ifdef LPC2000_IAR
-	#include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
-#endif
-
-#ifdef STR71X_IAR
-	#include "..\..\Source\portable\IAR\STR71x\portmacro.h"
-#endif
-
-#ifdef STR75X_IAR
-	#include "..\..\Source\portable\IAR\STR75x\portmacro.h"
-#endif
-
-#ifdef STR75X_GCC
-	#include "..\..\Source\portable\GCC\STR75x\portmacro.h"
-#endif
-
-#ifdef STR91X_IAR
-	#include "..\..\Source\portable\IAR\STR91x\portmacro.h"
-#endif
-
-#ifdef GCC_H8S
-	#include "../../Source/portable/GCC/H8S2329/portmacro.h"
-#endif
-
-#ifdef GCC_AT91FR40008
-	#include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
-#endif
-
-#ifdef RVDS_ARMCM3_LM3S102
-	#include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef GCC_ARMCM3_LM3S102
-	#include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef GCC_ARMCM3
-	#include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef IAR_ARM_CM3
-	#include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef IAR_ARMCM3_LM
-	#include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
-#endif
-
-#ifdef HCS12_CODE_WARRIOR
-	#include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
-#endif
-
-#ifdef MICROBLAZE_GCC
-	#include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
-#endif
-
-#ifdef TERN_EE
-	#include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
-#endif
-
-#ifdef GCC_HCS12
-	#include "../../Source/portable/GCC/HCS12/portmacro.h"
-#endif
-
-#ifdef GCC_MCF5235
-    #include "../../Source/portable/GCC/MCF5235/portmacro.h"
-#endif
-
-#ifdef COLDFIRE_V2_GCC
-	#include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
-#endif
-
-#ifdef COLDFIRE_V2_CODEWARRIOR
-	#include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
-#endif
-
-#ifdef GCC_PPC405
-	#include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
-#endif
-
-#ifdef GCC_PPC440
-	#include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
-#endif
-
-#ifdef _16FX_SOFTUNE
-	#include "..\..\Source\portable\Softune\MB96340\portmacro.h"
-#endif
-
-#ifdef BCC_INDUSTRIAL_PC_PORT
-	/* A short file name has to be used in place of the normal
-	FreeRTOSConfig.h when using the Borland compiler. */
-	#include "frconfig.h"
-	#include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
-    typedef void ( __interrupt __far *pxISR )();
-#endif
-
-#ifdef BCC_FLASH_LITE_186_PORT
-	/* A short file name has to be used in place of the normal
-	FreeRTOSConfig.h when using the Borland compiler. */
-	#include "frconfig.h"
-	#include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
-    typedef void ( __interrupt __far *pxISR )();
-#endif
-
-#ifdef __GNUC__
-   #ifdef __AVR32_AVR32A__
-	   #include "portmacro.h"
-   #endif
-#endif
-
-#ifdef __ICCAVR32__
-   #ifdef __CORE__
-      #if __CORE__ == __AVR32A__
-	      #include "portmacro.h"
-      #endif
-   #endif
-#endif
-
-#ifdef __91467D
-	#include "portmacro.h"
-#endif
-
-#ifdef __96340
-	#include "portmacro.h"
-#endif
-
-
-#ifdef __IAR_V850ES_Fx3__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_V850ES_Jx3__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_V850ES_Jx3_L__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_V850ES_Jx2__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_V850ES_Hx2__
-	#include "../../Source/portable/IAR/V850ES/portmacro.h"
-#endif
-
-#ifdef __IAR_78K0R_Kx3__
-	#include "../../Source/portable/IAR/78K0R/portmacro.h"
-#endif
-
-#ifdef __IAR_78K0R_Kx3L__
-	#include "../../Source/portable/IAR/78K0R/portmacro.h"
-#endif
-
-#endif /* DEPRECATED_DEFINITIONS_H */
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef DEPRECATED_DEFINITIONS_H
+#define DEPRECATED_DEFINITIONS_H
+
+
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
+ * pre-processor definition was used to ensure the pre-processor found the correct
+ * portmacro.h file for the port being used.  That scheme was deprecated in favour
+ * of setting the compiler's include path such that it found the correct
+ * portmacro.h file - removing the need for the constant and allowing the
+ * portmacro.h file to be located anywhere in relation to the port being used.  The
+ * definitions below remain in the code for backward compatibility only.  New
+ * projects should not use them. */
+
+#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
+    #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
+    typedef void ( __interrupt __far * pxISR )();
+#endif
+
+#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
+    #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
+    typedef void ( __interrupt __far * pxISR )();
+#endif
+
+#ifdef GCC_MEGA_AVR
+    #include "../portable/GCC/ATMega323/portmacro.h"
+#endif
+
+#ifdef IAR_MEGA_AVR
+    #include "../portable/IAR/ATMega323/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC24_PORT
+    #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
+#endif
+
+#ifdef MPLAB_DSPIC_PORT
+    #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC18F_PORT
+    #include "../../Source/portable/MPLAB/PIC18F/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC32MX_PORT
+    #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h"
+#endif
+
+#ifdef _FEDPICC
+    #include "libFreeRTOS/Include/portmacro.h"
+#endif
+
+#ifdef SDCC_CYGNAL
+    #include "../../Source/portable/SDCC/Cygnal/portmacro.h"
+#endif
+
+#ifdef GCC_ARM7
+    #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
+#endif
+
+#ifdef GCC_ARM7_ECLIPSE
+    #include "portmacro.h"
+#endif
+
+#ifdef ROWLEY_LPC23xx
+    #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
+#endif
+
+#ifdef IAR_MSP430
+    #include "..\..\Source\portable\IAR\MSP430\portmacro.h"
+#endif
+
+#ifdef GCC_MSP430
+    #include "../../Source/portable/GCC/MSP430F449/portmacro.h"
+#endif
+
+#ifdef ROWLEY_MSP430
+    #include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
+#endif
+
+#ifdef ARM7_LPC21xx_KEIL_RVDS
+    #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
+#endif
+
+#ifdef SAM7_GCC
+    #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
+#endif
+
+#ifdef SAM7_IAR
+    #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
+#endif
+
+#ifdef SAM9XE_IAR
+    #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
+#endif
+
+#ifdef LPC2000_IAR
+    #include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
+#endif
+
+#ifdef STR71X_IAR
+    #include "..\..\Source\portable\IAR\STR71x\portmacro.h"
+#endif
+
+#ifdef STR75X_IAR
+    #include "..\..\Source\portable\IAR\STR75x\portmacro.h"
+#endif
+
+#ifdef STR75X_GCC
+    #include "..\..\Source\portable\GCC\STR75x\portmacro.h"
+#endif
+
+#ifdef STR91X_IAR
+    #include "..\..\Source\portable\IAR\STR91x\portmacro.h"
+#endif
+
+#ifdef GCC_H8S
+    #include "../../Source/portable/GCC/H8S2329/portmacro.h"
+#endif
+
+#ifdef GCC_AT91FR40008
+    #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
+#endif
+
+#ifdef RVDS_ARMCM3_LM3S102
+    #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef GCC_ARMCM3_LM3S102
+    #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef GCC_ARMCM3
+    #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef IAR_ARM_CM3
+    #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef IAR_ARMCM3_LM
+    #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef HCS12_CODE_WARRIOR
+    #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
+#endif
+
+#ifdef MICROBLAZE_GCC
+    #include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
+#endif
+
+#ifdef TERN_EE
+    #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
+#endif
+
+#ifdef GCC_HCS12
+    #include "../../Source/portable/GCC/HCS12/portmacro.h"
+#endif
+
+#ifdef GCC_MCF5235
+    #include "../../Source/portable/GCC/MCF5235/portmacro.h"
+#endif
+
+#ifdef COLDFIRE_V2_GCC
+    #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
+#endif
+
+#ifdef COLDFIRE_V2_CODEWARRIOR
+    #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
+#endif
+
+#ifdef GCC_PPC405
+    #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
+#endif
+
+#ifdef GCC_PPC440
+    #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
+#endif
+
+#ifdef _16FX_SOFTUNE
+    #include "..\..\Source\portable\Softune\MB96340\portmacro.h"
+#endif
+
+#ifdef BCC_INDUSTRIAL_PC_PORT
+
+/* A short file name has to be used in place of the normal
+ * FreeRTOSConfig.h when using the Borland compiler. */
+    #include "frconfig.h"
+    #include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
+    typedef void ( __interrupt __far * pxISR )();
+#endif
+
+#ifdef BCC_FLASH_LITE_186_PORT
+
+/* A short file name has to be used in place of the normal
+ * FreeRTOSConfig.h when using the Borland compiler. */
+    #include "frconfig.h"
+    #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
+    typedef void ( __interrupt __far * pxISR )();
+#endif
+
+#ifdef __GNUC__
+    #ifdef __AVR32_AVR32A__
+        #include "portmacro.h"
+    #endif
+#endif
+
+#ifdef __ICCAVR32__
+    #ifdef __CORE__
+        #if __CORE__ == __AVR32A__
+            #include "portmacro.h"
+        #endif
+    #endif
+#endif
+
+#ifdef __91467D
+    #include "portmacro.h"
+#endif
+
+#ifdef __96340
+    #include "portmacro.h"
+#endif
+
+
+#ifdef __IAR_V850ES_Fx3__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx3__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx3_L__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx2__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Hx2__
+    #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_78K0R_Kx3__
+    #include "../../Source/portable/IAR/78K0R/portmacro.h"
+#endif
+
+#ifdef __IAR_78K0R_Kx3L__
+    #include "../../Source/portable/IAR/78K0R/portmacro.h"
+#endif
+
+#endif /* DEPRECATED_DEFINITIONS_H */

include/list.h

@@ -1,412 +1,503 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/*
- * This is the list implementation used by the scheduler.  While it is tailored
- * heavily for the schedulers needs, it is also available for use by
- * application code.
- *
- * list_ts can only store pointers to list_item_ts.  Each ListItem_t contains a
- * numeric value (xItemValue).  Most of the time the lists are sorted in
- * descending item value order.
- *
- * Lists are created already containing one list item.  The value of this
- * item is the maximum possible that can be stored, it is therefore always at
- * the end of the list and acts as a marker.  The list member pxHead always
- * points to this marker - even though it is at the tail of the list.  This
- * is because the tail contains a wrap back pointer to the true head of
- * the list.
- *
- * In addition to it's value, each list item contains a pointer to the next
- * item in the list (pxNext), a pointer to the list it is in (pxContainer)
- * and a pointer to back to the object that contains it.  These later two
- * pointers are included for efficiency of list manipulation.  There is
- * effectively a two way link between the object containing the list item and
- * the list item itself.
- *
- *
- * \page ListIntroduction List Implementation
- * \ingroup FreeRTOSIntro
- */
-
-#ifndef INC_FREERTOS_H
-	#error FreeRTOS.h must be included before list.h
-#endif
-
-#ifndef LIST_H
-#define LIST_H
-
-/*
- * The list structure members are modified from within interrupts, and therefore
- * by rights should be declared volatile.  However, they are only modified in a
- * functionally atomic way (within critical sections of with the scheduler
- * suspended) and are either passed by reference into a function or indexed via
- * a volatile variable.  Therefore, in all use cases tested so far, the volatile
- * qualifier can be omitted in order to provide a moderate performance
- * improvement without adversely affecting functional behaviour.  The assembly
- * instructions generated by the IAR, ARM and GCC compilers when the respective
- * compiler's options were set for maximum optimisation has been inspected and
- * deemed to be as intended.  That said, as compiler technology advances, and
- * especially if aggressive cross module optimisation is used (a use case that
- * has not been exercised to any great extend) then it is feasible that the
- * volatile qualifier will be needed for correct optimisation.  It is expected
- * that a compiler removing essential code because, without the volatile
- * qualifier on the list structure members and with aggressive cross module
- * optimisation, the compiler deemed the code unnecessary will result in
- * complete and obvious failure of the scheduler.  If this is ever experienced
- * then the volatile qualifier can be inserted in the relevant places within the
- * list structures by simply defining configLIST_VOLATILE to volatile in
- * FreeRTOSConfig.h (as per the example at the bottom of this comment block).
- * If configLIST_VOLATILE is not defined then the preprocessor directives below
- * will simply #define configLIST_VOLATILE away completely.
- *
- * To use volatile list structure members then add the following line to
- * FreeRTOSConfig.h (without the quotes):
- * "#define configLIST_VOLATILE volatile"
- */
-#ifndef configLIST_VOLATILE
-	#define configLIST_VOLATILE
-#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Macros that can be used to place known values within the list structures,
-then check that the known values do not get corrupted during the execution of
-the application.   These may catch the list data structures being overwritten in
-memory.  They will not catch data errors caused by incorrect configuration or
-use of FreeRTOS.*/
-#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )
-	/* Define the macros to do nothing. */
-	#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE
-	#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE
-	#define listFIRST_LIST_INTEGRITY_CHECK_VALUE
-	#define listSECOND_LIST_INTEGRITY_CHECK_VALUE
-	#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
-	#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
-	#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )
-	#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )
-	#define listTEST_LIST_ITEM_INTEGRITY( pxItem )
-	#define listTEST_LIST_INTEGRITY( pxList )
-#else
-	/* Define macros that add new members into the list structures. */
-	#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE				TickType_t xListItemIntegrityValue1;
-	#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE				TickType_t xListItemIntegrityValue2;
-	#define listFIRST_LIST_INTEGRITY_CHECK_VALUE					TickType_t xListIntegrityValue1;
-	#define listSECOND_LIST_INTEGRITY_CHECK_VALUE					TickType_t xListIntegrityValue2;
-
-	/* Define macros that set the new structure members to known values. */
-	#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )		( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
-	#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )	( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
-	#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )		( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
-	#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )		( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
-
-	/* Define macros that will assert if one of the structure members does not
-	contain its expected value. */
-	#define listTEST_LIST_ITEM_INTEGRITY( pxItem )		configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
-	#define listTEST_LIST_INTEGRITY( pxList )			configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
-#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */
-
-
-/*
- * Definition of the only type of object that a list can contain.
- */
-struct xLIST;
-struct xLIST_ITEM
-{
-	listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	configLIST_VOLATILE TickType_t xItemValue;			/*< The value being listed.  In most cases this is used to sort the list in descending order. */
-	struct xLIST_ITEM * configLIST_VOLATILE pxNext;		/*< Pointer to the next ListItem_t in the list. */
-	struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;	/*< Pointer to the previous ListItem_t in the list. */
-	void * pvOwner;										/*< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
-	struct xLIST * configLIST_VOLATILE pxContainer;		/*< Pointer to the list in which this list item is placed (if any). */
-	listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-};
-typedef struct xLIST_ITEM ListItem_t;					/* For some reason lint wants this as two separate definitions. */
-
-struct xMINI_LIST_ITEM
-{
-	listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE			/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	configLIST_VOLATILE TickType_t xItemValue;
-	struct xLIST_ITEM * configLIST_VOLATILE pxNext;
-	struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
-};
-typedef struct xMINI_LIST_ITEM MiniListItem_t;
-
-/*
- * Definition of the type of queue used by the scheduler.
- */
-typedef struct xLIST
-{
-	listFIRST_LIST_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	volatile UBaseType_t uxNumberOfItems;
-	ListItem_t * configLIST_VOLATILE pxIndex;			/*< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
-	MiniListItem_t xListEnd;							/*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
-	listSECOND_LIST_INTEGRITY_CHECK_VALUE				/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-} List_t;
-
-/*
- * Access macro to set the owner of a list item.  The owner of a list item
- * is the object (usually a TCB) that contains the list item.
- *
- * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
- * \ingroup LinkedList
- */
-#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner )		( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) )
-
-/*
- * Access macro to get the owner of a list item.  The owner of a list item
- * is the object (usually a TCB) that contains the list item.
- *
- * \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
- * \ingroup LinkedList
- */
-#define listGET_LIST_ITEM_OWNER( pxListItem )	( ( pxListItem )->pvOwner )
-
-/*
- * Access macro to set the value of the list item.  In most cases the value is
- * used to sort the list in descending order.
- *
- * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
- * \ingroup LinkedList
- */
-#define listSET_LIST_ITEM_VALUE( pxListItem, xValue )	( ( pxListItem )->xItemValue = ( xValue ) )
-
-/*
- * Access macro to retrieve the value of the list item.  The value can
- * represent anything - for example the priority of a task, or the time at
- * which a task should be unblocked.
- *
- * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
- * \ingroup LinkedList
- */
-#define listGET_LIST_ITEM_VALUE( pxListItem )	( ( pxListItem )->xItemValue )
-
-/*
- * Access macro to retrieve the value of the list item at the head of a given
- * list.
- *
- * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
- * \ingroup LinkedList
- */
-#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList )	( ( ( pxList )->xListEnd ).pxNext->xItemValue )
-
-/*
- * Return the list item at the head of the list.
- *
- * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY
- * \ingroup LinkedList
- */
-#define listGET_HEAD_ENTRY( pxList )	( ( ( pxList )->xListEnd ).pxNext )
-
-/*
- * Return the next list item.
- *
- * \page listGET_NEXT listGET_NEXT
- * \ingroup LinkedList
- */
-#define listGET_NEXT( pxListItem )	( ( pxListItem )->pxNext )
-
-/*
- * Return the list item that marks the end of the list
- *
- * \page listGET_END_MARKER listGET_END_MARKER
- * \ingroup LinkedList
- */
-#define listGET_END_MARKER( pxList )	( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )
-
-/*
- * Access macro to determine if a list contains any items.  The macro will
- * only have the value true if the list is empty.
- *
- * \page listLIST_IS_EMPTY listLIST_IS_EMPTY
- * \ingroup LinkedList
- */
-#define listLIST_IS_EMPTY( pxList )	( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )
-
-/*
- * Access macro to return the number of items in the list.
- */
-#define listCURRENT_LIST_LENGTH( pxList )	( ( pxList )->uxNumberOfItems )
-
-/*
- * Access function to obtain the owner of the next entry in a list.
- *
- * The list member pxIndex is used to walk through a list.  Calling
- * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list
- * and returns that entry's pxOwner parameter.  Using multiple calls to this
- * function it is therefore possible to move through every item contained in
- * a list.
- *
- * The pxOwner parameter of a list item is a pointer to the object that owns
- * the list item.  In the scheduler this is normally a task control block.
- * The pxOwner parameter effectively creates a two way link between the list
- * item and its owner.
- *
- * @param pxTCB pxTCB is set to the address of the owner of the next list item.
- * @param pxList The list from which the next item owner is to be returned.
- *
- * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
- * \ingroup LinkedList
- */
-#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList )										\
-{																							\
-List_t * const pxConstList = ( pxList );													\
-	/* Increment the index to the next item and return the item, ensuring */				\
-	/* we don't return the marker used at the end of the list.  */							\
-	( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;							\
-	if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) )	\
-	{																						\
-		( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;						\
-	}																						\
-	( pxTCB ) = ( pxConstList )->pxIndex->pvOwner;											\
-}
-
-
-/*
- * Access function to obtain the owner of the first entry in a list.  Lists
- * are normally sorted in ascending item value order.
- *
- * This function returns the pxOwner member of the first item in the list.
- * The pxOwner parameter of a list item is a pointer to the object that owns
- * the list item.  In the scheduler this is normally a task control block.
- * The pxOwner parameter effectively creates a two way link between the list
- * item and its owner.
- *
- * @param pxList The list from which the owner of the head item is to be
- * returned.
- *
- * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY
- * \ingroup LinkedList
- */
-#define listGET_OWNER_OF_HEAD_ENTRY( pxList )  ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner )
-
-/*
- * Check to see if a list item is within a list.  The list item maintains a
- * "container" pointer that points to the list it is in.  All this macro does
- * is check to see if the container and the list match.
- *
- * @param pxList The list we want to know if the list item is within.
- * @param pxListItem The list item we want to know if is in the list.
- * @return pdTRUE if the list item is in the list, otherwise pdFALSE.
- */
-#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )
-
-/*
- * Return the list a list item is contained within (referenced from).
- *
- * @param pxListItem The list item being queried.
- * @return A pointer to the List_t object that references the pxListItem
- */
-#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer )
-
-/*
- * This provides a crude means of knowing if a list has been initialised, as
- * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise()
- * function.
- */
-#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY )
-
-/*
- * Must be called before a list is used!  This initialises all the members
- * of the list structure and inserts the xListEnd item into the list as a
- * marker to the back of the list.
- *
- * @param pxList Pointer to the list being initialised.
- *
- * \page vListInitialise vListInitialise
- * \ingroup LinkedList
- */
-void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;
-
-/*
- * Must be called before a list item is used.  This sets the list container to
- * null so the item does not think that it is already contained in a list.
- *
- * @param pxItem Pointer to the list item being initialised.
- *
- * \page vListInitialiseItem vListInitialiseItem
- * \ingroup LinkedList
- */
-void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
-
-/*
- * Insert a list item into a list.  The item will be inserted into the list in
- * a position determined by its item value (descending item value order).
- *
- * @param pxList The list into which the item is to be inserted.
- *
- * @param pxNewListItem The item that is to be placed in the list.
- *
- * \page vListInsert vListInsert
- * \ingroup LinkedList
- */
-void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
-
-/*
- * Insert a list item into a list.  The item will be inserted in a position
- * such that it will be the last item within the list returned by multiple
- * calls to listGET_OWNER_OF_NEXT_ENTRY.
- *
- * The list member pxIndex is used to walk through a list.  Calling
- * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
- * Placing an item in a list using vListInsertEnd effectively places the item
- * in the list position pointed to by pxIndex.  This means that every other
- * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
- * the pxIndex parameter again points to the item being inserted.
- *
- * @param pxList The list into which the item is to be inserted.
- *
- * @param pxNewListItem The list item to be inserted into the list.
- *
- * \page vListInsertEnd vListInsertEnd
- * \ingroup LinkedList
- */
-void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
-
-/*
- * Remove an item from a list.  The list item has a pointer to the list that
- * it is in, so only the list item need be passed into the function.
- *
- * @param uxListRemove The item to be removed.  The item will remove itself from
- * the list pointed to by it's pxContainer parameter.
- *
- * @return The number of items that remain in the list after the list item has
- * been removed.
- *
- * \page uxListRemove uxListRemove
- * \ingroup LinkedList
- */
-UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*
+ * This is the list implementation used by the scheduler.  While it is tailored
+ * heavily for the schedulers needs, it is also available for use by
+ * application code.
+ *
+ * list_ts can only store pointers to list_item_ts.  Each ListItem_t contains a
+ * numeric value (xItemValue).  Most of the time the lists are sorted in
+ * ascending item value order.
+ *
+ * Lists are created already containing one list item.  The value of this
+ * item is the maximum possible that can be stored, it is therefore always at
+ * the end of the list and acts as a marker.  The list member pxHead always
+ * points to this marker - even though it is at the tail of the list.  This
+ * is because the tail contains a wrap back pointer to the true head of
+ * the list.
+ *
+ * In addition to it's value, each list item contains a pointer to the next
+ * item in the list (pxNext), a pointer to the list it is in (pxContainer)
+ * and a pointer to back to the object that contains it.  These later two
+ * pointers are included for efficiency of list manipulation.  There is
+ * effectively a two way link between the object containing the list item and
+ * the list item itself.
+ *
+ *
+ * \page ListIntroduction List Implementation
+ * \ingroup FreeRTOSIntro
+ */
+
+
+#ifndef LIST_H
+#define LIST_H
+
+#ifndef INC_FREERTOS_H
+    #error "FreeRTOS.h must be included before list.h"
+#endif
+
+/*
+ * The list structure members are modified from within interrupts, and therefore
+ * by rights should be declared volatile.  However, they are only modified in a
+ * functionally atomic way (within critical sections of with the scheduler
+ * suspended) and are either passed by reference into a function or indexed via
+ * a volatile variable.  Therefore, in all use cases tested so far, the volatile
+ * qualifier can be omitted in order to provide a moderate performance
+ * improvement without adversely affecting functional behaviour.  The assembly
+ * instructions generated by the IAR, ARM and GCC compilers when the respective
+ * compiler's options were set for maximum optimisation has been inspected and
+ * deemed to be as intended.  That said, as compiler technology advances, and
+ * especially if aggressive cross module optimisation is used (a use case that
+ * has not been exercised to any great extend) then it is feasible that the
+ * volatile qualifier will be needed for correct optimisation.  It is expected
+ * that a compiler removing essential code because, without the volatile
+ * qualifier on the list structure members and with aggressive cross module
+ * optimisation, the compiler deemed the code unnecessary will result in
+ * complete and obvious failure of the scheduler.  If this is ever experienced
+ * then the volatile qualifier can be inserted in the relevant places within the
+ * list structures by simply defining configLIST_VOLATILE to volatile in
+ * FreeRTOSConfig.h (as per the example at the bottom of this comment block).
+ * If configLIST_VOLATILE is not defined then the preprocessor directives below
+ * will simply #define configLIST_VOLATILE away completely.
+ *
+ * To use volatile list structure members then add the following line to
+ * FreeRTOSConfig.h (without the quotes):
+ * "#define configLIST_VOLATILE volatile"
+ */
+#ifndef configLIST_VOLATILE
+    #define configLIST_VOLATILE
+#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/* Macros that can be used to place known values within the list structures,
+ * then check that the known values do not get corrupted during the execution of
+ * the application.   These may catch the list data structures being overwritten in
+ * memory.  They will not catch data errors caused by incorrect configuration or
+ * use of FreeRTOS.*/
+#if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )
+    /* Define the macros to do nothing. */
+    #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE
+    #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE
+    #define listFIRST_LIST_INTEGRITY_CHECK_VALUE
+    #define listSECOND_LIST_INTEGRITY_CHECK_VALUE
+    #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
+    #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
+    #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )
+    #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )
+    #define listTEST_LIST_ITEM_INTEGRITY( pxItem )
+    #define listTEST_LIST_INTEGRITY( pxList )
+#else /* if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) */
+    /* Define macros that add new members into the list structures. */
+    #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE     TickType_t xListItemIntegrityValue1;
+    #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE    TickType_t xListItemIntegrityValue2;
+    #define listFIRST_LIST_INTEGRITY_CHECK_VALUE          TickType_t xListIntegrityValue1;
+    #define listSECOND_LIST_INTEGRITY_CHECK_VALUE         TickType_t xListIntegrityValue2;
+
+/* Define macros that set the new structure members to known values. */
+    #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )     ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
+    #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )    ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
+    #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )              ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
+    #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )              ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
+
+/* Define macros that will assert if one of the structure members does not
+ * contain its expected value. */
+    #define listTEST_LIST_ITEM_INTEGRITY( pxItem )                      configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
+    #define listTEST_LIST_INTEGRITY( pxList )                           configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
+#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */
+
+
+/*
+ * Definition of the only type of object that a list can contain.
+ */
+struct xLIST;
+struct xLIST_ITEM
+{
+    listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE           /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    configLIST_VOLATILE TickType_t xItemValue;          /**< The value being listed.  In most cases this is used to sort the list in ascending order. */
+    struct xLIST_ITEM * configLIST_VOLATILE pxNext;     /**< Pointer to the next ListItem_t in the list. */
+    struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /**< Pointer to the previous ListItem_t in the list. */
+    void * pvOwner;                                     /**< Pointer to the object (normally a TCB) that contains the list item.  There is therefore a two way link between the object containing the list item and the list item itself. */
+    struct xLIST * configLIST_VOLATILE pxContainer;     /**< Pointer to the list in which this list item is placed (if any). */
+    listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE          /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+};
+typedef struct xLIST_ITEM ListItem_t;
+
+#if ( configUSE_MINI_LIST_ITEM == 1 )
+    struct xMINI_LIST_ITEM
+    {
+        listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+        configLIST_VOLATILE TickType_t xItemValue;
+        struct xLIST_ITEM * configLIST_VOLATILE pxNext;
+        struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
+    };
+    typedef struct xMINI_LIST_ITEM MiniListItem_t;
+#else
+    typedef struct xLIST_ITEM      MiniListItem_t;
+#endif
+
+/*
+ * Definition of the type of queue used by the scheduler.
+ */
+typedef struct xLIST
+{
+    listFIRST_LIST_INTEGRITY_CHECK_VALUE      /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    volatile UBaseType_t uxNumberOfItems;
+    ListItem_t * configLIST_VOLATILE pxIndex; /**< Used to walk through the list.  Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
+    MiniListItem_t xListEnd;                  /**< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
+    listSECOND_LIST_INTEGRITY_CHECK_VALUE     /**< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+} List_t;
+
+/*
+ * Access macro to set the owner of a list item.  The owner of a list item
+ * is the object (usually a TCB) that contains the list item.
+ *
+ * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
+ * \ingroup LinkedList
+ */
+#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner )    ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) )
+
+/*
+ * Access macro to get the owner of a list item.  The owner of a list item
+ * is the object (usually a TCB) that contains the list item.
+ *
+ * \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
+ * \ingroup LinkedList
+ */
+#define listGET_LIST_ITEM_OWNER( pxListItem )             ( ( pxListItem )->pvOwner )
+
+/*
+ * Access macro to set the value of the list item.  In most cases the value is
+ * used to sort the list in ascending order.
+ *
+ * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
+ * \ingroup LinkedList
+ */
+#define listSET_LIST_ITEM_VALUE( pxListItem, xValue )     ( ( pxListItem )->xItemValue = ( xValue ) )
+
+/*
+ * Access macro to retrieve the value of the list item.  The value can
+ * represent anything - for example the priority of a task, or the time at
+ * which a task should be unblocked.
+ *
+ * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
+ * \ingroup LinkedList
+ */
+#define listGET_LIST_ITEM_VALUE( pxListItem )             ( ( pxListItem )->xItemValue )
+
+/*
+ * Access macro to retrieve the value of the list item at the head of a given
+ * list.
+ *
+ * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
+ * \ingroup LinkedList
+ */
+#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList )        ( ( ( pxList )->xListEnd ).pxNext->xItemValue )
+
+/*
+ * Return the list item at the head of the list.
+ *
+ * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY
+ * \ingroup LinkedList
+ */
+#define listGET_HEAD_ENTRY( pxList )                      ( ( ( pxList )->xListEnd ).pxNext )
+
+/*
+ * Return the next list item.
+ *
+ * \page listGET_NEXT listGET_NEXT
+ * \ingroup LinkedList
+ */
+#define listGET_NEXT( pxListItem )                        ( ( pxListItem )->pxNext )
+
+/*
+ * Return the list item that marks the end of the list
+ *
+ * \page listGET_END_MARKER listGET_END_MARKER
+ * \ingroup LinkedList
+ */
+#define listGET_END_MARKER( pxList )                      ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )
+
+/*
+ * Access macro to determine if a list contains any items.  The macro will
+ * only have the value true if the list is empty.
+ *
+ * \page listLIST_IS_EMPTY listLIST_IS_EMPTY
+ * \ingroup LinkedList
+ */
+#define listLIST_IS_EMPTY( pxList )                       ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )
+
+/*
+ * Access macro to return the number of items in the list.
+ */
+#define listCURRENT_LIST_LENGTH( pxList )                 ( ( pxList )->uxNumberOfItems )
+
+/*
+ * Access function to obtain the owner of the next entry in a list.
+ *
+ * The list member pxIndex is used to walk through a list.  Calling
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list
+ * and returns that entry's pxOwner parameter.  Using multiple calls to this
+ * function it is therefore possible to move through every item contained in
+ * a list.
+ *
+ * The pxOwner parameter of a list item is a pointer to the object that owns
+ * the list item.  In the scheduler this is normally a task control block.
+ * The pxOwner parameter effectively creates a two way link between the list
+ * item and its owner.
+ *
+ * @param pxTCB pxTCB is set to the address of the owner of the next list item.
+ * @param pxList The list from which the next item owner is to be returned.
+ *
+ * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
+ * \ingroup LinkedList
+ */
+#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList )                                           \
+    do {                                                                                       \
+        List_t * const pxConstList = ( pxList );                                               \
+        /* Increment the index to the next item and return the item, ensuring */               \
+        /* we don't return the marker used at the end of the list.  */                         \
+        ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;                           \
+        if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \
+        {                                                                                      \
+            ( pxConstList )->pxIndex = ( pxConstList )->xListEnd.pxNext;                       \
+        }                                                                                      \
+        ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner;                                         \
+    } while( 0 )
+
+/*
+ * Version of uxListRemove() that does not return a value.  Provided as a slight
+ * optimisation for xTaskIncrementTick() by being inline.
+ *
+ * Remove an item from a list.  The list item has a pointer to the list that
+ * it is in, so only the list item need be passed into the function.
+ *
+ * @param uxListRemove The item to be removed.  The item will remove itself from
+ * the list pointed to by it's pxContainer parameter.
+ *
+ * @return The number of items that remain in the list after the list item has
+ * been removed.
+ *
+ * \page listREMOVE_ITEM listREMOVE_ITEM
+ * \ingroup LinkedList
+ */
+#define listREMOVE_ITEM( pxItemToRemove ) \
+    do {                                  \
+        /* The list item knows which list it is in.  Obtain the list from the list \
+         * item. */                                                              \
+        List_t * const pxList = ( pxItemToRemove )->pxContainer;                 \
+                                                                                 \
+        ( pxItemToRemove )->pxNext->pxPrevious = ( pxItemToRemove )->pxPrevious; \
+        ( pxItemToRemove )->pxPrevious->pxNext = ( pxItemToRemove )->pxNext;     \
+        /* Make sure the index is left pointing to a valid item. */              \
+        if( pxList->pxIndex == ( pxItemToRemove ) )                              \
+        {                                                                        \
+            pxList->pxIndex = ( pxItemToRemove )->pxPrevious;                    \
+        }                                                                        \
+                                                                                 \
+        ( pxItemToRemove )->pxContainer = NULL;                                  \
+        ( pxList->uxNumberOfItems )--;                                           \
+    } while( 0 )
+
+/*
+ * Inline version of vListInsertEnd() to provide slight optimisation for
+ * xTaskIncrementTick().
+ *
+ * Insert a list item into a list.  The item will be inserted in a position
+ * such that it will be the last item within the list returned by multiple
+ * calls to listGET_OWNER_OF_NEXT_ENTRY.
+ *
+ * The list member pxIndex is used to walk through a list.  Calling
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
+ * Placing an item in a list using vListInsertEnd effectively places the item
+ * in the list position pointed to by pxIndex.  This means that every other
+ * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
+ * the pxIndex parameter again points to the item being inserted.
+ *
+ * @param pxList The list into which the item is to be inserted.
+ *
+ * @param pxNewListItem The list item to be inserted into the list.
+ *
+ * \page listINSERT_END listINSERT_END
+ * \ingroup LinkedList
+ */
+#define listINSERT_END( pxList, pxNewListItem )           \
+    do {                                                  \
+        ListItem_t * const pxIndex = ( pxList )->pxIndex; \
+                                                          \
+        /* Only effective when configASSERT() is also defined, these tests may catch \
+         * the list data structures being overwritten in memory.  They will not catch \
+         * data errors caused by incorrect configuration or use of FreeRTOS. */ \
+        listTEST_LIST_INTEGRITY( ( pxList ) );                                  \
+        listTEST_LIST_ITEM_INTEGRITY( ( pxNewListItem ) );                      \
+                                                                                \
+        /* Insert a new list item into ( pxList ), but rather than sort the list, \
+         * makes the new list item the last item to be removed by a call to \
+         * listGET_OWNER_OF_NEXT_ENTRY(). */                 \
+        ( pxNewListItem )->pxNext = pxIndex;                 \
+        ( pxNewListItem )->pxPrevious = pxIndex->pxPrevious; \
+                                                             \
+        pxIndex->pxPrevious->pxNext = ( pxNewListItem );     \
+        pxIndex->pxPrevious = ( pxNewListItem );             \
+                                                             \
+        /* Remember which list the item is in. */            \
+        ( pxNewListItem )->pxContainer = ( pxList );         \
+                                                             \
+        ( ( pxList )->uxNumberOfItems )++;                   \
+    } while( 0 )
+
+/*
+ * Access function to obtain the owner of the first entry in a list.  Lists
+ * are normally sorted in ascending item value order.
+ *
+ * This function returns the pxOwner member of the first item in the list.
+ * The pxOwner parameter of a list item is a pointer to the object that owns
+ * the list item.  In the scheduler this is normally a task control block.
+ * The pxOwner parameter effectively creates a two way link between the list
+ * item and its owner.
+ *
+ * @param pxList The list from which the owner of the head item is to be
+ * returned.
+ *
+ * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY
+ * \ingroup LinkedList
+ */
+#define listGET_OWNER_OF_HEAD_ENTRY( pxList )            ( ( &( ( pxList )->xListEnd ) )->pxNext->pvOwner )
+
+/*
+ * Check to see if a list item is within a list.  The list item maintains a
+ * "container" pointer that points to the list it is in.  All this macro does
+ * is check to see if the container and the list match.
+ *
+ * @param pxList The list we want to know if the list item is within.
+ * @param pxListItem The list item we want to know if is in the list.
+ * @return pdTRUE if the list item is in the list, otherwise pdFALSE.
+ */
+#define listIS_CONTAINED_WITHIN( pxList, pxListItem )    ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )
+
+/*
+ * Return the list a list item is contained within (referenced from).
+ *
+ * @param pxListItem The list item being queried.
+ * @return A pointer to the List_t object that references the pxListItem
+ */
+#define listLIST_ITEM_CONTAINER( pxListItem )            ( ( pxListItem )->pxContainer )
+
+/*
+ * This provides a crude means of knowing if a list has been initialised, as
+ * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise()
+ * function.
+ */
+#define listLIST_IS_INITIALISED( pxList )                ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY )
+
+/*
+ * Must be called before a list is used!  This initialises all the members
+ * of the list structure and inserts the xListEnd item into the list as a
+ * marker to the back of the list.
+ *
+ * @param pxList Pointer to the list being initialised.
+ *
+ * \page vListInitialise vListInitialise
+ * \ingroup LinkedList
+ */
+void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;
+
+/*
+ * Must be called before a list item is used.  This sets the list container to
+ * null so the item does not think that it is already contained in a list.
+ *
+ * @param pxItem Pointer to the list item being initialised.
+ *
+ * \page vListInitialiseItem vListInitialiseItem
+ * \ingroup LinkedList
+ */
+void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
+
+/*
+ * Insert a list item into a list.  The item will be inserted into the list in
+ * a position determined by its item value (ascending item value order).
+ *
+ * @param pxList The list into which the item is to be inserted.
+ *
+ * @param pxNewListItem The item that is to be placed in the list.
+ *
+ * \page vListInsert vListInsert
+ * \ingroup LinkedList
+ */
+void vListInsert( List_t * const pxList,
+                  ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
+
+/*
+ * Insert a list item into a list.  The item will be inserted in a position
+ * such that it will be the last item within the list returned by multiple
+ * calls to listGET_OWNER_OF_NEXT_ENTRY.
+ *
+ * The list member pxIndex is used to walk through a list.  Calling
+ * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.
+ * Placing an item in a list using vListInsertEnd effectively places the item
+ * in the list position pointed to by pxIndex.  This means that every other
+ * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
+ * the pxIndex parameter again points to the item being inserted.
+ *
+ * @param pxList The list into which the item is to be inserted.
+ *
+ * @param pxNewListItem The list item to be inserted into the list.
+ *
+ * \page vListInsertEnd vListInsertEnd
+ * \ingroup LinkedList
+ */
+void vListInsertEnd( List_t * const pxList,
+                     ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
+
+/*
+ * Remove an item from a list.  The list item has a pointer to the list that
+ * it is in, so only the list item need be passed into the function.
+ *
+ * @param uxListRemove The item to be removed.  The item will remove itself from
+ * the list pointed to by it's pxContainer parameter.
+ *
+ * @return The number of items that remain in the list after the list item has
+ * been removed.
+ *
+ * \page uxListRemove uxListRemove
+ * \ingroup LinkedList
+ */
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* ifndef LIST_H */

include/mpu_prototypes.h

@@ -1,160 +1,388 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/*
- * When the MPU is used the standard (non MPU) API functions are mapped to
- * equivalents that start "MPU_", the prototypes for which are defined in this
- * header files.  This will cause the application code to call the MPU_ version
- * which wraps the non-MPU version with privilege promoting then demoting code,
- * so the kernel code always runs will full privileges.
- */
-
-
-#ifndef MPU_PROTOTYPES_H
-#define MPU_PROTOTYPES_H
-
-/* MPU versions of tasks.h API functions. */
-BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
-TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
-TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
-char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL;
-TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
-TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) FREERTOS_SYSTEM_CALL;
-void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) FREERTOS_SYSTEM_CALL;
-TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
-uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
-uint32_t MPU_ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL;
-TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
-void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
-
-/* MPU versions of queue.h API functions. */
-BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
-void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL;
-TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
-void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) FREERTOS_SYSTEM_CALL;
-void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
-const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
-QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
-QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
-QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
-void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
-uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
-
-/* MPU versions of timers.h API functions. */
-TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
-TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
-void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
-void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
-TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
-void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
-TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
-TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-
-/* MPU versions of event_group.h API functions. */
-EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
-EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
-EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
-EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
-EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
-UBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup ) FREERTOS_SYSTEM_CALL;
-
-/* MPU versions of message/stream_buffer.h API functions. */
-size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
-size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
-void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
-size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
-size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
-BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
-StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
-StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
-
-
-
-#endif /* MPU_PROTOTYPES_H */
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*
+ * When the MPU is used the standard (non MPU) API functions are mapped to
+ * equivalents that start "MPU_", the prototypes for which are defined in this
+ * header files.  This will cause the application code to call the MPU_ version
+ * which wraps the non-MPU version with privilege promoting then demoting code,
+ * so the kernel code always runs will full privileges.
+ */
+
+
+#ifndef MPU_PROTOTYPES_H
+#define MPU_PROTOTYPES_H
+
+typedef struct xTaskGenericNotifyParams
+{
+    TaskHandle_t xTaskToNotify;
+    UBaseType_t uxIndexToNotify;
+    uint32_t ulValue;
+    eNotifyAction eAction;
+    uint32_t * pulPreviousNotificationValue;
+} xTaskGenericNotifyParams_t;
+
+typedef struct xTaskGenericNotifyWaitParams
+{
+    UBaseType_t uxIndexToWaitOn;
+    uint32_t ulBitsToClearOnEntry;
+    uint32_t ulBitsToClearOnExit;
+    uint32_t * pulNotificationValue;
+    TickType_t xTicksToWait;
+} xTaskGenericNotifyWaitParams_t;
+
+typedef struct xTimerGenericCommandFromTaskParams
+{
+    TimerHandle_t xTimer;
+    BaseType_t xCommandID;
+    TickType_t xOptionalValue;
+    BaseType_t * pxHigherPriorityTaskWoken;
+    TickType_t xTicksToWait;
+} xTimerGenericCommandFromTaskParams_t;
+
+typedef struct xEventGroupWaitBitsParams
+{
+    EventGroupHandle_t xEventGroup;
+    EventBits_t uxBitsToWaitFor;
+    BaseType_t xClearOnExit;
+    BaseType_t xWaitForAllBits;
+    TickType_t xTicksToWait;
+} xEventGroupWaitBitsParams_t;
+
+/* MPU versions of task.h API functions. */
+void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
+                                const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetInfo( TaskHandle_t xTask,
+                       TaskStatus_t * pxTaskStatus,
+                       BaseType_t xGetFreeStackSpace,
+                       eTaskState eState ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask,
+                                     TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
+TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
+                                            BaseType_t xIndex,
+                                            void * pvValue ) FREERTOS_SYSTEM_CALL;
+void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
+                                               BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
+                                      const UBaseType_t uxArraySize,
+                                      configRUN_TIME_COUNTER_TYPE * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
+configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimeCounter( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetRunTimePercent( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
+configRUN_TIME_COUNTER_TYPE MPU_ulTaskGetIdleRunTimePercent( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
+                                   UBaseType_t uxIndexToNotify,
+                                   uint32_t ulValue,
+                                   eNotifyAction eAction,
+                                   uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyEntry( const xTaskGenericNotifyParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
+                                       uint32_t ulBitsToClearOnEntry,
+                                       uint32_t ulBitsToClearOnExit,
+                                       uint32_t * pulNotificationValue,
+                                       TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyWaitEntry( const xTaskGenericNotifyWaitParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
+                                      BaseType_t xClearCountOnExit,
+                                      TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask,
+                                             UBaseType_t uxIndexToClear ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
+                                            UBaseType_t uxIndexToClear,
+                                            uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
+                                     TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
+
+/* Privileged only wrappers for Task APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
+                            const char * const pcName,
+                            const uint16_t usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
+TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
+                                    const char * const pcName,
+                                    const uint32_t ulStackDepth,
+                                    void * const pvParameters,
+                                    UBaseType_t uxPriority,
+                                    StackType_t * const puxStackBuffer,
+                                    StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;
+void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
+void MPU_vTaskPrioritySet( TaskHandle_t xTask,
+                           UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
+TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
+                                             void * pvParameter ) PRIVILEGED_FUNCTION;
+char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
+                                      TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
+                                            TaskHandle_t * pxCreatedTask ) PRIVILEGED_FUNCTION;
+void MPU_vTaskAllocateMPURegions( TaskHandle_t xTaskToModify,
+                                  const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xTaskGetStaticBuffers( TaskHandle_t xTask,
+                                      StackType_t ** ppuxStackBuffer,
+                                      StaticTask_t ** ppxTaskBuffer ) PRIVILEGED_FUNCTION;
+UBaseType_t MPU_uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+UBaseType_t MPU_uxTaskBasePriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+UBaseType_t MPU_uxTaskBasePriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
+TaskHookFunction_t MPU_xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify,
+                                          UBaseType_t uxIndexToNotify,
+                                          uint32_t ulValue,
+                                          eNotifyAction eAction,
+                                          uint32_t * pulPreviousNotificationValue,
+                                          BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+void MPU_vTaskGenericNotifyGiveFromISR( TaskHandle_t xTaskToNotify,
+                                        UBaseType_t uxIndexToNotify,
+                                        BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/* MPU versions of queue.h API functions. */
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue,
+                                  const void * const pvItemToQueue,
+                                  TickType_t xTicksToWait,
+                                  const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue,
+                              void * const pvBuffer,
+                              TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue,
+                           void * const pvBuffer,
+                           TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue,
+                                    TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
+                                         TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
+                              const char * pcName ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                               QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
+                                                const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue,
+                               UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+
+/* Privileged only wrappers for Queue APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+void MPU_vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
+                                           StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
+                                                 const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
+QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
+                                                       const UBaseType_t uxInitialCount,
+                                                       StaticQueue_t * pxStaticQueue ) PRIVILEGED_FUNCTION;
+QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
+                                       const UBaseType_t uxItemSize,
+                                       const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
+                                             const UBaseType_t uxItemSize,
+                                             uint8_t * pucQueueStorage,
+                                             StaticQueue_t * pxStaticQueue,
+                                             const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
+                                    QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
+                                   BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueueGenericGetStaticBuffers( QueueHandle_t xQueue,
+                                              uint8_t ** ppucQueueStorage,
+                                              StaticQueue_t ** ppxStaticQueue ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueueGenericSendFromISR( QueueHandle_t xQueue,
+                                         const void * const pvItemToQueue,
+                                         BaseType_t * const pxHigherPriorityTaskWoken,
+                                         const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueueGiveFromISR( QueueHandle_t xQueue,
+                                  BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t xQueue,
+                                  void * const pvBuffer ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueueReceiveFromISR( QueueHandle_t xQueue,
+                                     void * const pvBuffer,
+                                     BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+UBaseType_t MPU_uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+TaskHandle_t MPU_xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
+QueueSetMemberHandle_t MPU_xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/* MPU versions of timers.h API functions. */
+void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetTimerID( TimerHandle_t xTimer,
+                           void * pvNewID ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerGenericCommandFromTask( TimerHandle_t xTimer,
+                                             const BaseType_t xCommandID,
+                                             const TickType_t xOptionalValue,
+                                             BaseType_t * const pxHigherPriorityTaskWoken,
+                                             const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerGenericCommandFromTaskEntry( const xTimerGenericCommandFromTaskParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
+const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
+                              const BaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+
+/* Privileged only wrappers for Timer APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
+                                const TickType_t xTimerPeriodInTicks,
+                                const UBaseType_t uxAutoReload,
+                                void * const pvTimerID,
+                                TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
+TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
+                                      const TickType_t xTimerPeriodInTicks,
+                                      const UBaseType_t uxAutoReload,
+                                      void * const pvTimerID,
+                                      TimerCallbackFunction_t pxCallbackFunction,
+                                      StaticTimer_t * pxTimerBuffer ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xTimerGetStaticBuffer( TimerHandle_t xTimer,
+                                      StaticTimer_t ** ppxTimerBuffer ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xTimerGenericCommandFromISR( TimerHandle_t xTimer,
+                                            const BaseType_t xCommandID,
+                                            const TickType_t xOptionalValue,
+                                            BaseType_t * const pxHigherPriorityTaskWoken,
+                                            const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/* MPU versions of event_group.h API functions. */
+EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
+                                     const EventBits_t uxBitsToWaitFor,
+                                     const BaseType_t xClearOnExit,
+                                     const BaseType_t xWaitForAllBits,
+                                     TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupWaitBitsEntry( const xEventGroupWaitBitsParams_t * pxParams ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
+                                      const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,
+                                    const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
+                                 const EventBits_t uxBitsToSet,
+                                 const EventBits_t uxBitsToWaitFor,
+                                 TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+#if ( configUSE_TRACE_FACILITY == 1 )
+    UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
+    void MPU_vEventGroupSetNumber( void * xEventGroup,
+                                   UBaseType_t uxEventGroupNumber ) FREERTOS_SYSTEM_CALL;
+#endif /* ( configUSE_TRACE_FACILITY == 1 )*/
+
+/* Privileged only wrappers for Event Group APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+EventGroupHandle_t MPU_xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
+EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) PRIVILEGED_FUNCTION;
+void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xEventGroupGetStaticBuffer( EventGroupHandle_t xEventGroup,
+                                           StaticEventGroup_t ** ppxEventGroupBuffer ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup,
+                                            const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup,
+                                          const EventBits_t uxBitsToSet,
+                                          BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+EventBits_t MPU_xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;
+
+/* MPU versions of message/stream_buffer.h API functions. */
+size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+                              const void * pvTxData,
+                              size_t xDataLengthBytes,
+                              TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+                                 void * pvRxData,
+                                 size_t xBufferLengthBytes,
+                                 TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
+                                             size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+
+/* Privileged only wrappers for Stream Buffer APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+                                                     size_t xTriggerLevelBytes,
+                                                     BaseType_t xIsMessageBuffer,
+                                                     StreamBufferCallbackFunction_t pxSendCompletedCallback,
+                                                     StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+                                                           size_t xTriggerLevelBytes,
+                                                           BaseType_t xIsMessageBuffer,
+                                                           uint8_t * const pucStreamBufferStorageArea,
+                                                           StaticStreamBuffer_t * const pxStaticStreamBuffer,
+                                                           StreamBufferCallbackFunction_t pxSendCompletedCallback,
+                                                           StreamBufferCallbackFunction_t pxReceiveCompletedCallback ) PRIVILEGED_FUNCTION;
+void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xStreamBufferGetStaticBuffers( StreamBufferHandle_t xStreamBuffers,
+                                              uint8_t * ppucStreamBufferStorageArea,
+                                              StaticStreamBuffer_t * ppxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
+size_t MPU_xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+                                     const void * pvTxData,
+                                     size_t xDataLengthBytes,
+                                     BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+size_t MPU_xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+                                        void * pvRxData,
+                                        size_t xBufferLengthBytes,
+                                        BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
+                                                  BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+BaseType_t MPU_xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
+                                                     BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+#endif /* MPU_PROTOTYPES_H */

include/mpu_syscall_numbers.h

@@ -0,0 +1,105 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef MPU_SYSCALL_NUMBERS_H
+#define MPU_SYSCALL_NUMBERS_H
+
+/* Numbers assigned to various system calls. */
+#define SYSTEM_CALL_xTaskGenericNotify                     0
+#define SYSTEM_CALL_xTaskGenericNotifyWait                 1
+#define SYSTEM_CALL_xTimerGenericCommandFromTask           2
+#define SYSTEM_CALL_xEventGroupWaitBits                    3
+#define SYSTEM_CALL_xTaskDelayUntil                        4
+#define SYSTEM_CALL_xTaskAbortDelay                        5
+#define SYSTEM_CALL_vTaskDelay                             6
+#define SYSTEM_CALL_uxTaskPriorityGet                      7
+#define SYSTEM_CALL_eTaskGetState                          8
+#define SYSTEM_CALL_vTaskGetInfo                           9
+#define SYSTEM_CALL_xTaskGetIdleTaskHandle                 10
+#define SYSTEM_CALL_vTaskSuspend                           11
+#define SYSTEM_CALL_vTaskResume                            12
+#define SYSTEM_CALL_xTaskGetTickCount                      13
+#define SYSTEM_CALL_uxTaskGetNumberOfTasks                 14
+#define SYSTEM_CALL_ulTaskGetRunTimeCounter                15
+#define SYSTEM_CALL_ulTaskGetRunTimePercent                16
+#define SYSTEM_CALL_ulTaskGetIdleRunTimePercent            17
+#define SYSTEM_CALL_ulTaskGetIdleRunTimeCounter            18
+#define SYSTEM_CALL_vTaskSetApplicationTaskTag             19
+#define SYSTEM_CALL_xTaskGetApplicationTaskTag             20
+#define SYSTEM_CALL_vTaskSetThreadLocalStoragePointer      21
+#define SYSTEM_CALL_pvTaskGetThreadLocalStoragePointer     22
+#define SYSTEM_CALL_uxTaskGetSystemState                   23
+#define SYSTEM_CALL_uxTaskGetStackHighWaterMark            24
+#define SYSTEM_CALL_uxTaskGetStackHighWaterMark2           25
+#define SYSTEM_CALL_xTaskGetCurrentTaskHandle              26
+#define SYSTEM_CALL_xTaskGetSchedulerState                 27
+#define SYSTEM_CALL_vTaskSetTimeOutState                   28
+#define SYSTEM_CALL_xTaskCheckForTimeOut                   29
+#define SYSTEM_CALL_ulTaskGenericNotifyTake                30
+#define SYSTEM_CALL_xTaskGenericNotifyStateClear           31
+#define SYSTEM_CALL_ulTaskGenericNotifyValueClear          32
+#define SYSTEM_CALL_xQueueGenericSend                      33
+#define SYSTEM_CALL_uxQueueMessagesWaiting                 34
+#define SYSTEM_CALL_uxQueueSpacesAvailable                 35
+#define SYSTEM_CALL_xQueueReceive                          36
+#define SYSTEM_CALL_xQueuePeek                             37
+#define SYSTEM_CALL_xQueueSemaphoreTake                    38
+#define SYSTEM_CALL_xQueueGetMutexHolder                   39
+#define SYSTEM_CALL_xQueueTakeMutexRecursive               40
+#define SYSTEM_CALL_xQueueGiveMutexRecursive               41
+#define SYSTEM_CALL_xQueueSelectFromSet                    42
+#define SYSTEM_CALL_xQueueAddToSet                         43
+#define SYSTEM_CALL_vQueueAddToRegistry                    44
+#define SYSTEM_CALL_vQueueUnregisterQueue                  45
+#define SYSTEM_CALL_pcQueueGetName                         46
+#define SYSTEM_CALL_pvTimerGetTimerID                      47
+#define SYSTEM_CALL_vTimerSetTimerID                       48
+#define SYSTEM_CALL_xTimerIsTimerActive                    49
+#define SYSTEM_CALL_xTimerGetTimerDaemonTaskHandle         50
+#define SYSTEM_CALL_pcTimerGetName                         51
+#define SYSTEM_CALL_vTimerSetReloadMode                    52
+#define SYSTEM_CALL_xTimerGetReloadMode                    53
+#define SYSTEM_CALL_uxTimerGetReloadMode                   54
+#define SYSTEM_CALL_xTimerGetPeriod                        55
+#define SYSTEM_CALL_xTimerGetExpiryTime                    56
+#define SYSTEM_CALL_xEventGroupClearBits                   57
+#define SYSTEM_CALL_xEventGroupSetBits                     58
+#define SYSTEM_CALL_xEventGroupSync                        59
+#define SYSTEM_CALL_uxEventGroupGetNumber                  60
+#define SYSTEM_CALL_vEventGroupSetNumber                   61
+#define SYSTEM_CALL_xStreamBufferSend                      62
+#define SYSTEM_CALL_xStreamBufferReceive                   63
+#define SYSTEM_CALL_xStreamBufferIsFull                    64
+#define SYSTEM_CALL_xStreamBufferIsEmpty                   65
+#define SYSTEM_CALL_xStreamBufferSpacesAvailable           66
+#define SYSTEM_CALL_xStreamBufferBytesAvailable            67
+#define SYSTEM_CALL_xStreamBufferSetTriggerLevel           68
+#define SYSTEM_CALL_xStreamBufferNextMessageLengthBytes    69
+#define NUM_SYSTEM_CALLS                                   70  /* Total number of system calls. */
+
+#endif /* MPU_SYSCALL_NUMBERS_H */

include/mpu_wrappers.h

@@ -1,189 +1,286 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef MPU_WRAPPERS_H
-#define MPU_WRAPPERS_H
-
-/* This file redefines API functions to be called through a wrapper macro, but
-only for ports that are using the MPU. */
-#ifdef portUSING_MPU_WRAPPERS
-
-	/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
-	included from queue.c or task.c to prevent it from having an effect within
-	those files. */
-	#ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-		/*
-		 * Map standard (non MPU) API functions to equivalents that start
-		 * "MPU_".  This will cause the application code to call the MPU_
-		 * version, which wraps the non-MPU version with privilege promoting
-		 * then demoting code, so the kernel code always runs will full
-		 * privileges.
-		 */
-
-		/* Map standard tasks.h API functions to the MPU equivalents. */
-		#define xTaskCreate								MPU_xTaskCreate
-		#define xTaskCreateStatic						MPU_xTaskCreateStatic
-		#define xTaskCreateRestricted					MPU_xTaskCreateRestricted
-		#define vTaskAllocateMPURegions					MPU_vTaskAllocateMPURegions
-		#define vTaskDelete								MPU_vTaskDelete
-		#define vTaskDelay								MPU_vTaskDelay
-		#define vTaskDelayUntil							MPU_vTaskDelayUntil
-		#define xTaskAbortDelay							MPU_xTaskAbortDelay
-		#define uxTaskPriorityGet						MPU_uxTaskPriorityGet
-		#define eTaskGetState							MPU_eTaskGetState
-		#define vTaskGetInfo							MPU_vTaskGetInfo
-		#define vTaskPrioritySet						MPU_vTaskPrioritySet
-		#define vTaskSuspend							MPU_vTaskSuspend
-		#define vTaskResume								MPU_vTaskResume
-		#define vTaskSuspendAll							MPU_vTaskSuspendAll
-		#define xTaskResumeAll							MPU_xTaskResumeAll
-		#define xTaskGetTickCount						MPU_xTaskGetTickCount
-		#define uxTaskGetNumberOfTasks					MPU_uxTaskGetNumberOfTasks
-		#define pcTaskGetName							MPU_pcTaskGetName
-		#define xTaskGetHandle							MPU_xTaskGetHandle
-		#define uxTaskGetStackHighWaterMark				MPU_uxTaskGetStackHighWaterMark
-		#define uxTaskGetStackHighWaterMark2			MPU_uxTaskGetStackHighWaterMark2
-		#define vTaskSetApplicationTaskTag				MPU_vTaskSetApplicationTaskTag
-		#define xTaskGetApplicationTaskTag				MPU_xTaskGetApplicationTaskTag
-		#define vTaskSetThreadLocalStoragePointer		MPU_vTaskSetThreadLocalStoragePointer
-		#define pvTaskGetThreadLocalStoragePointer		MPU_pvTaskGetThreadLocalStoragePointer
-		#define xTaskCallApplicationTaskHook			MPU_xTaskCallApplicationTaskHook
-		#define xTaskGetIdleTaskHandle					MPU_xTaskGetIdleTaskHandle
-		#define uxTaskGetSystemState					MPU_uxTaskGetSystemState
-		#define vTaskList								MPU_vTaskList
-		#define vTaskGetRunTimeStats					MPU_vTaskGetRunTimeStats
-		#define ulTaskGetIdleRunTimeCounter				MPU_ulTaskGetIdleRunTimeCounter
-		#define xTaskGenericNotify						MPU_xTaskGenericNotify
-		#define xTaskNotifyWait							MPU_xTaskNotifyWait
-		#define ulTaskNotifyTake						MPU_ulTaskNotifyTake
-		#define xTaskNotifyStateClear					MPU_xTaskNotifyStateClear
-		#define ulTaskNotifyValueClear					MPU_ulTaskNotifyValueClear
-		#define xTaskCatchUpTicks						MPU_xTaskCatchUpTicks
-
-		#define xTaskGetCurrentTaskHandle				MPU_xTaskGetCurrentTaskHandle
-		#define vTaskSetTimeOutState					MPU_vTaskSetTimeOutState
-		#define xTaskCheckForTimeOut					MPU_xTaskCheckForTimeOut
-		#define xTaskGetSchedulerState					MPU_xTaskGetSchedulerState
-
-		/* Map standard queue.h API functions to the MPU equivalents. */
-		#define xQueueGenericSend						MPU_xQueueGenericSend
-		#define xQueueReceive							MPU_xQueueReceive
-		#define xQueuePeek								MPU_xQueuePeek
-		#define xQueueSemaphoreTake						MPU_xQueueSemaphoreTake
-		#define uxQueueMessagesWaiting					MPU_uxQueueMessagesWaiting
-		#define uxQueueSpacesAvailable					MPU_uxQueueSpacesAvailable
-		#define vQueueDelete							MPU_vQueueDelete
-		#define xQueueCreateMutex						MPU_xQueueCreateMutex
-		#define xQueueCreateMutexStatic					MPU_xQueueCreateMutexStatic
-		#define xQueueCreateCountingSemaphore			MPU_xQueueCreateCountingSemaphore
-		#define xQueueCreateCountingSemaphoreStatic		MPU_xQueueCreateCountingSemaphoreStatic
-		#define xQueueGetMutexHolder					MPU_xQueueGetMutexHolder
-		#define xQueueTakeMutexRecursive				MPU_xQueueTakeMutexRecursive
-		#define xQueueGiveMutexRecursive				MPU_xQueueGiveMutexRecursive
-		#define xQueueGenericCreate						MPU_xQueueGenericCreate
-		#define xQueueGenericCreateStatic				MPU_xQueueGenericCreateStatic
-		#define xQueueCreateSet							MPU_xQueueCreateSet
-		#define xQueueAddToSet							MPU_xQueueAddToSet
-		#define xQueueRemoveFromSet						MPU_xQueueRemoveFromSet
-		#define xQueueSelectFromSet						MPU_xQueueSelectFromSet
-		#define xQueueGenericReset						MPU_xQueueGenericReset
-
-		#if( configQUEUE_REGISTRY_SIZE > 0 )
-			#define vQueueAddToRegistry						MPU_vQueueAddToRegistry
-			#define vQueueUnregisterQueue					MPU_vQueueUnregisterQueue
-			#define pcQueueGetName							MPU_pcQueueGetName
-		#endif
-
-		/* Map standard timer.h API functions to the MPU equivalents. */
-		#define xTimerCreate							MPU_xTimerCreate
-		#define xTimerCreateStatic						MPU_xTimerCreateStatic
-		#define pvTimerGetTimerID						MPU_pvTimerGetTimerID
-		#define vTimerSetTimerID						MPU_vTimerSetTimerID
-		#define xTimerIsTimerActive						MPU_xTimerIsTimerActive
-		#define xTimerGetTimerDaemonTaskHandle			MPU_xTimerGetTimerDaemonTaskHandle
-		#define xTimerPendFunctionCall					MPU_xTimerPendFunctionCall
-		#define pcTimerGetName							MPU_pcTimerGetName
-		#define vTimerSetReloadMode						MPU_vTimerSetReloadMode
-		#define uxTimerGetReloadMode					MPU_uxTimerGetReloadMode
-		#define xTimerGetPeriod							MPU_xTimerGetPeriod
-		#define xTimerGetExpiryTime						MPU_xTimerGetExpiryTime
-		#define xTimerGenericCommand					MPU_xTimerGenericCommand
-
-		/* Map standard event_group.h API functions to the MPU equivalents. */
-		#define xEventGroupCreate						MPU_xEventGroupCreate
-		#define xEventGroupCreateStatic					MPU_xEventGroupCreateStatic
-		#define xEventGroupWaitBits						MPU_xEventGroupWaitBits
-		#define xEventGroupClearBits					MPU_xEventGroupClearBits
-		#define xEventGroupSetBits						MPU_xEventGroupSetBits
-		#define xEventGroupSync							MPU_xEventGroupSync
-		#define vEventGroupDelete						MPU_vEventGroupDelete
-
-		/* Map standard message/stream_buffer.h API functions to the MPU
-		equivalents. */
-		#define xStreamBufferSend						MPU_xStreamBufferSend
-		#define xStreamBufferReceive					MPU_xStreamBufferReceive
-		#define xStreamBufferNextMessageLengthBytes		MPU_xStreamBufferNextMessageLengthBytes
-		#define vStreamBufferDelete						MPU_vStreamBufferDelete
-		#define xStreamBufferIsFull						MPU_xStreamBufferIsFull
-		#define xStreamBufferIsEmpty					MPU_xStreamBufferIsEmpty
-		#define xStreamBufferReset						MPU_xStreamBufferReset
-		#define xStreamBufferSpacesAvailable			MPU_xStreamBufferSpacesAvailable
-		#define xStreamBufferBytesAvailable				MPU_xStreamBufferBytesAvailable
-		#define xStreamBufferSetTriggerLevel			MPU_xStreamBufferSetTriggerLevel
-		#define xStreamBufferGenericCreate				MPU_xStreamBufferGenericCreate
-		#define xStreamBufferGenericCreateStatic		MPU_xStreamBufferGenericCreateStatic
-
-
-		/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
-		macro so applications can place data in privileged access sections
-		(useful when using statically allocated objects). */
-		#define PRIVILEGED_FUNCTION
-		#define PRIVILEGED_DATA __attribute__((section("privileged_data")))
-		#define FREERTOS_SYSTEM_CALL
-
-	#else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
-
-		/* Ensure API functions go in the privileged execution section. */
-		#define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions")))
-		#define PRIVILEGED_DATA __attribute__((section("privileged_data")))
-		#define FREERTOS_SYSTEM_CALL __attribute__((section( "freertos_system_calls")))
-
-	#endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
-
-#else /* portUSING_MPU_WRAPPERS */
-
-	#define PRIVILEGED_FUNCTION
-	#define PRIVILEGED_DATA
-	#define FREERTOS_SYSTEM_CALL
-	#define portUSING_MPU_WRAPPERS 0
-
-#endif /* portUSING_MPU_WRAPPERS */
-
-
-#endif /* MPU_WRAPPERS_H */
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef MPU_WRAPPERS_H
+#define MPU_WRAPPERS_H
+
+/* This file redefines API functions to be called through a wrapper macro, but
+ * only for ports that are using the MPU. */
+#if ( portUSING_MPU_WRAPPERS == 1 )
+
+/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
+ * included from queue.c or task.c to prevent it from having an effect within
+ * those files. */
+    #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/*
+ * Map standard (non MPU) API functions to equivalents that start
+ * "MPU_".  This will cause the application code to call the MPU_
+ * version, which wraps the non-MPU version with privilege promoting
+ * then demoting code, so the kernel code always runs will full
+ * privileges.
+ */
+
+/* Map standard task.h API functions to the MPU equivalents. */
+        #define vTaskDelay                            MPU_vTaskDelay
+        #define xTaskDelayUntil                       MPU_xTaskDelayUntil
+        #define xTaskAbortDelay                       MPU_xTaskAbortDelay
+        #define uxTaskPriorityGet                     MPU_uxTaskPriorityGet
+        #define eTaskGetState                         MPU_eTaskGetState
+        #define vTaskGetInfo                          MPU_vTaskGetInfo
+        #define vTaskSuspend                          MPU_vTaskSuspend
+        #define vTaskResume                           MPU_vTaskResume
+        #define xTaskGetTickCount                     MPU_xTaskGetTickCount
+        #define uxTaskGetNumberOfTasks                MPU_uxTaskGetNumberOfTasks
+        #define uxTaskGetStackHighWaterMark           MPU_uxTaskGetStackHighWaterMark
+        #define uxTaskGetStackHighWaterMark2          MPU_uxTaskGetStackHighWaterMark2
+        #define vTaskSetApplicationTaskTag            MPU_vTaskSetApplicationTaskTag
+        #define xTaskGetApplicationTaskTag            MPU_xTaskGetApplicationTaskTag
+        #define vTaskSetThreadLocalStoragePointer     MPU_vTaskSetThreadLocalStoragePointer
+        #define pvTaskGetThreadLocalStoragePointer    MPU_pvTaskGetThreadLocalStoragePointer
+        #define xTaskGetIdleTaskHandle                MPU_xTaskGetIdleTaskHandle
+        #define uxTaskGetSystemState                  MPU_uxTaskGetSystemState
+        #define ulTaskGetIdleRunTimeCounter           MPU_ulTaskGetIdleRunTimeCounter
+        #define ulTaskGetIdleRunTimePercent           MPU_ulTaskGetIdleRunTimePercent
+        #define xTaskGenericNotify                    MPU_xTaskGenericNotify
+        #define xTaskGenericNotifyWait                MPU_xTaskGenericNotifyWait
+        #define ulTaskGenericNotifyTake               MPU_ulTaskGenericNotifyTake
+        #define xTaskGenericNotifyStateClear          MPU_xTaskGenericNotifyStateClear
+        #define ulTaskGenericNotifyValueClear         MPU_ulTaskGenericNotifyValueClear
+        #define vTaskSetTimeOutState                  MPU_vTaskSetTimeOutState
+        #define xTaskCheckForTimeOut                  MPU_xTaskCheckForTimeOut
+        #define xTaskGetCurrentTaskHandle             MPU_xTaskGetCurrentTaskHandle
+        #define xTaskGetSchedulerState                MPU_xTaskGetSchedulerState
+
+        #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
+            #define ulTaskGetRunTimeCounter           MPU_ulTaskGetRunTimeCounter
+            #define ulTaskGetRunTimePercent           MPU_ulTaskGetRunTimePercent
+        #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+/* Privileged only wrappers for Task APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+        #define xTaskCreate                              MPU_xTaskCreate
+        #define xTaskCreateStatic                        MPU_xTaskCreateStatic
+        #define vTaskDelete                              MPU_vTaskDelete
+        #define vTaskPrioritySet                         MPU_vTaskPrioritySet
+        #define xTaskGetHandle                           MPU_xTaskGetHandle
+        #define xTaskCallApplicationTaskHook             MPU_xTaskCallApplicationTaskHook
+
+        #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
+            #define pcTaskGetName                        MPU_pcTaskGetName
+            #define xTaskCreateRestricted                MPU_xTaskCreateRestricted
+            #define xTaskCreateRestrictedStatic          MPU_xTaskCreateRestrictedStatic
+            #define vTaskAllocateMPURegions              MPU_vTaskAllocateMPURegions
+            #define xTaskGetStaticBuffers                MPU_xTaskGetStaticBuffers
+            #define uxTaskPriorityGetFromISR             MPU_uxTaskPriorityGetFromISR
+            #define uxTaskBasePriorityGet                MPU_uxTaskBasePriorityGet
+            #define uxTaskBasePriorityGetFromISR         MPU_uxTaskBasePriorityGetFromISR
+            #define xTaskResumeFromISR                   MPU_xTaskResumeFromISR
+            #define xTaskGetApplicationTaskTagFromISR    MPU_xTaskGetApplicationTaskTagFromISR
+            #define xTaskGenericNotifyFromISR            MPU_xTaskGenericNotifyFromISR
+            #define vTaskGenericNotifyGiveFromISR        MPU_vTaskGenericNotifyGiveFromISR
+        #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+/* Map standard queue.h API functions to the MPU equivalents. */
+        #define xQueueGenericSend            MPU_xQueueGenericSend
+        #define xQueueReceive                MPU_xQueueReceive
+        #define xQueuePeek                   MPU_xQueuePeek
+        #define xQueueSemaphoreTake          MPU_xQueueSemaphoreTake
+        #define uxQueueMessagesWaiting       MPU_uxQueueMessagesWaiting
+        #define uxQueueSpacesAvailable       MPU_uxQueueSpacesAvailable
+        #define xQueueGetMutexHolder         MPU_xQueueGetMutexHolder
+        #define xQueueTakeMutexRecursive     MPU_xQueueTakeMutexRecursive
+        #define xQueueGiveMutexRecursive     MPU_xQueueGiveMutexRecursive
+        #define xQueueAddToSet               MPU_xQueueAddToSet
+        #define xQueueSelectFromSet          MPU_xQueueSelectFromSet
+
+        #if ( configQUEUE_REGISTRY_SIZE > 0 )
+            #define vQueueAddToRegistry      MPU_vQueueAddToRegistry
+            #define vQueueUnregisterQueue    MPU_vQueueUnregisterQueue
+            #define pcQueueGetName           MPU_pcQueueGetName
+        #endif /* #if ( configQUEUE_REGISTRY_SIZE > 0 ) */
+
+/* Privileged only wrappers for Queue APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+        #define vQueueDelete                           MPU_vQueueDelete
+        #define xQueueCreateMutex                      MPU_xQueueCreateMutex
+        #define xQueueCreateMutexStatic                MPU_xQueueCreateMutexStatic
+        #define xQueueCreateCountingSemaphore          MPU_xQueueCreateCountingSemaphore
+        #define xQueueCreateCountingSemaphoreStatic    MPU_xQueueCreateCountingSemaphoreStatic
+        #define xQueueGenericCreate                    MPU_xQueueGenericCreate
+        #define xQueueGenericCreateStatic              MPU_xQueueGenericCreateStatic
+        #define xQueueGenericReset                     MPU_xQueueGenericReset
+        #define xQueueCreateSet                        MPU_xQueueCreateSet
+        #define xQueueRemoveFromSet                    MPU_xQueueRemoveFromSet
+
+        #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
+            #define xQueueGenericGetStaticBuffers      MPU_xQueueGenericGetStaticBuffers
+            #define xQueueGenericSendFromISR           MPU_xQueueGenericSendFromISR
+            #define xQueueGiveFromISR                  MPU_xQueueGiveFromISR
+            #define xQueuePeekFromISR                  MPU_xQueuePeekFromISR
+            #define xQueueReceiveFromISR               MPU_xQueueReceiveFromISR
+            #define xQueueIsQueueEmptyFromISR          MPU_xQueueIsQueueEmptyFromISR
+            #define xQueueIsQueueFullFromISR           MPU_xQueueIsQueueFullFromISR
+            #define uxQueueMessagesWaitingFromISR      MPU_uxQueueMessagesWaitingFromISR
+            #define xQueueGetMutexHolderFromISR        MPU_xQueueGetMutexHolderFromISR
+            #define xQueueSelectFromSetFromISR         MPU_xQueueSelectFromSetFromISR
+        #endif /* if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+/* Map standard timer.h API functions to the MPU equivalents. */
+        #define pvTimerGetTimerID                 MPU_pvTimerGetTimerID
+        #define vTimerSetTimerID                  MPU_vTimerSetTimerID
+        #define xTimerIsTimerActive               MPU_xTimerIsTimerActive
+        #define xTimerGetTimerDaemonTaskHandle    MPU_xTimerGetTimerDaemonTaskHandle
+        #define xTimerGenericCommandFromTask      MPU_xTimerGenericCommandFromTask
+        #define pcTimerGetName                    MPU_pcTimerGetName
+        #define vTimerSetReloadMode               MPU_vTimerSetReloadMode
+        #define uxTimerGetReloadMode              MPU_uxTimerGetReloadMode
+        #define xTimerGetPeriod                   MPU_xTimerGetPeriod
+        #define xTimerGetExpiryTime               MPU_xTimerGetExpiryTime
+
+/* Privileged only wrappers for Timer APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+        #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
+            #define xTimerGetReloadMode            MPU_xTimerGetReloadMode
+            #define xTimerCreate                   MPU_xTimerCreate
+            #define xTimerCreateStatic             MPU_xTimerCreateStatic
+            #define xTimerGetStaticBuffer          MPU_xTimerGetStaticBuffer
+            #define xTimerGenericCommandFromISR    MPU_xTimerGenericCommandFromISR
+        #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+/* Map standard event_group.h API functions to the MPU equivalents. */
+        #define xEventGroupWaitBits          MPU_xEventGroupWaitBits
+        #define xEventGroupClearBits         MPU_xEventGroupClearBits
+        #define xEventGroupSetBits           MPU_xEventGroupSetBits
+        #define xEventGroupSync              MPU_xEventGroupSync
+
+        #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+            #define uxEventGroupGetNumber    MPU_uxEventGroupGetNumber
+            #define vEventGroupSetNumber     MPU_vEventGroupSetNumber
+        #endif /* #if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
+
+/* Privileged only wrappers for Event Group APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+        #define xEventGroupCreate                  MPU_xEventGroupCreate
+        #define xEventGroupCreateStatic            MPU_xEventGroupCreateStatic
+        #define vEventGroupDelete                  MPU_vEventGroupDelete
+
+        #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
+            #define xEventGroupGetStaticBuffer     MPU_xEventGroupGetStaticBuffer
+            #define xEventGroupClearBitsFromISR    MPU_xEventGroupClearBitsFromISR
+            #define xEventGroupSetBitsFromISR      MPU_xEventGroupSetBitsFromISR
+            #define xEventGroupGetBitsFromISR      MPU_xEventGroupGetBitsFromISR
+        #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+/* Map standard message/stream_buffer.h API functions to the MPU
+ * equivalents. */
+        #define xStreamBufferSend                      MPU_xStreamBufferSend
+        #define xStreamBufferReceive                   MPU_xStreamBufferReceive
+        #define xStreamBufferIsFull                    MPU_xStreamBufferIsFull
+        #define xStreamBufferIsEmpty                   MPU_xStreamBufferIsEmpty
+        #define xStreamBufferSpacesAvailable           MPU_xStreamBufferSpacesAvailable
+        #define xStreamBufferBytesAvailable            MPU_xStreamBufferBytesAvailable
+        #define xStreamBufferSetTriggerLevel           MPU_xStreamBufferSetTriggerLevel
+        #define xStreamBufferNextMessageLengthBytes    MPU_xStreamBufferNextMessageLengthBytes
+
+/* Privileged only wrappers for Stream Buffer APIs. These are needed so that
+ * the application can use opaque handles maintained in mpu_wrappers.c
+ * with all the APIs. */
+
+        #define xStreamBufferGenericCreate                  MPU_xStreamBufferGenericCreate
+        #define xStreamBufferGenericCreateStatic            MPU_xStreamBufferGenericCreateStatic
+        #define vStreamBufferDelete                         MPU_vStreamBufferDelete
+        #define xStreamBufferReset                          MPU_xStreamBufferReset
+
+        #if ( configUSE_MPU_WRAPPERS_V1 == 0 )
+            #define xStreamBufferGetStaticBuffers           MPU_xStreamBufferGetStaticBuffers
+            #define xStreamBufferSendFromISR                MPU_xStreamBufferSendFromISR
+            #define xStreamBufferReceiveFromISR             MPU_xStreamBufferReceiveFromISR
+            #define xStreamBufferSendCompletedFromISR       MPU_xStreamBufferSendCompletedFromISR
+            #define xStreamBufferReceiveCompletedFromISR    MPU_xStreamBufferReceiveCompletedFromISR
+        #endif /* #if ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
+ * macro so applications can place data in privileged access sections
+ * (useful when using statically allocated objects). */
+        #define PRIVILEGED_FUNCTION
+        #define PRIVILEGED_DATA    __attribute__( ( section( "privileged_data" ) ) )
+        #define FREERTOS_SYSTEM_CALL
+
+
+        #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) )
+
+            #define vGrantAccessToTask( xTask, xTaskToGrantAccess )                        vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToGrantAccess ) )
+            #define vRevokeAccessToTask( xTask, xTaskToRevokeAccess )                      vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xTaskToRevokeAccess ) )
+
+            #define vGrantAccessToSemaphore( xTask, xSemaphoreToGrantAccess )              vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xSemaphoreToGrantAccess ) )
+            #define vRevokeAccessToSemaphore( xTask, xSemaphoreToRevokeAccess )            vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xSemaphoreToRevokeAccess ) )
+
+            #define vGrantAccessToQueue( xTask, xQueueToGrantAccess )                      vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueToGrantAccess ) )
+            #define vRevokeAccessToQueue( xTask, xQueueToRevokeAccess )                    vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueToRevokeAccess ) )
+
+            #define vGrantAccessToQueueSet( xTask, xQueueSetToGrantAccess )                vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueSetToGrantAccess ) )
+            #define vRevokeAccessToQueueSet( xTask, xQueueSetToRevokeAccess )              vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xQueueSetToRevokeAccess ) )
+
+            #define vGrantAccessToEventGroup( xTask, xEventGroupToGrantAccess )            vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xEventGroupToGrantAccess ) )
+            #define vRevokeAccessToEventGroup( xTask, xEventGroupToRevokeAccess )          vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xEventGroupToRevokeAccess ) )
+
+            #define vGrantAccessToStreamBuffer( xTask, xStreamBufferToGrantAccess )        vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xStreamBufferToGrantAccess ) )
+            #define vRevokeAccessToStreamBuffer( xTask, xStreamBufferToRevokeAccess )      vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xStreamBufferToRevokeAccess ) )
+
+            #define vGrantAccessToMessageBuffer( xTask, xMessageBufferToGrantAccess )      vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xMessageBufferToGrantAccess ) )
+            #define vRevokeAccessToMessageBuffer( xTask, xMessageBufferToRevokeAccess )    vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xMessageBufferToRevokeAccess ) )
+
+            #define vGrantAccessToTimer( xTask, xTimerToGrantAccess )                      vGrantAccessToKernelObject( ( xTask ), ( int32_t ) ( xTimerToGrantAccess ) )
+            #define vRevokeAccessToTimer( xTask, xTimerToRevokeAccess )                    vRevokeAccessToKernelObject( ( xTask ), ( int32_t ) ( xTimerToRevokeAccess ) )
+
+        #endif /* #if ( ( configUSE_MPU_WRAPPERS_V1 == 0 ) && ( configENABLE_ACCESS_CONTROL_LIST == 1 ) ) */
+
+    #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
+
+/* Ensure API functions go in the privileged execution section. */
+        #define PRIVILEGED_FUNCTION     __attribute__( ( section( "privileged_functions" ) ) )
+        #define PRIVILEGED_DATA         __attribute__( ( section( "privileged_data" ) ) )
+        #define FREERTOS_SYSTEM_CALL    __attribute__( ( section( "freertos_system_calls" ) ) )
+
+    #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
+
+#else /* portUSING_MPU_WRAPPERS */
+
+    #define PRIVILEGED_FUNCTION
+    #define PRIVILEGED_DATA
+    #define FREERTOS_SYSTEM_CALL
+
+#endif /* portUSING_MPU_WRAPPERS */
+
+
+#endif /* MPU_WRAPPERS_H */

include/newlib-freertos.h

@@ -0,0 +1,62 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef INC_NEWLIB_FREERTOS_H
+#define INC_NEWLIB_FREERTOS_H
+
+/* Note Newlib support has been included by popular demand, but is not
+ * used by the FreeRTOS maintainers themselves.  FreeRTOS is not
+ * responsible for resulting newlib operation.  User must be familiar with
+ * newlib and must provide system-wide implementations of the necessary
+ * stubs. Be warned that (at the time of writing) the current newlib design
+ * implements a system-wide malloc() that must be provided with locks.
+ *
+ * See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
+ * for additional information. */
+
+#include <reent.h>
+
+#define configUSE_C_RUNTIME_TLS_SUPPORT    1
+
+#ifndef configTLS_BLOCK_TYPE
+    #define configTLS_BLOCK_TYPE           struct _reent
+#endif
+
+#ifndef configINIT_TLS_BLOCK
+    #define configINIT_TLS_BLOCK( xTLSBlock, pxTopOfStack )    _REENT_INIT_PTR( &( xTLSBlock ) )
+#endif
+
+#ifndef configSET_TLS_BLOCK
+    #define configSET_TLS_BLOCK( xTLSBlock )    ( _impure_ptr = &( xTLSBlock ) )
+#endif
+
+#ifndef configDEINIT_TLS_BLOCK
+    #define configDEINIT_TLS_BLOCK( xTLSBlock )    _reclaim_reent( &( xTLSBlock ) )
+#endif
+
+#endif /* INC_NEWLIB_FREERTOS_H */

include/picolibc-freertos.h

@@ -0,0 +1,91 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef INC_PICOLIBC_FREERTOS_H
+#define INC_PICOLIBC_FREERTOS_H
+
+/* Use picolibc TLS support to allocate space for __thread variables,
+ * initialize them at thread creation and set the TLS context at
+ * thread switch time.
+ *
+ * See the picolibc TLS docs:
+ * https://github.com/picolibc/picolibc/blob/main/doc/tls.md
+ * for additional information. */
+
+#include <picotls.h>
+
+#define configUSE_C_RUNTIME_TLS_SUPPORT    1
+
+#define configTLS_BLOCK_TYPE               void *
+
+#define picolibcTLS_SIZE                   ( ( portPOINTER_SIZE_TYPE ) _tls_size() )
+#define picolibcSTACK_ALIGNMENT_MASK       ( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK )
+
+#if __PICOLIBC_MAJOR__ > 1 || __PICOLIBC_MINOR__ >= 8
+
+/* Picolibc 1.8 and newer have explicit alignment values provided
+ * by the _tls_align() inline */
+    #define picolibcTLS_ALIGNMENT_MASK    ( ( portPOINTER_SIZE_TYPE ) ( _tls_align() - 1 ) )
+#else
+
+/* For older Picolibc versions, use the general port alignment value */
+    #define picolibcTLS_ALIGNMENT_MASK    ( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK )
+#endif
+
+/* Allocate thread local storage block off the end of the
+ * stack. The picolibcTLS_SIZE macro returns the size (in
+ * bytes) of the total TLS area used by the application.
+ * Calculate the top of stack address. */
+#if ( portSTACK_GROWTH < 0 )
+
+    #define configINIT_TLS_BLOCK( xTLSBlock, pxTopOfStack )                                  \
+    do {                                                                                     \
+        xTLSBlock = ( void * ) ( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) -              \
+                                   picolibcTLS_SIZE ) &                                      \
+                                 ~picolibcTLS_ALIGNMENT_MASK );                              \
+        pxTopOfStack = ( StackType_t * ) ( ( ( ( portPOINTER_SIZE_TYPE ) xTLSBlock ) - 1 ) & \
+                                           ~picolibcSTACK_ALIGNMENT_MASK );                  \
+        _init_tls( xTLSBlock );                                                              \
+    } while( 0 )
+#else /* portSTACK_GROWTH */
+    #define configINIT_TLS_BLOCK( xTLSBlock, pxTopOfStack )                                          \
+    do {                                                                                             \
+        xTLSBlock = ( void * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack +                          \
+                                   picolibcTLS_ALIGNMENT_MASK ) & ~picolibcTLS_ALIGNMENT_MASK );     \
+        pxTopOfStack = ( StackType_t * ) ( ( ( ( ( portPOINTER_SIZE_TYPE ) xTLSBlock ) +             \
+                                               picolibcTLS_SIZE ) + picolibcSTACK_ALIGNMENT_MASK ) & \
+                                           ~picolibcSTACK_ALIGNMENT_MASK );                          \
+        _init_tls( xTLSBlock );                                                                      \
+    } while( 0 )
+#endif /* portSTACK_GROWTH */
+
+#define configSET_TLS_BLOCK( xTLSBlock )    _set_tls( xTLSBlock )
+
+#define configDEINIT_TLS_BLOCK( xTLSBlock )
+
+#endif /* INC_PICOLIBC_FREERTOS_H */

include/portable.h

@@ -1,199 +1,271 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/*-----------------------------------------------------------
- * Portable layer API.  Each function must be defined for each port.
- *----------------------------------------------------------*/
-
-#ifndef PORTABLE_H
-#define PORTABLE_H
-
-/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
-pre-processor definition was used to ensure the pre-processor found the correct
-portmacro.h file for the port being used.  That scheme was deprecated in favour
-of setting the compiler's include path such that it found the correct
-portmacro.h file - removing the need for the constant and allowing the
-portmacro.h file to be located anywhere in relation to the port being used.
-Purely for reasons of backward compatibility the old method is still valid, but
-to make it clear that new projects should not use it, support for the port
-specific constants has been moved into the deprecated_definitions.h header
-file. */
-#include "deprecated_definitions.h"
-
-/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
-did not result in a portmacro.h header file being included - and it should be
-included here.  In this case the path to the correct portmacro.h header file
-must be set in the compiler's include path. */
-#ifndef portENTER_CRITICAL
-	#include "portmacro.h"
-#endif
-
-#if portBYTE_ALIGNMENT == 32
-	#define portBYTE_ALIGNMENT_MASK ( 0x001f )
-#endif
-
-#if portBYTE_ALIGNMENT == 16
-	#define portBYTE_ALIGNMENT_MASK ( 0x000f )
-#endif
-
-#if portBYTE_ALIGNMENT == 8
-	#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
-#endif
-
-#if portBYTE_ALIGNMENT == 4
-	#define portBYTE_ALIGNMENT_MASK	( 0x0003 )
-#endif
-
-#if portBYTE_ALIGNMENT == 2
-	#define portBYTE_ALIGNMENT_MASK	( 0x0001 )
-#endif
-
-#if portBYTE_ALIGNMENT == 1
-	#define portBYTE_ALIGNMENT_MASK	( 0x0000 )
-#endif
-
-#ifndef portBYTE_ALIGNMENT_MASK
-	#error "Invalid portBYTE_ALIGNMENT definition"
-#endif
-
-#ifndef portNUM_CONFIGURABLE_REGIONS
-	#define portNUM_CONFIGURABLE_REGIONS 1
-#endif
-
-#ifndef portHAS_STACK_OVERFLOW_CHECKING
-	#define portHAS_STACK_OVERFLOW_CHECKING 0
-#endif
-
-#ifndef portARCH_NAME
-	#define portARCH_NAME NULL
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "mpu_wrappers.h"
-
-/*
- * Setup the stack of a new task so it is ready to be placed under the
- * scheduler control.  The registers have to be placed on the stack in
- * the order that the port expects to find them.
- *
- */
-#if( portUSING_MPU_WRAPPERS == 1 )
-	#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
-		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
-	#else
-		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
-	#endif
-#else
-	#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
-		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
-	#else
-		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
-	#endif
-#endif
-
-/* Used by heap_5.c to define the start address and size of each memory region
-that together comprise the total FreeRTOS heap space. */
-typedef struct HeapRegion
-{
-	uint8_t *pucStartAddress;
-	size_t xSizeInBytes;
-} HeapRegion_t;
-
-/* Used to pass information about the heap out of vPortGetHeapStats(). */
-typedef struct xHeapStats
-{
-	size_t xAvailableHeapSpaceInBytes;		/* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
-	size_t xSizeOfLargestFreeBlockInBytes; 	/* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
-	size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
-	size_t xNumberOfFreeBlocks;				/* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
-	size_t xMinimumEverFreeBytesRemaining;	/* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
-	size_t xNumberOfSuccessfulAllocations;	/* The number of calls to pvPortMalloc() that have returned a valid memory block. */
-	size_t xNumberOfSuccessfulFrees;		/* The number of calls to vPortFree() that has successfully freed a block of memory. */
-} HeapStats_t;
-
-/*
- * Used to define multiple heap regions for use by heap_5.c.  This function
- * must be called before any calls to pvPortMalloc() - not creating a task,
- * queue, semaphore, mutex, software timer, event group, etc. will result in
- * pvPortMalloc being called.
- *
- * pxHeapRegions passes in an array of HeapRegion_t structures - each of which
- * defines a region of memory that can be used as the heap.  The array is
- * terminated by a HeapRegions_t structure that has a size of 0.  The region
- * with the lowest start address must appear first in the array.
- */
-void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
-
-/*
- * Returns a HeapStats_t structure filled with information about the current
- * heap state.
- */
-void vPortGetHeapStats( HeapStats_t *pxHeapStats );
-
-/*
- * Map to the memory management routines required for the port.
- */
-void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
-void vPortFree( void *pv ) PRIVILEGED_FUNCTION;
-void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
-size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
-size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Setup the hardware ready for the scheduler to take control.  This generally
- * sets up a tick interrupt and sets timers for the correct tick frequency.
- */
-BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
- * the hardware is left in its original condition after the scheduler stops
- * executing.
- */
-void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The structures and methods of manipulating the MPU are contained within the
- * port layer.
- *
- * Fills the xMPUSettings structure with the memory region information
- * contained in xRegions.
- */
-#if( portUSING_MPU_WRAPPERS == 1 )
-	struct xMEMORY_REGION;
-	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTABLE_H */
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*-----------------------------------------------------------
+* Portable layer API.  Each function must be defined for each port.
+*----------------------------------------------------------*/
+
+#ifndef PORTABLE_H
+#define PORTABLE_H
+
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
+ * pre-processor definition was used to ensure the pre-processor found the correct
+ * portmacro.h file for the port being used.  That scheme was deprecated in favour
+ * of setting the compiler's include path such that it found the correct
+ * portmacro.h file - removing the need for the constant and allowing the
+ * portmacro.h file to be located anywhere in relation to the port being used.
+ * Purely for reasons of backward compatibility the old method is still valid, but
+ * to make it clear that new projects should not use it, support for the port
+ * specific constants has been moved into the deprecated_definitions.h header
+ * file. */
+#include "deprecated_definitions.h"
+
+/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
+ * did not result in a portmacro.h header file being included - and it should be
+ * included here.  In this case the path to the correct portmacro.h header file
+ * must be set in the compiler's include path. */
+#ifndef portENTER_CRITICAL
+    #include "portmacro.h"
+#endif
+
+#if portBYTE_ALIGNMENT == 32
+    #define portBYTE_ALIGNMENT_MASK    ( 0x001f )
+#elif portBYTE_ALIGNMENT == 16
+    #define portBYTE_ALIGNMENT_MASK    ( 0x000f )
+#elif portBYTE_ALIGNMENT == 8
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0007 )
+#elif portBYTE_ALIGNMENT == 4
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0003 )
+#elif portBYTE_ALIGNMENT == 2
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0001 )
+#elif portBYTE_ALIGNMENT == 1
+    #define portBYTE_ALIGNMENT_MASK    ( 0x0000 )
+#else /* if portBYTE_ALIGNMENT == 32 */
+    #error "Invalid portBYTE_ALIGNMENT definition"
+#endif /* if portBYTE_ALIGNMENT == 32 */
+
+#ifndef portUSING_MPU_WRAPPERS
+    #define portUSING_MPU_WRAPPERS    0
+#endif
+
+#ifndef portNUM_CONFIGURABLE_REGIONS
+    #define portNUM_CONFIGURABLE_REGIONS    1
+#endif
+
+#ifndef portHAS_STACK_OVERFLOW_CHECKING
+    #define portHAS_STACK_OVERFLOW_CHECKING    0
+#endif
+
+#ifndef portARCH_NAME
+    #define portARCH_NAME    NULL
+#endif
+
+#ifndef configSTACK_ALLOCATION_FROM_SEPARATE_HEAP
+    /* Defaults to 0 for backward compatibility. */
+    #define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP    0
+#endif
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+#include "mpu_wrappers.h"
+
+/*
+ * Setup the stack of a new task so it is ready to be placed under the
+ * scheduler control.  The registers have to be placed on the stack in
+ * the order that the port expects to find them.
+ *
+ */
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             StackType_t * pxEndOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters,
+                                             BaseType_t xRunPrivileged,
+                                             xMPU_SETTINGS * xMPUSettings ) PRIVILEGED_FUNCTION;
+    #else
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters,
+                                             BaseType_t xRunPrivileged,
+                                             xMPU_SETTINGS * xMPUSettings ) PRIVILEGED_FUNCTION;
+    #endif /* if ( portHAS_STACK_OVERFLOW_CHECKING == 1 ) */
+#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */
+    #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             StackType_t * pxEndOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters ) PRIVILEGED_FUNCTION;
+    #else
+        StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
+                                             TaskFunction_t pxCode,
+                                             void * pvParameters ) PRIVILEGED_FUNCTION;
+    #endif
+#endif /* if ( portUSING_MPU_WRAPPERS == 1 ) */
+
+/* Used by heap_5.c to define the start address and size of each memory region
+ * that together comprise the total FreeRTOS heap space. */
+typedef struct HeapRegion
+{
+    uint8_t * pucStartAddress;
+    size_t xSizeInBytes;
+} HeapRegion_t;
+
+/* Used to pass information about the heap out of vPortGetHeapStats(). */
+typedef struct xHeapStats
+{
+    size_t xAvailableHeapSpaceInBytes;      /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
+    size_t xSizeOfLargestFreeBlockInBytes;  /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xNumberOfFreeBlocks;             /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
+    size_t xMinimumEverFreeBytesRemaining;  /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
+    size_t xNumberOfSuccessfulAllocations;  /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
+    size_t xNumberOfSuccessfulFrees;        /* The number of calls to vPortFree() that has successfully freed a block of memory. */
+} HeapStats_t;
+
+/*
+ * Used to define multiple heap regions for use by heap_5.c.  This function
+ * must be called before any calls to pvPortMalloc() - not creating a task,
+ * queue, semaphore, mutex, software timer, event group, etc. will result in
+ * pvPortMalloc being called.
+ *
+ * pxHeapRegions passes in an array of HeapRegion_t structures - each of which
+ * defines a region of memory that can be used as the heap.  The array is
+ * terminated by a HeapRegions_t structure that has a size of 0.  The region
+ * with the lowest start address must appear first in the array.
+ */
+void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
+
+/*
+ * Returns a HeapStats_t structure filled with information about the current
+ * heap state.
+ */
+void vPortGetHeapStats( HeapStats_t * pxHeapStats );
+
+/*
+ * Map to the memory management routines required for the port.
+ */
+void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
+void * pvPortCalloc( size_t xNum,
+                     size_t xSize ) PRIVILEGED_FUNCTION;
+void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
+void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
+size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
+size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
+
+#if ( configSTACK_ALLOCATION_FROM_SEPARATE_HEAP == 1 )
+    void * pvPortMallocStack( size_t xSize ) PRIVILEGED_FUNCTION;
+    void vPortFreeStack( void * pv ) PRIVILEGED_FUNCTION;
+#else
+    #define pvPortMallocStack    pvPortMalloc
+    #define vPortFreeStack       vPortFree
+#endif
+
+#if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+
+/**
+ * task.h
+ * @code{c}
+ * void vApplicationMallocFailedHook( void )
+ * @endcode
+ *
+ * This hook function is called when allocation failed.
+ */
+    void vApplicationMallocFailedHook( void );
+#endif
+
+/*
+ * Setup the hardware ready for the scheduler to take control.  This generally
+ * sets up a tick interrupt and sets timers for the correct tick frequency.
+ */
+BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
+ * the hardware is left in its original condition after the scheduler stops
+ * executing.
+ */
+void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * The structures and methods of manipulating the MPU are contained within the
+ * port layer.
+ *
+ * Fills the xMPUSettings structure with the memory region information
+ * contained in xRegions.
+ */
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    struct xMEMORY_REGION;
+    void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
+                                    const struct xMEMORY_REGION * const xRegions,
+                                    StackType_t * pxBottomOfStack,
+                                    uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * @brief Checks if the calling task is authorized to access the given buffer.
+ *
+ * @param pvBuffer The buffer which the calling task wants to access.
+ * @param ulBufferLength The length of the pvBuffer.
+ * @param ulAccessRequested The permissions that the calling task wants.
+ *
+ * @return pdTRUE if the calling task is authorized to access the buffer,
+ *         pdFALSE otherwise.
+ */
+#if ( portUSING_MPU_WRAPPERS == 1 )
+    BaseType_t xPortIsAuthorizedToAccessBuffer( const void * pvBuffer,
+                                                uint32_t ulBufferLength,
+                                                uint32_t ulAccessRequested ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * @brief Checks if the calling task is authorized to access the given kernel object.
+ *
+ * @param lInternalIndexOfKernelObject The index of the kernel object in the kernel
+ *                                     object handle pool.
+ *
+ * @return pdTRUE if the calling task is authorized to access the kernel object,
+ *         pdFALSE otherwise.
+ */
+#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
+    BaseType_t xPortIsAuthorizedToAccessKernelObject( int32_t lInternalIndexOfKernelObject ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTABLE_H */

include/projdefs.h

@@ -1,124 +1,138 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef PROJDEFS_H
-#define PROJDEFS_H
-
-/*
- * Defines the prototype to which task functions must conform.  Defined in this
- * file to ensure the type is known before portable.h is included.
- */
-typedef void (*TaskFunction_t)( void * );
-
-/* Converts a time in milliseconds to a time in ticks.  This macro can be
-overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
-definition here is not suitable for your application. */
-#ifndef pdMS_TO_TICKS
-	#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) )
-#endif
-
-#define pdFALSE			( ( BaseType_t ) 0 )
-#define pdTRUE			( ( BaseType_t ) 1 )
-
-#define pdPASS			( pdTRUE )
-#define pdFAIL			( pdFALSE )
-#define errQUEUE_EMPTY	( ( BaseType_t ) 0 )
-#define errQUEUE_FULL	( ( BaseType_t ) 0 )
-
-/* FreeRTOS error definitions. */
-#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY	( -1 )
-#define errQUEUE_BLOCKED						( -4 )
-#define errQUEUE_YIELD							( -5 )
-
-/* Macros used for basic data corruption checks. */
-#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
-	#define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0
-#endif
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	#define pdINTEGRITY_CHECK_VALUE 0x5a5a
-#else
-	#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
-#endif
-
-/* The following errno values are used by FreeRTOS+ components, not FreeRTOS
-itself. */
-#define pdFREERTOS_ERRNO_NONE			0	/* No errors */
-#define	pdFREERTOS_ERRNO_ENOENT			2	/* No such file or directory */
-#define	pdFREERTOS_ERRNO_EINTR			4	/* Interrupted system call */
-#define	pdFREERTOS_ERRNO_EIO			5	/* I/O error */
-#define	pdFREERTOS_ERRNO_ENXIO			6	/* No such device or address */
-#define	pdFREERTOS_ERRNO_EBADF			9	/* Bad file number */
-#define	pdFREERTOS_ERRNO_EAGAIN			11	/* No more processes */
-#define	pdFREERTOS_ERRNO_EWOULDBLOCK	11	/* Operation would block */
-#define	pdFREERTOS_ERRNO_ENOMEM			12	/* Not enough memory */
-#define	pdFREERTOS_ERRNO_EACCES			13	/* Permission denied */
-#define	pdFREERTOS_ERRNO_EFAULT			14	/* Bad address */
-#define	pdFREERTOS_ERRNO_EBUSY			16	/* Mount device busy */
-#define	pdFREERTOS_ERRNO_EEXIST			17	/* File exists */
-#define	pdFREERTOS_ERRNO_EXDEV			18	/* Cross-device link */
-#define	pdFREERTOS_ERRNO_ENODEV			19	/* No such device */
-#define	pdFREERTOS_ERRNO_ENOTDIR		20	/* Not a directory */
-#define	pdFREERTOS_ERRNO_EISDIR			21	/* Is a directory */
-#define	pdFREERTOS_ERRNO_EINVAL			22	/* Invalid argument */
-#define	pdFREERTOS_ERRNO_ENOSPC			28	/* No space left on device */
-#define	pdFREERTOS_ERRNO_ESPIPE			29	/* Illegal seek */
-#define	pdFREERTOS_ERRNO_EROFS			30	/* Read only file system */
-#define	pdFREERTOS_ERRNO_EUNATCH		42	/* Protocol driver not attached */
-#define	pdFREERTOS_ERRNO_EBADE			50	/* Invalid exchange */
-#define	pdFREERTOS_ERRNO_EFTYPE			79	/* Inappropriate file type or format */
-#define	pdFREERTOS_ERRNO_ENMFILE		89	/* No more files */
-#define	pdFREERTOS_ERRNO_ENOTEMPTY		90	/* Directory not empty */
-#define	pdFREERTOS_ERRNO_ENAMETOOLONG 	91	/* File or path name too long */
-#define	pdFREERTOS_ERRNO_EOPNOTSUPP		95	/* Operation not supported on transport endpoint */
-#define	pdFREERTOS_ERRNO_ENOBUFS		105	/* No buffer space available */
-#define	pdFREERTOS_ERRNO_ENOPROTOOPT	109	/* Protocol not available */
-#define	pdFREERTOS_ERRNO_EADDRINUSE		112	/* Address already in use */
-#define	pdFREERTOS_ERRNO_ETIMEDOUT		116	/* Connection timed out */
-#define	pdFREERTOS_ERRNO_EINPROGRESS	119	/* Connection already in progress */
-#define	pdFREERTOS_ERRNO_EALREADY		120	/* Socket already connected */
-#define	pdFREERTOS_ERRNO_EADDRNOTAVAIL 	125	/* Address not available */
-#define	pdFREERTOS_ERRNO_EISCONN		127	/* Socket is already connected */
-#define	pdFREERTOS_ERRNO_ENOTCONN		128	/* Socket is not connected */
-#define	pdFREERTOS_ERRNO_ENOMEDIUM		135	/* No medium inserted */
-#define	pdFREERTOS_ERRNO_EILSEQ			138	/* An invalid UTF-16 sequence was encountered. */
-#define	pdFREERTOS_ERRNO_ECANCELED		140	/* Operation canceled. */
-
-/* The following endian values are used by FreeRTOS+ components, not FreeRTOS
-itself. */
-#define pdFREERTOS_LITTLE_ENDIAN		0
-#define pdFREERTOS_BIG_ENDIAN			1
-
-/* Re-defining endian values for generic naming. */
-#define pdLITTLE_ENDIAN					pdFREERTOS_LITTLE_ENDIAN
-#define pdBIG_ENDIAN					pdFREERTOS_BIG_ENDIAN
-
-
-#endif /* PROJDEFS_H */
-
-
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PROJDEFS_H
+#define PROJDEFS_H
+
+/*
+ * Defines the prototype to which task functions must conform.  Defined in this
+ * file to ensure the type is known before portable.h is included.
+ */
+typedef void (* TaskFunction_t)( void * arg );
+
+/* Converts a time in milliseconds to a time in ticks.  This macro can be
+ * overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
+ * definition here is not suitable for your application. */
+#ifndef pdMS_TO_TICKS
+    #define pdMS_TO_TICKS( xTimeInMs )    ( ( TickType_t ) ( ( ( uint64_t ) ( xTimeInMs ) * ( uint64_t ) configTICK_RATE_HZ ) / ( uint64_t ) 1000U ) )
+#endif
+
+/* Converts a time in ticks to a time in milliseconds.  This macro can be
+ * overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
+ * definition here is not suitable for your application. */
+#ifndef pdTICKS_TO_MS
+    #define pdTICKS_TO_MS( xTimeInTicks )    ( ( TickType_t ) ( ( ( uint64_t ) ( xTimeInTicks ) * ( uint64_t ) 1000U ) / ( uint64_t ) configTICK_RATE_HZ ) )
+#endif
+
+#define pdFALSE                                  ( ( BaseType_t ) 0 )
+#define pdTRUE                                   ( ( BaseType_t ) 1 )
+#define pdFALSE_SIGNED                           ( ( BaseType_t ) 0 )
+#define pdTRUE_SIGNED                            ( ( BaseType_t ) 1 )
+#define pdFALSE_UNSIGNED                         ( ( UBaseType_t ) 0 )
+#define pdTRUE_UNSIGNED                          ( ( UBaseType_t ) 1 )
+
+#define pdPASS                                   ( pdTRUE )
+#define pdFAIL                                   ( pdFALSE )
+#define errQUEUE_EMPTY                           ( ( BaseType_t ) 0 )
+#define errQUEUE_FULL                            ( ( BaseType_t ) 0 )
+
+/* FreeRTOS error definitions. */
+#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY    ( -1 )
+#define errQUEUE_BLOCKED                         ( -4 )
+#define errQUEUE_YIELD                           ( -5 )
+
+/* Macros used for basic data corruption checks. */
+#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
+    #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES    0
+#endif
+
+#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a
+#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a5a5aUL
+#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS )
+    #define pdINTEGRITY_CHECK_VALUE    0x5a5a5a5a5a5a5a5aULL
+#else
+    #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
+#endif
+
+/* The following errno values are used by FreeRTOS+ components, not FreeRTOS
+ * itself. */
+#define pdFREERTOS_ERRNO_NONE             0   /* No errors */
+#define pdFREERTOS_ERRNO_ENOENT           2   /* No such file or directory */
+#define pdFREERTOS_ERRNO_EINTR            4   /* Interrupted system call */
+#define pdFREERTOS_ERRNO_EIO              5   /* I/O error */
+#define pdFREERTOS_ERRNO_ENXIO            6   /* No such device or address */
+#define pdFREERTOS_ERRNO_EBADF            9   /* Bad file number */
+#define pdFREERTOS_ERRNO_EAGAIN           11  /* No more processes */
+#define pdFREERTOS_ERRNO_EWOULDBLOCK      11  /* Operation would block */
+#define pdFREERTOS_ERRNO_ENOMEM           12  /* Not enough memory */
+#define pdFREERTOS_ERRNO_EACCES           13  /* Permission denied */
+#define pdFREERTOS_ERRNO_EFAULT           14  /* Bad address */
+#define pdFREERTOS_ERRNO_EBUSY            16  /* Mount device busy */
+#define pdFREERTOS_ERRNO_EEXIST           17  /* File exists */
+#define pdFREERTOS_ERRNO_EXDEV            18  /* Cross-device link */
+#define pdFREERTOS_ERRNO_ENODEV           19  /* No such device */
+#define pdFREERTOS_ERRNO_ENOTDIR          20  /* Not a directory */
+#define pdFREERTOS_ERRNO_EISDIR           21  /* Is a directory */
+#define pdFREERTOS_ERRNO_EINVAL           22  /* Invalid argument */
+#define pdFREERTOS_ERRNO_ENOSPC           28  /* No space left on device */
+#define pdFREERTOS_ERRNO_ESPIPE           29  /* Illegal seek */
+#define pdFREERTOS_ERRNO_EROFS            30  /* Read only file system */
+#define pdFREERTOS_ERRNO_EUNATCH          42  /* Protocol driver not attached */
+#define pdFREERTOS_ERRNO_EBADE            50  /* Invalid exchange */
+#define pdFREERTOS_ERRNO_EFTYPE           79  /* Inappropriate file type or format */
+#define pdFREERTOS_ERRNO_ENMFILE          89  /* No more files */
+#define pdFREERTOS_ERRNO_ENOTEMPTY        90  /* Directory not empty */
+#define pdFREERTOS_ERRNO_ENAMETOOLONG     91  /* File or path name too long */
+#define pdFREERTOS_ERRNO_EOPNOTSUPP       95  /* Operation not supported on transport endpoint */
+#define pdFREERTOS_ERRNO_EAFNOSUPPORT     97  /* Address family not supported by protocol */
+#define pdFREERTOS_ERRNO_ENOBUFS          105 /* No buffer space available */
+#define pdFREERTOS_ERRNO_ENOPROTOOPT      109 /* Protocol not available */
+#define pdFREERTOS_ERRNO_EADDRINUSE       112 /* Address already in use */
+#define pdFREERTOS_ERRNO_ETIMEDOUT        116 /* Connection timed out */
+#define pdFREERTOS_ERRNO_EINPROGRESS      119 /* Connection already in progress */
+#define pdFREERTOS_ERRNO_EALREADY         120 /* Socket already connected */
+#define pdFREERTOS_ERRNO_EADDRNOTAVAIL    125 /* Address not available */
+#define pdFREERTOS_ERRNO_EISCONN          127 /* Socket is already connected */
+#define pdFREERTOS_ERRNO_ENOTCONN         128 /* Socket is not connected */
+#define pdFREERTOS_ERRNO_ENOMEDIUM        135 /* No medium inserted */
+#define pdFREERTOS_ERRNO_EILSEQ           138 /* An invalid UTF-16 sequence was encountered. */
+#define pdFREERTOS_ERRNO_ECANCELED        140 /* Operation canceled. */
+
+/* The following endian values are used by FreeRTOS+ components, not FreeRTOS
+ * itself. */
+#define pdFREERTOS_LITTLE_ENDIAN          0
+#define pdFREERTOS_BIG_ENDIAN             1
+
+/* Re-defining endian values for generic naming. */
+#define pdLITTLE_ENDIAN                   pdFREERTOS_LITTLE_ENDIAN
+#define pdBIG_ENDIAN                      pdFREERTOS_BIG_ENDIAN
+
+
+#endif /* PROJDEFS_H */

include/stack_macros.h

@@ -1,129 +1,141 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef STACK_MACROS_H
-#define STACK_MACROS_H
-
-/*
- * Call the stack overflow hook function if the stack of the task being swapped
- * out is currently overflowed, or looks like it might have overflowed in the
- * past.
- *
- * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
- * the current stack state only - comparing the current top of stack value to
- * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
- * will also cause the last few stack bytes to be checked to ensure the value
- * to which the bytes were set when the task was created have not been
- * overwritten.  Note this second test does not guarantee that an overflowed
- * stack will always be recognised.
- */
-
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
-
-	/* Only the current stack state is to be checked. */
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-		/* Is the currently saved stack pointer within the stack limit? */								\
-		if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )										\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
-
-	/* Only the current stack state is to be checked. */
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-																										\
-		/* Is the currently saved stack pointer within the stack limit? */								\
-		if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )									\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
-
-	#define taskCHECK_FOR_STACK_OVERFLOW()																\
-	{																									\
-		const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;							\
-		const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;											\
-																										\
-		if( ( pulStack[ 0 ] != ulCheckValue ) ||														\
-			( pulStack[ 1 ] != ulCheckValue ) ||														\
-			( pulStack[ 2 ] != ulCheckValue ) ||														\
-			( pulStack[ 3 ] != ulCheckValue ) )															\
-		{																								\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
-		}																								\
-	}
-
-#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
-
-	#define taskCHECK_FOR_STACK_OVERFLOW()																								\
-	{																																	\
-	int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;																		\
-	static const uint8_t ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
-													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };	\
-																																		\
-																																		\
-		pcEndOfStack -= sizeof( ucExpectedStackBytes );																					\
-																																		\
-		/* Has the extremity of the task stack ever been written over? */																\
-		if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )					\
-		{																																\
-			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );									\
-		}																																\
-	}
-
-#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
-/*-----------------------------------------------------------*/
-
-/* Remove stack overflow macro if not being used. */
-#ifndef taskCHECK_FOR_STACK_OVERFLOW
-	#define taskCHECK_FOR_STACK_OVERFLOW()
-#endif
-
-
-
-#endif /* STACK_MACROS_H */
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef STACK_MACROS_H
+#define STACK_MACROS_H
+
+/*
+ * Call the stack overflow hook function if the stack of the task being swapped
+ * out is currently overflowed, or looks like it might have overflowed in the
+ * past.
+ *
+ * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
+ * the current stack state only - comparing the current top of stack value to
+ * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
+ * will also cause the last few stack bytes to be checked to ensure the value
+ * to which the bytes were set when the task was created have not been
+ * overwritten.  Note this second test does not guarantee that an overflowed
+ * stack will always be recognised.
+ */
+
+/*-----------------------------------------------------------*/
+
+/*
+ * portSTACK_LIMIT_PADDING is a number of extra words to consider to be in
+ * use on the stack.
+ */
+#ifndef portSTACK_LIMIT_PADDING
+    #define portSTACK_LIMIT_PADDING    0
+#endif
+
+#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
+
+/* Only the current stack state is to be checked. */
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                      \
+    do {                                                                                        \
+        /* Is the currently saved stack pointer within the stack limit? */                      \
+        if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack + portSTACK_LIMIT_PADDING )     \
+        {                                                                                       \
+            char * pcOverflowTaskName = pxCurrentTCB->pcTaskName;                               \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \
+        }                                                                                       \
+    } while( 0 )
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
+/*-----------------------------------------------------------*/
+
+#if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
+
+/* Only the current stack state is to be checked. */
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                       \
+    do {                                                                                         \
+                                                                                                 \
+        /* Is the currently saved stack pointer within the stack limit? */                       \
+        if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack - portSTACK_LIMIT_PADDING ) \
+        {                                                                                        \
+            char * pcOverflowTaskName = pxCurrentTCB->pcTaskName;                                \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName );  \
+        }                                                                                        \
+    } while( 0 )
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
+/*-----------------------------------------------------------*/
+
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
+
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                      \
+    do {                                                                                        \
+        const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;                 \
+        const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5U;                                 \
+                                                                                                \
+        if( ( pulStack[ 0 ] != ulCheckValue ) ||                                                \
+            ( pulStack[ 1 ] != ulCheckValue ) ||                                                \
+            ( pulStack[ 2 ] != ulCheckValue ) ||                                                \
+            ( pulStack[ 3 ] != ulCheckValue ) )                                                 \
+        {                                                                                       \
+            char * pcOverflowTaskName = pxCurrentTCB->pcTaskName;                               \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName ); \
+        }                                                                                       \
+    } while( 0 )
+
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
+/*-----------------------------------------------------------*/
+
+#if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
+
+    #define taskCHECK_FOR_STACK_OVERFLOW()                                                                                                \
+    do {                                                                                                                                  \
+        int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;                                                                  \
+        static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,   \
+                                                        tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
+                                                                                                                                          \
+                                                                                                                                          \
+        pcEndOfStack -= sizeof( ucExpectedStackBytes );                                                                                   \
+                                                                                                                                          \
+        /* Has the extremity of the task stack ever been written over? */                                                                 \
+        if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )                     \
+        {                                                                                                                                 \
+            char * pcOverflowTaskName = pxCurrentTCB->pcTaskName;                                                                         \
+            vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pcOverflowTaskName );                                           \
+        }                                                                                                                                 \
+    } while( 0 )
+
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
+/*-----------------------------------------------------------*/
+
+/* Remove stack overflow macro if not being used. */
+#ifndef taskCHECK_FOR_STACK_OVERFLOW
+    #define taskCHECK_FOR_STACK_OVERFLOW()
+#endif
+
+
+
+#endif /* STACK_MACROS_H */

include/stdint.readme

@@ -1,27 +1,58 @@
-
-#ifndef FREERTOS_STDINT
-#define FREERTOS_STDINT
-
-/*******************************************************************************
- * THIS IS NOT A FULL stdint.h IMPLEMENTATION - It only contains the definitions
- * necessary to build the FreeRTOS code.  It is provided to allow FreeRTOS to be
- * built using compilers that do not provide their own stdint.h definition.
- *
- * To use this file:
- *
- *    1) Copy this file into the directory that contains your FreeRTOSConfig.h
- *       header file, as that directory will already be in the compilers include
- *       path.
- *
- *    2) Rename the copied file stdint.h.
- *
- */
-
-typedef signed char int8_t;
-typedef unsigned char uint8_t;
-typedef short int16_t;
-typedef unsigned short uint16_t;
-typedef long int32_t;
-typedef unsigned long uint32_t;
-
-#endif /* FREERTOS_STDINT */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef FREERTOS_STDINT
+#define FREERTOS_STDINT
+
+/*******************************************************************************
+ * THIS IS NOT A FULL stdint.h IMPLEMENTATION - It only contains the definitions
+ * necessary to build the FreeRTOS code.  It is provided to allow FreeRTOS to be
+ * built using compilers that do not provide their own stdint.h definition.
+ *
+ * To use this file:
+ *
+ *    1) Copy this file into the directory that contains your FreeRTOSConfig.h
+ *       header file, as that directory will already be in the compiler's include
+ *       path.
+ *
+ *    2) Rename the copied file stdint.h.
+ *
+ */
+
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+typedef short int16_t;
+typedef unsigned short uint16_t;
+typedef long int32_t;
+typedef unsigned long uint32_t;
+
+#ifndef SIZE_MAX
+    #define SIZE_MAX    ( ( size_t ) -1 )
+#endif
+
+#endif /* FREERTOS_STDINT */

list.c

@@ -1,198 +1,247 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-
-#include <stdlib.h>
-#include "FreeRTOS.h"
-#include "list.h"
-
-/*-----------------------------------------------------------
- * PUBLIC LIST API documented in list.h
- *----------------------------------------------------------*/
-
-void vListInitialise( List_t * const pxList )
-{
-	/* The list structure contains a list item which is used to mark the
-	end of the list.  To initialise the list the list end is inserted
-	as the only list entry. */
-	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-
-	/* The list end value is the highest possible value in the list to
-	ensure it remains at the end of the list. */
-	pxList->xListEnd.xItemValue = portMAX_DELAY;
-
-	/* The list end next and previous pointers point to itself so we know
-	when the list is empty. */
-	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
-
-	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
-
-	/* Write known values into the list if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
-	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
-}
-/*-----------------------------------------------------------*/
-
-void vListInitialiseItem( ListItem_t * const pxItem )
-{
-	/* Make sure the list item is not recorded as being on a list. */
-	pxItem->pxContainer = NULL;
-
-	/* Write known values into the list item if
-	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
-	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
-}
-/*-----------------------------------------------------------*/
-
-void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
-{
-ListItem_t * const pxIndex = pxList->pxIndex;
-
-	/* Only effective when configASSERT() is also defined, these tests may catch
-	the list data structures being overwritten in memory.  They will not catch
-	data errors caused by incorrect configuration or use of FreeRTOS. */
-	listTEST_LIST_INTEGRITY( pxList );
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
-
-	/* Insert a new list item into pxList, but rather than sort the list,
-	makes the new list item the last item to be removed by a call to
-	listGET_OWNER_OF_NEXT_ENTRY(). */
-	pxNewListItem->pxNext = pxIndex;
-	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
-
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
-
-	pxIndex->pxPrevious->pxNext = pxNewListItem;
-	pxIndex->pxPrevious = pxNewListItem;
-
-	/* Remember which list the item is in. */
-	pxNewListItem->pxContainer = pxList;
-
-	( pxList->uxNumberOfItems )++;
-}
-/*-----------------------------------------------------------*/
-
-void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
-{
-ListItem_t *pxIterator;
-const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
-
-	/* Only effective when configASSERT() is also defined, these tests may catch
-	the list data structures being overwritten in memory.  They will not catch
-	data errors caused by incorrect configuration or use of FreeRTOS. */
-	listTEST_LIST_INTEGRITY( pxList );
-	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
-
-	/* Insert the new list item into the list, sorted in xItemValue order.
-
-	If the list already contains a list item with the same item value then the
-	new list item should be placed after it.  This ensures that TCBs which are
-	stored in ready lists (all of which have the same xItemValue value) get a
-	share of the CPU.  However, if the xItemValue is the same as the back marker
-	the iteration loop below will not end.  Therefore the value is checked
-	first, and the algorithm slightly modified if necessary. */
-	if( xValueOfInsertion == portMAX_DELAY )
-	{
-		pxIterator = pxList->xListEnd.pxPrevious;
-	}
-	else
-	{
-		/* *** NOTE ***********************************************************
-		If you find your application is crashing here then likely causes are
-		listed below.  In addition see https://www.freertos.org/FAQHelp.html for
-		more tips, and ensure configASSERT() is defined!
-		https://www.freertos.org/a00110.html#configASSERT
-
-			1) Stack overflow -
-			   see https://www.freertos.org/Stacks-and-stack-overflow-checking.html
-			2) Incorrect interrupt priority assignment, especially on Cortex-M
-			   parts where numerically high priority values denote low actual
-			   interrupt priorities, which can seem counter intuitive.  See
-			   https://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
-			   of configMAX_SYSCALL_INTERRUPT_PRIORITY on
-			   https://www.freertos.org/a00110.html
-			3) Calling an API function from within a critical section or when
-			   the scheduler is suspended, or calling an API function that does
-			   not end in "FromISR" from an interrupt.
-			4) Using a queue or semaphore before it has been initialised or
-			   before the scheduler has been started (are interrupts firing
-			   before vTaskStartScheduler() has been called?).
-		**********************************************************************/
-
-		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
-		{
-			/* There is nothing to do here, just iterating to the wanted
-			insertion position. */
-		}
-	}
-
-	pxNewListItem->pxNext = pxIterator->pxNext;
-	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
-	pxNewListItem->pxPrevious = pxIterator;
-	pxIterator->pxNext = pxNewListItem;
-
-	/* Remember which list the item is in.  This allows fast removal of the
-	item later. */
-	pxNewListItem->pxContainer = pxList;
-
-	( pxList->uxNumberOfItems )++;
-}
-/*-----------------------------------------------------------*/
-
-UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
-{
-/* The list item knows which list it is in.  Obtain the list from the list
-item. */
-List_t * const pxList = pxItemToRemove->pxContainer;
-
-	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
-	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
-
-	/* Only used during decision coverage testing. */
-	mtCOVERAGE_TEST_DELAY();
-
-	/* Make sure the index is left pointing to a valid item. */
-	if( pxList->pxIndex == pxItemToRemove )
-	{
-		pxList->pxIndex = pxItemToRemove->pxPrevious;
-	}
-	else
-	{
-		mtCOVERAGE_TEST_MARKER();
-	}
-
-	pxItemToRemove->pxContainer = NULL;
-	( pxList->uxNumberOfItems )--;
-
-	return pxList->uxNumberOfItems;
-}
-/*-----------------------------------------------------------*/
-
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+
+#include <stdlib.h>
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+ * all the API functions to use the MPU wrappers.  That should only be done when
+ * task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#include "FreeRTOS.h"
+#include "list.h"
+
+/* The MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be
+ * defined for the header files above, but not in this file, in order to
+ * generate the correct privileged Vs unprivileged linkage and placement. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/*-----------------------------------------------------------
+* PUBLIC LIST API documented in list.h
+*----------------------------------------------------------*/
+
+void vListInitialise( List_t * const pxList )
+{
+    traceENTER_vListInitialise( pxList );
+
+    /* The list structure contains a list item which is used to mark the
+     * end of the list.  To initialise the list the list end is inserted
+     * as the only list entry. */
+    pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );
+
+    listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( &( pxList->xListEnd ) );
+
+    /* The list end value is the highest possible value in the list to
+     * ensure it remains at the end of the list. */
+    pxList->xListEnd.xItemValue = portMAX_DELAY;
+
+    /* The list end next and previous pointers point to itself so we know
+     * when the list is empty. */
+    pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );
+    pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );
+
+    /* Initialize the remaining fields of xListEnd when it is a proper ListItem_t */
+    #if ( configUSE_MINI_LIST_ITEM == 0 )
+    {
+        pxList->xListEnd.pvOwner = NULL;
+        pxList->xListEnd.pxContainer = NULL;
+        listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( &( pxList->xListEnd ) );
+    }
+    #endif
+
+    pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
+
+    /* Write known values into the list if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
+    listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
+
+    traceRETURN_vListInitialise();
+}
+/*-----------------------------------------------------------*/
+
+void vListInitialiseItem( ListItem_t * const pxItem )
+{
+    traceENTER_vListInitialiseItem( pxItem );
+
+    /* Make sure the list item is not recorded as being on a list. */
+    pxItem->pxContainer = NULL;
+
+    /* Write known values into the list item if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+    listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+
+    traceRETURN_vListInitialiseItem();
+}
+/*-----------------------------------------------------------*/
+
+void vListInsertEnd( List_t * const pxList,
+                     ListItem_t * const pxNewListItem )
+{
+    ListItem_t * const pxIndex = pxList->pxIndex;
+
+    traceENTER_vListInsertEnd( pxList, pxNewListItem );
+
+    /* Only effective when configASSERT() is also defined, these tests may catch
+     * the list data structures being overwritten in memory.  They will not catch
+     * data errors caused by incorrect configuration or use of FreeRTOS. */
+    listTEST_LIST_INTEGRITY( pxList );
+    listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+
+    /* Insert a new list item into pxList, but rather than sort the list,
+     * makes the new list item the last item to be removed by a call to
+     * listGET_OWNER_OF_NEXT_ENTRY(). */
+    pxNewListItem->pxNext = pxIndex;
+    pxNewListItem->pxPrevious = pxIndex->pxPrevious;
+
+    /* Only used during decision coverage testing. */
+    mtCOVERAGE_TEST_DELAY();
+
+    pxIndex->pxPrevious->pxNext = pxNewListItem;
+    pxIndex->pxPrevious = pxNewListItem;
+
+    /* Remember which list the item is in. */
+    pxNewListItem->pxContainer = pxList;
+
+    ( pxList->uxNumberOfItems )++;
+
+    traceRETURN_vListInsertEnd();
+}
+/*-----------------------------------------------------------*/
+
+void vListInsert( List_t * const pxList,
+                  ListItem_t * const pxNewListItem )
+{
+    ListItem_t * pxIterator;
+    const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
+
+    traceENTER_vListInsert( pxList, pxNewListItem );
+
+    /* Only effective when configASSERT() is also defined, these tests may catch
+     * the list data structures being overwritten in memory.  They will not catch
+     * data errors caused by incorrect configuration or use of FreeRTOS. */
+    listTEST_LIST_INTEGRITY( pxList );
+    listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+
+    /* Insert the new list item into the list, sorted in xItemValue order.
+     *
+     * If the list already contains a list item with the same item value then the
+     * new list item should be placed after it.  This ensures that TCBs which are
+     * stored in ready lists (all of which have the same xItemValue value) get a
+     * share of the CPU.  However, if the xItemValue is the same as the back marker
+     * the iteration loop below will not end.  Therefore the value is checked
+     * first, and the algorithm slightly modified if necessary. */
+    if( xValueOfInsertion == portMAX_DELAY )
+    {
+        pxIterator = pxList->xListEnd.pxPrevious;
+    }
+    else
+    {
+        /* *** NOTE ***********************************************************
+        *  If you find your application is crashing here then likely causes are
+        *  listed below.  In addition see https://www.FreeRTOS.org/FAQHelp.html for
+        *  more tips, and ensure configASSERT() is defined!
+        *  https://www.FreeRTOS.org/a00110.html#configASSERT
+        *
+        *   1) Stack overflow -
+        *      see https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
+        *   2) Incorrect interrupt priority assignment, especially on Cortex-M
+        *      parts where numerically high priority values denote low actual
+        *      interrupt priorities, which can seem counter intuitive.  See
+        *      https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html and the definition
+        *      of configMAX_SYSCALL_INTERRUPT_PRIORITY on
+        *      https://www.FreeRTOS.org/a00110.html
+        *   3) Calling an API function from within a critical section or when
+        *      the scheduler is suspended, or calling an API function that does
+        *      not end in "FromISR" from an interrupt.
+        *   4) Using a queue or semaphore before it has been initialised or
+        *      before the scheduler has been started (are interrupts firing
+        *      before vTaskStartScheduler() has been called?).
+        *   5) If the FreeRTOS port supports interrupt nesting then ensure that
+        *      the priority of the tick interrupt is at or below
+        *      configMAX_SYSCALL_INTERRUPT_PRIORITY.
+        **********************************************************************/
+
+        for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext )
+        {
+            /* There is nothing to do here, just iterating to the wanted
+             * insertion position. */
+        }
+    }
+
+    pxNewListItem->pxNext = pxIterator->pxNext;
+    pxNewListItem->pxNext->pxPrevious = pxNewListItem;
+    pxNewListItem->pxPrevious = pxIterator;
+    pxIterator->pxNext = pxNewListItem;
+
+    /* Remember which list the item is in.  This allows fast removal of the
+     * item later. */
+    pxNewListItem->pxContainer = pxList;
+
+    ( pxList->uxNumberOfItems )++;
+
+    traceRETURN_vListInsert();
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
+{
+    /* The list item knows which list it is in.  Obtain the list from the list
+     * item. */
+    List_t * const pxList = pxItemToRemove->pxContainer;
+
+    traceENTER_uxListRemove( pxItemToRemove );
+
+
+
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+    pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+
+    /* Only used during decision coverage testing. */
+    mtCOVERAGE_TEST_DELAY();
+
+    /* Make sure the index is left pointing to a valid item. */
+    if( pxList->pxIndex == pxItemToRemove )
+    {
+        pxList->pxIndex = pxItemToRemove->pxPrevious;
+    }
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
+
+    pxItemToRemove->pxContainer = NULL;
+    ( pxList->uxNumberOfItems )--;
+
+    traceRETURN_uxListRemove( pxList->uxNumberOfItems );
+
+    return pxList->uxNumberOfItems;
+}
+/*-----------------------------------------------------------*/

manifest.yml

@@ -0,0 +1,4 @@
+name : "FreeRTOS-Kernel"
+version: "v11.0.0"
+description: "FreeRTOS Kernel."
+license: "MIT"

portable/ARMClang/Use-the-GCC-ports.txt

@@ -1,2 +1,2 @@
-The FreeRTOS GCC port layer also builds and works with the ARMClang compiler.
-To use the ARMClang compiler build the port files from FreeRTOS/Source/portable/GCC.
+The FreeRTOS GCC port layer also builds and works with the ARMClang compiler.
+To use the ARMClang compiler build the port files from FreeRTOS/Source/portable/GCC.

portable/ARMv8M/ReadMe.txt

@@ -1,10 +1,11 @@
-This directory tree contains the master copy of the FreeeRTOS Cortex-M33 port.
-Do not use the files located here!  These file are copied into separate
-FreeRTOS/Source/portable/[compiler]/ARM_CM33_NNN directories prior to each
-FreeRTOS release.
-
-If your Cortex-M33 application uses TrustZone then use the files from the
-FreeRTOS/Source/portable/[compiler]/ARM_CM33 directories.
-
-If your Cortex-M33 application does not use TrustZone then use the files from
-the FreeRTOS/Source/portable/[compiler]/ARM_CM33_NTZ directories.
+This directory tree contains the master copy of the FreeRTOS Armv8-M and
+Armv8.1-M ports.
+Do not use the files located here!  These file are copied into separate
+FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NNN directories prior to each
+FreeRTOS release.
+
+If your Armv8-M and Armv8.1-M application uses TrustZone then use the files from the
+FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85] directories.
+
+If your Armv8-M and Armv8.1-M application does not use TrustZone then use the files from
+the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NTZ directories.

portable/ARMv8M/copy_files.py

@@ -1,103 +1,174 @@
-#/*
-# * FreeRTOS Kernel V10.3.0
-# * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
-# *
-# * Permission is hereby granted, free of charge, to any person obtaining a copy of
-# * this software and associated documentation files (the "Software"), to deal in
-# * the Software without restriction, including without limitation the rights to
-# * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
-# * the Software, and to permit persons to whom the Software is furnished to do so,
-# * subject to the following conditions:
-# *
-# * The above copyright notice and this permission notice shall be included in all
-# * copies or substantial portions of the Software.
-# *
-# * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
-# * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
-# * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-# * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-# * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-# *
-# * http://www.FreeRTOS.org
-# * http://aws.amazon.com/freertos
-# *
-# * 1 tab == 4 spaces!
-# */
-
-import os
-import shutil
-
-_THIS_FILE_DIRECTORY_ = os.path.dirname(os.path.realpath(__file__))
-_FREERTOS_PORTABLE_DIRECTORY_ = os.path.dirname(_THIS_FILE_DIRECTORY_)
-
-_COMPILERS_ = ['GCC', 'IAR']
-_ARCH_NS_ = ['ARM_CM33', 'ARM_CM33_NTZ', 'ARM_CM23', 'ARM_CM23_NTZ']
-_ARCH_S_ = ['ARM_CM33', 'ARM_CM23']
-
-_SUPPORTED_CONFIGS_ =   {
-                            'GCC' : ['ARM_CM33', 'ARM_CM33_NTZ', 'ARM_CM23', 'ARM_CM23_NTZ'],
-                            'IAR' : ['ARM_CM33', 'ARM_CM33_NTZ', 'ARM_CM23', 'ARM_CM23_NTZ']
-                        }
-
-# Files to be complied in the Secure Project
-_SECURE_FILE_PATHS_ = [
-    os.path.join('secure', 'context'),
-    os.path.join('secure', 'context', 'portable', '_COMPILER_ARCH_'),
-    os.path.join('secure', 'heap'),
-    os.path.join('secure', 'init'),
-    os.path.join('secure', 'macros')
-]
-
-# Files to be complied in the Non-Secure Project
-_NONSECURE_FILE_PATHS_ = [
-    'non_secure',
-    os.path.join('non_secure', 'portable', '_COMPILER_ARCH_')
-]
-
-
-def is_supported_config(compiler, arch):
-    return arch in _SUPPORTED_CONFIGS_[compiler]
-
-
-def copy_files_in_dir(src_abs_path, dst_abs_path):
-    for src_file in os.listdir(src_abs_path):
-        src_file_abs_path = os.path.join(src_abs_path, src_file)
-        if os.path.isfile(src_file_abs_path) and src_file != 'ReadMe.txt':
-            if not os.path.exists(dst_abs_path):
-                os.makedirs(dst_abs_path)
-            print('Copying {}...'.format(os.path.basename(src_file_abs_path)))
-            shutil.copy2(src_file_abs_path, dst_abs_path)
-
-
-def copy_files_for_compiler_and_arch(compiler, arch, src_paths, dst_path):
-    _COMPILER_ARCH_ = os.path.join(compiler, arch)
-    for src_path in src_paths:
-        src_path_sanitized = src_path.replace('_COMPILER_ARCH_', _COMPILER_ARCH_ )
-
-        src_abs_path = os.path.join(_THIS_FILE_DIRECTORY_, src_path_sanitized)
-        dst_abs_path = os.path.join(_FREERTOS_PORTABLE_DIRECTORY_, _COMPILER_ARCH_, dst_path)
-
-        copy_files_in_dir(src_abs_path, dst_abs_path)
-
-
-def copy_files():
-    # Copy Secure Files
-    for compiler in _COMPILERS_:
-        for arch in _ARCH_S_:
-            if is_supported_config(compiler, arch):
-                copy_files_for_compiler_and_arch(compiler, arch, _SECURE_FILE_PATHS_, 'secure')
-
-    # Copy Non-Secure Files
-    for compiler in _COMPILERS_:
-        for arch in _ARCH_NS_:
-            if is_supported_config(compiler, arch):
-                copy_files_for_compiler_and_arch(compiler, arch, _NONSECURE_FILE_PATHS_, 'non_secure')
-
-
-def main():
-    copy_files()
-
-
-if __name__ == '__main__':
-    main()
+#/*
+# * FreeRTOS Kernel V11.0.0
+# * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+# *
+# * SPDX-License-Identifier: MIT
+# *
+# * Permission is hereby granted, free of charge, to any person obtaining a copy of
+# * this software and associated documentation files (the "Software"), to deal in
+# * the Software without restriction, including without limitation the rights to
+# * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+# * the Software, and to permit persons to whom the Software is furnished to do so,
+# * subject to the following conditions:
+# *
+# * The above copyright notice and this permission notice shall be included in all
+# * copies or substantial portions of the Software.
+# *
+# * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+# * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+# * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+# *
+# * https://www.FreeRTOS.org
+# * https://github.com/FreeRTOS
+# *
+# */
+
+import os
+import shutil
+
+_THIS_FILE_DIRECTORY_ = os.path.dirname(os.path.realpath(__file__))
+_FREERTOS_PORTABLE_DIRECTORY_ = os.path.dirname(_THIS_FILE_DIRECTORY_)
+
+_COMPILERS_ = ['GCC', 'IAR']
+_ARCH_NS_ = ['ARM_CM85', 'ARM_CM85_NTZ', 'ARM_CM55', 'ARM_CM55_NTZ', 'ARM_CM35P', 'ARM_CM35P_NTZ', 'ARM_CM33', 'ARM_CM33_NTZ', 'ARM_CM23', 'ARM_CM23_NTZ']
+_ARCH_S_ = ['ARM_CM85', 'ARM_CM55', 'ARM_CM35P', 'ARM_CM33', 'ARM_CM23']
+
+# Files to be compiled in the Secure Project
+_SECURE_COMMON_FILE_PATHS_ = [
+    os.path.join('secure', 'context'),
+    os.path.join('secure', 'heap'),
+    os.path.join('secure', 'init'),
+    os.path.join('secure', 'macros')
+]
+
+_SECURE_PORTABLE_FILE_PATHS_ = {
+    'GCC':{
+        'ARM_CM23' :[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM23')],
+        'ARM_CM33' :[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM33')],
+        'ARM_CM35P':[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM33')],
+        'ARM_CM55' :[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM33')],
+        'ARM_CM85' :[os.path.join('secure', 'context', 'portable', 'GCC', 'ARM_CM33')]
+    },
+    'IAR':{
+        'ARM_CM23' :[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM23')],
+        'ARM_CM33' :[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM33')],
+        'ARM_CM35P':[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM33')],
+        'ARM_CM55' :[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM33')],
+        'ARM_CM85' :[os.path.join('secure', 'context', 'portable', 'IAR', 'ARM_CM33')]
+    }
+}
+
+# Files to be compiled in the Non-Secure Project
+_NONSECURE_COMMON_FILE_PATHS_ = [
+    'non_secure'
+]
+
+_NONSECURE_PORTABLE_FILE_PATHS_ = {
+    'GCC':{
+        'ARM_CM23'      : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM23')],
+        'ARM_CM23_NTZ'  : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM23_NTZ')],
+        'ARM_CM33'      : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33')],
+        'ARM_CM33_NTZ'  : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ')],
+        'ARM_CM35P'     : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'portasm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'mpu_wrappers_v2_asm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM35P', 'portmacro.h')],
+        'ARM_CM35P_NTZ' : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'portasm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM35P', 'portmacro.h')],
+        'ARM_CM55'      : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'portasm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'mpu_wrappers_v2_asm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM55', 'portmacro.h')],
+        'ARM_CM55_NTZ'  : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'portasm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM55', 'portmacro.h')],
+        'ARM_CM85'      : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'portasm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33', 'mpu_wrappers_v2_asm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM85', 'portmacro.h')],
+        'ARM_CM85_NTZ'  : [os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'portasm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.c'),
+                           os.path.join('non_secure', 'portable', 'GCC', 'ARM_CM85', 'portmacro.h')]
+    },
+    'IAR':{
+        'ARM_CM23'      : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM23')],
+        'ARM_CM23_NTZ'  : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM23_NTZ')],
+        'ARM_CM33'      : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33')],
+        'ARM_CM33_NTZ'  : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ')],
+        'ARM_CM35P'     : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'portasm.s'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'mpu_wrappers_v2_asm.S'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM35P', 'portmacro.h')],
+        'ARM_CM35P_NTZ' : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'portasm.s'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.S'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM35P', 'portmacro.h')],
+        'ARM_CM55'      : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'portasm.s'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'mpu_wrappers_v2_asm.S'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM55', 'portmacro.h')],
+        'ARM_CM55_NTZ'  : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'portasm.s'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.S'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM55', 'portmacro.h')],
+        'ARM_CM85'      : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'portasm.s'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33', 'mpu_wrappers_v2_asm.S'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM85', 'portmacro.h')],
+        'ARM_CM85_NTZ'  : [os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'portasm.s'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM33_NTZ', 'mpu_wrappers_v2_asm.S'),
+                           os.path.join('non_secure', 'portable', 'IAR', 'ARM_CM85', 'portmacro.h')]
+    },
+}
+
+
+def copy_files_in_dir(src_abs_path, dst_abs_path):
+    if os.path.isfile(src_abs_path):
+        print('Src: {}'.format(src_abs_path))
+        print('Dst: {}\n'.format(dst_abs_path))
+        shutil.copy2(src_abs_path, dst_abs_path)
+    else:
+        for src_file in os.listdir(src_abs_path):
+            src_file_abs_path = os.path.join(src_abs_path, src_file)
+            if os.path.isfile(src_file_abs_path) and src_file != 'ReadMe.txt':
+                if not os.path.exists(dst_abs_path):
+                    os.makedirs(dst_abs_path)
+                print('Src: {}'.format(src_file_abs_path))
+                print('Dst: {}\n'.format(dst_abs_path))
+                shutil.copy2(src_file_abs_path, dst_abs_path)
+
+
+def copy_common_files_for_compiler_and_arch(compiler, arch, src_paths, dst_path):
+    for src_path in src_paths:
+
+        src_abs_path = os.path.join(_THIS_FILE_DIRECTORY_, src_path)
+        dst_abs_path = os.path.join(_FREERTOS_PORTABLE_DIRECTORY_, compiler, arch, dst_path)
+
+        copy_files_in_dir(src_abs_path, dst_abs_path)
+
+
+def copy_portable_files_for_compiler_and_arch(compiler, arch, src_paths, dst_path):
+    for src_path in src_paths[compiler][arch]:
+
+        src_abs_path = os.path.join(_THIS_FILE_DIRECTORY_, src_path)
+        dst_abs_path = os.path.join(_FREERTOS_PORTABLE_DIRECTORY_, compiler, arch, dst_path)
+
+        copy_files_in_dir(src_abs_path, dst_abs_path)
+
+
+def copy_files():
+    # Copy Secure Files
+    for compiler in _COMPILERS_:
+        for arch in _ARCH_S_:
+            copy_common_files_for_compiler_and_arch(compiler, arch, _SECURE_COMMON_FILE_PATHS_, 'secure')
+            copy_portable_files_for_compiler_and_arch(compiler, arch, _SECURE_PORTABLE_FILE_PATHS_, 'secure')
+
+    # Copy Non-Secure Files
+    for compiler in _COMPILERS_:
+        for arch in _ARCH_NS_:
+            copy_common_files_for_compiler_and_arch(compiler, arch, _NONSECURE_COMMON_FILE_PATHS_, 'non_secure')
+            copy_portable_files_for_compiler_and_arch(compiler, arch, _NONSECURE_PORTABLE_FILE_PATHS_, 'non_secure')
+
+
+def main():
+    copy_files()
+
+
+if __name__ == '__main__':
+    main()

portable/ARMv8M/non_secure/ReadMe.txt

@@ -1,11 +1,11 @@
-This directory tree contains the master copy of the FreeeRTOS Cortex-M33 port.
-Do not use the files located here!  These file are copied into separate
-FreeRTOS/Source/portable/[compiler]/ARM_CM33_NNN directories prior to each
-FreeRTOS release.
-
-If your Cortex-M33 application uses TrustZone then use the files from the
-FreeRTOS/Source/portable/[compiler]/ARM_CM33 directories.
-
-If your Cortex-M33 application does not use TrustZone then use the files from
-the FreeRTOS/Source/portable/[compiler]/ARM_CM33_NTZ directories.
-
+This directory tree contains the master copy of the FreeRTOS Armv8-M and
+Armv8.1-M ports.
+Do not use the files located here!  These file are copied into separate
+FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NNN directories prior to
+each FreeRTOS release.
+
+If your Armv8-M/Armv8.1-M application uses TrustZone then use the files from the
+FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85] directories.
+
+If your Armv8-M/Armv8.1-M application does not use TrustZone then use the files from
+the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55|85]_NTZ directories.

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h

@@ -1,301 +1,78 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*------------------------------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the given hardware
- * and compiler.
- *
- * These settings should not be altered.
- *------------------------------------------------------------------------------
- */
-
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
-
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
-
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
-
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Type definitions.
- */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
-
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * Architecture specifics.
- */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Extern declarations.
- */
-extern BaseType_t xPortIsInsideInterrupt( void );
-
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
-
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
-
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief MPU specific constants.
- */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
-
-
-/* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
-
-/* Device memory attributes used in MPU_MAIR registers.
- *
- * 8-bit values encoded as follows:
- *  Bit[7:4] - 0000 - Device Memory
- *  Bit[3:2] - 00 --> Device-nGnRnE
- *				01 --> Device-nGnRE
- *				10 --> Device-nGRE
- *				11 --> Device-GRE
- *  Bit[1:0] - 00, Reserved.
- */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
-
-/* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
-
-/* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
-
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
-
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Settings to define an MPU region.
- */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
-
-/**
- * @brief MPU settings as stored in the TCB.
- */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief SVC numbers.
- */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Scheduler utilities.
- */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Critical section management.
- */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Task function macros as described on the FreeRTOS.org WEB site.
- */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
-
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
-
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
-
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Barriers.
- */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
-/*-----------------------------------------------------------*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M23"
+#define portHAS_ARMV8M_MAIN_EXTENSION    0
+#define portDONT_DISCARD                 __attribute__( ( used ) )
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+#if ( configTOTAL_MPU_REGIONS == 16 )
+    #error 16 MPU regions are not yet supported for this port.
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    __asm volatile ( " cpsid i " ::: "memory" )
+#define portENABLE_INTERRUPTS()     __asm volatile ( " cpsie i " ::: "memory" )
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c

@@ -1,366 +1,544 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/* Standard includes. */
-#include <stdint.h>
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE ensures that PRIVILEGED_FUNCTION
- * is defined correctly and privileged functions are placed in correct sections. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* Portasm includes. */
-#include "portasm.h"
-
-/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
- * header files. */
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#if( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
-#endif
-
-void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r1]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	bics r3, r4										\n" /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r1]									\n" /* r4 = *r1 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str  r4, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r4, #5										\n" /* r4 = 5. */
-	"	str  r4, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r4, #6										\n" /* r4 = 6. */
-	"	str  r4, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r4, #7										\n" /* r4 = 7. */
-	"	str  r4, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst2							\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	orrs r3, r4										\n" /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r2								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r2}								\n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r2											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
-{
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	tst r0, r1										\n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
-	"	beq running_privileged							\n" /* If the result of previous AND operation was 0, branch. */
-	"	movs r0, #0										\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	bx lr											\n" /* Return. */
-	" running_privileged:								\n"
-	"	movs r0, #1										\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "r1", "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	 __asm volatile
-	(
-	"	mrs  r0, control								\n" /* Read the CONTROL register. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	bics r0, r1										\n" /* Clear the bit 0. */
-	"	msr  control, r0								\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "r1", "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void vResetPrivilege( void ) /* __attribute__ (( naked )) */
-{
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	movs r1, #1										\n" /* r1 = 1. */
-	"	orrs r0, r1										\n" /* r0 = r0 | r1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "r1", "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	mrs r0, PRIMASK									\n"
-	"	cpsid i											\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	msr PRIMASK, r0									\n"
-	"	bx lr											\n"
-	::: "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	mrs r0, psp										\n" /* Read PSP in r0. */
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	#if( configENABLE_MPU == 1 )
-	"	subs r0, r0, #44								\n" /* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r1, psplim									\n" /* r1 = PSPLIM. */
-	"	mrs r2, control									\n" /* r2 = CONTROL. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r0!, {r1-r7}								\n" /* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r0!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	#else /* configENABLE_MPU */
-	"	subs r0, r0, #40								\n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmia r0!, {r2-r7}								\n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
-	"	mov r4, r8										\n" /* r4 = r8. */
-	"	mov r5, r9										\n" /* r5 = r9. */
-	"	mov r6, r10										\n" /* r6 = r10. */
-	"	mov r7, r11										\n" /* r7 = r11. */
-	"	stmia r0!, {r4-r7}								\n" /* Store the high registers that are not saved automatically. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	cpsid i											\n"
-	"	bl vTaskSwitchContext							\n"
-	"	cpsie i											\n"
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r0, [r1]									\n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	bics r3, r4										\n" /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r4, [r1]									\n" /* r4 = *r1 i.e. r4 = MAIR0. */
-	"	ldr  r2, xMAIR0Const							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r4, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	movs r4, #4										\n" /* r4 = 4. */
-	"	str  r4, [r2]									\n" /* Program RNR = 4. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read first set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write first set of RBAR/RLAR registers. */
-	"	movs r4, #5										\n" /* r4 = 5. */
-	"	str  r4, [r2]									\n" /* Program RNR = 5. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read second set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write second set of RBAR/RLAR registers. */
-	"	movs r4, #6										\n" /* r4 = 6. */
-	"	str  r4, [r2]									\n" /* Program RNR = 6. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read third set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write third set of RBAR/RLAR registers. */
-	"	movs r4, #7										\n" /* r4 = 7. */
-	"	str  r4, [r2]									\n" /* Program RNR = 7. */
-	"	ldmia r1!, {r5,r6}								\n" /* Read fourth set of RBAR/RLAR from TCB. */
-	"	ldr  r3, xRBARConst								\n" /* r3 = 0xe000ed9c [Location of RBAR]. */
-	"	stmia r3!, {r5,r6}								\n" /* Write fourth set of RBAR/RLAR registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r3, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	movs r4, #1										\n" /* r4 = 1. */
-	"	orrs r3, r4										\n" /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
-	"	str r3, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	adds r0, r0, #28								\n" /* Move to the high registers. */
-	"	ldmia r0!, {r4-r7}								\n" /* Restore the high registers that are not automatically restored. */
-	"	mov r8, r4										\n" /* r8 = r4. */
-	"	mov r9, r5										\n" /* r9 = r5. */
-	"	mov r10, r6										\n" /* r10 = r6. */
-	"	mov r11, r7										\n" /* r11 = r7. */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	subs r0, r0, #44								\n" /* Move to the starting of the saved context. */
-	"	ldmia r0!, {r1-r7}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
-	"	msr psplim, r1									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r2									\n" /* Restore the CONTROL register value for the task. */
-	"	bx r3											\n"
-	#else /* configENABLE_MPU */
-	"	adds r0, r0, #24								\n" /* Move to the high registers. */
-	"	ldmia r0!, {r4-r7}								\n" /* Restore the high registers that are not automatically restored. */
-	"	mov r8, r4										\n" /* r8 = r4. */
-	"	mov r9, r5										\n" /* r9 = r5. */
-	"	mov r10, r6										\n" /* r10 = r6. */
-	"	mov r11, r7										\n" /* r11 = r7. */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	subs r0, r0, #40								\n" /* Move to the starting of the saved context. */
-	"	ldmia r0!, {r2-r7}								\n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	"	bx r3											\n"
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
-}
-/*-----------------------------------------------------------*/
-
-void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	movs r0, #4										\n"
-	"	mov r1, lr										\n"
-	"	tst r0, r1										\n"
-	"	beq stacking_used_msp							\n"
-	"	mrs r0, psp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	" stacking_used_msp:								\n"
-	"	mrs r0, msp										\n"
-	"	ldr r2, svchandler_address_const				\n"
-	"	bx r2											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
-}
-/*-----------------------------------------------------------*/
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Standard includes. */
+#include <stdint.h>
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE ensures that PRIVILEGED_FUNCTION
+ * is defined correctly and privileged functions are placed in correct sections. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/* Portasm includes. */
+#include "portasm.h"
+
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
+/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
+ * header files. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#endif
+
+#if ( configENABLE_MPU == 1 )
+
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            " .syntax unified                                 \n"
+            "                                                 \n"
+            " program_mpu_first_task:                         \n"
+            "    ldr r3, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
+            "                                                 \n"
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    movs r3, #1                                  \n" /* r3 = 1. */
+            "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "                                                 \n"
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "                                                 \n"
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "                                                 \n"
+            "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
+            "    movs r3, #5                                  \n" /* r3 = 5. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 5. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
+            "    movs r3, #6                                  \n" /* r3 = 6. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 6. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
+            "    movs r3, #7                                  \n" /* r3 = 6. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 7. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
+            "                                                 \n"
+            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    movs r3, #1                                  \n" /* r3 = 1. */
+            "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
+            "    str r2, [r1]                                 \n" /* Enable MPU. */
+            "    dsb                                          \n" /* Force memory writes before continuing. */
+            "                                                 \n"
+            " restore_context_first_task:                     \n"
+            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
+            "                                                 \n"
+            " restore_special_regs_first_task:                \n"
+            "    subs r1, #16                                 \n"
+            "    ldmia r1!, {r2-r5}                           \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
+            "    subs r1, #16                                 \n"
+            "    msr psp, r2                                  \n"
+            #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+                "    msr psplim, r3                           \n"
+            #endif
+            "    msr control, r4                              \n"
+            "    mov lr, r5                                   \n"
+            "                                                 \n"
+            " restore_general_regs_first_task:                \n"
+            "    subs r1, #32                                 \n"
+            "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain half of the hardware saved context. */
+            "    stmia r2!, {r4-r7}                           \n" /* Copy half of the the hardware saved context on the task stack. */
+            "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain rest half of the hardware saved context. */
+            "    stmia r2!, {r4-r7}                           \n" /* Copy rest half of the the hardware saved context on the task stack. */
+            "    subs r1, #48                                 \n"
+            "    ldmia r1!, {r4-r7}                           \n" /* Restore r8-r11. */
+            "    mov r8, r4                                   \n" /* r8 = r4. */
+            "    mov r9, r5                                   \n" /* r9 = r5. */
+            "    mov r10, r6                                  \n" /* r10 = r6. */
+            "    mov r11, r7                                  \n" /* r11 = r7. */
+            "    subs r1, #32                                 \n"
+            "    ldmia r1!, {r4-r7}                           \n" /* Restore r4-r7. */
+            "    subs r1, #16                                 \n"
+            "                                                 \n"
+            " restore_context_done_first_task:                \n"
+            "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    bx lr                                        \n"
+            "                                                 \n"
+            " .align 4                                        \n"
+            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
+            " xMPUCTRLConst2: .word 0xe000ed94                \n"
+            " xMAIR0Const2: .word 0xe000edc0                  \n"
+            " xRNRConst2: .word 0xe000ed98                    \n"
+            " xRBARConst2: .word 0xe000ed9c                   \n"
+        );
+    }
+
+#else /* configENABLE_MPU */
+
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            "   .syntax unified                                 \n"
+            "                                                   \n"
+            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r1, [r2]                                   \n" /* Read pxCurrentTCB. */
+            "   ldr  r0, [r1]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+            "                                                   \n"
+            "   ldm  r0!, {r1-r2}                               \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+            #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+                "   msr  psplim, r1                             \n" /* Set this task's PSPLIM value. */
+            #endif
+            "   movs r1, #2                                     \n" /* r1 = 2. */
+            "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
+            "   adds r0, #32                                    \n" /* Discard everything up to r0. */
+            "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
+            "   isb                                             \n"
+            "   bx   r2                                         \n" /* Finally, branch to EXC_RETURN. */
+            "                                                   \n"
+            "   .align 4                                        \n"
+            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
+        );
+    }
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
+        "   movs r1, #1                                     \n" /* r1 = 1. */
+        "   tst r0, r1                                      \n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
+        "   beq running_privileged                          \n" /* If the result of previous AND operation was 0, branch. */
+        "   movs r0, #0                                     \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "   bx lr                                           \n" /* Return. */
+        " running_privileged:                               \n"
+        "   movs r0, #1                                     \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "   bx lr                                           \n" /* Return. */
+        "                                                   \n"
+        "   .align 4                                        \n"
+        ::: "r0", "r1", "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   mrs  r0, control                                \n" /* Read the CONTROL register. */
+        "   movs r1, #1                                     \n" /* r1 = 1. */
+        "   bics r0, r1                                     \n" /* Clear the bit 0. */
+        "   msr  control, r0                                \n" /* Write back the new CONTROL value. */
+        "   bx lr                                           \n" /* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vResetPrivilege( void ) /* __attribute__ (( naked )) */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
+        "   movs r1, #1                                     \n" /* r1 = 1. */
+        "   orrs r0, r1                                     \n" /* r0 = r0 | r1. */
+        "   msr control, r0                                 \n" /* CONTROL = r0. */
+        "   bx lr                                           \n" /* Return to the caller. */
+        ::: "r0", "r1", "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
+        "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
+        "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
+        "   cpsie i                                         \n" /* Globally enable interrupts. */
+        "   dsb                                             \n"
+        "   isb                                             \n"
+        "   svc %0                                          \n" /* System call to start the first task. */
+        "   nop                                             \n"
+        "                                                   \n"
+        "   .align 4                                        \n"
+        "xVTORConst: .word 0xe000ed08                       \n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   mrs r0, PRIMASK                                 \n"
+        "   cpsid i                                         \n"
+        "   bx lr                                           \n"
+        ::: "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   msr PRIMASK, r0                                 \n"
+        "   bx lr                                           \n"
+        ::: "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            " .syntax unified                                 \n"
+            "                                                 \n"
+            " ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r0, [r2]                                    \n" /* r0 = pxCurrentTCB. */
+            " ldr r1, [r0]                                    \n" /* r1 = Location in TCB where the context should be saved. */
+            " mrs r2, psp                                     \n" /* r2 = PSP. */
+            "                                                 \n"
+            " save_general_regs:                              \n"
+            "    stmia r1!, {r4-r7}                           \n" /* Store r4-r7. */
+            "    mov r4, r8                                   \n" /* r4 = r8. */
+            "    mov r5, r9                                   \n" /* r5 = r9. */
+            "    mov r6, r10                                  \n" /* r6 = r10. */
+            "    mov r7, r11                                  \n" /* r7 = r11. */
+            "    stmia r1!, {r4-r7}                           \n" /* Store r8-r11. */
+            "    ldmia r2!, {r4-r7}                           \n" /* Copy half of the  hardware saved context into r4-r7. */
+            "    stmia r1!, {r4-r7}                           \n" /* Store the hardware saved context. */
+            "    ldmia r2!, {r4-r7}                           \n" /* Copy rest half of the  hardware saved context into r4-r7. */
+            "    stmia r1!, {r4-r7}                           \n" /* Store the hardware saved context. */
+            "                                                 \n"
+            " save_special_regs:                              \n"
+            "    mrs r2, psp                                  \n" /* r2 = PSP. */
+            #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+                "    mrs r3, psplim                           \n" /* r3 = PSPLIM. */
+            #else
+                "    movs r3, #0                              \n" /* r3 = 0. 0 is stored in the PSPLIM slot. */
+            #endif
+            "    mrs r4, control                              \n" /* r4 = CONTROL. */
+            "    mov r5, lr                                   \n" /* r5 = LR. */
+            "    stmia r1!, {r2-r5}                           \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+            "    str r1, [r0]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
+            "                                                 \n"
+            " select_next_task:                               \n"
+            "    cpsid i                                      \n"
+            "    bl vTaskSwitchContext                        \n"
+            "    cpsie i                                      \n"
+            "                                                 \n"
+            " program_mpu:                                    \n"
+            "    ldr r3, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r0, [r3]                                 \n" /* r0 = pxCurrentTCB.*/
+            "                                                 \n"
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    movs r3, #1                                  \n" /* r3 = 1. */
+            "    bics r2, r3                                  \n" /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "                                                 \n"
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "                                                 \n"
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "                                                 \n"
+            "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read first set of RBAR/RLAR registers from TCB. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write first set of RBAR/RLAR registers. */
+            "    movs r3, #5                                  \n" /* r3 = 5. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 5. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read second set of RBAR/RLAR registers from TCB. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write second set of RBAR/RLAR registers. */
+            "    movs r3, #6                                  \n" /* r3 = 6. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 6. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read third set of RBAR/RLAR registers from TCB. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write third set of RBAR/RLAR registers. */
+            "    movs r3, #7                                  \n" /* r3 = 6. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 7. */
+            "    ldmia r0!, {r4-r5}                           \n" /* Read fourth set of RBAR/RLAR registers from TCB. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "    stmia r2!, {r4-r5}                           \n" /* Write fourth set of RBAR/RLAR registers. */
+            "                                                 \n"
+            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    movs r3, #1                                  \n" /* r3 = 1. */
+            "    orrs r2, r3                                  \n" /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
+            "    str r2, [r1]                                 \n" /* Enable MPU. */
+            "    dsb                                          \n" /* Force memory writes before continuing. */
+            "                                                 \n"
+            " restore_context:                                \n"
+            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
+            "                                                 \n"
+            " restore_special_regs:                           \n"
+            "    subs r1, #16                                 \n"
+            "    ldmia r1!, {r2-r5}                           \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
+            "    subs r1, #16                                 \n"
+            "    msr psp, r2                                  \n"
+            #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+                "    msr psplim, r3                           \n"
+            #endif
+            "    msr control, r4                              \n"
+            "    mov lr, r5                                   \n"
+            "                                                 \n"
+            " restore_general_regs:                           \n"
+            "    subs r1, #32                                 \n"
+            "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain half of the hardware saved context. */
+            "    stmia r2!, {r4-r7}                           \n" /* Copy half of the the hardware saved context on the task stack. */
+            "    ldmia r1!, {r4-r7}                           \n" /* r4-r7 contain rest half of the hardware saved context. */
+            "    stmia r2!, {r4-r7}                           \n" /* Copy rest half of the the hardware saved context on the task stack. */
+            "    subs r1, #48                                 \n"
+            "    ldmia r1!, {r4-r7}                           \n" /* Restore r8-r11. */
+            "    mov r8, r4                                   \n" /* r8 = r4. */
+            "    mov r9, r5                                   \n" /* r9 = r5. */
+            "    mov r10, r6                                  \n" /* r10 = r6. */
+            "    mov r11, r7                                  \n" /* r11 = r7. */
+            "    subs r1, #32                                 \n"
+            "    ldmia r1!, {r4-r7}                           \n" /* Restore r4-r7. */
+            "    subs r1, #16                                 \n"
+            "                                                 \n"
+            " restore_context_done:                           \n"
+            "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    bx lr                                        \n"
+            "                                                 \n"
+            " .align 4                                        \n"
+            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
+            " xMPUCTRLConst: .word 0xe000ed94                 \n"
+            " xMAIR0Const: .word 0xe000edc0                   \n"
+            " xRNRConst: .word 0xe000ed98                     \n"
+            " xRBARConst: .word 0xe000ed9c                    \n"
+        );
+    }
+
+#else /* configENABLE_MPU */
+
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            "   .syntax unified                                 \n"
+            "                                                   \n"
+            "   mrs r0, psp                                     \n" /* Read PSP in r0. */
+            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
+            "   subs r0, r0, #40                                \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */
+            "   str r0, [r1]                                    \n" /* Save the new top of stack in TCB. */
+            #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+                "   mrs r2, psplim                              \n" /* r2 = PSPLIM. */
+            #else
+                "   movs r2, #0                                 \n" /* r2 = 0. 0 is stored in the PSPLIM slot. */
+            #endif
+            "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
+            "   stmia r0!, {r2-r7}                              \n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
+            "   mov r4, r8                                      \n" /* r4 = r8. */
+            "   mov r5, r9                                      \n" /* r5 = r9. */
+            "   mov r6, r10                                     \n" /* r6 = r10. */
+            "   mov r7, r11                                     \n" /* r7 = r11. */
+            "   stmia r0!, {r4-r7}                              \n" /* Store the high registers that are not saved automatically. */
+            "                                                   \n"
+            "   cpsid i                                         \n"
+            "   bl vTaskSwitchContext                           \n"
+            "   cpsie i                                         \n"
+            "                                                   \n"
+            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
+            "   ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+            "                                                   \n"
+            "   adds r0, r0, #24                                \n" /* Move to the high registers. */
+            "   ldmia r0!, {r4-r7}                              \n" /* Restore the high registers that are not automatically restored. */
+            "   mov r8, r4                                      \n" /* r8 = r4. */
+            "   mov r9, r5                                      \n" /* r9 = r5. */
+            "   mov r10, r6                                     \n" /* r10 = r6. */
+            "   mov r11, r7                                     \n" /* r11 = r7. */
+            "   msr psp, r0                                     \n" /* Remember the new top of stack for the task. */
+            "   subs r0, r0, #40                                \n" /* Move to the starting of the saved context. */
+            "   ldmia r0!, {r2-r7}                              \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
+            #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+                "   msr psplim, r2                              \n" /* Restore the PSPLIM register value for the task. */
+            #endif
+            "   bx r3                                           \n"
+            "                                                   \n"
+            "   .align 4                                        \n"
+            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
+        );
+    }
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            ".syntax unified                \n"
+            ".extern vPortSVCHandler_C      \n"
+            ".extern vSystemCallEnter       \n"
+            ".extern vSystemCallExit        \n"
+            "                               \n"
+            "movs r0, #4                    \n"
+            "mov r1, lr                     \n"
+            "tst r0, r1                     \n"
+            "beq stack_on_msp               \n"
+            "stack_on_psp:                  \n"
+            "    mrs r0, psp                \n"
+            "    b route_svc                \n"
+            "stack_on_msp:                  \n"
+            "    mrs r0, msp                \n"
+            "    b route_svc                \n"
+            "                               \n"
+            "route_svc:                     \n"
+            "    ldr r3, [r0, #24]          \n"
+            "    subs r3, #2                \n"
+            "    ldrb r2, [r3, #0]          \n"
+            "    cmp r2, %0                 \n"
+            "    blt system_call_enter      \n"
+            "    cmp r2, %1                 \n"
+            "    beq system_call_exit       \n"
+            "    b vPortSVCHandler_C        \n"
+            "                               \n"
+            "system_call_enter:             \n"
+            "    b vSystemCallEnter         \n"
+            "system_call_exit:              \n"
+            "    b vSystemCallExit          \n"
+            "                               \n"
+            : /* No outputs. */
+            : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
+            : "r0", "r1", "r2", "r3", "memory"
+        );
+    }
+
+#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            "   .syntax unified                                 \n"
+            "                                                   \n"
+            "   movs r0, #4                                     \n"
+            "   mov r1, lr                                      \n"
+            "   tst r0, r1                                      \n"
+            "   beq stacking_used_msp                           \n"
+            "   mrs r0, psp                                     \n"
+            "   ldr r2, svchandler_address_const                \n"
+            "   bx r2                                           \n"
+            " stacking_used_msp:                                \n"
+            "   mrs r0, msp                                     \n"
+            "   ldr r2, svchandler_address_const                \n"
+            "   bx r2                                           \n"
+            "                                                   \n"
+            "   .align 4                                        \n"
+            "svchandler_address_const: .word vPortSVCHandler_C  \n"
+        );
+    }
+
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+/*-----------------------------------------------------------*/

portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h

@@ -1,301 +1,78 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*------------------------------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the given hardware
- * and compiler.
- *
- * These settings should not be altered.
- *------------------------------------------------------------------------------
- */
-
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
-
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
-
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
-
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Type definitions.
- */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
-
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * Architecture specifics.
- */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Extern declarations.
- */
-extern BaseType_t xPortIsInsideInterrupt( void );
-
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
-
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
-
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief MPU specific constants.
- */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
-
-
-/* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
-
-/* Device memory attributes used in MPU_MAIR registers.
- *
- * 8-bit values encoded as follows:
- *  Bit[7:4] - 0000 - Device Memory
- *  Bit[3:2] - 00 --> Device-nGnRnE
- *				01 --> Device-nGnRE
- *				10 --> Device-nGRE
- *				11 --> Device-GRE
- *  Bit[1:0] - 00, Reserved.
- */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
-
-/* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
-
-/* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
-
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
-
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Settings to define an MPU region.
- */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
-
-/**
- * @brief MPU settings as stored in the TCB.
- */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief SVC numbers.
- */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Scheduler utilities.
- */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Critical section management.
- */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Task function macros as described on the FreeRTOS.org WEB site.
- */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
-
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
-
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
-
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Barriers.
- */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
-/*-----------------------------------------------------------*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M23"
+#define portHAS_ARMV8M_MAIN_EXTENSION    0
+#define portDONT_DISCARD                 __attribute__( ( used ) )
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+#if ( configTOTAL_MPU_REGIONS == 16 )
+    #error 16 MPU regions are not yet supported for this port.
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    __asm volatile ( " cpsid i " ::: "memory" )
+#define portENABLE_INTERRUPTS()     __asm volatile ( " cpsie i " ::: "memory" )
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portmacro.h

@@ -1,301 +1,73 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*------------------------------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the given hardware
- * and compiler.
- *
- * These settings should not be altered.
- *------------------------------------------------------------------------------
- */
-
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
-
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
-
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
-
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Type definitions.
- */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
-
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * Architecture specifics.
- */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Extern declarations.
- */
-extern BaseType_t xPortIsInsideInterrupt( void );
-
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
-
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
-
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief MPU specific constants.
- */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
-
-
-/* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
-
-/* Device memory attributes used in MPU_MAIR registers.
- *
- * 8-bit values encoded as follows:
- *  Bit[7:4] - 0000 - Device Memory
- *  Bit[3:2] - 00 --> Device-nGnRnE
- *				01 --> Device-nGnRE
- *				10 --> Device-nGRE
- *				11 --> Device-GRE
- *  Bit[1:0] - 00, Reserved.
- */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
-
-/* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
-
-/* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
-
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
-
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Settings to define an MPU region.
- */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
-
-/**
- * @brief MPU settings as stored in the TCB.
- */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief SVC numbers.
- */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Scheduler utilities.
- */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Critical section management.
- */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x )				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Task function macros as described on the FreeRTOS.org WEB site.
- */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
-
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
-
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
-
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Barriers.
- */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
-/*-----------------------------------------------------------*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M33"
+#define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portDONT_DISCARD                 __attribute__( ( used ) )
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    ulSetInterruptMask()
+#define portENABLE_INTERRUPTS()     vClearInterruptMask( 0 )
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c

@@ -1,316 +1,499 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-/* Standard includes. */
-#include <stdint.h>
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE ensures that PRIVILEGED_FUNCTION
- * is defined correctly and privileged functions are placed in correct sections. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* Portasm includes. */
-#include "portasm.h"
-
-/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
- * header files. */
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	ldr  r2, pxCurrentTCBConst2						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr  r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr  r0, [r1]									\n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr  r3, [r1]									\n" /* r3 = *r1 i.e. r3 = MAIR0. */
-	"	ldr  r2, xMAIR0Const2							\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str  r3, [r2]									\n" /* Program MAIR0. */
-	"	ldr  r2, xRNRConst2								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r3, #4										\n" /* r3 = 4. */
-	"	str  r3, [r2]									\n" /* Program RNR = 4. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	ldr  r2, xRBARConst2							\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r1!, {r4-r11}								\n" /* Read 4 set of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst2							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldm  r0!, {r1-r3}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	msr  control, r2								\n" /* Set this task's CONTROL value. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
-	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r2}								\n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
-	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
-	"	isb												\n"
-	"	bx   r2											\n" /* Finally, branch to EXC_RETURN. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst2: .word 0xe000ed94					\n"
-	"xMAIR0Const2: .word 0xe000edc0						\n"
-	"xRNRConst2: .word 0xe000ed98						\n"
-	"xRBARConst2: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	);
-}
-/*-----------------------------------------------------------*/
-
-BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
-{
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	tst r0, #1										\n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	"	ite ne											\n"
-	"	movne r0, #0									\n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	"	moveq r0, #1									\n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-	"	bx lr											\n" /* Return. */
-	"													\n"
-	"	.align 4										\n"
-	::: "r0", "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	 __asm volatile
-	(
-	"	mrs  r0, control								\n" /* Read the CONTROL register. */
-	"	bic r0, #1										\n" /* Clear the bit 0. */
-	"	msr  control, r0								\n" /* Write back the new CONTROL value. */
-	"	bx lr											\n" /* Return to the caller. */
-	::: "r0", "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void vResetPrivilege( void ) /* __attribute__ (( naked )) */
-{
-	__asm volatile
-	(
-	"	mrs r0, control									\n" /* r0 = CONTROL. */
-	"	orr r0, #1										\n" /* r0 = r0 | 1. */
-	"	msr control, r0									\n" /* CONTROL = r0. */
-	"	bx lr											\n" /* Return to the caller. */
-	:::"r0", "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	ldr r0, xVTORConst								\n" /* Use the NVIC offset register to locate the stack. */
-	"	ldr r0, [r0]									\n" /* Read the VTOR register which gives the address of vector table. */
-	"	ldr r0, [r0]									\n" /* The first entry in vector table is stack pointer. */
-	"	msr msp, r0										\n" /* Set the MSP back to the start of the stack. */
-	"	cpsie i											\n" /* Globally enable interrupts. */
-	"	cpsie f											\n"
-	"	dsb												\n"
-	"	isb												\n"
-	"	svc %0											\n" /* System call to start the first task. */
-	"	nop												\n"
-	"													\n"
-	"   .align 4										\n"
-	"xVTORConst: .word 0xe000ed08						\n"
-	:: "i" ( portSVC_START_SCHEDULER ) : "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	mrs r0, basepri									\n" /* r0 = basepri. Return original basepri value. */
-	"	mov r1, %0										\n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	msr basepri, r1									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	:: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	msr basepri, r0									\n" /* basepri = ulMask. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bx lr											\n" /* Return. */
-	::: "memory"
-	);
-}
-/*-----------------------------------------------------------*/
-
-void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	.syntax unified									\n"
-	"													\n"
-	"	mrs r0, psp										\n" /* Read PSP in r0. */
-	#if( configENABLE_FPU == 1 )
-	"	tst lr, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vstmdbeq r0!, {s16-s31}							\n" /* Store the FPU registers which are not saved automatically. */
-	#endif /* configENABLE_FPU */
-	#if( configENABLE_MPU == 1 )
-	"	mrs r1, psplim									\n" /* r1 = PSPLIM. */
-	"	mrs r2, control									\n" /* r2 = CONTROL. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmdb r0!, {r1-r11}								\n" /* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */
-	#else /* configENABLE_MPU */
-	"	mrs r2, psplim									\n" /* r2 = PSPLIM. */
-	"	mov r3, lr										\n" /* r3 = LR/EXC_RETURN. */
-	"	stmdb r0!, {r2-r11}								\n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	str r0, [r1]									\n" /* Save the new top of stack in TCB. */
-	"													\n"
-	"	mov r0, %0										\n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
-	"	msr basepri, r0									\n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	"	dsb												\n"
-	"	isb												\n"
-	"	bl vTaskSwitchContext							\n"
-	"	mov r0, #0										\n" /* r0 = 0. */
-	"	msr basepri, r0									\n" /* Enable interrupts. */
-	"													\n"
-	"	ldr r2, pxCurrentTCBConst						\n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	"	ldr r1, [r2]									\n" /* Read pxCurrentTCB. */
-	"	ldr r0, [r1]									\n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	dmb												\n" /* Complete outstanding transfers before disabling MPU. */
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	bic r4, #1										\n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Disable MPU. */
-	"													\n"
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	"	ldr r3, [r1]									\n" /* r3 = *r1 i.e. r3 = MAIR0. */
-	"	ldr r2, xMAIR0Const								\n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
-	"	str r3, [r2]									\n" /* Program MAIR0. */
-	"	ldr r2, xRNRConst								\n" /* r2 = 0xe000ed98 [Location of RNR]. */
-	"	movs r3, #4										\n" /* r3 = 4. */
-	"	str r3, [r2]									\n" /* Program RNR = 4. */
-	"	adds r1, #4										\n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	"	ldr r2, xRBARConst								\n" /* r2 = 0xe000ed9c [Location of RBAR]. */
-	"	ldmia r1!, {r4-r11}								\n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
-	"	stmia r2!, {r4-r11}								\n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
-	"													\n"
-	"	ldr r2, xMPUCTRLConst							\n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	"	ldr r4, [r2]									\n" /* Read the value of MPU_CTRL. */
-	"	orr r4, #1										\n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	"	str r4, [r2]									\n" /* Enable MPU. */
-	"	dsb												\n" /* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	ldmia r0!, {r1-r11}								\n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */
-	#else /* configENABLE_MPU */
-	"	ldmia r0!, {r2-r11}								\n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
-	#endif /* configENABLE_MPU */
-	"													\n"
-	#if( configENABLE_FPU == 1 )
-	"	tst r3, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-	"	it eq											\n"
-	"	vldmiaeq r0!, {s16-s31}							\n" /* Restore the FPU registers which are not restored automatically. */
-	#endif /* configENABLE_FPU */
-	"													\n"
-	#if( configENABLE_MPU == 1 )
-	"	msr psplim, r1									\n" /* Restore the PSPLIM register value for the task. */
-	"	msr control, r2									\n" /* Restore the CONTROL register value for the task. */
-	#else /* configENABLE_MPU */
-	"	msr psplim, r2									\n" /* Restore the PSPLIM register value for the task. */
-	#endif /* configENABLE_MPU */
-	"	msr psp, r0										\n" /* Remember the new top of stack for the task. */
-	"	bx r3											\n"
-	"													\n"
-	"	.align 4										\n"
-	"pxCurrentTCBConst: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
-	"xMPUCTRLConst: .word 0xe000ed94					\n"
-	"xMAIR0Const: .word 0xe000edc0						\n"
-	"xRNRConst: .word 0xe000ed98						\n"
-	"xRBARConst: .word 0xe000ed9c						\n"
-	#endif /* configENABLE_MPU */
-	:: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY )
-	);
-}
-/*-----------------------------------------------------------*/
-
-void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
-{
-	__asm volatile
-	(
-	"	tst lr, #4										\n"
-	"	ite eq											\n"
-	"	mrseq r0, msp									\n"
-	"	mrsne r0, psp									\n"
-	"	ldr r1, svchandler_address_const				\n"
-	"	bx r1											\n"
-	"													\n"
-	"	.align 4										\n"
-	"svchandler_address_const: .word vPortSVCHandler_C	\n"
-	);
-}
-/*-----------------------------------------------------------*/
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Standard includes. */
+#include <stdint.h>
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE ensures that PRIVILEGED_FUNCTION
+ * is defined correctly and privileged functions are placed in correct sections. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/* Portasm includes. */
+#include "portasm.h"
+
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
+/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE is needed to be defined only for the
+ * header files. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#if ( configENABLE_MPU == 1 )
+
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            " .syntax unified                                 \n"
+            "                                                 \n"
+            " program_mpu_first_task:                         \n"
+            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB. */
+            "                                                 \n"
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    ldr r1, xMPUCTRLConst2                       \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "                                                 \n"
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r2, xMAIR0Const2                         \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "                                                 \n"
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    ldr r1, xRNRConst2                           \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r2, xRBARConst2                          \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "                                                 \n"
+            "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "                                                 \n"
+            #if ( configTOTAL_MPU_REGIONS == 16 )
+                "    movs r3, #8                                  \n" /* r3 = 8. */
+                "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+                "    movs r3, #12                                 \n" /* r3 = 12. */
+                "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            #endif /* configTOTAL_MPU_REGIONS == 16 */
+            "                                                 \n"
+            "   ldr r1, xMPUCTRLConst2                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
+            "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
+            "   str r2, [r1]                                  \n" /* Enable MPU. */
+            "   dsb                                           \n" /* Force memory writes before continuing. */
+            "                                                 \n"
+            " restore_context_first_task:                     \n"
+            "    ldr r2, pxCurrentTCBConst2                   \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
+            "                                                 \n"
+            " restore_special_regs_first_task:                \n"
+            "    ldmdb r1!, {r2-r4, lr}                       \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
+            "    msr psp, r2                                  \n"
+            "    msr psplim, r3                               \n"
+            "    msr control, r4                              \n"
+            "                                                 \n"
+            " restore_general_regs_first_task:                \n"
+            "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
+            "    stmia r2!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
+            "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 restored. */
+            "                                                 \n"
+            " restore_context_done_first_task:                \n"
+            "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    mov r0, #0                                   \n"
+            "    msr basepri, r0                              \n" /* Ensure that interrupts are enabled when the first task starts. */
+            "    bx lr                                        \n"
+            "                                                 \n"
+            " .align 4                                        \n"
+            " pxCurrentTCBConst2: .word pxCurrentTCB          \n"
+            " xMPUCTRLConst2: .word 0xe000ed94                \n"
+            " xMAIR0Const2: .word 0xe000edc0                  \n"
+            " xRNRConst2: .word 0xe000ed98                    \n"
+            " xRBARConst2: .word 0xe000ed9c                   \n"
+        );
+    }
+
+#else /* configENABLE_MPU */
+
+    void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            "   .syntax unified                                 \n"
+            "                                                   \n"
+            "   ldr  r2, pxCurrentTCBConst2                     \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr  r1, [r2]                                   \n" /* Read pxCurrentTCB. */
+            "   ldr  r0, [r1]                                   \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+            "                                                   \n"
+            "   ldm  r0!, {r1-r2}                               \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+            "   msr  psplim, r1                                 \n" /* Set this task's PSPLIM value. */
+            "   movs r1, #2                                     \n" /* r1 = 2. */
+            "   msr  CONTROL, r1                                \n" /* Switch to use PSP in the thread mode. */
+            "   adds r0, #32                                    \n" /* Discard everything up to r0. */
+            "   msr  psp, r0                                    \n" /* This is now the new top of stack to use in the task. */
+            "   isb                                             \n"
+            "   mov  r0, #0                                     \n"
+            "   msr  basepri, r0                                \n" /* Ensure that interrupts are enabled when the first task starts. */
+            "   bx   r2                                         \n" /* Finally, branch to EXC_RETURN. */
+            "                                                   \n"
+            "   .align 4                                        \n"
+            "pxCurrentTCBConst2: .word pxCurrentTCB             \n"
+        );
+    }
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
+        "   tst r0, #1                                      \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+        "   ite ne                                          \n"
+        "   movne r0, #0                                    \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+        "   moveq r0, #1                                    \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        "   bx lr                                           \n" /* Return. */
+        "                                                   \n"
+        "   .align 4                                        \n"
+        ::: "r0", "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   mrs  r0, control                                \n" /* Read the CONTROL register. */
+        "   bic r0, #1                                      \n" /* Clear the bit 0. */
+        "   msr  control, r0                                \n" /* Write back the new CONTROL value. */
+        "   bx lr                                           \n" /* Return to the caller. */
+        ::: "r0", "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vResetPrivilege( void ) /* __attribute__ (( naked )) */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   mrs r0, control                                 \n" /* r0 = CONTROL. */
+        "   orr r0, #1                                      \n" /* r0 = r0 | 1. */
+        "   msr control, r0                                 \n" /* CONTROL = r0. */
+        "   bx lr                                           \n" /* Return to the caller. */
+        ::: "r0", "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   ldr r0, xVTORConst                              \n" /* Use the NVIC offset register to locate the stack. */
+        "   ldr r0, [r0]                                    \n" /* Read the VTOR register which gives the address of vector table. */
+        "   ldr r0, [r0]                                    \n" /* The first entry in vector table is stack pointer. */
+        "   msr msp, r0                                     \n" /* Set the MSP back to the start of the stack. */
+        "   cpsie i                                         \n" /* Globally enable interrupts. */
+        "   cpsie f                                         \n"
+        "   dsb                                             \n"
+        "   isb                                             \n"
+        "   svc %0                                          \n" /* System call to start the first task. */
+        "   nop                                             \n"
+        "                                                   \n"
+        "   .align 4                                        \n"
+        "xVTORConst: .word 0xe000ed08                       \n"
+        ::"i" ( portSVC_START_SCHEDULER ) : "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   mrs r0, basepri                                 \n" /* r0 = basepri. Return original basepri value. */
+        "   mov r1, %0                                      \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "   msr basepri, r1                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        "   dsb                                             \n"
+        "   isb                                             \n"
+        "   bx lr                                           \n" /* Return. */
+        ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
+{
+    __asm volatile
+    (
+        "   .syntax unified                                 \n"
+        "                                                   \n"
+        "   msr basepri, r0                                 \n" /* basepri = ulMask. */
+        "   dsb                                             \n"
+        "   isb                                             \n"
+        "   bx lr                                           \n" /* Return. */
+        ::: "memory"
+    );
+}
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            " .syntax unified                                 \n"
+            "                                                 \n"
+            " ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            " ldr r0, [r2]                                    \n" /* r0 = pxCurrentTCB. */
+            " ldr r1, [r0]                                    \n" /* r1 = Location in TCB where the context should be saved. */
+            " mrs r2, psp                                     \n" /* r2 = PSP. */
+            "                                                 \n"
+            " save_general_regs:                              \n"
+            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+                "    add r2, r2, #0x20                            \n" /* Move r2 to location where s0 is saved. */
+                "    tst lr, #0x10                                \n"
+                "    ittt eq                                      \n"
+                "    vstmiaeq r1!, {s16-s31}                      \n" /* Store s16-s31. */
+                "    vldmiaeq r2, {s0-s16}                        \n" /* Copy hardware saved FP context into s0-s16. */
+                "    vstmiaeq r1!, {s0-s16}                       \n" /* Store hardware saved FP context. */
+                "    sub r2, r2, #0x20                            \n" /* Set r2 back to the location of hardware saved context. */
+            #endif /* configENABLE_FPU || configENABLE_MVE */
+            "                                                 \n"
+            "    stmia r1!, {r4-r11}                          \n" /* Store r4-r11. */
+            "    ldmia r2, {r4-r11}                           \n" /* Copy the hardware saved context into r4-r11. */
+            "    stmia r1!, {r4-r11}                          \n" /* Store the hardware saved context. */
+            "                                                 \n"
+            " save_special_regs:                              \n"
+            "    mrs r3, psplim                               \n" /* r3 = PSPLIM. */
+            "    mrs r4, control                              \n" /* r4 = CONTROL. */
+            "    stmia r1!, {r2-r4, lr}                       \n" /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+            "    str r1, [r0]                                 \n" /* Save the location from where the context should be restored as the first member of TCB. */
+            "                                                 \n"
+            " select_next_task:                               \n"
+            "    mov r0, %0                                   \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+            "    msr basepri, r0                              \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "    dsb                                          \n"
+            "    isb                                          \n"
+            "    bl vTaskSwitchContext                        \n"
+            "    mov r0, #0                                   \n" /* r0 = 0. */
+            "    msr basepri, r0                              \n" /* Enable interrupts. */
+            "                                                 \n"
+            " program_mpu:                                    \n"
+            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB. */
+            "                                                 \n"
+            "    dmb                                          \n" /* Complete outstanding transfers before disabling MPU. */
+            "    ldr r1, xMPUCTRLConst                        \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "    ldr r2, [r1]                                 \n" /* Read the value of MPU_CTRL. */
+            "    bic r2, #1                                   \n" /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
+            "    str r2, [r1]                                 \n" /* Disable MPU. */
+            "                                                 \n"
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+            "    ldr r1, [r0]                                 \n" /* r1 = *r0 i.e. r1 = MAIR0. */
+            "    ldr r2, xMAIR0Const                          \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */
+            "    str r1, [r2]                                 \n" /* Program MAIR0. */
+            "                                                 \n"
+            "    adds r0, #4                                  \n" /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+            "    ldr r1, xRNRConst                            \n" /* r1 = 0xe000ed98 [Location of RNR]. */
+            "    ldr r2, xRBARConst                           \n" /* r2 = 0xe000ed9c [Location of RBAR]. */
+            "                                                 \n"
+            "    movs r3, #4                                  \n" /* r3 = 4. */
+            "    str r3, [r1]                                 \n" /* Program RNR = 4. */
+            "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+            "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            "                                                 \n"
+            #if ( configTOTAL_MPU_REGIONS == 16 )
+                "    movs r3, #8                                  \n" /* r3 = 8. */
+                "    str r3, [r1]                                 \n" /* Program RNR = 8. */
+                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+                "    movs r3, #12                                 \n" /* r3 = 12. */
+                "    str r3, [r1]                                 \n" /* Program RNR = 12. */
+                "    ldmia r0!, {r4-r11}                          \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
+                "    stmia r2, {r4-r11}                           \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
+            #endif /* configTOTAL_MPU_REGIONS == 16 */
+            "                                                 \n"
+            "   ldr r1, xMPUCTRLConst                         \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+            "   ldr r2, [r1]                                  \n" /* Read the value of MPU_CTRL. */
+            "   orr r2, #1                                    \n" /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
+            "   str r2, [r1]                                  \n" /* Enable MPU. */
+            "   dsb                                           \n" /* Force memory writes before continuing. */
+            "                                                 \n"
+            " restore_context:                                \n"
+            "    ldr r2, pxCurrentTCBConst                    \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "    ldr r0, [r2]                                 \n" /* r0 = pxCurrentTCB.*/
+            "    ldr r1, [r0]                                 \n" /* r1 = Location of saved context in TCB. */
+            "                                                 \n"
+            " restore_special_regs:                           \n"
+            "    ldmdb r1!, {r2-r4, lr}                       \n" /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, LR restored. */
+            "    msr psp, r2                                  \n"
+            "    msr psplim, r3                               \n"
+            "    msr control, r4                              \n"
+            "                                                 \n"
+            " restore_general_regs:                           \n"
+            "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 contain hardware saved context. */
+            "    stmia r2!, {r4-r11}                          \n" /* Copy the hardware saved context on the task stack. */
+            "    ldmdb r1!, {r4-r11}                          \n" /* r4-r11 restored. */
+            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+                "    tst lr, #0x10                                \n"
+                "    ittt eq                                      \n"
+                "    vldmdbeq r1!, {s0-s16}                       \n" /* s0-s16 contain hardware saved FP context. */
+                "    vstmiaeq r2!, {s0-s16}                       \n" /* Copy hardware saved FP context on the task stack. */
+                "    vldmdbeq r1!, {s16-s31}                      \n" /* Restore s16-s31. */
+            #endif /* configENABLE_FPU || configENABLE_MVE */
+            "                                                 \n"
+            " restore_context_done:                           \n"
+            "    str r1, [r0]                                 \n" /* Save the location where the context should be saved next as the first member of TCB. */
+            "    bx lr                                        \n"
+            "                                                 \n"
+            " .align 4                                        \n"
+            " pxCurrentTCBConst: .word pxCurrentTCB           \n"
+            " xMPUCTRLConst: .word 0xe000ed94                 \n"
+            " xMAIR0Const: .word 0xe000edc0                   \n"
+            " xRNRConst: .word 0xe000ed98                     \n"
+            " xRBARConst: .word 0xe000ed9c                    \n"
+            ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+        );
+    }
+
+#else /* configENABLE_MPU */
+
+    void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            "   .syntax unified                                 \n"
+            "                                                   \n"
+            "   mrs r0, psp                                     \n" /* Read PSP in r0. */
+            "                                                   \n"
+            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+                "   tst lr, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+                "   it eq                                           \n"
+                "   vstmdbeq r0!, {s16-s31}                         \n" /* Store the additional FP context registers which are not saved automatically. */
+            #endif /* configENABLE_FPU || configENABLE_MVE */
+            "                                                   \n"
+            "   mrs r2, psplim                                  \n" /* r2 = PSPLIM. */
+            "   mov r3, lr                                      \n" /* r3 = LR/EXC_RETURN. */
+            "   stmdb r0!, {r2-r11}                             \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
+            "                                                   \n"
+            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
+            "   str r0, [r1]                                    \n" /* Save the new top of stack in TCB. */
+            "                                                   \n"
+            "   mov r0, %0                                      \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
+            "   msr basepri, r0                                 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+            "   dsb                                             \n"
+            "   isb                                             \n"
+            "   bl vTaskSwitchContext                           \n"
+            "   mov r0, #0                                      \n" /* r0 = 0. */
+            "   msr basepri, r0                                 \n" /* Enable interrupts. */
+            "                                                   \n"
+            "   ldr r2, pxCurrentTCBConst                       \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+            "   ldr r1, [r2]                                    \n" /* Read pxCurrentTCB. */
+            "   ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+            "                                                   \n"
+            "   ldmia r0!, {r2-r11}                             \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
+            "                                                   \n"
+            #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+                "   tst r3, #0x10                                   \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+                "   it eq                                           \n"
+                "   vldmiaeq r0!, {s16-s31}                         \n" /* Restore the additional FP context registers which are not restored automatically. */
+            #endif /* configENABLE_FPU || configENABLE_MVE */
+            "                                                   \n"
+            "   msr psplim, r2                                  \n" /* Restore the PSPLIM register value for the task. */
+            "   msr psp, r0                                     \n" /* Remember the new top of stack for the task. */
+            "   bx r3                                           \n"
+            "                                                   \n"
+            "   .align 4                                        \n"
+            "pxCurrentTCBConst: .word pxCurrentTCB              \n"
+            ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
+        );
+    }
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            ".syntax unified                \n"
+            ".extern vPortSVCHandler_C      \n"
+            ".extern vSystemCallEnter       \n"
+            ".extern vSystemCallExit        \n"
+            "                               \n"
+            "tst lr, #4                     \n"
+            "ite eq                         \n"
+            "mrseq r0, msp                  \n"
+            "mrsne r0, psp                  \n"
+            "                               \n"
+            "ldr r1, [r0, #24]              \n"
+            "ldrb r2, [r1, #-2]             \n"
+            "cmp r2, %0                     \n"
+            "blt syscall_enter              \n"
+            "cmp r2, %1                     \n"
+            "beq syscall_exit               \n"
+            "b vPortSVCHandler_C            \n"
+            "                               \n"
+            "syscall_enter:                 \n"
+            "    mov r1, lr                 \n"
+            "    b vSystemCallEnter         \n"
+            "                               \n"
+            "syscall_exit:                  \n"
+            "    mov r1, lr                 \n"
+            "    b vSystemCallExit          \n"
+            "                               \n"
+            : /* No outputs. */
+            : "i" ( NUM_SYSTEM_CALLS ), "i" ( portSVC_SYSTEM_CALL_EXIT )
+            : "r0", "r1", "r2", "memory"
+        );
+    }
+
+#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+    void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
+    {
+        __asm volatile
+        (
+            "   .syntax unified                                 \n"
+            "                                                   \n"
+            "   tst lr, #4                                      \n"
+            "   ite eq                                          \n"
+            "   mrseq r0, msp                                   \n"
+            "   mrsne r0, psp                                   \n"
+            "   ldr r1, svchandler_address_const                \n"
+            "   bx r1                                           \n"
+            "                                                   \n"
+            "   .align 4                                        \n"
+            "svchandler_address_const: .word vPortSVCHandler_C  \n"
+        );
+    }
+
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+/*-----------------------------------------------------------*/

portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portmacro.h

@@ -1,301 +1,73 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*------------------------------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the given hardware
- * and compiler.
- *
- * These settings should not be altered.
- *------------------------------------------------------------------------------
- */
-
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
-
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
-
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
-
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Type definitions.
- */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
-
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * Architecture specifics.
- */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__attribute__(( used ))
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Extern declarations.
- */
-extern BaseType_t xPortIsInsideInterrupt( void );
-
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
-
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
-
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief MPU specific constants.
- */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
-
-
-/* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
-
-/* Device memory attributes used in MPU_MAIR registers.
- *
- * 8-bit values encoded as follows:
- *  Bit[7:4] - 0000 - Device Memory
- *  Bit[3:2] - 00 --> Device-nGnRnE
- *				01 --> Device-nGnRE
- *				10 --> Device-nGRE
- *				11 --> Device-GRE
- *  Bit[1:0] - 00, Reserved.
- */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
-
-/* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
-
-/* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
-
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
-
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Settings to define an MPU region.
- */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
-
-/**
- * @brief MPU settings as stored in the TCB.
- */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief SVC numbers.
- */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Scheduler utilities.
- */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Critical section management.
- */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Task function macros as described on the FreeRTOS.org WEB site.
- */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
-
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
-
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
-
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Barriers.
- */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
-/*-----------------------------------------------------------*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M33"
+#define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portDONT_DISCARD                 __attribute__( ( used ) )
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    ulSetInterruptMask()
+#define portENABLE_INTERRUPTS()     vClearInterruptMask( 0 )
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/portmacro.h

@@ -0,0 +1,73 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M35P"
+#define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portDONT_DISCARD                 __attribute__( ( used ) )
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    ulSetInterruptMask()
+#define portENABLE_INTERRUPTS()     vClearInterruptMask( 0 )
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/portmacro.h

@@ -0,0 +1,78 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+#ifndef configENABLE_MVE
+    #error configENABLE_MVE must be defined in FreeRTOSConfig.h. Set configENABLE_MVE to 1 to enable the MVE or 0 to disable the MVE.
+#endif /* configENABLE_MVE */
+/*-----------------------------------------------------------*/
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M55"
+#define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portDONT_DISCARD                 __attribute__( ( used ) )
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    ulSetInterruptMask()
+#define portENABLE_INTERRUPTS()     vClearInterruptMask( 0 )
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/portmacro.h

@@ -0,0 +1,78 @@
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+#ifndef configENABLE_MVE
+    #error configENABLE_MVE must be defined in FreeRTOSConfig.h. Set configENABLE_MVE to 1 to enable the MVE or 0 to disable the MVE.
+#endif /* configENABLE_MVE */
+/*-----------------------------------------------------------*/
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M85"
+#define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portDONT_DISCARD                 __attribute__( ( used ) )
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    ulSetInterruptMask()
+#define portENABLE_INTERRUPTS()     vClearInterruptMask( 0 )
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portasm.s

@@ -1,377 +1,525 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-	EXTERN pxCurrentTCB
-	EXTERN xSecureContext
-	EXTERN vTaskSwitchContext
-	EXTERN vPortSVCHandler_C
-	EXTERN SecureContext_SaveContext
-	EXTERN SecureContext_LoadContext
-
-	PUBLIC xIsPrivileged
-	PUBLIC vResetPrivilege
-	PUBLIC vPortAllocateSecureContext
-	PUBLIC vRestoreContextOfFirstTask
-	PUBLIC vRaisePrivilege
-	PUBLIC vStartFirstTask
-	PUBLIC ulSetInterruptMask
-	PUBLIC vClearInterruptMask
-	PUBLIC PendSV_Handler
-	PUBLIC SVC_Handler
-	PUBLIC vPortFreeSecureContext
-
-#if ( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
-#endif
-/*-----------------------------------------------------------*/
-
-/*---------------- Unprivileged Functions -------------------*/
-
-/*-----------------------------------------------------------*/
-
-	SECTION .text:CODE:NOROOT(2)
-	THUMB
-/*-----------------------------------------------------------*/
-
-xIsPrivileged:
-	mrs r0, control							/* r0 = CONTROL. */
-	movs r1, #1								/* r1 = 1. */
-	tst r0, r1								/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
-	beq running_privileged					/* If the result of previous AND operation was 0, branch. */
-	movs r0, #0								/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	bx lr									/* Return. */
-	running_privileged:
-		movs r0, #1							/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-		bx lr								/* Return. */
-/*-----------------------------------------------------------*/
-
-vResetPrivilege:
-	mrs r0, control							/* r0 = CONTROL. */
-	movs r1, #1								/* r1 = 1. */
-	orrs r0, r1								/* r0 = r0 | r1. */
-	msr control, r0							/* CONTROL = r0. */
-	bx lr									/* Return to the caller. */
-/*-----------------------------------------------------------*/
-
-vPortAllocateSecureContext:
-	svc 0									/* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */
-	bx lr									/* Return. */
-/*-----------------------------------------------------------*/
-
-/*----------------- Privileged Functions --------------------*/
-
-/*-----------------------------------------------------------*/
-
-	SECTION privileged_functions:CODE:NOROOT(2)
-	THUMB
-/*-----------------------------------------------------------*/
-
-vRestoreContextOfFirstTask:
-	ldr  r2, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr  r3, [r2]							/* Read pxCurrentTCB. */
-	ldr  r0, [r3]							/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-
-#if ( configENABLE_MPU == 1 )
-	dmb										/* Complete outstanding transfers before disabling MPU. */
-	ldr r2, =0xe000ed94						/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	ldr r4, [r2]							/* Read the value of MPU_CTRL. */
-	movs r5, #1								/* r5 = 1. */
-	bics r4, r5								/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-	str r4, [r2]							/* Disable MPU. */
-
-	adds r3, #4								/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	ldr  r4, [r3]							/* r4 = *r3 i.e. r4 = MAIR0. */
-	ldr  r2, =0xe000edc0					/* r2 = 0xe000edc0 [Location of MAIR0]. */
-	str  r4, [r2]							/* Program MAIR0. */
-	ldr  r2, =0xe000ed98					/* r2 = 0xe000ed98 [Location of RNR]. */
-	adds r3, #4								/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	movs r5, #4								/* r5 = 4. */
-	str  r5, [r2]							/* Program RNR = 4. */
-	ldmia r3!, {r6,r7}						/* Read first set of RBAR/RLAR from TCB. */
-	ldr  r4, =0xe000ed9c					/* r4 = 0xe000ed9c [Location of RBAR]. */
-	stmia r4!, {r6,r7}						/* Write first set of RBAR/RLAR registers. */
-	movs r5, #5								/* r5 = 5. */
-	str  r5, [r2]							/* Program RNR = 5. */
-	ldmia r3!, {r6,r7}						/* Read second set of RBAR/RLAR from TCB. */
-	ldr  r4, =0xe000ed9c					/* r4 = 0xe000ed9c [Location of RBAR]. */
-	stmia r4!, {r6,r7}						/* Write second set of RBAR/RLAR registers. */
-	movs r5, #6								/* r5 = 6. */
-	str  r5, [r2]							/* Program RNR = 6. */
-	ldmia r3!, {r6,r7}						/* Read third set of RBAR/RLAR from TCB. */
-	ldr  r4, =0xe000ed9c					/* r4 = 0xe000ed9c [Location of RBAR]. */
-	stmia r4!, {r6,r7}						/* Write third set of RBAR/RLAR registers. */
-	movs r5, #7								/* r5 = 7. */
-	str  r5, [r2]							/* Program RNR = 7. */
-	ldmia r3!, {r6,r7}						/* Read fourth set of RBAR/RLAR from TCB. */
-	ldr  r4, =0xe000ed9c					/* r4 = 0xe000ed9c [Location of RBAR]. */
-	stmia r4!, {r6,r7}						/* Write fourth set of RBAR/RLAR registers. */
-
-	ldr r2, =0xe000ed94						/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	ldr r4, [r2]							/* Read the value of MPU_CTRL. */
-	movs r5, #1								/* r5 = 1. */
-	orrs r4, r5								/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-	str r4, [r2]							/* Enable MPU. */
-	dsb										/* Force memory writes before continuing. */
-#endif /* configENABLE_MPU */
-
-#if ( configENABLE_MPU == 1 )
-	ldm  r0!, {r1-r4}						/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
-	ldr  r5, =xSecureContext
-	str  r1, [r5]							/* Set xSecureContext to this task's value for the same. */
-	msr  psplim, r2							/* Set this task's PSPLIM value. */
-	msr  control, r3						/* Set this task's CONTROL value. */
-	adds r0, #32							/* Discard everything up to r0. */
-	msr  psp, r0							/* This is now the new top of stack to use in the task. */
-	isb
-	bx   r4									/* Finally, branch to EXC_RETURN. */
-#else /* configENABLE_MPU */
-	ldm  r0!, {r1-r3}						/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-	ldr  r4, =xSecureContext
-	str  r1, [r4]							/* Set xSecureContext to this task's value for the same. */
-	msr  psplim, r2							/* Set this task's PSPLIM value. */
-	movs r1, #2								/* r1 = 2. */
-	msr  CONTROL, r1						/* Switch to use PSP in the thread mode. */
-	adds r0, #32							/* Discard everything up to r0. */
-	msr  psp, r0							/* This is now the new top of stack to use in the task. */
-	isb
-	bx   r3									/* Finally, branch to EXC_RETURN. */
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-vRaisePrivilege:
-	mrs r0, control							/* Read the CONTROL register. */
-	movs r1, #1								/* r1 = 1. */
-	bics r0, r1								/* Clear the bit 0. */
-	msr control, r0							/* Write back the new CONTROL value. */
-	bx lr									/* Return to the caller. */
-/*-----------------------------------------------------------*/
-
-vStartFirstTask:
-	ldr r0, =0xe000ed08						/* Use the NVIC offset register to locate the stack. */
-	ldr r0, [r0]							/* Read the VTOR register which gives the address of vector table. */
-	ldr r0, [r0]							/* The first entry in vector table is stack pointer. */
-	msr msp, r0								/* Set the MSP back to the start of the stack. */
-	cpsie i									/* Globally enable interrupts. */
-	dsb
-	isb
-	svc 2									/* System call to start the first task. portSVC_START_SCHEDULER = 2. */
-/*-----------------------------------------------------------*/
-
-ulSetInterruptMask:
-	mrs r0, PRIMASK
-	cpsid i
-	bx lr
-/*-----------------------------------------------------------*/
-
-vClearInterruptMask:
-	msr PRIMASK, r0
-	bx lr
-/*-----------------------------------------------------------*/
-
-PendSV_Handler:
-	mrs r1, psp								/* Read PSP in r1. */
-	ldr r2, =xSecureContext					/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	ldr r0, [r2]							/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-
-	cbz r0, save_ns_context					/* No secure context to save. */
-	push {r0-r2, r14}
-	bl SecureContext_SaveContext
-	pop {r0-r3}								/* LR is now in r3. */
-	mov lr, r3								/* LR = r3. */
-	lsls r2, r3, #25						/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	bpl save_ns_context						/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	ldr r3, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr r2, [r3]							/* Read pxCurrentTCB. */
-#if ( configENABLE_MPU == 1 )
-	subs r1, r1, #16						/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	str r1, [r2]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
-	mrs r3, control							/* r3 = CONTROL. */
-	mov r4, lr								/* r4 = LR/EXC_RETURN. */
-	stmia r1!, {r0, r2-r4}					/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-#else /* configENABLE_MPU */
-	subs r1, r1, #12						/* Make space for xSecureContext, PSPLIM and LR on the stack. */
-	str r1, [r2]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
-	mov r3, lr								/* r3 = LR/EXC_RETURN. */
-	stmia r1!, {r0, r2-r3}					/* Store xSecureContext, PSPLIM and LR on the stack. */
-#endif /* configENABLE_MPU */
-	b select_next_task
-
-	save_ns_context:
-		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-		ldr r2, [r3]						/* Read pxCurrentTCB. */
-	#if ( configENABLE_MPU == 1 )
-		subs r1, r1, #48					/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-		str r1, [r2]						/* Save the new top of stack in TCB. */
-		adds r1, r1, #16					/* r1 = r1 + 16. */
-		stmia r1!, {r4-r7}					/* Store the low registers that are not saved automatically. */
-		mov r4, r8							/* r4 = r8. */
-		mov r5, r9							/* r5 = r9. */
-		mov r6, r10							/* r6 = r10. */
-		mov r7, r11							/* r7 = r11. */
-		stmia r1!, {r4-r7}					/* Store the high registers that are not saved automatically. */
-		mrs r2, psplim						/* r2 = PSPLIM. */
-		mrs r3, control						/* r3 = CONTROL. */
-		mov r4, lr							/* r4 = LR/EXC_RETURN. */
-		subs r1, r1, #48					/* r1 = r1 - 48. */
-		stmia r1!, {r0, r2-r4}				/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-		subs r1, r1, #44					/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-		str r1, [r2]						/* Save the new top of stack in TCB. */
-		mrs r2, psplim						/* r2 = PSPLIM. */
-		mov r3, lr							/* r3 = LR/EXC_RETURN. */
-		stmia r1!, {r0, r2-r7}				/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
-		mov r4, r8							/* r4 = r8. */
-		mov r5, r9							/* r5 = r9. */
-		mov r6, r10							/* r6 = r10. */
-		mov r7, r11							/* r7 = r11. */
-		stmia r1!, {r4-r7}					/* Store the high registers that are not saved automatically. */
-	#endif /* configENABLE_MPU */
-
-	select_next_task:
-		cpsid i
-		bl vTaskSwitchContext
-		cpsie i
-
-		ldr r2, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-		ldr r3, [r2]						/* Read pxCurrentTCB. */
-		ldr r1, [r3]						/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
-
-	#if ( configENABLE_MPU == 1 )
-		dmb									/* Complete outstanding transfers before disabling MPU. */
-		ldr r2, =0xe000ed94					/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-		ldr r4, [r2]						/* Read the value of MPU_CTRL. */
-		movs r5, #1							/* r5 = 1. */
-		bics r4, r5							/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
-		str r4, [r2]						/* Disable MPU. */
-
-		adds r3, #4							/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-		ldr r4, [r3]						/* r4 = *r3 i.e. r4 = MAIR0. */
-		ldr r2, =0xe000edc0					/* r2 = 0xe000edc0 [Location of MAIR0]. */
-		str r4, [r2]						/* Program MAIR0. */
-		ldr r2, =0xe000ed98					/* r2 = 0xe000ed98 [Location of RNR]. */
-		adds r3, #4							/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-		movs r5, #4							/* r5 = 4. */
-		str  r5, [r2]						/* Program RNR = 4. */
-		ldmia r3!, {r6,r7}					/* Read first set of RBAR/RLAR from TCB. */
-		ldr  r4, =0xe000ed9c				/* r4 = 0xe000ed9c [Location of RBAR]. */
-		stmia r4!, {r6,r7}					/* Write first set of RBAR/RLAR registers. */
-		movs r5, #5							/* r5 = 5. */
-		str  r5, [r2]						/* Program RNR = 5. */
-		ldmia r3!, {r6,r7}					/* Read second set of RBAR/RLAR from TCB. */
-		ldr  r4, =0xe000ed9c				/* r4 = 0xe000ed9c [Location of RBAR]. */
-		stmia r4!, {r6,r7}					/* Write second set of RBAR/RLAR registers. */
-		movs r5, #6							/* r5 = 6. */
-		str  r5, [r2]						/* Program RNR = 6. */
-		ldmia r3!, {r6,r7}					/* Read third set of RBAR/RLAR from TCB. */
-		ldr  r4, =0xe000ed9c				/* r4 = 0xe000ed9c [Location of RBAR]. */
-		stmia r4!, {r6,r7}					/* Write third set of RBAR/RLAR registers. */
-		movs r5, #7							/* r5 = 7. */
-		str  r5, [r2]						/* Program RNR = 7. */
-		ldmia r3!, {r6,r7}					/* Read fourth set of RBAR/RLAR from TCB. */
-		ldr  r4, =0xe000ed9c				/* r4 = 0xe000ed9c [Location of RBAR]. */
-		stmia r4!, {r6,r7}					/* Write fourth set of RBAR/RLAR registers. */
-
-		ldr r2, =0xe000ed94					/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-		ldr r4, [r2]						/* Read the value of MPU_CTRL. */
-		movs r5, #1							/* r5 = 1. */
-		orrs r4, r5							/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
-		str r4, [r2]						/* Enable MPU. */
-		dsb									/* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-
-	#if ( configENABLE_MPU == 1 )
-		ldmia r1!, {r0, r2-r4}				/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-		msr psplim, r2						/* Restore the PSPLIM register value for the task. */
-		msr control, r3						/* Restore the CONTROL register value for the task. */
-		mov lr, r4							/* LR = r4. */
-		ldr r2, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-		str r0, [r2]						/* Restore the task's xSecureContext. */
-		cbz r0, restore_ns_context			/* If there is no secure context for the task, restore the non-secure context. */
-		push {r1,r4}
-		bl SecureContext_LoadContext		/* Restore the secure context. */
-		pop {r1,r4}
-		mov lr, r4							/* LR = r4. */
-		lsls r2, r4, #25					/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-		bpl restore_ns_context				/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
-		bx lr
-	#else /* configENABLE_MPU */
-		ldmia r1!, {r0, r2-r3}				/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-		msr psplim, r2						/* Restore the PSPLIM register value for the task. */
-		mov lr, r3							/* LR = r3. */
-		ldr r2, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-		str r0, [r2]						/* Restore the task's xSecureContext. */
-		cbz r0, restore_ns_context			/* If there is no secure context for the task, restore the non-secure context. */
-		push {r1,r3}
-		bl SecureContext_LoadContext		/* Restore the secure context. */
-		pop {r1,r3}
-		mov lr, r3							/* LR = r3. */
-		lsls r2, r3, #25					/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-		bpl restore_ns_context				/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
-		bx lr
-	#endif /* configENABLE_MPU */
-
-	restore_ns_context:
-		adds r1, r1, #16					/* Move to the high registers. */
-		ldmia r1!, {r4-r7}					/* Restore the high registers that are not automatically restored. */
-		mov r8, r4							/* r8 = r4. */
-		mov r9, r5							/* r9 = r5. */
-		mov r10, r6							/* r10 = r6. */
-		mov r11, r7							/* r11 = r7. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
-		subs r1, r1, #32					/* Go back to the low registers. */
-		ldmia r1!, {r4-r7}					/* Restore the low registers that are not automatically restored. */
-		bx lr
-/*-----------------------------------------------------------*/
-
-SVC_Handler:
-	movs r0, #4
-	mov r1, lr
-	tst r0, r1
-	beq stacking_used_msp
-	mrs r0, psp
-	b vPortSVCHandler_C
-	stacking_used_msp:
-		mrs r0, msp
-		b vPortSVCHandler_C
-/*-----------------------------------------------------------*/
-
-vPortFreeSecureContext:
-	ldr r1, [r0]							/* The first item in the TCB is the top of the stack. */
-	ldr r0, [r1]							/* The first item on the stack is the task's xSecureContext. */
-	cmp r0, #0								/* Raise svc if task's xSecureContext is not NULL. */
-	beq free_secure_context
-	bx lr									/* There is no secure context (xSecureContext is NULL). */
-	free_secure_context:
-		svc 1								/* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */
-		bx lr								/* Return. */
-/*-----------------------------------------------------------*/
-
-	END
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Including FreeRTOSConfig.h here will cause build errors if the header file
+contains code not understood by the assembler - for example the 'extern' keyword.
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
+the code is included in C files but excluded by the preprocessor in assembly
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
+#include "FreeRTOSConfig.h"
+
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
+#ifndef configUSE_MPU_WRAPPERS_V1
+    #define configUSE_MPU_WRAPPERS_V1 0
+#endif
+
+
+    EXTERN pxCurrentTCB
+    EXTERN xSecureContext
+    EXTERN vTaskSwitchContext
+    EXTERN vPortSVCHandler_C
+    EXTERN SecureContext_SaveContext
+    EXTERN SecureContext_LoadContext
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+    EXTERN vSystemCallEnter
+    EXTERN vSystemCallExit
+#endif
+
+    PUBLIC xIsPrivileged
+    PUBLIC vResetPrivilege
+    PUBLIC vPortAllocateSecureContext
+    PUBLIC vRestoreContextOfFirstTask
+    PUBLIC vRaisePrivilege
+    PUBLIC vStartFirstTask
+    PUBLIC ulSetInterruptMask
+    PUBLIC vClearInterruptMask
+    PUBLIC PendSV_Handler
+    PUBLIC SVC_Handler
+    PUBLIC vPortFreeSecureContext
+
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#endif
+/*-----------------------------------------------------------*/
+
+/*---------------- Unprivileged Functions -------------------*/
+
+/*-----------------------------------------------------------*/
+
+    SECTION .text:CODE:NOROOT(2)
+    THUMB
+/*-----------------------------------------------------------*/
+
+xIsPrivileged:
+    mrs r0, control                         /* r0 = CONTROL. */
+    movs r1, #1                             /* r1 = 1. */
+    tst r0, r1                              /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
+    beq running_privileged                  /* If the result of previous AND operation was 0, branch. */
+    movs r0, #0                             /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+    bx lr                                   /* Return. */
+    running_privileged:
+        movs r0, #1                         /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        bx lr                               /* Return. */
+/*-----------------------------------------------------------*/
+
+vResetPrivilege:
+    mrs r0, control                         /* r0 = CONTROL. */
+    movs r1, #1                             /* r1 = 1. */
+    orrs r0, r1                             /* r0 = r0 | r1. */
+    msr control, r0                         /* CONTROL = r0. */
+    bx lr                                   /* Return to the caller. */
+/*-----------------------------------------------------------*/
+
+vPortAllocateSecureContext:
+    svc 100                                 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */
+    bx lr                                   /* Return. */
+/*-----------------------------------------------------------*/
+
+/*----------------- Privileged Functions --------------------*/
+
+/*-----------------------------------------------------------*/
+
+    SECTION privileged_functions:CODE:NOROOT(2)
+    THUMB
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+
+vRestoreContextOfFirstTask:
+    program_mpu_first_task:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r0, [r3]                        /* r0 = pxCurrentTCB.*/
+
+        dmb                                 /* Complete outstanding transfers before disabling MPU. */
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        movs r3, #1                         /* r3 = 1. */
+        bics r2, r3                         /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
+        str r2, [r1]                        /* Disable MPU. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+        ldr r1, [r0]                        /* r1 = *r0 i.e. r1 = MAIR0. */
+        ldr r2, =0xe000edc0                 /* r2 = 0xe000edc0 [Location of MAIR0]. */
+        str r1, [r2]                        /* Program MAIR0. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+        ldr r1, =0xe000ed98                 /* r1 = 0xe000ed98 [Location of RNR]. */
+
+        movs r3, #4                         /* r3 = 4. */
+        str r3, [r1]                        /* Program RNR = 4. */
+        ldmia r0!, {r4-r5}                  /* Read first set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write first set of RBAR/RLAR registers. */
+        movs r3, #5                         /* r3 = 5. */
+        str r3, [r1]                        /* Program RNR = 5. */
+        ldmia r0!, {r4-r5}                  /* Read second set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write second set of RBAR/RLAR registers. */
+        movs r3, #6                         /* r3 = 6. */
+        str r3, [r1]                        /* Program RNR = 6. */
+        ldmia r0!, {r4-r5}                  /* Read third set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write third set of RBAR/RLAR registers. */
+        movs r3, #7                         /* r3 = 6. */
+        str r3, [r1]                        /* Program RNR = 7. */
+        ldmia r0!, {r4-r5}                  /* Read fourth set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write fourth set of RBAR/RLAR registers. */
+
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        movs r3, #1                         /* r3 = 1. */
+        orrs r2, r3                         /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
+        str r2, [r1]                        /* Enable MPU. */
+        dsb                                 /* Force memory writes before continuing. */
+
+    restore_context_first_task:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* r1 = pxCurrentTCB.*/
+        ldr r2, [r1]                        /* r2 = Location of saved context in TCB. */
+
+    restore_special_regs_first_task:
+        subs r2, #20
+        ldmia r2!, {r0, r3-r6}              /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */
+        subs r2, #20
+        msr psp, r3
+        msr control, r5
+        mov lr, r6
+        ldr r4, =xSecureContext             /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        str r0, [r4]                        /* Restore xSecureContext. */
+
+    restore_general_regs_first_task:
+        subs r2, #32
+        ldmia r2!, {r4-r7}                  /* r4-r7 contain half of the hardware saved context. */
+        stmia r3!, {r4-r7}                  /* Copy half of the the hardware saved context on the task stack. */
+        ldmia r2!, {r4-r7}                  /* r4-r7 contain rest half of the hardware saved context. */
+        stmia r3!, {r4-r7}                  /* Copy rest half of the the hardware saved context on the task stack. */
+        subs r2, #48
+        ldmia r2!, {r4-r7}                  /* Restore r8-r11. */
+        mov r8, r4                          /* r8 = r4. */
+        mov r9, r5                          /* r9 = r5. */
+        mov r10, r6                         /* r10 = r6. */
+        mov r11, r7                         /* r11 = r7. */
+        subs r2, #32
+        ldmia r2!, {r4-r7}                  /* Restore r4-r7. */
+        subs r2, #16
+
+    restore_context_done_first_task:
+       str r2, [r1]                         /* Save the location where the context should be saved next as the first member of TCB. */
+       bx lr
+
+#else /* configENABLE_MPU */
+
+vRestoreContextOfFirstTask:
+    ldr  r2, =pxCurrentTCB                  /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr  r3, [r2]                           /* Read pxCurrentTCB. */
+    ldr  r0, [r3]                           /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+
+    ldm  r0!, {r1-r3}                       /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+    ldr  r4, =xSecureContext
+    str  r1, [r4]                           /* Set xSecureContext to this task's value for the same. */
+    movs r1, #2                             /* r1 = 2. */
+    msr  CONTROL, r1                        /* Switch to use PSP in the thread mode. */
+    adds r0, #32                            /* Discard everything up to r0. */
+    msr  psp, r0                            /* This is now the new top of stack to use in the task. */
+    isb
+    bx   r3                                 /* Finally, branch to EXC_RETURN. */
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+vRaisePrivilege:
+    mrs r0, control                         /* Read the CONTROL register. */
+    movs r1, #1                             /* r1 = 1. */
+    bics r0, r1                             /* Clear the bit 0. */
+    msr control, r0                         /* Write back the new CONTROL value. */
+    bx lr                                   /* Return to the caller. */
+/*-----------------------------------------------------------*/
+
+vStartFirstTask:
+    ldr r0, =0xe000ed08                     /* Use the NVIC offset register to locate the stack. */
+    ldr r0, [r0]                            /* Read the VTOR register which gives the address of vector table. */
+    ldr r0, [r0]                            /* The first entry in vector table is stack pointer. */
+    msr msp, r0                             /* Set the MSP back to the start of the stack. */
+    cpsie i                                 /* Globally enable interrupts. */
+    dsb
+    isb
+    svc 102                                 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
+/*-----------------------------------------------------------*/
+
+ulSetInterruptMask:
+    mrs r0, PRIMASK
+    cpsid i
+    bx lr
+/*-----------------------------------------------------------*/
+
+vClearInterruptMask:
+    msr PRIMASK, r0
+    bx lr
+/*-----------------------------------------------------------*/
+#if ( configENABLE_MPU == 1 )
+
+PendSV_Handler:
+    ldr r3, =xSecureContext                 /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+    ldr r0, [r3]                            /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+    ldr r3, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r1, [r3]                            /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later.*/
+    ldr r2, [r1]                            /* r2 = Location in TCB where the context should be saved. */
+
+    cbz r0, save_ns_context                 /* No secure context to save. */
+    save_s_context:
+        push {r0-r2, lr}
+        bl SecureContext_SaveContext        /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+        pop {r0-r3}                         /* LR is now in r3. */
+        mov lr, r3                          /* Restore LR. */
+
+    save_ns_context:
+        mov r3, lr                          /* r3 = LR (EXC_RETURN). */
+        lsls r3, r3, #25                    /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        bmi save_special_regs               /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
+
+    save_general_regs:
+        mrs r3, psp
+        stmia r2!, {r4-r7}                  /* Store r4-r7. */
+        mov r4, r8                          /* r4 = r8. */
+        mov r5, r9                          /* r5 = r9. */
+        mov r6, r10                         /* r6 = r10. */
+        mov r7, r11                         /* r7 = r11. */
+        stmia r2!, {r4-r7}                  /* Store r8-r11. */
+        ldmia r3!, {r4-r7}                  /* Copy half of the  hardware saved context into r4-r7. */
+        stmia r2!, {r4-r7}                  /* Store the hardware saved context. */
+        ldmia r3!, {r4-r7}                  /* Copy rest half of the  hardware saved context into r4-r7. */
+        stmia r2!, {r4-r7}                  /* Store the hardware saved context. */
+
+    save_special_regs:
+        mrs r3, psp                         /* r3 = PSP. */
+        movs r4, #0                         /* r4 = 0. 0 is stored in the PSPLIM slot. */
+        mrs r5, control                     /* r5 = CONTROL. */
+        mov r6, lr                          /* r6 = LR. */
+        stmia r2!, {r0, r3-r6}              /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+        str r2, [r1]                        /* Save the location from where the context should be restored as the first member of TCB. */
+
+    select_next_task:
+        cpsid i
+        bl vTaskSwitchContext
+        cpsie i
+
+    program_mpu:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r0, [r3]                        /* r0 = pxCurrentTCB.*/
+
+        dmb                                 /* Complete outstanding transfers before disabling MPU. */
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        movs r3, #1                         /* r3 = 1. */
+        bics r2, r3                         /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
+        str r2, [r1]                        /* Disable MPU. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+        ldr r1, [r0]                        /* r1 = *r0 i.e. r1 = MAIR0. */
+        ldr r2, =0xe000edc0                 /* r2 = 0xe000edc0 [Location of MAIR0]. */
+        str r1, [r2]                        /* Program MAIR0. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+        ldr r1, =0xe000ed98                 /* r1 = 0xe000ed98 [Location of RNR]. */
+
+        movs r3, #4                         /* r3 = 4. */
+        str r3, [r1]                        /* Program RNR = 4. */
+        ldmia r0!, {r4-r5}                  /* Read first set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write first set of RBAR/RLAR registers. */
+        movs r3, #5                         /* r3 = 5. */
+        str r3, [r1]                        /* Program RNR = 5. */
+        ldmia r0!, {r4-r5}                  /* Read second set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write second set of RBAR/RLAR registers. */
+        movs r3, #6                         /* r3 = 6. */
+        str r3, [r1]                        /* Program RNR = 6. */
+        ldmia r0!, {r4-r5}                  /* Read third set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write third set of RBAR/RLAR registers. */
+        movs r3, #7                         /* r3 = 6. */
+        str r3, [r1]                        /* Program RNR = 7. */
+        ldmia r0!, {r4-r5}                  /* Read fourth set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write fourth set of RBAR/RLAR registers. */
+
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        movs r3, #1                         /* r3 = 1. */
+        orrs r2, r3                         /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
+        str r2, [r1]                        /* Enable MPU. */
+        dsb                                 /* Force memory writes before continuing. */
+
+    restore_context:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* r1 = pxCurrentTCB.*/
+        ldr r2, [r1]                        /* r2 = Location of saved context in TCB. */
+
+    restore_special_regs:
+        subs r2, #20
+        ldmia r2!, {r0, r3-r6}              /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */
+        subs r2, #20
+        msr psp, r3
+        msr control, r5
+        mov lr, r6
+        ldr r4, =xSecureContext             /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        str r0, [r4]                        /* Restore xSecureContext. */
+        cbz r0, restore_ns_context          /* No secure context to restore. */
+
+    restore_s_context:
+        push {r1-r3, lr}
+        bl SecureContext_LoadContext        /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+        pop {r1-r4}                         /* LR is now in r4. */
+        mov lr, r4
+
+    restore_ns_context:
+        mov r0, lr                          /* r0 = LR (EXC_RETURN).  */
+        lsls r0, r0, #25                    /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame.  */
+        bmi restore_context_done            /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
+
+    restore_general_regs:
+        subs r2, #32
+        ldmia r2!, {r4-r7}                  /* r4-r7 contain half of the hardware saved context. */
+        stmia r3!, {r4-r7}                  /* Copy half of the the hardware saved context on the task stack. */
+        ldmia r2!, {r4-r7}                  /* r4-r7 contain rest half of the hardware saved context. */
+        stmia r3!, {r4-r7}                  /* Copy rest half of the the hardware saved context on the task stack. */
+        subs r2, #48
+        ldmia r2!, {r4-r7}                  /* Restore r8-r11. */
+        mov r8, r4                          /* r8 = r4. */
+        mov r9, r5                          /* r9 = r5. */
+        mov r10, r6                         /* r10 = r6. */
+        mov r11, r7                         /* r11 = r7. */
+        subs r2, #32
+        ldmia r2!, {r4-r7}                  /* Restore r4-r7. */
+        subs r2, #16
+
+    restore_context_done:
+        str r2, [r1]                        /* Save the location where the context should be saved next as the first member of TCB.  */
+        bx lr
+
+#else /* configENABLE_MPU */
+
+PendSV_Handler:
+    ldr r3, =xSecureContext                 /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+    ldr r0, [r3]                            /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+    ldr r3, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r1, [r3]                            /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+    mrs r2, psp                             /* Read PSP in r2. */
+
+    cbz r0, save_ns_context                 /* No secure context to save. */
+    push {r0-r2, r14}
+    bl SecureContext_SaveContext            /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+    pop {r0-r3}                             /* LR is now in r3. */
+    mov lr, r3                              /* LR = r3. */
+    lsls r1, r3, #25                        /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+    bpl save_ns_context                     /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+    ldr r3, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r1, [r3]                            /* Read pxCurrentTCB. */
+
+    subs r2, r2, #12                        /* Make space for xSecureContext, PSPLIM and LR on the stack. */
+    str r2, [r1]                            /* Save the new top of stack in TCB. */
+    movs r1, #0                             /* r1 = 0. 0 is stored in the PSPLIM slot. */
+    mov r3, lr                              /* r3 = LR/EXC_RETURN. */
+    stmia r2!, {r0, r1, r3}                 /* Store xSecureContext, PSPLIM and LR on the stack. */
+
+    b select_next_task
+
+    save_ns_context:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* Read pxCurrentTCB. */
+        subs r2, r2, #44                    /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+        str r2, [r1]                        /* Save the new top of stack in TCB. */
+        movs r1, #0                         /* r1 = 0. 0 is stored in the PSPLIM slot. */
+        mov r3, lr                          /* r3 = LR/EXC_RETURN. */
+        stmia r2!, {r0, r1, r3-r7}          /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
+        mov r4, r8                          /* r4 = r8. */
+        mov r5, r9                          /* r5 = r9. */
+        mov r6, r10                         /* r6 = r10. */
+        mov r7, r11                         /* r7 = r11. */
+        stmia r2!, {r4-r7}                  /* Store the high registers that are not saved automatically. */
+
+    select_next_task:
+        cpsid i
+        bl vTaskSwitchContext
+        cpsie i
+
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* Read pxCurrentTCB. */
+        ldr r2, [r1]                        /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
+
+        ldmia r2!, {r0, r1, r4}             /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
+        mov lr, r4                          /* LR = r4. */
+        ldr r3, =xSecureContext             /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        str r0, [r3]                        /* Restore the task's xSecureContext. */
+        cbz r0, restore_ns_context          /* If there is no secure context for the task, restore the non-secure context. */
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* Read pxCurrentTCB. */
+        push {r2, r4}
+        bl SecureContext_LoadContext        /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+        pop {r2, r4}
+        mov lr, r4                          /* LR = r4. */
+        lsls r1, r4, #25                    /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        bpl restore_ns_context              /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        msr psp, r2                         /* Remember the new top of stack for the task. */
+        bx lr
+
+    restore_ns_context:
+        adds r2, r2, #16                    /* Move to the high registers. */
+        ldmia r2!, {r4-r7}                  /* Restore the high registers that are not automatically restored. */
+        mov r8, r4                          /* r8 = r4. */
+        mov r9, r5                          /* r9 = r5. */
+        mov r10, r6                         /* r10 = r6. */
+        mov r11, r7                         /* r11 = r7. */
+        msr psp, r2                         /* Remember the new top of stack for the task. */
+        subs r2, r2, #32                    /* Go back to the low registers. */
+        ldmia r2!, {r4-r7}                  /* Restore the low registers that are not automatically restored. */
+        bx lr
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
+SVC_Handler:
+    movs r0, #4
+    mov r1, lr
+    tst r0, r1
+    beq stack_on_msp
+    stack_on_psp:
+        mrs r0, psp
+        b route_svc
+    stack_on_msp:
+        mrs r0, msp
+        b route_svc
+
+    route_svc:
+        ldr r3, [r0, #24]
+        subs r3, #2
+        ldrb r2, [r3, #0]
+        cmp r2, #NUM_SYSTEM_CALLS
+        blt system_call_enter
+        cmp r2, #104        /* portSVC_SYSTEM_CALL_EXIT. */
+        beq system_call_exit
+        b vPortSVCHandler_C
+
+    system_call_enter:
+        b vSystemCallEnter
+    system_call_exit:
+        b vSystemCallExit
+
+#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+SVC_Handler:
+    movs r0, #4
+    mov r1, lr
+    tst r0, r1
+    beq stacking_used_msp
+    mrs r0, psp
+    b vPortSVCHandler_C
+    stacking_used_msp:
+        mrs r0, msp
+        b vPortSVCHandler_C
+
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+/*-----------------------------------------------------------*/
+
+vPortFreeSecureContext:
+    ldr r2, [r0]                            /* The first item in the TCB is the top of the stack. */
+    ldr r1, [r2]                            /* The first item on the stack is the task's xSecureContext. */
+    cmp r1, #0                              /* Raise svc if task's xSecureContext is not NULL. */
+    bne free_secure_context                 /* Branch if r1 != 0. */
+    bx lr                                   /* There is no secure context (xSecureContext is NULL). */
+    free_secure_context:
+        svc 101                             /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */
+        bx lr                               /* Return. */
+/*-----------------------------------------------------------*/
+
+    END

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23/portmacro.h

@@ -1,308 +1,85 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*------------------------------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the given hardware
- * and compiler.
- *
- * These settings should not be altered.
- *------------------------------------------------------------------------------
- */
-
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
-
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
-
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
-
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Type definitions.
- */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
-
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * Architecture specifics.
- */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Extern declarations.
- */
-extern BaseType_t xPortIsInsideInterrupt( void );
-
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
-
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
-
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief MPU specific constants.
- */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
-
-
-/* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
-
-/* Device memory attributes used in MPU_MAIR registers.
- *
- * 8-bit values encoded as follows:
- *  Bit[7:4] - 0000 - Device Memory
- *  Bit[3:2] - 00 --> Device-nGnRnE
- *				01 --> Device-nGnRE
- *				10 --> Device-nGRE
- *				11 --> Device-GRE
- *  Bit[1:0] - 00, Reserved.
- */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
-
-/* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
-
-/* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
-
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
-
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Settings to define an MPU region.
- */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
-
-/**
- * @brief MPU settings as stored in the TCB.
- */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief SVC numbers.
- */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Scheduler utilities.
- */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Critical section management.
- */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Task function macros as described on the FreeRTOS.org WEB site.
- */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
-
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
-
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
-
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Barriers.
- */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
-/*-----------------------------------------------------------*/
-
-/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
- * the source code because to do so would cause other compilers to generate
- * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
-/*-----------------------------------------------------------*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M23"
+#define portHAS_ARMV8M_MAIN_EXTENSION    0
+#define portDONT_DISCARD                 __root
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+#if ( configTOTAL_MPU_REGIONS == 16 )
+    #error 16 MPU regions are not yet supported for this port.
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    __asm volatile ( " cpsid i " ::: "memory" )
+#define portENABLE_INTERRUPTS()     __asm volatile ( " cpsie i " ::: "memory" )
+/*-----------------------------------------------------------*/
+
+/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
+ * the source code because to do so would cause other compilers to generate
+ * warnings. */
+#pragma diag_suppress=Be006
+#pragma diag_suppress=Pa082
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portasm.s

@@ -1,303 +1,456 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-	EXTERN pxCurrentTCB
-	EXTERN vTaskSwitchContext
-	EXTERN vPortSVCHandler_C
-
-	PUBLIC xIsPrivileged
-	PUBLIC vResetPrivilege
-	PUBLIC vRestoreContextOfFirstTask
-	PUBLIC vRaisePrivilege
-	PUBLIC vStartFirstTask
-	PUBLIC ulSetInterruptMask
-	PUBLIC vClearInterruptMask
-	PUBLIC PendSV_Handler
-	PUBLIC SVC_Handler
-
-#if ( configENABLE_FPU == 1 )
-	#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
-#endif
-/*-----------------------------------------------------------*/
-
-/*---------------- Unprivileged Functions -------------------*/
-
-/*-----------------------------------------------------------*/
-
-	SECTION .text:CODE:NOROOT(2)
-	THUMB
-/*-----------------------------------------------------------*/
-
-xIsPrivileged:
-	mrs r0, control							/* r0 = CONTROL. */
-	movs r1, #1								/* r1 = 1. */
-	tst r0, r1								/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
-	beq running_privileged					/* If the result of previous AND operation was 0, branch. */
-	movs r0, #0								/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	bx lr									/* Return. */
-	running_privileged:
-		movs r0, #1							/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
-		bx lr								/* Return. */
-
-/*-----------------------------------------------------------*/
-
-vResetPrivilege:
-	mrs r0, control							/* r0 = CONTROL. */
-	movs r1, #1								/* r1 = 1. */
-	orrs r0, r1								/* r0 = r0 | r1. */
-	msr control, r0							/* CONTROL = r0. */
-	bx lr									/* Return to the caller. */
-/*-----------------------------------------------------------*/
-
-/*----------------- Privileged Functions --------------------*/
-
-/*-----------------------------------------------------------*/
-
-	SECTION privileged_functions:CODE:NOROOT(2)
-	THUMB
-/*-----------------------------------------------------------*/
-
-vRestoreContextOfFirstTask:
-	ldr  r2, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr  r1, [r2]							/* Read pxCurrentTCB. */
-	ldr  r0, [r1]							/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-
-#if ( configENABLE_MPU == 1 )
-	dmb										/* Complete outstanding transfers before disabling MPU. */
-	ldr r2, =0xe000ed94						/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	ldr r3, [r2]							/* Read the value of MPU_CTRL. */
-	movs r4, #1								/* r4 = 1. */
-	bics r3, r4								/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
-	str r3, [r2]							/* Disable MPU. */
-
-	adds r1, #4								/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	ldr  r4, [r1]							/* r4 = *r1 i.e. r4 = MAIR0. */
-	ldr  r2, =0xe000edc0					/* r2 = 0xe000edc0 [Location of MAIR0]. */
-	str  r4, [r2]							/* Program MAIR0. */
-	ldr  r2, =0xe000ed98					/* r2 = 0xe000ed98 [Location of RNR]. */
-	adds r1, #4								/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	movs r4, #4								/* r4 = 4. */
-	str  r4, [r2]							/* Program RNR = 4. */
-	ldmia r1!, {r5,r6}						/* Read first set of RBAR/RLAR from TCB. */
-	ldr  r3, =0xe000ed9c					/* r3 = 0xe000ed9c [Location of RBAR]. */
-	stmia r3!, {r5,r6}						/* Write first set of RBAR/RLAR registers. */
-	movs r4, #5								/* r4 = 5. */
-	str  r4, [r2]							/* Program RNR = 5. */
-	ldmia r1!, {r5,r6}						/* Read second set of RBAR/RLAR from TCB. */
-	ldr  r3, =0xe000ed9c					/* r3 = 0xe000ed9c [Location of RBAR]. */
-	stmia r3!, {r5,r6}						/* Write second set of RBAR/RLAR registers. */
-	movs r4, #6								/* r4 = 6. */
-	str  r4, [r2]							/* Program RNR = 6. */
-	ldmia r1!, {r5,r6}						/* Read third set of RBAR/RLAR from TCB. */
-	ldr  r3, =0xe000ed9c					/* r3 = 0xe000ed9c [Location of RBAR]. */
-	stmia r3!, {r5,r6}						/* Write third set of RBAR/RLAR registers. */
-	movs r4, #7								/* r4 = 7. */
-	str  r4, [r2]							/* Program RNR = 7. */
-	ldmia r1!, {r5,r6}						/* Read fourth set of RBAR/RLAR from TCB. */
-	ldr  r3, =0xe000ed9c					/* r3 = 0xe000ed9c [Location of RBAR]. */
-	stmia r3!, {r5,r6}						/* Write fourth set of RBAR/RLAR registers. */
-
-	ldr r2, =0xe000ed94						/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	ldr r3, [r2]							/* Read the value of MPU_CTRL. */
-	movs r4, #1								/* r4 = 1. */
-	orrs r3, r4								/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
-	str r3, [r2]							/* Enable MPU. */
-	dsb										/* Force memory writes before continuing. */
-#endif /* configENABLE_MPU */
-
-#if ( configENABLE_MPU == 1 )
-	ldm  r0!, {r1-r3}						/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
-	msr  psplim, r1							/* Set this task's PSPLIM value. */
-	msr  control, r2						/* Set this task's CONTROL value. */
-	adds r0, #32							/* Discard everything up to r0. */
-	msr  psp, r0							/* This is now the new top of stack to use in the task. */
-	isb
-	bx   r3									/* Finally, branch to EXC_RETURN. */
-#else /* configENABLE_MPU */
-	ldm  r0!, {r1-r2}						/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-	msr  psplim, r1							/* Set this task's PSPLIM value. */
-	movs r1, #2								/* r1 = 2. */
-	msr  CONTROL, r1						/* Switch to use PSP in the thread mode. */
-	adds r0, #32							/* Discard everything up to r0. */
-	msr  psp, r0							/* This is now the new top of stack to use in the task. */
-	isb
-	bx   r2									/* Finally, branch to EXC_RETURN. */
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-vRaisePrivilege:
-	mrs  r0, control						/* Read the CONTROL register. */
-	movs r1, #1								/* r1 = 1. */
-	bics r0, r1								/* Clear the bit 0. */
-	msr  control, r0						/* Write back the new CONTROL value. */
-	bx lr									/* Return to the caller. */
-/*-----------------------------------------------------------*/
-
-vStartFirstTask:
-	ldr r0, =0xe000ed08						/* Use the NVIC offset register to locate the stack. */
-	ldr r0, [r0]							/* Read the VTOR register which gives the address of vector table. */
-	ldr r0, [r0]							/* The first entry in vector table is stack pointer. */
-	msr msp, r0								/* Set the MSP back to the start of the stack. */
-	cpsie i									/* Globally enable interrupts. */
-	dsb
-	isb
-	svc 2									/* System call to start the first task. portSVC_START_SCHEDULER = 2. */
-	nop
-/*-----------------------------------------------------------*/
-
-ulSetInterruptMask:
-	mrs r0, PRIMASK
-	cpsid i
-	bx lr
-/*-----------------------------------------------------------*/
-
-vClearInterruptMask:
-	msr PRIMASK, r0
-	bx lr
-/*-----------------------------------------------------------*/
-
-PendSV_Handler:
-	mrs r0, psp								/* Read PSP in r0. */
-	ldr r2, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr r1, [r2]							/* Read pxCurrentTCB. */
-#if ( configENABLE_MPU == 1 )
-	subs r0, r0, #44						/* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-	str r0, [r1]							/* Save the new top of stack in TCB. */
-	mrs r1, psplim							/* r1 = PSPLIM. */
-	mrs r2, control							/* r2 = CONTROL. */
-	mov r3, lr								/* r3 = LR/EXC_RETURN. */
-	stmia r0!, {r1-r7}						/* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
-	mov r4, r8								/* r4 = r8. */
-	mov r5, r9								/* r5 = r9. */
-	mov r6, r10								/* r6 = r10. */
-	mov r7, r11								/* r7 = r11. */
-	stmia r0!, {r4-r7}						/* Store the high registers that are not saved automatically. */
-#else /* configENABLE_MPU */
-	subs r0, r0, #40						/* Make space for PSPLIM, LR and the remaining registers on the stack. */
-	str r0, [r1]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
-	mov r3, lr								/* r3 = LR/EXC_RETURN. */
-	stmia r0!, {r2-r7}						/* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
-	mov r4, r8								/* r4 = r8. */
-	mov r5, r9								/* r5 = r9. */
-	mov r6, r10								/* r6 = r10. */
-	mov r7, r11								/* r7 = r11. */
-	stmia r0!, {r4-r7}						/* Store the high registers that are not saved automatically. */
-#endif /* configENABLE_MPU */
-
-	cpsid i
-	bl vTaskSwitchContext
-	cpsie i
-
-	ldr r2, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr r1, [r2]							/* Read pxCurrentTCB. */
-	ldr r0, [r1]							/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
-
-#if ( configENABLE_MPU == 1 )
-	dmb										/* Complete outstanding transfers before disabling MPU. */
-	ldr r2, =0xe000ed94						/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	ldr r3, [r2]							/* Read the value of MPU_CTRL. */
-	movs r4, #1								/* r4 = 1. */
-	bics r3, r4								/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
-	str r3, [r2]							/* Disable MPU. */
-
-	adds r1, #4								/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
-	ldr  r4, [r1]							/* r4 = *r1 i.e. r4 = MAIR0. */
-	ldr  r2, =0xe000edc0					/* r2 = 0xe000edc0 [Location of MAIR0]. */
-	str  r4, [r2]							/* Program MAIR0. */
-	ldr  r2, =0xe000ed98					/* r2 = 0xe000ed98 [Location of RNR]. */
-	adds r1, #4								/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
-	movs r4, #4								/* r4 = 4. */
-	str  r4, [r2]							/* Program RNR = 4. */
-	ldmia r1!, {r5,r6}						/* Read first set of RBAR/RLAR from TCB. */
-	ldr  r3, =0xe000ed9c					/* r3 = 0xe000ed9c [Location of RBAR]. */
-	stmia r3!, {r5,r6}						/* Write first set of RBAR/RLAR registers. */
-	movs r4, #5								/* r4 = 5. */
-	str  r4, [r2]							/* Program RNR = 5. */
-	ldmia r1!, {r5,r6}						/* Read second set of RBAR/RLAR from TCB. */
-	ldr  r3, =0xe000ed9c					/* r3 = 0xe000ed9c [Location of RBAR]. */
-	stmia r3!, {r5,r6}						/* Write second set of RBAR/RLAR registers. */
-	movs r4, #6								/* r4 = 6. */
-	str  r4, [r2]							/* Program RNR = 6. */
-	ldmia r1!, {r5,r6}						/* Read third set of RBAR/RLAR from TCB. */
-	ldr  r3, =0xe000ed9c					/* r3 = 0xe000ed9c [Location of RBAR]. */
-	stmia r3!, {r5,r6}						/* Write third set of RBAR/RLAR registers. */
-	movs r4, #7								/* r4 = 7. */
-	str  r4, [r2]							/* Program RNR = 7. */
-	ldmia r1!, {r5,r6}						/* Read fourth set of RBAR/RLAR from TCB. */
-	ldr  r3, =0xe000ed9c					/* r3 = 0xe000ed9c [Location of RBAR]. */
-	stmia r3!, {r5,r6}						/* Write fourth set of RBAR/RLAR registers. */
-
-	ldr r2, =0xe000ed94						/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	ldr r3, [r2]							/* Read the value of MPU_CTRL. */
-	movs r4, #1								/* r4 = 1. */
-	orrs r3, r4								/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
-	str r3, [r2]							/* Enable MPU. */
-	dsb										/* Force memory writes before continuing. */
-#endif /* configENABLE_MPU */
-
-#if ( configENABLE_MPU == 1 )
-	adds r0, r0, #28						/* Move to the high registers. */
-	ldmia r0!, {r4-r7}						/* Restore the high registers that are not automatically restored. */
-	mov r8, r4								/* r8 = r4. */
-	mov r9, r5								/* r9 = r5. */
-	mov r10, r6								/* r10 = r6. */
-	mov r11, r7								/* r11 = r7. */
-	msr psp, r0								/* Remember the new top of stack for the task. */
-	subs r0, r0, #44						/* Move to the starting of the saved context. */
-	ldmia r0!, {r1-r7}						/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
-	msr psplim, r1							/* Restore the PSPLIM register value for the task. */
-	msr control, r2							/* Restore the CONTROL register value for the task. */
-	bx r3
-#else /* configENABLE_MPU */
-	adds r0, r0, #24						/* Move to the high registers. */
-	ldmia r0!, {r4-r7}						/* Restore the high registers that are not automatically restored. */
-	mov r8, r4								/* r8 = r4. */
-	mov r9, r5								/* r9 = r5. */
-	mov r10, r6								/* r10 = r6. */
-	mov r11, r7								/* r11 = r7. */
-	msr psp, r0								/* Remember the new top of stack for the task. */
-	subs r0, r0, #40						/* Move to the starting of the saved context. */
-	ldmia r0!, {r2-r7}						/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
-	msr psplim, r2							/* Restore the PSPLIM register value for the task. */
-	bx r3
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-SVC_Handler:
-	movs r0, #4
-	mov r1, lr
-	tst r0, r1
-	beq stacking_used_msp
-	mrs r0, psp
-	b vPortSVCHandler_C
-	stacking_used_msp:
-		mrs r0, msp
-		b vPortSVCHandler_C
-/*-----------------------------------------------------------*/
-
-	END
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+/* Including FreeRTOSConfig.h here will cause build errors if the header file
+contains code not understood by the assembler - for example the 'extern' keyword.
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
+the code is included in C files but excluded by the preprocessor in assembly
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
+#include "FreeRTOSConfig.h"
+
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
+#ifndef configUSE_MPU_WRAPPERS_V1
+    #define configUSE_MPU_WRAPPERS_V1 0
+#endif
+
+#ifndef configRUN_FREERTOS_SECURE_ONLY
+    #define configRUN_FREERTOS_SECURE_ONLY 0
+#endif
+
+    EXTERN pxCurrentTCB
+    EXTERN vTaskSwitchContext
+    EXTERN vPortSVCHandler_C
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+    EXTERN vSystemCallEnter
+    EXTERN vSystemCallExit
+#endif
+
+    PUBLIC xIsPrivileged
+    PUBLIC vResetPrivilege
+    PUBLIC vRestoreContextOfFirstTask
+    PUBLIC vRaisePrivilege
+    PUBLIC vStartFirstTask
+    PUBLIC ulSetInterruptMask
+    PUBLIC vClearInterruptMask
+    PUBLIC PendSV_Handler
+    PUBLIC SVC_Handler
+
+#if ( configENABLE_FPU == 1 )
+    #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
+#endif
+/*-----------------------------------------------------------*/
+
+/*---------------- Unprivileged Functions -------------------*/
+
+/*-----------------------------------------------------------*/
+
+    SECTION .text:CODE:NOROOT(2)
+    THUMB
+/*-----------------------------------------------------------*/
+
+xIsPrivileged:
+    mrs r0, control                         /* r0 = CONTROL. */
+    movs r1, #1                             /* r1 = 1. */
+    tst r0, r1                              /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
+    beq running_privileged                  /* If the result of previous AND operation was 0, branch. */
+    movs r0, #0                             /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+    bx lr                                   /* Return. */
+    running_privileged:
+        movs r0, #1                         /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
+        bx lr                               /* Return. */
+
+/*-----------------------------------------------------------*/
+
+vResetPrivilege:
+    mrs r0, control                         /* r0 = CONTROL. */
+    movs r1, #1                             /* r1 = 1. */
+    orrs r0, r1                             /* r0 = r0 | r1. */
+    msr control, r0                         /* CONTROL = r0. */
+    bx lr                                   /* Return to the caller. */
+/*-----------------------------------------------------------*/
+
+/*----------------- Privileged Functions --------------------*/
+
+/*-----------------------------------------------------------*/
+
+    SECTION privileged_functions:CODE:NOROOT(2)
+    THUMB
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+
+vRestoreContextOfFirstTask:
+    program_mpu_first_task:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r0, [r3]                        /* r0 = pxCurrentTCB.*/
+
+        dmb                                 /* Complete outstanding transfers before disabling MPU. */
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        movs r3, #1                         /* r3 = 1. */
+        bics r2, r3                         /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
+        str r2, [r1]                        /* Disable MPU. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+        ldr r1, [r0]                        /* r1 = *r0 i.e. r1 = MAIR0. */
+        ldr r2, =0xe000edc0                 /* r2 = 0xe000edc0 [Location of MAIR0]. */
+        str r1, [r2]                        /* Program MAIR0. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+        ldr r1, =0xe000ed98                 /* r1 = 0xe000ed98 [Location of RNR]. */
+
+        movs r3, #4                         /* r3 = 4. */
+        str r3, [r1]                        /* Program RNR = 4. */
+        ldmia r0!, {r4-r5}                  /* Read first set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write first set of RBAR/RLAR registers. */
+        movs r3, #5                         /* r3 = 5. */
+        str r3, [r1]                        /* Program RNR = 5. */
+        ldmia r0!, {r4-r5}                  /* Read second set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write second set of RBAR/RLAR registers. */
+        movs r3, #6                         /* r3 = 6. */
+        str r3, [r1]                        /* Program RNR = 6. */
+        ldmia r0!, {r4-r5}                  /* Read third set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write third set of RBAR/RLAR registers. */
+        movs r3, #7                         /* r3 = 6. */
+        str r3, [r1]                        /* Program RNR = 7. */
+        ldmia r0!, {r4-r5}                  /* Read fourth set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write fourth set of RBAR/RLAR registers. */
+
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        movs r3, #1                         /* r3 = 1. */
+        orrs r2, r3                         /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
+        str r2, [r1]                        /* Enable MPU. */
+        dsb                                 /* Force memory writes before continuing. */
+
+    restore_context_first_task:
+        ldr r2, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r0, [r2]                        /* r0 = pxCurrentTCB.*/
+        ldr r1, [r0]                        /* r1 = Location of saved context in TCB. */
+
+    restore_special_regs_first_task:
+        subs r1, #16
+        ldmia r1!, {r2-r5}                  /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
+        subs r1, #16
+        msr psp, r2
+    #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+        msr psplim, r3
+    #endif
+        msr control, r4
+        mov lr, r5
+
+    restore_general_regs_first_task:
+        subs r1, #32
+        ldmia r1!, {r4-r7}                  /* r4-r7 contain half of the hardware saved context. */
+        stmia r2!, {r4-r7}                  /* Copy half of the the hardware saved context on the task stack. */
+        ldmia r1!, {r4-r7}                  /* r4-r7 contain rest half of the hardware saved context. */
+        stmia r2!, {r4-r7}                  /* Copy rest half of the the hardware saved context on the task stack. */
+        subs r1, #48
+        ldmia r1!, {r4-r7}                  /* Restore r8-r11. */
+        mov r8, r4                          /* r8 = r4. */
+        mov r9, r5                          /* r9 = r5. */
+        mov r10, r6                         /* r10 = r6. */
+        mov r11, r7                         /* r11 = r7. */
+        subs r1, #32
+        ldmia r1!, {r4-r7}                  /* Restore r4-r7. */
+        subs r1, #16
+
+    restore_context_done_first_task:
+        str r1, [r0]                        /* Save the location where the context should be saved next as the first member of TCB. */
+        bx lr
+
+#else /* configENABLE_MPU */
+
+vRestoreContextOfFirstTask:
+    ldr  r2, =pxCurrentTCB                  /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr  r1, [r2]                           /* Read pxCurrentTCB. */
+    ldr  r0, [r1]                           /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+
+    ldm  r0!, {r1-r2}                       /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+    msr  psplim, r1                         /* Set this task's PSPLIM value. */
+#endif
+    movs r1, #2                             /* r1 = 2. */
+    msr  CONTROL, r1                        /* Switch to use PSP in the thread mode. */
+    adds r0, #32                            /* Discard everything up to r0. */
+    msr  psp, r0                            /* This is now the new top of stack to use in the task. */
+    isb
+    bx   r2                                 /* Finally, branch to EXC_RETURN. */
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+vRaisePrivilege:
+    mrs  r0, control                        /* Read the CONTROL register. */
+    movs r1, #1                             /* r1 = 1. */
+    bics r0, r1                             /* Clear the bit 0. */
+    msr  control, r0                        /* Write back the new CONTROL value. */
+    bx lr                                   /* Return to the caller. */
+/*-----------------------------------------------------------*/
+
+vStartFirstTask:
+    ldr r0, =0xe000ed08                     /* Use the NVIC offset register to locate the stack. */
+    ldr r0, [r0]                            /* Read the VTOR register which gives the address of vector table. */
+    ldr r0, [r0]                            /* The first entry in vector table is stack pointer. */
+    msr msp, r0                             /* Set the MSP back to the start of the stack. */
+    cpsie i                                 /* Globally enable interrupts. */
+    dsb
+    isb
+    svc 102                                 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
+    nop
+/*-----------------------------------------------------------*/
+
+ulSetInterruptMask:
+    mrs r0, PRIMASK
+    cpsid i
+    bx lr
+/*-----------------------------------------------------------*/
+
+vClearInterruptMask:
+    msr PRIMASK, r0
+    bx lr
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+
+PendSV_Handler:
+    ldr r2, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r0, [r2]                            /* r0 = pxCurrentTCB. */
+    ldr r1, [r0]                            /* r1 = Location in TCB where the context should be saved. */
+    mrs r2, psp                             /* r2 = PSP. */
+
+    save_general_regs:
+        stmia r1!, {r4-r7}                  /* Store r4-r7. */
+        mov r4, r8                          /* r4 = r8. */
+        mov r5, r9                          /* r5 = r9. */
+        mov r6, r10                         /* r6 = r10. */
+        mov r7, r11                         /* r7 = r11. */
+        stmia r1!, {r4-r7}                  /* Store r8-r11. */
+        ldmia r2!, {r4-r7}                  /* Copy half of the  hardware saved context into r4-r7. */
+        stmia r1!, {r4-r7}                  /* Store the hardware saved context. */
+        ldmia r2!, {r4-r7}                  /* Copy rest half of the  hardware saved context into r4-r7. */
+        stmia r1!, {r4-r7}                  /* Store the hardware saved context. */
+
+    save_special_regs:
+        mrs r2, psp                         /* r2 = PSP. */
+    #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+        mrs r3, psplim                      /* r3 = PSPLIM. */
+    #else
+        movs r3, #0                         /* r3 = 0. 0 is stored in the PSPLIM slot. */
+    #endif
+        mrs r4, control                     /* r4 = CONTROL. */
+        mov r5, lr                          /* r5 = LR. */
+        stmia r1!, {r2-r5}                  /* Store original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+        str r1, [r0]                        /* Save the location from where the context should be restored as the first member of TCB. */
+
+    select_next_task:
+        cpsid i
+        bl vTaskSwitchContext
+        cpsie i
+
+    program_mpu:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r0, [r3]                        /* r0 = pxCurrentTCB.*/
+
+        dmb                                 /* Complete outstanding transfers before disabling MPU. */
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        movs r3, #1                         /* r3 = 1. */
+        bics r2, r3                         /* r2 = r2 & ~r3 i.e. Clear the bit 0 in r2. */
+        str r2, [r1]                        /* Disable MPU. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+        ldr r1, [r0]                        /* r1 = *r0 i.e. r1 = MAIR0. */
+        ldr r2, =0xe000edc0                 /* r2 = 0xe000edc0 [Location of MAIR0]. */
+        str r1, [r2]                        /* Program MAIR0. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+        ldr r1, =0xe000ed98                 /* r1 = 0xe000ed98 [Location of RNR]. */
+
+        movs r3, #4                         /* r3 = 4. */
+        str r3, [r1]                        /* Program RNR = 4. */
+        ldmia r0!, {r4-r5}                  /* Read first set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write first set of RBAR/RLAR registers. */
+        movs r3, #5                         /* r3 = 5. */
+        str r3, [r1]                        /* Program RNR = 5. */
+        ldmia r0!, {r4-r5}                  /* Read second set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write second set of RBAR/RLAR registers. */
+        movs r3, #6                         /* r3 = 6. */
+        str r3, [r1]                        /* Program RNR = 6. */
+        ldmia r0!, {r4-r5}                  /* Read third set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write third set of RBAR/RLAR registers. */
+        movs r3, #7                         /* r3 = 6. */
+        str r3, [r1]                        /* Program RNR = 7. */
+        ldmia r0!, {r4-r5}                  /* Read fourth set of RBAR/RLAR registers from TCB. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+        stmia r2!, {r4-r5}                  /* Write fourth set of RBAR/RLAR registers. */
+
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        movs r3, #1                         /* r3 = 1. */
+        orrs r2, r3                         /* r2 = r2 | r3 i.e. Set the bit 0 in r2. */
+        str r2, [r1]                        /* Enable MPU. */
+        dsb                                 /* Force memory writes before continuing. */
+
+    restore_context:
+        ldr r2, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r0, [r2]                        /* r0 = pxCurrentTCB.*/
+        ldr r1, [r0]                        /* r1 = Location of saved context in TCB. */
+
+    restore_special_regs:
+        subs r1, #16
+        ldmia r1!, {r2-r5}                  /* r2 = original PSP, r3 = PSPLIM, r4 = CONTROL, r5 = LR. */
+        subs r1, #16
+        msr psp, r2
+    #if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+        msr psplim, r3
+    #endif
+        msr control, r4
+        mov lr, r5
+
+    restore_general_regs:
+        subs r1, #32
+        ldmia r1!, {r4-r7}                  /* r4-r7 contain half of the hardware saved context. */
+        stmia r2!, {r4-r7}                  /* Copy half of the the hardware saved context on the task stack. */
+        ldmia r1!, {r4-r7}                  /* r4-r7 contain rest half of the hardware saved context. */
+        stmia r2!, {r4-r7}                  /* Copy rest half of the the hardware saved context on the task stack. */
+        subs r1, #48
+        ldmia r1!, {r4-r7}                  /* Restore r8-r11. */
+        mov r8, r4                          /* r8 = r4. */
+        mov r9, r5                          /* r9 = r5. */
+        mov r10, r6                         /* r10 = r6. */
+        mov r11, r7                         /* r11 = r7. */
+        subs r1, #32
+        ldmia r1!, {r4-r7}                  /* Restore r4-r7. */
+        subs r1, #16
+
+    restore_context_done:
+        str r1, [r0]                        /* Save the location where the context should be saved next as the first member of TCB. */
+        bx lr
+
+#else /* configENABLE_MPU */
+
+PendSV_Handler:
+    mrs r0, psp                             /* Read PSP in r0. */
+    ldr r2, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r1, [r2]                            /* Read pxCurrentTCB. */
+
+    subs r0, r0, #40                        /* Make space for PSPLIM, LR and the remaining registers on the stack. */
+    str r0, [r1]                            /* Save the new top of stack in TCB. */
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+    mrs r2, psplim                          /* r2 = PSPLIM. */
+#else
+    movs r2, #0                             /* r0 = 0. 0 is stored in the PSPLIM slot. */
+#endif
+    mov r3, lr                              /* r3 = LR/EXC_RETURN. */
+    stmia r0!, {r2-r7}                      /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
+    mov r4, r8                              /* r4 = r8. */
+    mov r5, r9                              /* r5 = r9. */
+    mov r6, r10                             /* r6 = r10. */
+    mov r7, r11                             /* r7 = r11. */
+    stmia r0!, {r4-r7}                      /* Store the high registers that are not saved automatically. */
+
+    cpsid i
+    bl vTaskSwitchContext
+    cpsie i
+
+    ldr r2, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r1, [r2]                            /* Read pxCurrentTCB. */
+    ldr r0, [r1]                            /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
+
+    adds r0, r0, #24                        /* Move to the high registers. */
+    ldmia r0!, {r4-r7}                      /* Restore the high registers that are not automatically restored. */
+    mov r8, r4                              /* r8 = r4. */
+    mov r9, r5                              /* r9 = r5. */
+    mov r10, r6                             /* r10 = r6. */
+    mov r11, r7                             /* r11 = r7. */
+    msr psp, r0                             /* Remember the new top of stack for the task. */
+    subs r0, r0, #40                        /* Move to the starting of the saved context. */
+    ldmia r0!, {r2-r7}                      /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
+#if ( configRUN_FREERTOS_SECURE_ONLY == 1 )
+    msr psplim, r2                          /* Restore the PSPLIM register value for the task. */
+#endif
+    bx r3
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
+SVC_Handler:
+    movs r0, #4
+    mov r1, lr
+    tst r0, r1
+    beq stack_on_msp
+    stack_on_psp:
+        mrs r0, psp
+        b route_svc
+    stack_on_msp:
+        mrs r0, msp
+        b route_svc
+
+    route_svc:
+        ldr r3, [r0, #24]
+        subs r3, #2
+        ldrb r2, [r3, #0]
+        cmp r2, #NUM_SYSTEM_CALLS
+        blt system_call_enter
+        cmp r2, #104        /* portSVC_SYSTEM_CALL_EXIT. */
+        beq system_call_exit
+        b vPortSVCHandler_C
+
+    system_call_enter:
+        b vSystemCallEnter
+    system_call_exit:
+        b vSystemCallExit
+
+#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+SVC_Handler:
+    movs r0, #4
+    mov r1, lr
+    tst r0, r1
+    beq stacking_used_msp
+    mrs r0, psp
+    b vPortSVCHandler_C
+    stacking_used_msp:
+        mrs r0, msp
+        b vPortSVCHandler_C
+
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+/*-----------------------------------------------------------*/
+
+    END

portable/ARMv8M/non_secure/portable/IAR/ARM_CM23_NTZ/portmacro.h

@@ -1,308 +1,85 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*------------------------------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the given hardware
- * and compiler.
- *
- * These settings should not be altered.
- *------------------------------------------------------------------------------
- */
-
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
-
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
-
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
-
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Type definitions.
- */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
-
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * Architecture specifics.
- */
-#define portARCH_NAME										"Cortex-M23"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Extern declarations.
- */
-extern BaseType_t xPortIsInsideInterrupt( void );
-
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
-
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
-
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief MPU specific constants.
- */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
-
-
-/* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
-
-/* Device memory attributes used in MPU_MAIR registers.
- *
- * 8-bit values encoded as follows:
- *  Bit[7:4] - 0000 - Device Memory
- *  Bit[3:2] - 00 --> Device-nGnRnE
- *				01 --> Device-nGnRE
- *				10 --> Device-nGRE
- *				11 --> Device-GRE
- *  Bit[1:0] - 00, Reserved.
- */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
-
-/* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
-
-/* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
-
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
-
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Settings to define an MPU region.
- */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
-
-/**
- * @brief MPU settings as stored in the TCB.
- */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief SVC numbers.
- */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Scheduler utilities.
- */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Critical section management.
- */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							__asm volatile ( " cpsid i " ::: "memory" )
-#define portENABLE_INTERRUPTS()								__asm volatile ( " cpsie i " ::: "memory" )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Task function macros as described on the FreeRTOS.org WEB site.
- */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
-
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
-
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
-
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Barriers.
- */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
-/*-----------------------------------------------------------*/
-
-/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
- * the source code because to do so would cause other compilers to generate
- * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
-/*-----------------------------------------------------------*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M23"
+#define portHAS_ARMV8M_MAIN_EXTENSION    0
+#define portDONT_DISCARD                 __root
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+#if ( configTOTAL_MPU_REGIONS == 16 )
+    #error 16 MPU regions are not yet supported for this port.
+#endif
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    __asm volatile ( " cpsid i " ::: "memory" )
+#define portENABLE_INTERRUPTS()     __asm volatile ( " cpsie i " ::: "memory" )
+/*-----------------------------------------------------------*/
+
+/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
+ * the source code because to do so would cause other compilers to generate
+ * warnings. */
+#pragma diag_suppress=Be006
+#pragma diag_suppress=Pa082
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s

@@ -1,341 +1,496 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-/* Including FreeRTOSConfig.h here will cause build errors if the header file
-contains code not understood by the assembler - for example the 'extern' keyword.
-To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
-the code is included in C files but excluded by the preprocessor in assembly
-files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
-#include "FreeRTOSConfig.h"
-
-	EXTERN pxCurrentTCB
-	EXTERN xSecureContext
-	EXTERN vTaskSwitchContext
-	EXTERN vPortSVCHandler_C
-	EXTERN SecureContext_SaveContext
-	EXTERN SecureContext_LoadContext
-
-	PUBLIC xIsPrivileged
-	PUBLIC vResetPrivilege
-	PUBLIC vPortAllocateSecureContext
-	PUBLIC vRestoreContextOfFirstTask
-	PUBLIC vRaisePrivilege
-	PUBLIC vStartFirstTask
-	PUBLIC ulSetInterruptMask
-	PUBLIC vClearInterruptMask
-	PUBLIC PendSV_Handler
-	PUBLIC SVC_Handler
-	PUBLIC vPortFreeSecureContext
-/*-----------------------------------------------------------*/
-
-/*---------------- Unprivileged Functions -------------------*/
-
-/*-----------------------------------------------------------*/
-
-	SECTION .text:CODE:NOROOT(2)
-	THUMB
-/*-----------------------------------------------------------*/
-
-xIsPrivileged:
-	mrs r0, control							/* r0 = CONTROL. */
-	tst r0, #1								/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
-	ite ne
-	movne r0, #0							/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
-	moveq r0, #1							/* CONTROL[0]==0. Return true to indicate that the processor is not privileged. */
-	bx lr									/* Return. */
-/*-----------------------------------------------------------*/
-
-vResetPrivilege:
-	mrs r0, control							/* r0 = CONTROL. */
-	orr r0, r0, #1							/* r0 = r0 | 1. */
-	msr control, r0							/* CONTROL = r0. */
-	bx lr									/* Return to the caller. */
-/*-----------------------------------------------------------*/
-
-vPortAllocateSecureContext:
-	svc 0									/* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 0. */
-	bx lr									/* Return. */
-/*-----------------------------------------------------------*/
-
-/*----------------- Privileged Functions --------------------*/
-
-/*-----------------------------------------------------------*/
-
-	SECTION privileged_functions:CODE:NOROOT(2)
-	THUMB
-/*-----------------------------------------------------------*/
-
-vRestoreContextOfFirstTask:
-	ldr  r2, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr  r3, [r2]							/* Read pxCurrentTCB. */
-	ldr  r0, [r3]							/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
-
-#if ( configENABLE_MPU == 1 )
-	dmb										/* Complete outstanding transfers before disabling MPU. */
-	ldr r2, =0xe000ed94						/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	ldr r4, [r2]							/* Read the value of MPU_CTRL. */
-	bic r4, r4, #1							/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-	str r4, [r2]							/* Disable MPU. */
-
-	adds r3, #4								/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-	ldr  r4, [r3]							/* r4 = *r3 i.e. r4 = MAIR0. */
-	ldr  r2, =0xe000edc0					/* r2 = 0xe000edc0 [Location of MAIR0]. */
-	str  r4, [r2]							/* Program MAIR0. */
-	ldr  r2, =0xe000ed98					/* r2 = 0xe000ed98 [Location of RNR]. */
-	movs r4, #4								/* r4 = 4. */
-	str  r4, [r2]							/* Program RNR = 4. */
-	adds r3, #4								/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-	ldr  r2, =0xe000ed9c					/* r2 = 0xe000ed9c [Location of RBAR]. */
-	ldmia r3!, {r4-r11}						/* Read 4 set of RBAR/RLAR registers from TCB. */
-	stmia r2!, {r4-r11}						/* Write 4 set of RBAR/RLAR registers using alias registers. */
-
-	ldr r2, =0xe000ed94						/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-	ldr r4, [r2]							/* Read the value of MPU_CTRL. */
-	orr r4, r4, #1							/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-	str r4, [r2]							/* Enable MPU. */
-	dsb										/* Force memory writes before continuing. */
-#endif /* configENABLE_MPU */
-
-#if ( configENABLE_MPU == 1 )
-	ldm  r0!, {r1-r4}						/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
-	ldr  r5, =xSecureContext
-	str  r1, [r5]							/* Set xSecureContext to this task's value for the same. */
-	msr  psplim, r2							/* Set this task's PSPLIM value. */
-	msr  control, r3						/* Set this task's CONTROL value. */
-	adds r0, #32							/* Discard everything up to r0. */
-	msr  psp, r0							/* This is now the new top of stack to use in the task. */
-	isb
-	bx   r4									/* Finally, branch to EXC_RETURN. */
-#else /* configENABLE_MPU */
-	ldm  r0!, {r1-r3}						/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
-	ldr  r4, =xSecureContext
-	str  r1, [r4]							/* Set xSecureContext to this task's value for the same. */
-	msr  psplim, r2							/* Set this task's PSPLIM value. */
-	movs r1, #2								/* r1 = 2. */
-	msr  CONTROL, r1						/* Switch to use PSP in the thread mode. */
-	adds r0, #32							/* Discard everything up to r0. */
-	msr  psp, r0							/* This is now the new top of stack to use in the task. */
-	isb
-	bx   r3									/* Finally, branch to EXC_RETURN. */
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-vRaisePrivilege:
-	mrs  r0, control						/* Read the CONTROL register. */
-	bic r0, r0, #1							/* Clear the bit 0. */
-	msr  control, r0						/* Write back the new CONTROL value. */
-	bx lr									/* Return to the caller. */
-/*-----------------------------------------------------------*/
-
-vStartFirstTask:
-	ldr r0, =0xe000ed08						/* Use the NVIC offset register to locate the stack. */
-	ldr r0, [r0]							/* Read the VTOR register which gives the address of vector table. */
-	ldr r0, [r0]							/* The first entry in vector table is stack pointer. */
-	msr msp, r0								/* Set the MSP back to the start of the stack. */
-	cpsie i									/* Globally enable interrupts. */
-	cpsie f
-	dsb
-	isb
-	svc 2									/* System call to start the first task. portSVC_START_SCHEDULER = 2. */
-/*-----------------------------------------------------------*/
-
-ulSetInterruptMask:
-	mrs r0, basepri							/* r0 = basepri. Return original basepri value. */
-	mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-	msr basepri, r1							/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-	dsb
-	isb
-	bx lr									/* Return. */
-/*-----------------------------------------------------------*/
-
-vClearInterruptMask:
-	msr basepri, r0							/* basepri = ulMask. */
-	dsb
-	isb
-	bx lr									/* Return. */
-/*-----------------------------------------------------------*/
-
-PendSV_Handler:
-	mrs r1, psp								/* Read PSP in r1. */
-	ldr r2, =xSecureContext					/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-	ldr r0, [r2]							/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
-
-	cbz r0, save_ns_context					/* No secure context to save. */
-	push {r0-r2, r14}
-	bl SecureContext_SaveContext
-	pop {r0-r3}								/* LR is now in r3. */
-	mov lr, r3								/* LR = r3. */
-	lsls r2, r3, #25						/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-	bpl save_ns_context						/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-	ldr r3, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-	ldr r2, [r3]							/* Read pxCurrentTCB. */
-#if ( configENABLE_MPU == 1 )
-	subs r1, r1, #16						/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	str r1, [r2]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
-	mrs r3, control							/* r3 = CONTROL. */
-	mov r4, lr								/* r4 = LR/EXC_RETURN. */
-	stmia r1!, {r0, r2-r4}					/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-#else /* configENABLE_MPU */
-	subs r1, r1, #12						/* Make space for xSecureContext, PSPLIM and LR on the stack. */
-	str r1, [r2]							/* Save the new top of stack in TCB. */
-	mrs r2, psplim							/* r2 = PSPLIM. */
-	mov r3, lr								/* r3 = LR/EXC_RETURN. */
-	stmia r1!, {r0, r2-r3}					/* Store xSecureContext, PSPLIM and LR on the stack. */
-#endif /* configENABLE_MPU */
-	b select_next_task
-
-	save_ns_context:
-		ldr r3, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-		ldr r2, [r3]						/* Read pxCurrentTCB. */
-	#if ( configENABLE_FPU == 1 )
-		tst lr, #0x10						/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-		it eq
-		vstmdbeq r1!, {s16-s31}				/* Store the FPU registers which are not saved automatically. */
-	#endif /* configENABLE_FPU */
-	#if ( configENABLE_MPU == 1 )
-		subs r1, r1, #48					/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
-		str r1, [r2]						/* Save the new top of stack in TCB. */
-		adds r1, r1, #16					/* r1 = r1 + 16. */
-		stm r1, {r4-r11}					/* Store the registers that are not saved automatically. */
-		mrs r2, psplim						/* r2 = PSPLIM. */
-		mrs r3, control						/* r3 = CONTROL. */
-		mov r4, lr							/* r4 = LR/EXC_RETURN. */
-		subs r1, r1, #16					/* r1 = r1 - 16. */
-		stm r1, {r0, r2-r4}					/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
-	#else /* configENABLE_MPU */
-		subs r1, r1, #44					/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
-		str r1, [r2]						/* Save the new top of stack in TCB. */
-		adds r1, r1, #12					/* r1 = r1 + 12. */
-		stm r1, {r4-r11}					/* Store the registers that are not saved automatically. */
-		mrs r2, psplim						/* r2 = PSPLIM. */
-		mov r3, lr							/* r3 = LR/EXC_RETURN. */
-		subs r1, r1, #12					/* r1 = r1 - 12. */
-		stmia r1!, {r0, r2-r3}				/* Store xSecureContext, PSPLIM and LR on the stack. */
-	#endif /* configENABLE_MPU */
-
-	select_next_task:
-		mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
-		msr basepri, r0						/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
-		dsb
-		isb
-		bl vTaskSwitchContext
-		mov r0, #0							/* r0 = 0. */
-		msr basepri, r0						/* Enable interrupts. */
-
-		ldr r2, =pxCurrentTCB				/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
-		ldr r3, [r2]						/* Read pxCurrentTCB. */
-		ldr r1, [r3]						/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
-
-	#if ( configENABLE_MPU == 1 )
-		dmb									/* Complete outstanding transfers before disabling MPU. */
-		ldr r2, =0xe000ed94					/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-		ldr r4, [r2]						/* Read the value of MPU_CTRL. */
-		bic r4, r4, #1						/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
-		str r4, [r2]						/* Disable MPU. */
-
-		adds r3, #4							/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
-		ldr r4, [r3]						/* r4 = *r3 i.e. r4 = MAIR0. */
-		ldr r2, =0xe000edc0					/* r2 = 0xe000edc0 [Location of MAIR0]. */
-		str r4, [r2]						/* Program MAIR0. */
-		ldr r2, =0xe000ed98					/* r2 = 0xe000ed98 [Location of RNR]. */
-		movs r4, #4							/* r4 = 4. */
-		str r4, [r2]						/* Program RNR = 4. */
-		adds r3, #4							/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
-		ldr  r2, =0xe000ed9c				/* r2 = 0xe000ed9c [Location of RBAR]. */
-		ldmia r3!, {r4-r11}					/* Read 4 sets of RBAR/RLAR registers from TCB. */
-		stmia r2!, {r4-r11}					/* Write 4 set of RBAR/RLAR registers using alias registers. */
-
-		ldr r2, =0xe000ed94					/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
-		ldr r4, [r2]						/* Read the value of MPU_CTRL. */
-		orr r4, r4, #1						/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
-		str r4, [r2]						/* Enable MPU. */
-		dsb									/* Force memory writes before continuing. */
-	#endif /* configENABLE_MPU */
-
-	#if ( configENABLE_MPU == 1 )
-		ldmia r1!, {r0, r2-r4}				/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
-		msr psplim, r2						/* Restore the PSPLIM register value for the task. */
-		msr control, r3						/* Restore the CONTROL register value for the task. */
-		mov lr, r4							/* LR = r4. */
-		ldr r2, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-		str r0, [r2]						/* Restore the task's xSecureContext. */
-		cbz r0, restore_ns_context			/* If there is no secure context for the task, restore the non-secure context. */
-		push {r1,r4}
-		bl SecureContext_LoadContext		/* Restore the secure context. */
-		pop {r1,r4}
-		mov lr, r4							/* LR = r4. */
-		lsls r2, r4, #25					/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-		bpl restore_ns_context				/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
-		bx lr
-	#else /* configENABLE_MPU */
-		ldmia r1!, {r0, r2-r3}				/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
-		msr psplim, r2						/* Restore the PSPLIM register value for the task. */
-		mov lr, r3							/* LR = r3. */
-		ldr r2, =xSecureContext				/* Read the location of xSecureContext i.e. &( xSecureContext ). */
-		str r0, [r2]						/* Restore the task's xSecureContext. */
-		cbz r0, restore_ns_context			/* If there is no secure context for the task, restore the non-secure context. */
-		push {r1,r3}
-		bl SecureContext_LoadContext		/* Restore the secure context. */
-		pop {r1,r3}
-		mov lr, r3							/* LR = r3. */
-		lsls r2, r3, #25					/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
-		bpl restore_ns_context				/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
-		msr psp, r1							/* Remember the new top of stack for the task. */
-		bx lr
-	#endif /* configENABLE_MPU */
-
-	restore_ns_context:
-		ldmia r1!, {r4-r11}					/* Restore the registers that are not automatically restored. */
-	#if ( configENABLE_FPU == 1 )
-		tst lr, #0x10						/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
-		it eq
-		vldmiaeq r1!, {s16-s31}				/* Restore the FPU registers which are not restored automatically. */
-	#endif /* configENABLE_FPU */
-		msr psp, r1							/* Remember the new top of stack for the task. */
-		bx lr
-/*-----------------------------------------------------------*/
-
-SVC_Handler:
-	tst lr, #4
-	ite eq
-	mrseq r0, msp
-	mrsne r0, psp
-	b vPortSVCHandler_C
-/*-----------------------------------------------------------*/
-
-vPortFreeSecureContext:
-	/* r0 = uint32_t *pulTCB. */
-	ldr r1, [r0]							/* The first item in the TCB is the top of the stack. */
-	ldr r0, [r1]							/* The first item on the stack is the task's xSecureContext. */
-	cmp r0, #0								/* Raise svc if task's xSecureContext is not NULL. */
-	it ne
-	svcne 1									/* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 1. */
-	bx lr									/* Return. */
-/*-----------------------------------------------------------*/
-
-	END
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+/* Including FreeRTOSConfig.h here will cause build errors if the header file
+contains code not understood by the assembler - for example the 'extern' keyword.
+To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
+the code is included in C files but excluded by the preprocessor in assembly
+files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
+#include "FreeRTOSConfig.h"
+
+/* System call numbers includes. */
+#include "mpu_syscall_numbers.h"
+
+#ifndef configUSE_MPU_WRAPPERS_V1
+    #define configUSE_MPU_WRAPPERS_V1 0
+#endif
+
+    EXTERN pxCurrentTCB
+    EXTERN xSecureContext
+    EXTERN vTaskSwitchContext
+    EXTERN vPortSVCHandler_C
+    EXTERN SecureContext_SaveContext
+    EXTERN SecureContext_LoadContext
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+    EXTERN vSystemCallEnter
+    EXTERN vSystemCallExit
+#endif
+
+    PUBLIC xIsPrivileged
+    PUBLIC vResetPrivilege
+    PUBLIC vPortAllocateSecureContext
+    PUBLIC vRestoreContextOfFirstTask
+    PUBLIC vRaisePrivilege
+    PUBLIC vStartFirstTask
+    PUBLIC ulSetInterruptMask
+    PUBLIC vClearInterruptMask
+    PUBLIC PendSV_Handler
+    PUBLIC SVC_Handler
+    PUBLIC vPortFreeSecureContext
+/*-----------------------------------------------------------*/
+
+/*---------------- Unprivileged Functions -------------------*/
+
+/*-----------------------------------------------------------*/
+
+    SECTION .text:CODE:NOROOT(2)
+    THUMB
+/*-----------------------------------------------------------*/
+
+xIsPrivileged:
+    mrs r0, control                         /* r0 = CONTROL. */
+    tst r0, #1                              /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
+    ite ne
+    movne r0, #0                            /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
+    moveq r0, #1                            /* CONTROL[0]==0. Return true to indicate that the processor is not privileged. */
+    bx lr                                   /* Return. */
+/*-----------------------------------------------------------*/
+
+vResetPrivilege:
+    mrs r0, control                         /* r0 = CONTROL. */
+    orr r0, r0, #1                          /* r0 = r0 | 1. */
+    msr control, r0                         /* CONTROL = r0. */
+    bx lr                                   /* Return to the caller. */
+/*-----------------------------------------------------------*/
+
+vPortAllocateSecureContext:
+    svc 100                                 /* Secure context is allocated in the supervisor call. portSVC_ALLOCATE_SECURE_CONTEXT = 100. */
+    bx lr                                   /* Return. */
+/*-----------------------------------------------------------*/
+
+/*----------------- Privileged Functions --------------------*/
+
+/*-----------------------------------------------------------*/
+
+    SECTION privileged_functions:CODE:NOROOT(2)
+    THUMB
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+
+vRestoreContextOfFirstTask:
+    program_mpu_first_task:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r0, [r3]                        /* r0 = pxCurrentTCB. */
+
+        dmb                                 /* Complete outstanding transfers before disabling MPU. */
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        bic r2, #1                          /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
+        str r2, [r1]                        /* Disable MPU. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+        ldr r1, [r0]                        /* r1 = *r0 i.e. r1 = MAIR0. */
+        ldr r2, =0xe000edc0                 /* r2 = 0xe000edc0 [Location of MAIR0]. */
+        str r1, [r2]                        /* Program MAIR0. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+        ldr r1, =0xe000ed98                 /* r1 = 0xe000ed98 [Location of RNR]. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+
+        movs r3, #4                         /* r3 = 4. */
+        str r3, [r1]                        /* Program RNR = 4. */
+        ldmia r0!, {r4-r11}                 /* Read 4 set of RBAR/RLAR registers from TCB. */
+        stmia r2, {r4-r11}                  /* Write 4 set of RBAR/RLAR registers using alias registers. */
+
+    #if ( configTOTAL_MPU_REGIONS == 16 )
+        movs r3, #8                         /* r3 = 8. */
+        str r3, [r1]                        /* Program RNR = 8. */
+        ldmia r0!, {r4-r11}                 /* Read 4 set of RBAR/RLAR registers from TCB. */
+        stmia r2, {r4-r11}                  /* Write 4 set of RBAR/RLAR registers using alias registers. */
+        movs r3, #12                        /* r3 = 12. */
+        str r3, [r1]                        /* Program RNR = 12. */
+        ldmia r0!, {r4-r11}                 /* Read 4 set of RBAR/RLAR registers from TCB. */
+        stmia r2, {r4-r11}                  /* Write 4 set of RBAR/RLAR registers using alias registers. */
+    #endif /* configTOTAL_MPU_REGIONS == 16 */
+
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        orr r2, #1                          /* r2 = r1 | 1 i.e. Set the bit 0 in r2. */
+        str r2, [r1]                        /* Enable MPU. */
+        dsb                                 /* Force memory writes before continuing. */
+
+    restore_context_first_task:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* r1 = pxCurrentTCB.*/
+        ldr r2, [r1]                        /* r2 = Location of saved context in TCB. */
+
+    restore_special_regs_first_task:
+        ldmdb r2!, {r0, r3-r5, lr}          /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
+        msr psp, r3
+        msr psplim, r4
+        msr control, r5
+        ldr r4, =xSecureContext             /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        str r0, [r4]                        /* Restore xSecureContext. */
+
+    restore_general_regs_first_task:
+        ldmdb r2!, {r4-r11}                 /* r4-r11 contain hardware saved context. */
+        stmia r3!, {r4-r11}                 /* Copy the hardware saved context on the task stack. */
+        ldmdb r2!, {r4-r11}                 /* r4-r11 restored. */
+
+    restore_context_done_first_task:
+        str r2, [r1]                        /* Save the location where the context should be saved next as the first member of TCB. */
+        mov r0, #0
+        msr basepri, r0                     /* Ensure that interrupts are enabled when the first task starts. */
+        bx lr
+
+#else /* configENABLE_MPU */
+
+vRestoreContextOfFirstTask:
+    ldr  r2, =pxCurrentTCB                  /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr  r3, [r2]                           /* Read pxCurrentTCB. */
+    ldr  r0, [r3]                           /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
+
+    ldm  r0!, {r1-r3}                       /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
+    ldr  r4, =xSecureContext
+    str  r1, [r4]                           /* Set xSecureContext to this task's value for the same. */
+    msr  psplim, r2                         /* Set this task's PSPLIM value. */
+    movs r1, #2                             /* r1 = 2. */
+    msr  CONTROL, r1                        /* Switch to use PSP in the thread mode. */
+    adds r0, #32                            /* Discard everything up to r0. */
+    msr  psp, r0                            /* This is now the new top of stack to use in the task. */
+    isb
+    mov  r0, #0
+    msr  basepri, r0                        /* Ensure that interrupts are enabled when the first task starts. */
+    bx   r3                                 /* Finally, branch to EXC_RETURN. */
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+vRaisePrivilege:
+    mrs  r0, control                        /* Read the CONTROL register. */
+    bic r0, r0, #1                          /* Clear the bit 0. */
+    msr  control, r0                        /* Write back the new CONTROL value. */
+    bx lr                                   /* Return to the caller. */
+/*-----------------------------------------------------------*/
+
+vStartFirstTask:
+    ldr r0, =0xe000ed08                     /* Use the NVIC offset register to locate the stack. */
+    ldr r0, [r0]                            /* Read the VTOR register which gives the address of vector table. */
+    ldr r0, [r0]                            /* The first entry in vector table is stack pointer. */
+    msr msp, r0                             /* Set the MSP back to the start of the stack. */
+    cpsie i                                 /* Globally enable interrupts. */
+    cpsie f
+    dsb
+    isb
+    svc 102                                 /* System call to start the first task. portSVC_START_SCHEDULER = 102. */
+/*-----------------------------------------------------------*/
+
+ulSetInterruptMask:
+    mrs r0, basepri                         /* r0 = basepri. Return original basepri value. */
+    mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
+    msr basepri, r1                         /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+    dsb
+    isb
+    bx lr                                   /* Return. */
+/*-----------------------------------------------------------*/
+
+vClearInterruptMask:
+    msr basepri, r0                         /* basepri = ulMask. */
+    dsb
+    isb
+    bx lr                                   /* Return. */
+/*-----------------------------------------------------------*/
+
+#if ( configENABLE_MPU == 1 )
+
+PendSV_Handler:
+    ldr r3, =xSecureContext                 /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+    ldr r0, [r3]                            /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+    ldr r3, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r1, [r3]                            /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+    ldr r2, [r1]                            /* r2 = Location in TCB where the context should be saved. */
+
+    cbz r0, save_ns_context                 /* No secure context to save. */
+    save_s_context:
+        push {r0-r2, lr}
+        bl SecureContext_SaveContext        /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+        pop {r0-r2, lr}
+
+    save_ns_context:
+        mov r3, lr                          /* r3 = LR (EXC_RETURN). */
+        lsls r3, r3, #25                    /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        bmi save_special_regs               /* r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
+
+    save_general_regs:
+        mrs r3, psp
+
+    #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+        add r3, r3, #0x20                   /* Move r3 to location where s0 is saved. */
+        tst lr, #0x10
+        ittt eq
+        vstmiaeq r2!, {s16-s31}             /* Store s16-s31. */
+        vldmiaeq r3, {s0-s16}               /* Copy hardware saved FP context into s0-s16. */
+        vstmiaeq r2!, {s0-s16}              /* Store hardware saved FP context. */
+        sub r3, r3, #0x20                   /* Set r3 back to the location of hardware saved context. */
+    #endif /* configENABLE_FPU || configENABLE_MVE */
+
+        stmia r2!, {r4-r11}                 /* Store r4-r11. */
+        ldmia r3, {r4-r11}                  /* Copy the hardware saved context into r4-r11. */
+        stmia r2!, {r4-r11}                 /* Store the hardware saved context. */
+
+    save_special_regs:
+        mrs r3, psp                         /* r3 = PSP. */
+        mrs r4, psplim                      /* r4 = PSPLIM. */
+        mrs r5, control                     /* r5 = CONTROL. */
+        stmia r2!, {r0, r3-r5, lr}          /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
+        str r2, [r1]                        /* Save the location from where the context should be restored as the first member of TCB. */
+
+    select_next_task:
+        mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
+        msr basepri, r0                     /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        dsb
+        isb
+        bl vTaskSwitchContext
+        mov r0, #0                          /* r0 = 0. */
+        msr basepri, r0                     /* Enable interrupts. */
+
+    program_mpu:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r0, [r3]                        /* r0 = pxCurrentTCB.*/
+
+        dmb                                 /* Complete outstanding transfers before disabling MPU. */
+        ldr r1, =0xe000ed94                 /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+        ldr r2, [r1]                        /* Read the value of MPU_CTRL. */
+        bic r2, #1                          /* r2 = r2 & ~1 i.e. Clear the bit 0 in r2. */
+        str r2, [r1]                        /* Disable MPU. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to MAIR0 in TCB. */
+        ldr r1, [r0]                        /* r1 = *r0 i.e. r1 = MAIR0. */
+        ldr r2, =0xe000edc0                 /* r2 = 0xe000edc0 [Location of MAIR0]. */
+        str r1, [r2]                        /* Program MAIR0. */
+
+        adds r0, #4                         /* r0 = r0 + 4. r0 now points to first RBAR in TCB. */
+        ldr r1, =0xe000ed98                 /* r1 = 0xe000ed98 [Location of RNR]. */
+        ldr r2, =0xe000ed9c                 /* r2 = 0xe000ed9c [Location of RBAR]. */
+
+        movs r3, #4                         /* r3 = 4. */
+        str r3, [r1]                        /* Program RNR = 4. */
+        ldmia r0!, {r4-r11}                 /* Read 4 sets of RBAR/RLAR registers from TCB. */
+        stmia r2, {r4-r11}                  /* Write 4 set of RBAR/RLAR registers using alias registers. */
+
+    #if ( configTOTAL_MPU_REGIONS == 16 )
+        movs r3, #8                         /* r3 = 8. */
+        str r3, [r1]                        /* Program RNR = 8. */
+        ldmia r0!, {r4-r11}                 /* Read 4 sets of RBAR/RLAR registers from TCB. */
+        stmia r2, {r4-r11}                  /* Write 4 set of RBAR/RLAR registers using alias registers. */
+        movs r3, #12                        /* r3 = 12. */
+        str r3, [r1]                        /* Program RNR = 12. */
+        ldmia r0!, {r4-r11}                 /* Read 4 sets of RBAR/RLAR registers from TCB. */
+        stmia r2, {r4-r11}                  /* Write 4 set of RBAR/RLAR registers using alias registers. */
+    #endif /* configTOTAL_MPU_REGIONS == 16 */
+
+       ldr r1, =0xe000ed94                  /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
+       ldr r2, [r1]                         /* Read the value of MPU_CTRL. */
+       orr r2, #1                           /* r2 = r2 | 1 i.e. Set the bit 0 in r2. */
+       str r2, [r1]                         /* Enable MPU. */
+       dsb                                  /* Force memory writes before continuing. */
+
+    restore_context:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* r1 = pxCurrentTCB.*/
+        ldr r2, [r1]                        /* r2 = Location of saved context in TCB. */
+
+    restore_special_regs:
+        ldmdb r2!, {r0, r3-r5, lr}          /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
+        msr psp, r3
+        msr psplim, r4
+        msr control, r5
+        ldr r4, =xSecureContext             /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        str r0, [r4]                        /* Restore xSecureContext. */
+        cbz r0, restore_ns_context          /* No secure context to restore. */
+
+    restore_s_context:
+        push {r1-r3, lr}
+        bl SecureContext_LoadContext        /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+        pop {r1-r3, lr}
+
+    restore_ns_context:
+        mov r0, lr                          /* r0 = LR (EXC_RETURN). */
+        lsls r0, r0, #25                    /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        bmi restore_context_done            /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
+
+    restore_general_regs:
+        ldmdb r2!, {r4-r11}                 /* r4-r11 contain hardware saved context. */
+        stmia r3!, {r4-r11}                 /* Copy the hardware saved context on the task stack. */
+        ldmdb r2!, {r4-r11}                 /* r4-r11 restored. */
+
+    #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+        tst lr, #0x10
+        ittt eq
+        vldmdbeq r2!, {s0-s16}              /* s0-s16 contain hardware saved FP context. */
+        vstmiaeq r3!, {s0-s16}              /* Copy hardware saved FP context on the task stack. */
+        vldmdbeq r2!, {s16-s31}             /* Restore s16-s31. */
+    #endif /* configENABLE_FPU || configENABLE_MVE */
+
+    restore_context_done:
+        str r2, [r1]                        /* Save the location where the context should be saved next as the first member of TCB. */
+        bx lr
+
+#else /* configENABLE_MPU */
+
+PendSV_Handler:
+    ldr r3, =xSecureContext                 /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+    ldr r0, [r3]                            /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
+    ldr r3, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r1, [r3]                            /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
+    mrs r2, psp                             /* Read PSP in r2. */
+
+    cbz r0, save_ns_context                 /* No secure context to save. */
+    push {r0-r2, r14}
+    bl SecureContext_SaveContext            /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+    pop {r0-r3}                             /* LR is now in r3. */
+    mov lr, r3                              /* LR = r3. */
+    lsls r1, r3, #25                        /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+    bpl save_ns_context                     /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+
+    ldr r3, =pxCurrentTCB                   /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+    ldr r1, [r3]                            /* Read pxCurrentTCB. */
+    subs r2, r2, #12                        /* Make space for xSecureContext, PSPLIM and LR on the stack. */
+    str r2, [r1]                            /* Save the new top of stack in TCB. */
+    mrs r1, psplim                          /* r1 = PSPLIM. */
+    mov r3, lr                              /* r3 = LR/EXC_RETURN. */
+    stmia r2!, {r0, r1, r3}                 /* Store xSecureContext, PSPLIM and LR on the stack. */
+    b select_next_task
+
+    save_ns_context:
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* Read pxCurrentTCB. */
+    #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+        tst lr, #0x10                       /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+        it eq
+        vstmdbeq r2!, {s16-s31}             /* Store the additional FP context registers which are not saved automatically. */
+    #endif /* configENABLE_FPU || configENABLE_MVE */
+        subs r2, r2, #44                    /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
+        str r2, [r1]                        /* Save the new top of stack in TCB. */
+        adds r2, r2, #12                    /* r2 = r2 + 12. */
+        stm r2, {r4-r11}                    /* Store the registers that are not saved automatically. */
+        mrs r1, psplim                      /* r1 = PSPLIM. */
+        mov r3, lr                          /* r3 = LR/EXC_RETURN. */
+        subs r2, r2, #12                    /* r2 = r2 - 12. */
+        stmia r2!, {r0, r1, r3}             /* Store xSecureContext, PSPLIM and LR on the stack. */
+
+    select_next_task:
+        mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
+        msr basepri, r0                     /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
+        dsb
+        isb
+        bl vTaskSwitchContext
+        mov r0, #0                          /* r0 = 0. */
+        msr basepri, r0                     /* Enable interrupts. */
+
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* Read pxCurrentTCB. */
+        ldr r2, [r1]                        /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
+
+        ldmia r2!, {r0, r1, r4}             /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
+        msr psplim, r1                      /* Restore the PSPLIM register value for the task. */
+        mov lr, r4                          /* LR = r4. */
+        ldr r3, =xSecureContext             /* Read the location of xSecureContext i.e. &( xSecureContext ). */
+        str r0, [r3]                        /* Restore the task's xSecureContext. */
+        cbz r0, restore_ns_context          /* If there is no secure context for the task, restore the non-secure context. */
+        ldr r3, =pxCurrentTCB               /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
+        ldr r1, [r3]                        /* Read pxCurrentTCB. */
+        push {r2, r4}
+        bl SecureContext_LoadContext        /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
+        pop {r2, r4}
+        mov lr, r4                          /* LR = r4. */
+        lsls r1, r4, #25                    /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
+        bpl restore_ns_context              /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
+        msr psp, r2                         /* Remember the new top of stack for the task. */
+        bx lr
+
+    restore_ns_context:
+        ldmia r2!, {r4-r11}                 /* Restore the registers that are not automatically restored. */
+    #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
+        tst lr, #0x10                       /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
+        it eq
+        vldmiaeq r2!, {s16-s31}             /* Restore the additional FP context registers which are not restored automatically. */
+    #endif /* configENABLE_FPU || configENABLE_MVE */
+        msr psp, r2                         /* Remember the new top of stack for the task. */
+        bx lr
+
+#endif /* configENABLE_MPU */
+/*-----------------------------------------------------------*/
+
+#if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) )
+
+SVC_Handler:
+    tst lr, #4
+    ite eq
+    mrseq r0, msp
+    mrsne r0, psp
+
+    ldr r1, [r0, #24]
+    ldrb r2, [r1, #-2]
+    cmp r2, #NUM_SYSTEM_CALLS
+    blt syscall_enter
+    cmp r2, #104            /* portSVC_SYSTEM_CALL_EXIT. */
+    beq syscall_exit
+    b vPortSVCHandler_C
+
+    syscall_enter:
+        mov r1, lr
+        b vSystemCallEnter
+
+    syscall_exit:
+        mov r1, lr
+        b vSystemCallExit
+
+#else /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+
+SVC_Handler:
+    tst lr, #4
+    ite eq
+    mrseq r0, msp
+    mrsne r0, psp
+    b vPortSVCHandler_C
+
+#endif /* ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) */
+/*-----------------------------------------------------------*/
+
+vPortFreeSecureContext:
+    /* r0 = uint32_t *pulTCB. */
+    ldr r2, [r0]                            /* The first item in the TCB is the top of the stack. */
+    ldr r1, [r2]                            /* The first item on the stack is the task's xSecureContext. */
+    cmp r1, #0                              /* Raise svc if task's xSecureContext is not NULL. */
+    it ne
+    svcne 101                               /* Secure context is freed in the supervisor call. portSVC_FREE_SECURE_CONTEXT = 101. */
+    bx lr                                   /* Return. */
+/*-----------------------------------------------------------*/
+
+    END

portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portmacro.h

@@ -1,308 +1,85 @@
-/*
- * FreeRTOS Kernel V10.3.0
- * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-#ifndef PORTMACRO_H
-#define PORTMACRO_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*------------------------------------------------------------------------------
- * Port specific definitions.
- *
- * The settings in this file configure FreeRTOS correctly for the given hardware
- * and compiler.
- *
- * These settings should not be altered.
- *------------------------------------------------------------------------------
- */
-
-#ifndef configENABLE_FPU
-	#error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
-#endif /* configENABLE_FPU */
-
-#ifndef configENABLE_MPU
-	#error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
-#endif /* configENABLE_MPU */
-
-#ifndef configENABLE_TRUSTZONE
-	#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
-#endif /* configENABLE_TRUSTZONE */
-
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Type definitions.
- */
-#define portCHAR											char
-#define portFLOAT											float
-#define portDOUBLE											double
-#define portLONG											long
-#define portSHORT											short
-#define portSTACK_TYPE										uint32_t
-#define portBASE_TYPE										long
-
-typedef portSTACK_TYPE										StackType_t;
-typedef long												BaseType_t;
-typedef unsigned long										UBaseType_t;
-
-#if( configUSE_16_BIT_TICKS == 1 )
-	typedef uint16_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffff
-#else
-	typedef uint32_t TickType_t;
-	#define portMAX_DELAY ( TickType_t )					0xffffffffUL
-
-	/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
-	 * not need to be guarded with a critical section. */
-	#define portTICK_TYPE_IS_ATOMIC							1
-#endif
-/*-----------------------------------------------------------*/
-
-/**
- * Architecture specifics.
- */
-#define portARCH_NAME										"Cortex-M33"
-#define portSTACK_GROWTH									( -1 )
-#define portTICK_PERIOD_MS									( ( TickType_t ) 1000 / configTICK_RATE_HZ )
-#define portBYTE_ALIGNMENT									8
-#define portNOP()
-#define portINLINE											__inline
-#ifndef portFORCE_INLINE
-	#define portFORCE_INLINE								inline __attribute__(( always_inline ))
-#endif
-#define portHAS_STACK_OVERFLOW_CHECKING						1
-#define portDONT_DISCARD									__root
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Extern declarations.
- */
-extern BaseType_t xPortIsInsideInterrupt( void );
-
-extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
-
-extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
-extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
-
-extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
-
-#if( configENABLE_TRUSTZONE == 1 )
-	extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
-	extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
-#endif /* configENABLE_TRUSTZONE */
-
-#if( configENABLE_MPU == 1 )
-	extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
-	extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief MPU specific constants.
- */
-#if( configENABLE_MPU == 1 )
-	#define portUSING_MPU_WRAPPERS							1
-	#define portPRIVILEGE_BIT								( 0x80000000UL )
-#else
-	#define portPRIVILEGE_BIT								( 0x0UL )
-#endif /* configENABLE_MPU */
-
-
-/* MPU regions. */
-#define portPRIVILEGED_FLASH_REGION							( 0UL )
-#define portUNPRIVILEGED_FLASH_REGION						( 1UL )
-#define portUNPRIVILEGED_SYSCALLS_REGION					( 2UL )
-#define portPRIVILEGED_RAM_REGION							( 3UL )
-#define portSTACK_REGION									( 4UL )
-#define portFIRST_CONFIGURABLE_REGION						( 5UL )
-#define portLAST_CONFIGURABLE_REGION						( 7UL )
-#define portNUM_CONFIGURABLE_REGIONS						( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
-#define portTOTAL_NUM_REGIONS								( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
-
-/* Device memory attributes used in MPU_MAIR registers.
- *
- * 8-bit values encoded as follows:
- *  Bit[7:4] - 0000 - Device Memory
- *  Bit[3:2] - 00 --> Device-nGnRnE
- *				01 --> Device-nGnRE
- *				10 --> Device-nGRE
- *				11 --> Device-GRE
- *  Bit[1:0] - 00, Reserved.
- */
-#define portMPU_DEVICE_MEMORY_nGnRnE						( 0x00 ) /* 0000 0000 */
-#define portMPU_DEVICE_MEMORY_nGnRE							( 0x04 ) /* 0000 0100 */
-#define portMPU_DEVICE_MEMORY_nGRE							( 0x08 ) /* 0000 1000 */
-#define portMPU_DEVICE_MEMORY_GRE							( 0x0C ) /* 0000 1100 */
-
-/* Normal memory attributes used in MPU_MAIR registers. */
-#define portMPU_NORMAL_MEMORY_NON_CACHEABLE					( 0x44 ) /* Non-cacheable. */
-#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE			( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
-
-/* Attributes used in MPU_RBAR registers. */
-#define portMPU_REGION_NON_SHAREABLE						( 0UL << 3UL )
-#define portMPU_REGION_INNER_SHAREABLE						( 1UL << 3UL )
-#define portMPU_REGION_OUTER_SHAREABLE						( 2UL << 3UL )
-
-#define portMPU_REGION_PRIVILEGED_READ_WRITE				( 0UL << 1UL )
-#define portMPU_REGION_READ_WRITE							( 1UL << 1UL )
-#define portMPU_REGION_PRIVILEGED_READ_ONLY					( 2UL << 1UL )
-#define portMPU_REGION_READ_ONLY							( 3UL << 1UL )
-
-#define portMPU_REGION_EXECUTE_NEVER						( 1UL )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Settings to define an MPU region.
- */
-typedef struct MPURegionSettings
-{
-	uint32_t ulRBAR;	/**< RBAR for the region. */
-	uint32_t ulRLAR;	/**< RLAR for the region. */
-} MPURegionSettings_t;
-
-/**
- * @brief MPU settings as stored in the TCB.
- */
-typedef struct MPU_SETTINGS
-{
-	uint32_t ulMAIR0;	/**< MAIR0 for the task containing attributes for all the 4 per task regions. */
-	MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
-} xMPU_SETTINGS;
-/*-----------------------------------------------------------*/
-
-/**
- * @brief SVC numbers.
- */
-#define portSVC_ALLOCATE_SECURE_CONTEXT						0
-#define portSVC_FREE_SECURE_CONTEXT							1
-#define portSVC_START_SCHEDULER								2
-#define portSVC_RAISE_PRIVILEGE								3
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Scheduler utilities.
- */
-#define portYIELD()											vPortYield()
-#define portNVIC_INT_CTRL_REG								( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
-#define portNVIC_PENDSVSET_BIT								( 1UL << 28UL )
-#define portEND_SWITCHING_ISR( xSwitchRequired )			if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
-#define portYIELD_FROM_ISR( x )								portEND_SWITCHING_ISR( x )
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Critical section management.
- */
-#define portSET_INTERRUPT_MASK_FROM_ISR()					ulSetInterruptMask()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)				vClearInterruptMask( x )
-#define portDISABLE_INTERRUPTS()							ulSetInterruptMask()
-#define portENABLE_INTERRUPTS()								vClearInterruptMask( 0 )
-#define portENTER_CRITICAL()								vPortEnterCritical()
-#define portEXIT_CRITICAL()									vPortExitCritical()
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Task function macros as described on the FreeRTOS.org WEB site.
- */
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters )	void vFunction( void *pvParameters )
-#define portTASK_FUNCTION( vFunction, pvParameters )		void vFunction( void *pvParameters )
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_TRUSTZONE == 1 )
-	/**
-	 * @brief Allocate a secure context for the task.
-	 *
-	 * Tasks are not created with a secure context. Any task that is going to call
-	 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
-	 * secure context before it calls any secure function.
-	 *
-	 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
-	 */
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )	vPortAllocateSecureContext( ulSecureStackSize )
-
-	/**
-	 * @brief Called when a task is deleted to delete the task's secure context,
-	 * if it has one.
-	 *
-	 * @param[in] pxTCB The TCB of the task being deleted.
-	 */
-	#define portCLEAN_UP_TCB( pxTCB )							vPortFreeSecureContext( ( uint32_t * ) pxTCB )
-#else
-	#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
-	#define portCLEAN_UP_TCB( pxTCB )
-#endif /* configENABLE_TRUSTZONE */
-/*-----------------------------------------------------------*/
-
-#if( configENABLE_MPU == 1 )
-	/**
-	 * @brief Checks whether or not the processor is privileged.
-	 *
-	 * @return 1 if the processor is already privileged, 0 otherwise.
-	 */
-	#define portIS_PRIVILEGED()									xIsPrivileged()
-
-	/**
-	 * @brief Raise an SVC request to raise privilege.
-	 *
-	 * The SVC handler checks that the SVC was raised from a system call and only
-	 * then it raises the privilege. If this is called from any other place,
-	 * the privilege is not raised.
-	 */
-	#define portRAISE_PRIVILEGE()								__asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
-
-	/**
-	 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
-	 * register.
-	 */
-	#define portRESET_PRIVILEGE()								vResetPrivilege()
-#else
-	#define portIS_PRIVILEGED()
-	#define portRAISE_PRIVILEGE()
-	#define portRESET_PRIVILEGE()
-#endif /* configENABLE_MPU */
-/*-----------------------------------------------------------*/
-
-/**
- * @brief Barriers.
- */
-#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
-/*-----------------------------------------------------------*/
-
-/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
- * the source code because to do so would cause other compilers to generate
- * warnings. */
-#pragma diag_suppress=Be006
-#pragma diag_suppress=Pa082
-/*-----------------------------------------------------------*/
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTMACRO_H */
+/*
+ * FreeRTOS Kernel V11.0.0
+ * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    extern "C" {
+#endif
+/* *INDENT-ON* */
+
+/*------------------------------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the given hardware
+ * and compiler.
+ *
+ * These settings should not be altered.
+ *------------------------------------------------------------------------------
+ */
+
+/**
+ * Architecture specifics.
+ */
+#define portARCH_NAME                    "Cortex-M33"
+#define portHAS_ARMV8M_MAIN_EXTENSION    1
+#define portDONT_DISCARD                 __root
+/*-----------------------------------------------------------*/
+
+#if ( configTOTAL_MPU_REGIONS == 16 )
+    #error 16 MPU regions are not yet supported for this port.
+#endif
+/*-----------------------------------------------------------*/
+
+/* ARMv8-M common port configurations. */
+#include "portmacrocommon.h"
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Critical section management.
+ */
+#define portDISABLE_INTERRUPTS()    ulSetInterruptMask()
+#define portENABLE_INTERRUPTS()     vClearInterruptMask( 0 )
+/*-----------------------------------------------------------*/
+
+/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
+ * the source code because to do so would cause other compilers to generate
+ * warnings. */
+#pragma diag_suppress=Be006
+#pragma diag_suppress=Pa082
+/*-----------------------------------------------------------*/
+
+/* *INDENT-OFF* */
+#ifdef __cplusplus
+    }
+#endif
+/* *INDENT-ON* */
+
+#endif /* PORTMACRO_H */