forked from Imagelibrary/binutils-gdb
f6ac5f3d63
I.e., use C++ virtual methods and inheritance instead of tables of
function pointers.
Unfortunately, there's no way to do a smooth transition. ALL native
targets in the tree must be converted at the same time. I've tested
all I could with cross compilers and with help from GCC compile farm,
but naturally I haven't been able to test many of the ports. Still, I
made a best effort to port everything over, and while I expect some
build problems due to typos and such, which should be trivial to fix,
I don't expect any design problems.
* Implementation notes:
- The flattened current_target is gone. References to current_target
or current_target.beneath are replaced with references to
target_stack (the top of the stack) directly.
- To keep "set debug target" working, this adds a new debug_stratum
layer that sits on top of the stack, prints the debug, and delegates
to the target beneath.
In addition, this makes the shortname and longname properties of
target_ops be virtual methods instead of data fields, and makes the
debug target defer those to the target beneath. This is so that
debug code sprinkled around that does "if (debugtarget) ..." can
transparently print the name of the target beneath.
A patch later in the series actually splits out the
shortname/longname methods to a separate structure, but I preferred
to keep that chance separate as it is associated with changing a bit
the design of how targets are registered and open.
- Since you can't check whether a C++ virtual method is overridden,
the old method of checking whether a target_ops implements a method
by comparing the function pointer must be replaced with something
else.
Some cases are fixed by adding a parallel "can_do_foo" target_ops
methods. E.g.,:
+ for (t = target_stack; t != NULL; t = t->beneath)
{
- if (t->to_create_inferior != NULL)
+ if (t->can_create_inferior ())
break;
}
Others are fixed by changing void return type to bool or int return
type, and have the default implementation return false or -1, to
indicate lack of support.
- make-target-delegates was adjusted to generate C++ classes and
methods.
It needed tweaks to grok "virtual" in front of the target method
name, and for the fact that methods are no longer function pointers.
(In particular, the current code parsing the return type was simple
because it could simply parse up until the '(' in '(*to_foo)'.
It now generates a couple C++ classes that inherit target_ops:
dummy_target and debug_target.
Since we need to generate the class declarations as well, i.e., we
need to emit methods twice, we now generate the code in two passes.
- The core_target global is renamed to avoid conflict with the
"core_target" class.
- ctf/tfile targets
init_tracefile_ops is replaced by a base class that is inherited by
both ctf and tfile.
- bsd-uthread
The bsd_uthread_ops_hack hack is gone. It's not needed because
nothing was extending a target created by bsd_uthread_target.
- remote/extended-remote targets
This is a first pass, just enough to C++ify target_ops.
A later pass will convert more free functions to methods, and make
remote_state be truly per remote instance, allowing multiple
simultaneous instances of remote targets.
- inf-child/"native" is converted to an actual base class
(inf_child_target), that is inherited by all native targets.
- GNU/Linux
The old weird double-target linux_ops mechanism in linux-nat.c, is
gone, replaced by adding a few virtual methods to linux-nat.h's
target_ops, called low_XXX, that the concrete linux-nat
implementations override. Sort of like gdbserver's
linux_target_ops, but simpler, for requiring only one
target_ops-like hierarchy, which spares implementing the same method
twice when we need to forward the method to a low implementation.
The low target simply reimplements the target_ops method directly in
that case.
There are a few remaining linux-nat.c hooks that would be better
converted to low_ methods like above too. E.g.:
linux_nat_set_new_thread (t, x86_linux_new_thread);
linux_nat_set_new_fork (t, x86_linux_new_fork);
linux_nat_set_forget_process
That'll be done in a follow up patch.
- We can no longer use functions like x86_use_watchpoints to install
custom methods on an arbitrary base target.
The patch replaces instances of such a pattern with template mixins.
For example memory_breakpoint_target defined in target.h, or
x86_nat_target in x86-nat.h.
- linux_trad_target, MIPS and Alpha GNU/Linux
The code in the new linux-nat-trad.h/c files which was split off of
inf-ptrace.h/c recently, is converted to a C++ base class, and used
by the MIPS and Alpha GNU/Linux ports.
- BSD targets
The
$architecture x NetBSD/OpenBSD/FreeBSD
support matrix complicates things a bit. There's common BSD target
code, and there's common architecture-specific code shared between
the different BSDs. Currently, all that is stiched together to form
a final target, via the i386bsd_target, x86bsd_target,
fbsd_nat_add_target functions etc.
This introduces new fbsd_nat_target, obsd_nat_target and
nbsd_nat_target classes that serve as base/prototype target for the
corresponding BSD variant.
And introduces generic i386/AMD64 BSD targets, to be used as
template mixin to build a final target. Similarly, a generic SPARC
target is added, used by both BSD and Linux ports.
- bsd_kvm_add_target, BSD libkvm target
I considered making bsd_kvm_supply_pcb a virtual method, and then
have each port inherit bsd_kvm_target and override that method, but
that was resulting in lots of unjustified churn, so I left the
function pointer mechanism alone.
gdb/ChangeLog:
2018-05-02 Pedro Alves <palves@redhat.com>
John Baldwin <jhb@freebsd.org>
* target.h (enum strata) <debug_stratum>: New.
(struct target_ops) <all delegation methods>: Replace by C++
virtual methods, and drop "to_" prefix. All references updated
throughout.
<to_shortname, to_longname, to_doc, to_data,
to_have_steppable_watchpoint, to_have_continuable_watchpoint,
to_has_thread_control, to_attach_no_wait>: Delete, replaced by
virtual methods. All references updated throughout.
<can_attach, supports_terminal_ours, can_create_inferior,
get_thread_control_capabilities, attach_no_wait>: New
virtual methods.
<insert_breakpoint, remove_breakpoint>: Now
TARGET_DEFAULT_NORETURN methods.
<info_proc>: Now returns bool.
<to_magic>: Delete.
(OPS_MAGIC): Delete.
(current_target): Delete. All references replaced by references
to ...
(target_stack): ... this. New.
(target_shortname, target_longname): Adjust.
(target_can_run): Now a function declaration.
(default_child_has_all_memory, default_child_has_memory)
(default_child_has_stack, default_child_has_registers)
(default_child_has_execution): Remove target_ops parameter.
(complete_target_initialization): Delete.
(memory_breakpoint_target): New template class.
(test_target_ops): Refactor as a C++ class with virtual methods.
* make-target-delegates (NAME_PART): Tighten.
(POINTER_PART, CP_SYMBOL): New.
(SIMPLE_RETURN_PART): Reimplement.
(VEC_RETURN_PART): Expect less.
(RETURN_PART, VIRTUAL_PART): New.
(METHOD): Adjust to C++ virtual methods.
(scan_target_h): Remove reference to C99.
(dname): Output "target_ops::" prefix.
(write_function_header): Adjust to output a C++ class method.
(write_declaration): New.
(write_delegator): Adjust to output a C++ class method.
(tdname): Output "dummy_target::" prefix.
(write_tdefault, write_debugmethod): Adjust to output a C++ class
method.
(tdefault_names, debug_names): Delete.
(return_types, tdefaults, styles, argtypes_array): New.
(top level): All methods are delegators.
(print_class): New.
(top level): Print dummy_target and debug_target classes.
* target-delegates.c: Regenerate.
* target-debug.h (target_debug_print_enum_info_proc_what)
(target_debug_print_thread_control_capabilities)
(target_debug_print_thread_info_p): New.
* target.c (dummy_target): Delete.
(the_dummy_target, the_debug_target): New.
(target_stack): Now extern.
(set_targetdebug): Push/unpush debug target.
(default_child_has_all_memory, default_child_has_memory)
(default_child_has_stack, default_child_has_registers)
(default_child_has_execution): Remove target_ops parameter.
(complete_target_initialization): Delete.
(add_target_with_completer): No longer call
complete_target_initialization.
(target_supports_terminal_ours): Use regular delegation.
(update_current_target): Delete.
(push_target): No longer check magic number. Don't call
update_current_target.
(unpush_target): Don't call update_current_target.
(target_is_pushed): No longer check magic number.
(target_require_runnable): Skip for all stratums over
process_stratum.
(target_ops::info_proc): New.
(target_info_proc): Use find_target_at and
find_default_run_target.
(target_supports_disable_randomization): Use regular delegation.
(target_get_osdata): Use find_target_at.
(target_ops::open, target_ops::close, target_ops::can_attach)
(target_ops::attach, target_ops::can_create_inferior)
(target_ops::create_inferior, target_ops::can_run)
(target_can_run): New.
(default_fileio_target): Use regular delegation.
(target_ops::fileio_open, target_ops::fileio_pwrite)
(target_ops::fileio_pread, target_ops::fileio_fstat)
(target_ops::fileio_close, target_ops::fileio_unlink)
(target_ops::fileio_readlink): New.
(target_fileio_open_1, target_fileio_unlink)
(target_fileio_readlink): Always call the target method. Handle
FILEIO_ENOSYS.
(return_zero, return_zero_has_execution): Delete.
(init_dummy_target): Delete.
(dummy_target::dummy_target, dummy_target::shortname)
(dummy_target::longname, dummy_target::doc)
(debug_target::debug_target, debug_target::shortname)
(debug_target::longname, debug_target::doc): New.
(target_supports_delete_record): Use regular delegation.
(setup_target_debug): Delete.
(maintenance_print_target_stack): Skip debug_stratum.
(initialize_targets): Instantiate the_dummy_target and
the_debug_target.
* auxv.c (target_auxv_parse): Remove 'ops' parameter. Adjust to
use target_stack.
(target_auxv_search, fprint_target_auxv): Adjust.
(info_auxv_command): Adjust to use target_stack.
* auxv.h (target_auxv_parse): Remove 'ops' parameter.
* exceptions.c (print_flush): Handle a NULL target_stack.
* regcache.c (target_ops_no_register): Refactor as class with
virtual methods.
* exec.c (exec_target): New class.
(exec_ops): Now an exec_target.
(exec_open, exec_close_1, exec_get_section_table)
(exec_xfer_partial, exec_files_info, exec_has_memory)
(exec_make_note_section): Refactor as exec_target methods.
(exec_file_clear, ignore, exec_remove_breakpoint, init_exec_ops):
Delete.
(exec_target::find_memory_regions): New.
(_initialize_exec): Don't call init_exec_ops.
* gdbcore.h (exec_file_clear): Delete.
* corefile.c (core_target): Delete.
(core_file_command): Adjust.
* corelow.c (core_target): New class.
(the_core_target): New.
(core_close): Remove target_ops parameter.
(core_close_cleanup): Adjust.
(core_target::close): New.
(core_open, core_detach, get_core_registers, core_files_info)
(core_xfer_partial, core_thread_alive, core_read_description)
(core_pid_to_str, core_thread_name, core_has_memory)
(core_has_stack, core_has_registers, core_info_proc): Rework as
core_target methods.
(ignore, core_remove_breakpoint, init_core_ops): Delete.
(_initialize_corelow): Initialize the_core_target.
* gdbcore.h (core_target): Delete.
(the_core_target): New.
* ctf.c: (ctf_target): New class.
(ctf_ops): Now a ctf_target.
(ctf_open, ctf_close, ctf_files_info, ctf_fetch_registers)
(ctf_xfer_partial, ctf_get_trace_state_variable_value)
(ctf_trace_find, ctf_traceframe_info): Refactor as ctf_target
methods.
(init_ctf_ops): Delete.
(_initialize_ctf): Don't call it.
* tracefile-tfile.c (tfile_target): New class.
(tfile_ops): Now a tfile_target.
(tfile_open, tfile_close, tfile_files_info)
(tfile_get_tracepoint_status, tfile_trace_find)
(tfile_fetch_registers, tfile_xfer_partial)
(tfile_get_trace_state_variable_value, tfile_traceframe_info):
Refactor as tfile_target methods.
(tfile_xfer_partial_features): Remove target_ops parameter.
(init_tfile_ops): Delete.
(_initialize_tracefile_tfile): Don't call it.
* tracefile.c (tracefile_has_all_memory, tracefile_has_memory)
(tracefile_has_stack, tracefile_has_registers)
(tracefile_thread_alive, tracefile_get_trace_status): Refactor as
tracefile_target methods.
(init_tracefile_ops): Delete.
(tracefile_target::tracefile_target): New.
* tracefile.h: Include "target.h".
(tracefile_target): New class.
(init_tracefile_ops): Delete.
* spu-multiarch.c (spu_multiarch_target): New class.
(spu_ops): Now a spu_multiarch_target.
(spu_thread_architecture, spu_region_ok_for_hw_watchpoint)
(spu_fetch_registers, spu_store_registers, spu_xfer_partial)
(spu_search_memory, spu_mourn_inferior): Refactor as
spu_multiarch_target methods.
(init_spu_ops): Delete.
(_initialize_spu_multiarch): Remove references to init_spu_ops,
complete_target_initialization.
* ravenscar-thread.c (ravenscar_thread_target): New class.
(ravenscar_ops): Now a ravenscar_thread_target.
(ravenscar_resume, ravenscar_wait, ravenscar_update_thread_list)
(ravenscar_thread_alive, ravenscar_pid_to_str)
(ravenscar_fetch_registers, ravenscar_store_registers)
(ravenscar_prepare_to_store, ravenscar_stopped_by_sw_breakpoint)
(ravenscar_stopped_by_hw_breakpoint)
(ravenscar_stopped_by_watchpoint, ravenscar_stopped_data_address)
(ravenscar_mourn_inferior, ravenscar_core_of_thread)
(ravenscar_get_ada_task_ptid): Refactor as ravenscar_thread_target
methods.
(init_ravenscar_thread_ops): Delete.
(_initialize_ravenscar): Remove references to
init_ravenscar_thread_ops and complete_target_initialization.
* bsd-uthread.c (bsd_uthread_ops_hack): Delete.
(bsd_uthread_target): New class.
(bsd_uthread_ops): Now a bsd_uthread_target.
(bsd_uthread_activate): Adjust to refer to bsd_uthread_ops.
(bsd_uthread_close, bsd_uthread_mourn_inferior)
(bsd_uthread_fetch_registers, bsd_uthread_store_registers)
(bsd_uthread_wait, bsd_uthread_resume, bsd_uthread_thread_alive)
(bsd_uthread_update_thread_list, bsd_uthread_extra_thread_info)
(bsd_uthread_pid_to_str): Refactor as bsd_uthread_target methods.
(bsd_uthread_target): Delete function.
(_initialize_bsd_uthread): Remove reference to
complete_target_initialization.
* bfd-target.c (target_bfd_data): Delete. Fields folded into ...
(target_bfd): ... this new class.
(target_bfd_xfer_partial, target_bfd_get_section_table)
(target_bfd_close): Refactor as target_bfd methods.
(target_bfd::~target_bfd): New.
(target_bfd_reopen): Adjust.
(target_bfd::close): New.
* record-btrace.c (record_btrace_target): New class.
(record_btrace_ops): Now a record_btrace_target.
(record_btrace_open, record_btrace_stop_recording)
(record_btrace_disconnect, record_btrace_close)
(record_btrace_async, record_btrace_info)
(record_btrace_insn_history, record_btrace_insn_history_range)
(record_btrace_insn_history_from, record_btrace_call_history)
(record_btrace_call_history_range)
(record_btrace_call_history_from, record_btrace_record_method)
(record_btrace_is_replaying, record_btrace_will_replay)
(record_btrace_xfer_partial, record_btrace_insert_breakpoint)
(record_btrace_remove_breakpoint, record_btrace_fetch_registers)
(record_btrace_store_registers, record_btrace_prepare_to_store)
(record_btrace_to_get_unwinder)
(record_btrace_to_get_tailcall_unwinder, record_btrace_resume)
(record_btrace_commit_resume, record_btrace_wait)
(record_btrace_stop, record_btrace_can_execute_reverse)
(record_btrace_stopped_by_sw_breakpoint)
(record_btrace_supports_stopped_by_sw_breakpoint)
(record_btrace_stopped_by_hw_breakpoint)
(record_btrace_supports_stopped_by_hw_breakpoint)
(record_btrace_update_thread_list, record_btrace_thread_alive)
(record_btrace_goto_begin, record_btrace_goto_end)
(record_btrace_goto, record_btrace_stop_replaying_all)
(record_btrace_execution_direction)
(record_btrace_prepare_to_generate_core)
(record_btrace_done_generating_core): Refactor as
record_btrace_target methods.
(init_record_btrace_ops): Delete.
(_initialize_record_btrace): Remove reference to
init_record_btrace_ops.
* record-full.c (RECORD_FULL_IS_REPLAY): Adjust to always refer to
the execution_direction global.
(record_full_base_target, record_full_target)
(record_full_core_target): New classes.
(record_full_ops): Now a record_full_target.
(record_full_core_ops): Now a record_full_core_target.
(record_full_target::detach, record_full_target::disconnect)
(record_full_core_target::disconnect)
(record_full_target::mourn_inferior, record_full_target::kill):
New.
(record_full_open, record_full_close, record_full_async): Refactor
as methods of the record_full_base_target class.
(record_full_resume, record_full_commit_resume): Refactor
as methods of the record_full_target class.
(record_full_wait, record_full_stopped_by_watchpoint)
(record_full_stopped_data_address)
(record_full_stopped_by_sw_breakpoint)
(record_full_supports_stopped_by_sw_breakpoint)
(record_full_stopped_by_hw_breakpoint)
(record_full_supports_stopped_by_hw_breakpoint): Refactor as
methods of the record_full_base_target class.
(record_full_store_registers, record_full_xfer_partial)
(record_full_insert_breakpoint, record_full_remove_breakpoint):
Refactor as methods of the record_full_target class.
(record_full_can_execute_reverse, record_full_get_bookmark)
(record_full_goto_bookmark, record_full_execution_direction)
(record_full_record_method, record_full_info, record_full_delete)
(record_full_is_replaying, record_full_will_replay)
(record_full_goto_begin, record_full_goto_end, record_full_goto)
(record_full_stop_replaying): Refactor as methods of the
record_full_base_target class.
(record_full_core_resume, record_full_core_kill)
(record_full_core_fetch_registers)
(record_full_core_prepare_to_store)
(record_full_core_store_registers, record_full_core_xfer_partial)
(record_full_core_insert_breakpoint)
(record_full_core_remove_breakpoint)
(record_full_core_has_execution): Refactor
as methods of the record_full_core_target class.
(record_full_base_target::supports_delete_record): New.
(init_record_full_ops): Delete.
(init_record_full_core_ops): Delete.
(record_full_save): Refactor as method of the
record_full_base_target class.
(_initialize_record_full): Remove references to
init_record_full_ops and init_record_full_core_ops.
* remote.c (remote_target, extended_remote_target): New classes.
(remote_ops): Now a remote_target.
(extended_remote_ops): Now an extended_remote_target.
(remote_insert_fork_catchpoint, remote_remove_fork_catchpoint)
(remote_insert_vfork_catchpoint, remote_remove_vfork_catchpoint)
(remote_insert_exec_catchpoint, remote_remove_exec_catchpoint)
(remote_pass_signals, remote_set_syscall_catchpoint)
(remote_program_signals, )
(remote_thread_always_alive): Remove target_ops parameter.
(remote_thread_alive, remote_thread_name)
(remote_update_thread_list, remote_threads_extra_info)
(remote_static_tracepoint_marker_at)
(remote_static_tracepoint_markers_by_strid)
(remote_get_ada_task_ptid, remote_close, remote_start_remote)
(remote_open): Refactor as methods of remote_target.
(extended_remote_open, extended_remote_detach)
(extended_remote_attach, extended_remote_post_attach):
(extended_remote_supports_disable_randomization)
(extended_remote_create_inferior): : Refactor as method of
extended_remote_target.
(remote_set_permissions, remote_open_1, remote_detach)
(remote_follow_fork, remote_follow_exec, remote_disconnect)
(remote_resume, remote_commit_resume, remote_stop)
(remote_interrupt, remote_pass_ctrlc, remote_terminal_inferior)
(remote_terminal_ours, remote_wait, remote_fetch_registers)
(remote_prepare_to_store, remote_store_registers)
(remote_flash_erase, remote_flash_done, remote_files_info)
(remote_kill, remote_mourn, remote_insert_breakpoint)
(remote_remove_breakpoint, remote_insert_watchpoint)
(remote_watchpoint_addr_within_range)
(remote_remove_watchpoint, remote_region_ok_for_hw_watchpoint)
(remote_check_watch_resources, remote_stopped_by_sw_breakpoint)
(remote_supports_stopped_by_sw_breakpoint)
(remote_stopped_by_hw_breakpoint)
(remote_supports_stopped_by_hw_breakpoint)
(remote_stopped_by_watchpoint, remote_stopped_data_address)
(remote_insert_hw_breakpoint, remote_remove_hw_breakpoint)
(remote_verify_memory): Refactor as methods of remote_target.
(remote_write_qxfer, remote_read_qxfer): Remove target_ops
parameter.
(remote_xfer_partial, remote_get_memory_xfer_limit)
(remote_search_memory, remote_rcmd, remote_memory_map)
(remote_pid_to_str, remote_get_thread_local_address)
(remote_get_tib_address, remote_read_description): Refactor as
methods of remote_target.
(remote_target::fileio_open, remote_target::fileio_pwrite)
(remote_target::fileio_pread, remote_target::fileio_close): New.
(remote_hostio_readlink, remote_hostio_fstat)
(remote_filesystem_is_local, remote_can_execute_reverse)
(remote_supports_non_stop, remote_supports_disable_randomization)
(remote_supports_multi_process, remote_supports_cond_breakpoints)
(remote_supports_enable_disable_tracepoint)
(remote_supports_string_tracing)
(remote_can_run_breakpoint_commands, remote_trace_init)
(remote_download_tracepoint, remote_can_download_tracepoint)
(remote_download_trace_state_variable, remote_enable_tracepoint)
(remote_disable_tracepoint, remote_trace_set_readonly_regions)
(remote_trace_start, remote_get_trace_status)
(remote_get_tracepoint_status, remote_trace_stop)
(remote_trace_find, remote_get_trace_state_variable_value)
(remote_save_trace_data, remote_get_raw_trace_data)
(remote_set_disconnected_tracing, remote_core_of_thread)
(remote_set_circular_trace_buffer, remote_traceframe_info)
(remote_get_min_fast_tracepoint_insn_len)
(remote_set_trace_buffer_size, remote_set_trace_notes)
(remote_use_agent, remote_can_use_agent, remote_enable_btrace)
(remote_disable_btrace, remote_teardown_btrace)
(remote_read_btrace, remote_btrace_conf)
(remote_augmented_libraries_svr4_read, remote_load)
(remote_pid_to_exec_file, remote_can_do_single_step)
(remote_execution_direction, remote_thread_handle_to_thread_info):
Refactor as methods of remote_target.
(init_remote_ops, init_extended_remote_ops): Delete.
(remote_can_async_p, remote_is_async_p, remote_async)
(remote_thread_events, remote_upload_tracepoints)
(remote_upload_trace_state_variables): Refactor as methods of
remote_target.
(_initialize_remote): Remove references to init_remote_ops and
init_extended_remote_ops.
* remote-sim.c (gdbsim_target): New class.
(gdbsim_fetch_register, gdbsim_store_register, gdbsim_kill)
(gdbsim_load, gdbsim_create_inferior, gdbsim_open, gdbsim_close)
(gdbsim_detach, gdbsim_resume, gdbsim_interrupt)
(gdbsim_wait, gdbsim_prepare_to_store, gdbsim_xfer_partial)
(gdbsim_files_info, gdbsim_mourn_inferior, gdbsim_thread_alive)
(gdbsim_pid_to_str, gdbsim_has_all_memory, gdbsim_has_memory):
Refactor as methods of gdbsim_target.
(gdbsim_ops): Now a gdbsim_target.
(init_gdbsim_ops): Delete.
(gdbsim_cntrl_c): Adjust.
(_initialize_remote_sim): Remove reference to init_gdbsim_ops.
* amd64-linux-nat.c (amd64_linux_nat_target): New class.
(the_amd64_linux_nat_target): New.
(amd64_linux_fetch_inferior_registers)
(amd64_linux_store_inferior_registers): Refactor as methods of
amd64_linux_nat_target.
(_initialize_amd64_linux_nat): Adjust. Set linux_target.
* i386-linux-nat.c: Don't include "linux-nat.h".
(i386_linux_nat_target): New class.
(the_i386_linux_nat_target): New.
(i386_linux_fetch_inferior_registers)
(i386_linux_store_inferior_registers, i386_linux_resume): Refactor
as methods of i386_linux_nat_target.
(_initialize_i386_linux_nat): Adjust. Set linux_target.
* inf-child.c (inf_child_ops): Delete.
(inf_child_fetch_inferior_registers)
(inf_child_store_inferior_registers): Delete.
(inf_child_post_attach, inf_child_prepare_to_store): Refactor as
methods of inf_child_target.
(inf_child_target::supports_terminal_ours)
(inf_child_target::terminal_init)
(inf_child_target::terminal_inferior)
(inf_child_target::terminal_ours_for_output)
(inf_child_target::terminal_ours, inf_child_target::interrupt)
(inf_child_target::pass_ctrlc, inf_child_target::terminal_info):
New.
(inf_child_open, inf_child_disconnect, inf_child_close)
(inf_child_mourn_inferior, inf_child_maybe_unpush_target)
(inf_child_post_startup_inferior, inf_child_can_run)
(inf_child_pid_to_exec_file): Refactor as methods of
inf_child_target.
(inf_child_follow_fork): Delete.
(inf_child_target::can_create_inferior)
(inf_child_target::can_attach): New.
(inf_child_target::has_all_memory, inf_child_target::has_memory)
(inf_child_target::has_stack, inf_child_target::has_registers)
(inf_child_target::has_execution): New.
(inf_child_fileio_open, inf_child_fileio_pwrite)
(inf_child_fileio_pread, inf_child_fileio_fstat)
(inf_child_fileio_close, inf_child_fileio_unlink)
(inf_child_fileio_readlink, inf_child_use_agent)
(inf_child_can_use_agent): Refactor as methods of
inf_child_target.
(return_zero, inf_child_target): Delete.
(inf_child_target::inf_child_target): New.
* inf-child.h: Include "target.h".
(inf_child_target): Delete function prototype.
(inf_child_target): New class.
(inf_child_open_target, inf_child_mourn_inferior)
(inf_child_maybe_unpush_target): Delete.
* inf-ptrace.c (inf_ptrace_target::~inf_ptrace_target): New.
(inf_ptrace_follow_fork, inf_ptrace_insert_fork_catchpoint)
(inf_ptrace_remove_fork_catchpoint, inf_ptrace_create_inferior)
(inf_ptrace_post_startup_inferior, inf_ptrace_mourn_inferior)
(inf_ptrace_attach, inf_ptrace_post_attach, inf_ptrace_detach)
(inf_ptrace_detach_success, inf_ptrace_kill, inf_ptrace_resume)
(inf_ptrace_wait, inf_ptrace_xfer_partial)
(inf_ptrace_thread_alive, inf_ptrace_files_info)
(inf_ptrace_pid_to_str, inf_ptrace_auxv_parse): Refactor as
methods of inf_ptrace_target.
(inf_ptrace_target): Delete function.
* inf-ptrace.h: Include "inf-child.h".
(inf_ptrace_target): Delete function declaration.
(inf_ptrace_target): New class.
(inf_ptrace_trad_target, inf_ptrace_detach_success): Delete.
* linux-nat.c (linux_target): New.
(linux_ops, linux_ops_saved, super_xfer_partial): Delete.
(linux_nat_target::~linux_nat_target): New.
(linux_child_post_attach, linux_child_post_startup_inferior)
(linux_child_follow_fork, linux_child_insert_fork_catchpoint)
(linux_child_remove_fork_catchpoint)
(linux_child_insert_vfork_catchpoint)
(linux_child_remove_vfork_catchpoint)
(linux_child_insert_exec_catchpoint)
(linux_child_remove_exec_catchpoint)
(linux_child_set_syscall_catchpoint, linux_nat_pass_signals)
(linux_nat_create_inferior, linux_nat_attach, linux_nat_detach)
(linux_nat_resume, linux_nat_stopped_by_watchpoint)
(linux_nat_stopped_data_address)
(linux_nat_stopped_by_sw_breakpoint)
(linux_nat_supports_stopped_by_sw_breakpoint)
(linux_nat_stopped_by_hw_breakpoint)
(linux_nat_supports_stopped_by_hw_breakpoint, linux_nat_wait)
(linux_nat_kill, linux_nat_mourn_inferior)
(linux_nat_xfer_partial, linux_nat_thread_alive)
(linux_nat_update_thread_list, linux_nat_pid_to_str)
(linux_nat_thread_name, linux_child_pid_to_exec_file)
(linux_child_static_tracepoint_markers_by_strid)
(linux_nat_is_async_p, linux_nat_can_async_p)
(linux_nat_supports_non_stop, linux_nat_always_non_stop_p)
(linux_nat_supports_multi_process)
(linux_nat_supports_disable_randomization, linux_nat_async)
(linux_nat_stop, linux_nat_close, linux_nat_thread_address_space)
(linux_nat_core_of_thread, linux_nat_filesystem_is_local)
(linux_nat_fileio_open, linux_nat_fileio_readlink)
(linux_nat_fileio_unlink, linux_nat_thread_events): Refactor as
methods of linux_nat_target.
(linux_nat_wait_1, linux_xfer_siginfo, linux_proc_xfer_partial)
(linux_proc_xfer_spu, linux_nat_xfer_osdata): Remove target_ops
parameter.
(check_stopped_by_watchpoint): Adjust.
(linux_xfer_partial): Delete.
(linux_target_install_ops, linux_target, linux_nat_add_target):
Delete.
(linux_nat_target::linux_nat_target): New.
* linux-nat.h: Include "inf-ptrace.h".
(linux_nat_target): New.
(linux_target, linux_target_install_ops, linux_nat_add_target):
Delete function declarations.
(linux_target): Declare global.
* linux-thread-db.c (thread_db_target): New.
(thread_db_target::thread_db_target): New.
(thread_db_ops): Delete.
(the_thread_db_target): New.
(thread_db_detach, thread_db_wait, thread_db_mourn_inferior)
(thread_db_update_thread_list, thread_db_pid_to_str)
(thread_db_extra_thread_info)
(thread_db_thread_handle_to_thread_info)
(thread_db_get_thread_local_address, thread_db_get_ada_task_ptid)
(thread_db_resume): Refactor as methods of thread_db_target.
(init_thread_db_ops): Delete.
(_initialize_thread_db): Remove reference to init_thread_db_ops.
* x86-linux-nat.c: Don't include "linux-nat.h".
(super_post_startup_inferior): Delete.
(x86_linux_nat_target::~x86_linux_nat_target): New.
(x86_linux_child_post_startup_inferior)
(x86_linux_read_description, x86_linux_enable_btrace)
(x86_linux_disable_btrace, x86_linux_teardown_btrace)
(x86_linux_read_btrace, x86_linux_btrace_conf): Refactor as
methods of x86_linux_nat_target.
(x86_linux_create_target): Delete. Bits folded ...
(x86_linux_add_target): ... here. Now takes a linux_nat_target
pointer.
* x86-linux-nat.h: Include "linux-nat.h" and "x86-nat.h".
(x86_linux_nat_target): New class.
(x86_linux_create_target): Delete.
(x86_linux_add_target): Now takes a linux_nat_target pointer.
* x86-nat.c (x86_insert_watchpoint, x86_remove_watchpoint)
(x86_region_ok_for_watchpoint, x86_stopped_data_address)
(x86_stopped_by_watchpoint, x86_insert_hw_breakpoint)
(x86_remove_hw_breakpoint, x86_can_use_hw_breakpoint)
(x86_stopped_by_hw_breakpoint): Remove target_ops parameter and
make extern.
(x86_use_watchpoints): Delete.
* x86-nat.h: Include "breakpoint.h" and "target.h".
(x86_use_watchpoints): Delete.
(x86_can_use_hw_breakpoint, x86_region_ok_for_hw_watchpoint)
(x86_stopped_by_watchpoint, x86_stopped_data_address)
(x86_insert_watchpoint, x86_remove_watchpoint)
(x86_insert_hw_breakpoint, x86_remove_hw_breakpoint)
(x86_stopped_by_hw_breakpoint): New declarations.
(x86_nat_target): New template class.
* ppc-linux-nat.c (ppc_linux_nat_target): New class.
(the_ppc_linux_nat_target): New.
(ppc_linux_fetch_inferior_registers)
(ppc_linux_can_use_hw_breakpoint)
(ppc_linux_region_ok_for_hw_watchpoint)
(ppc_linux_ranged_break_num_registers)
(ppc_linux_insert_hw_breakpoint, ppc_linux_remove_hw_breakpoint)
(ppc_linux_insert_mask_watchpoint)
(ppc_linux_remove_mask_watchpoint)
(ppc_linux_can_accel_watchpoint_condition)
(ppc_linux_insert_watchpoint, ppc_linux_remove_watchpoint)
(ppc_linux_stopped_data_address, ppc_linux_stopped_by_watchpoint)
(ppc_linux_watchpoint_addr_within_range)
(ppc_linux_masked_watch_num_registers)
(ppc_linux_store_inferior_registers, ppc_linux_auxv_parse)
(ppc_linux_read_description): Refactor as methods of
ppc_linux_nat_target.
(_initialize_ppc_linux_nat): Adjust. Set linux_target.
* procfs.c (procfs_xfer_partial): Delete forward declaration.
(procfs_target): New class.
(the_procfs_target): New.
(procfs_target): Delete function.
(procfs_auxv_parse, procfs_attach, procfs_detach)
(procfs_fetch_registers, procfs_store_registers, procfs_wait)
(procfs_xfer_partial, procfs_resume, procfs_pass_signals)
(procfs_files_info, procfs_kill_inferior, procfs_mourn_inferior)
(procfs_create_inferior, procfs_update_thread_list)
(procfs_thread_alive, procfs_pid_to_str)
(procfs_can_use_hw_breakpoint, procfs_stopped_by_watchpoint)
(procfs_stopped_data_address, procfs_insert_watchpoint)
(procfs_remove_watchpoint, procfs_region_ok_for_hw_watchpoint)
(proc_find_memory_regions, procfs_info_proc)
(procfs_make_note_section): Refactor as methods of procfs_target.
(_initialize_procfs): Adjust.
* sol-thread.c (sol_thread_target): New class.
(sol_thread_ops): Now a sol_thread_target.
(sol_thread_detach, sol_thread_resume, sol_thread_wait)
(sol_thread_fetch_registers, sol_thread_store_registers)
(sol_thread_xfer_partial, sol_thread_mourn_inferior)
(sol_thread_alive, solaris_pid_to_str, sol_update_thread_list)
(sol_get_ada_task_ptid): Refactor as methods of sol_thread_target.
(init_sol_thread_ops): Delete.
(_initialize_sol_thread): Adjust. Remove references to
init_sol_thread_ops and complete_target_initialization.
* windows-nat.c (windows_nat_target): New class.
(windows_fetch_inferior_registers)
(windows_store_inferior_registers, windows_resume, windows_wait)
(windows_attach, windows_detach, windows_pid_to_exec_file)
(windows_files_info, windows_create_inferior)
(windows_mourn_inferior, windows_interrupt, windows_kill_inferior)
(windows_close, windows_pid_to_str, windows_xfer_partial)
(windows_get_tib_address, windows_get_ada_task_ptid)
(windows_thread_name, windows_thread_alive): Refactor as
windows_nat_target methods.
(do_initial_windows_stuff): Adjust.
(windows_target): Delete function.
(_initialize_windows_nat): Adjust.
* darwin-nat.c (darwin_resume, darwin_wait_to, darwin_interrupt)
(darwin_mourn_inferior, darwin_kill_inferior)
(darwin_create_inferior, darwin_attach, darwin_detach)
(darwin_pid_to_str, darwin_thread_alive, darwin_xfer_partial)
(darwin_pid_to_exec_file, darwin_get_ada_task_ptid)
(darwin_supports_multi_process): Refactor as darwin_nat_target
methods.
(darwin_resume_to, darwin_files_info): Delete.
(_initialize_darwin_inferior): Rename to ...
(_initialize_darwin_nat): ... this. Adjust to C++ification.
* darwin-nat.h: Include "inf-child.h".
(darwin_nat_target): New class.
(darwin_complete_target): Delete.
* i386-darwin-nat.c (i386_darwin_nat_target): New class.
(darwin_target): New.
(i386_darwin_fetch_inferior_registers)
(i386_darwin_store_inferior_registers): Refactor as methods of
darwin_nat_target.
(darwin_complete_target): Delete, with ...
(_initialize_i386_darwin_nat): ... bits factored out here.
* alpha-linux-nat.c (alpha_linux_nat_target): New class.
(the_alpha_linux_nat_target): New.
(alpha_linux_register_u_offset): Refactor as
alpha_linux_nat_target method.
(_initialize_alpha_linux_nat): Adjust.
* linux-nat-trad.c (inf_ptrace_register_u_offset): Delete.
(inf_ptrace_fetch_register, inf_ptrace_fetch_registers)
(inf_ptrace_store_register, inf_ptrace_store_registers): Refact as
methods of linux_nat_trad_target.
(linux_trad_target): Delete.
* linux-nat-trad.h (linux_trad_target): Delete function.
(linux_nat_trad_target): New class.
* mips-linux-nat.c (mips_linux_nat_target): New class.
(super_fetch_registers, super_store_registers, super_close):
Delete.
(the_mips_linux_nat_target): New.
(mips64_linux_regsets_fetch_registers)
(mips64_linux_regsets_store_registers)
(mips64_linux_fetch_registers, mips64_linux_store_registers)
(mips_linux_register_u_offset, mips_linux_read_description)
(mips_linux_can_use_hw_breakpoint)
(mips_linux_stopped_by_watchpoint)
(mips_linux_stopped_data_address)
(mips_linux_region_ok_for_hw_watchpoint)
(mips_linux_insert_watchpoint, mips_linux_remove_watchpoint)
(mips_linux_close): Refactor as methods of mips_linux_nat.
(_initialize_mips_linux_nat): Adjust to C++ification.
* aix-thread.c (aix_thread_target): New class.
(aix_thread_ops): Now an aix_thread_target.
(aix_thread_detach, aix_thread_resume, aix_thread_wait)
(aix_thread_fetch_registers, aix_thread_store_registers)
(aix_thread_xfer_partial, aix_thread_mourn_inferior)
(aix_thread_thread_alive, aix_thread_pid_to_str)
(aix_thread_extra_thread_info, aix_thread_get_ada_task_ptid):
Refactor as methods of aix_thread_target.
(init_aix_thread_ops): Delete.
(_initialize_aix_thread): Remove references to init_aix_thread_ops
and complete_target_initialization.
* rs6000-nat.c (rs6000_xfer_shared_libraries): Delete.
(rs6000_nat_target): New class.
(the_rs6000_nat_target): New.
(rs6000_fetch_inferior_registers, rs6000_store_inferior_registers)
(rs6000_xfer_partial, rs6000_wait, rs6000_create_inferior)
(rs6000_xfer_shared_libraries): Refactor as rs6000_nat_target methods.
(super_create_inferior): Delete.
(_initialize_rs6000_nat): Adjust to C++ification.
* arm-linux-nat.c (arm_linux_nat_target): New class.
(the_arm_linux_nat_target): New.
(arm_linux_fetch_inferior_registers)
(arm_linux_store_inferior_registers, arm_linux_read_description)
(arm_linux_can_use_hw_breakpoint, arm_linux_insert_hw_breakpoint)
(arm_linux_remove_hw_breakpoint)
(arm_linux_region_ok_for_hw_watchpoint)
(arm_linux_insert_watchpoint, arm_linux_remove_watchpoint)
(arm_linux_stopped_data_address, arm_linux_stopped_by_watchpoint)
(arm_linux_watchpoint_addr_within_range): Refactor as methods of
arm_linux_nat_target.
(_initialize_arm_linux_nat): Adjust to C++ification.
* aarch64-linux-nat.c (aarch64_linux_nat_target): New class.
(the_aarch64_linux_nat_target): New.
(aarch64_linux_fetch_inferior_registers)
(aarch64_linux_store_inferior_registers)
(aarch64_linux_child_post_startup_inferior)
(aarch64_linux_read_description)
(aarch64_linux_can_use_hw_breakpoint)
(aarch64_linux_insert_hw_breakpoint)
(aarch64_linux_remove_hw_breakpoint)
(aarch64_linux_insert_watchpoint, aarch64_linux_remove_watchpoint)
(aarch64_linux_region_ok_for_hw_watchpoint)
(aarch64_linux_stopped_data_address)
(aarch64_linux_stopped_by_watchpoint)
(aarch64_linux_watchpoint_addr_within_range)
(aarch64_linux_can_do_single_step): Refactor as methods of
aarch64_linux_nat_target.
(super_post_startup_inferior): Delete.
(_initialize_aarch64_linux_nat): Adjust to C++ification.
* hppa-linux-nat.c (hppa_linux_nat_target): New class.
(the_hppa_linux_nat_target): New.
(hppa_linux_fetch_inferior_registers)
(hppa_linux_store_inferior_registers): Refactor as methods of
hppa_linux_nat_target.
(_initialize_hppa_linux_nat): Adjust to C++ification.
* ia64-linux-nat.c (ia64_linux_nat_target): New class.
(the_ia64_linux_nat_target): New.
(ia64_linux_insert_watchpoint, ia64_linux_remove_watchpoint)
(ia64_linux_stopped_data_address)
(ia64_linux_stopped_by_watchpoint, ia64_linux_fetch_registers)
(ia64_linux_store_registers, ia64_linux_xfer_partial): Refactor as
ia64_linux_nat_target methods.
(super_xfer_partial): Delete.
(_initialize_ia64_linux_nat): Adjust to C++ification.
* m32r-linux-nat.c (m32r_linux_nat_target): New class.
(the_m32r_linux_nat_target): New.
(m32r_linux_fetch_inferior_registers)
(m32r_linux_store_inferior_registers): Refactor as
m32r_linux_nat_target methods.
(_initialize_m32r_linux_nat): Adjust to C++ification.
* m68k-linux-nat.c (m68k_linux_nat_target): New class.
(the_m68k_linux_nat_target): New.
(m68k_linux_fetch_inferior_registers)
(m68k_linux_store_inferior_registers): Refactor as
m68k_linux_nat_target methods.
(_initialize_m68k_linux_nat): Adjust to C++ification.
* s390-linux-nat.c (s390_linux_nat_target): New class.
(the_s390_linux_nat_target): New.
(s390_linux_fetch_inferior_registers)
(s390_linux_store_inferior_registers, s390_stopped_by_watchpoint)
(s390_insert_watchpoint, s390_remove_watchpoint)
(s390_can_use_hw_breakpoint, s390_insert_hw_breakpoint)
(s390_remove_hw_breakpoint, s390_region_ok_for_hw_watchpoint)
(s390_auxv_parse, s390_read_description): Refactor as methods of
s390_linux_nat_target.
(_initialize_s390_nat): Adjust to C++ification.
* sparc-linux-nat.c (sparc_linux_nat_target): New class.
(the_sparc_linux_nat_target): New.
(_initialize_sparc_linux_nat): Adjust to C++ification.
* sparc-nat.c (sparc_fetch_inferior_registers)
(sparc_store_inferior_registers): Remove target_ops parameter.
* sparc-nat.h (sparc_fetch_inferior_registers)
(sparc_store_inferior_registers): Remove target_ops parameter.
* sparc64-linux-nat.c (sparc64_linux_nat_target): New class.
(the_sparc64_linux_nat_target): New.
(_initialize_sparc64_linux_nat): Adjust to C++ification.
* spu-linux-nat.c (spu_linux_nat_target): New class.
(the_spu_linux_nat_target): New.
(spu_child_post_startup_inferior, spu_child_post_attach)
(spu_child_wait, spu_fetch_inferior_registers)
(spu_store_inferior_registers, spu_xfer_partial)
(spu_can_use_hw_breakpoint): Refactor as spu_linux_nat_target
methods.
(_initialize_spu_nat): Adjust to C++ification.
* tilegx-linux-nat.c (tilegx_linux_nat_target): New class.
(the_tilegx_linux_nat_target): New.
(fetch_inferior_registers, store_inferior_registers):
Refactor as methods.
(_initialize_tile_linux_nat): Adjust to C++ification.
* xtensa-linux-nat.c (xtensa_linux_nat_target): New class.
(the_xtensa_linux_nat_target): New.
(xtensa_linux_fetch_inferior_registers)
(xtensa_linux_store_inferior_registers): Refactor as
xtensa_linux_nat_target methods.
(_initialize_xtensa_linux_nat): Adjust to C++ification.
* fbsd-nat.c (USE_SIGTRAP_SIGINFO): Delete.
(fbsd_pid_to_exec_file, fbsd_find_memory_regions)
(fbsd_find_memory_regions, fbsd_info_proc, fbsd_xfer_partial)
(fbsd_thread_alive, fbsd_pid_to_str, fbsd_thread_name)
(fbsd_update_thread_list, fbsd_resume, fbsd_wait)
(fbsd_stopped_by_sw_breakpoint)
(fbsd_supports_stopped_by_sw_breakpoint, fbsd_follow_fork)
(fbsd_insert_fork_catchpoint, fbsd_remove_fork_catchpoint)
(fbsd_insert_vfork_catchpoint, fbsd_remove_vfork_catchpoint)
(fbsd_post_startup_inferior, fbsd_post_attach)
(fbsd_insert_exec_catchpoint, fbsd_remove_exec_catchpoint)
(fbsd_set_syscall_catchpoint)
(super_xfer_partial, super_resume, super_wait)
(fbsd_supports_stopped_by_hw_breakpoint): Delete.
(fbsd_handle_debug_trap): Remove target_ops parameter.
(fbsd_nat_add_target): Delete.
* fbsd-nat.h: Include "inf-ptrace.h".
(fbsd_nat_add_target): Delete.
(USE_SIGTRAP_SIGINFO): Define.
(fbsd_nat_target): New class.
* amd64-bsd-nat.c (amd64bsd_fetch_inferior_registers)
(amd64bsd_store_inferior_registers): Remove target_ops parameter.
(amd64bsd_target): Delete.
* amd64-bsd-nat.h: New file.
* amd64-fbsd-nat.c: Include "amd64-bsd-nat.h" instead of
"x86-bsd-nat.h".
(amd64_fbsd_nat_target): New class.
(the_amd64_fbsd_nat_target): New.
(amd64fbsd_read_description): Refactor as method of
amd64_fbsd_nat_target.
(amd64_fbsd_nat_target::supports_stopped_by_hw_breakpoint): New.
(_initialize_amd64fbsd_nat): Adjust to C++ification.
* amd64-nat.h (amd64bsd_target): Delete function declaration.
* i386-bsd-nat.c (i386bsd_fetch_inferior_registers)
(i386bsd_store_inferior_registers): Remove target_ops parameter.
(i386bsd_target): Delete.
* i386-bsd-nat.h (i386bsd_target): Delete function declaration.
(i386bsd_fetch_inferior_registers)
(i386bsd_store_inferior_registers): Declare.
(i386_bsd_nat_target): New class.
* i386-fbsd-nat.c (i386_fbsd_nat_target): New class.
(the_i386_fbsd_nat_target): New.
(i386fbsd_resume, i386fbsd_read_description): Refactor as
i386_fbsd_nat_target methods.
(i386_fbsd_nat_target::supports_stopped_by_hw_breakpoint): New.
(_initialize_i386fbsd_nat): Adjust to C++ification.
* x86-bsd-nat.c (super_mourn_inferior): Delete.
(x86bsd_mourn_inferior, x86bsd_target): Delete.
(_initialize_x86_bsd_nat): Adjust to C++ification.
* x86-bsd-nat.h: Include "x86-nat.h".
(x86bsd_target): Delete declaration.
(x86bsd_nat_target): New class.
* aarch64-fbsd-nat.c (aarch64_fbsd_nat_target): New class.
(the_aarch64_fbsd_nat_target): New.
(aarch64_fbsd_fetch_inferior_registers)
(aarch64_fbsd_store_inferior_registers): Refactor as methods of
aarch64_fbsd_nat_target.
(_initialize_aarch64_fbsd_nat): Adjust to C++ification.
* alpha-bsd-nat.c (alpha_bsd_nat_target): New class.
(the_alpha_bsd_nat_target): New.
(alphabsd_fetch_inferior_registers)
(alphabsd_store_inferior_registers): Refactor as
alpha_bsd_nat_target methods.
(_initialize_alphabsd_nat): Refactor as methods of
alpha_bsd_nat_target.
* amd64-nbsd-nat.c: Include "amd64-bsd-nat.h".
(the_amd64_nbsd_nat_target): New.
(_initialize_amd64nbsd_nat): Adjust to C++ification.
* amd64-obsd-nat.c: Include "amd64-bsd-nat.h".
(the_amd64_obsd_nat_target): New.
(_initialize_amd64obsd_nat): Adjust to C++ification.
* arm-fbsd-nat.c (arm_fbsd_nat_target): New.
(the_arm_fbsd_nat_target): New.
(arm_fbsd_fetch_inferior_registers)
(arm_fbsd_store_inferior_registers, arm_fbsd_read_description):
(_initialize_arm_fbsd_nat): Refactor as methods of
arm_fbsd_nat_target.
(_initialize_arm_fbsd_nat): Adjust to C++ification.
* arm-nbsd-nat.c (arm_netbsd_nat_target): New class.
(the_arm_netbsd_nat_target): New.
(armnbsd_fetch_registers, armnbsd_store_registers): Refactor as
arm_netbsd_nat_target.
(_initialize_arm_netbsd_nat): Adjust to C++ification.
* hppa-nbsd-nat.c (hppa_nbsd_nat_target): New class.
(the_hppa_nbsd_nat_target): New.
(hppanbsd_fetch_registers, hppanbsd_store_registers): Refactor as
hppa_nbsd_nat_target methods.
(_initialize_hppanbsd_nat): Adjust to C++ification.
* hppa-obsd-nat.c (hppa_obsd_nat_target): New class.
(the_hppa_obsd_nat_target): New.
(hppaobsd_fetch_registers, hppaobsd_store_registers): Refactor as
methods of hppa_obsd_nat_target.
(_initialize_hppaobsd_nat): Adjust to C++ification. Use
add_target.
* i386-nbsd-nat.c (the_i386_nbsd_nat_target): New.
(_initialize_i386nbsd_nat): Adjust to C++ification. Use
add_target.
* i386-obsd-nat.c (the_i386_obsd_nat_target): New.
(_initialize_i386obsd_nat): Use add_target.
* m68k-bsd-nat.c (m68k_bsd_nat_target): New class.
(the_m68k_bsd_nat_target): New.
(m68kbsd_fetch_inferior_registers)
(m68kbsd_store_inferior_registers): Refactor as methods of
m68k_bsd_nat_target.
(_initialize_m68kbsd_nat): Adjust to C++ification.
* mips-fbsd-nat.c (mips_fbsd_nat_target): New class.
(the_mips_fbsd_nat_target): New.
(mips_fbsd_fetch_inferior_registers)
(mips_fbsd_store_inferior_registers): Refactor as methods of
mips_fbsd_nat_target.
(_initialize_mips_fbsd_nat): Adjust to C++ification. Use
add_target.
* mips-nbsd-nat.c (mips_nbsd_nat_target): New class.
(the_mips_nbsd_nat_target): New.
(mipsnbsd_fetch_inferior_registers)
(mipsnbsd_store_inferior_registers): Refactor as methods of
mips_nbsd_nat_target.
(_initialize_mipsnbsd_nat): Adjust to C++ification.
* mips64-obsd-nat.c (mips64_obsd_nat_target): New class.
(the_mips64_obsd_nat_target): New.
(mips64obsd_fetch_inferior_registers)
(mips64obsd_store_inferior_registers): Refactor as methods of
mips64_obsd_nat_target.
(_initialize_mips64obsd_nat): Adjust to C++ification. Use
add_target.
* nbsd-nat.c (nbsd_pid_to_exec_file): Refactor as method of
nbsd_nat_target.
* nbsd-nat.h: Include "inf-ptrace.h".
(nbsd_nat_target): New class.
* obsd-nat.c (obsd_pid_to_str, obsd_update_thread_list)
(obsd_wait): Refactor as methods of obsd_nat_target.
(obsd_add_target): Delete.
* obsd-nat.h: Include "inf-ptrace.h".
(obsd_nat_target): New class.
* ppc-fbsd-nat.c (ppc_fbsd_nat_target): New class.
(the_ppc_fbsd_nat_target): New.
(ppcfbsd_fetch_inferior_registers)
(ppcfbsd_store_inferior_registers): Refactor as methods of
ppc_fbsd_nat_target.
(_initialize_ppcfbsd_nat): Adjust to C++ification. Use
add_target.
* ppc-nbsd-nat.c (ppc_nbsd_nat_target): New class.
(the_ppc_nbsd_nat_target): New.
(ppcnbsd_fetch_inferior_registers)
(ppcnbsd_store_inferior_registers): Refactor as methods of
ppc_nbsd_nat_target.
(_initialize_ppcnbsd_nat): Adjust to C++ification.
* ppc-obsd-nat.c (ppc_obsd_nat_target): New class.
(the_ppc_obsd_nat_target): New.
(ppcobsd_fetch_registers, ppcobsd_store_registers): Refactor as
methods of ppc_obsd_nat_target.
(_initialize_ppcobsd_nat): Adjust to C++ification. Use
add_target.
* sh-nbsd-nat.c (sh_nbsd_nat_target): New class.
(the_sh_nbsd_nat_target): New.
(shnbsd_fetch_inferior_registers)
(shnbsd_store_inferior_registers): Refactor as methods of
sh_nbsd_nat_target.
(_initialize_shnbsd_nat): Adjust to C++ification.
* sparc-nat.c (sparc_xfer_wcookie): Make extern.
(inf_ptrace_xfer_partial): Delete.
(sparc_xfer_partial, sparc_target): Delete.
* sparc-nat.h (sparc_fetch_inferior_registers)
(sparc_store_inferior_registers, sparc_xfer_wcookie): Declare.
(sparc_target): Delete function declaration.
(sparc_target): New template class.
* sparc-nbsd-nat.c (the_sparc_nbsd_nat_target): New.
(_initialize_sparcnbsd_nat): Adjust to C++ification.
* sparc64-fbsd-nat.c (the_sparc64_fbsd_nat_target): New.
(_initialize_sparc64fbsd_nat): Adjust to C++ification. Use
add_target.
* sparc64-nbsd-nat.c (the_sparc64_nbsd_nat_target): New.
(_initialize_sparc64nbsd_nat): Adjust to C++ification.
* sparc64-obsd-nat.c (the_sparc64_obsd_nat_target): New.
(_initialize_sparc64obsd_nat): Adjust to C++ification. Use
add_target.
* vax-bsd-nat.c (vax_bsd_nat_target): New class.
(the_vax_bsd_nat_target): New.
(vaxbsd_fetch_inferior_registers)
(vaxbsd_store_inferior_registers): Refactor as vax_bsd_nat_target
methods.
(_initialize_vaxbsd_nat): Adjust to C++ification.
* bsd-kvm.c (bsd_kvm_target): New class.
(bsd_kvm_ops): Now a bsd_kvm_target.
(bsd_kvm_open, bsd_kvm_close, bsd_kvm_xfer_partial)
(bsd_kvm_files_info, bsd_kvm_fetch_registers)
(bsd_kvm_thread_alive, bsd_kvm_pid_to_str): Refactor as methods of
bsd_kvm_target.
(bsd_kvm_return_one): Delete.
(bsd_kvm_add_target): Adjust to C++ification.
* nto-procfs.c (nto_procfs_target, nto_procfs_target_native)
(nto_procfs_target_procfs): New classes.
(procfs_open_1, procfs_thread_alive, procfs_update_thread_list)
(procfs_files_info, procfs_pid_to_exec_file, procfs_attach)
(procfs_post_attach, procfs_wait, procfs_fetch_registers)
(procfs_xfer_partial, procfs_detach, procfs_insert_breakpoint)
(procfs_remove_breakpoint, procfs_insert_hw_breakpoint)
(procfs_remove_hw_breakpoint, procfs_resume)
(procfs_mourn_inferior, procfs_create_inferior, procfs_interrupt)
(procfs_kill_inferior, procfs_store_registers)
(procfs_pass_signals, procfs_pid_to_str, procfs_can_run): Refactor
as methods of nto_procfs_target.
(nto_procfs_ops): Now an nto_procfs_target_procfs.
(nto_native_ops): Delete.
(procfs_open, procfs_native_open): Delete.
(nto_native_ops): Now an nto_procfs_target_native.
(init_procfs_targets): Adjust to C++ification.
(procfs_can_use_hw_breakpoint, procfs_remove_hw_watchpoint)
(procfs_insert_hw_watchpoint, procfs_stopped_by_watchpoint):
Refactor as methods of nto_procfs_target.
* go32-nat.c (go32_nat_target): New class.
(the_go32_nat_target): New.
(go32_attach, go32_resume, go32_wait, go32_fetch_registers)
(go32_store_registers, go32_xfer_partial, go32_files_info)
(go32_kill_inferior, go32_create_inferior, go32_mourn_inferior)
(go32_terminal_init, go32_terminal_info, go32_terminal_inferior)
(go32_terminal_ours, go32_pass_ctrlc, go32_thread_alive)
(go32_pid_to_str): Refactor as methods of go32_nat_target.
(go32_target): Delete.
(_initialize_go32_nat): Adjust to C++ification.
* gnu-nat.c (gnu_wait, gnu_resume, gnu_kill_inferior)
(gnu_mourn_inferior, gnu_create_inferior, gnu_attach, gnu_detach)
(gnu_stop, gnu_thread_alive, gnu_xfer_partial)
(gnu_find_memory_regions, gnu_pid_to_str): Refactor as methods of
gnu_nat_target.
(gnu_target): Delete.
* gnu-nat.h (gnu_target): Delete.
(gnu_nat_target): New class.
* i386-gnu-nat.c (gnu_base_target): New.
(i386_gnu_nat_target): New class.
(the_i386_gnu_nat_target): New.
(_initialize_i386gnu_nat): Adjust to C++ification.
gdb/testsuite/ChangeLog:
2018-05-02 Pedro Alves <palves@redhat.com>
* gdb.base/breakpoint-in-ro-region.exp: Adjust to to_resume and
to_log_command renames.
* gdb.base/sss-bp-on-user-bp-2.exp: Likewise.
2261 lines
65 KiB
C
2261 lines
65 KiB
C
/* Target-dependent code for SPARC.
|
||
|
||
Copyright (C) 2003-2018 Free Software Foundation, Inc.
|
||
|
||
This file is part of GDB.
|
||
|
||
This program is free software; you can redistribute it and/or modify
|
||
it under the terms of the GNU General Public License as published by
|
||
the Free Software Foundation; either version 3 of the License, or
|
||
(at your option) any later version.
|
||
|
||
This program is distributed in the hope that it will be useful,
|
||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||
GNU General Public License for more details.
|
||
|
||
You should have received a copy of the GNU General Public License
|
||
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||
|
||
#include "defs.h"
|
||
#include "arch-utils.h"
|
||
#include "dis-asm.h"
|
||
#include "dwarf2.h"
|
||
#include "dwarf2-frame.h"
|
||
#include "frame.h"
|
||
#include "frame-base.h"
|
||
#include "frame-unwind.h"
|
||
#include "gdbcore.h"
|
||
#include "gdbtypes.h"
|
||
#include "inferior.h"
|
||
#include "symtab.h"
|
||
#include "objfiles.h"
|
||
#include "osabi.h"
|
||
#include "regcache.h"
|
||
#include "target.h"
|
||
#include "target-descriptions.h"
|
||
#include "value.h"
|
||
|
||
#include "sparc-tdep.h"
|
||
#include "sparc-ravenscar-thread.h"
|
||
#include <algorithm>
|
||
|
||
struct regset;
|
||
|
||
/* This file implements the SPARC 32-bit ABI as defined by the section
|
||
"Low-Level System Information" of the SPARC Compliance Definition
|
||
(SCD) 2.4.1, which is the 32-bit System V psABI for SPARC. The SCD
|
||
lists changes with respect to the original 32-bit psABI as defined
|
||
in the "System V ABI, SPARC Processor Supplement".
|
||
|
||
Note that if we talk about SunOS, we mean SunOS 4.x, which was
|
||
BSD-based, which is sometimes (retroactively?) referred to as
|
||
Solaris 1.x. If we talk about Solaris we mean Solaris 2.x and
|
||
above (Solaris 7, 8 and 9 are nothing but Solaris 2.7, 2.8 and 2.9
|
||
suffering from severe version number inflation). Solaris 2.x is
|
||
also known as SunOS 5.x, since that's what uname(1) says. Solaris
|
||
2.x is SVR4-based. */
|
||
|
||
/* Please use the sparc32_-prefix for 32-bit specific code, the
|
||
sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
|
||
code that can handle both. The 64-bit specific code lives in
|
||
sparc64-tdep.c; don't add any here. */
|
||
|
||
/* The SPARC Floating-Point Quad-Precision format is similar to
|
||
big-endian IA-64 Quad-Precision format. */
|
||
#define floatformats_sparc_quad floatformats_ia64_quad
|
||
|
||
/* The stack pointer is offset from the stack frame by a BIAS of 2047
|
||
(0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
|
||
hosts, so undefine it first. */
|
||
#undef BIAS
|
||
#define BIAS 2047
|
||
|
||
/* Macros to extract fields from SPARC instructions. */
|
||
#define X_OP(i) (((i) >> 30) & 0x3)
|
||
#define X_RD(i) (((i) >> 25) & 0x1f)
|
||
#define X_A(i) (((i) >> 29) & 1)
|
||
#define X_COND(i) (((i) >> 25) & 0xf)
|
||
#define X_OP2(i) (((i) >> 22) & 0x7)
|
||
#define X_IMM22(i) ((i) & 0x3fffff)
|
||
#define X_OP3(i) (((i) >> 19) & 0x3f)
|
||
#define X_RS1(i) (((i) >> 14) & 0x1f)
|
||
#define X_RS2(i) ((i) & 0x1f)
|
||
#define X_I(i) (((i) >> 13) & 1)
|
||
/* Sign extension macros. */
|
||
#define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
|
||
#define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
|
||
#define X_DISP10(i) ((((((i) >> 11) && 0x300) | (((i) >> 5) & 0xff)) ^ 0x200) - 0x200)
|
||
#define X_SIMM13(i) ((((i) & 0x1fff) ^ 0x1000) - 0x1000)
|
||
/* Macros to identify some instructions. */
|
||
/* RETURN (RETT in V8) */
|
||
#define X_RETTURN(i) ((X_OP (i) == 0x2) && (X_OP3 (i) == 0x39))
|
||
|
||
/* Fetch the instruction at PC. Instructions are always big-endian
|
||
even if the processor operates in little-endian mode. */
|
||
|
||
unsigned long
|
||
sparc_fetch_instruction (CORE_ADDR pc)
|
||
{
|
||
gdb_byte buf[4];
|
||
unsigned long insn;
|
||
int i;
|
||
|
||
/* If we can't read the instruction at PC, return zero. */
|
||
if (target_read_memory (pc, buf, sizeof (buf)))
|
||
return 0;
|
||
|
||
insn = 0;
|
||
for (i = 0; i < sizeof (buf); i++)
|
||
insn = (insn << 8) | buf[i];
|
||
return insn;
|
||
}
|
||
|
||
|
||
/* Return non-zero if the instruction corresponding to PC is an "unimp"
|
||
instruction. */
|
||
|
||
static int
|
||
sparc_is_unimp_insn (CORE_ADDR pc)
|
||
{
|
||
const unsigned long insn = sparc_fetch_instruction (pc);
|
||
|
||
return ((insn & 0xc1c00000) == 0);
|
||
}
|
||
|
||
/* Return non-zero if the instruction corresponding to PC is an
|
||
"annulled" branch, i.e. the annul bit is set. */
|
||
|
||
int
|
||
sparc_is_annulled_branch_insn (CORE_ADDR pc)
|
||
{
|
||
/* The branch instructions featuring an annul bit can be identified
|
||
by the following bit patterns:
|
||
|
||
OP=0
|
||
OP2=1: Branch on Integer Condition Codes with Prediction (BPcc).
|
||
OP2=2: Branch on Integer Condition Codes (Bcc).
|
||
OP2=5: Branch on FP Condition Codes with Prediction (FBfcc).
|
||
OP2=6: Branch on FP Condition Codes (FBcc).
|
||
OP2=3 && Bit28=0:
|
||
Branch on Integer Register with Prediction (BPr).
|
||
|
||
This leaves out ILLTRAP (OP2=0), SETHI/NOP (OP2=4) and the V8
|
||
coprocessor branch instructions (Op2=7). */
|
||
|
||
const unsigned long insn = sparc_fetch_instruction (pc);
|
||
const unsigned op2 = X_OP2 (insn);
|
||
|
||
if ((X_OP (insn) == 0)
|
||
&& ((op2 == 1) || (op2 == 2) || (op2 == 5) || (op2 == 6)
|
||
|| ((op2 == 3) && ((insn & 0x10000000) == 0))))
|
||
return X_A (insn);
|
||
else
|
||
return 0;
|
||
}
|
||
|
||
/* OpenBSD/sparc includes StackGhost, which according to the author's
|
||
website http://stackghost.cerias.purdue.edu "... transparently and
|
||
automatically protects applications' stack frames; more
|
||
specifically, it guards the return pointers. The protection
|
||
mechanisms require no application source or binary modification and
|
||
imposes only a negligible performance penalty."
|
||
|
||
The same website provides the following description of how
|
||
StackGhost works:
|
||
|
||
"StackGhost interfaces with the kernel trap handler that would
|
||
normally write out registers to the stack and the handler that
|
||
would read them back in. By XORing a cookie into the
|
||
return-address saved in the user stack when it is actually written
|
||
to the stack, and then XOR it out when the return-address is pulled
|
||
from the stack, StackGhost can cause attacker corrupted return
|
||
pointers to behave in a manner the attacker cannot predict.
|
||
StackGhost can also use several unused bits in the return pointer
|
||
to detect a smashed return pointer and abort the process."
|
||
|
||
For GDB this means that whenever we're reading %i7 from a stack
|
||
frame's window save area, we'll have to XOR the cookie.
|
||
|
||
More information on StackGuard can be found on in:
|
||
|
||
Mike Frantzen and Mike Shuey. "StackGhost: Hardware Facilitated
|
||
Stack Protection." 2001. Published in USENIX Security Symposium
|
||
'01. */
|
||
|
||
/* Fetch StackGhost Per-Process XOR cookie. */
|
||
|
||
ULONGEST
|
||
sparc_fetch_wcookie (struct gdbarch *gdbarch)
|
||
{
|
||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||
struct target_ops *ops = target_stack;
|
||
gdb_byte buf[8];
|
||
int len;
|
||
|
||
len = target_read (ops, TARGET_OBJECT_WCOOKIE, NULL, buf, 0, 8);
|
||
if (len == -1)
|
||
return 0;
|
||
|
||
/* We should have either an 32-bit or an 64-bit cookie. */
|
||
gdb_assert (len == 4 || len == 8);
|
||
|
||
return extract_unsigned_integer (buf, len, byte_order);
|
||
}
|
||
|
||
|
||
/* The functions on this page are intended to be used to classify
|
||
function arguments. */
|
||
|
||
/* Check whether TYPE is "Integral or Pointer". */
|
||
|
||
static int
|
||
sparc_integral_or_pointer_p (const struct type *type)
|
||
{
|
||
int len = TYPE_LENGTH (type);
|
||
|
||
switch (TYPE_CODE (type))
|
||
{
|
||
case TYPE_CODE_INT:
|
||
case TYPE_CODE_BOOL:
|
||
case TYPE_CODE_CHAR:
|
||
case TYPE_CODE_ENUM:
|
||
case TYPE_CODE_RANGE:
|
||
/* We have byte, half-word, word and extended-word/doubleword
|
||
integral types. The doubleword is an extension to the
|
||
original 32-bit ABI by the SCD 2.4.x. */
|
||
return (len == 1 || len == 2 || len == 4 || len == 8);
|
||
case TYPE_CODE_PTR:
|
||
case TYPE_CODE_REF:
|
||
case TYPE_CODE_RVALUE_REF:
|
||
/* Allow either 32-bit or 64-bit pointers. */
|
||
return (len == 4 || len == 8);
|
||
default:
|
||
break;
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
/* Check whether TYPE is "Floating". */
|
||
|
||
static int
|
||
sparc_floating_p (const struct type *type)
|
||
{
|
||
switch (TYPE_CODE (type))
|
||
{
|
||
case TYPE_CODE_FLT:
|
||
{
|
||
int len = TYPE_LENGTH (type);
|
||
return (len == 4 || len == 8 || len == 16);
|
||
}
|
||
default:
|
||
break;
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
/* Check whether TYPE is "Complex Floating". */
|
||
|
||
static int
|
||
sparc_complex_floating_p (const struct type *type)
|
||
{
|
||
switch (TYPE_CODE (type))
|
||
{
|
||
case TYPE_CODE_COMPLEX:
|
||
{
|
||
int len = TYPE_LENGTH (type);
|
||
return (len == 8 || len == 16 || len == 32);
|
||
}
|
||
default:
|
||
break;
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
/* Check whether TYPE is "Structure or Union".
|
||
|
||
In terms of Ada subprogram calls, arrays are treated the same as
|
||
struct and union types. So this function also returns non-zero
|
||
for array types. */
|
||
|
||
static int
|
||
sparc_structure_or_union_p (const struct type *type)
|
||
{
|
||
switch (TYPE_CODE (type))
|
||
{
|
||
case TYPE_CODE_STRUCT:
|
||
case TYPE_CODE_UNION:
|
||
case TYPE_CODE_ARRAY:
|
||
return 1;
|
||
default:
|
||
break;
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
/* Check whether TYPE is returned on registers. */
|
||
|
||
static bool
|
||
sparc_structure_return_p (const struct type *type)
|
||
{
|
||
if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_LENGTH (type) <= 8)
|
||
{
|
||
struct type *t = check_typedef (TYPE_TARGET_TYPE (type));
|
||
|
||
if (sparc_floating_p (t) && TYPE_LENGTH (t) == 8)
|
||
return true;
|
||
return false;
|
||
}
|
||
if (sparc_floating_p (type) && TYPE_LENGTH (type) == 16)
|
||
return true;
|
||
return sparc_structure_or_union_p (type);
|
||
}
|
||
|
||
/* Check whether TYPE is passed on registers. */
|
||
|
||
static bool
|
||
sparc_arg_on_registers_p (const struct type *type)
|
||
{
|
||
if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_LENGTH (type) <= 8)
|
||
{
|
||
struct type *t = check_typedef (TYPE_TARGET_TYPE (type));
|
||
|
||
if (sparc_floating_p (t) && TYPE_LENGTH (t) == 8)
|
||
return false;
|
||
return true;
|
||
}
|
||
if (sparc_structure_or_union_p (type) || sparc_complex_floating_p (type)
|
||
|| (sparc_floating_p (type) && TYPE_LENGTH (type) == 16))
|
||
return false;
|
||
return true;
|
||
}
|
||
|
||
/* Register information. */
|
||
#define SPARC32_FPU_REGISTERS \
|
||
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
|
||
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
|
||
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
|
||
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
|
||
#define SPARC32_CP0_REGISTERS \
|
||
"y", "psr", "wim", "tbr", "pc", "npc", "fsr", "csr"
|
||
|
||
static const char *sparc_core_register_names[] = { SPARC_CORE_REGISTERS };
|
||
static const char *sparc32_fpu_register_names[] = { SPARC32_FPU_REGISTERS };
|
||
static const char *sparc32_cp0_register_names[] = { SPARC32_CP0_REGISTERS };
|
||
|
||
static const char *sparc32_register_names[] =
|
||
{
|
||
SPARC_CORE_REGISTERS,
|
||
SPARC32_FPU_REGISTERS,
|
||
SPARC32_CP0_REGISTERS
|
||
};
|
||
|
||
/* Total number of registers. */
|
||
#define SPARC32_NUM_REGS ARRAY_SIZE (sparc32_register_names)
|
||
|
||
/* We provide the aliases %d0..%d30 for the floating registers as
|
||
"psuedo" registers. */
|
||
|
||
static const char *sparc32_pseudo_register_names[] =
|
||
{
|
||
"d0", "d2", "d4", "d6", "d8", "d10", "d12", "d14",
|
||
"d16", "d18", "d20", "d22", "d24", "d26", "d28", "d30"
|
||
};
|
||
|
||
/* Total number of pseudo registers. */
|
||
#define SPARC32_NUM_PSEUDO_REGS ARRAY_SIZE (sparc32_pseudo_register_names)
|
||
|
||
/* Return the name of pseudo register REGNUM. */
|
||
|
||
static const char *
|
||
sparc32_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
|
||
{
|
||
regnum -= gdbarch_num_regs (gdbarch);
|
||
|
||
if (regnum < SPARC32_NUM_PSEUDO_REGS)
|
||
return sparc32_pseudo_register_names[regnum];
|
||
|
||
internal_error (__FILE__, __LINE__,
|
||
_("sparc32_pseudo_register_name: bad register number %d"),
|
||
regnum);
|
||
}
|
||
|
||
/* Return the name of register REGNUM. */
|
||
|
||
static const char *
|
||
sparc32_register_name (struct gdbarch *gdbarch, int regnum)
|
||
{
|
||
if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
|
||
return tdesc_register_name (gdbarch, regnum);
|
||
|
||
if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch))
|
||
return sparc32_register_names[regnum];
|
||
|
||
return sparc32_pseudo_register_name (gdbarch, regnum);
|
||
}
|
||
|
||
/* Construct types for ISA-specific registers. */
|
||
|
||
static struct type *
|
||
sparc_psr_type (struct gdbarch *gdbarch)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||
|
||
if (!tdep->sparc_psr_type)
|
||
{
|
||
struct type *type;
|
||
|
||
type = arch_flags_type (gdbarch, "builtin_type_sparc_psr", 32);
|
||
append_flags_type_flag (type, 5, "ET");
|
||
append_flags_type_flag (type, 6, "PS");
|
||
append_flags_type_flag (type, 7, "S");
|
||
append_flags_type_flag (type, 12, "EF");
|
||
append_flags_type_flag (type, 13, "EC");
|
||
|
||
tdep->sparc_psr_type = type;
|
||
}
|
||
|
||
return tdep->sparc_psr_type;
|
||
}
|
||
|
||
static struct type *
|
||
sparc_fsr_type (struct gdbarch *gdbarch)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||
|
||
if (!tdep->sparc_fsr_type)
|
||
{
|
||
struct type *type;
|
||
|
||
type = arch_flags_type (gdbarch, "builtin_type_sparc_fsr", 32);
|
||
append_flags_type_flag (type, 0, "NXA");
|
||
append_flags_type_flag (type, 1, "DZA");
|
||
append_flags_type_flag (type, 2, "UFA");
|
||
append_flags_type_flag (type, 3, "OFA");
|
||
append_flags_type_flag (type, 4, "NVA");
|
||
append_flags_type_flag (type, 5, "NXC");
|
||
append_flags_type_flag (type, 6, "DZC");
|
||
append_flags_type_flag (type, 7, "UFC");
|
||
append_flags_type_flag (type, 8, "OFC");
|
||
append_flags_type_flag (type, 9, "NVC");
|
||
append_flags_type_flag (type, 22, "NS");
|
||
append_flags_type_flag (type, 23, "NXM");
|
||
append_flags_type_flag (type, 24, "DZM");
|
||
append_flags_type_flag (type, 25, "UFM");
|
||
append_flags_type_flag (type, 26, "OFM");
|
||
append_flags_type_flag (type, 27, "NVM");
|
||
|
||
tdep->sparc_fsr_type = type;
|
||
}
|
||
|
||
return tdep->sparc_fsr_type;
|
||
}
|
||
|
||
/* Return the GDB type object for the "standard" data type of data in
|
||
pseudo register REGNUM. */
|
||
|
||
static struct type *
|
||
sparc32_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
|
||
{
|
||
regnum -= gdbarch_num_regs (gdbarch);
|
||
|
||
if (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM)
|
||
return builtin_type (gdbarch)->builtin_double;
|
||
|
||
internal_error (__FILE__, __LINE__,
|
||
_("sparc32_pseudo_register_type: bad register number %d"),
|
||
regnum);
|
||
}
|
||
|
||
/* Return the GDB type object for the "standard" data type of data in
|
||
register REGNUM. */
|
||
|
||
static struct type *
|
||
sparc32_register_type (struct gdbarch *gdbarch, int regnum)
|
||
{
|
||
if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
|
||
return tdesc_register_type (gdbarch, regnum);
|
||
|
||
if (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F31_REGNUM)
|
||
return builtin_type (gdbarch)->builtin_float;
|
||
|
||
if (regnum == SPARC_SP_REGNUM || regnum == SPARC_FP_REGNUM)
|
||
return builtin_type (gdbarch)->builtin_data_ptr;
|
||
|
||
if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM)
|
||
return builtin_type (gdbarch)->builtin_func_ptr;
|
||
|
||
if (regnum == SPARC32_PSR_REGNUM)
|
||
return sparc_psr_type (gdbarch);
|
||
|
||
if (regnum == SPARC32_FSR_REGNUM)
|
||
return sparc_fsr_type (gdbarch);
|
||
|
||
if (regnum >= gdbarch_num_regs (gdbarch))
|
||
return sparc32_pseudo_register_type (gdbarch, regnum);
|
||
|
||
return builtin_type (gdbarch)->builtin_int32;
|
||
}
|
||
|
||
static enum register_status
|
||
sparc32_pseudo_register_read (struct gdbarch *gdbarch,
|
||
readable_regcache *regcache,
|
||
int regnum, gdb_byte *buf)
|
||
{
|
||
enum register_status status;
|
||
|
||
regnum -= gdbarch_num_regs (gdbarch);
|
||
gdb_assert (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM);
|
||
|
||
regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC32_D0_REGNUM);
|
||
status = regcache->raw_read (regnum, buf);
|
||
if (status == REG_VALID)
|
||
status = regcache->raw_read (regnum + 1, buf + 4);
|
||
return status;
|
||
}
|
||
|
||
static void
|
||
sparc32_pseudo_register_write (struct gdbarch *gdbarch,
|
||
struct regcache *regcache,
|
||
int regnum, const gdb_byte *buf)
|
||
{
|
||
regnum -= gdbarch_num_regs (gdbarch);
|
||
gdb_assert (regnum >= SPARC32_D0_REGNUM && regnum <= SPARC32_D30_REGNUM);
|
||
|
||
regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC32_D0_REGNUM);
|
||
regcache_raw_write (regcache, regnum, buf);
|
||
regcache_raw_write (regcache, regnum + 1, buf + 4);
|
||
}
|
||
|
||
/* Implement the stack_frame_destroyed_p gdbarch method. */
|
||
|
||
int
|
||
sparc_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
|
||
{
|
||
/* This function must return true if we are one instruction after an
|
||
instruction that destroyed the stack frame of the current
|
||
function. The SPARC instructions used to restore the callers
|
||
stack frame are RESTORE and RETURN/RETT.
|
||
|
||
Of these RETURN/RETT is a branch instruction and thus we return
|
||
true if we are in its delay slot.
|
||
|
||
RESTORE is almost always found in the delay slot of a branch
|
||
instruction that transfers control to the caller, such as JMPL.
|
||
Thus the next instruction is in the caller frame and we don't
|
||
need to do anything about it. */
|
||
|
||
unsigned int insn = sparc_fetch_instruction (pc - 4);
|
||
|
||
return X_RETTURN (insn);
|
||
}
|
||
|
||
|
||
static CORE_ADDR
|
||
sparc32_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
|
||
{
|
||
/* The ABI requires double-word alignment. */
|
||
return address & ~0x7;
|
||
}
|
||
|
||
static CORE_ADDR
|
||
sparc32_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
|
||
CORE_ADDR funcaddr,
|
||
struct value **args, int nargs,
|
||
struct type *value_type,
|
||
CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
|
||
struct regcache *regcache)
|
||
{
|
||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||
|
||
*bp_addr = sp - 4;
|
||
*real_pc = funcaddr;
|
||
|
||
if (using_struct_return (gdbarch, NULL, value_type))
|
||
{
|
||
gdb_byte buf[4];
|
||
|
||
/* This is an UNIMP instruction. */
|
||
store_unsigned_integer (buf, 4, byte_order,
|
||
TYPE_LENGTH (value_type) & 0x1fff);
|
||
write_memory (sp - 8, buf, 4);
|
||
return sp - 8;
|
||
}
|
||
|
||
return sp - 4;
|
||
}
|
||
|
||
static CORE_ADDR
|
||
sparc32_store_arguments (struct regcache *regcache, int nargs,
|
||
struct value **args, CORE_ADDR sp,
|
||
int struct_return, CORE_ADDR struct_addr)
|
||
{
|
||
struct gdbarch *gdbarch = regcache->arch ();
|
||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||
/* Number of words in the "parameter array". */
|
||
int num_elements = 0;
|
||
int element = 0;
|
||
int i;
|
||
|
||
for (i = 0; i < nargs; i++)
|
||
{
|
||
struct type *type = value_type (args[i]);
|
||
int len = TYPE_LENGTH (type);
|
||
|
||
if (!sparc_arg_on_registers_p (type))
|
||
{
|
||
/* Structure, Union and Quad-Precision Arguments. */
|
||
sp -= len;
|
||
|
||
/* Use doubleword alignment for these values. That's always
|
||
correct, and wasting a few bytes shouldn't be a problem. */
|
||
sp &= ~0x7;
|
||
|
||
write_memory (sp, value_contents (args[i]), len);
|
||
args[i] = value_from_pointer (lookup_pointer_type (type), sp);
|
||
num_elements++;
|
||
}
|
||
else if (sparc_floating_p (type))
|
||
{
|
||
/* Floating arguments. */
|
||
gdb_assert (len == 4 || len == 8);
|
||
num_elements += (len / 4);
|
||
}
|
||
else
|
||
{
|
||
/* Integral and pointer arguments. */
|
||
gdb_assert (sparc_integral_or_pointer_p (type)
|
||
|| (TYPE_CODE (type) == TYPE_CODE_ARRAY && len <= 8));
|
||
num_elements += ((len + 3) / 4);
|
||
}
|
||
}
|
||
|
||
/* Always allocate at least six words. */
|
||
sp -= std::max (6, num_elements) * 4;
|
||
|
||
/* The psABI says that "Software convention requires space for the
|
||
struct/union return value pointer, even if the word is unused." */
|
||
sp -= 4;
|
||
|
||
/* The psABI says that "Although software convention and the
|
||
operating system require every stack frame to be doubleword
|
||
aligned." */
|
||
sp &= ~0x7;
|
||
|
||
for (i = 0; i < nargs; i++)
|
||
{
|
||
const bfd_byte *valbuf = value_contents (args[i]);
|
||
struct type *type = value_type (args[i]);
|
||
int len = TYPE_LENGTH (type);
|
||
gdb_byte buf[4];
|
||
|
||
if (len < 4)
|
||
{
|
||
memset (buf, 0, 4 - len);
|
||
memcpy (buf + 4 - len, valbuf, len);
|
||
valbuf = buf;
|
||
len = 4;
|
||
}
|
||
|
||
gdb_assert (len == 4 || len == 8);
|
||
|
||
if (element < 6)
|
||
{
|
||
int regnum = SPARC_O0_REGNUM + element;
|
||
|
||
regcache_cooked_write (regcache, regnum, valbuf);
|
||
if (len > 4 && element < 5)
|
||
regcache_cooked_write (regcache, regnum + 1, valbuf + 4);
|
||
}
|
||
|
||
/* Always store the argument in memory. */
|
||
write_memory (sp + 4 + element * 4, valbuf, len);
|
||
element += len / 4;
|
||
}
|
||
|
||
gdb_assert (element == num_elements);
|
||
|
||
if (struct_return)
|
||
{
|
||
gdb_byte buf[4];
|
||
|
||
store_unsigned_integer (buf, 4, byte_order, struct_addr);
|
||
write_memory (sp, buf, 4);
|
||
}
|
||
|
||
return sp;
|
||
}
|
||
|
||
static CORE_ADDR
|
||
sparc32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
||
struct regcache *regcache, CORE_ADDR bp_addr,
|
||
int nargs, struct value **args, CORE_ADDR sp,
|
||
int struct_return, CORE_ADDR struct_addr)
|
||
{
|
||
CORE_ADDR call_pc = (struct_return ? (bp_addr - 12) : (bp_addr - 8));
|
||
|
||
/* Set return address. */
|
||
regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, call_pc);
|
||
|
||
/* Set up function arguments. */
|
||
sp = sparc32_store_arguments (regcache, nargs, args, sp,
|
||
struct_return, struct_addr);
|
||
|
||
/* Allocate the 16-word window save area. */
|
||
sp -= 16 * 4;
|
||
|
||
/* Stack should be doubleword aligned at this point. */
|
||
gdb_assert (sp % 8 == 0);
|
||
|
||
/* Finally, update the stack pointer. */
|
||
regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
|
||
|
||
return sp;
|
||
}
|
||
|
||
|
||
/* Use the program counter to determine the contents and size of a
|
||
breakpoint instruction. Return a pointer to a string of bytes that
|
||
encode a breakpoint instruction, store the length of the string in
|
||
*LEN and optionally adjust *PC to point to the correct memory
|
||
location for inserting the breakpoint. */
|
||
constexpr gdb_byte sparc_break_insn[] = { 0x91, 0xd0, 0x20, 0x01 };
|
||
|
||
typedef BP_MANIPULATION (sparc_break_insn) sparc_breakpoint;
|
||
|
||
|
||
/* Allocate and initialize a frame cache. */
|
||
|
||
static struct sparc_frame_cache *
|
||
sparc_alloc_frame_cache (void)
|
||
{
|
||
struct sparc_frame_cache *cache;
|
||
|
||
cache = FRAME_OBSTACK_ZALLOC (struct sparc_frame_cache);
|
||
|
||
/* Base address. */
|
||
cache->base = 0;
|
||
cache->pc = 0;
|
||
|
||
/* Frameless until proven otherwise. */
|
||
cache->frameless_p = 1;
|
||
cache->frame_offset = 0;
|
||
cache->saved_regs_mask = 0;
|
||
cache->copied_regs_mask = 0;
|
||
cache->struct_return_p = 0;
|
||
|
||
return cache;
|
||
}
|
||
|
||
/* GCC generates several well-known sequences of instructions at the begining
|
||
of each function prologue when compiling with -fstack-check. If one of
|
||
such sequences starts at START_PC, then return the address of the
|
||
instruction immediately past this sequence. Otherwise, return START_PC. */
|
||
|
||
static CORE_ADDR
|
||
sparc_skip_stack_check (const CORE_ADDR start_pc)
|
||
{
|
||
CORE_ADDR pc = start_pc;
|
||
unsigned long insn;
|
||
int probing_loop = 0;
|
||
|
||
/* With GCC, all stack checking sequences begin with the same two
|
||
instructions, plus an optional one in the case of a probing loop:
|
||
|
||
sethi <some immediate>, %g1
|
||
sub %sp, %g1, %g1
|
||
|
||
or:
|
||
|
||
sethi <some immediate>, %g1
|
||
sethi <some immediate>, %g4
|
||
sub %sp, %g1, %g1
|
||
|
||
or:
|
||
|
||
sethi <some immediate>, %g1
|
||
sub %sp, %g1, %g1
|
||
sethi <some immediate>, %g4
|
||
|
||
If the optional instruction is found (setting g4), assume that a
|
||
probing loop will follow. */
|
||
|
||
/* sethi <some immediate>, %g1 */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 1))
|
||
return start_pc;
|
||
|
||
/* optional: sethi <some immediate>, %g4 */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
|
||
{
|
||
probing_loop = 1;
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
}
|
||
|
||
/* sub %sp, %g1, %g1 */
|
||
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
|
||
&& X_RD (insn) == 1 && X_RS1 (insn) == 14 && X_RS2 (insn) == 1))
|
||
return start_pc;
|
||
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
|
||
/* optional: sethi <some immediate>, %g4 */
|
||
if (X_OP (insn) == 0 && X_OP2 (insn) == 0x4 && X_RD (insn) == 4)
|
||
{
|
||
probing_loop = 1;
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
}
|
||
|
||
/* First possible sequence:
|
||
[first two instructions above]
|
||
clr [%g1 - some immediate] */
|
||
|
||
/* clr [%g1 - some immediate] */
|
||
if (X_OP (insn) == 3 && X_OP3(insn) == 0x4 && X_I(insn)
|
||
&& X_RS1 (insn) == 1 && X_RD (insn) == 0)
|
||
{
|
||
/* Valid stack-check sequence, return the new PC. */
|
||
return pc;
|
||
}
|
||
|
||
/* Second possible sequence: A small number of probes.
|
||
[first two instructions above]
|
||
clr [%g1]
|
||
add %g1, -<some immediate>, %g1
|
||
clr [%g1]
|
||
[repeat the two instructions above any (small) number of times]
|
||
clr [%g1 - some immediate] */
|
||
|
||
/* clr [%g1] */
|
||
else if (X_OP (insn) == 3 && X_OP3(insn) == 0x4 && !X_I(insn)
|
||
&& X_RS1 (insn) == 1 && X_RD (insn) == 0)
|
||
{
|
||
while (1)
|
||
{
|
||
/* add %g1, -<some immediate>, %g1 */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 2 && X_OP3(insn) == 0 && X_I(insn)
|
||
&& X_RS1 (insn) == 1 && X_RD (insn) == 1))
|
||
break;
|
||
|
||
/* clr [%g1] */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && !X_I(insn)
|
||
&& X_RD (insn) == 0 && X_RS1 (insn) == 1))
|
||
return start_pc;
|
||
}
|
||
|
||
/* clr [%g1 - some immediate] */
|
||
if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && X_I(insn)
|
||
&& X_RS1 (insn) == 1 && X_RD (insn) == 0))
|
||
return start_pc;
|
||
|
||
/* We found a valid stack-check sequence, return the new PC. */
|
||
return pc;
|
||
}
|
||
|
||
/* Third sequence: A probing loop.
|
||
[first three instructions above]
|
||
sub %g1, %g4, %g4
|
||
cmp %g1, %g4
|
||
be <disp>
|
||
add %g1, -<some immediate>, %g1
|
||
ba <disp>
|
||
clr [%g1]
|
||
|
||
And an optional last probe for the remainder:
|
||
|
||
clr [%g4 - some immediate] */
|
||
|
||
if (probing_loop)
|
||
{
|
||
/* sub %g1, %g4, %g4 */
|
||
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x4 && !X_I(insn)
|
||
&& X_RD (insn) == 4 && X_RS1 (insn) == 1 && X_RS2 (insn) == 4))
|
||
return start_pc;
|
||
|
||
/* cmp %g1, %g4 */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 2 && X_OP3 (insn) == 0x14 && !X_I(insn)
|
||
&& X_RD (insn) == 0 && X_RS1 (insn) == 1 && X_RS2 (insn) == 4))
|
||
return start_pc;
|
||
|
||
/* be <disp> */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 0 && X_COND (insn) == 0x1))
|
||
return start_pc;
|
||
|
||
/* add %g1, -<some immediate>, %g1 */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 2 && X_OP3(insn) == 0 && X_I(insn)
|
||
&& X_RS1 (insn) == 1 && X_RD (insn) == 1))
|
||
return start_pc;
|
||
|
||
/* ba <disp> */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 0 && X_COND (insn) == 0x8))
|
||
return start_pc;
|
||
|
||
/* clr [%g1] (st %g0, [%g1] or st %g0, [%g1+0]) */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4
|
||
&& X_RD (insn) == 0 && X_RS1 (insn) == 1
|
||
&& (!X_I(insn) || X_SIMM13 (insn) == 0)))
|
||
return start_pc;
|
||
|
||
/* We found a valid stack-check sequence, return the new PC. */
|
||
|
||
/* optional: clr [%g4 - some immediate] */
|
||
insn = sparc_fetch_instruction (pc);
|
||
pc = pc + 4;
|
||
if (!(X_OP (insn) == 3 && X_OP3(insn) == 0x4 && X_I(insn)
|
||
&& X_RS1 (insn) == 4 && X_RD (insn) == 0))
|
||
return pc - 4;
|
||
else
|
||
return pc;
|
||
}
|
||
|
||
/* No stack check code in our prologue, return the start_pc. */
|
||
return start_pc;
|
||
}
|
||
|
||
/* Record the effect of a SAVE instruction on CACHE. */
|
||
|
||
void
|
||
sparc_record_save_insn (struct sparc_frame_cache *cache)
|
||
{
|
||
/* The frame is set up. */
|
||
cache->frameless_p = 0;
|
||
|
||
/* The frame pointer contains the CFA. */
|
||
cache->frame_offset = 0;
|
||
|
||
/* The `local' and `in' registers are all saved. */
|
||
cache->saved_regs_mask = 0xffff;
|
||
|
||
/* The `out' registers are all renamed. */
|
||
cache->copied_regs_mask = 0xff;
|
||
}
|
||
|
||
/* Do a full analysis of the prologue at PC and update CACHE accordingly.
|
||
Bail out early if CURRENT_PC is reached. Return the address where
|
||
the analysis stopped.
|
||
|
||
We handle both the traditional register window model and the single
|
||
register window (aka flat) model. */
|
||
|
||
CORE_ADDR
|
||
sparc_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
|
||
CORE_ADDR current_pc, struct sparc_frame_cache *cache)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||
unsigned long insn;
|
||
int offset = 0;
|
||
int dest = -1;
|
||
|
||
pc = sparc_skip_stack_check (pc);
|
||
|
||
if (current_pc <= pc)
|
||
return current_pc;
|
||
|
||
/* We have to handle to "Procedure Linkage Table" (PLT) special. On
|
||
SPARC the linker usually defines a symbol (typically
|
||
_PROCEDURE_LINKAGE_TABLE_) at the start of the .plt section.
|
||
This symbol makes us end up here with PC pointing at the start of
|
||
the PLT and CURRENT_PC probably pointing at a PLT entry. If we
|
||
would do our normal prologue analysis, we would probably conclude
|
||
that we've got a frame when in reality we don't, since the
|
||
dynamic linker patches up the first PLT with some code that
|
||
starts with a SAVE instruction. Patch up PC such that it points
|
||
at the start of our PLT entry. */
|
||
if (tdep->plt_entry_size > 0 && in_plt_section (current_pc))
|
||
pc = current_pc - ((current_pc - pc) % tdep->plt_entry_size);
|
||
|
||
insn = sparc_fetch_instruction (pc);
|
||
|
||
/* Recognize store insns and record their sources. */
|
||
while (X_OP (insn) == 3
|
||
&& (X_OP3 (insn) == 0x4 /* stw */
|
||
|| X_OP3 (insn) == 0x7 /* std */
|
||
|| X_OP3 (insn) == 0xe) /* stx */
|
||
&& X_RS1 (insn) == SPARC_SP_REGNUM)
|
||
{
|
||
int regnum = X_RD (insn);
|
||
|
||
/* Recognize stores into the corresponding stack slots. */
|
||
if (regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM
|
||
&& ((X_I (insn)
|
||
&& X_SIMM13 (insn) == (X_OP3 (insn) == 0xe
|
||
? (regnum - SPARC_L0_REGNUM) * 8 + BIAS
|
||
: (regnum - SPARC_L0_REGNUM) * 4))
|
||
|| (!X_I (insn) && regnum == SPARC_L0_REGNUM)))
|
||
{
|
||
cache->saved_regs_mask |= (1 << (regnum - SPARC_L0_REGNUM));
|
||
if (X_OP3 (insn) == 0x7)
|
||
cache->saved_regs_mask |= (1 << (regnum + 1 - SPARC_L0_REGNUM));
|
||
}
|
||
|
||
offset += 4;
|
||
|
||
insn = sparc_fetch_instruction (pc + offset);
|
||
}
|
||
|
||
/* Recognize a SETHI insn and record its destination. */
|
||
if (X_OP (insn) == 0 && X_OP2 (insn) == 0x04)
|
||
{
|
||
dest = X_RD (insn);
|
||
offset += 4;
|
||
|
||
insn = sparc_fetch_instruction (pc + offset);
|
||
}
|
||
|
||
/* Allow for an arithmetic operation on DEST or %g1. */
|
||
if (X_OP (insn) == 2 && X_I (insn)
|
||
&& (X_RD (insn) == 1 || X_RD (insn) == dest))
|
||
{
|
||
offset += 4;
|
||
|
||
insn = sparc_fetch_instruction (pc + offset);
|
||
}
|
||
|
||
/* Check for the SAVE instruction that sets up the frame. */
|
||
if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3c)
|
||
{
|
||
sparc_record_save_insn (cache);
|
||
offset += 4;
|
||
return pc + offset;
|
||
}
|
||
|
||
/* Check for an arithmetic operation on %sp. */
|
||
if (X_OP (insn) == 2
|
||
&& (X_OP3 (insn) == 0 || X_OP3 (insn) == 0x4)
|
||
&& X_RS1 (insn) == SPARC_SP_REGNUM
|
||
&& X_RD (insn) == SPARC_SP_REGNUM)
|
||
{
|
||
if (X_I (insn))
|
||
{
|
||
cache->frame_offset = X_SIMM13 (insn);
|
||
if (X_OP3 (insn) == 0)
|
||
cache->frame_offset = -cache->frame_offset;
|
||
}
|
||
offset += 4;
|
||
|
||
insn = sparc_fetch_instruction (pc + offset);
|
||
|
||
/* Check for an arithmetic operation that sets up the frame. */
|
||
if (X_OP (insn) == 2
|
||
&& (X_OP3 (insn) == 0 || X_OP3 (insn) == 0x4)
|
||
&& X_RS1 (insn) == SPARC_SP_REGNUM
|
||
&& X_RD (insn) == SPARC_FP_REGNUM)
|
||
{
|
||
cache->frameless_p = 0;
|
||
cache->frame_offset = 0;
|
||
/* We could check that the amount subtracted to %sp above is the
|
||
same as the one added here, but this seems superfluous. */
|
||
cache->copied_regs_mask |= 0x40;
|
||
offset += 4;
|
||
|
||
insn = sparc_fetch_instruction (pc + offset);
|
||
}
|
||
|
||
/* Check for a move (or) operation that copies the return register. */
|
||
if (X_OP (insn) == 2
|
||
&& X_OP3 (insn) == 0x2
|
||
&& !X_I (insn)
|
||
&& X_RS1 (insn) == SPARC_G0_REGNUM
|
||
&& X_RS2 (insn) == SPARC_O7_REGNUM
|
||
&& X_RD (insn) == SPARC_I7_REGNUM)
|
||
{
|
||
cache->copied_regs_mask |= 0x80;
|
||
offset += 4;
|
||
}
|
||
|
||
return pc + offset;
|
||
}
|
||
|
||
return pc;
|
||
}
|
||
|
||
static CORE_ADDR
|
||
sparc_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||
return frame_unwind_register_unsigned (this_frame, tdep->pc_regnum);
|
||
}
|
||
|
||
/* Return PC of first real instruction of the function starting at
|
||
START_PC. */
|
||
|
||
static CORE_ADDR
|
||
sparc32_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
|
||
{
|
||
struct symtab_and_line sal;
|
||
CORE_ADDR func_start, func_end;
|
||
struct sparc_frame_cache cache;
|
||
|
||
/* This is the preferred method, find the end of the prologue by
|
||
using the debugging information. */
|
||
if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
|
||
{
|
||
sal = find_pc_line (func_start, 0);
|
||
|
||
if (sal.end < func_end
|
||
&& start_pc <= sal.end)
|
||
return sal.end;
|
||
}
|
||
|
||
start_pc = sparc_analyze_prologue (gdbarch, start_pc, 0xffffffffUL, &cache);
|
||
|
||
/* The psABI says that "Although the first 6 words of arguments
|
||
reside in registers, the standard stack frame reserves space for
|
||
them.". It also suggests that a function may use that space to
|
||
"write incoming arguments 0 to 5" into that space, and that's
|
||
indeed what GCC seems to be doing. In that case GCC will
|
||
generate debug information that points to the stack slots instead
|
||
of the registers, so we should consider the instructions that
|
||
write out these incoming arguments onto the stack. */
|
||
|
||
while (1)
|
||
{
|
||
unsigned long insn = sparc_fetch_instruction (start_pc);
|
||
|
||
/* Recognize instructions that store incoming arguments into the
|
||
corresponding stack slots. */
|
||
if (X_OP (insn) == 3 && (X_OP3 (insn) & 0x3c) == 0x04
|
||
&& X_I (insn) && X_RS1 (insn) == SPARC_FP_REGNUM)
|
||
{
|
||
int regnum = X_RD (insn);
|
||
|
||
/* Case of arguments still in %o[0..5]. */
|
||
if (regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O5_REGNUM
|
||
&& !(cache.copied_regs_mask & (1 << (regnum - SPARC_O0_REGNUM)))
|
||
&& X_SIMM13 (insn) == 68 + (regnum - SPARC_O0_REGNUM) * 4)
|
||
{
|
||
start_pc += 4;
|
||
continue;
|
||
}
|
||
|
||
/* Case of arguments copied into %i[0..5]. */
|
||
if (regnum >= SPARC_I0_REGNUM && regnum <= SPARC_I5_REGNUM
|
||
&& (cache.copied_regs_mask & (1 << (regnum - SPARC_I0_REGNUM)))
|
||
&& X_SIMM13 (insn) == 68 + (regnum - SPARC_I0_REGNUM) * 4)
|
||
{
|
||
start_pc += 4;
|
||
continue;
|
||
}
|
||
}
|
||
|
||
break;
|
||
}
|
||
|
||
return start_pc;
|
||
}
|
||
|
||
/* Normal frames. */
|
||
|
||
struct sparc_frame_cache *
|
||
sparc_frame_cache (struct frame_info *this_frame, void **this_cache)
|
||
{
|
||
struct sparc_frame_cache *cache;
|
||
|
||
if (*this_cache)
|
||
return (struct sparc_frame_cache *) *this_cache;
|
||
|
||
cache = sparc_alloc_frame_cache ();
|
||
*this_cache = cache;
|
||
|
||
cache->pc = get_frame_func (this_frame);
|
||
if (cache->pc != 0)
|
||
sparc_analyze_prologue (get_frame_arch (this_frame), cache->pc,
|
||
get_frame_pc (this_frame), cache);
|
||
|
||
if (cache->frameless_p)
|
||
{
|
||
/* This function is frameless, so %fp (%i6) holds the frame
|
||
pointer for our calling frame. Use %sp (%o6) as this frame's
|
||
base address. */
|
||
cache->base =
|
||
get_frame_register_unsigned (this_frame, SPARC_SP_REGNUM);
|
||
}
|
||
else
|
||
{
|
||
/* For normal frames, %fp (%i6) holds the frame pointer, the
|
||
base address for the current stack frame. */
|
||
cache->base =
|
||
get_frame_register_unsigned (this_frame, SPARC_FP_REGNUM);
|
||
}
|
||
|
||
cache->base += cache->frame_offset;
|
||
|
||
if (cache->base & 1)
|
||
cache->base += BIAS;
|
||
|
||
return cache;
|
||
}
|
||
|
||
static int
|
||
sparc32_struct_return_from_sym (struct symbol *sym)
|
||
{
|
||
struct type *type = check_typedef (SYMBOL_TYPE (sym));
|
||
enum type_code code = TYPE_CODE (type);
|
||
|
||
if (code == TYPE_CODE_FUNC || code == TYPE_CODE_METHOD)
|
||
{
|
||
type = check_typedef (TYPE_TARGET_TYPE (type));
|
||
if (sparc_structure_or_union_p (type)
|
||
|| (sparc_floating_p (type) && TYPE_LENGTH (type) == 16))
|
||
return 1;
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
struct sparc_frame_cache *
|
||
sparc32_frame_cache (struct frame_info *this_frame, void **this_cache)
|
||
{
|
||
struct sparc_frame_cache *cache;
|
||
struct symbol *sym;
|
||
|
||
if (*this_cache)
|
||
return (struct sparc_frame_cache *) *this_cache;
|
||
|
||
cache = sparc_frame_cache (this_frame, this_cache);
|
||
|
||
sym = find_pc_function (cache->pc);
|
||
if (sym)
|
||
{
|
||
cache->struct_return_p = sparc32_struct_return_from_sym (sym);
|
||
}
|
||
else
|
||
{
|
||
/* There is no debugging information for this function to
|
||
help us determine whether this function returns a struct
|
||
or not. So we rely on another heuristic which is to check
|
||
the instruction at the return address and see if this is
|
||
an "unimp" instruction. If it is, then it is a struct-return
|
||
function. */
|
||
CORE_ADDR pc;
|
||
int regnum =
|
||
(cache->copied_regs_mask & 0x80) ? SPARC_I7_REGNUM : SPARC_O7_REGNUM;
|
||
|
||
pc = get_frame_register_unsigned (this_frame, regnum) + 8;
|
||
if (sparc_is_unimp_insn (pc))
|
||
cache->struct_return_p = 1;
|
||
}
|
||
|
||
return cache;
|
||
}
|
||
|
||
static void
|
||
sparc32_frame_this_id (struct frame_info *this_frame, void **this_cache,
|
||
struct frame_id *this_id)
|
||
{
|
||
struct sparc_frame_cache *cache =
|
||
sparc32_frame_cache (this_frame, this_cache);
|
||
|
||
/* This marks the outermost frame. */
|
||
if (cache->base == 0)
|
||
return;
|
||
|
||
(*this_id) = frame_id_build (cache->base, cache->pc);
|
||
}
|
||
|
||
static struct value *
|
||
sparc32_frame_prev_register (struct frame_info *this_frame,
|
||
void **this_cache, int regnum)
|
||
{
|
||
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
||
struct sparc_frame_cache *cache =
|
||
sparc32_frame_cache (this_frame, this_cache);
|
||
|
||
if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM)
|
||
{
|
||
CORE_ADDR pc = (regnum == SPARC32_NPC_REGNUM) ? 4 : 0;
|
||
|
||
/* If this functions has a Structure, Union or Quad-Precision
|
||
return value, we have to skip the UNIMP instruction that encodes
|
||
the size of the structure. */
|
||
if (cache->struct_return_p)
|
||
pc += 4;
|
||
|
||
regnum =
|
||
(cache->copied_regs_mask & 0x80) ? SPARC_I7_REGNUM : SPARC_O7_REGNUM;
|
||
pc += get_frame_register_unsigned (this_frame, regnum) + 8;
|
||
return frame_unwind_got_constant (this_frame, regnum, pc);
|
||
}
|
||
|
||
/* Handle StackGhost. */
|
||
{
|
||
ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
|
||
|
||
if (wcookie != 0 && !cache->frameless_p && regnum == SPARC_I7_REGNUM)
|
||
{
|
||
CORE_ADDR addr = cache->base + (regnum - SPARC_L0_REGNUM) * 4;
|
||
ULONGEST i7;
|
||
|
||
/* Read the value in from memory. */
|
||
i7 = get_frame_memory_unsigned (this_frame, addr, 4);
|
||
return frame_unwind_got_constant (this_frame, regnum, i7 ^ wcookie);
|
||
}
|
||
}
|
||
|
||
/* The previous frame's `local' and `in' registers may have been saved
|
||
in the register save area. */
|
||
if (regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM
|
||
&& (cache->saved_regs_mask & (1 << (regnum - SPARC_L0_REGNUM))))
|
||
{
|
||
CORE_ADDR addr = cache->base + (regnum - SPARC_L0_REGNUM) * 4;
|
||
|
||
return frame_unwind_got_memory (this_frame, regnum, addr);
|
||
}
|
||
|
||
/* The previous frame's `out' registers may be accessible as the current
|
||
frame's `in' registers. */
|
||
if (regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM
|
||
&& (cache->copied_regs_mask & (1 << (regnum - SPARC_O0_REGNUM))))
|
||
regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
|
||
|
||
return frame_unwind_got_register (this_frame, regnum, regnum);
|
||
}
|
||
|
||
static const struct frame_unwind sparc32_frame_unwind =
|
||
{
|
||
NORMAL_FRAME,
|
||
default_frame_unwind_stop_reason,
|
||
sparc32_frame_this_id,
|
||
sparc32_frame_prev_register,
|
||
NULL,
|
||
default_frame_sniffer
|
||
};
|
||
|
||
|
||
static CORE_ADDR
|
||
sparc32_frame_base_address (struct frame_info *this_frame, void **this_cache)
|
||
{
|
||
struct sparc_frame_cache *cache =
|
||
sparc32_frame_cache (this_frame, this_cache);
|
||
|
||
return cache->base;
|
||
}
|
||
|
||
static const struct frame_base sparc32_frame_base =
|
||
{
|
||
&sparc32_frame_unwind,
|
||
sparc32_frame_base_address,
|
||
sparc32_frame_base_address,
|
||
sparc32_frame_base_address
|
||
};
|
||
|
||
static struct frame_id
|
||
sparc_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
||
{
|
||
CORE_ADDR sp;
|
||
|
||
sp = get_frame_register_unsigned (this_frame, SPARC_SP_REGNUM);
|
||
if (sp & 1)
|
||
sp += BIAS;
|
||
return frame_id_build (sp, get_frame_pc (this_frame));
|
||
}
|
||
|
||
|
||
/* Extract a function return value of TYPE from REGCACHE, and copy
|
||
that into VALBUF. */
|
||
|
||
static void
|
||
sparc32_extract_return_value (struct type *type, struct regcache *regcache,
|
||
gdb_byte *valbuf)
|
||
{
|
||
int len = TYPE_LENGTH (type);
|
||
gdb_byte buf[32];
|
||
|
||
gdb_assert (!sparc_structure_return_p (type));
|
||
|
||
if (sparc_floating_p (type) || sparc_complex_floating_p (type)
|
||
|| TYPE_CODE (type) == TYPE_CODE_ARRAY)
|
||
{
|
||
/* Floating return values. */
|
||
regcache_cooked_read (regcache, SPARC_F0_REGNUM, buf);
|
||
if (len > 4)
|
||
regcache_cooked_read (regcache, SPARC_F1_REGNUM, buf + 4);
|
||
if (len > 8)
|
||
{
|
||
regcache_cooked_read (regcache, SPARC_F2_REGNUM, buf + 8);
|
||
regcache_cooked_read (regcache, SPARC_F3_REGNUM, buf + 12);
|
||
}
|
||
if (len > 16)
|
||
{
|
||
regcache_cooked_read (regcache, SPARC_F4_REGNUM, buf + 16);
|
||
regcache_cooked_read (regcache, SPARC_F5_REGNUM, buf + 20);
|
||
regcache_cooked_read (regcache, SPARC_F6_REGNUM, buf + 24);
|
||
regcache_cooked_read (regcache, SPARC_F7_REGNUM, buf + 28);
|
||
}
|
||
memcpy (valbuf, buf, len);
|
||
}
|
||
else
|
||
{
|
||
/* Integral and pointer return values. */
|
||
gdb_assert (sparc_integral_or_pointer_p (type));
|
||
|
||
regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
|
||
if (len > 4)
|
||
{
|
||
regcache_cooked_read (regcache, SPARC_O1_REGNUM, buf + 4);
|
||
gdb_assert (len == 8);
|
||
memcpy (valbuf, buf, 8);
|
||
}
|
||
else
|
||
{
|
||
/* Just stripping off any unused bytes should preserve the
|
||
signed-ness just fine. */
|
||
memcpy (valbuf, buf + 4 - len, len);
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Store the function return value of type TYPE from VALBUF into
|
||
REGCACHE. */
|
||
|
||
static void
|
||
sparc32_store_return_value (struct type *type, struct regcache *regcache,
|
||
const gdb_byte *valbuf)
|
||
{
|
||
int len = TYPE_LENGTH (type);
|
||
gdb_byte buf[32];
|
||
|
||
gdb_assert (!sparc_structure_return_p (type));
|
||
|
||
if (sparc_floating_p (type) || sparc_complex_floating_p (type))
|
||
{
|
||
/* Floating return values. */
|
||
memcpy (buf, valbuf, len);
|
||
regcache_cooked_write (regcache, SPARC_F0_REGNUM, buf);
|
||
if (len > 4)
|
||
regcache_cooked_write (regcache, SPARC_F1_REGNUM, buf + 4);
|
||
if (len > 8)
|
||
{
|
||
regcache_cooked_write (regcache, SPARC_F2_REGNUM, buf + 8);
|
||
regcache_cooked_write (regcache, SPARC_F3_REGNUM, buf + 12);
|
||
}
|
||
if (len > 16)
|
||
{
|
||
regcache_cooked_write (regcache, SPARC_F4_REGNUM, buf + 16);
|
||
regcache_cooked_write (regcache, SPARC_F5_REGNUM, buf + 20);
|
||
regcache_cooked_write (regcache, SPARC_F6_REGNUM, buf + 24);
|
||
regcache_cooked_write (regcache, SPARC_F7_REGNUM, buf + 28);
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Integral and pointer return values. */
|
||
gdb_assert (sparc_integral_or_pointer_p (type));
|
||
|
||
if (len > 4)
|
||
{
|
||
gdb_assert (len == 8);
|
||
memcpy (buf, valbuf, 8);
|
||
regcache_cooked_write (regcache, SPARC_O1_REGNUM, buf + 4);
|
||
}
|
||
else
|
||
{
|
||
/* ??? Do we need to do any sign-extension here? */
|
||
memcpy (buf + 4 - len, valbuf, len);
|
||
}
|
||
regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
|
||
}
|
||
}
|
||
|
||
static enum return_value_convention
|
||
sparc32_return_value (struct gdbarch *gdbarch, struct value *function,
|
||
struct type *type, struct regcache *regcache,
|
||
gdb_byte *readbuf, const gdb_byte *writebuf)
|
||
{
|
||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||
|
||
/* The psABI says that "...every stack frame reserves the word at
|
||
%fp+64. If a function returns a structure, union, or
|
||
quad-precision value, this word should hold the address of the
|
||
object into which the return value should be copied." This
|
||
guarantees that we can always find the return value, not just
|
||
before the function returns. */
|
||
|
||
if (sparc_structure_return_p (type))
|
||
{
|
||
ULONGEST sp;
|
||
CORE_ADDR addr;
|
||
|
||
if (readbuf)
|
||
{
|
||
regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
|
||
addr = read_memory_unsigned_integer (sp + 64, 4, byte_order);
|
||
read_memory (addr, readbuf, TYPE_LENGTH (type));
|
||
}
|
||
if (writebuf)
|
||
{
|
||
regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
|
||
addr = read_memory_unsigned_integer (sp + 64, 4, byte_order);
|
||
write_memory (addr, writebuf, TYPE_LENGTH (type));
|
||
}
|
||
|
||
return RETURN_VALUE_ABI_PRESERVES_ADDRESS;
|
||
}
|
||
|
||
if (readbuf)
|
||
sparc32_extract_return_value (type, regcache, readbuf);
|
||
if (writebuf)
|
||
sparc32_store_return_value (type, regcache, writebuf);
|
||
|
||
return RETURN_VALUE_REGISTER_CONVENTION;
|
||
}
|
||
|
||
static int
|
||
sparc32_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
|
||
{
|
||
return (sparc_structure_or_union_p (type)
|
||
|| (sparc_floating_p (type) && TYPE_LENGTH (type) == 16)
|
||
|| sparc_complex_floating_p (type));
|
||
}
|
||
|
||
static int
|
||
sparc32_dwarf2_struct_return_p (struct frame_info *this_frame)
|
||
{
|
||
CORE_ADDR pc = get_frame_address_in_block (this_frame);
|
||
struct symbol *sym = find_pc_function (pc);
|
||
|
||
if (sym)
|
||
return sparc32_struct_return_from_sym (sym);
|
||
return 0;
|
||
}
|
||
|
||
static void
|
||
sparc32_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
|
||
struct dwarf2_frame_state_reg *reg,
|
||
struct frame_info *this_frame)
|
||
{
|
||
int off;
|
||
|
||
switch (regnum)
|
||
{
|
||
case SPARC_G0_REGNUM:
|
||
/* Since %g0 is always zero, there is no point in saving it, and
|
||
people will be inclined omit it from the CFI. Make sure we
|
||
don't warn about that. */
|
||
reg->how = DWARF2_FRAME_REG_SAME_VALUE;
|
||
break;
|
||
case SPARC_SP_REGNUM:
|
||
reg->how = DWARF2_FRAME_REG_CFA;
|
||
break;
|
||
case SPARC32_PC_REGNUM:
|
||
case SPARC32_NPC_REGNUM:
|
||
reg->how = DWARF2_FRAME_REG_RA_OFFSET;
|
||
off = 8;
|
||
if (sparc32_dwarf2_struct_return_p (this_frame))
|
||
off += 4;
|
||
if (regnum == SPARC32_NPC_REGNUM)
|
||
off += 4;
|
||
reg->loc.offset = off;
|
||
break;
|
||
}
|
||
}
|
||
|
||
/* Implement the execute_dwarf_cfa_vendor_op method. */
|
||
|
||
static bool
|
||
sparc_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch, gdb_byte op,
|
||
struct dwarf2_frame_state *fs)
|
||
{
|
||
/* Only DW_CFA_GNU_window_save is expected on SPARC. */
|
||
if (op != DW_CFA_GNU_window_save)
|
||
return false;
|
||
|
||
uint64_t reg;
|
||
int size = register_size (gdbarch, 0);
|
||
|
||
fs->regs.alloc_regs (32);
|
||
for (reg = 8; reg < 16; reg++)
|
||
{
|
||
fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_REG;
|
||
fs->regs.reg[reg].loc.reg = reg + 16;
|
||
}
|
||
for (reg = 16; reg < 32; reg++)
|
||
{
|
||
fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
|
||
fs->regs.reg[reg].loc.offset = (reg - 16) * size;
|
||
}
|
||
|
||
return true;
|
||
}
|
||
|
||
|
||
/* The SPARC Architecture doesn't have hardware single-step support,
|
||
and most operating systems don't implement it either, so we provide
|
||
software single-step mechanism. */
|
||
|
||
static CORE_ADDR
|
||
sparc_analyze_control_transfer (struct regcache *regcache,
|
||
CORE_ADDR pc, CORE_ADDR *npc)
|
||
{
|
||
unsigned long insn = sparc_fetch_instruction (pc);
|
||
int conditional_p = X_COND (insn) & 0x7;
|
||
int branch_p = 0, fused_p = 0;
|
||
long offset = 0; /* Must be signed for sign-extend. */
|
||
|
||
if (X_OP (insn) == 0 && X_OP2 (insn) == 3)
|
||
{
|
||
if ((insn & 0x10000000) == 0)
|
||
{
|
||
/* Branch on Integer Register with Prediction (BPr). */
|
||
branch_p = 1;
|
||
conditional_p = 1;
|
||
}
|
||
else
|
||
{
|
||
/* Compare and Branch */
|
||
branch_p = 1;
|
||
fused_p = 1;
|
||
offset = 4 * X_DISP10 (insn);
|
||
}
|
||
}
|
||
else if (X_OP (insn) == 0 && X_OP2 (insn) == 6)
|
||
{
|
||
/* Branch on Floating-Point Condition Codes (FBfcc). */
|
||
branch_p = 1;
|
||
offset = 4 * X_DISP22 (insn);
|
||
}
|
||
else if (X_OP (insn) == 0 && X_OP2 (insn) == 5)
|
||
{
|
||
/* Branch on Floating-Point Condition Codes with Prediction
|
||
(FBPfcc). */
|
||
branch_p = 1;
|
||
offset = 4 * X_DISP19 (insn);
|
||
}
|
||
else if (X_OP (insn) == 0 && X_OP2 (insn) == 2)
|
||
{
|
||
/* Branch on Integer Condition Codes (Bicc). */
|
||
branch_p = 1;
|
||
offset = 4 * X_DISP22 (insn);
|
||
}
|
||
else if (X_OP (insn) == 0 && X_OP2 (insn) == 1)
|
||
{
|
||
/* Branch on Integer Condition Codes with Prediction (BPcc). */
|
||
branch_p = 1;
|
||
offset = 4 * X_DISP19 (insn);
|
||
}
|
||
else if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3a)
|
||
{
|
||
struct frame_info *frame = get_current_frame ();
|
||
|
||
/* Trap instruction (TRAP). */
|
||
return gdbarch_tdep (regcache->arch ())->step_trap (frame,
|
||
insn);
|
||
}
|
||
|
||
/* FIXME: Handle DONE and RETRY instructions. */
|
||
|
||
if (branch_p)
|
||
{
|
||
if (fused_p)
|
||
{
|
||
/* Fused compare-and-branch instructions are non-delayed,
|
||
and do not have an annuling capability. So we need to
|
||
always set a breakpoint on both the NPC and the branch
|
||
target address. */
|
||
gdb_assert (offset != 0);
|
||
return pc + offset;
|
||
}
|
||
else if (conditional_p)
|
||
{
|
||
/* For conditional branches, return nPC + 4 iff the annul
|
||
bit is 1. */
|
||
return (X_A (insn) ? *npc + 4 : 0);
|
||
}
|
||
else
|
||
{
|
||
/* For unconditional branches, return the target if its
|
||
specified condition is "always" and return nPC + 4 if the
|
||
condition is "never". If the annul bit is 1, set *NPC to
|
||
zero. */
|
||
if (X_COND (insn) == 0x0)
|
||
pc = *npc, offset = 4;
|
||
if (X_A (insn))
|
||
*npc = 0;
|
||
|
||
return pc + offset;
|
||
}
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
static CORE_ADDR
|
||
sparc_step_trap (struct frame_info *frame, unsigned long insn)
|
||
{
|
||
return 0;
|
||
}
|
||
|
||
static std::vector<CORE_ADDR>
|
||
sparc_software_single_step (struct regcache *regcache)
|
||
{
|
||
struct gdbarch *arch = regcache->arch ();
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
|
||
CORE_ADDR npc, nnpc;
|
||
|
||
CORE_ADDR pc, orig_npc;
|
||
std::vector<CORE_ADDR> next_pcs;
|
||
|
||
pc = regcache_raw_get_unsigned (regcache, tdep->pc_regnum);
|
||
orig_npc = npc = regcache_raw_get_unsigned (regcache, tdep->npc_regnum);
|
||
|
||
/* Analyze the instruction at PC. */
|
||
nnpc = sparc_analyze_control_transfer (regcache, pc, &npc);
|
||
if (npc != 0)
|
||
next_pcs.push_back (npc);
|
||
|
||
if (nnpc != 0)
|
||
next_pcs.push_back (nnpc);
|
||
|
||
/* Assert that we have set at least one breakpoint, and that
|
||
they're not set at the same spot - unless we're going
|
||
from here straight to NULL, i.e. a call or jump to 0. */
|
||
gdb_assert (npc != 0 || nnpc != 0 || orig_npc == 0);
|
||
gdb_assert (nnpc != npc || orig_npc == 0);
|
||
|
||
return next_pcs;
|
||
}
|
||
|
||
static void
|
||
sparc_write_pc (struct regcache *regcache, CORE_ADDR pc)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
|
||
|
||
regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
|
||
regcache_cooked_write_unsigned (regcache, tdep->npc_regnum, pc + 4);
|
||
}
|
||
|
||
|
||
/* Iterate over core file register note sections. */
|
||
|
||
static void
|
||
sparc_iterate_over_regset_sections (struct gdbarch *gdbarch,
|
||
iterate_over_regset_sections_cb *cb,
|
||
void *cb_data,
|
||
const struct regcache *regcache)
|
||
{
|
||
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||
|
||
cb (".reg", tdep->sizeof_gregset, tdep->gregset, NULL, cb_data);
|
||
cb (".reg2", tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
|
||
}
|
||
|
||
|
||
static int
|
||
validate_tdesc_registers (const struct target_desc *tdesc,
|
||
struct tdesc_arch_data *tdesc_data,
|
||
const char *feature_name,
|
||
const char *register_names[],
|
||
unsigned int registers_num,
|
||
unsigned int reg_start)
|
||
{
|
||
int valid_p = 1;
|
||
const struct tdesc_feature *feature;
|
||
|
||
feature = tdesc_find_feature (tdesc, feature_name);
|
||
if (feature == NULL)
|
||
return 0;
|
||
|
||
for (unsigned int i = 0; i < registers_num; i++)
|
||
valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
||
reg_start + i,
|
||
register_names[i]);
|
||
|
||
return valid_p;
|
||
}
|
||
|
||
static struct gdbarch *
|
||
sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||
{
|
||
struct gdbarch_tdep *tdep;
|
||
const struct target_desc *tdesc = info.target_desc;
|
||
struct gdbarch *gdbarch;
|
||
int valid_p = 1;
|
||
|
||
/* If there is already a candidate, use it. */
|
||
arches = gdbarch_list_lookup_by_info (arches, &info);
|
||
if (arches != NULL)
|
||
return arches->gdbarch;
|
||
|
||
/* Allocate space for the new architecture. */
|
||
tdep = XCNEW (struct gdbarch_tdep);
|
||
gdbarch = gdbarch_alloc (&info, tdep);
|
||
|
||
tdep->pc_regnum = SPARC32_PC_REGNUM;
|
||
tdep->npc_regnum = SPARC32_NPC_REGNUM;
|
||
tdep->step_trap = sparc_step_trap;
|
||
tdep->fpu_register_names = sparc32_fpu_register_names;
|
||
tdep->fpu_registers_num = ARRAY_SIZE (sparc32_fpu_register_names);
|
||
tdep->cp0_register_names = sparc32_cp0_register_names;
|
||
tdep->cp0_registers_num = ARRAY_SIZE (sparc32_cp0_register_names);
|
||
|
||
set_gdbarch_long_double_bit (gdbarch, 128);
|
||
set_gdbarch_long_double_format (gdbarch, floatformats_sparc_quad);
|
||
|
||
set_gdbarch_wchar_bit (gdbarch, 16);
|
||
set_gdbarch_wchar_signed (gdbarch, 1);
|
||
|
||
set_gdbarch_num_regs (gdbarch, SPARC32_NUM_REGS);
|
||
set_gdbarch_register_name (gdbarch, sparc32_register_name);
|
||
set_gdbarch_register_type (gdbarch, sparc32_register_type);
|
||
set_gdbarch_num_pseudo_regs (gdbarch, SPARC32_NUM_PSEUDO_REGS);
|
||
set_tdesc_pseudo_register_name (gdbarch, sparc32_pseudo_register_name);
|
||
set_tdesc_pseudo_register_type (gdbarch, sparc32_pseudo_register_type);
|
||
set_gdbarch_pseudo_register_read (gdbarch, sparc32_pseudo_register_read);
|
||
set_gdbarch_pseudo_register_write (gdbarch, sparc32_pseudo_register_write);
|
||
|
||
/* Register numbers of various important registers. */
|
||
set_gdbarch_sp_regnum (gdbarch, SPARC_SP_REGNUM); /* %sp */
|
||
set_gdbarch_pc_regnum (gdbarch, SPARC32_PC_REGNUM); /* %pc */
|
||
set_gdbarch_fp0_regnum (gdbarch, SPARC_F0_REGNUM); /* %f0 */
|
||
|
||
/* Call dummy code. */
|
||
set_gdbarch_frame_align (gdbarch, sparc32_frame_align);
|
||
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
|
||
set_gdbarch_push_dummy_code (gdbarch, sparc32_push_dummy_code);
|
||
set_gdbarch_push_dummy_call (gdbarch, sparc32_push_dummy_call);
|
||
|
||
set_gdbarch_return_value (gdbarch, sparc32_return_value);
|
||
set_gdbarch_stabs_argument_has_addr
|
||
(gdbarch, sparc32_stabs_argument_has_addr);
|
||
|
||
set_gdbarch_skip_prologue (gdbarch, sparc32_skip_prologue);
|
||
|
||
/* Stack grows downward. */
|
||
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
||
|
||
set_gdbarch_breakpoint_kind_from_pc (gdbarch,
|
||
sparc_breakpoint::kind_from_pc);
|
||
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
|
||
sparc_breakpoint::bp_from_kind);
|
||
|
||
set_gdbarch_frame_args_skip (gdbarch, 8);
|
||
|
||
set_gdbarch_software_single_step (gdbarch, sparc_software_single_step);
|
||
set_gdbarch_write_pc (gdbarch, sparc_write_pc);
|
||
|
||
set_gdbarch_dummy_id (gdbarch, sparc_dummy_id);
|
||
|
||
set_gdbarch_unwind_pc (gdbarch, sparc_unwind_pc);
|
||
|
||
frame_base_set_default (gdbarch, &sparc32_frame_base);
|
||
|
||
/* Hook in the DWARF CFI frame unwinder. */
|
||
dwarf2_frame_set_init_reg (gdbarch, sparc32_dwarf2_frame_init_reg);
|
||
/* Register DWARF vendor CFI handler. */
|
||
set_gdbarch_execute_dwarf_cfa_vendor_op (gdbarch,
|
||
sparc_execute_dwarf_cfa_vendor_op);
|
||
/* FIXME: kettenis/20050423: Don't enable the unwinder until the
|
||
StackGhost issues have been resolved. */
|
||
|
||
/* Hook in ABI-specific overrides, if they have been registered. */
|
||
gdbarch_init_osabi (info, gdbarch);
|
||
|
||
frame_unwind_append_unwinder (gdbarch, &sparc32_frame_unwind);
|
||
|
||
if (tdesc_has_registers (tdesc))
|
||
{
|
||
struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
|
||
|
||
/* Validate that the descriptor provides the mandatory registers
|
||
and allocate their numbers. */
|
||
valid_p &= validate_tdesc_registers (tdesc, tdesc_data,
|
||
"org.gnu.gdb.sparc.cpu",
|
||
sparc_core_register_names,
|
||
ARRAY_SIZE (sparc_core_register_names),
|
||
SPARC_G0_REGNUM);
|
||
valid_p &= validate_tdesc_registers (tdesc, tdesc_data,
|
||
"org.gnu.gdb.sparc.fpu",
|
||
tdep->fpu_register_names,
|
||
tdep->fpu_registers_num,
|
||
SPARC_F0_REGNUM);
|
||
valid_p &= validate_tdesc_registers (tdesc, tdesc_data,
|
||
"org.gnu.gdb.sparc.cp0",
|
||
tdep->cp0_register_names,
|
||
tdep->cp0_registers_num,
|
||
SPARC_F0_REGNUM
|
||
+ tdep->fpu_registers_num);
|
||
if (!valid_p)
|
||
{
|
||
tdesc_data_cleanup (tdesc_data);
|
||
return NULL;
|
||
}
|
||
|
||
/* Target description may have changed. */
|
||
info.tdesc_data = tdesc_data;
|
||
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
|
||
}
|
||
|
||
/* If we have register sets, enable the generic core file support. */
|
||
if (tdep->gregset)
|
||
set_gdbarch_iterate_over_regset_sections
|
||
(gdbarch, sparc_iterate_over_regset_sections);
|
||
|
||
register_sparc_ravenscar_ops (gdbarch);
|
||
|
||
return gdbarch;
|
||
}
|
||
|
||
/* Helper functions for dealing with register windows. */
|
||
|
||
void
|
||
sparc_supply_rwindow (struct regcache *regcache, CORE_ADDR sp, int regnum)
|
||
{
|
||
struct gdbarch *gdbarch = regcache->arch ();
|
||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||
int offset = 0;
|
||
gdb_byte buf[8];
|
||
int i;
|
||
|
||
if (sp & 1)
|
||
{
|
||
/* Registers are 64-bit. */
|
||
sp += BIAS;
|
||
|
||
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
|
||
{
|
||
if (regnum == i || regnum == -1)
|
||
{
|
||
target_read_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
|
||
|
||
/* Handle StackGhost. */
|
||
if (i == SPARC_I7_REGNUM)
|
||
{
|
||
ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
|
||
ULONGEST i7;
|
||
|
||
i7 = extract_unsigned_integer (buf + offset, 8, byte_order);
|
||
store_unsigned_integer (buf + offset, 8, byte_order,
|
||
i7 ^ wcookie);
|
||
}
|
||
|
||
regcache_raw_supply (regcache, i, buf);
|
||
}
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Registers are 32-bit. Toss any sign-extension of the stack
|
||
pointer. */
|
||
sp &= 0xffffffffUL;
|
||
|
||
/* Clear out the top half of the temporary buffer, and put the
|
||
register value in the bottom half if we're in 64-bit mode. */
|
||
if (gdbarch_ptr_bit (regcache->arch ()) == 64)
|
||
{
|
||
memset (buf, 0, 4);
|
||
offset = 4;
|
||
}
|
||
|
||
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
|
||
{
|
||
if (regnum == i || regnum == -1)
|
||
{
|
||
target_read_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
|
||
buf + offset, 4);
|
||
|
||
/* Handle StackGhost. */
|
||
if (i == SPARC_I7_REGNUM)
|
||
{
|
||
ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
|
||
ULONGEST i7;
|
||
|
||
i7 = extract_unsigned_integer (buf + offset, 4, byte_order);
|
||
store_unsigned_integer (buf + offset, 4, byte_order,
|
||
i7 ^ wcookie);
|
||
}
|
||
|
||
regcache_raw_supply (regcache, i, buf);
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
void
|
||
sparc_collect_rwindow (const struct regcache *regcache,
|
||
CORE_ADDR sp, int regnum)
|
||
{
|
||
struct gdbarch *gdbarch = regcache->arch ();
|
||
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
||
int offset = 0;
|
||
gdb_byte buf[8];
|
||
int i;
|
||
|
||
if (sp & 1)
|
||
{
|
||
/* Registers are 64-bit. */
|
||
sp += BIAS;
|
||
|
||
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
|
||
{
|
||
if (regnum == -1 || regnum == SPARC_SP_REGNUM || regnum == i)
|
||
{
|
||
regcache_raw_collect (regcache, i, buf);
|
||
|
||
/* Handle StackGhost. */
|
||
if (i == SPARC_I7_REGNUM)
|
||
{
|
||
ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
|
||
ULONGEST i7;
|
||
|
||
i7 = extract_unsigned_integer (buf + offset, 8, byte_order);
|
||
store_unsigned_integer (buf, 8, byte_order, i7 ^ wcookie);
|
||
}
|
||
|
||
target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 8), buf, 8);
|
||
}
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Registers are 32-bit. Toss any sign-extension of the stack
|
||
pointer. */
|
||
sp &= 0xffffffffUL;
|
||
|
||
/* Only use the bottom half if we're in 64-bit mode. */
|
||
if (gdbarch_ptr_bit (regcache->arch ()) == 64)
|
||
offset = 4;
|
||
|
||
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
|
||
{
|
||
if (regnum == -1 || regnum == SPARC_SP_REGNUM || regnum == i)
|
||
{
|
||
regcache_raw_collect (regcache, i, buf);
|
||
|
||
/* Handle StackGhost. */
|
||
if (i == SPARC_I7_REGNUM)
|
||
{
|
||
ULONGEST wcookie = sparc_fetch_wcookie (gdbarch);
|
||
ULONGEST i7;
|
||
|
||
i7 = extract_unsigned_integer (buf + offset, 4, byte_order);
|
||
store_unsigned_integer (buf + offset, 4, byte_order,
|
||
i7 ^ wcookie);
|
||
}
|
||
|
||
target_write_memory (sp + ((i - SPARC_L0_REGNUM) * 4),
|
||
buf + offset, 4);
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Helper functions for dealing with register sets. */
|
||
|
||
void
|
||
sparc32_supply_gregset (const struct sparc_gregmap *gregmap,
|
||
struct regcache *regcache,
|
||
int regnum, const void *gregs)
|
||
{
|
||
const gdb_byte *regs = (const gdb_byte *) gregs;
|
||
gdb_byte zero[4] = { 0 };
|
||
int i;
|
||
|
||
if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
|
||
regcache_raw_supply (regcache, SPARC32_PSR_REGNUM,
|
||
regs + gregmap->r_psr_offset);
|
||
|
||
if (regnum == SPARC32_PC_REGNUM || regnum == -1)
|
||
regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
|
||
regs + gregmap->r_pc_offset);
|
||
|
||
if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
|
||
regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
|
||
regs + gregmap->r_npc_offset);
|
||
|
||
if (regnum == SPARC32_Y_REGNUM || regnum == -1)
|
||
regcache_raw_supply (regcache, SPARC32_Y_REGNUM,
|
||
regs + gregmap->r_y_offset);
|
||
|
||
if (regnum == SPARC_G0_REGNUM || regnum == -1)
|
||
regcache_raw_supply (regcache, SPARC_G0_REGNUM, &zero);
|
||
|
||
if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
|
||
{
|
||
int offset = gregmap->r_g1_offset;
|
||
|
||
for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
|
||
{
|
||
if (regnum == i || regnum == -1)
|
||
regcache_raw_supply (regcache, i, regs + offset);
|
||
offset += 4;
|
||
}
|
||
}
|
||
|
||
if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
|
||
{
|
||
/* Not all of the register set variants include Locals and
|
||
Inputs. For those that don't, we read them off the stack. */
|
||
if (gregmap->r_l0_offset == -1)
|
||
{
|
||
ULONGEST sp;
|
||
|
||
regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
|
||
sparc_supply_rwindow (regcache, sp, regnum);
|
||
}
|
||
else
|
||
{
|
||
int offset = gregmap->r_l0_offset;
|
||
|
||
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
|
||
{
|
||
if (regnum == i || regnum == -1)
|
||
regcache_raw_supply (regcache, i, regs + offset);
|
||
offset += 4;
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
void
|
||
sparc32_collect_gregset (const struct sparc_gregmap *gregmap,
|
||
const struct regcache *regcache,
|
||
int regnum, void *gregs)
|
||
{
|
||
gdb_byte *regs = (gdb_byte *) gregs;
|
||
int i;
|
||
|
||
if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
|
||
regcache_raw_collect (regcache, SPARC32_PSR_REGNUM,
|
||
regs + gregmap->r_psr_offset);
|
||
|
||
if (regnum == SPARC32_PC_REGNUM || regnum == -1)
|
||
regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
|
||
regs + gregmap->r_pc_offset);
|
||
|
||
if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
|
||
regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
|
||
regs + gregmap->r_npc_offset);
|
||
|
||
if (regnum == SPARC32_Y_REGNUM || regnum == -1)
|
||
regcache_raw_collect (regcache, SPARC32_Y_REGNUM,
|
||
regs + gregmap->r_y_offset);
|
||
|
||
if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
|
||
{
|
||
int offset = gregmap->r_g1_offset;
|
||
|
||
/* %g0 is always zero. */
|
||
for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
|
||
{
|
||
if (regnum == i || regnum == -1)
|
||
regcache_raw_collect (regcache, i, regs + offset);
|
||
offset += 4;
|
||
}
|
||
}
|
||
|
||
if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
|
||
{
|
||
/* Not all of the register set variants include Locals and
|
||
Inputs. For those that don't, we read them off the stack. */
|
||
if (gregmap->r_l0_offset != -1)
|
||
{
|
||
int offset = gregmap->r_l0_offset;
|
||
|
||
for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
|
||
{
|
||
if (regnum == i || regnum == -1)
|
||
regcache_raw_collect (regcache, i, regs + offset);
|
||
offset += 4;
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
void
|
||
sparc32_supply_fpregset (const struct sparc_fpregmap *fpregmap,
|
||
struct regcache *regcache,
|
||
int regnum, const void *fpregs)
|
||
{
|
||
const gdb_byte *regs = (const gdb_byte *) fpregs;
|
||
int i;
|
||
|
||
for (i = 0; i < 32; i++)
|
||
{
|
||
if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
|
||
regcache_raw_supply (regcache, SPARC_F0_REGNUM + i,
|
||
regs + fpregmap->r_f0_offset + (i * 4));
|
||
}
|
||
|
||
if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
|
||
regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
|
||
regs + fpregmap->r_fsr_offset);
|
||
}
|
||
|
||
void
|
||
sparc32_collect_fpregset (const struct sparc_fpregmap *fpregmap,
|
||
const struct regcache *regcache,
|
||
int regnum, void *fpregs)
|
||
{
|
||
gdb_byte *regs = (gdb_byte *) fpregs;
|
||
int i;
|
||
|
||
for (i = 0; i < 32; i++)
|
||
{
|
||
if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
|
||
regcache_raw_collect (regcache, SPARC_F0_REGNUM + i,
|
||
regs + fpregmap->r_f0_offset + (i * 4));
|
||
}
|
||
|
||
if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
|
||
regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
|
||
regs + fpregmap->r_fsr_offset);
|
||
}
|
||
|
||
|
||
/* SunOS 4. */
|
||
|
||
/* From <machine/reg.h>. */
|
||
const struct sparc_gregmap sparc32_sunos4_gregmap =
|
||
{
|
||
0 * 4, /* %psr */
|
||
1 * 4, /* %pc */
|
||
2 * 4, /* %npc */
|
||
3 * 4, /* %y */
|
||
-1, /* %wim */
|
||
-1, /* %tbr */
|
||
4 * 4, /* %g1 */
|
||
-1 /* %l0 */
|
||
};
|
||
|
||
const struct sparc_fpregmap sparc32_sunos4_fpregmap =
|
||
{
|
||
0 * 4, /* %f0 */
|
||
33 * 4, /* %fsr */
|
||
};
|
||
|
||
const struct sparc_fpregmap sparc32_bsd_fpregmap =
|
||
{
|
||
0 * 4, /* %f0 */
|
||
32 * 4, /* %fsr */
|
||
};
|
||
|
||
void
|
||
_initialize_sparc_tdep (void)
|
||
{
|
||
register_gdbarch_init (bfd_arch_sparc, sparc32_gdbarch_init);
|
||
}
|