Richard Sandiford e87ff6724f aarch64: Add the SME2 ADD and SUB instructions
Add support for the SME2 ADD. SUB, FADD and FSUB instructions.
SUB and FSUB have the same form as ADD and FADD, except that
ADD also has a 2-operand accumulating form.

The 64-bit ADD/SUB instructions require FEAT_SME_I16I64 and the
64-bit FADD/FSUB instructions require FEAT_SME_F64F64.

These are the first instructions to have tied register list
operands, as opposed to tied single registers.

The parse_operands change prevents unsuffixed Z registers (width==-1)
from being treated as though they had an Advanced SIMD-style suffix
(.4s etc.).  It means that:

  Error: expected element type rather than vector type at operand 2 -- `add za\.s\[w8,0\],{z0-z1}'

becomes:

  Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{z0-z1}'
2023-03-30 11:09:13 +01:00
2023-03-16 17:30:19 +10:30

		   README for GNU development tools

This directory contains various GNU compilers, assemblers, linkers, 
debuggers, etc., plus their support routines, definitions, and documentation.

If you are receiving this as part of a GDB release, see the file gdb/README.
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It is now possible to automatically configure and build a variety of
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A similar example using csh:

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