forked from Imagelibrary/binutils-gdb
14414227bf
The previous commit describes PR gdb/30547, a segfault when running test-case
gdb.base/vfork-follow-parent.exp on powerpc64 (likewise on s390x).
The root cause for the segmentation fault is that linux_is_uclinux gives an
incorrect result: it returns true instead of false.
So, why does linux_is_uclinux:
...
int
linux_is_uclinux (void)
{
CORE_ADDR dummy;
return (target_auxv_search (AT_NULL, &dummy) > 0
&& target_auxv_search (AT_PAGESZ, &dummy) == 0);
...
return true?
This is because ppc_linux_target_wordsize returns 4 instead of 8, causing
ppc_linux_nat_target::auxv_parse to misinterpret the auxv vector.
So, why does ppc_linux_target_wordsize:
...
int
ppc_linux_target_wordsize (int tid)
{
int wordsize = 4;
/* Check for 64-bit inferior process. This is the case when the host is
64-bit, and in addition the top bit of the MSR register is set. */
long msr;
errno = 0;
msr = (long) ptrace (PTRACE_PEEKUSER, tid, PT_MSR * 8, 0);
if (errno == 0 && ppc64_64bit_inferior_p (msr))
wordsize = 8;
return wordsize;
}
...
return 4?
Specifically, we get this result because because tid == 0, so we get
errno == ESRCH.
The tid == 0 is caused by the switch_to_no_thread in
handle_vfork_child_exec_or_exit:
...
/* Switch to no-thread while running clone_program_space, so
that clone_program_space doesn't want to read the
selected frame of a dead process. */
scoped_restore_current_thread restore_thread;
switch_to_no_thread ();
inf->pspace = new program_space (maybe_new_address_space ());
...
but moving the maybe_new_address_space call to before that gives us the
same result. The tid is no longer 0, but we still get ESRCH because the
thread has exited.
Fix this in handle_vfork_child_exec_or_exit by doing the
maybe_new_address_space call in the context of the vfork parent.
Tested on top of trunk on x86_64-linux and ppc64le-linux.
Tested on top of gdb-14-branch on ppc64-linux.
Co-Authored-By: Simon Marchi <simon.marchi@polymtl.ca>
PR gdb/30547
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=30547
98 lines
2.4 KiB
C
98 lines
2.4 KiB
C
/*Copyright (C) 2015-2023 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "gdbsupport/common-defs.h"
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#include "ppc-linux.h"
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#include "nat/gdb_ptrace.h"
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#include <elf.h>
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#ifdef HAVE_GETAUXVAL
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#include <sys/auxv.h>
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#endif
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#ifdef __powerpc64__
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/* Get the HWCAP from the process of GDB or GDBserver. If success,
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save it in *VALP. */
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static void
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ppc64_host_hwcap (unsigned long *valp)
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{
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#ifdef HAVE_GETAUXVAL
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*valp = getauxval (AT_HWCAP);
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#else
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unsigned long data[2];
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FILE *f = fopen ("/proc/self/auxv", "r");
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if (f == NULL)
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return;
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while (fread (data, sizeof (data), 1, f) > 0)
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{
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if (data[0] == AT_HWCAP)
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{
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*valp = data[1];
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break;
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}
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}
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fclose (f);
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#endif /* HAVE_GETAUXVAL */
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}
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static inline int
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ppc64_64bit_inferior_p (long msr)
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{
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unsigned long ppc_host_hwcap = 0;
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/* Get host's HWCAP to check whether the machine is Book E. */
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ppc64_host_hwcap (&ppc_host_hwcap);
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/* We actually have a 64-bit inferior only if the certain bit of the
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MSR is set. The PowerISA Book III-S MSR is different from the
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PowerISA Book III-E MSR. The Book III-S MSR is 64 bits wide, and
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its MSR[SF] is the bit 0 of a 64-bit value. Book III-E MSR is 32
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bits wide, and its MSR[CM] is the bit 0 of a 32-bit value. */
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if (ppc_host_hwcap & PPC_FEATURE_BOOKE)
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return msr & 0x80000000;
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else
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return msr < 0;
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}
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#endif
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int
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ppc_linux_target_wordsize (int tid)
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{
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gdb_assert (tid != 0);
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int wordsize = 4;
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/* Check for 64-bit inferior process. This is the case when the host is
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64-bit, and in addition the top bit of the MSR register is set. */
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#ifdef __powerpc64__
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long msr;
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errno = 0;
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msr = (long) ptrace (PTRACE_PEEKUSER, tid, PT_MSR * 8, 0);
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if (errno == 0 && ppc64_64bit_inferior_p (msr))
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wordsize = 8;
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#endif
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return wordsize;
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}
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