forked from Imagelibrary/binutils-gdb
1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
355 lines
5.8 KiB
ArmAsm
355 lines
5.8 KiB
ArmAsm
//Original:/testcases/core/c_ldst_ld_d_p_xh/c_ldst_ld_d_p_xh.dsp
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// Spec Reference: c_ldst ld d [p] xh
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# mach: bfin
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.include "testutils.inc"
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start
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INIT_R_REGS 0;
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loadsym p1, DATA_ADDR_1;
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loadsym p2, DATA_ADDR_2;
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.ifndef BFIN_HOST
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loadsym p3, DATA_ADDR_3;
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.endif
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loadsym p4, DATA_ADDR_4;
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loadsym p5, DATA_ADDR_5;
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loadsym fp, DATA_ADDR_6;
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// load 16 bits from memory and sign extend into 32-bit reg
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R4 = W [ P5 ] (X);
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R5 = W [ FP ] (X);
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R7 = W [ P1 ] (X);
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R0 = W [ P2 ] (X);
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.ifndef BFIN_HOST
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R1 = W [ P3 ] (X);
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.else
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imm32 r1, 0x00004243;
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.endif
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R2 = W [ P4 ] (X);
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CHECKREG r0, 0x00002223;
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CHECKREG r1, 0x00004243;
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CHECKREG r2, 0x00006263;
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CHECKREG r3, 0x00000000;
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CHECKREG r4, 0xFFFF8283;
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CHECKREG r5, 0x00000203;
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CHECKREG r7, 0x00000203;
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R5 = W [ FP ] (X);
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R7 = W [ P1 ] (X);
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R0 = W [ P2 ] (X);
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.ifndef BFIN_HOST
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R1 = W [ P3 ] (X);
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.else
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imm32 R1, 0x00004243;
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.endif
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R2 = W [ P4 ] (X);
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R3 = W [ P5 ] (X);
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CHECKREG r0, 0x00002223;
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CHECKREG r1, 0x00004243;
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CHECKREG r2, 0x00006263;
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CHECKREG r3, 0xFFFF8283;
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CHECKREG r4, 0xFFFF8283;
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CHECKREG r5, 0x00000203;
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CHECKREG r7, 0x00000203;
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R7 = W [ P1 ] (X);
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R0 = W [ P2 ] (X);
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.ifndef BFIN_HOST
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R1 = W [ P3 ] (X);
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.else
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imm32 R1, 0x00004243;
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.endif
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R2 = W [ P4 ] (X);
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R3 = W [ P5 ] (X);
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R4 = W [ FP ] (X);
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CHECKREG r0, 0x00002223;
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CHECKREG r1, 0x00004243;
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CHECKREG r2, 0x00006263;
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CHECKREG r3, 0xFFFF8283;
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CHECKREG r4, 0x00000203;
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CHECKREG r5, 0x00000203;
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CHECKREG r7, 0x00000203;
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R7 = W [ P1 ] (X);
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R0 = W [ P2 ] (X);
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.ifndef BFIN_HOST
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R1 = W [ P3 ] (X);
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.else
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imm32 R1, 0x00004243;
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.endif
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R2 = W [ P4 ] (X);
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R3 = W [ P5 ] (X);
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R4 = W [ FP ] (X);
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CHECKREG r0, 0x00002223;
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CHECKREG r1, 0x00004243;
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CHECKREG r2, 0x00006263;
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CHECKREG r3, 0xFFFF8283;
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CHECKREG r4, 0x00000203;
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CHECKREG r7, 0x00000203;
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pass
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// Pre-load memory with known data
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// More data is defined than will actually be used
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.data
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DATA_ADDR_1:
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.dd 0x00010203
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.dd 0x04050607
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.dd 0x08090A0B
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.dd 0x0C0D0E0F
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.dd 0x10111213
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.dd 0x14151617
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.dd 0x18191A1B
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.dd 0x1C1D1E1F
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.dd 0x11223344
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.dd 0x55667788
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.dd 0x99717273
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.dd 0x74757677
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.dd 0x82838485
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.dd 0x86878889
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.dd 0x80818283
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.dd 0x84858687
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.dd 0x01020304
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.dd 0x05060708
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.dd 0x09101112
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.dd 0x14151617
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.dd 0x18192021
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.dd 0x22232425
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.dd 0x26272829
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.dd 0x30313233
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.dd 0x34353637
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.dd 0x38394041
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.dd 0x42434445
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.dd 0x46474849
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.dd 0x50515253
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.dd 0x54555657
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.dd 0x58596061
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.dd 0x62636465
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.dd 0x66676869
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.dd 0x74555657
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.dd 0x78596067
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.dd 0x72636467
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.dd 0x76676867
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DATA_ADDR_2:
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.dd 0x20212223
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.dd 0x24252627
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.dd 0x28292A2B
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.dd 0x2C2D2E2F
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.dd 0x30313233
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.dd 0x34353637
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.dd 0x38393A3B
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.dd 0x3C3D3E3F
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.dd 0x91929394
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.dd 0x95969798
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.dd 0x99A1A2A3
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.dd 0xA5A6A7A8
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.dd 0xA9B0B1B2
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.dd 0xB3B4B5B6
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.dd 0xB7B8B9C0
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.dd 0x70717273
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.dd 0x74757677
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.dd 0x78798081
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.dd 0x82838485
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.dd 0x86C283C4
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.dd 0x81C283C4
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.dd 0x82C283C4
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.dd 0x83C283C4
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.dd 0x84C283C4
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.dd 0x85C283C4
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.dd 0x86C283C4
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.dd 0x87C288C4
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.dd 0x88C283C4
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.dd 0x89C283C4
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.dd 0x80C283C4
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.dd 0x81C283C4
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.dd 0x82C288C4
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.dd 0x94555659
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.dd 0x98596069
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.dd 0x92636469
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.dd 0x96676869
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DATA_ADDR_3:
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.dd 0x40414243
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.dd 0x44454647
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.dd 0x48494A4B
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.dd 0x4C4D4E4F
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.dd 0x50515253
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.dd 0x54555657
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.dd 0x58595A5B
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.dd 0xC5C6C7C8
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.dd 0xC9CACBCD
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.dd 0xCFD0D1D2
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.dd 0xD3D4D5D6
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.dd 0xD7D8D9DA
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.dd 0xDBDCDDDE
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.dd 0xDFE0E1E2
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.dd 0xE3E4E5E6
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.dd 0x91E899EA
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.dd 0x92E899EA
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.dd 0x93E899EA
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.dd 0x94E899EA
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.dd 0x95E899EA
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.dd 0x96E899EA
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.dd 0x97E899EA
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.dd 0x98E899EA
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.dd 0x99E899EA
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.dd 0x91E899EA
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.dd 0x92E899EA
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.dd 0x93E899EA
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.dd 0x94E899EA
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.dd 0x95E899EA
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.dd 0x96E899EA
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.dd 0x977899EA
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.dd 0xa455565a
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.dd 0xa859606a
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.dd 0xa263646a
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.dd 0xa667686a
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DATA_ADDR_4:
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.dd 0x60616263
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.dd 0x64656667
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.dd 0x68696A6B
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.dd 0x6C6D6E6F
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.dd 0x70717273
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.dd 0x74757677
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.dd 0x78797A7B
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.dd 0x7C7D7E7F
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.dd 0xEBECEDEE
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.dd 0xF3F4F5F6
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.dd 0xF7F8F9FA
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.dd 0xFBFCFDFE
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.dd 0xFF000102
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.dd 0x03040506
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.dd 0x0708090A
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.dd 0x0B0CAD0E
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.dd 0xAB0CAD01
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.dd 0xAB0CAD02
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.dd 0xAB0CAD03
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.dd 0xAB0CAD04
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.dd 0xAB0CAD05
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.dd 0xAB0CAD06
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.dd 0xAB0CAA07
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.dd 0xAB0CAD08
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.dd 0xAB0CAD09
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.dd 0xAB0CAD0E
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.dd 0xAB0CAD0E
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.dd 0xAB0CAD0E
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.dd 0xAB0CAD0E
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.dd 0xAB0CAD0E
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.dd 0xAB0CAD0E
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.dd 0xAB0CAD0E
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.dd 0xB455565B
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.dd 0xB859606B
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.dd 0xB263646B
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.dd 0xB667686B
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DATA_ADDR_5:
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.dd 0x80818283
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.dd 0x84858687
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.dd 0x88898A8B
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.dd 0x8C8D8E8F
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.dd 0x90919293
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.dd 0x94959697
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.dd 0x98999A9B
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.dd 0x9C9D9E9F
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.dd 0x0F101213
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.dd 0x14151617
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.dd 0x18191A1B
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.dd 0x1C1D1E1F
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.dd 0x20212223
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.dd 0x24252627
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.dd 0x28292A2B
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.dd 0x2C2D2E2F
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.dd 0xBC0DBE21
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.dd 0xBC1DBE22
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.dd 0xBC2DBE23
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.dd 0xBC3DBE24
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.dd 0xBC4DBE65
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.dd 0xBC5DBE27
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.dd 0xBC6DBE28
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.dd 0xBC7DBE29
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.dd 0xBC8DBE2F
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.dd 0xBC9DBE20
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.dd 0xBCADBE21
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.dd 0xBCBDBE2F
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.dd 0xBCCDBE23
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.dd 0xBCDDBE24
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.dd 0xBCFDBE25
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.dd 0xC455565C
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.dd 0xC859606C
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.dd 0xC263646C
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.dd 0xC667686C
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.dd 0xCC0DBE2C
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DATA_ADDR_6:
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.dd 0x00010203
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.dd 0x04050607
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.dd 0x08090A0B
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.dd 0x0C0D0E0F
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.dd 0x10111213
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.dd 0x14151617
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.dd 0x18191A1B
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.dd 0x1C1D1E1F
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.dd 0x20212223
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.dd 0x24252627
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.dd 0x28292A2B
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.dd 0x2C2D2E2F
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.dd 0x30313233
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.dd 0x34353637
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.dd 0x38393A3B
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.dd 0x3C3D3E3F
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.dd 0x40414243
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.dd 0x44454647
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.dd 0x48494A4B
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.dd 0x4C4D4E4F
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.dd 0x50515253
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.dd 0x54555657
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.dd 0x58595A5B
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.dd 0x5C5D5E5F
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.dd 0x60616263
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.dd 0x64656667
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.dd 0x68696A6B
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.dd 0x6C6D6E6F
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.dd 0x70717273
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.dd 0x74757677
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.dd 0x78797A7B
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.dd 0x7C7D7E7F
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DATA_ADDR_7:
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.dd 0x80818283
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.dd 0x84858687
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.dd 0x88898A8B
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.dd 0x8C8D8E8F
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.dd 0x90919293
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.dd 0x94959697
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.dd 0x98999A9B
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.dd 0x9C9D9E9F
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.dd 0xA0A1A2A3
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.dd 0xA4A5A6A7
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.dd 0xA8A9AAAB
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.dd 0xACADAEAF
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.dd 0xB0B1B2B3
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.dd 0xB4B5B6B7
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.dd 0xB8B9BABB
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.dd 0xBCBDBEBF
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.dd 0xC0C1C2C3
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.dd 0xC4C5C6C7
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.dd 0xC8C9CACB
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.dd 0xCCCDCECF
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.dd 0xD0D1D2D3
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.dd 0xD4D5D6D7
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.dd 0xD8D9DADB
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.dd 0xDCDDDEDF
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.dd 0xE0E1E2E3
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.dd 0xE4E5E6E7
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.dd 0xE8E9EAEB
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.dd 0xECEDEEEF
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.dd 0xF0F1F2F3
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.dd 0xF4F5F6F7
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.dd 0xF8F9FAFB
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.dd 0xFCFDFEFF
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