Files
binutils-gdb/sim/example-synacor
Mike Frysinger b15c5d7a51 sim: unify platform function & header tests
Move the various platform tests up a level to avoid duplication
across the ports.  When building multiple versions, this speeds
things up a bit.

For now we move the obvious stuff up a level, but we don't turn
own the config.h entirely just yet -- we still have some tests
related to libraries that need consideration.
2021-06-12 10:45:36 -04:00
..
2021-05-16 22:38:41 -04:00

= OVERVIEW =

The Synacor Challenge is a fun programming exercise with a number of puzzles
built into it.  You can find more details about it here:
https://challenge.synacor.com/

The first puzzle is writing an interpreter for their custom ISA.  This is a
simulator for that custom CPU.  The CPU is quite basic: it's 16-bit with only
8 registers and a limited set of instructions.  This means the port will never
grow new features.  See README.arch-spec for more details.

Implementing it here ends up being quite useful: it acts as a simple constrained
"real world" example for people who want to implement a new simulator for their
own architecture.  We demonstrate all the basic fundamentals (registers, memory,
branches, and tracing) that all ports should have.