forked from Imagelibrary/binutils-gdb
* symbols.h (S_FORCE_RELOC): Likewise. * config/obj-aout.h (S_FORCE_RELOC): Likewise. * config/obj-bout.h (S_FORCE_RELOC): Likewise. * config/obj-coff.h (S_FORCE_RELOC): Likewise. * config/obj-ieee.h (S_FORCE_RELOC): Likewise. * config/obj-vms.h (S_FORCE_RELOC): Likewise. * write.c (generic_force_reloc): New function. (TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. (adjust_reloc_syms): Adjust S_FORCE_RELOC call. * as.h (generic_force_reloc): Declare. * doc/internals.texi (S_FORCE_RELOC): Update. (TC_FORCE_RELOCATION_SUB_SAME): Update. * config/tc-alpha.c (alpha_force_relocation): Adjust to use generic_force_reloc. (alpha_fix_adjustable): Likewise. * config/tc-arm.c (arm_force_relocation): Likewise. * config/tc-cris.c (md_cris_force_relocation): Likewise. * config/tc-frv.c (frv_force_relocation): Likewise. * config/tc-i386.c (md_apply_fix3): Likewise. * config/tc-ia64.c (ia64_force_relocation): Likewise. * config/tc-ip2k.c (ip2k_force_relocation): Likewise. * config/tc-m32r.c (m32r_force_relocation): Likewise. * config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise. * config/tc-mcore.c (mcore_force_relocation): Likewise. * config/tc-mips.c (mips_force_relocation): Likewise. * config/tc-mmix.c (mmix_force_relocation): Likewise. * config/tc-ppc.c (ppc_force_relocation): Likewise. * config/tc-s390.c (tc_s390_force_relocation): Likewise. * config/tc-sh.c (sh_force_relocation): Likewise. (md_pcrel_from_section): Likewise. * config/tc-sparc.c (tc_gen_reloc): Likewise. * config/tc-v850.c (v850_force_relocation): Likewise. * config/tc-xstormy16.c (xstormy16_force_relocation): Likewise. * config/tc-i386.h (TC_FORCE_RELOCATION): Likewise. * config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise. * config/tc-sparc.h (tc_fix_adjustable): Likewise. * config/tc-d10v.c (d10v_force_relocation): Delete. * config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define. * config/tc-dlx.c (md_dlx_force_relocation): Delete. * config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define. * config/tc-fr30.c (fr30_force_relocation): Delete. * config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define. * config/tc-mn10300.c (mn10300_force_relocation): Delete. * config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise. * config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call. * config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix. * config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define. * config/tc-openrisc.c (openrisc_force_relocation): Delete. * config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sparc.c (elf32_sparc_force_relocation): Delete. * config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF. * config/tc-i386.c (i386_force_relocation): Delete. * config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for BFD_ASSEMBLER. (EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting. * config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define. * config/tc-pj.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
188 lines
6.0 KiB
C
188 lines
6.0 KiB
C
/* tc-mips.h -- header file for tc-mips.c.
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Copyright 1993, 1994, 1995, 1996, 1997, 2000, 2001, 2002
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Free Software Foundation, Inc.
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Contributed by the OSF and Ralph Campbell.
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Written by Keith Knowles and Ralph Campbell, working independently.
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Modified for ECOFF support by Ian Lance Taylor of Cygnus Support.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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#ifndef TC_MIPS
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#define TC_MIPS
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#ifdef ANSI_PROTOTYPES
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struct frag;
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struct expressionS;
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#endif
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/* Default to big endian. */
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#ifndef TARGET_BYTES_BIG_ENDIAN
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#define TARGET_BYTES_BIG_ENDIAN 1
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#endif
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#define TARGET_ARCH bfd_arch_mips
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#define WORKING_DOT_WORD 1
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#define OLD_FLOAT_READS
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#define REPEAT_CONS_EXPRESSIONS
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#define RELOC_EXPANSION_POSSIBLE
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#define MAX_RELOC_EXPANSION 3
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#define LOCAL_LABELS_FB 1
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/* Maximum symbol offset that can be encoded in a BFD_RELOC_GPREL16
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relocation: */
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#define MAX_GPREL_OFFSET (0x7FF0)
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#define md_relax_frag(segment, fragp, stretch) \
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mips_relax_frag(segment, fragp, stretch)
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extern int mips_relax_frag PARAMS ((asection *, struct frag *, long));
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#define md_undefined_symbol(name) (0)
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#define md_operand(x)
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extern void mips_handle_align PARAMS ((struct frag *));
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#define HANDLE_ALIGN(fragp) mips_handle_align (fragp)
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#define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2)
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/* We permit PC relative difference expressions when generating
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embedded PIC code. */
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#define DIFF_EXPR_OK
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/* Tell assembler that we have an itbl_mips.h header file to include. */
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#define HAVE_ITBL_CPU
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/* The endianness of the target format may change based on command
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line arguments. */
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#define TARGET_FORMAT mips_target_format()
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extern const char *mips_target_format PARAMS ((void));
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/* MIPS PIC level. */
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enum mips_pic_level
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{
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/* Do not generate PIC code. */
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NO_PIC,
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/* Generate PIC code as in the SVR4 MIPS ABI. */
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SVR4_PIC,
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/* Generate PIC code without using a global offset table: the data
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segment has a maximum size of 64K, all data references are off
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the $gp register, and all text references are PC relative. This
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is used on some embedded systems. */
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EMBEDDED_PIC
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};
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extern enum mips_pic_level mips_pic;
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struct mips_cl_insn
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{
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unsigned long insn_opcode;
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const struct mips_opcode *insn_mo;
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/* The next two fields are used when generating mips16 code. */
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bfd_boolean use_extend;
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unsigned short extend;
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};
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extern int tc_get_register PARAMS ((int frame));
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#define md_after_parse_args() mips_after_parse_args()
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extern void mips_after_parse_args PARAMS ((void));
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#define tc_init_after_args() mips_init_after_args()
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extern void mips_init_after_args PARAMS ((void));
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#define md_parse_long_option(arg) mips_parse_long_option (arg)
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extern int mips_parse_long_option PARAMS ((const char *));
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#define tc_frob_label(sym) mips_define_label (sym)
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extern void mips_define_label PARAMS ((symbolS *));
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#define tc_frob_file_before_adjust() mips_frob_file_before_adjust ()
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extern void mips_frob_file_before_adjust PARAMS ((void));
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#define tc_frob_file_before_fix() mips_frob_file ()
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extern void mips_frob_file PARAMS ((void));
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
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#define tc_frob_file_after_relocs mips_frob_file_after_relocs
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extern void mips_frob_file_after_relocs PARAMS ((void));
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#endif
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#define tc_fix_adjustable(fixp) mips_fix_adjustable (fixp)
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extern int mips_fix_adjustable PARAMS ((struct fix *));
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/* Global syms must not be resolved, to support ELF shared libraries.
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When generating embedded code, we don't have shared libs. */
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#define EXTERN_FORCE_RELOC \
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(OUTPUT_FLAVOR == bfd_target_elf_flavour \
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&& mips_pic != EMBEDDED_PIC)
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/* When generating embedded PIC code we must keep PC relative
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relocations. */
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#define TC_FORCE_RELOCATION(FIX) mips_force_relocation (FIX)
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extern int mips_force_relocation PARAMS ((struct fix *));
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/* Register mask variables. These are set by the MIPS assembly code
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and used by ECOFF and possibly other object file formats. */
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extern unsigned long mips_gprmask;
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extern unsigned long mips_cprmask[4];
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
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#define elf_tc_final_processing mips_elf_final_processing
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extern void mips_elf_final_processing PARAMS ((void));
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#define ELF_TC_SPECIAL_SECTIONS \
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{ ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, \
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{ ".sbss", SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, \
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{ ".lit4", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, \
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{ ".lit8", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_MIPS_GPREL }, \
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{ ".ucode", SHT_MIPS_UCODE, 0 }, \
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{ ".mdebug", SHT_MIPS_DEBUG, 0 },
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/* Other special sections not generated by the assembler: .reginfo,
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.liblist, .conflict, .gptab, .got, .dynamic, .rel.dyn. */
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#endif
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extern void md_mips_end PARAMS ((void));
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#define md_end() md_mips_end()
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#define USE_GLOBAL_POINTER_OPT (OUTPUT_FLAVOR == bfd_target_ecoff_flavour \
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|| OUTPUT_FLAVOR == bfd_target_coff_flavour \
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|| OUTPUT_FLAVOR == bfd_target_elf_flavour)
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extern void mips_pop_insert PARAMS ((void));
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#define md_pop_insert() mips_pop_insert()
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extern void mips_flush_pending_output PARAMS ((void));
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#define md_flush_pending_output mips_flush_pending_output
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extern void mips_enable_auto_align PARAMS ((void));
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#define md_elf_section_change_hook() mips_enable_auto_align()
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extern enum dwarf2_format mips_dwarf2_format PARAMS ((void));
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#define DWARF2_FORMAT() mips_dwarf2_format ()
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#define DWARF2_ADDR_SIZE(bfd) \
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(DWARF2_FORMAT () == dwarf2_format_32bit ? 4 : 8)
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#endif /* TC_MIPS */
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