Nelson Chu 595e49a4b7 RISC-V: Support SiFive extensions: xsfvqmaccdod, xsfvqmaccqoq and xsfvfnrclipxfqf ...

Those SiFive extensions have been published on the web for a while, and we plan
to implement intrinsics in GCC for those instructions soon.

NOTE: The original patch was written by Nelson when he was still working at
SiFive, and Kito rebased it to the trunk. Therefore, I kept the author as Nelson
with his SiFive email.

Document links:
xsfvqmaccdod: https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification
xsfvqmaccqoq: https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification
xsfvfnrclipxfqf: https://www.sifive.com/document-file/fp32-to-int8-ranged-clip-instructions

Co-authored-by: Kito Cheng <kito.cheng@sifive.com>

2024-11-22 09:56:54 +08:00

..

aarch64.h

aarch64: improve debuggability on array of enum

2024-11-08 11:35:46 +00:00

alpha.h

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2024-01-04 22:58:12 +10:30

arc-attrs.h

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arc-func.h

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arc.h

arc: Put DBNZ instruction to a separate class

2024-02-14 11:36:52 +01:00

arm.h

arm, objdump: Make objdump use bfd's machine detection to drive disassembly

2024-11-08 10:06:38 +00:00

avr.h

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2024-01-04 22:58:12 +10:30

bfin.h

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2024-01-04 22:58:12 +10:30

bpf.h

bpf: there is no ldinddw nor ldabsdw instructions

2024-01-29 19:22:41 +01:00

cgen.h

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ChangeLog-0415

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ChangeLog-9103

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convex.h

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cr16.h

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cris.h

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crx.h

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csky.h

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d10v.h

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d30v.h

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dlx.h

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ft32.h

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h8300.h

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hppa.h

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i386.h

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ia64.h

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2024-01-04 22:58:12 +10:30

kvx.h

kvx: gas: rename: or -> ior, xor -> eor

2024-02-20 12:07:57 +01:00

loongarch.h

Add macros to get opcode of instructions approriately

2024-09-07 10:06:03 +08:00

m68hc11.h

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2024-01-04 22:58:12 +10:30

m68k.h

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metag.h

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2024-01-04 22:58:12 +10:30

mips.h

MIPS/opcodes: Rework documentation for instruction args

2024-09-15 13:27:33 +01:00

mmix.h

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mn10200.h

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mn10300.h

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moxie.h

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msp430-decode.h

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msp430.h

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nds32.h

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nfp.h

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nios2.h

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nios2r1.h

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nios2r2.h

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np1.h

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ns32k.h

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pdp11.h

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pj.h

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pn.h

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ppc.h

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pru.h

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pyr.h

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riscv-opc.h

RISC-V: Support SiFive extensions: xsfvqmaccdod, xsfvqmaccqoq and xsfvfnrclipxfqf

2024-11-22 09:56:54 +08:00

riscv.h

RISC-V: Support SiFive extensions: xsfvqmaccdod, xsfvqmaccqoq and xsfvfnrclipxfqf

2024-11-22 09:56:54 +08:00

rl78.h

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rx.h

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s12z.h

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s390.h

s390: Add arch15 instructions

2024-10-10 12:09:40 +02:00

score-datadep.h

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2024-01-04 22:58:12 +10:30

score-inst.h

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sparc.h

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spu-insns.h

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spu.h

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tic4x.h

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tic6x-control-registers.h

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tic6x-insn-formats.h

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tic6x-opcode-table.h

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tic6x.h

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tic30.h

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tic54x.h

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tilegx.h

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tilepro.h

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v850.h

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vax.h

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visium.h

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wasm.h

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xgate.h

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