Jim Wilson e6f372ba66 RISC-V: Add missing hint instructions from RV128I. ...

gas/
	* testsuite/gas/riscv/c-zero-imm.d: Add more tests.
	* testsuite/gas/riscv/c-zero-imm.s: Likewise.
	* testsuite/gas/riscv/c-zero-reg.d: Fix typo in test.  Add disabled
	future test for RV128 support.
	* testsuite/gas/riscv/c-zero-reg.s: Likewise.

	include/
	* opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
	(MATCH_C_SRAI64, MASK_C_SRAI64): New.
	(MATCH_C_SLLI64, MASK_C_SLLI64): New.

	opcodes/
	* riscv-opc.c (match_c_slli, match_slli_as_c_slli): New.
	(match_c_slli64, match_srxi_as_c_srxi): New.
	(riscv_opcodes) <slli, sll>: Use match_slli_as_c_slli.
	<srli, srl, srai, sra>: Use match_srxi_as_c_srxi.
	<c.slli, c.srli, c.srai>: Use match_s_slli.
	<c.slli64, c.srli64, c.srai64>: New.

2018-05-08 15:46:19 -07:00

..

aarch64.h

Enhance the AARCH64 assembler to support LDFF1xx instructions which use REG+REG addressing with an assumed offset register.

2018-03-28 09:44:45 +01:00

alpha.h

Update year range in copyright notice of binutils files

2018-01-03 17:49:56 +10:30

arc-attrs.h

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arc-func.h

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arc.h

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arm.h

[ARM] Remove ARM_FEATURE_COPY macro

2018-02-27 16:40:45 +00:00

avr.h

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2018-01-03 17:49:56 +10:30

bfin.h

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cgen.h

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ChangeLog-0415

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ChangeLog-9103

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convex.h

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cr16.h

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cris.h

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crx.h

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d10v.h

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d30v.h

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dlx.h

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ft32.h

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h8300.h

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hppa.h

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i386.h

x86: Remove support for old (<= 2.8.1) versions of gcc

2018-03-08 06:31:52 -08:00

ia64.h

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m68hc11.h

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m68k.h

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metag.h

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mips.h

MIPS16/opcodes: Free up `M' operand code

2018-02-20 20:51:36 +00:00

mmix.h

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mn10200.h

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mn10300.h

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moxie.h

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msp430-decode.h

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msp430.h

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nds32.h

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nfp.h

This patch adds support to objdump for disassembly of NFP (Netronome Flow Processor) ELF files (.nffw) as well as some basic readelf support.

2018-04-30 17:02:59 +01:00

nios2.h

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nios2r1.h

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nios2r2.h

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np1.h

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ns32k.h

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pdp11.h

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pj.h

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pn.h

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ppc.h

Cleanup ppc code dealing with opcode dumps.

2018-05-07 09:40:59 -05:00

pru.h

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pyr.h

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riscv-opc.h

RISC-V: Add missing hint instructions from RV128I.

2018-05-08 15:46:19 -07:00

riscv.h

RISC-V: Add .insn support.

2018-03-14 16:04:03 -07:00

rl78.h

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rx.h

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s390.h

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score-datadep.h

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score-inst.h

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sparc.h

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spu-insns.h

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spu.h

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tic4x.h

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tic6x-control-registers.h

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tic6x-insn-formats.h

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tic6x-opcode-table.h

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tic6x.h

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tic30.h

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tic54x.h

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tic80.h

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tilegx.h

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tilepro.h

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v850.h

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vax.h

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visium.h

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wasm.h

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xgate.h

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