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a35a332283963d66a7ff272ace86cf49c50119e1
binutils-gdb/sim/common
History
Mike Frysinger a35a332283 sim: add a proper sim_core_trans_addr prototype 
The common code has a sim_core_trans_addr() helper that only the m32r code
uses.  Move the inline extern in the m32r code to the proper common header.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-26 02:18:43 +00:00
..
acinclude.m4
[PATCH] sim: make sure to include strsignal prototype
2012-03-24 05:38:43 +00:00
aclocal.m4
[PATCH] sim: make sure to include strsignal prototype
2012-03-24 05:38:43 +00:00
callback.c
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cgen-accfp.c
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cgen-cpu.h
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cgen-defs.h
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cgen-engine.h
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cgen-fpu.c
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cgen-fpu.h
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cgen-mem.h
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cgen-ops.h
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cgen-par.c
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cgen-par.h
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cgen-run.c
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cgen-scache.c
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cgen-scache.h
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cgen-sim.h
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cgen-trace.c
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cgen-trace.h
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cgen-types.h
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cgen-utils.c
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cgen.sh
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ChangeLog
sim: add a proper sim_core_trans_addr prototype
2012-03-26 02:18:43 +00:00
config.in
[PATCH] sim: make sure to include strsignal prototype
2012-03-24 05:38:43 +00:00
configure
[PATCH] sim: make sure to include strsignal prototype
2012-03-24 05:38:43 +00:00
configure.ac
sim: dv-cfi: check for posix_fallocate
2011-11-07 16:28:52 +00:00
dv-cfi.c
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2012-01-04 08:28:28 +00:00
dv-cfi.h
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dv-core.c
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dv-glue.c
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dv-pal.c
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dv-sockser.c
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dv-sockser.h
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gdbinit.in
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genmloop.sh
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2012-01-04 08:28:28 +00:00
gennltvals.sh
sim: use character classes rather than ranges
2012-03-19 04:54:48 +00:00
gentmap.c
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gentvals.sh
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hw-alloc.c
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hw-alloc.h
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hw-base.c
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hw-base.h
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hw-device.c
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hw-device.h
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hw-events.c
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hw-events.h
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hw-handles.c
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hw-handles.h
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hw-instances.c
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hw-instances.h
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hw-main.h
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hw-ports.c
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hw-ports.h
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hw-properties.c
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hw-properties.h
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hw-tree.c
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hw-tree.h
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Make-common.in
sim: use character classes rather than ranges
2012-03-19 04:54:48 +00:00
Makefile.in
sim: headers: use abs_srcdir to find helper scripts
2012-01-06 06:43:48 +00:00
nltvals.def
sim: common: add back Blackfin syscalls
2011-05-26 18:20:13 +00:00
nrun.c
* nrun.c: Add #ifdef HAVE_CONFIG_H and associated includes stanza
2012-03-24 09:31:09 +00:00
run-sim.h
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run.1
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run.c
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sim-abort.c
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sim-alu.h
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sim-arange.c
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sim-arange.h
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sim-assert.h
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sim-base.h
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sim-basics.h
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sim-bits.c
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sim-bits.h
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sim-command.c
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sim-config.c
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sim-config.h
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sim-core.c
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sim-core.h
sim: add a proper sim_core_trans_addr prototype
2012-03-26 02:18:43 +00:00
sim-cpu.c
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sim-cpu.h
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sim-endian.c
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sim-endian.h
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sim-engine.c
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sim-engine.h
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sim-events.c
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sim-events.h
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sim-fpu.c
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sim-fpu.h
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sim-hload.c
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sim-hrw.c
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sim-hw.c
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sim-hw.h
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sim-info.c
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sim-inline.c
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sim-inline.h
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sim-io.c
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sim-io.h
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sim-load.c
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sim-memopt.c
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sim-memopt.h
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sim-model.c
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sim-model.h
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sim-module.c
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sim-module.h
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sim-n-bits.h
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sim-n-core.h
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sim-n-endian.h
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sim-options.c
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sim-options.h
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sim-profile.c
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sim-profile.h
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sim-reason.c
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sim-reg.c
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sim-resume.c
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sim-run.c
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sim-signal.c
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sim-signal.h
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sim-stop.c
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sim-trace.c
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sim-trace.h
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sim-types.h
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sim-utils.c
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sim-utils.h
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sim-watch.c
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sim-watch.h
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syscall.c
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tconfig.in
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version.h
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