Mike Frysinger 7a9bd3b4e2 sim: erc32/m32c/rl78: add sim_memory_map stub for gdb ...

These ports don't use the common sim core, so they weren't providing
a sim_memory_map for gdb, so they failed to link with the new memory
map logic added for the sim.  Add stubs to fix.

2021-02-06 12:15:34 -05:00

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aclocal.m4

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ChangeLog

sim: erc32/m32c/rl78: add sim_memory_map stub for gdb

2021-02-06 12:15:34 -05:00

config.in

sim: clean up C11 header includes

2021-01-11 08:05:54 -05:00

configure

sim: common: switch AC_CONFIG_HEADERS

2021-02-06 12:00:42 -05:00

configure.ac

sim: enable -Werror by default for some arches

2021-01-09 09:19:37 -05:00

cpu.h

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gdb-if.c

sim: erc32/m32c/rl78: add sim_memory_map stub for gdb

2021-02-06 12:15:34 -05:00

int.c

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int.h

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load.c

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load.h

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m32c.opc

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main.c

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Makefile.in

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mem.c

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mem.h

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misc.c

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misc.h

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opc2c.c

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r8c.opc

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reg.c

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safe-fgets.c

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safe-fgets.h

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srcdest.c

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syscall.h

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syscalls.c

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syscalls.h

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timer_a.h

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trace.c

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trace.h

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