forked from Imagelibrary/binutils-gdb
8eb7b3a7db
This fixes test failures caused by the new linker warning which report:
./ld/ld-new: warning: load.S.x has a LOAD segment with RWX permissions
Fix this by splitting the linker MEMORY into ram and rom to avoid
generating RWX sections. This required tests to be adjusted to fix
issues with the move. Namely:
- fpu tests: were incorrectly using l.ori with ha(anchor) which now
that we pushed the anchor up in memory it exposes the bug. Update
to used the correct l.movhi instruction instead.
- adrp test: the test reports ram offset addresses, now that we have
moved memory layout around a bit I adjusted the test output. Some
padding is added before pi to show that the actual address of pi and
the adrp page offset are not the same.
Bug: https://sourceware.org/PR29957
77 lines
2.1 KiB
Plaintext
77 lines
2.1 KiB
Plaintext
/* Test linker script for OpenRISC.
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Copyright (C) 2017-2023 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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MEMORY
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{
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/* The exception vectors actually start at 0x100, but if you specify
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that address here, the "--output-target binary" step will start from
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address 0 with the contents meant for address 0x100. */
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exception_vectors : ORIGIN = 0 , LENGTH = 8K
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rom : ORIGIN = 8K, LENGTH = 40K
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ram : ORIGIN = 40K, LENGTH = 2M - 40K
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}
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SECTIONS
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{
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.exception_vectors :
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{
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KEEP(*(.exception_vectors))
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} > exception_vectors
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.text :
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{
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*(.text)
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*(.text.*)
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*(.rodata)
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*(.rodata.*)
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} > rom
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.data :
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{
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*(.data)
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*(.data.*)
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} > ram
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.bss :
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{
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*(.bss)
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*(.bss.*)
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/* WARNING about section size alignment:
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The start-up assembly code can only clear BSS section sizes
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which are aligned to 4 bytes. However, the size of the BSS
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section may not be aligned, therefore up to 3 bytes more could
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be zeroed on start-up. This is normally not an issue, as the
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start of the next section is usually aligned too, so those extra
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bytes should be just padding. I did try the following trick to
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align the BSS section size, to no avail:
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. = ALIGN(., 4);
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*/
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} > ram
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_bss_begin = ADDR(.bss);
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_bss_end = _bss_begin + SIZEOF(.bss);
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.stack ALIGN(16) (NOLOAD):
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{
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*(.stack)
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} > ram
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}
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ENTRY(_start) /* Otherwise, --gc-sections would throw everything away. */
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