forked from Imagelibrary/binutils-gdb
The detection logic for TPIDR2 was implemented incorrectly. Originally the detection was supposed to be through a ptrace error code, but in reality, for backwards compatibility, the detection should be based on the size of the returned iovec. For instance, if a target supports both TPIDR and TPIDR2, ptrace will return a iovec size of 16. If a target only supports TPIDR and not TPIDR2, it will return a iovec size of 8, even if we asked for 16 bytes. This patch fixes this issue in code that is shared between gdb and gdbserver, therefore both gdb and gdbserver are fixed. Tested on AArch64/Linux Ubuntu 20.04.
274 lines
7.2 KiB
C
274 lines
7.2 KiB
C
/* Copyright (C) 2009-2023 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "gdbsupport/common-defs.h"
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#include "gdbsupport/break-common.h"
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#include "nat/linux-nat.h"
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#include "nat/aarch64-linux-hw-point.h"
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#include "nat/aarch64-linux.h"
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#include "elf/common.h"
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#include "nat/gdb_ptrace.h"
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#include <asm/ptrace.h>
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#include <sys/uio.h>
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/* Called when resuming a thread LWP.
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The hardware debug registers are updated when there is any change. */
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void
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aarch64_linux_prepare_to_resume (struct lwp_info *lwp)
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{
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struct arch_lwp_info *info = lwp_arch_private_info (lwp);
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/* NULL means this is the main thread still going through the shell,
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or, no watchpoint has been set yet. In that case, there's
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nothing to do. */
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if (info == NULL)
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return;
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if (DR_HAS_CHANGED (info->dr_changed_bp)
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|| DR_HAS_CHANGED (info->dr_changed_wp))
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{
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ptid_t ptid = ptid_of_lwp (lwp);
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int tid = ptid.lwp ();
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struct aarch64_debug_reg_state *state
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= aarch64_get_debug_reg_state (ptid.pid ());
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if (show_debug_regs)
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debug_printf ("prepare_to_resume thread %d\n", tid);
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/* Watchpoints. */
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if (DR_HAS_CHANGED (info->dr_changed_wp))
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{
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aarch64_linux_set_debug_regs (state, tid, 1);
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DR_CLEAR_CHANGED (info->dr_changed_wp);
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}
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/* Breakpoints. */
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if (DR_HAS_CHANGED (info->dr_changed_bp))
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{
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aarch64_linux_set_debug_regs (state, tid, 0);
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DR_CLEAR_CHANGED (info->dr_changed_bp);
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}
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}
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}
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/* Function to call when a new thread is detected. */
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void
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aarch64_linux_new_thread (struct lwp_info *lwp)
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{
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ptid_t ptid = ptid_of_lwp (lwp);
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struct aarch64_debug_reg_state *state
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= aarch64_get_debug_reg_state (ptid.pid ());
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struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
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/* If there are hardware breakpoints/watchpoints in the process then mark that
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all the hardware breakpoint/watchpoint register pairs for this thread need
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to be initialized (with data from aarch_process_info.debug_reg_state). */
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if (aarch64_any_set_debug_regs_state (state, false))
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DR_MARK_ALL_CHANGED (info->dr_changed_bp, aarch64_num_bp_regs);
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if (aarch64_any_set_debug_regs_state (state, true))
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DR_MARK_ALL_CHANGED (info->dr_changed_wp, aarch64_num_wp_regs);
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lwp_set_arch_private_info (lwp, info);
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}
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/* See nat/aarch64-linux.h. */
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void
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aarch64_linux_delete_thread (struct arch_lwp_info *arch_lwp)
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{
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xfree (arch_lwp);
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}
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/* Convert native siginfo FROM to the siginfo in the layout of the
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inferior's architecture TO. */
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void
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aarch64_compat_siginfo_from_siginfo (compat_siginfo_t *to, siginfo_t *from)
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{
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memset (to, 0, sizeof (*to));
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to->si_signo = from->si_signo;
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to->si_errno = from->si_errno;
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to->si_code = from->si_code;
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if (to->si_code == SI_TIMER)
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{
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to->cpt_si_timerid = from->si_timerid;
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to->cpt_si_overrun = from->si_overrun;
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to->cpt_si_ptr = (intptr_t) from->si_ptr;
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}
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else if (to->si_code == SI_USER)
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{
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to->cpt_si_pid = from->si_pid;
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to->cpt_si_uid = from->si_uid;
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}
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else if (to->si_code < 0)
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{
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to->cpt_si_pid = from->si_pid;
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to->cpt_si_uid = from->si_uid;
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to->cpt_si_ptr = (intptr_t) from->si_ptr;
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}
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else
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{
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switch (to->si_signo)
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{
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case SIGCHLD:
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to->cpt_si_pid = from->si_pid;
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to->cpt_si_uid = from->si_uid;
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to->cpt_si_status = from->si_status;
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to->cpt_si_utime = from->si_utime;
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to->cpt_si_stime = from->si_stime;
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break;
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case SIGILL:
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case SIGFPE:
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case SIGSEGV:
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case SIGBUS:
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to->cpt_si_addr = (intptr_t) from->si_addr;
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break;
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case SIGPOLL:
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to->cpt_si_band = from->si_band;
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to->cpt_si_fd = from->si_fd;
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break;
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default:
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to->cpt_si_pid = from->si_pid;
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to->cpt_si_uid = from->si_uid;
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to->cpt_si_ptr = (intptr_t) from->si_ptr;
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break;
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}
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}
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}
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/* Convert inferior's architecture siginfo FROM to native siginfo TO. */
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void
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aarch64_siginfo_from_compat_siginfo (siginfo_t *to, compat_siginfo_t *from)
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{
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memset (to, 0, sizeof (*to));
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to->si_signo = from->si_signo;
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to->si_errno = from->si_errno;
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to->si_code = from->si_code;
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if (to->si_code == SI_TIMER)
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{
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to->si_timerid = from->cpt_si_timerid;
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to->si_overrun = from->cpt_si_overrun;
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to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
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}
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else if (to->si_code == SI_USER)
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{
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to->si_pid = from->cpt_si_pid;
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to->si_uid = from->cpt_si_uid;
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}
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if (to->si_code < 0)
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{
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to->si_pid = from->cpt_si_pid;
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to->si_uid = from->cpt_si_uid;
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to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
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}
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else
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{
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switch (to->si_signo)
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{
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case SIGCHLD:
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to->si_pid = from->cpt_si_pid;
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to->si_uid = from->cpt_si_uid;
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to->si_status = from->cpt_si_status;
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to->si_utime = from->cpt_si_utime;
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to->si_stime = from->cpt_si_stime;
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break;
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case SIGILL:
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case SIGFPE:
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case SIGSEGV:
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case SIGBUS:
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to->si_addr = (void *) (intptr_t) from->cpt_si_addr;
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break;
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case SIGPOLL:
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to->si_band = from->cpt_si_band;
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to->si_fd = from->cpt_si_fd;
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break;
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default:
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to->si_pid = from->cpt_si_pid;
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to->si_uid = from->cpt_si_uid;
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to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr;
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break;
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}
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}
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}
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/* Called by libthread_db. Returns a pointer to the thread local
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storage (or its descriptor). */
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ps_err_e
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aarch64_ps_get_thread_area (struct ps_prochandle *ph,
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lwpid_t lwpid, int idx, void **base,
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int is_64bit_p)
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{
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struct iovec iovec;
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uint64_t reg64;
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uint32_t reg32;
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if (is_64bit_p)
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{
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iovec.iov_base = ®64;
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iovec.iov_len = sizeof (reg64);
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}
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else
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{
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iovec.iov_base = ®32;
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iovec.iov_len = sizeof (reg32);
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}
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if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0)
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return PS_ERR;
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/* IDX is the bias from the thread pointer to the beginning of the
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thread descriptor. It has to be subtracted due to implementation
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quirks in libthread_db. */
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if (is_64bit_p)
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*base = (void *) (reg64 - idx);
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else
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*base = (void *) (uintptr_t) (reg32 - idx);
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return PS_OK;
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}
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/* See nat/aarch64-linux.h. */
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int
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aarch64_tls_register_count (int tid)
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{
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uint64_t tls_regs[2];
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struct iovec iovec;
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iovec.iov_base = tls_regs;
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iovec.iov_len = sizeof (tls_regs);
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/* Attempt to read both TPIDR and TPIDR2. If ptrace returns less data than
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we are expecting, that means it doesn't support all the registers. From
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the iovec length, figure out how many TPIDR registers the target actually
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supports. */
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if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
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return 0;
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/* Calculate how many TPIDR registers we have. */
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return iovec.iov_len / sizeof (uint64_t);
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}
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