Files
binutils-gdb/sim/testsuite/riscv/jalr.s
Jaydeep Patil 1c37b30945 sim/riscv: fix JALR instruction simulation
Fix 32bit 'jalr rd,ra,imm' integer instruction, where RD was written
before using it to calculate destination address.

This commit also improves testutils.inc for riscv; make use of
pushsection and popsection when adding things to .data, and setup the
%gp global pointer register within the 'start' macro.

Approved-By: Andrew Burgess <aburgess@redhat.com>
2023-10-18 17:55:31 +01:00

23 lines
338 B
ArmAsm

# Basic jalr tests.
# mach: riscv
.include "testutils.inc"
start
# Load desination into register a0.
la a0, good_dest
# Jump to the destination in a0.
jalr a0, a0, 0
# If we write destination into a0 before reading it in order
# to jump, we might end up here.
bad_dest:
fail
# We should end up here.
good_dest:
pass
fail