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binutils-gdb/include/ChangeLog
Maciej W. Rozycki 471b9d1507 GDB PR tdep/8282: MIPS: Wire in `set disassembler-options' 
Implement MIPS target support for passing options to the disassembler,
complementing commit 65b48a8140 ("GDB: Add support for the new
set/show disassembler-options commands.").

This includes options that expect an argument, so adjust the generic
code and data structures used so as to handle such options.  So as to
give backends syntax flexibility no specific delimiter has been defined
to separate options from their respective arguments, so it has to be
included as the last character of the option name.  Completion code
however has not been adjusted and consequently option arguments cannot
be completed at this time.

Also the MIPS target has non-empty defaults for the options, so that ABI
names for the general-purpose registers respect our `set mips abi ...'
setting rather than always being determined from the ELF headers of the
binary file selected.  Handle these defaults as implicit options, never
shown to the user and always prepended to the user-specified options, so
that the latters can override the defaults.

The resulting output for the MIPS target is as follows:

(gdb) show disassembler-options
The current disassembler options are ''

The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:

  no-aliases      Use canonical instruction forms.

  msa             Recognize MSA instructions.

  virt            Recognize the virtualization ASE instructions.

  xpa             Recognize the eXtended Physical Address (XPA) ASE
                  instructions.

  ginv            Recognize the Global INValidate (GINV) ASE instructions.

  gpr-names=ABI   Print GPR names according to specified ABI.
                  Default: based on binary being disassembled.

  fpr-names=ABI   Print FPR names according to specified ABI.
                  Default: numeric.

  cp0-names=ARCH  Print CP0 register names according to specified architecture.
                  Default: based on binary being disassembled.

  hwr-names=ARCH  Print HWR names according to specified architecture.
                  Default: based on binary being disassembled.

  reg-names=ABI   Print GPR and FPR names according to specified ABI.

  reg-names=ARCH  Print CP0 register and HWR names according to specified
                  architecture.

  For the options above, the following values are supported for "ABI":
    numeric 32 n32 64

  For the options above, the following values are supported for "ARCH":
    numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600
    r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000
    r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64
    mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e
    loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp
(gdb)

which corresponds to what `objdump --help' used to print for the MIPS
target, with minor formatting changes, most notably option argument
lists being wrapped, but also the amount of white space separating
options from the respective descriptions.  The relevant part the new
code is now also used by `objdump --help', which means these formatting
changes apply to both outputs, except for argument list wrapping, which
is GDB-specific.

This also adds a separating new line between the heading and option
lists where descriptions are provided, hence:

(gdb) set architecture s390:31-bit
(gdb) show disassembler-options
The current disassembler options are ''

The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:

  esa         Disassemble in ESA architecture mode
  zarch       Disassemble in z/Architecture mode
  insnlength  Print unknown instructions according to length from first two bits
(gdb)

but:

(gdb) set architecture powerpc:common
(gdb) show disassembler-options
The current disassembler options are ''

The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
  403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl,
  821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300,
  e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5,
  power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge,
  ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe,
  spe2, titan, vle, vsx
(gdb)

Existing affected target backends have been adjusted accordingly.

This has been verified manually with:

(gdb) set architecture arm
(gdb) set architecture powerpc:common
(gdb) set architecture s390:31-bit

to cause no issues with the `show disassembler-options' and `set
disassembler-options' commands.  A test case for the MIPS target has
also been provided, covering the default settings with ABI overrides as
well as disassembler option overrides.

2018-07-02  Maciej W. Rozycki  <macro@mips.com>
            Simon Marchi  <simon.marchi@polymtl.ca>

	include/
	PR tdep/8282
	* dis-asm.h (disasm_option_arg_t): New typedef.
	(disasm_options_and_args_t): Likewise.
	(disasm_options_t): Add `arg' member, document members.
	(disassembler_options_mips): New prototype.
	(disassembler_options_arm, disassembler_options_powerpc)
	(disassembler_options_s390): Update prototypes.

	opcodes/
	PR tdep/8282
	* mips-dis.c (mips_option_arg_t): New enumeration.
	(mips_options): New variable.
	(disassembler_options_mips): New function.
	(print_mips_disassembler_options): Reimplement in terms of
	`disassembler_options_mips'.
	* arm-dis.c (disassembler_options_arm): Adapt to using the
	`disasm_options_and_args_t' structure.
	* ppc-dis.c (disassembler_options_powerpc): Likewise.
	* s390-dis.c (disassembler_options_s390): Likewise.

	gdb/
	PR tdep/8282
	* disasm.h (gdb_disassembler): Add
	`m_disassembler_options_holder'. member
	* disasm.c (get_all_disassembler_options): New function.
	(gdb_disassembler::gdb_disassembler): Use it.
	(gdb_buffered_insn_length_init_dis): Likewise.
	(gdb_buffered_insn_length): Adjust accordingly.
	(set_disassembler_options): Handle options with arguments.
	(show_disassembler_options_sfunc): Likewise.  Add a leading new
	line if showing options with descriptions.
	(disassembler_options_completer): Adapt to using the
	`disasm_options_and_args_t' structure.
	* mips-tdep.c (mips_disassembler_options): New variable.
	(mips_disassembler_options_o32): Likewise.
	(mips_disassembler_options_n32): Likewise.
	(mips_disassembler_options_n64): Likewise.
	(gdb_print_insn_mips): Don't set `disassembler_options'.
	(gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove
	functions.
	(mips_gdbarch_init): Always set `gdbarch_print_insn' to
	`gdb_print_insn_mips'.  Set `gdbarch_disassembler_options',
	`gdbarch_disassembler_options_implicit' and
	`gdbarch_valid_disassembler_options'.
	* arm-tdep.c (_initialize_arm_tdep): Adapt to using the
	`disasm_options_and_args_t' structure.
	* gdbarch.sh (disassembler_options_implicit): New `gdbarch'
	method.
	(valid_disassembler_options): Switch from `disasm_options_t' to
	the `disasm_options_and_args_t' structure.
	* NEWS: Document `set disassembler-options' support for the MIPS
	target.
	* gdbarch.h: Regenerate.
	* gdbarch.c: Regenerate.

	gdb/doc/
	PR tdep/8282
	* gdb.texinfo (Source and Machine Code): Document `set
	disassembler-options' support for the MIPS target.

	gdb/testsuite/
	PR tdep/8282
	* gdb.arch/mips-disassembler-options.exp: New test.
	* gdb.arch/mips-disassembler-options.s: New test source.
2018-07-02 23:57:21 +01:00

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2018-07-02 Maciej W. Rozycki <macro@mips.com>
PR tdep/8282
* dis-asm.h (disasm_option_arg_t): New typedef.
(disasm_options_and_args_t): Likewise.
(disasm_options_t): Add `arg' member, document members.
(disassembler_options_mips): New prototype.
(disassembler_options_arm, disassembler_options_powerpc)
(disassembler_options_s390): Update prototypes.
2018-06-29 Tamar Christina <tamar.christina@arm.com>
PR binutils/23192
*opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
2018-06-26 Alan Modra <amodra@gmail.com>
* elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
2018-06-24 Nick Clifton <nickc@redhat.com>
2.31 branch created.
2018-06-21 Alan Hayward <alan.hayward@arm.com>
* elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
for non SHT_NOBITS.
2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
Sync with GCC
2018-05-24 Tom Rix <trix@juniper.net>
* dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
2017-11-20 Kito Cheng <kito.cheng@gmail.com>
* longlong.h [__riscv] (__umulsidi3): Define.
[__riscv] (umul_ppmm): Likewise.
[__riscv] (__muluw3): Likewise.
2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
* elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
(AFL_ASE_MASK): Update to include AFL_ASE_GINV.
* opcode/mips.h: Document "+\" operand format.
(ASE_GINV): New macro.
2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
Faraz Shahbazker <Faraz.Shahbazker@mips.com>
* elf/mips.h (AFL_ASE_CRC): New macro.
(AFL_ASE_MASK): Update to include AFL_ASE_CRC.
* opcode/mips.h (ASE_CRC): New macro.
* opcode/mips.h (ASE_CRC64): Likewise.
2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
* elf/xtensa.h (xtensa_read_table_entries)
(xtensa_compute_fill_extra_space): New declarations.
2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
* diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
define for GCC.
2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
* diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
(DIAGNOSTIC_STRINGIFY): Likewise.
(DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
(DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
(DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
(DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
(DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
(DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
* diagnostics.h: Moved from ../gdb/common/diagnostics.h.
2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
* splay-tree.h (splay_tree_compare_strings,
splay_tree_delete_pointers): Declare new utility functions.
2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
* opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
2018-05-18 Kito Cheng <kito.cheng@gmail.com>
* elf/riscv.h (EF_RISCV_RVE): New define.
2018-05-18 John Darrington <john@darrington.wattle.id.au>
* elf/s12z.h: New header.
2018-05-15 Tamar Christina <tamar.christina@arm.com>
PR binutils/21446
* opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
2018-05-15 Tamar Christina <tamar.christina@arm.com>
PR binutils/21446
* opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
(aarch64_print_operand): Support notes.
2018-05-15 Tamar Christina <tamar.christina@arm.com>
PR binutils/21446
* opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
(aarch64_decode_insn): Accept error struct.
2018-05-15 Francois H. Theron <francois.theron@netronome.com>
* opcode/nfp.h: Use uint64_t instead of bfd_vma.
2018-05-10 John Darrington <john@darrington.wattle.id.au>
* elf/common.h (EM_S12Z): New macro.
2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
* mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
(MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
2018-05-08 Jim Wilson <jimw@sifive.com>
* opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
(MATCH_C_SRAI64, MASK_C_SRAI64): New.
(MATCH_C_SLLI64, MASK_C_SLLI64): New.
2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
* opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
(vle_num_opcodes): Likewise.
(spe2_num_opcodes): Likewise.
2018-05-04 Alan Modra <amodra@gmail.com>
* ansidecl.h: Import from gcc.
* coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
to s_name.
(struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
2018-04-30 Francois H. Theron <francois.theron@netronome.com>
* dis-asm.h: Added print_nfp_disassembler_options prototype.
* elf/common.h: Added EM_NFP, officially assigned. See Google Group
Generic System V Application Binary Interface.
* elf/nfp.h: New, for NFP support.
* opcode/nfp.h: New, for NFP support.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
R_ARM_TLS_IE32_FDPIC.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
* elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
(R_ARM_FUNCDESC)
(R_ARM_FUNCDESC_VALUE): Define new relocations.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
* elf/arm.h (EF_ARM_FDPIC): New.
2018-04-18 Alan Modra <amodra@gmail.com>
* coff/mipspe.h: Delete.
2018-04-18 Alan Modra <amodra@gmail.com>
* aout/dynix3.h: Delete.
2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
Microblaze Target: PIC data text relative
* bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
* elf/microblaze.h (Add 3 new relocations):
R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
and R_MICROBLAZE_TEXTREL_32_LO for relax function.
2018-04-17 Alan Modra <amodra@gmail.com>
* elf/i370.h: Revert removal.
* elf/i860.h: Likewise.
* elf/i960.h: Likewise.
2018-04-16 Alan Modra <amodra@gmail.com>
* coff/sparc.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* aout/host.h: Remove m68k-aout and m68k-coff support.
* aout/hp300hpux.h: Delete.
* coff/apollo.h: Delete.
* coff/aux-coff.h: Delete.
* coff/m68k.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* dis-asm.h: Remove sh5 and sh64 support.
2018-04-16 Alan Modra <amodra@gmail.com>
* coff/internal.h: Remove w65 support.
* coff/w65.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* coff/we32k.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* coff/internal.h: Remove m88k support.
* coff/m88k.h: Delete.
* opcode/m88k.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* elf/i370.h: Delete.
* opcode/i370.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* coff/h8500.h: Delete.
* coff/internal.h: Remove h8500 support.
2018-04-16 Alan Modra <amodra@gmail.com>
* coff/h8300.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* ieee.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* aout/host.h: Remove newsos3 support.
2018-04-16 Alan Modra <amodra@gmail.com>
* nlm/ChangeLog-9315: Delete.
* nlm/alpha-ext.h: Delete.
* nlm/common.h: Delete.
* nlm/external.h: Delete.
* nlm/i386-ext.h: Delete.
* nlm/internal.h: Delete.
* nlm/ppc-ext.h: Delete.
* nlm/sparc32-ext.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* opcode/tahoe.h: Delete.
2018-04-11 Alan Modra <amodra@gmail.com>
* aout/adobe.h: Delete.
* aout/reloc.h: Delete.
* coff/i860.h: Delete.
* coff/i960.h: Delete.
* elf/i860.h: Delete.
* elf/i960.h: Delete.
* opcode/i860.h: Delete.
* opcode/i960.h: Delete.
* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
* aout/ar.h (ARMAGB): Remove.
* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
union internal_auxent): Remove i960 support.
2018-04-09 Alan Modra <amodra@gmail.com>
* elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
* elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
2018-03-28 Renlin Li <renlin.li@arm.com>
PR ld/22970
* elf/aarch64.h: Add relocation number for
R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
2018-03-28 Nick Clifton <nickc@redhat.com>
PR 22988
* opcode/aarch64.h (enum aarch64_opnd): Add
AARCH64_OPND_SVE_ADDR_R.
2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
* elf/common.h (DF_1_KMOD): New.
(DF_1_WEAKFILTER): Likewise.
(DF_1_NOCOMMON): Likewise.
2018-03-14 Kito Cheng <kito.cheng@gmail.com>
* opcode/riscv.h (OP_MASK_FUNCT3): New.
(OP_SH_FUNCT3): Likewise.
(OP_MASK_FUNCT7): Likewise.
(OP_SH_FUNCT7): Likewise.
(OP_MASK_OP2): Likewise.
(OP_SH_OP2): Likewise.
(OP_MASK_CFUNCT4): Likewise.
(OP_SH_CFUNCT4): Likewise.
(OP_MASK_CFUNCT3): Likewise.
(OP_SH_CFUNCT3): Likewise.
(riscv_insn_types): Likewise.
2018-03-13 Nick Clifton <nickc@redhat.com>
PR 22113
* coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
field.
2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
* opcode/i386 (OLDGCC_COMPAT): Removed.
2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
2018-02-20 Maciej W. Rozycki <macro@mips.com>
* opcode/mips.h: Remove `M' operand code.
2018-02-12 Zebediah Figura <z.figura12@gmail.com>
* coff/msdos.h: New header.
* coff/pe.h: Move common defines to msdos.h.
* coff/powerpc.h: Likewise.
2018-01-13 Nick Clifton <nickc@redhat.com>
2.30 branch created.
2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
PR ld/22393
* bfdlink.h (bfd_link_info): Add separate_code.
2018-01-04 Jim Wilson <jimw@sifive.com>
* opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
(CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
Add alias to map mbadaddr to CSR_MTVAL.
2018-01-03 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
For older changes see ChangeLog-2017
Copyright (C) 2018 Free Software Foundation, Inc.
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