Christoph Müllner 4a3bc79bf4 RISC-V: Add T-Head Fmv vendor extension ...

This patch adds the XTheadFmv extension, which allows to access the
upper 32 bits of a double-precision floating-point register in RV32.

The XTheadFmv extension is documented in the RISC-V toolchain
contentions:
  https://github.com/riscv-non-isa/riscv-toolchain-conventions

Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

2022-11-17 16:43:49 +08:00

..

aarch64.h

aarch64: Add support for Common Short Sequence Compression extension

2022-11-14 16:47:22 +00:00

alpha.h

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arc-attrs.h

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arc-func.h

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arc.h

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arm.h

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avr.h

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bfin.h

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cgen.h

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ChangeLog-0415

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ChangeLog-9103

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convex.h

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cr16.h

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cris.h

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crx.h

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csky.h

Remove use of bfd_uint64_t and similar

2022-05-27 22:08:59 +09:30

d10v.h

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d30v.h

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dlx.h

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ft32.h

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h8300.h

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hppa.h

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i386.h

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2022-01-02 12:04:28 +10:30

ia64.h

Remove use of bfd_uint64_t and similar

2022-05-27 22:08:59 +09:30

loongarch.h

gas:LoongArch: Fix segment error in compilation due to too long symbol name.

2022-03-20 09:37:12 +08:00

m68hc11.h

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m68k.h

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metag.h

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mips.h

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mmix.h

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mn10200.h

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mn10300.h

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moxie.h

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msp430-decode.h

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msp430.h

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nds32.h

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nfp.h

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nios2.h

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nios2r1.h

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nios2r2.h

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np1.h

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ns32k.h

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pdp11.h

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pj.h

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pn.h

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ppc.h

PowerPC: Add support for RFC02653 - Dense Math Facility

2022-10-27 19:23:00 -05:00

pru.h

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pyr.h

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riscv-opc.h

RISC-V: Add T-Head Fmv vendor extension

2022-11-17 16:43:49 +08:00

riscv.h

RISC-V: Add T-Head Fmv vendor extension

2022-11-17 16:43:49 +08:00

rl78.h

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rx.h

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s12z.h

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s390.h

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score-datadep.h

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score-inst.h

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sparc.h

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spu-insns.h

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spu.h

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tic4x.h

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tic6x-control-registers.h

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tic6x-insn-formats.h

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tic6x-opcode-table.h

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tic6x.h

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tic30.h

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tic54x.h

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tilegx.h

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tilepro.h

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v850.h

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vax.h

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visium.h

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wasm.h

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xgate.h

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