forked from Imagelibrary/binutils-gdb
be0387eed0
The sim-hardware configure option allows builders to select a set of device models to enable. But this seems like unnecessary overkill: the existence of individual device models doesn't affect performance at all as they are only enabled at runtime if the config uses them, and individually these are all <5KB a piece. Stripping off a total of ~50KB from a ~1MB binary doesn't seem useful, and it's extremely unlikely anyone will ever bother. So let's simplify the configure/make logic by turning sim-hardware into a boolean option like many of the other sim options. Any ports that have unique device models will declare them in their Makefile instead of at configure time. This will allow us to (eventually) unify the setting into the common dir.
154 lines
5.0 KiB
Makefile
154 lines
5.0 KiB
Makefile
# Makefile template for Configure for the m32r simulator
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# Copyright (C) 1996-2021 Free Software Foundation, Inc.
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# Contributed by Cygnus Support.
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#
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# This file is part of GDB, the GNU debugger.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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## COMMON_PRE_CONFIG_FRAG
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M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
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M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
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M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
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TRAPS_OBJ = @traps_obj@
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SIM_OBJS = \
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$(SIM_NEW_COMMON_OBJS) \
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cgen-utils.o cgen-trace.o cgen-scache.o \
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cgen-run.o \
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sim-if.o arch.o \
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$(M32R_OBJS) \
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$(M32RX_OBJS) \
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$(M32R2_OBJS) \
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$(TRAPS_OBJ)
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SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
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# Extra headers included by sim-main.h.
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SIM_EXTRA_DEPS = \
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$(CGEN_INCLUDE_DEPS) \
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arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h \
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eng.h engx.h eng2.h
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SIM_EXTRA_CFLAGS = @sim_extra_cflags@
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SIM_EXTRA_CLEAN = m32r-clean
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# Code doesn't build cleanly yet.
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SIM_WERROR_CFLAGS =
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## COMMON_POST_CONFIG_FRAG
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arch = m32r
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# M32R objs
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M32RBF_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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cpu.h decode.h eng.h
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# FIXME: Use of `mono' is wip.
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mloop.c eng.h: stamp-mloop ; @true
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stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
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$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
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-mono -fast -pbb -switch sem-switch.c \
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-cpu m32rbf -infile $(srcdir)/mloop.in
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$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
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$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
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touch stamp-mloop
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# M32RX objs
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M32RXF_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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cpux.h decodex.h engx.h
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# FIXME: Use of `mono' is wip.
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mloopx.c engx.h: stamp-xmloop ; @true
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stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
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$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
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-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
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-cpu m32rxf -infile $(srcdir)/mloopx.in \
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-outfile-suffix x
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$(SHELL) $(srcroot)/move-if-change engx.hin engx.h
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$(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
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touch stamp-xmloop
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# M32R2 objs
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M32R2F_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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cpu2.h decode2.h eng2.h
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# FIXME: Use of `mono' is wip.
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mloop2.c eng2.h: stamp-2mloop ; @true
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stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
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$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
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-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
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-cpu m32r2f -infile $(srcdir)/mloop2.in \
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-outfile-suffix 2
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$(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
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$(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
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touch stamp-2mloop
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m32r-clean:
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rm -f mloop.c eng.h stamp-mloop
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rm -f mloopx.c engx.h stamp-xmloop
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rm -f mloop2.c eng2.h stamp-2mloop
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rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
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rm -f tmp-*
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# NOTE: Generated source files are specified as full paths,
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# e.g. $(srcdir)/arch.c, because make may decide the files live
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# in objdir otherwise.
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stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
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$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
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archfile=$(CPU_DIR)/m32r.cpu \
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FLAGS="with-scache with-profile=fn"
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touch stamp-arch
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$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
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@true
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stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=m32rbf mach=m32r SUFFIX= \
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archfile=$(CPU_DIR)/m32r.cpu \
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FLAGS="with-scache with-profile=fn" \
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EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
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touch stamp-cpu
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$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
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@true
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stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=m32rxf mach=m32rx SUFFIX=x \
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archfile=$(CPU_DIR)/m32r.cpu \
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FLAGS="with-scache with-profile=fn" \
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EXTRAFILES="$(CGEN_CPU_SEMSW)"
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touch stamp-xcpu
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$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
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@true
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stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=m32r2f mach=m32r2 SUFFIX=2 \
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archfile=$(CPU_DIR)/m32r.cpu \
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FLAGS="with-scache with-profile=fn" \
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EXTRAFILES="$(CGEN_CPU_SEMSW)"
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touch stamp-2cpu
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$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
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@true
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