forked from Imagelibrary/binutils-gdb
5e5f37ed00
On x86, MAX_MEM_FOR_RS_ALIGN_CODE is 35, when the most common
alignment is 2**3 or 2**4, where the max memory required for the
alignment nops is 7 and 15 bytes respectively. So there is some
memory wasted since commit 83d94ae428. It's not a large amount,
especially considering that frag overhead on x86_46 is 144 bytes,
but even so I'd rather not be blamed for increasing gas memory usage.
So to reduce the memory we'd like to take the alignment into
consideration when initialising an rs_align_code frag. The only
difficulty here is start_bundle making an rs_align_code frag with an
alignment of zero initially, then later increasing the alignment. We
change that to use the bundle alignment when setting up the frag. I
think that is sufficient as bundle_align_p2 can't change in the middle
of a start_bundle/finish_bundle sequence.
I haven't modified any targets other than x86 in this patch. Most
won't benefit much due to using fairly small MAX_MEM_FOR_RS_ALIGN_CODE.
* read.c (start_bundle): Create rs_align_code frag with
bundle_align_p2 alignment, then set to zero alignment.
(finish_bundle): Adjust comment.
* frags.c (MAX_MEM_FOR_RS_ALIGN_CODE): Pass p2align and max
to macro.
* config/tc-i386.h (HANDLE_ALIGN): Assert that max_bytes is
sufficient for nop padding.
(max_mem_for_rs_align_code): New inline function.
(MAX_MEM_FOR_RS_ALIGN_CODE): Use it.
* config/tc-aarch64.h: Adjust MAX_MEM_FOR_RS_ALIGN_CODE.
* config/tc-alpha.h: Likewise.
* config/tc-arc.h: Likewise.
* config/tc-arm.h: Likewise.
* config/tc-epiphany.h: Likewise.
* config/tc-frv.h: Likewise.
* config/tc-ia64.h: Likewise.
* config/tc-kvx.h: Likewise.
* config/tc-loongarch.h: Likewise.
* config/tc-m32r.h: Likewise.
* config/tc-metag.h: Likewise.
* config/tc-mips.h: Likewise.
* config/tc-nds32.h: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-riscv.h: Likewise.
* config/tc-rl78.h: Likewise.
* config/tc-rx.h: Likewise.
* config/tc-score.h: Likewise.
* config/tc-sh.h: Likewise.
* config/tc-sparc.h: Likewise.
* config/tc-spu.h: Likewise.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-visium.h: Likewise.
* config/tc-xtensa.h: Likewise.
316 lines
10 KiB
C
316 lines
10 KiB
C
/* tc-nds32.h -- Header file for tc-nds32.c.
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Copyright (C) 2012-2025 Free Software Foundation, Inc.
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Contributed by Andes Technology Corporation.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#ifndef TC_NDS32
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#define TC_NDS32
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#include <stdint.h>
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/* Enum mapping symbol. */
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enum mstate
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{
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MAP_UNDEFINED = 0, /* Must be zero, for seginfo in new sections. */
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MAP_DATA,
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MAP_CODE,
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};
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#define TC_SEGMENT_INFO_TYPE struct nds32_segment_info_type
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/* For mapping symbol. */
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struct nds32_segment_info_type
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{
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enum mstate mapstate;
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};
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#define LISTING_HEADER \
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(target_big_endian ? "NDS32 GAS" : "NDS32 GAS Little Endian")
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/* The target BFD architecture. */
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#define TARGET_ARCH bfd_arch_nds32
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/* mapping to mach_table[5] */
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#define ISA_V1 bfd_mach_n1h
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#define ISA_V2 bfd_mach_n1h_v2
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#define ISA_V3 bfd_mach_n1h_v3
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#define ISA_V3M bfd_mach_n1h_v3m
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/* Default to big endian. Please note that for Andes architecture,
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instructions are always in big-endian format. */
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#ifndef TARGET_BYTES_BIG_ENDIAN
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#define TARGET_BYTES_BIG_ENDIAN 1
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#endif
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/* as.c. */
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/* Extend GAS command line option handling capability. */
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extern int nds32_parse_option (int, const char *);
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extern void nds32_after_parse_args (void);
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/* The endianness of the target format may change based on command
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line arguments. */
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extern const char * nds32_target_format (void);
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#define md_parse_option(optc, optarg) nds32_parse_option (optc, optarg)
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#define md_after_parse_args() nds32_after_parse_args ()
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#define TARGET_FORMAT nds32_target_format()
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/* expr.c */
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extern int nds32_parse_name (char const *, expressionS *, enum expr_mode, char *);
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extern bool nds32_allow_local_subtract (expressionS *, expressionS *, segT);
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#define md_parse_name(name, exprP, mode, nextcharP) \
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nds32_parse_name (name, exprP, mode, nextcharP)
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#define md_allow_local_subtract(lhs,rhs,sect) nds32_allow_local_subtract (lhs, rhs, sect)
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/* dwarf2dbg.c. */
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#define DWARF2_USE_FIXED_ADVANCE_PC 1
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/* write.c. */
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extern long nds32_pcrel_from_section (struct fix *, segT);
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extern bool nds32_fix_adjustable (struct fix *);
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extern void nds32_frob_file (void);
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extern void nds32_post_relax_hook (void);
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extern void nds32_frob_file_before_fix (void);
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extern void elf_nds32_final_processing (void);
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extern int nds32_validate_fix_sub (struct fix *, segT);
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extern int nds32_force_relocation (struct fix *);
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/* Fill in rs_align_code fragments. TODO: Review this. */
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extern void nds32_handle_align (fragS *);
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extern int nds32_relax_frag (segT, fragS *, long);
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extern int tc_nds32_regname_to_dw2regnum (char *);
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extern void tc_nds32_frame_initial_instructions (void);
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#define MD_PCREL_FROM_SECTION(fix, sect) nds32_pcrel_from_section (fix, sect)
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#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
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#define tc_fix_adjustable(FIX) nds32_fix_adjustable (FIX)
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#define md_apply_fix(fixP, addn, seg) nds32_apply_fix (fixP, addn, seg)
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#define md_post_relax_hook nds32_post_relax_hook ()
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#define tc_frob_file_before_fix() nds32_frob_file_before_fix ()
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#define elf_tc_final_processing() elf_nds32_final_processing ()
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/* For DIFF relocations. The default behavior is inconsistent with the
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asm internal document. */
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEC) \
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(GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEC) \
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|| TC_FORCE_RELOCATION (FIX))
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#define TC_FORCE_RELOCATION(fix) nds32_force_relocation (fix)
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#define TC_VALIDATE_FIX_SUB(FIX,SEG) nds32_validate_fix_sub (FIX,SEG)
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#define GAS_SORT_RELOCS 1
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/* Values passed to md_apply_fix don't include the symbol value. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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#define MAX_MEM_FOR_RS_ALIGN_CODE(p2align, max) (1 + 2 + 4)
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#define HANDLE_ALIGN(s, f) nds32_handle_align (f)
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#undef DIFF_EXPR_OK /* They should be fixed in linker. */
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#define md_relax_frag(segment, fragP, stretch) nds32_relax_frag (segment, fragP, stretch)
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#define WORKING_DOT_WORD /* We don't need to handle .word strangely. */
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/* Using to chain fixup with previous fixup. */
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#define TC_FIX_TYPE struct fix *
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#define TC_INIT_FIX_DATA(fixP) \
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do \
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{ \
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fixP->tc_fix_data = NULL; \
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} \
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while (0)
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/* read.c. */
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/* Extend GAS macro handling capability. */
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extern void nds32_macro_start (void);
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extern void nds32_macro_end (void);
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extern void nds32_macro_info (void *);
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extern void nds32_start_line_hook (void);
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extern void nds32_elf_section_change_hook (void);
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extern void md_begin (void);
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extern void md_finish (void);
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extern int nds32_start_label (int, int);
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extern void nds32_cleanup (void);
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extern void nds32_flush_pending_output (void);
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extern void nds32_cons_align (int);
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extern void nds32_check_label (symbolS *);
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extern void nds32_frob_label (symbolS *);
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extern void nds32_pre_do_align (int, char *, int, int);
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extern void nds32_do_align (int);
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#define md_macro_start() nds32_macro_start ()
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#define md_macro_end() nds32_macro_end ()
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#define md_macro_info(args) nds32_macro_info (args)
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#define TC_START_LABEL(STR, NUL_CHAR, NEXT_CHAR) \
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(NEXT_CHAR == ':' && nds32_start_label (0, 0))
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#define tc_check_label(label) nds32_check_label (label)
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#define tc_frob_label(label) nds32_frob_label (label)
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#define md_finish md_finish
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#define md_start_line_hook() nds32_start_line_hook ()
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#define md_cons_align(n) nds32_cons_align (n)
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/* COLE: TODO: Review md_do_align. */
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#define md_do_align(N, FILL, LEN, MAX, LABEL) \
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nds32_pre_do_align (N, FILL, LEN, MAX); \
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if ((N) > 1 && (subseg_text_p (now_seg) \
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|| startswith (now_seg->name, ".gcc_except_table"))) \
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nds32_do_align (N); \
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goto LABEL;
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#define md_elf_section_change_hook() nds32_elf_section_change_hook ()
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#define md_flush_pending_output() nds32_flush_pending_output ()
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#define md_cleanup() nds32_cleanup ()
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#define LOCAL_LABELS_FB 1 /* Permit temporary numeric labels. */
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/* frags.c. */
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enum FRAG_ATTR
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{
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NDS32_FRAG_RELAXABLE = 0x1,
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NDS32_FRAG_RELAXED = 0x2,
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NDS32_FRAG_BRANCH = 0x4,
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NDS32_FRAG_LABEL = 0x8,
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NDS32_FRAG_FINAL = 0x10,
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NDS32_FRAG_RELAXABLE_BRANCH = 0x20,
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NDS32_FRAG_ALIGN = 0x40
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};
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struct nds32_frag_type
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{
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relax_substateT flag;
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struct nds32_opcode *opcode;
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uint32_t insn;
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/* To Save previous label fixup if existence. */
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struct fix *fixup;
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};
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extern void nds32_frag_init (fragS *);
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#define TC_FRAG_TYPE struct nds32_frag_type
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#define TC_FRAG_INIT(fragP, max_bytes) nds32_frag_init (fragP)
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/* CFI directive. */
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extern void nds32_elf_frame_initial_instructions (void);
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extern int tc_nds32_regname_to_dw2regnum (char *);
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#define TARGET_USE_CFIPOP 1
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#define DWARF2_DEFAULT_RETURN_COLUMN 30
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#define DWARF2_CIE_DATA_ALIGNMENT -4
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#define DWARF2_LINE_MIN_INSN_LENGTH 2
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#define tc_regname_to_dw2regnum tc_nds32_regname_to_dw2regnum
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#define tc_cfi_frame_initial_instructions tc_nds32_frame_initial_instructions
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/* COLE: TODO: Review These. They seem to be obsoleted. */
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#if 1
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#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
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((FIX)->fx_addsy == NULL \
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|| (! S_IS_EXTERNAL ((FIX)->fx_addsy) \
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&& ! S_IS_WEAK ((FIX)->fx_addsy) \
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&& S_IS_DEFINED ((FIX)->fx_addsy) \
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&& ! S_IS_COMMON ((FIX)->fx_addsy)))
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#define TC_HANDLES_FX_DONE
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#endif
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/* Because linker may relax the code, assemble-time expression
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optimization is not allowed. */
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#define md_allow_eh_opt 0
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/* For nds32 relax. */
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enum nds32_br_range
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{
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BR_RANGE_S256 = 0,
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BR_RANGE_S16K,
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BR_RANGE_S64K,
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BR_RANGE_S16M,
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BR_RANGE_U4G,
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BR_RANGE_NUM
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};
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enum nds32_ramp
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{
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NDS32_CREATE_LABEL = 1,
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NDS32_RELAX = (1 << 1), /* Obsolete in the future. */
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NDS32_ORIGIN = (1 << 2),
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NDS32_INSN16 = (1 << 3),
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NDS32_PTR = (1 << 4),
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NDS32_ABS = (1 << 5),
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NDS32_HINT = (1 << 6),
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NDS32_FIX = (1 << 7),
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NDS32_ADDEND = (1 << 8),
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NDS32_SYM = (1 << 9),
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NDS32_PCREL = (1 << 10),
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NDS32_PTR_PATTERN = (1 << 11),
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NDS32_PTR_MULTIPLE = (1 << 12),
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NDS32_GROUP = (1 << 13),
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NDS32_SYM_DESC_MEM = (1 << 14)
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};
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typedef struct nds32_relax_fixup_info
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{
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int offset;
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int size;
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/* Reverse branch has to jump to the end of instruction pattern. */
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int ramp;
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enum bfd_reloc_code_real r_type;
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} nds32_relax_fixup_info_t;
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typedef struct nds32_cond_field
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{
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int offset;
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int bitpos; /* Register position. */
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int bitmask; /* Number of register bits. */
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bool signed_extend;
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} nds32_cond_field_t;
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/* The max relaxation pattern is 20-bytes including the nop. */
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#define NDS32_MAXCHAR 20
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/* In current, the max extended number of instruction for one pseudo instruction
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is 6, but its number of relocation may be 12. */
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#define MAX_RELAX_NUM 6
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#define MAX_RELAX_FIX 12
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typedef struct nds32_relax_info
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{
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/* Opcode for the instruction. */
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const char *opcode;
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enum nds32_br_range br_range;
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nds32_cond_field_t cond_field[MAX_RELAX_NUM]; /* TODO: Reuse nds32_field? */
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/* Code sequences for different branch range. */
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uint32_t relax_code_seq[BR_RANGE_NUM][MAX_RELAX_NUM];
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nds32_cond_field_t relax_code_condition[BR_RANGE_NUM][MAX_RELAX_NUM];
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unsigned int relax_code_size[BR_RANGE_NUM];
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int relax_branch_isize[BR_RANGE_NUM];
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nds32_relax_fixup_info_t relax_fixup[BR_RANGE_NUM][MAX_RELAX_FIX];
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} relax_info_t;
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enum nds32_relax_hint_type
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{
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NDS32_RELAX_HINT_NONE = 0,
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NDS32_RELAX_HINT_LA_FLSI,
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NDS32_RELAX_HINT_LALS,
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NDS32_RELAX_HINT_LA_PLT,
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NDS32_RELAX_HINT_LA_GOT,
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NDS32_RELAX_HINT_LA_GOTOFF,
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NDS32_RELAX_HINT_TLS_START = 0x100,
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NDS32_RELAX_HINT_TLS_LE_LS,
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NDS32_RELAX_HINT_TLS_IE_LS,
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NDS32_RELAX_HINT_TLS_IE_LA,
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NDS32_RELAX_HINT_TLS_IEGP_LA,
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NDS32_RELAX_HINT_TLS_DESC_LS,
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};
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struct nds32_relax_hint_table
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{
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enum nds32_relax_hint_type main_type;
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unsigned int relax_code_size;
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uint32_t relax_code_seq[MAX_RELAX_NUM];
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nds32_relax_fixup_info_t relax_fixup[MAX_RELAX_FIX];
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};
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#endif /* TC_NDS32 */
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