sim: ppc: drop old dgen.c generator

The spreg.[ch] files live in the source tree now and are created
with the dgen.py script, so we don't need this old tool anymore.

sim/Makefile.in

@@ -3469,6 +3469,16 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
 @SIM_ENABLE_ARCH_ppc_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
 
+@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/dgen.py ppc/$(am__dirstamp)
+@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_GEN)$(srcdir)/ppc/dgen.py --source $@.tmp
+@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
+@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_at)touch $(srcdir)/ppc/spreg.c
+
+@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/dgen.py ppc/$(am__dirstamp)
+@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_GEN)$(srcdir)/ppc/dgen.py --header $@.tmp
+@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
+@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_at)touch $(srcdir)/ppc/spreg.h
+
 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
 @SIM_ENABLE_ARCH_rl78_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
 

sim/ppc/Makefile.in

@@ -70,6 +70,7 @@ FLOAT_CFLAGS = @sim_float@
 MONITOR_CFLAGS = @sim_monitor@
 MODEL_CFLAGS = @sim_model@ @sim_default_model@ @sim_model_issue@
 TERMIO_CFLAGS = @sim_termio@
+SWITCH_CFLAGS = @sim_switch@
 CONFIG_CFLAGS = \
   $(SMP_CFLAGS) \
   $(XOR_ENDIAN_CFLAGS) \
@@ -79,7 +80,8 @@ CONFIG_CFLAGS = \
   $(FLOAT_CFLAGS) \
   $(MONITOR_CFLAGS) \
   $(MODEL_CFLAGS) \
-  $(TERMIO_CFLAGS)
+  $(TERMIO_CFLAGS) \
+  $(SWITCH_CFLAGS)
 SIM_FPU_CFLAGS = -DHAVE_COMMON_FPU -I../common -I${srcdir}/../common
 
 STD_CFLAGS	= $(CFLAGS) $(WERROR_CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(INCGNU) $(SIM_FPU_CFLAGS)
@@ -99,7 +101,6 @@ IGEN_FILTER = @sim_filter@
 IGEN_ICACHE = @sim_icache@
 IGEN_SMP = @sim_igen_smp@
 IGEN_LINE_NR = @sim_line_nr@
-DGEN_FLAGS = @sim_switch@
 
 IGEN_FLAGS = \
 	$(IGEN_DECODE_MECHANISM) \
@@ -110,11 +111,10 @@ IGEN_FLAGS = \
 	$(IGEN_SMP) \
 	$(IGEN_LINE_NR)
 
-# igen/dgen leak memory, and therefore makes AddressSanitizer unhappy.  Disable
-# leak detection while running them.
+# igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
+# leak detection while running it.
 
 IGEN = ASAN_OPTIONS=detect_leaks=0 ./igen
-DGEN = ASAN_OPTIONS=detect_leaks=0 ./dgen
 
 .NOEXPORT:
 MAKEOVERRIDES=
@@ -414,7 +414,6 @@ BUILT_SRC_WO_CONFIG = \
 	idecode.h idecode.c \
 	semantics.h semantics.c \
 	itable.h itable.c \
-	spreg.h spreg.c \
 	model.h model.c \
 	support.h support.c \
 	pk.h \
@@ -514,7 +513,7 @@ PACKAGE_SRC = pk_disklabel.c
 PACKAGE_OBJ = $(PACKAGE_SRC:.c=.o)
 
 
-$(TARGETLIB): tmp-igen tmp-dgen tmp-hw tmp-defines $(LIB_OBJ) $(GDB_OBJ)
+$(TARGETLIB): tmp-igen tmp-hw tmp-defines $(LIB_OBJ) $(GDB_OBJ)
 	$(ECHO_AR) $(AR) $(AR_FLAGS) $(TARGETLIB) $(LIB_OBJ) $(GDB_OBJ)
 	$(ECHO_RANLIB) $(RANLIB) $(TARGETLIB)
 
@@ -586,7 +585,7 @@ sim-fpu.o: $(srcdir)/../common/sim-fpu.c $(CONFIG_H)
 
 # Rebuild options whenever something changes so the date/time is up to date.
 options.o: options.c $(CPU_H) $(OPTIONS_H) $(DEFINES_H) $(BASICS_H) $(IDECODE_H) $(INLINE) $(LIB_SRC) $(BUILT_SRC) config.status Makefile
-	$(ECHO_CC) $(CC) -c $(STD_CFLAGS) '-DOPCODE_RULES="@sim_opcode@"' '-DIGEN_FLAGS="$(IGEN_FLAGS)"' '-DDGEN_FLAGS="$(DGEN_FLAGS)"' $(srcdir)/options.c
+	$(ECHO_CC) $(CC) -c $(STD_CFLAGS) '-DOPCODE_RULES="@sim_opcode@"' '-DIGEN_FLAGS="$(IGEN_FLAGS)"' $(srcdir)/options.c
 
 defines.h: tmp-defines; @true
 tmp-defines: config.h Makefile
@@ -598,15 +597,6 @@ tmp-defines: config.h Makefile
 # Rules to create the built c source code files
 #
 
-tmp-dgen: dgen ppc-spr-table $(srcroot)/move-if-change
-	$(ECHO_GEN) $(DGEN) $(DGEN_FLAGS) \
-		-r $(srcdir)/ppc-spr-table \
-		-n spreg.h -hp tmp-spreg.h \
-		-n spreg.c -p  tmp-spreg.c
-	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-spreg.h spreg.h
-	$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-spreg.c spreg.c
-	$(SILENCE) touch $@
-
 tmp-igen: igen $(srcdir)/powerpc.igen $(srcdir)/altivec.igen $(srcdir)/e500.igen $(IGEN_OPCODE_RULES) $(srcroot)/move-if-change
 	$(ECHO_GEN) $(IGEN) $(IGEN_FLAGS) \
 		-o $(srcdir)/$(IGEN_OPCODE_RULES) \
@@ -640,12 +630,8 @@ tmp-igen: igen $(srcdir)/powerpc.igen $(srcdir)/altivec.igen $(srcdir)/e500.igen
 # NOTE: Some versions of make don't handle files created as side-effects
 # uncomment the below if that is the case.
 
-$(TARGETLIB): tmp-igen tmp-dgen
+$(TARGETLIB): tmp-igen
 itable.h itable.c icache.h icache.c idecode.h idecode.c semantics.h semantics.c model.h model.c support.h support.c: tmp-igen
-spreg.h spreg.c: tmp-dgen
-
-dgen: dgen.o table.o lf.o misc.o filter_host.o
-	$(ECHO_CCLD) $(LINK_FOR_BUILD) dgen.o table.o lf.o misc.o filter_host.o
 
 igen: igen.o table.o lf.o misc.o filter_host.o ld-decode.o ld-cache.o filter.o ld-insn.o gen-model.o gen-itable.o gen-icache.o gen-semantics.o gen-idecode.o gen-support.o
 	$(ECHO_CCLD) $(LINK_FOR_BUILD) igen.o table.o lf.o misc.o filter_host.o ld-decode.o ld-cache.o filter.o ld-insn.o gen-model.o gen-itable.o gen-icache.o gen-semantics.o gen-idecode.o gen-support.o
@@ -700,9 +686,6 @@ gen-idecode.o: gen-idecode.c $(MISC_H) $(LF_H) $(TABLE_H) $(FILTER_H) $(LD_DECOD
 gen-support.o: gen-support.c $(MISC_H) $(LF_H) $(TABLE_H) $(FILTER_H) $(LD_DECODE_H) $(LD_CACHE_H) $(LD_INSN_H) $(IGEN_H) $(GEN_SEMANTICS_H) $(GEN_SUPPORT_H)
 	$(ECHO_CC) $(COMPILE_FOR_BUILD) -c $(srcdir)/gen-support.c
 
-dgen.o: dgen.c $(CONFIG_H) $(MISC_H) $(LF_H) $(TABLE_H)
-	$(ECHO_CC) $(COMPILE_FOR_BUILD) -c $(srcdir)/dgen.c
-
 igen.o: igen.c $(MISC_H) $(LF_H) $(TABLE_H) $(CONFIG_H) $(FILTER_H) $(LD_CACHE_H) $(LD_DECODE_H) $(LD_INSN_H) $(IGEN_H) $(GEN_MODEL_H) $(GEN_ICACHE_H) $(GEN_ITABLE_H) $(GEN_IDECODE_H) $(GEN_SEMANTICS_H) $(GEN_SUPPORT_H)
 	$(ECHO_CC) $(COMPILE_FOR_BUILD) -c $(srcdir)/igen.c
 
@@ -799,7 +782,7 @@ TAGS: $(BUILT_SRC)
 	etags $(srcdir)/*.h $(srcdir)/*.c $(BUILT_SRC)
 
 clean mostlyclean:
-	rm -f tmp-* *.[oasi] core igen dgen $(BUILT_SRC_WO_CONFIG)
+	rm -f tmp-* *.[oasi] core igen $(BUILT_SRC_WO_CONFIG)
 
 distclean realclean: clean
 	rm -f TAGS Makefile config.cache config.status config.h defines.h stamp-h config.log

sim/ppc/configure

@@ -3498,7 +3498,7 @@ fi
 # Check whether --enable-sim-switch was given.
 if test "${enable_sim_switch+set}" = set; then :
   enableval=$enable_sim_switch; case "${enableval}" in
-  yes)	sim_switch="-s";;
+  yes)	sim_switch="-DWITH_SPREG_SWITCH_TABLE";;
   no)	sim_switch="";;
   *)	as_fn_error $? "\"--enable-sim-switch does not take a value\"" "$LINENO" 5; sim_switch="";;
 esac

sim/ppc/configure.ac

@@ -345,7 +345,7 @@ fi])dnl
 AC_ARG_ENABLE(sim-switch,
 [  --enable-sim-switch			Use a switch instead of a table for instruction call.],
 [case "${enableval}" in
-  yes)	sim_switch="-s";;
+  yes)	sim_switch="-DWITH_SPREG_SWITCH_TABLE";;
   no)	sim_switch="";;
   *)	AC_MSG_ERROR("--enable-sim-switch does not take a value"); sim_switch="";;
 esac

sim/ppc/dgen.c

@@ -1,335 +0,0 @@
-/*  This file is part of the program psim.
-
-    Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 3 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, see <http://www.gnu.org/licenses/>.
- 
-    */
-
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <getopt.h>
-#include <stdio.h>
-#include <ctype.h>
-#include <stdarg.h>
-
-#include "build-config.h"
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#include <stdlib.h>
-#include <string.h>
-
-/****************************************************************/
-
-int spreg_lookup_table = 1;
-enum {
-  nr_of_sprs = 1024,
-};
-
-/****************************************************************/
-
-
-typedef enum {
-  spreg_name,
-  spreg_reg_nr,
-  spreg_readonly,
-  spreg_length,
-  nr_spreg_fields,
-} spreg_fields;
-
-typedef struct _spreg_table_entry spreg_table_entry;
-struct _spreg_table_entry {
-  char *name;
-  int spreg_nr;
-  int is_readonly;
-  int length;
-  table_entry *entry;
-  spreg_table_entry *next;
-};
-
-typedef struct _spreg_table spreg_table;
-struct _spreg_table {
-  spreg_table_entry *sprs;
-};
-
-static void
-spreg_table_insert(spreg_table *table, table_entry *entry)
-{
-  /* create a new spr entry */
-  spreg_table_entry *new_spr = ZALLOC(spreg_table_entry);
-  new_spr->next = NULL;
-  new_spr->entry = entry;
-  new_spr->spreg_nr = atoi(entry->fields[spreg_reg_nr]);
-  new_spr->is_readonly = (entry->fields[spreg_readonly]
-			  ? atoi(entry->fields[spreg_readonly])
-			  : 0);
-  new_spr->length = atoi(entry->fields[spreg_length]);
-  new_spr->name = (char*)zalloc(strlen(entry->fields[spreg_name]) + 1);
-  ASSERT(new_spr->name != NULL);
-  {
-    int i;
-    for (i = 0; entry->fields[spreg_name][i] != '\0'; i++) {
-      if (isupper(entry->fields[spreg_name][i]))
-	new_spr->name[i] = tolower(entry->fields[spreg_name][i]);
-      else
-	new_spr->name[i] = entry->fields[spreg_name][i];
-    }
-  }
-
-  /* insert, by spreg_nr order */
-  {
-    spreg_table_entry **ptr_to_spreg_entry = &table->sprs;
-    spreg_table_entry *spreg_entry = *ptr_to_spreg_entry;
-    while (spreg_entry != NULL && spreg_entry->spreg_nr < new_spr->spreg_nr) {
-      ptr_to_spreg_entry = &spreg_entry->next;
-      spreg_entry = *ptr_to_spreg_entry;
-    }
-    ASSERT(spreg_entry == NULL || spreg_entry->spreg_nr != new_spr->spreg_nr);
-    *ptr_to_spreg_entry = new_spr;
-    new_spr->next = spreg_entry;
-  }
-
-}
-
-
-static spreg_table *
-spreg_table_load(char *file_name)
-{
-  table *file = table_open(file_name, nr_spreg_fields, 0);
-  spreg_table *table = ZALLOC(spreg_table);
-
-  {
-    table_entry *entry;
-    while ((entry = table_entry_read(file)) != NULL) {
-      spreg_table_insert(table, entry);
-    }
-  }
-
-  return table;
-}
-
-
-/****************************************************************/
-
-char *spreg_attributes[] = {
-  "is_valid",
-  "is_readonly",
-  "name",
-  "index",
-  "length",
-  0
-};
-
-static void
-gen_spreg_h(spreg_table *table, lf *file)
-{
-  spreg_table_entry *entry;
-  char **attribute;
-
-  lf_print__gnu_copyleft(file);
-  lf_printf(file, "\n");
-  lf_printf(file, "#ifndef _SPREG_H_\n");
-  lf_printf(file, "#define _SPREG_H_\n");
-  lf_printf(file, "\n");
-  lf_printf(file, "typedef unsigned_word spreg;\n");
-  lf_printf(file, "\n");
-  lf_printf(file, "typedef enum {\n");
-
-  for (entry = table->sprs;
-       entry != NULL ;
-       entry = entry->next) {
-    lf_printf(file, "  spr_%s = %d,\n", entry->name, entry->spreg_nr);
-  }
-
-  lf_printf(file, "  nr_of_sprs = %d\n", nr_of_sprs);
-  lf_printf(file, "} sprs;\n");
-  lf_printf(file, "\n");
-  for (attribute = spreg_attributes;
-       *attribute != NULL;
-       attribute++) {
-    if (strcmp(*attribute, "name") == 0) {
-      lf_print_function_type(file, "const char *", "INLINE_SPREG", " ");
-      lf_printf(file, "spr_%s(sprs spr);\n", *attribute);
-    }
-    else {
-      lf_print_function_type(file, "int", "INLINE_SPREG", " ");
-      lf_printf(file, "spr_%s(sprs spr);\n", *attribute);
-    }
-  }
-  lf_printf(file, "\n");
-  lf_printf(file, "#endif /* _SPREG_H_ */\n");
-}
-
-
-static void
-gen_spreg_c(spreg_table *table, lf *file)
-{
-  spreg_table_entry *entry;
-  char **attribute;
-  int spreg_nr;
-
-  lf_print__gnu_copyleft(file);
-  lf_printf(file, "\n");
-  lf_printf(file, "#ifndef _SPREG_C_\n");
-  lf_printf(file, "#define _SPREG_C_\n");
-  lf_printf(file, "\n");
-  lf_printf(file, "#include \"basics.h\"\n");
-  lf_printf(file, "#include \"spreg.h\"\n");
-
-  lf_printf(file, "\n");
-  lf_printf(file, "typedef struct _spreg_info {\n");
-  lf_printf(file, "  const char *name;\n");
-  lf_printf(file, "  int is_valid;\n");
-  lf_printf(file, "  int length;\n");
-  lf_printf(file, "  int is_readonly;\n");
-  lf_printf(file, "  int index;\n");
-  lf_printf(file, "} spreg_info;\n");
-  lf_printf(file, "\n");
-  lf_printf(file, "static const spreg_info spr_info[nr_of_sprs+1] = {\n");
-  entry = table->sprs;
-  for (spreg_nr = 0; spreg_nr < nr_of_sprs+1; spreg_nr++) {
-    if (entry == NULL || spreg_nr < entry->spreg_nr)
-      lf_printf(file, "  { 0, 0, 0, 0, %d},\n", spreg_nr);
-    else {
-      lf_printf(file, "  { \"%s\", %d, %d, %d, spr_%s /*%d*/ },\n",
-		entry->name, 1, entry->length, entry->is_readonly,
-		entry->name, entry->spreg_nr);
-      entry = entry->next;
-    }
-  }
-  lf_printf(file, "};\n");
-
-  for (attribute = spreg_attributes;
-       *attribute != NULL;
-       attribute++) {
-    lf_printf(file, "\n");
-    if (strcmp(*attribute, "name") == 0) {
-      lf_print_function_type(file, "const char *", "INLINE_SPREG", "\n");
-    }
-    else {
-      lf_print_function_type(file, "int", "INLINE_SPREG", "\n");
-    }
-    lf_printf(file, "spr_%s(sprs spr)\n", *attribute);
-    lf_printf(file, "{\n");
-    if (spreg_lookup_table
-	|| strcmp(*attribute, "name") == 0
-	|| strcmp(*attribute, "index") == 0)
-      lf_printf(file, "  return spr_info[spr].%s;\n",
-		*attribute);
-    else {
-      spreg_table_entry *entry;
-      lf_printf(file, "  switch (spr) {\n");
-      for (entry = table->sprs; entry != NULL; entry = entry->next) {
-	if (strcmp(*attribute, "is_valid") == 0) {
-	  lf_printf(file, "  case %d:\n", entry->spreg_nr);
-	  /* No return -- see below.  */;
-	} else if (strcmp(*attribute, "is_readonly") == 0) {
-	  /* Since we return 0 by default, only output non-zero entries.  */
-	  if (entry->is_readonly) {
-	    lf_printf(file, "  case %d:\n", entry->spreg_nr);
-	    lf_printf(file, "    return %d;\n", entry->is_readonly);
-	  }
-	} else if (strcmp(*attribute, "length") == 0) {
-	  /* Since we return 0 by default, only output non-zero entries.  */
-	  if (entry->length) {
-	    lf_printf(file, "  case %d:\n", entry->spreg_nr);
-	    lf_printf(file, "    return %d;\n", entry->length);
-	  }
-	} else
-	  ASSERT(0);
-      }
-      /* Output a single return for is_valid.  */
-      if (strcmp(*attribute, "is_valid") == 0)
-	lf_printf(file, "    return 1;\n");
-      lf_printf(file, "  }\n");
-      lf_printf(file, "  return 0;\n");
-    }
-    lf_printf(file, "}\n");
-  }
-
-  lf_printf(file, "\n");
-  lf_printf(file, "#endif /* _SPREG_C_ */\n");
-}
-
-
-
-/****************************************************************/
-
-
-int
-main(int argc,
-     char **argv,
-     char **envp)
-{
-  lf_file_references file_references = lf_include_references;
-  spreg_table *sprs = NULL;
-  static const struct option longopts[] = { { 0 } };
-  char *real_file_name = NULL;
-  int is_header = 0;
-  int ch;
-
-  if (argc <= 1) {
-    printf("Usage: dgen ...\n");
-    printf("-s  Use switch instead of table\n");
-    printf("-n <file-name>  Use this as cpp line numbering name\n");
-    printf("-h  Output header file\n");
-    printf("-p <spreg-file>  Output spreg.h(P) or spreg.c(p)\n");
-  }
-
-  while ((ch = getopt_long (argc, argv, "hsn:r:p:", longopts, NULL))
-	 != -1)
-  {
-#if 0  /* For debugging.  */
-    fprintf(stderr, "\t-%c %s\n", ch, ( optarg ? optarg : ""));
-#endif
-    switch(ch) {
-    case 's':
-      spreg_lookup_table = 0;
-      break;
-    case 'r':
-      sprs = spreg_table_load(optarg);
-      break;
-    case 'n':
-      real_file_name = strdup(optarg);
-      break;
-    case 'h':
-      is_header = 1;
-      break;
-    case 'p':
-      {
-	lf *file = lf_open(optarg, real_file_name, file_references,
-			   (is_header ? lf_is_h : lf_is_c),
-			   argv[0]);
-	if (is_header)
-	  gen_spreg_h(sprs, file);
-	else
-	  gen_spreg_c(sprs, file);
-	lf_close(file);
-	is_header = 0;
-      }
-      real_file_name = NULL;
-      break;
-    default:
-      error("unknown option\n");
-    }
-  }
-  return 0;
-}

sim/ppc/dgen.py

@@ -0,0 +1,305 @@
+#!/usr/bin/env python3
+# Copyright (C) 1994-1995 Andrew Cagney <cagney@highland.com.au>
+# Copyright (C) 1996-2022 Free Software Foundation, Inc.
+#
+# This file is part of the GNU simulators.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+"""Helper to generate spreg.[ch] files."""
+
+import argparse
+from pathlib import Path
+import sys
+from typing import NamedTuple, TextIO
+
+
+FILE = Path(__file__).resolve()
+DIR = FILE.parent
+
+
+NR_OF_SPRS = 1024
+
+SPREG_ATTRIBUTES = (
+    "is_valid",
+    "is_readonly",
+    "name",
+    "index",
+    "length",
+)
+
+
+class Spreg(NamedTuple):
+    """A single spreg entry."""
+
+    name: str
+    reg_nr: int
+    is_readonly: int
+    length: int
+
+
+def load_table(source: Path) -> list[Spreg]:
+    """Load the spreg table & return all entries in it."""
+    ret = []
+
+    with source.open("r", encoding="utf-8") as fp:
+        for i, line in enumerate(fp):
+            line = line.split("#", 1)[0].strip()
+            if not line:
+                # Skip blank & comment lines.
+                continue
+
+            fields = line.split(":")
+            assert len(fields) == 4, f"{source}:{i}: bad line: {line}"
+            spreg = Spreg(
+                name=fields[0].lower(),
+                reg_nr=int(fields[1]),
+                is_readonly=int(fields[2]),
+                length=int(fields[3]),
+            )
+            ret.append(spreg)
+
+    return sorted(ret, key=lambda x: x[1])
+
+
+def print_copyleft(fp: TextIO) -> None:
+    """Write out the standard copyright & license file block."""
+    fp.write(
+        f"""\
+/* DO NOT EDIT: GENERATED BY {FILE.name}.
+
+   Copyright (C) 1994-1995 Andrew Cagney <cagney@highland.com.au>
+   Copyright (C) 1996-2022 Free Software Foundation, Inc.
+
+   This file is part of the GNU simulators.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+"""
+    )
+
+
+def gen_header(table: list[Spreg], output: Path) -> None:
+    """Write header to |output| from spreg |table|."""
+    with output.open("w", encoding="utf-8") as fp:
+        print_copyleft(fp)
+        fp.write(
+            """
+#ifndef _SPREG_H_
+#define _SPREG_H_
+
+typedef unsigned_word spreg;
+
+typedef enum {
+"""
+        )
+
+        for spreg in table:
+            fp.write(f"  spr_{spreg.name} = {spreg.reg_nr},\n")
+
+        fp.write(
+            f"""\
+  nr_of_sprs = {NR_OF_SPRS}
+}} sprs;
+
+"""
+        )
+
+        for attr in SPREG_ATTRIBUTES:
+            ret_type = "const char *" if attr == "name" else "int"
+            fp.write(f"INLINE_SPREG({ret_type}) spr_{attr}(sprs spr);\n")
+
+        fp.write(
+            """
+#endif /* _SPREG_H_ */
+"""
+        )
+
+
+def gen_switch_is_valid(table: list[Spreg], fp: TextIO) -> None:
+    """Generate switch table for is_valid property."""
+    fp.write("  switch (spr) {\n")
+    # Output all the known registers.  We'll return 1 for them.
+    for spreg in table:
+        fp.write(f"    case {spreg.reg_nr}:\n")
+    # All other registers return 0.
+    fp.write(
+        """\
+      return 1;
+    }
+    return 0;
+"""
+    )
+
+
+def gen_switch_is_readonly(table: list[Spreg], fp: TextIO) -> None:
+    """Generate switch table for is_readonly property."""
+    # Find any readonly registers and output a switch for them.
+    # If there aren't any, we can optimize this away to a single return.
+    output_switch = False
+    has_readonly = False
+    for spreg in table:
+        if spreg.is_readonly:
+            if not output_switch:
+                fp.write("  switch (spr) {\n")
+                output_switch = True
+            has_readonly = True
+            fp.write(f"    case {spreg.reg_nr}:\n")
+    if has_readonly:
+        fp.write("      return 1;\n")
+
+    if output_switch:
+        fp.write("  }\n")
+    fp.write("  return 0;\n")
+
+
+def gen_switch_length(table: list[Spreg], fp: TextIO) -> None:
+    """Generate switch table for length property."""
+    # Find any registers with a length property and output a switch for them.
+    # If there aren't any, we can optimize this away to a single return.
+    output_switch = False
+    for spreg in table:
+        if spreg.length:
+            if not output_switch:
+                fp.write("  switch (spr) {\n")
+                output_switch = True
+            fp.write(f"    case {spreg.reg_nr}:\n")
+            fp.write(f"      return {spreg.length};\n")
+
+    if output_switch:
+        fp.write("  }\n")
+    fp.write("  return 0;\n")
+
+
+def gen_source(table: list[Spreg], output: Path) -> None:
+    """Write header to |output| from spreg |table|."""
+    with output.open("w", encoding="utf-8") as fp:
+        print_copyleft(fp)
+        fp.write(
+            """
+#ifndef _SPREG_C_
+#define _SPREG_C_
+
+#include "basics.h"
+#include "spreg.h"
+
+typedef struct _spreg_info {
+  const char *name;
+  int is_valid;
+  int length;
+  int is_readonly;
+  int index;
+} spreg_info;
+
+static const spreg_info spr_info[nr_of_sprs+1] = {
+"""
+        )
+
+        entries = iter(table)
+        entry = next(entries)
+        for spreg_nr in range(0, NR_OF_SPRS + 1):
+            if entry is None or spreg_nr < entry.reg_nr:
+                fp.write(f"  {{ 0, 0, 0, 0, {spreg_nr} }},\n")
+            else:
+                fp.write(
+                    f'  {{ "{entry.name}", 1, {entry.length}, {entry.is_readonly}, spr_{entry.name} /*{spreg_nr}*/ }},\n'
+                )
+                entry = next(entries, None)
+        fp.write("};\n")
+
+        for attr in SPREG_ATTRIBUTES:
+            ret_type = "const char *" if attr == "name" else "int"
+            fp.write(
+                f"""
+INLINE_SPREG({ret_type}) spr_{attr}(sprs spr)
+{{
+"""
+            )
+
+            if attr not in ("index", "name"):
+                fp.write(
+                    """\
+#ifdef WITH_SPREG_SWITCH_TABLE
+"""
+                )
+                if attr == "is_valid":
+                    gen_switch_is_valid(table, fp)
+                elif attr == "is_readonly":
+                    gen_switch_is_readonly(table, fp)
+                elif attr == "length":
+                    gen_switch_length(table, fp)
+                else:
+                    assert False, f"{attr}: Unknown attribute"
+                fp.write("#else\n")
+            fp.write(f"  return spr_info[spr].{attr};\n")
+            if attr not in ("index", "name"):
+                fp.write("#endif\n")
+            fp.write("}\n")
+
+        fp.write("\n#endif /* _SPREG_C_ */\n")
+
+
+def get_parser() -> argparse.ArgumentParser:
+    """Get CLI parser."""
+    parser = argparse.ArgumentParser(
+        description=__doc__,
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+    )
+    parser.add_argument(
+        "--table",
+        type=Path,
+        default=DIR / "ppc-spr-table",
+        help="path to source table",
+    )
+    parser.add_argument("--header", type=Path, help="path to header (.h) file")
+    parser.add_argument("--source", type=Path, help="path to source (.c) file")
+    return parser
+
+
+def parse_args(argv: list[str]) -> argparse.Namespace:
+    """Process the command line & default options."""
+    parser = get_parser()
+    opts = parser.parse_args(argv)
+
+    if not opts.header and not opts.source:
+        opts.header = DIR / "spreg.h"
+        opts.source = DIR / "spreg.c"
+
+    return opts
+
+
+def main(argv: list[str]) -> int:
+    """The main entry point for scripts."""
+    opts = parse_args(argv)
+
+    table = load_table(opts.table)
+    if opts.header:
+        gen_header(table, opts.header)
+    if opts.source:
+        gen_source(table, opts.source)
+    return 0
+
+
+if __name__ == "__main__":
+    sys.exit(main(sys.argv[1:]))

sim/ppc/local.mk

@@ -30,5 +30,15 @@
 
 noinst_PROGRAMS += %D%/run %D%/psim
 
+%D%/spreg.c: @MAINT@ %D%/ppc-spr-table %D%/dgen.py %D%/$(am__dirstamp)
+	$(AM_V_GEN)$(srcdir)/%D%/dgen.py --source $@.tmp
+	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/%D%/spreg.c
+	$(AM_V_at)touch $(srcdir)/%D%/spreg.c
+
+%D%/spreg.h: @MAINT@ %D%/ppc-spr-table %D%/dgen.py %D%/$(am__dirstamp)
+	$(AM_V_GEN)$(srcdir)/%D%/dgen.py --header $@.tmp
+	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/%D%/spreg.h
+	$(AM_V_at)touch $(srcdir)/%D%/spreg.h
+
 %C%docdir = $(docdir)/%C%
 %C%doc_DATA = %D%/BUGS %D%/INSTALL %D%/README %D%/RUN

sim/ppc/options.c

@@ -155,10 +155,6 @@ print_options (void)
   printf_filtered ("IGEN_FLAGS               = %s\n", IGEN_FLAGS);
 #endif
 
-#ifdef DGEN_FLAGS
-  printf_filtered ("DGEN_FLAGS               = %s\n", DGEN_FLAGS);
-#endif
-
   {
     static const char *const defines[] = {
 #ifdef __GNUC__

sim/ppc/spreg.h

@@ -0,0 +1,108 @@
+/* DO NOT EDIT: GENERATED BY dgen.py.
+
+   Copyright (C) 1994-1995 Andrew Cagney <cagney@highland.com.au>
+   Copyright (C) 1996-2022 Free Software Foundation, Inc.
+
+   This file is part of the GNU simulators.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifndef _SPREG_H_
+#define _SPREG_H_
+
+typedef unsigned_word spreg;
+
+typedef enum {
+  spr_mq = 0,
+  spr_xer = 1,
+  spr_rtcu = 4,
+  spr_rtcl = 5,
+  spr_lr = 8,
+  spr_ctr = 9,
+  spr_dsisr = 18,
+  spr_dar = 19,
+  spr_dec = 22,
+  spr_sdr1 = 25,
+  spr_srr0 = 26,
+  spr_srr1 = 27,
+  spr_vrsave = 256,
+  spr_tbrl = 268,
+  spr_tbru = 269,
+  spr_sprg0 = 272,
+  spr_sprg1 = 273,
+  spr_sprg2 = 274,
+  spr_sprg3 = 275,
+  spr_ear = 282,
+  spr_tbl = 284,
+  spr_tbu = 285,
+  spr_pvr = 287,
+  spr_spefscr = 512,
+  spr_ibat0u = 528,
+  spr_ibat0l = 529,
+  spr_ibat1u = 530,
+  spr_ibat1l = 531,
+  spr_ibat2u = 532,
+  spr_ibat2l = 533,
+  spr_ibat3u = 534,
+  spr_ibat3l = 535,
+  spr_dbat0u = 536,
+  spr_dbat0l = 537,
+  spr_dbat1u = 538,
+  spr_dbat1l = 539,
+  spr_dbat2u = 540,
+  spr_dbat2l = 541,
+  spr_dbat3u = 542,
+  spr_dbat3l = 543,
+  spr_ummcr0 = 936,
+  spr_upmc1 = 937,
+  spr_upmc2 = 938,
+  spr_usia = 939,
+  spr_ummcr1 = 940,
+  spr_upmc3 = 941,
+  spr_upmc4 = 942,
+  spr_mmcr0 = 952,
+  spr_pmc1 = 953,
+  spr_pmc2 = 954,
+  spr_sia = 955,
+  spr_mmcr1 = 956,
+  spr_pmc3 = 957,
+  spr_pmc4 = 958,
+  spr_sda = 959,
+  spr_dmiss = 976,
+  spr_dcmp = 977,
+  spr_hash1 = 978,
+  spr_hash2 = 979,
+  spr_imiss = 980,
+  spr_icmp = 981,
+  spr_rpa = 982,
+  spr_hid0 = 1008,
+  spr_hid1 = 1009,
+  spr_iabr = 1010,
+  spr_dabr = 1013,
+  spr_l2cr = 1017,
+  spr_ictc = 1019,
+  spr_thrm1 = 1020,
+  spr_thrm2 = 1021,
+  spr_thrm3 = 1022,
+  spr_pir = 1023,
+  nr_of_sprs = 1024
+} sprs;
+
+INLINE_SPREG(int) spr_is_valid(sprs spr);
+INLINE_SPREG(int) spr_is_readonly(sprs spr);
+INLINE_SPREG(const char *) spr_name(sprs spr);
+INLINE_SPREG(int) spr_index(sprs spr);
+INLINE_SPREG(int) spr_length(sprs spr);
+
+#endif /* _SPREG_H_ */