Commit Graph

4 Commits

Author SHA1 Message Date
Jan Beulich
0655669b86 RISC-V: don't disassemble unrecognized insns as .byte
Insn width granularity being 16 bits, producing byte granular output
isn't very useful. With there being a way to specific otherwise
unknown insns to the assembler, use that same representation (to be
precise: its <length>,<encoding> flavor) for disassembly.
2023-02-03 08:20:32 +01:00
Alan Modra
d87bef3a7b Update year range in copyright notice of binutils files
The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2023-01-01 21:50:11 +10:30
Alan Modra
a2c5833233 Update year range in copyright notice of binutils files
The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.

The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
2022-01-02 12:04:28 +10:30
Andrew Burgess
6a7f57668a riscv: print .2byte or .4byte before an unknown instruction encoding
When the RISC-V disassembler encounters an unknown instruction, it
currently just prints the value of the bytes, like this:

  Dump of assembler code for function custom_insn:
     0x00010132 <+0>:	addi	sp,sp,-16
     0x00010134 <+2>:	sw	s0,12(sp)
     0x00010136 <+4>:	addi	s0,sp,16
     0x00010138 <+6>:	0x52018b
     0x0001013c <+10>:	0x9c45

My proposal, in this patch, is to change the behaviour to this:

  Dump of assembler code for function custom_insn:
     0x00010132 <+0>:	addi	sp,sp,-16
     0x00010134 <+2>:	sw	s0,12(sp)
     0x00010136 <+4>:	addi	s0,sp,16
     0x00010138 <+6>:	.4byte	0x52018b
     0x0001013c <+10>:	.2byte	0x9c45

Adding the .4byte and .2byte opcodes.  The benefit that I see here is
that in the patched version of the tools, the disassembler output can
be fed back into the assembler and it should assemble to the same
binary format.  Before the patch, the disassembler output is invalid
assembly.

I've started a RISC-V specific test file under binutils so that I can
add a test for this change.

binutils/ChangeLog:

	* testsuite/binutils-all/riscv/riscv.exp: New file.
	* testsuite/binutils-all/riscv/unknown.d: New file.
	* testsuite/binutils-all/riscv/unknown.s: New file.

opcodes/ChangeLog:

	* riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode
	before an unknown instruction, '%d' is replaced with the
	instruction length.
2021-09-20 09:45:34 +01:00