Commit Graph

8 Commits

Author SHA1 Message Date
Maciej W. Rozycki
860b03a8f3 MIPS16/opcodes: Fix PC-relative operation delay-slot adjustment
Complement commit dd8b7c222e ("MIPS: mips16e jalrc/jrc opcodes"),
<https://sourceware.org/ml/binutils/2005-07/msg00349.html>, and stop the
disassembler making a delay-slot adjustment for PC-relative operations
following either MIPS16e compact jumps, or undefined RR/J(AL)R(C)
encodings that have the `l' (link) and `ra' (source register is `ra')
bits set both at a time.  Adjust code description for accuracy.  Add a
suitable test case.

	opcodes/
	* mips-dis.c (print_mips16_insn_arg): Avoid delay-slot
	adjustment for PC-relative operations following MIPS16e compact
	jumps or undefined RR/J(AL)R(C) encodings.

	binutils/
	* testsuite/binutils-all/mips/mips16-pcrel.d: New test.
	* testsuite/binutils-all/mips/mips16-pcrel.s: New test source.
	* testsuite/binutils-all/mips/mips.exp: Run the new test.
2016-12-08 23:30:57 +00:00
Maciej W. Rozycki
1401d2fe67 MIPS/opcodes: Correct mixed MIPS16 and microMIPS disassembly
Mixing MIPS16 and microMIPS code in a single binary isn't usually
supported but GAS happily produces such code if requested.  However it
is not correctly disassembled even if a symbol table is available and
function symbols are correctly anotated with the ISA mode.  This is
because the ELF-header global microMIPS ASE flag takes precedence over
MIPS16 function annotation, causing them to be treated as regular MIPS
code.

Correct the problem by respecting function symbol anotation regardless
of the ELF-header flag.

	binutils/
	* testsuite/binutils-all/mips/mixed-mips16-micromips.d: New test.
	* testsuite/binutils-all/mips/mixed-mips16-micromips.s: New test
	source.
	* testsuite/binutils-all/mips/mips.exp: Run the new test.

	opcodes/
	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	replacing references to `micromips_ase' throughout.
	(_print_insn_mips): Don't use file-level microMIPS annotation to
	determine the disassembly mode with the symbol table.
2016-05-18 13:07:24 +01:00
Maciej W. Rozycki
92708ceca5 MIPS/opcodes: Fix undecoded MIPS16 extended instruction bit disassembly
Correct the disassembly of hardware don't cares in MIPS16 extended
instructions.  Rather than e.g.:

   0:	f008 0231 	addiu	v0,sp,16433
   4:	f520 3260 	sll	v0,v1,-12

print:

   0:	f008 0231 	addiu	v0,sp,16401
   4:	f520 3260 	sll	v0,v1,20

respectively instead.

	opcodes/
	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

	binutils/
	* testsuite/binutils-all/mips/mips16-undecoded.d: New test.
	* testsuite/binutils-all/mips/mips16-undecoded.s: New test
	source.
	* testsuite/binutils-all/mips/mips.exp: Run the new test.
2016-04-11 18:01:18 +01:00
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Maciej W. Rozycki
ed187aa442 * binutils-all/mips/mixed-mips16.s: Add missing stack adjustment.
* binutils-all/mips/mixed-mips16.d: Update accordingly.
2013-02-14 23:48:18 +00:00
Maciej W. Rozycki
5417f71edb opcodes/
* mips-dis.c (is_compressed_mode_p): Only match symbols from the
	section disassembled.

	binutils/testsuite/
	* binutils-all/mips/mixed-micromips.d: New test.
	* binutils-all/mips/mixed-mips16.d: New test.
	* binutils-all/mips/mixed-micromips.s: New test source.
	* binutils-all/mips/mixed-mips16.s: New test source.
	* binutils-all/mips/mips.exp: New file.
2013-02-13 17:09:09 +00:00