Commit Graph

125 Commits

Author SHA1 Message Date
Mike Frysinger
cc67f780ec sim: info: convert verbose field to a bool
The verbose argument has always been an int treated as a bool, so
convert it to an explicit bool.  Further, update the API docs to
match the reality that the verbose value is actually used by some
of the internal modules.
2023-01-18 20:47:55 -05:00
Mike Frysinger
da8c966399 sim: assume sys/stat.h always exists (via gnulib)
We have many uses of sys/stat.h that are unprotected by HAVE_SYS_STAT_H,
so this is more formalizing the reality that we require this header.
Since we switched to gnulib, it guarantees that a sys/stat.h exists
for us to include, so we're doubly OK.
2023-01-16 04:42:47 -05:00
Mike Frysinger
883be19774 sim: cpu: change default init to handle all cpus
All the runtimes were only initializing a single CPU.  When SMP is
enabled, things quickly crash as none of the other CPU structs are
setup.  Change the default from 0 to the compile time value.
2022-12-25 02:10:46 -05:00
Mike Frysinger
758f5a9875 sim: h8300: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
2022-12-23 08:32:58 -05:00
Mike Frysinger
63fd5b5dda sim: switch sim_{read,write} APIs to 64-bit all the time [PR sim/7504]
We've been using SIM_ADDR which has always been 32-bit.  This means
the upper 32-bit address range in 64-bit sims is inaccessible.  Use
64-bit addresses all the time since we want the APIs to be stable
regardless of the active arch backend (which can be 32 or 64-bit).

The length is also 64-bit because it's completely feasible to have
a program that is larger than 4 GiB in size/image/runtime.  Forcing
the caller to manually chunk those accesses up into 4 GiB at a time
doesn't seem useful to anyone.

Bug: https://sourceware.org/PR7504
2022-12-22 19:29:24 -05:00
Mike Frysinger
3fbdc6f908 sim: h8300: invert sim_cpu storage 2022-12-21 00:00:01 -05:00
Mike Frysinger
d026e67ed4 sim: move register headers into sim/ namespace [PR sim/29869]
These headers define the register numbers for each port to implement
the sim_fetch_register & sim_store_register interfaces.  While gdb
uses these, the APIs are part of the sim, not gdb.  Move the headers
out of the gdb/ include namespace and into sim/ instead.
2022-12-20 21:06:32 -05:00
Mike Frysinger
e4f2bc9c05 sim: h8300: switch to cpu for state
Rather than rely on pulling out the first cpu from the sim state
for cpu state, pass down the active cpu that's already available.
2022-11-02 20:57:20 +05:45
Mike Frysinger
ee1cffd388 sim: common: change sim_{fetch,store}_register helpers to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense.  Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
2022-11-02 20:31:10 +05:45
Mike Frysinger
5bab16fdf1 sim: reg: constify store helper
These functions only read from memory, so mark the pointer as const.
2022-10-31 21:24:39 +05:45
Mike Frysinger
5b94c38081 sim: common: change sim_read & sim_write to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense.  Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
2022-10-31 21:24:39 +05:45
Andrew Burgess
da8b81754b sim/h8300: avoid self assignment
There are two places in the h8300 simulator where we assign a variable
to itself.  Clang gives a warning for this, which is converted into an
error by -Werror.

Silence the warning by removing the self assignments.  As these
assignments were in a complex if/then/else tree, rather than try to
adjust all the conditions, I've just replaced the self assignments
with a comment and an empty statement.
2022-10-24 17:23:47 +01:00
Jeff Law
dbf98db6f0 Fix intermittent failures on the H8, particularly H8/SX tests.
The upstream GCC tester has  showed spurious execution failures on the
    H8 target for the H8/SX multilibs. I suspected memory corruption or an
    uninitialized variable early as the same binary would sometimes work and
    sometimes it got the wrong result. Worse yet, the point where the test
    determined it was getting the wrong result would change.

    Because it only happened on the H8/SX variant I was able to zero in on
    the "mova" support and the "short form" of those instructions in particular.

    As the code stands it checks if code->op3.type == 0 to try and identify cases
    where op3 wasn't filled in and thus we've got the short form of the mova
    instruction.

    But for the short-form of those instructions we never set any of the "op3"
    data structure. We get whatever was lying around -- it's usually zero and
     thus things usually work, but if the stale data was nonzero, then we'd
    fail to recognize the instruction as a short-form and fail to set up the
    various fields appropriately.

    I initially initialized the op3.type field to zero, but didn't like that
     because it was inconsistent with how other operands were initialized.
    Bringing consistency meant using -1 as the initializer value and adjusting
    the check for short form mova appropriately.

    I've had this in the upstream GCC tester for perhaps a year at this point
    and haven't seen any of the intermittent failures again.
2021-11-20 13:06:15 -05:00
Mike Frysinger
e8f20a28b1 sim: split program path out of argv vector
We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program.  Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.

So let's split the path to the program to run out into a separate
field by itself.  This simplifies the various sim_open funcs too.

By itself, this code is more of a logical cleanup than something that
is super useful.  But it will open up customization of argv[0] in a
follow up commit.  Split the changes to make it easier to review.
2021-11-15 02:53:29 -05:00
Mike Frysinger
1fef66b0dc sim: split sim-signal.h include out
The sim-basics.h is too big and includes too many things.  This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
2021-06-18 00:50:14 -04:00
Mike Frysinger
f9a4d54332 sim: overhaul & unify endian settings management
The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified).  If none are specified, the arch is
expected to support both, and the value will be probed based on the
user runtime options or the input program.

Only two arches today set the default value (bpf & mips).  We can
probably let this go as it only shows up in one scenario: the sim
is invoked, but with no inputs, and no user endian selection.  This
means bpf will not behave like the other arches: an error is shown
and forces the user to make a choice.  If an input program is used
though, we'll still switch the default to that.  This allows us to
remove the WITH_DEFAULT_TARGET_BYTE_ORDER setting.

For the ports that set a "wire" endian, move it to the runtime init
of the respective sim_open calls.  This allows us to change the
WITH_TARGET_BYTE_ORDER to purely a user-selected configure setting
if they want to force a specific endianness.

With all the endian logic moved to runtime selection, we can move
the configure call up to the common dir so we only process it once
across all ports.

The ppc arch was picking the wire endian based on the target used,
but since we weren't doing that for other biendian arches, we can
let this go too.  We'll rely on the input selecting the endian, or
make the user decide.
2021-06-17 23:20:13 -04:00
Mike Frysinger
ef5058ae87 sim: split sim/callback.h include out
The sim-basics.h is too big and includes too many things.  This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.

Start with splitting out sim/callback.h.
2021-06-17 00:11:48 -04:00
Yoshinori Sato
0ef4c3f83b sim: h8300 Fixed different behavior in preinc/predec.
* sim-main.h (h8_typecodes): Add operand type OP_REG_DEC, OP_REG_INC.
* compile.c (decode): Rewrite oprand type for specific case.
(fetch_1): Add handling OP_REG_DEC and OP_REG_INC.
(step_once): Fix operand fetch order.
2021-05-28 21:14:24 +09:00
Mike Frysinger
2ad10cb222 sim: h8300: invert sim_state storage 2021-05-17 01:01:08 -04:00
Mike Frysinger
6df01ab8ab sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h
headers.  For now, it's just config.h, but we'll add more when we
integrate gnulib in.

This header should be used instead of config.h, and should be the
first include in every .c file.  We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h.  We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way.  Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
2021-05-16 22:38:41 -04:00
Mike Frysinger
bb608f811b sim: h8300: clean up various warnings
A random grab bag of minor fixes to enable -Werror for this port.

Disable h8_set_macS for now as it's unused.
Initialize trace & intMask before using them.
Mark local set_h8300h function static.
2021-05-08 12:43:06 -04:00
Mike Frysinger
d5a71b1131 sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code
Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.
2021-04-12 00:14:32 -04:00
Tom Tromey
06a88b3b39 Avoid sequence point warning in h8300 sim
GCC gives a -Wsequence-point warning for this code in the h8300 sim.
The bug is that memory_size is both assigned and used in the same
expression.  The fix is to assign after the print.

sim/h8300/ChangeLog
2021-04-08  Tom Tromey  <tom@tromey.com>

	* compile.c (init_pointers): Fix sequence point warning.
2021-04-08 15:15:59 -06:00
Tom Tromey
81e6e8ae40 Do not use old-style definitions in sim
This changes all the non-generated (hand-written) code in sim to use
"new" (post-K&R) style function definitions.

2021-04-08  Tom Tromey  <tom@tromey.com>

	* bpf.c (bpf_def_model_init): Use new-style declaration.

sim/common/ChangeLog
2021-04-08  Tom Tromey  <tom@tromey.com>

	* cgen-utils.c (RORQI, ROLQI, RORHI, ROLHI, RORSI, ROLSI): Use
	new-style declaration.

sim/erc32/ChangeLog
2021-04-08  Tom Tromey  <tom@tromey.com>

	* sis.c (run_sim, main): Use new-style declaration.
	* interf.c (run_sim, sim_open, sim_close, sim_load)
	(sim_create_inferior, sim_store_register, sim_fetch_register)
	(sim_info, sim_stop_reason, flush_windows, sim_do_command): Use
	new-style declaration.
	* help.c (usage, gen_help): Use new-style declaration.
	* func.c (batch, set_regi, set_rega, disp_reg, limcalc)
	(reset_stat, show_stat, init_bpt, int_handler, init_signals)
	(disp_fpu, disp_regs, disp_ctrl, disp_mem, dis_mem, event)
	(init_event, set_int, advance_time, now, wait_for_irq, check_bpt)
	(reset_all, sys_reset, sys_halt): Use new-style declaration.
	* float.c (get_accex, clear_accex, set_fsr): Use new-style
	declaration.
	* exec.c (sub_cc, add_cc, log_cc, dispatch_instruction, fpexec)
	(chk_asi, execute_trap, check_interrupts, init_regs): Use
	new-style declaration.
	* erc32.c (init_sim, reset, decode_ersr, mecparerror)
	(error_mode, decode_memcfg, decode_wcr, decode_mcr, sim_halt)
	(close_port, exit_sim, mec_reset, mec_intack, chk_irq, mec_irq)
	(set_sfsr, mec_read, mec_write, init_stdio, restore_stdio)
	(port_init, read_uart, write_uart, flush_uart, uarta_tx)
	(uartb_tx, uart_rx, uart_intr, uart_irq_start, wdog_intr)
	(wdog_start, rtc_intr, rtc_start, rtc_counter_read)
	(rtc_scaler_set, rtc_reload_set, gpt_intr, gpt_start)
	(gpt_counter_read, gpt_scaler_set, gpt_reload_set, timer_ctrl)
	(memory_read, memory_write, get_mem_ptr, sis_memory_write)
	(sis_memory_read): Use new-style declaration.

sim/frv/ChangeLog
2021-04-08  Tom Tromey  <tom@tromey.com>

	* sim-if.c (sim_open, frv_sim_close, sim_create_inferior): Use
	new-style declaration.

sim/h8300/ChangeLog
2021-04-08  Tom Tromey  <tom@tromey.com>

	* compile.c (cmdline_location): Use new-style declaration.

sim/iq2000/ChangeLog
2021-04-08  Tom Tromey  <tom@tromey.com>

	* sim-if.c (sim_open, sim_create_inferior): Use new-style
	declaration.
	* iq2000.c (fetch_str): Use new-style declaration.

sim/lm32/ChangeLog
2021-04-08  Tom Tromey  <tom@tromey.com>

	* sim-if.c (sim_open, sim_create_inferior): Use new-style
	declaration.

sim/m32r/ChangeLog
2021-04-08  Tom Tromey  <tom@tromey.com>

	* sim-if.c (sim_open, sim_create_inferior): Use new-style
	declaration.
2021-04-08 14:34:42 -06:00
Mike Frysinger
54780889e9 sim: h8300: drop separate eightbit memory buffer
The h8300 sim has its own implementation for memory handling that I'd
like to replace with the common sim memory code.  However, it's got a
weird bit of code it calls "eightbit mem" that makes this not as easy
as it would otherwise be.  The code has this comment:
/* These define the size of main memory for the simulator.

   Note the size of main memory for the H8/300H is only 256k.  Keeping it
   small makes the simulator run much faster and consume less memory.

   The linker knows about the limited size of the simulator's main memory
   on the H8/300H (via the h8300h.sc linker script).  So if you change
   H8300H_MSIZE, be sure to fix the linker script too.

   Also note that there's a separate "eightbit" area aside from main
   memory.  For simplicity, the simulator assumes any data memory reference
   outside of main memory refers to the eightbit area (in theory, this
   can only happen when simulating H8/300H programs).  We make no attempt
   to catch overlapping addresses, wrapped addresses, etc etc.  */

I've read the H8/300 Programming Manual and the H8/300H Software Manual
and can't find documentation on it.  The closest I can find is the bits
about the exception vectors, but that sounds like a convention where the
first 256 bytes of memory are used for a special purpose.  The sim will
actually allocate a sep memory buffer of 256 bytes and you address it by
accessing anywhere outside of main memory.  e.g. I would expect code to
access it like:
	uint32_t *data = (void *)0;
	data[0] = reset_exception_vector;
not like the sim expects like:
	uint8_t *data = (void *)0x1000000;
	data[0] = ...;

The gcc manual has an "eightbit_data" attribute:
	Use this attribute on the H8/300, H8/300H, and H8S to indicate that
	the specified variable should be placed into the eight-bit data
	section. The compiler generates more efficient code for certain
	operations on data in the eight-bit data area. Note the eight-bit
	data area is limited to 256 bytes of data.

And the gcc code implies that it's accessed via special addressing:
   eightbit_data: This variable lives in the 8-bit data area and can
   be referenced with 8-bit absolute memory addresses.

I'm fairly certain these are referring to the 8-bit addressing modes
that allow access to 0xff00 - 0xffff with only an 8-bit immediate.
They aren't completely separate address spaces which this eightbit
memory buffer occupies.

But the sim doesn't access its eightbit memory based on specific insns,
it does it purely on the addresses requested.

Unfortunately, much of this code was authored by Michael Snyder, so I
can't ask him :(.  I asked Renesas support and they didn't know:
https://renesasrulz.com/the_vault/f/archive-forum/6952/question-about-eightbit-memory

So I've come to the conclusion that this was a little sim-specific hack
done for <some convenience> and has no relation to real hardware.  And
as such, let's drop it until someone notices and can provide a reason
for why we need to support it.
2021-01-13 21:54:00 -05:00
Mike Frysinger
68ed285428 sim: clean up C11 header includes
Since we require C11 now, we can assume many headers exist, and
clean up all of the conditional includes.  It's not like any of
this code actually accounted for the headers not existing, just
whether we could include them.

The strings.h cleanup is a little nuanced: it isn't in C11, but
every use of it in the codebase will include strings.h only if
string.h doesn't exist.  Since we now assume the C11 string.h
exists, we'll never include strings.h, so we can delete it.
2021-01-11 08:05:54 -05:00
Mike Frysinger
bfc7d04afb sim: h8300: delete opcode caching
This is in preparation for converting h8300 over to the common memory
framework.  It's not clear how much of a speed gain this was providing
in the first place -- a naive test of ~400k insns (using shlr.s) shows
that this code actually slowed things down a bit.

If anyone really cares about h8300 anymore, they can migrate to the
common insn caching logic.
2021-01-07 12:21:12 -05:00
Mike Frysinger
2e3d4f4d5d sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly
2016-01-03  Mike Frysinger  <vapier@gentoo.org>

	* sim-options.c (sim_parse_args): Mark argv array const.
	* sim-options.h (sim_parse_args): Likewise.
2016-01-06 21:48:59 -05:00
Mike Frysinger
77cf2ef5dc sim: parse_args: display getopt error ourselves
Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed.  Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
2016-01-03 22:07:39 -05:00
Mike Frysinger
cec99e6b2c sim: h8300: inline sim_state_initialize
All the state is handled already by the common cpu allocation which
zeros out the entire state.
2015-12-30 06:05:02 -05:00
Mike Frysinger
2a2757ac7e sim: h8300: simplify h8300_reg_{fetch,store} funcs
We can leverage the cpu->regs array rather than going through the
function helpers to get nice compact code.

Further, fix up the return values: return -1 when we can't find a
register (and let the caller write out warnings), return 2/4 when
we actually write out that amount, and handle the zero reg.
2015-12-30 06:02:27 -05:00
Mike Frysinger
4ca9d09e82 sim: h8300: switch to common sim-resume 2015-12-30 05:27:18 -05:00
Mike Frysinger
5658c2571f sim: h8300: move default endian/alignment to configure 2015-12-30 05:20:41 -05:00
Mike Frysinger
e1211e5506 sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to common sim_{fetch,store}_register 2015-12-30 03:30:25 -05:00
Mike Frysinger
c78dff2291 sim: h8300: move unused/buggy lregs array
This array isn't used anywhere, and the init phase actually corrupts
some memory because the array has 18 elements but tries to set the
19th (ZERO) position.
2015-12-30 03:30:23 -05:00
Mike Frysinger
bd3fb5b8fb sim: h8300: move h8300-specific options out of common code
Register the options in sim_open like other arches to avoid having to hack
up the common modules.
2015-12-24 20:11:26 -05:00
Mike Frysinger
c1fc4b4d17 sim: h8300: delete global callback/kind/name
We can use the sim state everywhere now to get these values on the fly.
2015-11-22 00:53:23 -05:00
Mike Frysinger
8ae8f9c382 sim: h8300: convert to common sim_{reason,stop}
This ends up being pretty easy as the h8300 port already supports
much of the common engine core.
2015-11-15 08:15:04 -05:00
Mike Frysinger
6e4f085c7f sim: sim-close: unify sim_close logic
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did.  Now we have a single module that takes care of
all the logic for us.

Most of the non-cgen based ones could be deleted outright.  The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.

We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
2015-11-15 02:30:19 -05:00
Mike Frysinger
5697b730e2 sim: h8300: drop unused littleendian variable 2015-11-10 00:07:22 -05:00
Mike Frysinger
27b97b40bc sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpers
This makes the common sim-cpu logic work.
2015-04-17 02:22:16 -04:00
Mike Frysinger
f95f4ed2c4 sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu state
This sets up the sim_state structure and the cpu member to match what we
do in most other sims, and what the common code suggests.  This is a step
to unifying on the sim-cpu.o object.
2015-04-15 01:25:32 -04:00
Mike Frysinger
523ba8f92e sim: erc32/h8300/m68hc11: trim unused functions
These funcs are only used with the old run.o, and these sims use nrun.o,
so drop these stub funcs.
2015-03-24 00:48:40 -04:00
Joel Brobecker
2d7bb7580a callback.h:struct host_callback_struct compilation error on Windows hosts.
On Windows, a recent gnulib update imported the lstat module, and
this caused a remote-sim.c build failure in struct host_callback_struct:

    In file included from /[...]/gdb/remote-sim.c:34:0:
    /[...]/gdb/../include/gdb/callback.h:93:9: error: duplicate member '_stati64'
       int (*lstat) (host_callback *, const char *, struct stat *);
             ^
What happens it that gnulib's stat.h makes the following defines:

     /* Large File Support on native Windows.  */
     #if 1
     # define stat _stati64
     #endif

and then:

    #if 1
    # if ! 0
    /* mingw does not support symlinks, therefore it does not have lstat.  But
       without links, stat does just fine.  */
    #  if !(defined __cplusplus && defined GNULIB_NAMESPACE)
    #   define lstat stat
    #  endif

So, the following fields in struct host_callback_struct...

      int (*stat) (host_callback *, const char *, struct stat *);
      int (*fstat) (host_callback *, int, struct stat *);
      int (*lstat) (host_callback *, const char *, struct stat *);

... get translated to...

      int (*_stati64) (host_callback *, const char *, struct _stati64 *);
      int (*_fstati64) (host_callback *, int, struct _stati64 *);
      int (*_stati64) (host_callback *, const char *, struct _stati64 *);

... which causes two fields to have the same name.

This patch fixes the issue by renaming the stat-related fields
by adding a "to_" prefix, similar to what is done in GDB's
target_ops vector.

include/gdb/ChangeLog:

	* callback.h (struct host_callback_struct) <to_stat>: Renamed
	from "stat".
	<to_fstat>: Renamed from "fstat".
	<to_lstat>: Renamed from "lstat".

sim/common/ChangeLog:

	* sim-io.c (sim_io_stat, sim_io_fstat): Adjust calls to "stat"
	and "fstat" callbacks by calls to "to_stat" and "to_fstat" (resp)
	callbacks following renaming in callback.h.
	* syscall.c (cb_syscall): Likewise.  Adjust calls to "lstat"
	callback by call to "to_lstat" callback

sim/cris/ChangeLog:

	* traps.c (cris_break_13_handler): Adjust call to "fstat" callback
	by call to "to_fstat" following renaming in callback.h.

sim/h8300/ChangeLog:

	* compile.c (sim_resume):  Adjust calls to "stat" and "fstat"
	callbacks by calls to "to_stat" and "to_fstat" (resp) callbacks
	following renaming in callback.h.
2014-12-03 13:43:08 +04:00
Mike Frysinger
b2b255bdf3 sim: constify prog_name
There's no need for the prog_name handed down to the core to be mutable,
so add const markings to it and all the related funcs.
2014-03-05 01:42:44 -05:00
Mike Frysinger
ef3e8cf7d1 sim: delete duplicate SIGINT handling
Many of the simulators change the SIGINT handler.
E.g., moxie/interp.c:

  sigsave = signal (SIGINT, interrupt);

However, this is unnecessary.
remote-sim.h already provides an API for asynchronously stopping
a sim; and both gdb and the drivers (run.c and nrun.c at least,
I didn't check the others) install a SIGINT handler which
calls this method.

URL: https://sourceware.org/bugzilla/show_bug.cgi?id=16450
Reported-by: Tom Tromey <tromey@redhat.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-02-17 18:32:45 -05:00
Nick Clifton
a6ff997ce8 PR 14072
* wrapper.c: Include config.h before system header files.

	* callback.c: Include config.h before system header files.
	* cgen-trace.c: Likewise.
	* cgen-utils.c: Likewise.
	* gentmap.c: Likewise.

	* sim-if.c: Include config.h before system header files.

	* compile.c: Include config.h before system header files.
	* sim-main.h: Likewise.

	* gdb-if.c: Include config.h before system header files.
	* load.c: Likewise.
	* syscalls.c: Likewise.
	* trace.c: Likewise.

	* interp.c: Include config.h before system header files.
2012-05-19 16:46:16 +00:00
Mike Frysinger
2419798b80 sim: start a unified sim_do_command
Since sim_do_command for many people simply calls sim_args_command, start
a unified version of it.  For people who handle their own options, they
could switch to this by using sim_add_option_table instead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-05 19:06:38 +00:00
Andrew Burgess
dae477fed8 http://sourceware.org/ml/gdb-patches/2010-11/msg00112.html
gdb/ChangeLog
	* remote-sim.c (gdbsim_store_register): Update API to
	sim_store_register to check more error conditions.
include/gdb/ChangeLog
	* remote-sim.h (sim_store_register): Update the API
	documentation for this function.
sim/erc32/ChangeLog
sim/h8300/ChangeLog
sim/m32c/ChangeLog
sim/mn10300/ChangeLog
sim/ppc/ChangeLog
sim/rx/ChangeLog
sim/v850/ChangeLog
	* ???.c (sim_store_register): Update return value to
	match new API.
2011-01-11 14:19:34 +00:00
Mike Frysinger
5558e7e691 sim: constify sim_write source buffer (part 2)
As pointed out by Sandra Loosemore, a bunch of targets define sim_write
themselves instead of using the common/ code.  So constify them too.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-04-14 07:38:06 +00:00