Commit Graph

267 Commits

Author SHA1 Message Date
H.J. Lu
014ae6af49 Remove NaCl/arm target support
NaCl has been deprecated:

https://developer.chrome.com/docs/native-client/migration/

It is now in the process of being removed from llvm:

https://github.com/llvm/llvm-project/pull/133661

Remove NaCl/arm target support from bfd, binutils, gas and ld.

bfd/

	* Makefile.am (BFD32_BACKENDS): Remove elf-nacl.lo.
	(BFD32_BACKENDS_CFILES): Remove elf-nacl.c.
	(SOURCE_HFILES): Remove elf-nacl.h.
	* Makefile.in: Regenerated.
	* config.bfd: Add *-*-nacl* to obsolete targets.
	Remove *-*-nacl* targets.
	* configure.ac: Remove nacl target vectors.
	* elf-bfd.h (elf_target_os): Remove is_nacl.
	* elf-nacl.c: Removed.
	* elf-nacl.h: Likewise.
	* elf32-arm.c: Don't include "elf-nacl.h".
	(elf32_arm_nacl_plt0_entry): Removed.
	(elf32_arm_nacl_plt_entry): Likewise.
	(elf32_arm_stub_long_branch_arm_nacl): Likewise.
	(elf32_arm_stub_long_branch_arm_nacl_pic): Likewise.
	(arm_movw_immediate): Likewise.
	(arm_movt_immediate): Likewise.
	(arm_nacl_put_plt0): Likewise.
	(elf32_arm_nacl_link_hash_table_create): Likewise.
	(elf32_arm_nacl_modify_segment_map): Likewise.
	(elf32_arm_nacl_final_write_processing): Likewise.
	(elf32_arm_nacl_plt_sym_val): Likewise.
	(elf32_arm_stub_cmse_branch_thumb_only): Remove
	long_branch_arm_nacl and long_branch_arm_nacl_pic entries.
	(arm_type_of_stub): Updated.
	(elf32_arm_create_or_find_stub_sec): Likewise.
	(arm_stub_required_alignment): Likewise.
	(elf32_arm_allocate_plt_entry): Likewise.
	(elf32_arm_populate_plt_entry): Likewise.
	(elf32_arm_finish_dynamic_sections): Likewise.
	(elf32_arm_output_plt_map_1): Likewise.
	(elf32_arm_output_arch_local_syms): Likewise.
	Remove elf32_arm_nacl_bed.
	* targets.c: Remove NaCl target vectors.
	* bfd-in2.h: Regenerated.
	* configure: Likewise.
	* po/SRC-POTFILES.in: Likewise.

binutils/

	* NEWS: Mention NaCl target support removal.
	* testsuite/lib/binutils-common.exp: Remove NaCl target support.

gas/

	* NEWS: Mention NaCl target support removal.
	* configure.tgt: Likewise.
	* config/tc-arm.c: Remove NaCl target support.
	* testsuite/gas/arm/any-armv8m.d: Likewise.
	* testsuite/gas/arm/any-cmse-main.d: Likewise.
	* testsuite/gas/arm/any-cmse.d: Likewise.
	* testsuite/gas/arm/any-idiv.d: Likewise.
	* testsuite/gas/arm/arch4t-eabi.d: Likewise.
	* testsuite/gas/arm/arch4t.d: Likewise.
	* testsuite/gas/arm/armv8m.base-idiv.d: Likewise.
	* testsuite/gas/arm/armv9-a_arch.d: Likewise.
	* testsuite/gas/arm/attr-abi-hardfp-use-0.d: Likewise.
	* testsuite/gas/arm/attr-abi-hardfp-use-1.d: Likewise.
	* testsuite/gas/arm/attr-abi-hardfp-use-2.d: Likewise.
	* testsuite/gas/arm/attr-abi-hardfp-use-3.d: Likewise.
	* testsuite/gas/arm/attr-any-armv4t.d: Likewise.
	* testsuite/gas/arm/attr-any-thumbv6.d: Likewise.
	* testsuite/gas/arm/attr-arch-assumption.d: Likewise.
	* testsuite/gas/arm/attr-cpu-directive.d: Likewise.
	* testsuite/gas/arm/attr-default.d: Likewise.
	* testsuite/gas/arm/attr-empty-string.d: Likewise.
	* testsuite/gas/arm/attr-ext-fpv5-d16.d: Likewise.
	* testsuite/gas/arm/attr-ext-fpv5.d: Likewise.
	* testsuite/gas/arm/attr-ext-idiv.d: Likewise.
	* testsuite/gas/arm/attr-ext-mp.d: Likewise.
	* testsuite/gas/arm/attr-ext-neon-fp16.d: Likewise.
	* testsuite/gas/arm/attr-ext-neon-vfpv3.d: Likewise.
	* testsuite/gas/arm/attr-ext-neon-vfpv4.d: Likewise.
	* testsuite/gas/arm/attr-ext-sec.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv3-d16-fp16.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv3-d16.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv3-fp16.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv3.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv3xd-fp.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv3xd.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv4-d16.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv4-sp-d16.d: Likewise.
	* testsuite/gas/arm/attr-ext-vfpv4.d: Likewise.
	* testsuite/gas/arm/attr-march-all.d: Likewise.
	* testsuite/gas/arm/attr-march-armv1.d: Likewise.
	* testsuite/gas/arm/attr-march-armv2.d: Likewise.
	* testsuite/gas/arm/attr-march-armv2a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv2s.d: Likewise.
	* testsuite/gas/arm/attr-march-armv3.d: Likewise.
	* testsuite/gas/arm/attr-march-armv3m.d: Likewise.
	* testsuite/gas/arm/attr-march-armv4.d: Likewise.
	* testsuite/gas/arm/attr-march-armv4t.d: Likewise.
	* testsuite/gas/arm/attr-march-armv4txm.d: Likewise.
	* testsuite/gas/arm/attr-march-armv4xm.d: Likewise.
	* testsuite/gas/arm/attr-march-armv5.d: Likewise.
	* testsuite/gas/arm/attr-march-armv5t.d: Likewise.
	* testsuite/gas/arm/attr-march-armv5te.d: Likewise.
	* testsuite/gas/arm/attr-march-armv5tej.d: Likewise.
	* testsuite/gas/arm/attr-march-armv5texp.d: Likewise.
	* testsuite/gas/arm/attr-march-armv5txm.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6-m.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6j.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6k.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6kt2.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6kz.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6kzt2.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6t2.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6z.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
	* testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-a+idiv.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-m.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7-r.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7em.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7m.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7r.d: Likewise.
	* testsuite/gas/arm/attr-march-armv7ve.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-a+crypto.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-a+rdma.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-r+crypto.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-r+fp.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-r+simd.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8-r.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8_1-a+simd.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8_1-m.main.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8_4-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8_5-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8_6-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8_7-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8_8-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8_9-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv9_1-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv9_2-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv9_3-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv9_4-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv9_5-a.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8m.base.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8m.main.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.
	* testsuite/gas/arm/attr-march-iwmmxt.d: Likewise.
	* testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise.
	* testsuite/gas/arm/attr-march-xscale.d: Likewise.
	* testsuite/gas/arm/attr-mcpu.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
	* testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
	* testsuite/gas/arm/attr-names.d: Likewise.
	* testsuite/gas/arm/attr-non-null-terminated-string.d: Likewise.
	* testsuite/gas/arm/attr-order.d: Likewise.
	* testsuite/gas/arm/attr-override-cpu-directive.d: Likewise.
	* testsuite/gas/arm/attr-override-mcpu.d: Likewise.
	* testsuite/gas/arm/bl-local-2.d: Likewise.
	* testsuite/gas/arm/bl-local-v4t.d: Likewise.
	* testsuite/gas/arm/blx-local.d: Likewise.
	* testsuite/gas/arm/branch-reloc.d: Likewise.
	* testsuite/gas/arm/directives.d: Likewise.
	* testsuite/gas/arm/got_prel.d: Likewise.
	* testsuite/gas/arm/mapdir.d: Likewise.
	* testsuite/gas/arm/mapmisc.d: Likewise.
	* testsuite/gas/arm/mapsecs.d: Likewise.
	* testsuite/gas/arm/mapshort-eabi.d: Likewise.
	* testsuite/gas/arm/mov-highregs-any.d: Likewise.
	* testsuite/gas/arm/mov-lowregs-any.d: Likewise.
	* testsuite/gas/arm/note-march-armv2.d: Likewise.
	* testsuite/gas/arm/note-march-armv2a.d: Likewise.
	* testsuite/gas/arm/note-march-armv3.d: Likewise.
	* testsuite/gas/arm/note-march-armv3m.d: Likewise.
	* testsuite/gas/arm/note-march-armv4.d: Likewise.
	* testsuite/gas/arm/note-march-armv4t.d: Likewise.
	* testsuite/gas/arm/note-march-armv5.d: Likewise.
	* testsuite/gas/arm/note-march-armv5t.d: Likewise.
	* testsuite/gas/arm/note-march-armv5te.d: Likewise.
	* testsuite/gas/arm/note-march-iwmmxt.d: Likewise.
	* testsuite/gas/arm/note-march-iwmmxt2.d: Likewise.
	* testsuite/gas/arm/note-march-xscale.d: Likewise.
	* testsuite/gas/arm/pr12198-1.d: Likewise.
	* testsuite/gas/arm/pr12198-2.d: Likewise.
	* testsuite/gas/arm/thumb-eabi.d: Likewise.
	* testsuite/gas/arm/thumb.d: Likewise.
	* testsuite/gas/arm/thumbrel.d: Likewise.
	* config/te-nacl.h: Removed.

ld/

	* Makefile.am (ALL_EMULATION_SOURCES): Remove earmelf_nacl.c and
	and earmelfb_nacl.c.
	Remove NaCl dep files.
	* NEWS: Mention NaCl target support removal.
	* configure.tgt: Remove NaCl target support.
	* Makefile.in: Regenerated.
	* configure: Likewise.
	* po/BLD-POTFILES.in: Likewise.
	* emulparams/armelf_nacl.sh: Removed.
	* emulparams/armelfb_nacl.sh: Likewise.
	* emulparams/elf_nacl.sh: Likewise.
	* testsuite/ld-arm/farcall-arm-nacl-pic.d: Likewise.
	* testsuite/ld-arm/farcall-arm-nacl.d: Likewise.
	* testsuite/ld-arm/farcall-data-nacl.d: Likewise.
	* testsuite/ld-arm/farcall-thumb2-purecode-consecutive-veneer.d:
	Adjusted.
	* testsuite/ld-arm/arm-elf.exp: Remove NaCl target support.
	* testsuite/ld-arm/cortex-a8-far.d: Likewise.
	* testsuite/ld-arm/non-contiguous-arm3.d: Likewise.
	* testsuite/ld-arm/non-contiguous-arm6.d: Likewise.
	* testsuite/ld-elf/binutils.exp: Likewise.
	* testsuite/ld-elf/build-id.exp: Likewise.
	* testsuite/ld-elf/ehdr_start-missing.d: Likewise.
	* testsuite/ld-elf/ehdr_start-shared.d: Likewise.
	* testsuite/ld-elf/ehdr_start-userdef.d: Likewise.
	* testsuite/ld-elf/ehdr_start-weak.d: Likewise.
	* testsuite/ld-elf/ehdr_start.d: Likewise.
	* testsuite/ld-elf/elf.exp: Likewise.
	* testsuite/ld-elf/export-class.exp: Likewise.
	* testsuite/ld-elf/fatal-warnings-1a.d: Likewise.
	* testsuite/ld-elf/fatal-warnings-1b.d: Likewise.
	* testsuite/ld-elf/orphan-region.d: Likewise.
	* testsuite/ld-elf/package-note.exp: Likewise.
	* testsuite/ld-elf/pr16322.d: Likewise.
	* testsuite/ld-elf/pr16498a.d: Likewise.
	* testsuite/ld-elf/pr16498b.d: Likewise.
	* testsuite/ld-elf/pr19162.d: Likewise.
	* testsuite/ld-elf/pr22269a.d: Likewise.
	* testsuite/ld-elf/pr22269b.d: Likewise.
	* testsuite/ld-elf/pr22393-1a.d: Likewise.
	* testsuite/ld-elf/pr22393-1b.d: Likewise.
	* testsuite/ld-elf/pr22393-1c.d: Likewise.
	* testsuite/ld-elf/pr22393-1d.d: Likewise.
	* testsuite/ld-elf/pr22393-1e.d: Likewise.
	* testsuite/ld-elf/pr22393-1f.d: Likewise.
	* testsuite/ld-elf/pr22393-2a.rd: Likewise.
	* testsuite/ld-elf/pr22393-2b.rd: Likewise.
	* testsuite/ld-elf/pr23900-1-32.rd: Likewise.
	* testsuite/ld-elf/pr23900-1-64.rd: Likewise.
	* testsuite/ld-elf/pr23900-1.d: Likewise.
	* testsuite/ld-elf/pr23900-2a.d: Likewise.
	* testsuite/ld-elf/pr23900-2b.d: Likewise.
	* testsuite/ld-elf/pr30508.d: Likewise.
	* testsuite/ld-elf/pr30907-1.d: Likewise.
	* testsuite/ld-elf/pr30907-2.d: Likewise.
	* testsuite/ld-elf/pr32341.d: Likewise.
	* testsuite/ld-elf/shared.exp: Likewise.
	* testsuite/ld-elf/tls.exp: Likewise.
	* testsuite/ld-elf/tls_common.exp: Likewise.
	* testsuite/ld-elfvers/vers.exp: Likewise.
	* testsuite/ld-elfvsb/elfvsb.exp: Likewise.
	* testsuite/ld-elfweak/elfweak.exp: Likewise.
	* testsuite/ld-gc/gc.exp: Likewise.
	* testsuite/ld-ifunc/binutils.exp: Likewise.
	* testsuite/ld-pie/pie.exp: Likewise.
	* testsuite/ld-plugin/lto-binutils.exp: Likewise.
	* testsuite/ld-plugin/lto.exp: Likewise.
	* testsuite/ld-scripts/rgn-at3.d: Likewise.
	* testsuite/ld-shared/shared.exp: Likewise.
	* testsuite/ld-size/size.exp: Likewise.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-21 06:18:54 -07:00
Nick Clifton
5c778308bd Add markers for 2.45 branch 2025-07-13 08:35:45 +01:00
Indu Bhagat
6a959b1270 libsframe: bump version to 2.0
Remove LIBSFRAME_1.1, LIBSFRAME_1.0 nodes and add a new LIBSFRAME_2.0
node (non-inheritance version) to create new global versioned symbols.
Also announce libsframe.so.2 in NEWS.

New APIs:
     sframe_decoder_get_flags;
     sframe_decoder_get_offsetof_fde_start_addr;
     sframe_encoder_get_flags;
     sframe_encoder_get_offsetof_fde_start_addr;

Removed APIs: (already deprecated since X-2 release)
     sframe_get_funcdesc_with_addr;

APIs with changed semantics:
     sframe_decoder_get_funcdesc_v2;
     sframe_encoder_add_funcdesc_v2;
     sframe_encoder_write;

lisbframe/
	* libsframe.ver: Define new LIBSFRAME_2.0.
	* libtool-version: Bump the 'current' numeral to indicate a binary
	incompatible release.
include/
	* sframe-api.h (sframe_get_funcdesc_with_addr): Remove
	deprecated interface.
libsframe/
	* sframe.c (sframe_get_funcdesc_with_addr): Likewise.
binutils/
	* NEWS: Announce new versioned release of libsframe.
2025-07-12 01:09:17 -07:00
WANG Xuerui
8b0a598853 {binutils, gas, ld}/NEWS: Announce LoongArch changes in 2.45
Signed-off-by: WANG Xuerui <git@xen0n.name>
2025-07-12 10:36:10 +08:00
Jens Remus
2b1dd3156b s390: Announce s390 64-bit (s390x) SFrame V2 support in binutils
The preceding commits add s390 64-bit (s390x) support in binutils to
generate SFrame stack trace information (.sframe section) in the
assembler from CFI directives (with option --gsframe), generate .sframe
section for linker-generated .plt section in the linker, and dump SFrame
information in objdump and readelf (with option --sframe).

binutils/
	* NEWS: Announce s390 64-bit (s390x) SFrame V2 support in
	as, ld, objdump, and readelf.

gas/
	* NEWS: Update s390 64-bit (s390x) SFrame V2 support in
	assembler.

Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2025-07-11 10:29:40 +02:00
Indu Bhagat
54f153a345 NEWS: sframe: mention new semantics for SFrame FDE function start addr
The SFrame FDE's function start address is always emitted as follows by
GAS and ld:  it is the offset of the start PC of the respective function
from the FDE field itself.

GAS and ld will emit a flag SFRAME_F_FDE_FUNC_START_PCREL set to 1
when emitting the field in this encoding.

	* binutils/NEWS: Announce the change of encoding for SFrame FDE
	  func start addr field.
        * gas/NEWS: Announce the emission of new flag
	  SFRAME_F_FDE_FUNC_START_PCREL.
        * ld/NEWS: Likewise.  Relocatable links are now fixed.
2025-07-06 12:53:03 -07:00
Nelson Chu
1c391a084f ld/NEWS,binutils/NEWS: Updated supports for RISC-V zicfiss and zicfilp 2025-06-24 18:15:14 +08:00
Nelson Chu
614d1b72ce gas/NEW: Updated news related to mapping symbol and extensions for risc-v 2025-03-18 13:42:02 +08:00
Nick Clifton
b49d12e2c5 Add markers for bihnutils 2.44 branch 2025-01-19 12:09:01 +00:00
Vladimir Mezentsev
b715bf1f35 gprofng: update binutils/NEWS for 2.44
ChangeLog
2025-01-16  Vladimir Mezentsev  <vladimir.mezentsev@oracle.com>

	* binutils/NEWS: Updated.
2025-01-17 08:26:46 -08:00
Alan Modra
e8e7cf2abe Update year range in copyright notice of binutils files 2025-01-01 18:29:57 +10:30
Sandra Loosemore
e7a16d9fd6 nios2: Remove binutils support for Nios II target.
The Nios II architecture has been EOL'ed by the vendor.  This patch
removes all binutils, bfd, gas, binutils, and opcodes support for this
target with the exception of the readelf utility.  (The ELF EM_*
number remains valid and the relocation definitions from the Nios II
ABI will never change in future, so retaining the readelf support
seems consistent with its purpose as a utility that tries to parse the
headers in any ELF file provided as an argument regardless of target.)
2024-11-26 19:13:07 +00:00
Nelson Chu
004a5bfc72 RISC-V: Dump instruction without checking architecture support as usual.
Since QEMU have supported -Max option to to enable all normal extensions,
the dis-assembler should also add an option, -M,max to do the same thing.
For the instruction, which have overlapped encodings like zfinx, will not
be considered by the -M,max option.

opcodes/
	* riscv-dis.c (all_ext): New static boolean.  If set, disassemble
	without checking architectire string.
	(riscv_disassemble_insn): Likewise.
	(parse_riscv_dis_option_without_args): Recognized -M,max option.
binutils/
	* NEWS: Updated.
2024-10-31 11:28:45 +08:00
YunQiang Su
08e6af1bac microMIPS: Add MT ASE instruction set support
Add the MT ASE instruction operand types and encodings to the microMIPS
opcode table and enable the assembly of these instructions in GAS from
MIPSr2 onwards.  Update the binutils and GAS testsuites accordingly.

References:

"MIPS Architecture for Programmers, Volume IV-f: The MIPS MT Module for
the microMIPS32 Architecture", MIPS Technologies, Inc., Document Number:
MD00768, Revision 1.12, July 16, 2013

Co-Authored-By: Maciej W. Rozycki <macro@redhat.com>
2024-07-26 18:01:09 +01:00
H.J. Lu
e1b9d58e85 Correct version for binutils 2.43 NEWS entries.
Change 2.42 to 2.43 for binutils 2.43 NEWS entries.

binutils/

	* NEWS: Change 2.42 to 2.43 for 2.43 NEWS entries.

ld/

	* NEWS: Change 2.42 to 2.43 for 2.43 NEWS entries.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2024-07-20 13:52:50 -07:00
Nick Clifton
b33c4f8f82 Add markers for 2.43 branch/release 2024-07-20 12:43:19 +01:00
Vladimir Mezentsev
f769dcdb01 gprofng: add release notes for 2.43
ChangeLog
2024-07-10  Vladimir Mezentsev  <vladimir.mezentsev@oracle.com>.

	* binutils/NEWS (gprofng): Add release notes for 2.43
2024-07-11 21:27:10 -07:00
Richard Earnshaw
ecc5fed791 NEWS: arm: note that FPA support has been removed 2024-06-05 17:45:45 +01:00
Richard Earnshaw
30d57f2e41 arm: update documentation for removal of the Maverick extension
Finally, update the documentation and add a NEWS item.
2024-05-14 10:56:58 +01:00
Nick Clifton
fcf8f3237c Improve readelf's display of RELR relocs. 2024-04-11 16:57:18 +01:00
Nick Clifton
8e8d0b63ff Add -j/--display-section option to readelf. 2024-04-11 15:57:26 +01:00
Jens Remus
75a28d1a97 s390: Print base register 0 as "0" in disassembly
Base and index register 0 have no effect in address computation:

"A value of zero in the B [base] or X [index] field specifies that no
base or index is to be applied, and, thus, general register 0 cannot be
designated as containing a base address or index."
IBM z/Architecture Principles of Operation [1], chapter "Organization",
section "General Registers".

Index register 0 is omitted in the s390 disassembly. Base register 0 is
omitted in D(B), D(L,B) and D(X,B) - the latter only if the index
register is zero.

To make it more apparent print base register 0 as "0" instead of "%r0",
whenever it would still be printed in the disassembly.

[1]: IBM z/Architecture Principles of Operation, SA22-7832-13,
     https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf

opcodes/
	* s390-dis.c: Print base register 0 as "0" in disassembly.

binutils/
	* NEWS: Mention base register 0 now being printed as "0" in s390
	disassembly.

gas/
	* testsuite/gas/s390/zarch-base-index-0.d: Update test case
	output verification patterns to accept "0" as base base
	register due to disassembler output format change.
	* gas/testsuite/gas/s390/zarch-omitted-base-index.d: Likewise.

Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2024-03-01 12:45:14 +01:00
Nick Clifton
1878f44b70 Update readelf's and objdump's debug frame displaying feature to include the contents of the .eh_frame_hdr section, if present. 2024-01-19 14:39:08 +00:00
Nick Clifton
299b91cd85 Add markers for 2.42 branch 2024-01-15 14:42:15 +00:00
Alan Modra
fd67aa1129 Update year range in copyright notice of binutils files
Adds two new external authors to etc/update-copyright.py to cover
bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then
updates copyright messages as follows:

1) Update cgen/utils.scm emitted copyrights.
2) Run "etc/update-copyright.py --this-year" with an extra external
   author I haven't committed, 'Kalray SA.', to cover gas testsuite
   files (which should have their copyright message removed).
3) Build with --enable-maintainer-mode --enable-cgen-maint=yes.
4) Check out */po/*.pot which we don't update frequently.
2024-01-04 22:58:12 +10:30
Jens Remus
f96fe7f454 s390: Optionally print instruction description in disassembly
Print instruction description as comment in disassembly with s390
architecture specific option "insndesc":

- For objdump it can be enabled with option "-M insndesc"
- In gdb it can be enabled with "set disassembler-options insndesc"

Since comments are not column aligned the output can enhanced for
readability by postprocessing using a filter such as "expand":

... | expand -t 8,16,24,32,40,80

Or when using in combination with objdump option --visualize-jumps:

... | expand | sed -e 's/ *#/\t#/' | expand -t 1,80

Note that the instruction descriptions add about 128 KB to s390-opc.o:

s390-opc.o without instruction descriptions: 216368 bytes
s390-opc.o with instruction descriptions   : 348432 bytes

binutils/
	* NEWS: Mention new s390-specific disassembler option
	  "insndesc".

include/
	* opcode/s390.h (struct s390_opcode): Add field to hold
	  instruction description.

opcodes/
	* s390-mkopc.c: Copy instruction description from s390-opc.txt
	  into generated operation code table s390-opc.tab.
	* s390-opc.c (s390_opformats): Provide NULL as description in
	  .insn pseudo-mnemonics opcode table.
	* s390-dis.c: Add s390-specific disassembler option "insndesc"
	  and optionally print the instruction description as comment in
	  the disassembly when it is specified.

gas/
	* testsuite/gas/s390/s390.exp: Add new test disassembly test
	  case "zarch-insndesc".
	* testsuite/gas/s390/zarch-insndesc.s: New test case for s390-
	  specific disassembler option "insndesc".
	* testsuite/gas/s390/zarch-insndesc.d: Likewise.

Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
2023-12-20 11:50:32 +01:00
Jens Remus
c5306fed7d s390: Support for jump visualization in disassembly
Add support for jump visualization for the s390 architecture in
disassembly:

objdump -d --visualize-jumps ...

Annotate the (conditional) jump and branch relative instructions with
information required for jump visualization:
- jump: Unconditional jump / branch relative.
- condjump: Conditional jump / branch relative.
- jumpsr: Jump / branch relative to subroutine.

Unconditional jump and branch relative instructions are annotated as
jump.
Conditional jump and branch relative instructions, jump / branch
relative on count/index, and compare and jump / branch relative
instructions are annotated as condjump.
Jump and save (jas, jasl) and branch relative and save (bras, brasl)
instructions are annotated as jumpsr (jump to subroutine).

Provide instruction information required for jump visualization during
disassembly.
The instruction type is provided after determining the opcode.
For non-code it is set to dis_noninsn. Otherwise it defaults to
dis_nonbranch. No annotation is done for data reference instructions
(i.e. instruction types dis_dref and dis_dref2). Note that the
instruction type needs to be provided before printing of the
instruction, as it is used in print_address_func() to translate the
argument value into an address if it is assumed to be a PC-relative
offset. Note that this is never the case on s390, as
print_address_func() is only called with addresses and never with
offsets.
The target of the (conditional) jump and branch relative instructions
is provided during print, when the PC relative operand is decoded.

include/
	* opcode/s390.h: Define opcode flags to annotate instruction
	  class information for jump visualization:
	  S390_INSTR_FLAG_CLASS_BRANCH, S390_INSTR_FLAG_CLASS_RELATIVE,
	  S390_INSTR_FLAG_CLASS_CONDITIONAL, and
	  S390_INSTR_FLAG_CLASS_SUBROUTINE.
	  Define opcode flags mask S390_INSTR_FLAG_CLASS_MASK for above
	  instruction class information.
	  Define helpers for common instruction class flag combinations:
	  S390_INSTR_FLAGS_CLASS_JUMP, S390_INSTR_FLAGS_CLASS_CONDJUMP,
	  and S390_INSTR_FLAGS_CLASS_JUMPSR.

opcodes/
	* s390-mkopc.c: Add opcode flags to annotate information
	  for jump visualization: jump, condjump, and jumpsr.
	* s390-opc.txt: Annotate (conditional) jump and branch relative
	  instructions with information for jump visualization.
	* s390-dis.c (print_insn_s390, s390_print_insn_with_opcode):
	  Provide instruction information for jump visualization.

Signed-off-by: Jens Remus <jremus@linux.ibm.com>
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
2023-12-04 17:13:33 +00:00
Nick Clifton
fab62191f8 Improve objdump's handling of compressed sections.
PR 31062
  * objdump.c (decompressed_dumps): New local variable. (usage): Mention the -z/--decompress option. (long_options): Add --decompress. (dump_section_header): Add "COMPRESSED" to the Flags field of any compressed section. (dump_section): Warn users when dumping a compressed section. (display_any_bfd): Decompress the section if decompressed_dumps is true. (main): Handle the -z/--decompress option.
  * NEWS: Mention the new feature.
  * doc/binutils.texi: Document the new feature.
  * testsuite/binutils-all/objdump.s: Update expected output.
  * testsuite/binutils-all/objdump.exp: Add test of -Z -s.
  * testsuite/binutils-all/objdump.Zs: New file.
  * readelf.c (maybe_expand_or_relocate_section): New function. Contains common code found in dump functions.  Adds a note message if a compressed section is not being decompressed. (dump_section_as_strings): Use new function. (dump_section_as_bytes): Likewise.
2023-11-14 10:57:58 +00:00
Claudiu Zissulescu
f14cd06ba4 Revert "arc: Update NEWS files"
This reverts commit a47d304b12.
2023-09-25 17:01:47 +03:00
Claudiu Zissulescu
a47d304b12 arc: Update NEWS files
Add ARCv3 support in NEWS files.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
2023-09-25 11:33:12 +03:00
Nick Clifton
b6ac461ace readelf: Add option to display the names of sections referenced by symbols.
PR 30684
  * readelf.c (extra_sym_info): New variable. (section_name_valid): Also check for filedata being NULL. (section_name_print): Delete. (section_index_real): New function.  Returns true if the given section index references a real section. (print_symbol): Rename to print_sumbol_name. (printable_section_name): Use a rotating array of static buffers for the return string. (printable_section_name_from_index): Merge code from dump_relocations and get_symbol_index_type into here. (long_option_values): Add OPTION_NO_EXTRA_SYM_INFO. (options): Add "extra-sym-info" and "no-extra-sym-info". (usage): Mention new options. (parse_args): Parse new options. (get_symbol_index_type): Delete. (print_dynamic_symbol_size): Rename to print_symbol_size. (print_dynamic_symbol): Rename to print_symbol. (print_symbol_table_heading): New function. (process_symbol_table): Use new function.
  * doc/binutils.texi: Document the new option.
  * NEWS: Mention the new feature.
2023-09-05 11:08:23 +01:00
Sam James
b5c37946cc Revert "2.41 Release sources"
This reverts commit 675b9d612c.

See https://sourceware.org/pipermail/binutils/2023-August/128761.html.
2023-08-02 12:06:23 +01:00
Nick Clifton
675b9d612c 2.41 Release sources 2023-08-02 09:23:36 +01:00
Fangrui Song
5e24da908d PR30592 objcopy: allow --set-section-flags to add or remove SHF_X86_64_LARGE
For example, objcopy --set-section-flags .data=alloc,large will add
SHF_X86_64_LARGE to the .data section.  Omitting "large" will drop the
SHF_X86_64_LARGE flag.

The bfd_section flag is named generically, SEC_ELF_LARGE, in case other
processors want to follow SHF_X86_64_LARGE.  SEC_ELF_LARGE has the same
value as SEC_TIC54X_BLOCK used by coff.

bfd/
    * section.c: Define SEC_ELF_LARGE.
    * bfd-in2.h: Regenerate.
    * elf64-x86-64.c (elf_x86_64_section_flags, elf_x86_64_fake_sections,
    elf_x86_64_copy_private_section_data): New.

binutils/
    * NEWS: Mention the new feature for objcopy.
    * doc/binutils.texi: Mention "large".
    * objcopy.c (parse_flags): Parse "large".
    (check_new_section_flags): Error if "large" is used with a
    non-x86-64 ELF target.
    * testsuite/binutils-all/x86-64/large-sections.d: New.
    * testsuite/binutils-all/x86-64/large-sections.s: New.
    * testsuite/binutils-all/x86-64/large-sections-i386.d: New.
    * testsuite/binutils-all/x86-64/large-sections-2.d: New.
    * testsuite/binutils-all/x86-64/large-sections-2-x32.d: New.
2023-07-09 10:57:19 -07:00
Nick Clifton
d501d38488 Add markers for the 2.41 branch 2023-07-03 11:12:15 +01:00
WANG Xuerui
0ed3ac2f4a binutils: NEWS: Announce LoongArch changes in the 2.41 cycle
binutils/ChangeLog:

	* NEWS: Mention LoongArch changes for 2.41.

Signed-off-by: WANG Xuerui <git@xen0n.name>
2023-07-03 09:00:48 +08:00
Christoph Müllner
9fdc1b157b binutils: NEWS: Announce new RISC-V vector crypto extensions
This commit adds the recently added support of the RISC-V vector crypto
extensions to the NEWS file.

binutils/ChangeLog:

	* NEWS: Announce new RISC-V vector crypto extensions.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2023-07-01 07:32:20 -06:00
Philipp Tomsich
e507570754 binutils: NEWS: announce new RISC-V extensions
We picked up support for a few new extensions over the last weeks
(this may need further updating prior to the next release), list them
in the NEWS file.

binutils/ChangeLog:

	* binutils/NEWS: announce suuport for the new RISC-V
          extensions (Zicond, Zfa, XVentanaCondOps).

Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
2023-06-30 16:02:17 +02:00
Indu Bhagat
a47cd2a1cd binutils/NEWS: announce SFrame version 2 as the new default 2023-06-29 16:32:26 -07:00
Kaylee Blake
96cc7918c1 ELF: Strip section header in ELF objects
Section header isn't mandatory on ELF executable nor shared library.
This patch adds a new linker option, -z nosectionheader, to omit ELF
section header, a new objcopy and strip option, --strip-section-headers,
to remove ELF section headers.

bfd/

2023-06-06  H.J. Lu  <hongjiu.lu@intel.com>
	    Kaylee Blake  <klkblake@gmail.com>

	PR ld/25617
	* bfd.c (BFD_NO_SECTION_HEADER): New.
	(BFD_FLAGS_SAVED): Add BFD_NO_SECTION_HEADER.
	(BFD_FLAGS_FOR_BFD_USE_MASK): Likewise.
	* elfcode.h (elf_swap_ehdr_out): Omit section header with
	BFD_NO_SECTION_HEADER.
	(elf_write_shdrs_and_ehdr): Likewise.
	* elfxx-target.h (TARGET_BIG_SYM): Add BFD_NO_SECTION_HEADER
	to object_flags.
	(TARGET_LITTLE_SYM): Likewise.
	* bfd-in2.h: Regenerated.

binutils/

2023-06-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/25617
	* NEWS: Mention --strip-section-headers for objcopy and strip.
	* objcopy.c (strip_section_headers): New.
	(command_line_switch): Add OPTION_STRIP_SECTION_HEADERS.
	(strip_options): Add --strip-section-headers.
	(copy_options): Likewise.
	(copy_usage): Add --strip-section-headers.
	(strip_usage): Likewise.
	(copy_object): Handle --strip-section-headers for ELF files.
	(strip_main): Handle OPTION_STRIP_SECTION_HEADERS.
	(copy_main): Likewise.
	* doc/binutils.texi: Document --strip-section-headers for objcopy
	and strip.

ld/

2023-06-06  H.J. Lu  <hongjiu.lu@intel.com>
	    Kaylee Blake  <klkblake@gmail.com>

	PR ld/25617
	* NEWS: Mention -z nosectionheader.
	* emultempl/elf.em: Support -z sectionheader and
	-z nosectionheader.
	* ld.h (ld_config_type): Add no_section_header.
	* ld.texi: Document -z sectionheader and -z nosectionheader.
	* ldlang.c (ldlang_open_output): Handle
	config.no_section_header.
	* lexsup.c (parse_args): Enable --strip-all with
	-z nosectionheader.  Disallow -r with -z nosectionheader.
	(elf_static_list_options): Add -z sectionheader and
	-z nosectionheader.
2023-06-29 10:29:46 -07:00
Indu Bhagat
fa3d73ebf3 binutils/NEWS: add note about upcoming libsframe changes
Some of these changes update the ABI in an incompatible way.
2023-06-27 12:01:56 -07:00
Maciej W. Rozycki
9012d7819c binutils/NEWS: Mention Sony Allegrex MIPS CPU support
Mention the addition of Sony Allegrex processor support to the MIPS port.

	binutils/
	* NEWS: Mention Sony Allegrex MIPS CPU support.
2023-06-15 15:17:38 +01:00
Nick Clifton
45b8517aae Enhance objdump's --private option so that it can display the contents of PE format files.
* od-pe.c: New file: Dumps fields in PE format headers.
  * configure.ac (od_vectors): Add objdump_private_desc_pe for PE format targets. (od_files): Add od-pe for PE format targets.
  * configure: Regenerate.
  * Makefile.am (CFILES): Add od-pe.c (EXTRA_objdump_SOURCE): Likewise.
  * Makefile.in: Generate.
  * NEWS: Mention the new feature.
  * doc/binutils.texi: Document the new support.
  * objdump.c (wide_output): Change from local to global.
  * objdump.h (wide_output): Prototype. (objdump_private_desc_pe): Prototype.
  * testsuite/binutils-all/objdump.exp: Add a test of the new feature.
2023-05-26 15:41:20 +01:00
Alan Modra
d87bef3a7b Update year range in copyright notice of binutils files
The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2023-01-01 21:50:11 +10:30
Nick Clifton
a72b07181d Add markers for 2.40 branch 2022-12-31 12:05:28 +00:00
Nick Clifton
c7ce51d8c8 Fix previous delta to allow for compilation on 32-bit systems 2022-12-16 15:44:55 +00:00
Indu Bhagat
9968a11f9f binutils/NEWS: add text for SFrame support
ChangeLog:

	* binutils/NEWS: Add item for SFrame support.
2022-11-15 15:50:05 -08:00
Nick Clifton
18bf56434d objdump: Add configure time option to enable colored disassembly output by default.
PR 29457
	* configure.ac: Add --enable-colored-disassembly.
	* objdump.c: Add --disassembler-color=terminal.
	* doc/binutils.texi (objdump): Document the new option.
	* NEWS: Mention new feature.
	* config.in: Regenerate in.
	* configure: Regenerate.
2022-10-31 09:35:16 +00:00
Nick Clifton
816be8d8b7 Add a note to the binutils/NEWS file about DCO signed contributions. 2022-10-21 11:58:47 +01:00
Fangrui Song
2cac01e3ff binutils, gdb: support zstd compressed debug sections
PR29397 PR29563: Add new configure option --with-zstd which defaults to
auto.  If pkgconfig/libzstd.pc is found, define HAVE_ZSTD and support
zstd compressed debug sections for most tools.

* bfd: for addr2line, objdump --dwarf, gdb, etc
* gas: support --compress-debug-sections=zstd
* ld: support ELFCOMPRESS_ZSTD input and --compress-debug-sections=zstd
* objcopy: support ELFCOMPRESS_ZSTD input for
  --decompress-debug-sections and --compress-debug-sections=zstd
* gdb: support ELFCOMPRESS_ZSTD input.  The bfd change references zstd
  symbols, so gdb has to link against -lzstd in this patch.

If zstd is not supported, ELFCOMPRESS_ZSTD input triggers an error.  We
can avoid HAVE_ZSTD if binutils-gdb imports zstd/ like zlib/, but this
is too heavyweight, so don't do it for now.

```
% ld/ld-new a.o
ld/ld-new: a.o: section .debug_abbrev is compressed with zstd, but BFD is not built with zstd support
...

% ld/ld-new a.o --compress-debug-sections=zstd
ld/ld-new: --compress-debug-sections=zstd: ld is not built with zstd support

% binutils/objcopy --compress-debug-sections=zstd a.o b.o
binutils/objcopy: --compress-debug-sections=zstd: binutils is not built with zstd support

% binutils/objcopy b.o --decompress-debug-sections
binutils/objcopy: zstd.o: section .debug_abbrev is compressed with zstd, but BFD is not built with zstd support
...
```
2022-09-26 19:50:13 -07:00