forked from Imagelibrary/binutils-gdb
* arm-tdep.c (arm_scan_prologue): Do not record FPA register saves
if there are no FPA registers. (arm_dwarf_reg_to_regnum): New function. (arm_register_type, arm_register_name): Return minimal values for unsupported registers. (arm_register_sim_regno): Handle iWMMXt registers. (arm_gdbarch_init): Record missing FPA registers if indicated by a target description. Recognize iWMMXt registers. Only register "info float" for FPA. Use ARM_NUM_REGS. Register arm_dwarf_reg_to_regnum. * arm-tdep.h (enum gdb_regnum): Add ARM_NUM_REGS and iWMMXt constants. (struct gdbarch_tdep): Add have_fpa_registers. * features/xscale-iwmmxt.xml: Update capitalization. * regformats/arm-with-iwmmxt.dat: Regenerated. * src/gdb/doc/gdb.texinfo (Standard Target Features): Mention case insensitivity. (ARM Features): Describe org.gnu.gdb.xscale.iwmmxt. * gdb.arch/iwmmxt-regs.c, gdb.arch/iwmmxt-regs.exp: Update register capitalization.
This commit is contained in:
Daniel Jacobowitz
107
gdb/arm-tdep.c
107
gdb/arm-tdep.c
@@ -832,13 +832,15 @@ arm_scan_prologue (struct frame_info *next_frame, struct arm_prologue_cache *cac
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imm = (imm >> rot) | (imm << (32 - rot));
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sp_offset -= imm;
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}
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else if ((insn & 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
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else if ((insn & 0xffff7fff) == 0xed6d0103 /* stfe f?, [sp, -#c]! */
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&& gdbarch_tdep (current_gdbarch)->have_fpa_registers)
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{
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sp_offset -= 12;
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regno = ARM_F0_REGNUM + ((insn >> 12) & 0x07);
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cache->saved_regs[regno].addr = sp_offset;
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}
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else if ((insn & 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */
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else if ((insn & 0xffbf0fff) == 0xec2d0200 /* sfmfd f0, 4, [sp!] */
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&& gdbarch_tdep (current_gdbarch)->have_fpa_registers)
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{
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int n_saved_fp_regs;
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unsigned int fp_start_reg, fp_bound_reg;
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@@ -1383,10 +1385,48 @@ arm_register_type (struct gdbarch *gdbarch, int regnum)
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return builtin_type_void_data_ptr;
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else if (regnum == ARM_PC_REGNUM)
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return builtin_type_void_func_ptr;
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else if (regnum >= ARRAY_SIZE (arm_register_names))
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/* These registers are only supported on targets which supply
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an XML description. */
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return builtin_type_int0;
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else
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return builtin_type_uint32;
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}
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/* Map a DWARF register REGNUM onto the appropriate GDB register
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number. */
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static int
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arm_dwarf_reg_to_regnum (int reg)
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{
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/* Core integer regs. */
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if (reg >= 0 && reg <= 15)
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return reg;
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/* Legacy FPA encoding. These were once used in a way which
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overlapped with VFP register numbering, so their use is
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discouraged, but GDB doesn't support the ARM toolchain
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which used them for VFP. */
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if (reg >= 16 && reg <= 23)
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return ARM_F0_REGNUM + reg - 16;
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/* New assignments for the FPA registers. */
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if (reg >= 96 && reg <= 103)
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return ARM_F0_REGNUM + reg - 96;
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/* WMMX register assignments. */
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if (reg >= 104 && reg <= 111)
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return ARM_WCGR0_REGNUM + reg - 104;
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if (reg >= 112 && reg <= 127)
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return ARM_WR0_REGNUM + reg - 112;
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if (reg >= 192 && reg <= 199)
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return ARM_WC0_REGNUM + reg - 192;
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return -1;
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}
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/* Map GDB internal REGNUM onto the Arm simulator register numbers. */
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static int
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arm_register_sim_regno (int regnum)
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@@ -1394,6 +1434,15 @@ arm_register_sim_regno (int regnum)
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int reg = regnum;
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gdb_assert (reg >= 0 && reg < NUM_REGS);
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if (regnum >= ARM_WR0_REGNUM && regnum <= ARM_WR15_REGNUM)
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return regnum - ARM_WR0_REGNUM + SIM_ARM_IWMMXT_COP0R0_REGNUM;
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if (regnum >= ARM_WC0_REGNUM && regnum <= ARM_WC7_REGNUM)
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return regnum - ARM_WC0_REGNUM + SIM_ARM_IWMMXT_COP1R0_REGNUM;
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if (regnum >= ARM_WCGR0_REGNUM && regnum <= ARM_WCGR7_REGNUM)
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return regnum - ARM_WCGR0_REGNUM + SIM_ARM_IWMMXT_COP1R8_REGNUM;
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if (reg < NUM_GREGS)
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return SIM_ARM_R0_REGNUM + reg;
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reg -= NUM_GREGS;
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@@ -2482,6 +2531,11 @@ set_disassembly_style_sfunc (char *args, int from_tty,
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static const char *
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arm_register_name (int i)
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{
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if (i >= ARRAY_SIZE (arm_register_names))
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/* These registers are only supported on targets which supply
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an XML description. */
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return "";
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return arm_register_names[i];
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}
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@@ -2597,6 +2651,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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enum arm_float_model fp_model = arm_fp_model;
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struct tdesc_arch_data *tdesc_data = NULL;
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int i;
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int have_fpa_registers = 1;
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/* Check any target description for validity. */
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if (tdesc_has_registers (info.target_desc))
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@@ -2653,6 +2708,43 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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return NULL;
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}
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}
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else
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have_fpa_registers = 0;
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.xscale.iwmmxt");
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if (feature != NULL)
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{
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static const char *const iwmmxt_names[] = {
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"wR0", "wR1", "wR2", "wR3", "wR4", "wR5", "wR6", "wR7",
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"wR8", "wR9", "wR10", "wR11", "wR12", "wR13", "wR14", "wR15",
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"wCID", "wCon", "wCSSF", "wCASF", "", "", "", "",
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"wCGR0", "wCGR1", "wCGR2", "wCGR3", "", "", "", "",
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};
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valid_p = 1;
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for (i = ARM_WR0_REGNUM; i <= ARM_WR15_REGNUM; i++)
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valid_p
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&= tdesc_numbered_register (feature, tdesc_data, i,
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iwmmxt_names[i - ARM_WR0_REGNUM]);
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/* Check for the control registers, but do not fail if they
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are missing. */
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for (i = ARM_WC0_REGNUM; i <= ARM_WCASF_REGNUM; i++)
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tdesc_numbered_register (feature, tdesc_data, i,
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iwmmxt_names[i - ARM_WR0_REGNUM]);
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for (i = ARM_WCGR0_REGNUM; i <= ARM_WCGR3_REGNUM; i++)
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valid_p
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&= tdesc_numbered_register (feature, tdesc_data, i,
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iwmmxt_names[i - ARM_WR0_REGNUM]);
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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}
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}
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/* If we have an object to base this architecture on, try to determine
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@@ -2796,6 +2888,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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These are gdbarch discriminators, like the OSABI. */
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tdep->arm_abi = arm_abi;
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tdep->fp_model = fp_model;
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tdep->have_fpa_registers = have_fpa_registers;
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/* Breakpoints. */
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switch (info.byte_order)
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@@ -2858,14 +2951,20 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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set_gdbarch_breakpoint_from_pc (gdbarch, arm_breakpoint_from_pc);
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/* Information about registers, etc. */
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set_gdbarch_print_float_info (gdbarch, arm_print_float_info);
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set_gdbarch_deprecated_fp_regnum (gdbarch, ARM_FP_REGNUM); /* ??? */
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set_gdbarch_sp_regnum (gdbarch, ARM_SP_REGNUM);
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set_gdbarch_pc_regnum (gdbarch, ARM_PC_REGNUM);
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set_gdbarch_num_regs (gdbarch, NUM_GREGS + NUM_FREGS + NUM_SREGS);
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set_gdbarch_num_regs (gdbarch, ARM_NUM_REGS);
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set_gdbarch_register_type (gdbarch, arm_register_type);
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/* This "info float" is FPA-specific. Use the generic version if we
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do not have FPA. */
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if (gdbarch_tdep (gdbarch)->have_fpa_registers)
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set_gdbarch_print_float_info (gdbarch, arm_print_float_info);
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/* Internal <-> external register number maps. */
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set_gdbarch_dwarf_reg_to_regnum (gdbarch, arm_dwarf_reg_to_regnum);
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set_gdbarch_dwarf2_reg_to_regnum (gdbarch, arm_dwarf_reg_to_regnum);
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set_gdbarch_register_sim_regno (gdbarch, arm_register_sim_regno);
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/* Integer registers are 4 bytes. */
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