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Keep reserved bits in CPSR on write

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In patch https://sourceware.org/ml/gdb-patches/2016-04/msg00529.html
I cleared reserved bits when reading CPSR.  It makes a problem that
these bits (zero) are written back to kernel through ptrace, and it
changes the state of the processor on some recent kernel, which is
unexpected.

In this patch, I keep these reserved bits when write CPSR back to
hardware.

gdb:

2016-09-21  Yao Qi  <yao.qi@linaro.org>

	* aarch32-linux-nat.c (aarch32_gp_regcache_collect): Keep
	bits 20 to 23.

gdb/gdbserver:

2016-09-21  Yao Qi  <yao.qi@linaro.org>

	* linux-aarch32-low.c (arm_fill_gregset): Keep bits 20 to
	23.
This commit is contained in:
Yao Qi
2016-09-16 14:58:31 +01:00
parent 44b8317a75
commit fc6cda2ee8
4 changed files with 23 additions and 2 deletions
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11
gdb/aarch32-linux-nat.c
View File

@@ -67,8 +67,15 @@ aarch32_gp_regcache_collect (const struct regcache *regcache, uint32_t *regs,
if (arm_apcs_32
&& REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
regcache_raw_collect (regcache, ARM_PS_REGNUM,
&regs[ARM_CPSR_GREGNUM]);
{
uint32_t cpsr = regs[ARM_CPSR_GREGNUM];
regcache_raw_collect (regcache, ARM_PS_REGNUM,
&regs[ARM_CPSR_GREGNUM]);
/* Keep reserved bits bit 20 to bit 23. */
regs[ARM_CPSR_GREGNUM] = ((regs[ARM_CPSR_GREGNUM] & 0xff0fffff)
| (cpsr & 0x00f00000));
}
}
/* Supply VFP registers contents, stored in REGS, to REGCACHE.